WO2017152548A1 - 关机用电路、外围驱动装置和液晶面板 - Google Patents

关机用电路、外围驱动装置和液晶面板 Download PDF

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Publication number
WO2017152548A1
WO2017152548A1 PCT/CN2016/087448 CN2016087448W WO2017152548A1 WO 2017152548 A1 WO2017152548 A1 WO 2017152548A1 CN 2016087448 W CN2016087448 W CN 2016087448W WO 2017152548 A1 WO2017152548 A1 WO 2017152548A1
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Prior art keywords
module
common electrode
reset signal
liquid crystal
coupled
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PCT/CN2016/087448
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English (en)
French (fr)
Inventor
董殿正
张斌
张强
王光兴
张衎
何宇
Original Assignee
京东方科技集团股份有限公司
北京京东方显示技术有限公司
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Priority to US15/531,170 priority Critical patent/US10629154B2/en
Publication of WO2017152548A1 publication Critical patent/WO2017152548A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/3406—Control of illumination source
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3648—Control of matrices with row and column drivers using an active matrix
    • G09G3/3655—Details of drivers for counter electrodes, e.g. common electrodes for pixel capacitors or supplementary storage capacitors
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/027—Arrangements or methods related to powering off a display

Definitions

  • Embodiments of the present invention relate to a shutdown circuit and a peripheral drive device, and a liquid crystal panel including the shutdown circuit and the peripheral drive device.
  • the liquid crystal display panel generally includes two substrates, a liquid crystal sandwiched between the two substrates, a backlight module, and a peripheral driving module. Due to its small size and low energy consumption, liquid crystal display panels have become one of the most widely used display panels. In mobile phones, tablets, notebooks, desktop computers, televisions and other products, LCD panels occupy a very large market share. Therefore, there is a need to continuously improve the performance of a liquid crystal display panel.
  • One of the objects of the embodiments of the present invention is to effectively reduce the switching drift of the liquid crystal panel, thereby improving the performance of the liquid crystal panel.
  • a shutdown circuit for a liquid crystal panel includes: an enable signal transmission line and a switch module; the switch module and the enable signal transmission line, the liquid crystal panel
  • the common electrode and each of the data lines are coupled for conducting when the enable signal is received by the enable signal transmission line to short the respective data lines to the common electrode.
  • each of the data lines when an enable signal for shutdown is applied to the shutdown circuit, each of the data lines can be shorted to the common electrode. Since each data line is shorted to the common electrode, each data line is also shorted. Thus, the short circuit between each data line and the common electrode A part of the discharge path of the holding capacitance of each pixel of the liquid crystal panel may be formed, thereby providing a part of the hardware basis for the formation of the discharge path.
  • the switch module includes at least one switch submodule; each of the switch submodules includes a transistor whose gate is coupled to the enable signal transmission line, and the remaining two electrodes are One of the electrodes is coupled to one or more data lines, and the other electrode is coupled to the common electrode; or each of the switch sub-modules includes a plurality of transistors in series with the source and drain, the gate of each transistor The enable signal transmission line is coupled, and a source or a drain of one of the two transistors at the first and last ends of the plurality of transistors connected in series is coupled to the common electrode, and a drain or a source of the other transistor and a strip Or multiple data lines are coupled.
  • the switch module can include one or more switch sub-modules to flexibly implement the manufacture of the switch module.
  • the transistor is a thin film transistor (TFT).
  • the switch module can be flexibly manufactured using various existing film forming processes.
  • the shutdown circuit is disposed on the array substrate of the liquid crystal panel.
  • the shutdown circuit is disposed outside an effective display area of the liquid crystal panel.
  • the layers of the switch module can be the same material in the same layer as the corresponding layers of the driving TFTs of the pixels in the effective display area of the array substrate. Formed in the process, greatly simplifying the manufacture of switch modules.
  • the shutdown circuit is disposed on a circuit board coupled to the array substrate of the liquid crystal panel.
  • a peripheral driving apparatus comprising: a reset signal generating module, a first control module, a second control module, a third control module, and a data line driver.
  • a module, a common electrode driving module, and a gate driving module the reset signal generating module is configured to output a first reset signal when the driving voltage of the liquid crystal panel is less than a set value;
  • the first control module is configured to receive and respond to the first reset signal And outputting an enable signal;
  • the second control module is configured to receive and respond to the first reset signal, and drive the gate driving module to scan at least one frame of the gate line;
  • the third control module is configured to receive and respond to the first And resetting the signal, disconnecting the common electrode driving module from the common electrode, disconnecting the data line driving module from the data line, and grounding the data line and/or the common electrode.
  • the common electrode driving module and the data line driving module can be prevented from being introduced during discharge of the liquid crystal panel. Extra charge.
  • the data lines and/or the common electrode are grounded, it is possible to provide a ground path for the discharge path to discharge the charge, thereby providing a part of the hardware foundation for the formation of the discharge path.
  • the enable signal has the following effect: by applying the enable signal to the enable signal transmission line, each of the data lines can be shorted to the common electrode when the liquid crystal panel is turned off.
  • each data line is shorted to the common electrode, each data line is also shorted.
  • the signal for scanning the gate line has the following effect: by scanning each gate line by using the scan signal, a holding capacitance of each pixel coupled to the gate line can pass through each of the data lines and the common electrode The short circuit between the two is synchronously discharged to the ground, thereby preventing the liquid crystal panel from blinking after a period of time due to the incomplete release of the charge after the shutdown.
  • the common electrodes that are shorted to the respective data lines are grounded, and the pixel electrodes (ie, the holding capacitors of the respective pixels are coupled to the respective data lines).
  • One of the plates is also grounded so that the voltage on the common electrode, the voltage on the data line, and the voltage on the pixel electrode can be quickly discharged in synchronization with the potential.
  • each of the data lines shorted to the common electrode is grounded, and the pixel electrode (ie, one plate of the holding capacitance of each pixel coupled to each of the data lines) It is also grounded so that the voltage on the common electrode, the voltage on the data line, and the voltage on the pixel electrode can be quickly discharged in synchronization with the potential.
  • the third control module includes a first switching unit and a second switching unit; a control pole of the first switching unit is coupled to the reset signal generating module, and the first One end of the switch unit is coupled to the common electrode driving module, and the other end is coupled to the common electrode; the first switch unit is configured to open the common electrode driving module and the common electrode in response to the first reset signal.
  • the control unit of the second switch unit is coupled to the reset signal generating module, and the second switch unit is coupled to the data line driving module at one end and to the data line at the other end;
  • the second switching unit is configured to disconnect the data line driving module from the data line in response to the first reset signal.
  • the third control module includes a ground unit; the ground unit is configured to ground the data line and/or the common electrode in response to the first reset signal.
  • the reset signal generating module is configured to output a second reset signal when a driving voltage of the liquid crystal panel is greater than or equal to the set value.
  • the first switching unit is configured to conduct the common electrode driving module and the common electrode in response to the second reset signal;
  • the second switching unit is configured to:
  • the data line driving module is turned on with the data line in response to the second reset signal.
  • the ground unit is configured to disconnect the data line and/or the common electrode from the ground in response to the second reset signal.
  • a liquid crystal panel comprising a gate line, a data line, a common electrode disposed in an effective display area, and the shutdown according to any one of the above first to sixth aspects.
  • a peripheral driving device according to any one of the seventh to twelfth aspects, wherein the first control module is coupled to the enable signal transmission line.
  • the common electrode driving module and the data line driving module can be avoided by disconnecting the coupling of the common electrode driving module and the common electrode and disconnecting the data line driving module from the data line. Additional charge is introduced during discharge of the liquid crystal panel. Moreover, by grounding the data lines and/or the common electrode, it is possible to provide a ground path for the discharge path to discharge the charge to the ground. In addition, by applying the enable signal to the enable signal transmission line, the shutdown liquid In the case of a crystal panel, each data line can be shorted to the common electrode. Since each data line is shorted to the common electrode, each data line is also shorted.
  • FIG. 1 is a schematic view showing the position of a shutdown circuit according to an embodiment of the present invention
  • FIGS. 2A through 2C are circuit diagrams of a shutdown circuit in accordance with various embodiments of the present invention.
  • FIG. 3 is a circuit diagram of a peripheral driving device in accordance with an embodiment of the present invention.
  • FIG. 4 is a schematic diagram illustrating a shutdown sequence in accordance with one embodiment of the present invention.
  • Coupled includes both direct and indirect connections between the elements.
  • plurality refers to two or more.
  • the existing LCD panel is prone to flashing after a period of shutdown. This phenomenon is mainly caused by the fact that the liquid crystal panel cannot be completely discharged when it is turned off, so that the electric charge remains in the panel.
  • an XAO Output ALL-ON Control, That is XDON or XON
  • the XAO signal is a control signal for the gate drive module. When the LCD panel is operating normally, the XAO signal remains high. When the liquid crystal panel is turned off and the driving voltage of the liquid crystal panel is lower than the set value, the XAO signal changes from a high level to a low level.
  • the gate driving module can forcibly change the signals on all the gate lines (ie, scan lines) of the liquid crystal panel to a high level VGH, thereby turning on all the driving transistors for driving the pixels, and The charge accumulated in the pixel is released.
  • all the driving transistors are simultaneously turned on, a large inrush current is generated, which is liable to damage the panel.
  • Embodiments of the present invention provide a shutdown circuit and a peripheral driving device, and a liquid crystal panel including the shutdown circuit and the peripheral driving device. According to the embodiment of the present invention, it is possible to ensure that the voltage on the pixel electrode of each pixel of the liquid crystal panel is completely released after the shutdown, thereby effectively reducing the switching drift of the switch.
  • the shutdown circuit, the peripheral driving device, and the liquid crystal panel of the present invention will be specifically described in the corresponding embodiments.
  • the shutdown circuit includes an enable signal transmission line and a switch module. Therefore, it should be noted that only the enable signal transmission line is shown in FIG. 1 for the sake of brevity, and the switch module is not shown.
  • the shutdown circuit is disposed outside the effective display area (AA area) of the liquid crystal panel.
  • the effective display area refers to an area of the liquid crystal panel capable of displaying an image, and generally includes a plurality of liquid crystal pixels.
  • the liquid crystal panel of Fig. 1 is shown in the form of a television product, the invention is not limited thereto.
  • the liquid crystal panel according to the embodiment of the present invention can also be applied to other products such as mobile phones, tablet computers, notebook computers, desktop computers, and the like.
  • the effective display area of the liquid crystal panel includes a plurality of gate lines (ie, scan lines, only one gate line is shown for simplicity) and a plurality of data lines (ie, source lines).
  • gate lines ie, scan lines, only one gate line is shown for simplicity
  • data lines ie, source lines
  • liquid crystal pixels are disposed in each of a plurality of rectangular regions defined by a plurality of gate lines and a plurality of data lines.
  • Each liquid crystal pixel includes a liquid crystal, a driving TFT (thin film transistor), and a holding capacitor Cs.
  • the gate line, the data line, the driving TFT, and the holding capacitor are disposed on the array substrate of the liquid crystal panel, and the liquid The crystal clip is disposed between the array substrate of the liquid crystal panel and the color filter substrate (specifically, between the pixel electrode on the array substrate and the common electrode on the color filter substrate).
  • the holding capacitor Cs adopts a Cs on common (storage capacitor in common pole) architecture. That is, one plate of the holding capacitor Cs coupled to the driving TFT is a pixel electrode, and the other plate is a common electrode wiring. Thus, each gate line corresponds to a common electrode trace. All common electrode traces are coupled to VCOM (ie, a module in the peripheral driver of the liquid crystal panel for generating a voltage signal for use by the common electrode). In practice, all common electrode traces are typically coupled to a coupling end of the array substrate coupled to the VCOM module (which may correspond to the "common electrode" described in the claims).
  • the liquid crystal is interposed between the pixel electrode on the array substrate and the common electrode on the color filter substrate.
  • the common electrode on the color filter substrate is also coupled to VCOM.
  • the two plates sandwiching the liquid crystal ie, the pixel electrode on the array substrate and the common electrode on the color filter substrate
  • Clc liquid crystal capacitor
  • each of the gate lines is sequentially driven with a signal having, for example, a high level VGH, so that all of the driving TFTs on the strip line are turned on.
  • each of the data lines records the data signal voltage through the turned-on driving TFT to the liquid crystal capacitor Clc and the storage capacitor Cs.
  • the driving TFT is turned off, the recorded data signal voltage is held and the liquid crystal pixels are continuously driven until the next frame scan comes.
  • the driving elements of the pixels are not limited to the driving TFTs, but may be various other switching elements such as various other driving transistors.
  • the shutdown circuit includes an enable signal transmission line and a switch module.
  • the switch module is coupled to the enable signal transmission line, the common electrode of the liquid crystal panel, and the respective data lines.
  • the common electrode can be a coupling end on the array substrate that is coupled to the VCOM module.
  • the switch module is configured to be turned on when an enable signal (eg, a signal having a high level VGH) is received through the enable signal transmission line to short the respective data lines to the common electrode.
  • the switch module includes a plurality of switch sub-modules, each of which is coupled to a data line of the effective display area, and includes a pair of TFTs in which the source and drain are sequentially connected in series.
  • the gates of the TFTs are coupled to the enable signal transmission lines, the source or the drain of one of the pair of TFTs is coupled to the one of the data lines, and the other TFT is coupled to the common electrode.
  • the enable signal transmission line can be formed in the same patterning process using the same material as each gate line in the effective display area of the array substrate.
  • the layers of the switch module can be made of the same material in the same patterning process as the corresponding layers of the driving TFTs of the pixels in the effective display area of the array substrate. Formed to greatly simplify the manufacture of circuits for shutdown.
  • a non-enable signal for example, a signal having a low level VGL
  • no signal may be applied to the enable signal transmission line.
  • the switch module is turned off. Since the double TFT structure is adopted, leakage of the data line to the VCOM during operation of the liquid crystal panel can be effectively avoided.
  • an enable signal for example, a signal having a high level VGH
  • the holding capacitance Cs of each pixel coupled to the gate line can pass between the respective data lines and the common electrode
  • the shorting line is synchronously discharged to the ground via the ground path implemented by the peripheral driving device described below, thereby avoiding the phenomenon that the starting flashing occurs after a period of time due to the incomplete release of the charge after the shutdown. Therefore, only one gate line (ie, the enable signal transmission line) needs to be turned on when the power is turned off, and the scanning of each gate line of the effective display area can be performed to realize the discharge of the pixel, and since all the data lines are short-circuited with the common electrode. Therefore, a better discharge effect can be achieved.
  • the two plates of the liquid crystal capacitor Clc are the pixel electrode on the array substrate and the common electrode on the color filter substrate.
  • the pixel electrode is short-circuited to the coupling end of the VCOM module and the liquid crystal panel via a data line (which may correspond to the “common electrode” in the claims), and the common electrode on the color filter substrate is also coupled to the coupling end. Therefore, the two plates of the liquid crystal capacitor Clc can be discharged through the short circuit.
  • each of the switch sub-modules is not limited to being implemented by TFT, but can be implemented by various types of transistors existing. Since the switching function of the transistor is utilized, the switching module can also be implemented with other types of electronic switches (eg, diodes, nanoelectronic switches, etc.). Further, the number of transistors is not limited to two, but may be realized by one transistor or more than two series transistors.
  • the number of enabled signal transmission lines is not limited to one, but may be two or more.
  • the switch module may be divided into the same number of portions as the enable signal transmission line, and the plurality of portions are respectively coupled to the corresponding one of the enable signal transmission lines or to the plurality of enable signal transmission lines.
  • the shutdown circuit can also be disposed in the effective display area of the array substrate.
  • the shutdown circuit is not limited to being disposed on the array substrate, but may be disposed on a circuit board (for example, a flexible circuit board) coupled to the array substrate. Therefore, it is only necessary to perform a small number of modifications to the existing liquid crystal panel to realize the manufacture of the shutdown circuit.
  • FIG. 2B is a circuit diagram of a shutdown circuit in accordance with another embodiment of the present invention.
  • the arrangement of the effective display area is not shown in FIG. 2B.
  • the embodiment of FIG. 2B differs from the embodiment of FIG. 2A in that each of the switch sub-modules can be coupled to a plurality of data lines of the active display area, and the configurations of the two can be similar in other respects.
  • a single switch sub-module includes two transistors serially connected in series with a source and drain. The gate of each transistor is coupled to an enable signal transmission line, and the source and the drain of the two transistors are terminated.
  • the coupling point coupled to the common electrode is not limited to the source and the drain of the first and last ends, and may be one of the intermediate source and drain series contacts.
  • the single switch sub-module may include three or more transistors in which the source and drain are sequentially connected in series.
  • At least one of the source and the drain of the first and last ends of the three or more transistors and the source/drain series connection point are coupled to the common electrode, and two of the remaining coupling points are respectively two One of the data lines is coupled.
  • at least one pair of adjacent data lines can be coupled to each other.
  • a single switch sub-module can be coupled to three or more data lines, and details are not described herein again.
  • FIG. 2C is a circuit diagram of a shutdown circuit in accordance with still another embodiment of the present invention.
  • the embodiment of FIG. 2C differs from the embodiment of FIG. 2A in that the switch module includes only one switch sub-module and is coupled to each of the data lines of the active display area, and the configurations of the two may be similar in other respects.
  • the switch module includes: Ns transistors serially connected in series with the source and drain (Ns is the total number of data lines of the effective display area), and the gate of each transistor is coupled with the enable signal transmission line.
  • the source and the drain of the Ns and the ends of the transistor and the coupling point of the source/drain series are coupled to the common electrode, and the remaining Ns are coupled.
  • Each of the data lines is coupled to one of the data lines of the effective display area.
  • the coupling point coupled to the common electrode is not limited to the source and the drain of the first and last ends, and may be one of the intermediate source and drain series contacts.
  • the switch module may include Ns or more transistors in which the source and drain are sequentially connected in series.
  • At least one of the source and the drain of the Ns and more transistors and the source/drain series of the intermediate and the source/drain series are coupled to the common electrode, and the Ns of the remaining coupling points are respectively associated with the Ns data.
  • One of the lines is coupled.
  • at least one pair of adjacent data lines may be coupled to more than one transistor, or more than one coupling point may be coupled to the common electrode.
  • the source or drain of a single transistor is coupled to only one data line.
  • the invention is not limited thereto.
  • the source or drain of a single transistor can also be coupled to multiple data lines.
  • the switch module may include a transistor whose gate is coupled to the enable signal transmission line, and one of the remaining two electrodes and the data of the effective display area. The wires are coupled and the other electrode is coupled to the common electrode.
  • the source of each transistor or The drain can be coupled to a plurality of data lines, and details are not described herein again.
  • the peripheral driving device may include a reset signal generating module 310, a first control module 320, a second control module 330, a gate driving module 340, a common electrode driving module 350, and a data line driving module. (or source driver module) 360, and a third control module 370.
  • the reset signal generating module 310 may be configured to output a first reset signal when the driving voltage Vin of the liquid crystal panel is less than a set value.
  • the first reset signal is an enable signal or a trigger signal for causing the peripheral driving device to perform a corresponding operation during the closing of the liquid crystal panel.
  • the reset signal generating module 310 may output a second reset signal when the driving voltage Vin of the liquid crystal panel is greater than or equal to the set value. That is, the second reset signal is output during normal operation of the liquid crystal panel.
  • the first reset signal may be an inverted signal of a portion of the aforementioned XAO signal during the closing of the liquid crystal panel. Since the XAO signal is at a high level during normal operation of the liquid crystal panel and is at a low level (for example, a zero level) during the liquid crystal panel is turned off, the first reset signal is a signal having a high level during turning off the liquid crystal panel. Accordingly, during normal operation of the liquid crystal panel, the signal output terminal of the reset signal generating module 310 is at a zero level. As shown in FIG. 3, the reset signal generation module 310 is implemented using a simple comparator circuit.
  • the voltage applied to the inverting input of the comparator is Vin ⁇ R 1 /(R 1 +R 2 ), and the voltage applied to the non-inverting input is Vref.
  • Vin ⁇ R 1 /(R 1 +R 2 ) ⁇ Vref that is, Vin ⁇ Vref ⁇ (R 1 +R 2 )/R 1 (Vref ⁇ (R 1 +R 2 )/R 1 can be regarded as The set value)
  • the output voltage of the comparator is a positive voltage, thereby turning off the transistor 312 (for example, a P-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor)).
  • the signal output terminal of the reset signal generating module 310 is at a high level, and thus a first reset signal of a high level is output.
  • Vin>Vref ⁇ (R 1 +R 2 )/R 1 the output voltage of the comparator is a negative voltage, thereby turning on the transistor 312.
  • the signal output terminal of the reset signal generating module 310 is grounded, and thus is at a zero level.
  • the second reset signal may be a portion of the aforementioned XAO signal when the liquid crystal panel is normally operated (for example, a portion where the XAO signal has a high level).
  • This example can be realized by replacing the transistor 312 in the above first example from a P-channel MOSFET to an N-channel MOSFET. Similar to the first example described above, when Vin ⁇ Vref ⁇ (R 1 + R 2 ) / R 1 , the output voltage of the comparator is a positive voltage, thereby turning on the transistor 312 (for example, an N-channel MOSFET). At this time, the signal output terminal of the reset signal generating module 310 is grounded, and thus is at a zero level (corresponding to the first reset signal being zero level at this time).
  • the first reset signal may be a signal having a positive level
  • the second reset signal may be a signal having a negative level.
  • This example can be realized by changing the electrode to which the transistor 312 in the first example described above is grounded to a negative reference voltage. Similar to the first example described above, when Vin ⁇ Vref ⁇ (R 1 + R 2 ) / R 1 , the signal output terminal of the reset signal generating block 310 is at a positive level, thus outputting a first reset signal of a positive level. When Vin>Vref ⁇ (R 1 +R 2 )/R 1 , the output voltage of the comparator is a negative voltage, thereby turning on the transistor 312. At this time, the signal output terminal of the reset signal generating module 310 is connected to the negative reference voltage, thus outputting a second reset signal of a negative level.
  • the invention is not limited thereto.
  • the XAO signal is a known shutdown control signal.
  • reset signal generation module 310 can be implemented using techniques similar to any of the existing XAO generation modules (eg, the XAO generation portion of an existing power supply control module).
  • the first reset signal in the first example and the second reset signal in the second example may also be signals of a negative level.
  • the first reset signal may be a negative level signal and the second reset signal may be a positive level signal.
  • the first control module 320 can be configured to receive and output an enable signal in response to the first reset signal.
  • the enable signal can be used to drive the switch module of the shutdown circuit described above. That is, the enable signal is a signal (for example, a signal having a high level VGH) that enables a switch module coupled to the enable signal transmission line to be turned on.
  • the duration of the enable signal may be the time required to scan at least one frame of the gate line of the active display area of the liquid crystal panel. Since the switch module can remain off when no drive signal is received, the first control module 320 can be during the period when the first reset signal is not received (corresponding to the normal operation of the liquid crystal panel) or when the second reset signal is received. No signal is output during the period (ie, during normal operation of the LCD panel).
  • the first control module 320 may also be in the period of not receiving the first reset signal (corresponding to the liquid crystal panel During the normal operation) or during the reception of the second reset signal (ie, during normal operation of the liquid crystal panel), the non-enable signal is output.
  • the non-enable signal is a signal that enables a switch module coupled to the enable signal transmission line to be turned off (eg, a signal having a low level VGL).
  • the first control module 320 may include a MOSFET whose gate is coupled to the signal output terminal of the reset signal generating module 310, and one of the other two electrodes is coupled to the enable signal transmission line, and another One of the electrodes is coupled to a reference voltage having an enable level (eg, a high level VGH).
  • the MOSFET can be selected with reference to the following description for the first to fourth switching units. When the liquid crystal panel is operating normally, the MOSFET is turned off, and when the liquid crystal panel is turned off, the MOSFET is turned on, thereby outputting an enable signal to the enable signal transmission line.
  • the first control module 320 can be implemented with any of the existing techniques for implementing gate drive. It can be implemented as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or the like, or as a processor chip. As an example, the first control module 320 can be implemented by modifying an existing gate drive module.
  • the gate drive module 340 is used to drive the individual gate lines of the active display area of the liquid crystal panel and can be implemented with any existing gate drive technology (eg, a commercially available gate drive module).
  • the second control module 330 can be configured to receive and respond to the first reset signal, and drive the gate driving module 340 to scan the gate line for at least one frame.
  • the second control module 330 can drive the gate drive module 340 to sequentially scan all of the gate lines of the active display area.
  • the present invention is not limited in terms of the scanning order of the gate lines as long as all the gate lines of the effective display area are scanned.
  • the second control module 330 can include a MOSFET whose gate is coupled to the signal output terminal of the reset signal generating module 310, and one of the other two electrodes is coupled to the gate driving module 340.
  • the gate line scans the trigger end of the signal and the other electrode is coupled to a reference voltage having a trigger level.
  • the MOSFET is turned off, and when the liquid crystal panel is turned off, the MOSFET is turned on, thereby triggering the output of the gate line scan signal.
  • the second control module 330 can be implemented with any of the existing techniques for implementing gate drive. It can be implemented as an application specific integrated circuit (ASIC), field programmable gate array (FPGA), etc., or can be implemented as processing. Chip. As an example, the second control module 330 can be implemented by modifying an existing gate drive module.
  • ASIC application specific integrated circuit
  • FPGA field programmable gate array
  • each of the data lines of the effective display area can be shorted to the common electrode when the liquid crystal panel is turned off. Since each data line is shorted to the common electrode, each data line is also shorted.
  • the holding capacitance of each pixel coupled to the gate line can pass through each of the data lines and the common electrode.
  • the short circuit between them is synchronously discharged to the ground via a ground path realized by, for example, the third control module described below, thereby preventing the liquid crystal panel from blinking after a period of time due to the incomplete release of the charge after the shutdown.
  • the common electrode driving module (or VCOM module) 350 is a module for generating a voltage signal for use by the common electrode. It can be implemented using any existing (e.g., commercially available) VCOM module.
  • the data line driver module (or source driver module) 360 is used to drive various data lines (or source lines) of the effective display area of the liquid crystal panel, and can be used with any existing source driving technology (for example, commercially available Source drive module) implementation.
  • the third control module 370 can be configured to receive and respond to the first reset signal, disconnect the common electrode driving module 350 from the common electrode, disconnect the data line driving module 360 from the data line, and The data line and/or the common electrode are grounded.
  • the third control module 370 includes a first switching unit 372, a second switching unit 374, and a grounding unit.
  • the control pole of the first switch unit 372 is coupled to the reset signal generating module 310, and one end of the first switch unit 372 is coupled to the common electrode driving module 350, and the other end is coupled to the common electrode.
  • the first switching unit 372 is configured to disconnect the coupling of the common electrode driving module 350 and the common electrode in response to the first reset signal.
  • the first switching unit 372 may include a subtractor and a P-channel MOSFET.
  • the output of the subtractor outputs a first reset signal minus a positive reference voltage (the value of which is small) The result obtained at the positive level of the first reset signal).
  • the gate of the P-channel MOSFET is coupled to the output of the subtractor, and one of the other two electrodes is coupled to the coupling end 352 of the common electrode driving module 350 and the liquid crystal panel, and the other electrode is coupled to the common electrode.
  • the signal output of the drive module 350 is a positive level signal
  • the output signal of the subtractor is at a negative level
  • the P-channel MOSFET is turned on
  • the first reset signal is received (ie, the liquid crystal panel is turned off)
  • the P-channel MOSFET is turned off to prevent the common electrode driving module 350 from introducing additional charges during discharge of the liquid crystal panel.
  • the first switching unit 372 may include an N-channel MOSFET whose gate is coupled to the output end of the second reset signal, and the other two One of the electrodes is coupled to the coupling end 352 and the other electrode is coupled to the signal output end of the common electrode driving module 350.
  • the N-channel MOSFET when the second reset signal is received (ie, the liquid crystal panel is operating normally), the N-channel MOSFET is turned on, and when the second reset signal is not received (ie, the liquid crystal panel is turned off), the N-channel MOSFET is turned off.
  • the common electrode driving module 350 is prevented from introducing an extra charge during discharge of the liquid crystal panel.
  • the first switching unit 372 may include a P-channel MOSFET, The gate is coupled to the output end of the first/second reset signal, and one of the other two electrodes is coupled to the coupling end 352 and the other electrode is coupled to the signal output of the common electrode driving module 350. end.
  • the P-channel MOSFET is turned on
  • the first reset signal is received (ie, the liquid crystal panel is turned off)
  • the P-channel MOSFET is turned off.
  • the common electrode driving module 350 is prevented from introducing additional charges during discharge of the liquid crystal panel.
  • the control circuit of the second switch unit 374 is coupled to the reset signal generating module 310, and one end of the second switch unit 374 is coupled to the data line driving module 360, and the other end is coupled to the data line.
  • the second switching unit 374 is configured to disconnect the data line driving module 360 from the data line in response to the first reset signal.
  • the second switching unit 374 may include a subtractor and a P-channel MOSFET.
  • the output of the subtractor outputs a first reset signal minus a positive reference voltage whose value is less than a positive level of the first reset signal.
  • the gate of the P-channel MOSFET is coupled to the output of the subtractor, and one of the other two electrodes is coupled to the coupling end 362 of the data line driving module 360 and the liquid crystal panel, and the other electrode is coupled to the data line.
  • the output 364 of the drive signal is coupled to the data line.
  • the output signal of the subtractor is at a negative level
  • the P-channel MOSFET is turned on
  • the first reset signal is received (ie, the liquid crystal panel is turned off)
  • the P-channel MOSFET is turned off to prevent the data line driving module 360 from introducing additional charge during discharge of the liquid crystal panel.
  • the second switching unit 374 may include an N-channel MOSFET whose gate is coupled to the output end of the second reset signal, and the other two One of the electrodes is coupled to the coupling end 362 and the other electrode is coupled to the output terminal 364.
  • the N-channel MOSFET when the second reset signal is received (ie, the liquid crystal panel is operating normally), the N-channel MOSFET is turned on, and when the second reset signal is not received (ie, the liquid crystal panel is turned off), the N-channel MOSFET is turned off.
  • the data line driving module 360 is prevented from introducing an extra charge during discharge of the liquid crystal panel.
  • the second switching unit 374 may include a P-channel MOSFET, The gate is coupled to the output of the first/second reset signal, and one of the other two electrodes is coupled to the coupling end 362 and the other electrode is coupled to the output terminal 364.
  • the P-channel MOSFET is turned on
  • the first reset signal is received (ie, the liquid crystal panel is turned off)
  • the P-channel MOSFET is turned off.
  • the data line driver module 360 is prevented from introducing additional charge during discharge of the liquid crystal panel.
  • the ground unit is configured to ground the data line and/or the common electrode in response to the first reset signal.
  • the ground unit includes at least one of the third switching unit 376 and the fourth switching unit 378.
  • the third switching unit 376 may include an N-channel MOSFET whose gate and the output of the first reset signal The terminal is coupled, and one of the other two electrodes is coupled to the coupling end 352 of the common electrode driving module 350 and the liquid crystal panel, and the other electrode is coupled to the ground end (for example, a printed circuit provided with the common electrode driving module) The ground of the board (PCB)).
  • the first reset signal is not received (ie, the liquid crystal panel is operating normally)
  • the N-channel MOSFET is turned off
  • the first reset signal is received (ie, the liquid crystal panel is turned off)
  • the N-channel MOSFET is guided.
  • the coupling end 352 is grounded.
  • the third switching unit 376 may include a subtractor and a P-channel MOSFET.
  • the output of the subtractor outputs a second reset signal minus a positive reference voltage whose value is less than the positive level of the second reset signal.
  • the gate of the P-channel MOSFET is coupled to the output of the subtractor, and one of the other two electrodes is coupled to the coupling end 352 and the other electrode is coupled to the ground (eg, a common electrode is provided) Drive the PCB ground of the module).
  • the output signal of the subtractor upon receiving the second reset signal (ie, the liquid crystal panel is operating normally), the output signal of the subtractor is at a positive level, the P-channel MOSFET is turned off, and the second reset signal is not received (ie, the liquid crystal is turned off) In the panel), the output signal of the subtractor is at a negative level, and the P-channel MOSFET is turned on to ground the coupling end 352.
  • the third switching unit 376 may include an N-channel MOSFET, The gate is coupled to the output end of the first/second reset signal, and one of the other two electrodes is coupled to the coupling end 352 and the other electrode is coupled to the ground end (eg, having a common The ground terminal of the PCB of the electrode drive module).
  • the N-channel MOSFET when receiving the second reset signal (ie, the liquid crystal panel is operating normally), the N-channel MOSFET is turned off, and when the first reset signal is received (ie, the liquid crystal panel is turned off), the N-channel MOSFET is turned on. Thereby, the coupling end 352 is grounded.
  • the coupling end 352 of the common electrode driving module 350 is grounded, the common electrode coupled to the coupling end 352 is grounded, and each data line (ie, the source line) shorted to the common electrode is grounded. Also grounded, and the plates of the storage capacitors that are shorted to the data lines (ie, the pixel electrodes) are also grounded, so that the voltage on the common electrode, the voltage on the data line, and the voltage on the pixel electrode can be synchronized with the potential via The ground path is quickly discharged.
  • the fourth switching unit 378 may include an N-channel MOSFET whose gate The pole is coupled to the output end of the first reset signal, and one of the other two electrodes is coupled to the coupling end 362 of the data line driving module 360 and the liquid crystal panel, and the other electrode is coupled to the ground end (for example, The ground terminal of the PCB with the data line driver module).
  • the N-channel MOSFET when the first reset signal is not received (ie, the liquid crystal panel is operating normally), the N-channel MOSFET is turned off, and when the first reset signal is received (ie, the liquid crystal panel is turned off), the N-channel MOSFET is guided.
  • the coupling end 362 is thus grounded.
  • the fourth switching unit 378 may include a subtractor and a P-channel MOSFET.
  • the output of the subtractor outputs a second reset signal minus a positive reference voltage whose value is less than the positive level of the second reset signal.
  • the gate of the P-channel MOSFET is coupled to the output of the subtractor, one of the other two electrodes is coupled to the coupling end 362, and the other electrode is coupled to the ground (eg, a data line is provided) Drive the PCB ground of the module).
  • the output signal of the subtractor upon receiving the second reset signal (ie, the liquid crystal panel is operating normally), the output signal of the subtractor is at a positive level, the P-channel MOSFET is turned off, and the second reset signal is not received (ie, the liquid crystal is turned off) In the panel), the output signal of the subtractor is at a negative level, and the P-channel MOSFET is turned on to ground the coupling end 362.
  • the fourth switching unit 378 may include an N-channel MOSFET, The gate is coupled to the output end of the first/second reset signal, and one of the other two electrodes is coupled to the coupling end 362 and the other electrode is coupled to the ground end (eg, with data provided) The ground terminal of the PCB of the line driver module).
  • the N-channel MOSFET when receiving the second reset signal (ie, the liquid crystal panel is operating normally), the N-channel MOSFET is turned off, and when the first reset signal is received (ie, the liquid crystal panel is turned off), the N-channel MOSFET is turned on. From The coupling end 362 is grounded.
  • the coupling end 362 of the data line driving module 360 is grounded, the data lines (ie, the source lines) coupled to the coupling end 362 are grounded, and the plates of the storage capacitors that are shorted to the data lines ( That is, the pixel electrode is also grounded, and the common electrode shorted to each of the data lines is also grounded, so that the voltage on the common electrode, the voltage on the data line, and the voltage on the pixel electrode can be synchronized with the potential via the ground path. Discharge.
  • FIG. 3 shows only one signal output terminal 364 of the data line driving module 360 and a switching unit 374 and a switching unit 378 corresponding thereto as a schematic diagram.
  • the data line drive module actually includes a plurality of signal output terminals 364. Since each signal output terminal 364 corresponds to one switching unit 374 and one switching unit 378, the number of switching units 374 and switching units 378 is actually plural.
  • the switching unit 374 and the switching unit 378 can be included by modifying an existing data line driving module.
  • the first switching unit 372 and the second switching unit 374 can be switched with any of the existing similar responsiveness to the drive signal (eg, switching from zero to positive, from positive to zero, from negative to positive) Level, etc.) is turned off by the switching unit, and the third switching unit 376 and the fourth switching unit 378 can be switched to any positive state in response to the drive signal (eg, switching from zero to positive level) Switching from a positive level to zero, from a negative level to a positive level, etc.) is turned on by the switching unit.
  • the switching units 372, 374, 376, and 378 can be implemented with other types of electronic switches of the type (eg, other types of transistors, diodes, nanoelectronic switches, etc.).
  • VCOM input represents a signal input from a VCOM module (or common electrode driving module) 350 to a coupling end 352
  • a "data line driving module” indicates The signal at the coupling end 362 of the data line driver module 360 and the liquid crystal panel
  • VCOM represents the signal at the coupling end 352 of the VCOM module 350 and the liquid crystal panel.
  • the second reset signal is a portion of the XAO signal when the liquid crystal panel is normally operated (for example, the XAO signal is high) Part of the level).
  • the peripheral driving device includes only the fourth switching unit 378 and does not include the third switching unit 376.
  • the enable signal applied to the enable signal transmission line is a signal having a high level VGH.
  • the panel driving voltage VIN is maintained at a high level. Accordingly, the XAO signal also remains at a high level.
  • the enable signal transmission line is kept at a low level VGL (for example, -8V), so that the switch module of the shutdown circuit is kept turned off. Since the first switching unit 372 is turned on, the VCOM input remains at a high level. Accordingly, the signal at the coupling end of the VCOM module and the liquid crystal panel is maintained at a high level, and the rectangle representing the signal in FIG. 4 means that the signal is a signal that changes with time.
  • the signal at the coupling end of the data line driving module and the liquid crystal panel is also maintained at a high level.
  • a rectangle representing the signal means that the signal is a signal that changes over time.
  • the panel driving voltage VIN drops.
  • VIN is less than the set value at time t 0
  • the XAO signal is pulled from a high level to a low level (eg, a zero level).
  • the signal voltage on the enable signal transmission line is pulled up from the low level VGL during operation to the high level VGH, so that the switch module coupled thereto is turned on, thereby shorting each data line to the common electrode and The data lines are shorted.
  • the VCOM input becomes a low level.
  • the third control module 370 disconnects the data line driving module 360 from the data line in response to the XAO signal becoming a low level, and grounds the data line to discharge the liquid crystal panel, so the data line
  • the signal at the coupling end of the driving module and the liquid crystal panel gradually decreases to a low level from the time t 0
  • the signal at the coupling end of the VCOM module and the liquid crystal panel also gradually decreases to a low level from the time t 0 .
  • the second control module scans the gate line of the effective display area by at least one frame, and the voltage on the common electrode, the voltage on the data line, and the voltage on the pixel electrode pass through the data line to the ground ( GND) Synchronous discharge to achieve complete discharge of the panel.
  • GND ground
  • the panel driving voltage VIN gradually rises. high.
  • VIN is higher than the set value
  • the XAO signal goes high, and the signal on the enable signal transmission line is pulled from 0 volts at shutdown to the low level VGL at the time of operation.
  • the VCOM input goes high and the signal at the coupling end of the VCOM module and the liquid crystal panel changes from a low level to a high level.
  • the signal at the coupling end of the data line driving module and the liquid crystal panel also becomes a high level.
  • a liquid crystal panel including a shutdown circuit and a peripheral driving device can effectively reduce switching flicker drift, This will not be repeated here.

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Abstract

提供了一种关机用电路、外围驱动装置和液晶面板。关机用电路中的开关模块与使能信号传输线、液晶面板的公共电极及各条数据线耦接，用于接收到使能信号时导通，以将各条数据线与公共电极短接。外围驱动装置包括复位信号产生模块（310）、第一、第二和第三控制模块（320，330，370）、数据线驱动模块（360）、公共电极驱动模块（350）以及栅极驱动模块（340）；复位信号产生模块（310）在液晶面板的驱动电压（Vin）小于设定值时输出第一复位信号；第一控制模块（320）响应第一复位信号，输出使能信号；第二控制模块（330）响应第一复位信号，驱动栅极驱动模块（340）扫描栅极线至少一帧；第三控制模块（370）响应第一复位信号，断开公共电极驱动模块（350）与公共电极的耦接，断开数据线驱动模块（360）与数据线的耦接，并将数据线和/或公共电极接地。从而能够有效降低液晶面板的开关机闪烁漂移。

Description

关机用电路、外围驱动装置和液晶面板
本申请要求于2016年3月11日递交的中国专利申请第201610137977.7号的优先权，在此全文引用上述中国专利申请公开的内容以作为本申请的一部分。
技术领域
本发明的实施例涉及一种关机用电路和一种外围驱动装置、以及包括该关机用电路和外围驱动装置的液晶面板。
背景技术
液晶显示面板通常包括两个基板、夹设在这两个基板之间的液晶、背光模块和外围驱动模块。由于具有体积小、能耗低等优点，液晶显示面板已经成为目前应用最广泛的显示面板之一。在手机、平板电脑、笔记本电脑、台式电脑、电视机等产品中，液晶显示面板都占据着非常大的市场份额。因此，存在着不断提高液晶显示面板的性能的需求。
发明内容
本发明的实施例的目的之一是有效降低液晶面板的开关机闪烁漂移，从而提高液晶面板的性能。
具体地，根据本发明的第一方面，提供了一种关机用电路，用于液晶面板，包括：使能信号传输线以及开关模块；所述开关模块与所述使能信号传输线、所述液晶面板的公共电极及各条数据线耦接，用于通过所述使能信号传输线接收到使能信号时导通，以将各条所述数据线与公共电极短接。
根据上述配置，在向所述关机用电路施加关机用的使能信号时，可以将各条数据线与公共电极短接。由于各条数据线都与公共电极短接，所以各条数据线之间也被短接。这样，各条数据线与公共电极之间的短接线路 可以构成液晶面板的各像素的保持电容的放电路径的一部分，从而为放电路径的形成提供一部分硬件基础。
进一步，根据本发明的第二方面，所述开关模块包括至少一个开关子模块；每个所述开关子模块包括一个晶体管，其栅极与所述使能信号传输线耦接，其余两个电极中的一个电极与一条或多条数据线耦接，另一个电极与所述公共电极耦接；或者，每个所述开关子模块包括源漏依次串联的多个晶体管，每个晶体管的栅极与所述使能信号传输线耦接，所述串联的多个晶体管中首尾两端的两个晶体管之一的源极或漏极与所述公共电极耦接，另一个晶体管的漏极或源极与一条或多条数据线耦接。
根据上述配置，开关模块可以包括一个或多个开关子模块，从而灵活地实现开关模块的制造。
进一步，根据本发明的第三方面，所述晶体管是薄膜晶体管(TFT)。
根据上述配置，开关模块可以灵活地采用各种现有的成膜工艺来制造。
进一步，根据本发明的第四方面，所述关机用电路设置在所述液晶面板的阵列基板上。
进一步，根据本发明的第五方面，所述关机用电路设置于所述液晶面板的有效显示区之外。
根据上述配置，当液晶面板是TFT液晶面板且开关模块采用TFT实现时，开关模块的各层可以与阵列基板的有效显示区中的各像素的驱动TFT的各对应层采用相同的材料在同一构图工艺中形成，从而极大简化开关模块的制造。
进一步，根据本发明的第六方面，所述关机用电路设置在与所述液晶面板的阵列基板耦接的电路板上。
根据上述配置，只需对现有的液晶面板进行少量改造就能实现关机用电路的制造。
根据本发明的第七方面，还提供了一种外围驱动装置，包括：复位信号产生模块、第一控制模块、第二控制模块、第三控制模块、数据线驱动 模块、公共电极驱动模块以及栅极驱动模块；复位信号产生模块用于在液晶面板的驱动电压小于设定值时输出第一复位信号；第一控制模块用于接收并响应所述第一复位信号，输出使能信号；第二控制模块用于接收并响应所述第一复位信号，驱动所述栅极驱动模块扫描栅极线至少一帧；第三控制模块用于接收并响应所述第一复位信号，断开所述公共电极驱动模块与公共电极的耦接，断开所述数据线驱动模块与数据线的耦接，并将所述数据线和/或所述公共电极接地。
根据上述配置，由于断开公共电极驱动模块与公共电极的耦接、且断开数据线驱动模块与数据线的耦接，所以能够避免公共电极驱动模块和数据线驱动模块在液晶面板放电期间引入额外的电荷。而且，由于将数据线和/或公共电极接地，所以能够为放电路径提供向地释放电荷的接地路径，从而为放电路径的形成提供一部分硬件基础。另外，还能够为上述关机用电路和栅极线提供相应的关机用的驱动信号。所述使能信号具有以下作用：通过向使能信号传输线施加所述使能信号，在关闭液晶面板时，可以将各条数据线与公共电极短接。由于各条数据线都与公共电极短接，所以各条数据线之间也被短接。对栅极线进行扫描的信号具有以下作用：通过利用该扫描信号对每条栅极线进行扫描，与该条栅极线耦接的各像素的保持电容可以通过各条数据线与公共电极之间的短接线路向地同步放电，从而避免液晶面板因关机后电荷未完全释放而发生一段时间后开机闪烁的现象。
具体地，对于将数据线接地的情况，由于将各条数据线接地，所以与各条数据线短接的公共电极被接地，像素电极(即各像素的保持电容的与各条数据线耦接的一个极板)也被接地，从而使公共电极上的电压、数据线上的电压和像素电极上的电压能够同电位同步快速放电。
对于将公共电极接地的情况，由于将公共电极接地，所以与公共电极短接的各条数据线被接地，像素电极(即各像素的保持电容的与各条数据线耦接的一个极板)也被接地，从而使公共电极上的电压、数据线上的电压和像素电极上的电压能够同电位同步快速放电。
进一步，根据本发明的第八方面，所述第三控制模块包括第一开关单元和第二开关单元；所述第一开关单元的控制极耦接所述复位信号产生模块，且所述第一开关单元一端耦接所述公共电极驱动模块，另一端耦接所述公共电极；所述第一开关单元用于响应所述第一复位信号，断开所述公共电极驱动模块与所述公共电极的耦接；所述第二开关单元的控制极耦接所述复位信号产生模块，且所述第二开关单元一端耦接所述数据线驱动模块，另一端耦接所述数据线；所述第二开关单元用于响应所述第一复位信号，断开所述数据线驱动模块与所述数据线的耦接。
进一步，根据本发明的第九方面，所述第三控制模块包括接地单元；所述接地单元用于响应所述第一复位信号，将所述数据线和/或所述公共电极接地。
进一步，根据本发明的第十方面，所述复位信号产生模块用于在液晶面板的驱动电压大于或等于所述设定值时输出第二复位信号。
进一步，根据本发明的第十一方面，所述第一开关单元用于响应所述第二复位信号，将所述公共电极驱动模块与所述公共电极导通；所述第二开关单元用于响应所述第二复位信号，将所述数据线驱动模块与所述数据线导通。
进一步，根据本发明的第十二方面，所述所述接地单元用于响应所述第二复位信号，将所述数据线和/或所述公共电极与地断开。
根据本发明的第十三方面，还提供了一种液晶面板，包括设置于有效显示区的栅极线、数据线、公共电极、如上述第一至第六方面中任一方面所述的关机用电路、以及如上述第七至第十二方面中任一方面所述的外围驱动装置；所述第一控制模块与所述使能信号传输线耦接。
根据上述配置，在关闭液晶面板时，通过断开公共电极驱动模块与公共电极的耦接、且断开数据线驱动模块与数据线的耦接，能够避免公共电极驱动模块和数据线驱动模块在液晶面板放电期间引入额外的电荷。而且，通过将数据线和/或公共电极接地，能够为放电路径提供向地释放电荷的接地路径。另外，通过向使能信号传输线施加所述使能信号，在关闭液 晶面板时，可以将各条数据线与公共电极短接。由于各条数据线都与公共电极短接，所以各条数据线之间也被短接。这样，在利用外围驱动装置对每条栅极线进行扫描时，与该条栅极线耦接的各像素的保持电容可以通过各条数据线与公共电极之间的短接线路向地同步放电，从而避免液晶面板因关机后电荷未完全释放而发生一段时间后开机闪烁的现象。
附图说明
为了更清楚地说明本发明的实施例的技术方案，下面将对实施例的附图作简单地介绍。明显地，以下附图中的结构示意图不一定按比例绘制，而是以简化形式呈现各特征。而且，下面描述中的附图仅仅涉及本发明的一些实施例，而并非对本发明进行限制。
图1是示出根据本发明的一个实施例的关机用电路的位置的示意图；
图2A至2C是根据本发明的不同实施例的关机用电路的电路示意图；
图3是根据本发明的一个实施例的外围驱动装置的电路示意图；以及
图4是说明根据本发明的一个实施例的关机时序的示意图。
具体实施方式
为使本发明实施例的目的、技术方案和优点更加清楚，下面将结合本发明实施例的附图，对本发明实施例的技术方案进行清楚、完整地描述。显然，所描述的实施例仅是本发明的一部分实施例，而不是全部的实施例。基于所描述的本发明的实施例，本领域普通技术人员在无需创造性劳动的前提下所获得的所有其他实施例，都属于本发明保护的范围。
在本文中，术语“耦接”包括元件之间的直接连接和间接连接。词语“多个”是指两个或更多个。
现有的液晶面板易发生关机一段时间后开机闪烁的现象。该现象主要是由于液晶面板关机时无法完全放电，使得电荷残留在面板内而引起的。为了消除该现象，已经提出了一种XAO(Output ALL-ON Control， 即XDON或XON)技术。XAO信号是一种用于栅极驱动模块的控制信号。当液晶面板正常工作时，XAO信号保持为高电平。当关闭液晶面板从而液晶面板的驱动电压低于设定值时，XAO信号从高电平变为低电平。这可以使栅极驱动模块将液晶面板的所有栅极线(即扫描线)上的信号都强制性地变为高电平VGH，从而使所有用于驱动像素的驱动晶体管导通、并对各像素中积累的电荷进行释放。然而，由于所有驱动晶体管均同时导通，所以会产生较大的冲击电流，从而易于损伤面板。
本发明的实施例提供了一种关机用电路和一种外围驱动装置、以及包括该关机用电路和外围驱动装置的液晶面板。根据本发明的实施例，能够保证关机后液晶面板的各像素的像素电极上的电压完全释放，从而有效降低开关机闪烁漂移。在下文中，将以相应的实施例对本发明的关机用电路、外围驱动装置和液晶面板进行具体说明。
I.关机用电路
图1是示出根据本发明的一个实施例的关机用电路的位置的示意图。如稍后参照图2A至2C所述，根据本发明实施例的关机用电路包括使能信号传输线和开关模块。因此，应注意的是，在图1中为了简洁起见仅示出了使能信号传输线，而未示出开关模块。在图1所示的示例中，关机用电路设置在液晶面板的有效显示区(AA区)外。有效显示区是指液晶面板的能够显示图像的区域，并且通常包括多个液晶像素。此外，尽管图1的液晶面板以电视机产品的形式示出，但是本发明并不限于此。根据本发明实施例的液晶面板也可以应用于手机、平板电脑、笔记本电脑、台式电脑等其他产品。
图2A至2C是根据本发明的不同实施例的关机用电路的电路示意图。如图2A所示，液晶面板的有效显示区包括多条栅极线(即扫描线，图中为了简洁仅示出一条栅极线)和多条数据线(即源极线)。在多条栅极线和多条数据线所限定的多个矩形区域中的每一个中，设置有液晶像素。每个液晶像素包括液晶、驱动TFT(薄膜晶体管)和保持电容Cs。栅极线、数据线、驱动TFT和保持电容设置在液晶面板的阵列基板上，而液 晶夹设在液晶面板的阵列基板和彩膜基板之间(具体地，在阵列基板上的像素电极和彩膜基板上的公共电极之间)。
在图2A所示的示例中，保持电容Cs采用Cs on common(存储电容在公共极)架构。即，保持电容Cs的与驱动TFT耦接的一个极板为像素电极，而另一个极板为公共电极走线。这样，每条栅极线对应于一条公共电极走线。所有公共电极走线均耦接至VCOM(即，液晶面板的外围驱动装置中的用于产生供公共电极使用的电压信号的模块)。在实践中，所有公共电极走线通常耦接至阵列基板与VCOM模块耦接的耦接端(其可以对应于权利要求中所述的“公共电极”)。如前所述，液晶夹设在阵列基板上的像素电极和彩膜基板上的公共电极之间。该彩膜基板上的公共电极也耦接至VCOM。应注意的是，夹设着液晶的两个极板(即阵列基板上的像素电极和彩膜基板上的公共电极)也可视为相当于一个电容Clc(即液晶电容)，其与存储电容Cs并联，图2A中为了简洁并未将其示出。
在液晶面板正常工作时，以具有例如高电平VGH的信号顺次驱动每条栅极线，使该条栅极线上的所有驱动TFT导通。与栅极线扫描同步，各条数据线将数据信号电压通过导通的驱动TFT记录到液晶电容Clc和存储电容Cs上。当该条栅极线的扫描结束时，驱动TFT被关断，所记录的数据信号电压被保持并持续驱动液晶像素，直到下一帧扫描到来之前。应注意的是，尽管图2A所示的液晶面板是一种TFT液晶面板，但是本领域技术人员能够理解的是，本发明的原理可以适用于任何采用主动驱动方式的液晶面板(即，各液晶像素的驱动元件不限于驱动TFT，也可以是各种其他开关元件诸如各种其他驱动晶体管)。
如图2A至2C所示，根据本发明的一个实施例的关机用电路包括使能信号传输线和开关模块。开关模块与使能信号传输线、液晶面板的公共电极及各条数据线耦接。如前所述，该公共电极可以是阵列基板上的与VCOM模块耦接的耦接端。所述开关模块用于在通过使能信号传输线接收到使能信号(例如具有高电平VGH的信号)时导通，以将各条数据线与公共电极短接。
作为一个示例，如图2A所示，所述开关模块包括多个开关子模块，每个开关子模块与有效显示区的一条数据线耦接、且包括源漏依次串接的一对TFT，每个TFT的栅极与使能信号传输线耦接，该对TFT中的一个TFT的源极或漏极与所述一条数据线耦接，另一个TFT与所述公共电极耦接。在该示例中，使能信号传输线可以与阵列基板的有效显示区中的各栅极线采用相同的材料在同一构图工艺中形成。此外，由于开关模块和各像素的驱动晶体管均采用TFT实现，所以开关模块的各层可以与阵列基板的有效显示区中的各像素的驱动TFT的各对应层采用相同的材料在同一构图工艺中形成，从而极大简化关机用电路的制造。
这样，在液晶面板正常工作时，可以向使能信号传输线施加非使能信号(例如具有低电平VGL的信号)，或者也可以不向使能信号传输线施加任何信号。在这两种情况中的任何一种情况下，开关模块均被关断。由于采用双TFT结构，所以可以有效地避免液晶面板在工作时数据线向VCOM的漏电。在关闭液晶面板时，通过向使能信号传输线施加使能信号(例如具有高电平VGH的信号)，可以将有效显示区的每条数据线与公共电极短接。由于各条数据线都与公共电极短接，所以各条数据线之间也被短接。这样，在利用下面描述的外围驱动装置对有效显示区的每条栅极线进行扫描时，与该条栅极线耦接的各像素的保持电容Cs可以通过各条数据线与公共电极之间的短接线路经由下面描述的外围驱动装置实现的接地路径向地同步放电，从而避免因关机后电荷未完全释放而发生一段时间后开机闪烁的现象。由此，关机时仅需开启一条栅极线(即，使能信号传输线)并配合有效显示区的各栅极线的扫描即可实现像素的放电，而且由于全部数据线均与公共电极短接，所以可实现更好的放电效果。此外，如前所述，液晶电容Clc的两个极板为阵列基板上的像素电极和彩膜基板上的公共电极。通常，像素电极经由数据线短接至VCOM模块与液晶面板的耦接端(其可以对应于权利要求中的“公共电极”)并且彩膜基板上的公共电极也耦接至该耦接端，因此液晶电容Clc的两个极板可以通过该短接线路进行放电。
然而，本发明并不限于图2A所示的示例。首先，每个开关子模块并不限于用TFT实现，而是可以用现有的各种类型的晶体管来实现。由于利用的是晶体管的开关功能，所以开关模块也可以用现有的其他类型的电子开关(例如，二极管、纳米电子开关等)来实现。此外，晶体管的数量也不限于两个，而是可以由一个晶体管或多于两个的串联晶体管来实现。
此外，使能信号传输线的数量并不限于一条，而可以是两条或多于两条。此时，开关模块可以划分成与使能信号传输线相同数量的多个部分，且这多个部分分别与相应的一条使能信号传输线或者与多条使能信号传输线耦接。
此外，关机用电路也可以设置在阵列基板的有效显示区内。而且，关机用电路并不限于设置在阵列基板上，而是也可以设置在与阵列基板耦接的电路板(例如，柔性电路板)上。由此，只需对现有的液晶面板进行少量改造就能实现关机用电路的制造。
图2B是根据本发明的另一实施例的关机用电路的电路示意图。为了简洁起见，在图2B中并未示出有效显示区的布置。图2B的实施例与图2A的实施例的区别在于每个开关子模块可以与有效显示区的多条数据线耦接，而二者在其他方面的配置可以相似。如图2B所示，单个开关子模块包括：源漏依次串接的两个晶体管，每个晶体管的栅极与使能信号传输线耦接，所述两个晶体管的首尾两端的源极和漏极以及中间的一个源漏串接点中的一个耦接点(即最右侧的源极或漏极)与公共电极耦接，且其余的两个耦接点(即中间的一个源漏串接点和最左侧的漏极或源极)分别与两条数据线之一耦接。可选地，与公共电极耦接的耦接点不限于首尾两端的源极和漏极，也可以是中间的源漏串接点之一。可选地，该单个开关子模块可以包括源漏依次串接的三个或更多晶体管。这样，所述三个或更多晶体管的首尾两端的源极和漏极以及中间的源漏串接点中的至少一个耦接点与公共电极耦接，且其余耦接点中的两个分别与两条数据线之一耦接。在这种情况下，至少一对相邻的数据线之间可以耦接多 于一个晶体管，或者可以有多于一个耦接点与公共电极耦接。与上述同理，单个开关子模块可以与三条或更多条数据线耦接，在此不再赘述。
图2C是根据本发明的又一实施例的关机用电路的电路示意图。图2C的实施例与图2A的实施例的区别在于开关模块仅包括一个开关子模块且与有效显示区的各条数据线均耦接，而二者在其他方面的配置可以相似。如图2C所示，该开关模块包括：源漏依次串接的Ns个晶体管(Ns为有效显示区的各条数据线的总数)，每个晶体管的栅极与使能信号传输线耦接，所述Ns个晶体管的首尾两端的源极和漏极以及中间的源漏串接点中的一个耦接点(即最右侧的源极或漏极)与公共电极耦接，且其余的Ns个耦接点分别与有效显示区的各条数据线之一耦接。可选地，与公共电极耦接的耦接点不限于首尾两端的源极和漏极，也可以是中间的源漏串接点之一。可选地，该开关模块可以包括源漏依次串接的Ns个以上的晶体管。这样，所述Ns个以上的晶体管的首尾两端的源极和漏极以及中间的源漏串接点中的至少一个耦接点与公共电极耦接，且其余耦接点中的Ns个分别与Ns条数据线之一耦接。在这种情况下，至少一对相邻的数据线之间可以耦接多于一个晶体管，或者可以有多于一个耦接点与公共电极耦接。
在图2A至2C所示的上述实施例中，单个晶体管的源极或漏极仅与一条数据线耦接。然而，本发明并不限于此。单个晶体管的源极或漏极也可以与多条数据线耦接。例如，在开关模块仅包括一个开关子模块的情况下，该开关模块可以包括一个晶体管，其栅极与使能信号传输线耦接，其余两个电极中的一个电极与有效显示区的各条数据线耦接，另一个电极与公共电极耦接。对于其他情况(例如，所述一个开关子模块包括多个晶体管的情况，开关模块包括多个开关子模块且每个开关子模块包括一个或多个晶体管的情况)，每个晶体管的源极或漏极可以与多条数据线耦接，在此不再赘述。
II.外围驱动装置
图3是根据本发明的一个实施例的外围驱动装置的电路示意图。该外 围驱动装置用于与上面描述的关机用电路配合使用。如图所示，根据本发明实施例的外围驱动装置可以包括复位信号产生模块310、第一控制模块320、第二控制模块330、栅极驱动模块340、公共电极驱动模块350、数据线驱动模块(或源极驱动模块)360、以及第三控制模块370。
复位信号产生模块310可以配置成在液晶面板的驱动电压Vin小于设定值时输出第一复位信号。第一复位信号是用于在关闭液晶面板期间使外围驱动装置执行相应操作的使能信号或触发信号。可选地，复位信号产生模块310可以在液晶面板的驱动电压Vin大于或等于所述设定值时输出第二复位信号。也就是说，第二复位信号在液晶面板正常工作期间被输出。
作为第一示例，第一复位信号可以是前面提到的XAO信号在关闭液晶面板期间的部分的反相信号。由于XAO信号在液晶面板正常工作期间为高电平、且在关闭液晶面板期间为低电平(例如，零电平)，所以第一复位信号是关闭液晶面板期间的具有高电平的信号。相应地，在液晶面板正常工作期间，复位信号产生模块310的信号输出端为零电平。如图3所示，复位信号产生模块310采用简单的比较器电路实现。在比较器的反相输入端施加的电压为Vin·R1/(R1+R2)，且在同相输入端施加的电压为Vref。当Vin·R1/(R1+R2)<Vref即Vin<Vref·(R1+R2)/R1时(Vref·(R1+R2)/R1可以视为是所述设定值)，比较器的输出电压为正电压，从而使晶体管312(例如P沟道MOSFET(金属氧化物半导体场效应晶体管))关断。此时，复位信号产生模块310的信号输出端为高电平，因此输出高电平的第一复位信号。当Vin>Vref·(R1+R2)/R1时，比较器的输出电压为负电压，从而使晶体管312导通。此时，复位信号产生模块310的信号输出端接地，因此为零电平。
作为第二示例，第二复位信号可以是前面提到的XAO信号在液晶面板正常工作时的部分(例如，XAO信号在具有高电平时的部分)。该示例可以通过将上述第一示例中的晶体管312从P沟道MOSFET替换为N沟道MOSFET而实现。类似于上述第一示例，当Vin<Vref·(R1+R2)/R1时， 比较器的输出电压为正电压，从而使晶体管312(例如N沟道MOSFET)导通。此时，复位信号产生模块310的信号输出端接地，因此为零电平(相当于此时第一复位信号为零电平)。当Vin>Vref·(R1+R2)/R1时，比较器的输出电压为负电压，从而使晶体管312关断。此时，复位信号产生模块310的信号输出端为高电平，因此输出高电平的第二复位信号。
作为第三示例，第一复位信号可以是具有正电平的信号，且第二复位信号可以是具有负电平的信号。该示例可以通过将上述第一示例中的晶体管312接地的电极改为接一负参考电压而实现。类似于上述第一示例，当Vin<Vref·(R1+R2)/R1时，复位信号产生模块310的信号输出端为正电平，因此输出正电平的第一复位信号。当Vin>Vref·(R1+R2)/R1时，比较器的输出电压为负电压，从而使晶体管312导通。此时，复位信号产生模块310的信号输出端与负参考电压相接，因此输出负电平的第二复位信号。
然而，本发明并不限于此。如前所述，XAO信号是一种已知的关机控制信号。因此，复位信号产生模块310可以采用与任何现有的XAO产生模块(例如，现有的电源控制模块的XAO产生部分)类似的技术来实现。此外，第一示例中的第一复位信号和第二示例中的第二复位信号也可以是负电平的信号。在第三示例中，第一复位信号可以是负电平的信号，而第二复位信号可以是正电平的信号。
第一控制模块320可以配置成接收并响应所述第一复位信号，输出使能信号。该使能信号可以用于驱动上述关机用电路的开关模块。即，该使能信号是使与使能信号传输线耦接的开关模块能够导通的信号(例如，具有高电平VGH的信号)。该使能信号的持续时间可以是对液晶面板的有效显示区的栅极线扫描至少一帧所需的时间。由于所述开关模块可以在未接收任何驱动信号时保持关断，所以第一控制模块320可以在未接收到第一复位信号期间(对应于液晶面板正常工作期间)或者在接收到第二复位信号期间(即液晶面板正常工作期间)不输出任何信号。可选地，第一控制模块320也可以在未接收到第一复位信号期间(对应于液晶面板正 常工作期间)或者在接收到第二复位信号期间(即液晶面板正常工作期间)输出非使能信号。该非使能信号是使与使能信号传输线耦接的开关模块能够关断的信号(例如，具有低电平VGL的信号)。
作为最简单的示例，第一控制模块320可以包括一个MOSFET，其栅极与复位信号产生模块310的信号输出端耦接，另外两个电极中的一个电极耦接至使能信号传输线、且另一个电极耦接至具有使能电平(例如高电平VGH)的参考电压。该MOSFET可以参考后面针对第一至第四开关单元的描述进行选择。当液晶面板正常工作时，该MOSFET关断，而当关闭液晶面板时，该MOSFET导通，从而将使能信号输出至使能信号传输线。然而，本发明并不限于此。第一控制模块320可以用任何现有的用于实现栅极驱动的技术来实现。其可以实现为专用集成电路(ASIC)、现场可编程门阵列(FPGA)等，也可以实现为处理器芯片。作为一个示例，第一控制模块320可以通过对现有的栅极驱动模块进行改造而实现。
栅极驱动模块340用于驱动液晶面板的有效显示区的各条栅极线，并且可以用任何现有的栅极驱动技术(例如，市售的栅极驱动模块)实现。
第二控制模块330可以配置成接收并响应所述第一复位信号，驱动栅极驱动模块340扫描栅极线至少一帧。作为最简单的示例，第二控制模块330可以驱动栅极驱动模块340对有效显示区的所有栅极线顺次地扫描一次。然而，本发明在栅极线的扫描顺序方面不受限制，只要有效显示区的所有栅极线均被扫描即可。
与第一控制模块320类似，第二控制模块330可以包括一个MOSFET，其栅极与复位信号产生模块310的信号输出端耦接，另外两个电极中的一个电极耦接至栅极驱动模块340的栅极线扫描信号的触发端，且另一个电极耦接至具有触发电平的参考电压。当液晶面板正常工作时，该MOSFET关断，而当关闭液晶面板时，该MOSFET导通，从而触发栅极线扫描信号的输出。然而，本发明并不限于此。第二控制模块330可以用任何现有的用于实现栅极驱动的技术来实现。其可以实现为专用集成电路(ASIC)、现场可编程门阵列(FPGA)等，也可以实现为处理 器芯片。作为一个示例，第二控制模块330可以通过对现有的栅极驱动模块进行改造而实现。
这样，通过向使能信号传输线施加所述使能信号，在关闭液晶面板时，可以将有效显示区的各条数据线与公共电极短接。由于各条数据线都与公共电极短接，所以各条数据线之间也被短接。这样，在利用第二控制模块和栅极驱动模块对有效显示区的每条栅极线进行扫描时，与该条栅极线耦接的各像素的保持电容可以通过各条数据线与公共电极之间的短接线路，经由例如下面描述的第三控制模块实现的接地路径向地同步放电，从而避免液晶面板因关机后电荷未完全释放而发生一段时间后开机闪烁的现象。
公共电极驱动模块(或者VCOM模块)350是用于产生供公共电极使用的电压信号的模块。其可以采用任何现有的(例如，市售的)VCOM模块实现。
数据线驱动模块(或源极驱动模块)360用于驱动液晶面板的有效显示区的各条数据线(或源极线)，并且可以用任何现有的源极驱动技术(例如，市售的源极驱动模块)实现。
第三控制模块370可以配置成接收并响应所述第一复位信号，断开公共电极驱动模块350与公共电极的耦接，断开数据线驱动模块360与数据线的耦接，并将所述数据线和/或所述公共电极接地。作为一个示例，如图3所示，第三控制模块370包括第一开关单元372、第二开关单元374、以及接地单元。
第一开关单元372的控制极耦接复位信号产生模块310，且第一开关单元372的一端耦接公共电极驱动模块350，另一端耦接公共电极。第一开关单元372配置成响应所述第一复位信号，断开公共电极驱动模块350与所述公共电极的耦接。
在上述第一示例(第一复位信号为正电平的信号)的情况下，作为最简单的示例，第一开关单元372可以包括一个减法器和一个P沟道MOSFET。减法器的输出端输出第一复位信号减去一正参考电压(其值小 于第一复位信号的正电平)所得的结果。P沟道MOSFET的栅极与减法器的输出端耦接，另外两个电极中的一个电极耦接至公共电极驱动模块350与液晶面板的耦接端352，且另一个电极耦接至公共电极驱动模块350的信号输出端。这样，在未接收到第一复位信号(即，液晶面板正常工作)时，减法器的输出信号为负电平，P沟道MOSFET导通，而在接收到第一复位信号(即，关闭液晶面板)时，减法器的输出信号为正电平，P沟道MOSFET被关断从而避免公共电极驱动模块350在液晶面板放电期间引入额外的电荷。
在上述第二示例(第二复位信号为正电平的信号)的情况下，第一开关单元372可以包括一个N沟道MOSFET，其栅极与第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端352、且另一个电极耦接至公共电极驱动模块350的信号输出端。这样，在接收到第二复位信号(即，液晶面板正常工作)时，N沟道MOSFET导通，而在未接收到第二复位信号(即关闭液晶面板)时，N沟道MOSFET被关断从而避免公共电极驱动模块350在液晶面板放电期间引入额外的电荷。
在上述第三示例(第一复位信号为正电平的信号且第二复位信号为负电平的信号)的情况下，作为最简单的示例，第一开关单元372可以包括一个P沟道MOSFET，其栅极与第一/第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端352、且另一个电极耦接至公共电极驱动模块350的信号输出端。这样，在接收到第二复位信号(即，液晶面板正常工作)时，P沟道MOSFET导通，而在接收到第一复位信号(即关闭液晶面板)时，P沟道MOSFET被关断从而避免公共电极驱动模块350在液晶面板放电期间引入额外的电荷。
第二开关单元374的控制极耦接复位信号产生模块310，且第二开关单元374的一端耦接数据线驱动模块360，另一端耦接数据线。第二开关单元374配置成响应所述第一复位信号，断开数据线驱动模块360与所述数据线的耦接。
与第一开关单元372类似，在上述第一示例(第一复位信号为正电平 的信号)的情况下，作为最简单的示例，第二开关单元374可以包括一个减法器和一个P沟道MOSFET。减法器的输出端输出第一复位信号减去一正参考电压(其值小于第一复位信号的正电平)所得的结果。P沟道MOSFET的栅极与减法器的输出端耦接，另外两个电极中的一个电极耦接至数据线驱动模块360与液晶面板的耦接端362、且另一个电极耦接至数据线驱动信号的输出端364。这样，在未接收到第一复位信号(即，液晶面板正常工作)时，减法器的输出信号为负电平，P沟道MOSFET导通，而在接收到第一复位信号(即，关闭液晶面板)时，减法器的输出信号为正电平，P沟道MOSFET被关断从而避免数据线驱动模块360在液晶面板放电期间引入额外的电荷。
在上述第二示例(第二复位信号为正电平的信号)的情况下，第二开关单元374可以包括一个N沟道MOSFET，其栅极与第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端362、且另一个电极耦接至所述输出端364。这样，在接收到第二复位信号(即，液晶面板正常工作)时，N沟道MOSFET导通，而在未接收到第二复位信号(即关闭液晶面板)时，N沟道MOSFET被关断从而避免数据线驱动模块360在液晶面板放电期间引入额外的电荷。
在上述第三示例(第一复位信号为正电平的信号且第二复位信号为负电平的信号)的情况下，作为最简单的示例，第二开关单元374可以包括一个P沟道MOSFET，其栅极与第一/第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端362、且另一个电极耦接至所述输出端364。这样，在接收到第二复位信号(即，液晶面板正常工作)时，P沟道MOSFET导通，而在接收到第一复位信号(即关闭液晶面板)时，P沟道MOSFET被关断从而避免数据线驱动模块360在液晶面板放电期间引入额外的电荷。
接地单元配置成响应所述第一复位信号，将所述数据线和/或所述公共电极接地。作为一个示例，如图3所示，接地单元包括第三开关单元376和第四开关单元378中的至少一个。
在上述第一示例(第一复位信号为正电平的信号)的情况下，作为最简单的示例，第三开关单元376可以包括一个N沟道MOSFET，其栅极与第一复位信号的输出端耦接，另外两个电极中的一个电极耦接至公共电极驱动模块350与液晶面板的耦接端352，且另一个电极耦接至接地端(例如，设有公共电极驱动模块的印刷电路板(PCB)的接地端)。这样，在未接收到第一复位信号(即，液晶面板正常工作)时，N沟道MOSFET关断，而在接收到第一复位信号(即，关闭液晶面板)时，N沟道MOSFET被导通从而实现耦接端352接地。
在上述第二示例(第二复位信号为正电平的信号)的情况下，作为最简单的示例，第三开关单元376可以包括一个减法器和一个P沟道MOSFET。减法器的输出端输出第二复位信号减去一正参考电压(其值小于第二复位信号的正电平)所得的结果。P沟道MOSFET的栅极与减法器的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端352、且另一个电极耦接至接地端(例如，设有公共电极驱动模块的PCB的接地端)。这样，在接收到第二复位信号(即，液晶面板正常工作)时，减法器的输出信号为正电平，P沟道MOSFET关断，而在未接收到第二复位信号(即，关闭液晶面板)时，减法器的输出信号为负电平，P沟道MOSFET被导通从而实现耦接端352接地。
在上述第三示例(第一复位信号为正电平的信号且第二复位信号为负电平的信号)的情况下，作为最简单的示例，第三开关单元376可以包括一个N沟道MOSFET，其栅极与第一/第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端352、且另一个电极耦接至接地端(例如，设有公共电极驱动模块的PCB的接地端)。这样，在接收到第二复位信号(即，液晶面板正常工作)时，N沟道MOSFET关断，而在接收到第一复位信号(即，关闭液晶面板)时，N沟道MOSFET被导通从而实现耦接端352接地。
由于将公共电极驱动模块350的耦接端352接地，所以与该耦接端352耦接的公共电极被接地，与公共电极短接的各条数据线(即源极线) 也被接地，且各存储电容的与数据线短接的极板(即像素电极)也被接地，从而使公共电极上的电压、数据线上的电压和像素电极上的电压能够同电位同步经由接地路径快速放电。
与第三开关单元376类似，在上述第一示例(第一复位信号为正电平的信号)的情况下，作为最简单的示例，第四开关单元378可以包括一个N沟道MOSFET，其栅极与第一复位信号的输出端耦接，另外两个电极中的一个电极耦接至数据线驱动模块360与液晶面板的耦接端362，且另一个电极耦接至接地端(例如，设有数据线驱动模块的PCB的接地端)。这样，在未接收到第一复位信号(即，液晶面板正常工作)时，N沟道MOSFET关断，而在接收到第一复位信号(即，关闭液晶面板)时，N沟道MOSFET被导通从而实现耦接端362接地。
在上述第二示例(第二复位信号为正电平的信号)的情况下，第四开关单元378可以包括一个减法器和一个P沟道MOSFET。减法器的输出端输出第二复位信号减去一正参考电压(其值小于第二复位信号的正电平)所得的结果。P沟道MOSFET的栅极与减法器的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端362，且另一个电极耦接至接地端(例如，设有数据线驱动模块的PCB的接地端)。这样，在接收到第二复位信号(即，液晶面板正常工作)时，减法器的输出信号为正电平，P沟道MOSFET关断，而在未接收到第二复位信号(即，关闭液晶面板)时，减法器的输出信号为负电平，P沟道MOSFET被导通从而实现耦接端362接地。
在上述第三示例(第一复位信号为正电平的信号且第二复位信号为负电平的信号)的情况下，作为最简单的示例，第四开关单元378可以包括一个N沟道MOSFET，其栅极与第一/第二复位信号的输出端耦接，另外两个电极中的一个电极耦接至所述耦接端362、且另一个电极耦接至接地端(例如，设有数据线驱动模块的PCB的接地端)。这样，在接收到第二复位信号(即，液晶面板正常工作)时，N沟道MOSFET关断，而在接收到第一复位信号(即，关闭液晶面板)时，N沟道MOSFET被导通从 而实现耦接端362接地。
由于将数据线驱动模块360的耦接端362接地，所以与该耦接端362耦接的各条数据线(即源极线)被接地，各存储电容的与数据线短接的极板(即像素电极)也被接地，且与各条数据线短接的公共电极也被接地，从而使公共电极上的电压、数据线上的电压和像素电极上的电压能够同电位同步经由接地路径快速放电。
应注意的是，图3作为示意图仅示出数据线驱动模块360的一个信号输出端364以及与其对应的一个开关单元374和一个开关单元378。在实践中，为了驱动液晶面板的有效显示区中的各条数据线(即源极线)，数据线驱动模块实际上包括多个信号输出端364。由于每个信号输出端364对应于一个开关单元374和一个开关单元378，所以开关单元374和开关单元378的数量实际上为多个。而且，可以通过对现有的数据线驱动模块进行改造而包含开关单元374和开关单元378。
然而，本发明并不限于此。第一开关单元372和第二开关单元374可以用任何现有的能够响应于驱动信号的类似切换(例如，从零切换为正电平，从正电平切换为零，从负电平切换为正电平，等等)而关断的开关单元实现，且第三开关单元376和第四开关单元378可以用任何现有的能够响应于驱动信号的类似切换(例如，从零切换为正电平，从正电平切换为零，从负电平切换为正电平，等等)而导通的开关单元实现。与关机用电路类似，开关单元372、374、376和378可以用现有的其他类型的电子开关(例如，其他类型的晶体管、二极管、纳米电子开关等)来实现。
III.关机时序
图4是说明根据本发明的一个实施例的关机时序的示意图，其中“VCOM输入”表示从VCOM模块(或公共电极驱动模块)350输入至耦接端352的信号，“数据线驱动模块”表示数据线驱动模块360与液晶面板的耦接端362处的信号，“VCOM”表示VCOM模块350与液晶面板的耦接端352处的信号。该实施例对应于上述第二示例，即第二复位信号是XAO信号在液晶面板正常工作时的部分(例如，XAO信号在具有高 电平时的部分)。而且，在该实施例中，外围驱动装置仅包括第四开关单元378而不包括第三开关单元376。此外，施加于使能信号传输线的使能信号为具有高电平VGH的信号。
如图所示，在液晶面板正常工作时，面板驱动电压VIN保持为高电平。相应地，XAO信号也保持为高电平。此时，使能信号传输线保持为低电平VGL(例如-8V)，使关机用电路的开关模块保持关断。由于第一开关单元372导通，所以VCOM输入保持为高电平。相应地，VCOM模块与液晶面板的耦接端处的信号保持为高电平，图4中表示该信号的矩形意味着该信号是随时间变化的信号。此时，由于第二开关单元374导通且第四开关单元378关断，所以数据线驱动模块与液晶面板的耦接端处的信号也保持为高电平。同样，表示该信号的矩形意味着该信号是随时间变化的信号。
在关闭液晶面板时，面板驱动电压VIN下降。当在时刻t0，VIN小于设定值时，XAO信号从高电平被下拉至低电平(例如，零电平)。相应地，使能信号传输线上的信号电压从工作时的低电平VGL上拉至高电平VGH，使与其耦接的开关模块导通，从而将各条数据线与公共电极短接并使各条数据线之间被短接。此外，由于第一开关单元372关断，所以VCOM输入变为低电平。相应地，由于第三控制模块370响应于XAO信号变为低电平而断开数据线驱动模块360与数据线的耦接、并将所述数据线接地，从而使液晶面板放电，所以数据线驱动模块与液晶面板的耦接端处的信号从时刻t0开始逐渐降为低电平，VCOM模块与液晶面板的耦接端处的信号也从时刻t0开始逐渐降为低电平。
在t0至t1之间，第二控制模块对有效显示区的栅极线扫描至少一帧，公共电极上的电压、数据线上的电压和像素电极上的电压均通过数据线向地(GND)同步放电，实现面板的完全放电。在时刻t1，对栅极线的扫描结束，使能信号传输线上的信号电压变为例如0伏，液晶面板处于关机状态。
在经过一段时间后，当开启液晶面板时，面板驱动电压VIN逐渐升 高。当VIN高于设定值时，XAO信号变为高电平，使能信号传输线上的信号从关机时的0伏被下拉至工作时的低电平VGL。相应地，VCOM输入变为高电平，且VCOM模块与液晶面板的耦接端处的信号从低电平变为高电平。数据线驱动模块与液晶面板的耦接端处的信号也变为高电平。
IV.液晶面板
根据上文中的描述，包括根据本发明实施例的关机用电路和外围驱动装置的液晶面板(其中所述第一控制模块与所述使能信号传输线耦接)能够有效降低开关机闪烁漂移，在此不再赘述。
应注意的是，以上所述仅是本发明的示范性实施方式，而并非用于限制本发明的保护范围，本发明的保护范围由所附的权利要求确定。

Claims (13)

  1. 一种关机用电路，用于液晶面板，包括：使能信号传输线以及开关模块；
    所述开关模块与所述使能信号传输线、所述液晶面板的公共电极及各条数据线耦接，用于通过所述使能信号传输线接收到使能信号时导通，以将各条所述数据线与公共电极短接。
  2. 根据权利要求1所述的关机用电路，其中：
    所述开关模块包括至少一个开关子模块；
    每个所述开关子模块包括一个晶体管，其栅极与所述使能信号传输线耦接，其余两个电极中的一个电极与一条或多条数据线耦接，另一个电极与所述公共电极耦接；
    或者，每个所述开关子模块包括源漏依次串联的多个晶体管，每个晶体管的栅极与所述使能信号传输线耦接，所述串联的多个晶体管中首尾两端的两个晶体管之一的源极或漏极与所述公共电极耦接，另一个晶体管的漏极或源极与一条或多条数据线耦接。
  3. 根据权利要求2所述的关机用电路，其中，所述晶体管是薄膜晶体管。
  4. 根据权利要求1-3中任一项所述的关机用电路，其中，所述关机用电路设置在所述液晶面板的阵列基板上。
  5. 根据权利要求4所述的关机用电路，其中，所述关机用电路设置于所述液晶面板的有效显示区之外。
  6. 根据权利要求1-3中任一项所述的关机用电路，其中，所述关机用电路设置在与所述液晶面板的阵列基板耦接的电路板上。
  7. 一种外围驱动装置，包括：复位信号产生模块、第一控制模块、第二控制模块、第三控制模块、数据线驱动模块、公共电极驱动模块以及栅极驱动模块；
    复位信号产生模块，用于在液晶面板的驱动电压小于设定值时输出第一复位信号；
    第一控制模块，用于接收并响应所述第一复位信号，输出使能信号；
    第二控制模块，用于接收并响应所述第一复位信号，驱动所述栅极驱动模块扫描栅极线至少一帧；
    第三控制模块，用于接收并响应所述第一复位信号，断开所述公共电极驱动模块与公共电极的耦接，断开所述数据线驱动模块与数据线的耦接，并将所述数据线和/或所述公共电极接地。
  8. 根据权利要求7所述的外围驱动装置，其中，所述第三控制模块包括第一开关单元和第二开关单元；
    所述第一开关单元的控制极耦接所述复位信号产生模块，且所述第一开关单元一端耦接所述公共电极驱动模块，另一端耦接所述公共电极；所述第一开关单元用于响应所述第一复位信号，断开所述公共电极驱动模块与所述公共电极的耦接；
    所述第二开关单元的控制极耦接所述复位信号产生模块，且所述第二开关单元一端耦接所述数据线驱动模块，另一端耦接所述数据线；所述第二开关单元用于响应所述第一复位信号，断开所述数据线驱动模块与所述数据线的耦接。
  9. 根据权利要求7或8所述的外围驱动装置，其中，所述第三控制模块包括接地单元；
    所述接地单元用于响应所述第一复位信号，将所述数据线和/或所述公共电极接地。
  10. 根据权利要求7-9中任一项所述的外围驱动装置，其中，所述复位信号产生模块用于在液晶面板的驱动电压大于或等于所述设定值时输出第二复位信号。
  11. 根据权利要求10所述的外围驱动装置，其中，所述第一开关单元用于响应所述第二复位信号，将所述公共电极驱动模块与所述公共电极导通；
    所述第二开关单元用于响应所述第二复位信号，将所述数据线驱动模块与所述数据线导通。
  12. 根据权利要求10所述的外围驱动装置，其中，所述所述接地单元用于响应所述第二复位信号，将所述数据线和/或所述公共电极与地断开。
  13. 一种液晶面板，包括设置于有效显示区的栅极线、数据线、公共电极、如权利要求1至6中任一项所述的关机用电路、以及如权利要求7至12中任一项所述的外围驱动装置；
    所述第一控制模块与所述使能信号传输线耦接。
PCT/CN2016/087448 2016-03-11 2016-06-28 关机用电路、外围驱动装置和液晶面板 WO2017152548A1 (zh)

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