WO2017152460A1 - 液晶显示面板驱动方法 - Google Patents

液晶显示面板驱动方法 Download PDF

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Publication number
WO2017152460A1
WO2017152460A1 PCT/CN2016/078889 CN2016078889W WO2017152460A1 WO 2017152460 A1 WO2017152460 A1 WO 2017152460A1 CN 2016078889 W CN2016078889 W CN 2016078889W WO 2017152460 A1 WO2017152460 A1 WO 2017152460A1
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WIPO (PCT)
Prior art keywords
liquid crystal
crystal display
display panel
gate drive
timing controller
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PCT/CN2016/078889
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English (en)
French (fr)
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陈胤宏
吴宇
胡安乐
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深圳市华星光电技术有限公司
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Priority to US15/105,568 priority Critical patent/US10181302B2/en
Publication of WO2017152460A1 publication Critical patent/WO2017152460A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3622—Control of matrices with row and column drivers using a passive matrix
    • G09G3/3644—Control of matrices with row and column drivers using a passive matrix with the matrix divided into sections
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2074—Display of intermediate tones using sub-pixels
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/06—Details of flat display driving waveforms
    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a liquid crystal display panel driving method.
  • liquid crystal displays which include a liquid crystal display panel and a backlight module.
  • the working principle of the liquid crystal display panel is to fill liquid crystal molecules between a Thin Film Transistor Array Substrate (TFT Array Substrate) and a Color Filter (CF), and apply driving on the two substrates.
  • TFT Array Substrate Thin Film Transistor Array Substrate
  • CF Color Filter
  • the liquid crystal display panel includes a plurality of sub-pixels arranged in an array, each sub-pixel is electrically connected to a thin film transistor (TFT), and a gate of the TFT is connected to a horizontal gate scan line, and the source (Source) ) connected to the data line in the vertical direction, and the drain is connected to the pixel electrode.
  • TFT thin film transistor
  • Source Source
  • Drain Drain
  • liquid crystal display panels With the development of display technology, the size of liquid crystal display panels is getting larger and larger, and the resolution is getting higher and higher, but liquid crystal display panels usually generate a constant TFT turn-on voltage by pulse-modulation (PWM) IC. (VGH) is supplied to the gate drive IC to drive the TFTs in each row of sub-pixels before charging the sub-pixels.
  • PWM pulse-modulation
  • VGH is supplied to the gate drive IC to drive the TFTs in each row of sub-pixels before charging the sub-pixels.
  • the existing liquid crystal display panel driving system architecture includes a liquid crystal display panel 100, a plurality of gate driving ICs GD10, GD20, GD30, etc., and a constant TFT turn-on voltage VGH is set on a printed circuit board (Printed Circuit Board).
  • the PWM ICs on the Assembly, PCBA) are generated and transmitted to the respective gate drive ICs through wires (Wire On Array, WOA) disposed on the TFT array substrate. Since the WOA trace is thinner and the impedance is larger, the TFT turn-on voltage VGH is attenuated, and the TFT turn-on voltage VGH actually received by the different gate drive ICs is greatly different, thereby causing different gate drive ICs respectively.
  • the charging time of the pixel display area is also different.
  • the horizontal block phenomenon (H Block) between adjacent pixel display areas often occurs, that is, there is a significant horizontal boundary between adjacent pixel display areas, which seriously affects the viewing experience, resulting in degradation of the quality of the liquid crystal display panel.
  • An object of the present invention is to provide a liquid crystal display panel driving method capable of dynamically adjusting a TFT turn-on voltage in real time, so that the TFT turn-on voltage actually received by each gate driving IC is kept uniform, thereby making the charging time of different pixel display regions equal, eliminating Horizontal block problem to improve the quality of the liquid crystal display panel.
  • the present invention provides a liquid crystal display panel driving method, comprising the following steps:
  • Step 1 Providing a liquid crystal display panel driving system
  • M is a positive integer
  • the liquid crystal display panel has M rows of pixels
  • N is a positive integer greater than 1 and can divide M.
  • the liquid crystal display panel is divided into N pixel display areas, and each pixel is displayed.
  • the area includes M/N line pixels;
  • each gate drive IC is responsible for driving M/N rows of pixels of one pixel display area;
  • the timing controller includes a counter, and a pulse modulation module electrically connected to the counter;
  • Step 2 The timing controller provides a start signal for the N cascaded gate drive ICs, and provides an initial TFT turn-on voltage to the first gate drive IC corresponding to the first pixel display region. Starting to output display data to the liquid crystal display panel row by row, each time one line of display data is displayed, the counter in the timing controller is incremented by one;
  • Step 3 Let i be a positive integer, and 1 ⁇ i ⁇ N.
  • the pulse modulation module in the timing controller drives the i+1th corresponding drive.
  • the i+1th gate driving IC of the pixel display area sends a pulse control signal, controls the i+1th gate driving IC to be internally calculated and converted, and outputs a target TFT corresponding to the i+1th gate driving IC Turn on the voltage;
  • the pulse control signal controls the i+1th gate drive IC to be internally calculated and converted, and the execution process of the target TFT turn-on voltage corresponding to the i+1th gate drive IC is: i+1
  • a high-frequency detection signal is generated inside the gate driving IC, and the high-frequency detection signal pair is detected from the rising edge of the start signal to the falling edge of the start signal from the i+1th gate driving IC
  • the level of the pulse control signal is digitally converted several times, and the i+1th gate drive IC outputs a corresponding target TFT turn-on voltage according to the result of the digital conversion.
  • the high frequency detection signal digitally converts the level of the pulse control signal
  • the high level of the pulse control signal is converted to a logic number 1
  • the low level of the pulse control signal is converted to a logic number of zero.
  • the frequency of the digital detection of the level of the pulse control signal by the high frequency detection signal is a, and a is a positive integer greater than 1, and satisfies 2 a >N.
  • the pulse modulation modules are different in the respective pulse control signals transmitted to the respective gate drive ICs.
  • the high frequency detection signals generated inside the respective gate drive ICs are the same.
  • N gate driving ICs are also disposed on the other side of the liquid crystal display panel, and M/N row pixels of one pixel display area are commonly driven by two gate driving ICs located on both sides of the pixel display area.
  • the target TFT turn-on voltage of the i+1th gate drive IC is greater than the target TFT turn-on voltage of the i-th gate drive IC; and the TFT turn-on voltages actually received by the respective gate drive ICs are equal.
  • the invention also provides a liquid crystal display panel driving method, comprising the following steps:
  • Step 1 Providing a liquid crystal display panel driving system
  • the liquid crystal display panel driving system includes:
  • M is a positive integer
  • the liquid crystal display panel has M rows of pixels
  • N is a positive integer greater than 1 and can divide M.
  • the liquid crystal display panel is divided into N pixel display areas, and each pixel is displayed.
  • the area includes M/N line pixels;
  • each gate drive IC is responsible for driving M/N rows of pixels of one pixel display area;
  • timing controller electrically connected to each of the gate drive ICs
  • the timing controller includes a counter, and a pulse modulation module electrically connected to the counter;
  • Step 2 The timing controller provides a start signal for the N cascaded gate drive ICs, and provides an initial TFT turn-on voltage to the first gate drive IC corresponding to the first pixel display region. Starting to output display data to the liquid crystal display panel row by row, each time one line of display data is displayed, the counter in the timing controller is incremented by one;
  • Step 3 Let i be a positive integer, and 1 ⁇ i ⁇ N.
  • the pulse modulation module in the timing controller drives the i+1th corresponding drive.
  • the i+1th gate driving IC of the pixel display area sends a pulse control signal, controls the i+1th gate driving IC to be internally calculated and converted, and outputs a target TFT corresponding to the i+1th gate driving IC Turn on the voltage;
  • Step 4 When the counter in the timing controller is added to M, the counter is reset to zero;
  • the pulse control signal controls the i+1th gate drive IC to be internally calculated.
  • the calculation process of the target TFT turn-on voltage corresponding to the i+1th gate drive IC is: the i+1th gate drive IC internally generates a high frequency detection signal, from the i+1th
  • the gate driving IC detects the rising edge of the start signal to the falling edge of the start signal, and the high frequency detection signal performs digital conversion on the level of the pulse control signal, and the i+1th gate drive
  • the IC outputs a corresponding target TFT turn-on voltage according to the result of the digital conversion;
  • the target TFT turn-on voltage of the i+1th gate drive IC is greater than the target TFT turn-on voltage of the i-th gate drive IC; and the TFT turn-on voltages actually received by the respective gate drive ICs are equal.
  • the invention provides the liquid crystal display panel driving method
  • the counter is set in the timing controller
  • the pulse modulation module is electrically connected to the counter
  • the timing controller outputs data for one line
  • the timing controller is The counter is incremented by 1.
  • the pulse modulation module in the timing controller drives the i+1th gate of the display region corresponding to the i+1th pixel.
  • the driving IC sends a pulse control signal to control the i+1th gate driving IC to be internally calculated and converted, and outputs a target TFT turn-on voltage corresponding to the i+1th gate driving IC, and can dynamically adjust the TFT turn-on voltage in real time.
  • the TFT turn-on voltages actually received by the respective gate driving ICs are kept uniform, so that the charging times of different pixel display regions are equal, the horizontal block problem is eliminated, and the quality of the liquid crystal display panel is improved.
  • FIG. 1 is a schematic diagram of a conventional liquid crystal display panel driving system architecture
  • FIG. 2 is a flow chart of a method for driving a liquid crystal display panel of the present invention
  • FIG. 3 is a schematic diagram of a liquid crystal display panel driving system in a liquid crystal display panel driving method of the present invention
  • FIG. 4 is a schematic diagram of level conversion of a high frequency detection signal to a control signal in a method for driving a liquid crystal display panel according to the present invention
  • FIG. 5 is a waveform diagram showing a target TFT turn-on voltage of each gate driving IC in the liquid crystal display panel driving method of the present invention.
  • the present invention provides a liquid crystal display panel driving method, which includes the following steps:
  • Step 1 Provide a liquid crystal display panel driving system.
  • the liquid crystal display panel driving system includes:
  • M is a positive integer
  • the liquid crystal display panel 1 has M rows of pixels
  • N is a positive integer greater than 1 and can be divisible by M
  • the liquid crystal display panel 1 is divided into N pixel display areas Zone ( 1) to Zone(N), each pixel display area includes M/N line pixels;
  • timing controller 2 electrically connected to each of the gate driving ICs GD(1) to GD(N); the timing controller 2 includes a counter 21 and a pulse modulation module 22 electrically connected to the counter 21.
  • the liquid crystal display panel 1 has 2160 rows of pixels, and the liquid crystal display panel 1 is divided into three pixel display areas Zone(1) to Zone(3), each pixel.
  • the display area includes 720 lines of pixels.
  • At least three gate drive ICs GD(1) to GD(3) are disposed on one side of the liquid crystal display panel 1, and each gate drive IC is responsible for driving 720 rows of pixels of one pixel display area, that is, the first pixel.
  • the display area Zone(1) is driven only by the first gate drive IC GD(1), and the second pixel display area Zone(2) is driven only by the second gate drive IC GD(2), the third pixel
  • the display area Zone(3) is driven only by the third gate driving IC GD(3), which is suitable for the case where the liquid crystal display panel is driven by one side; of course, three of the other sides of the liquid crystal display panel 1 can also be provided.
  • the gate drive ICs GD(1') to GD(3'), 720 rows of pixels of one pixel display area are jointly driven by two gate drive ICs located on both sides of the pixel display area, that is, the first pixel display area Zone (1)
  • the GD(1) and GD(1') two gate drive ICs are driven together by the two sides, and the second pixel display area Zone(2) is GD(2) and GD located on both sides thereof.
  • Two gate drive ICs are driven together, and the third pixel display area Zone(3) is driven by two gate drive ICs of GD(3) and GD(3') on both sides thereof.
  • LCD panel Side driving situation
  • Step 2 The timing controller 2 is the N cascaded gate drive ICs GD(1) to GD(N) (or GD(1) to GD(N), and GD(1') to GD (N')) providing the start signal STV to the first gate drive IC GD(1) (or GD(1), and GD(1')) corresponding to the display of the first pixel display area Zone(1)
  • the initial TFT turn-on voltage VGH is supplied, and at the same time, the display data is outputted to the liquid crystal display panel 1 row by row, and the data is outputted in one line, and the counter 21 in the timing controller 2 is incremented by one.
  • the first gate driving IC GD(1) (or GD(1), and GD(1')) in the step 2 drives the first pixel display area Zone by using the initial TFT turn-on voltage supplied from the timing controller 2. Each row of pixels in (1) is charged.
  • Step 3 Let i be a positive integer, and 1 ⁇ i ⁇ N.
  • the pulse modulation module 22 in the timing controller 2 is corresponding to the driving
  • the i+1th gate drive IC GD(i+1) (or GD(i+1), and GD(i+1')) of the i+1 pixel display area Zone(i+1)) transmits one
  • the pulse control signal CS controls the i+1th gate drive IC GD(i+1) (or GD(i+1), and GD(i+1')) to be internally calculated and converted, and the output is i+
  • the high frequency detection signal digitally converts the level of the pulse control signal CS
  • the high level of the pulse control signal CS is converted to a logic number 1
  • the low level of the pulse control signal CS is converted into a logic number 0.
  • the level of the pulse control signal CS is digitally converted three times, and the rising edge of the first pulse of the high-frequency detection signal corresponds to the high level and high frequency of the control signal CS.
  • the rising edge of the second pulse of the detection signal corresponds to the low level of the control signal CS
  • the rising edge of the third pulse of the high frequency detection signal corresponds to the high level of the control signal CS, and the result of the digital conversion is 101.
  • the pulse modulation module 22 drives the ICs GD(2) to GD(N) (or GD(2) to GD(N), and GD(2') to GD(N') to the respective gates.
  • Each pulse control signal CS sent is different (mainly different in duration of high and low levels), and each gate drive IC GD(2) to GD(N) (or GD(2) to GD(N) The same as the high-frequency detection signal generated internally by GD(2') to GD(N')), then the high-frequency detection signal is used to digitally convert the level of the pulse control signal CS to obtain different results.
  • IC GD(2) to GD(N) (or GD(2) to GD(N), and GD(2') to GD(N')) can output different digital conversion results according to different digital conversion results.
  • the corresponding target TFT turns on the voltage.
  • the frequency of the high frequency detection signal to the digital control of the level of the pulse control signal CS is a, and a is a positive integer greater than 1, and 2 a >N is required to ensure that each pixel is driven to be displayed.
  • the gate drive ICs of the regions can output a target TFT turn-on voltage different from other gate drive ICs.
  • the pulse control signal CS is different based on the fact that, in the case where the initial TFT turn-on voltage is supplied to each of the gate drive ICs of the same liquid crystal display panel 1, the TFT between the adjacent two gate drive ICs is obtained by actual measurement. Turning on the voltage attenuation amplitude, since the attenuation of the TFT turn-on voltage on the trace is linear, the increase of the target TFT turn-on voltage should also be linear, and the pulse modulation module 22 is set by setting the internal register of the timing controller 2.
  • the two adjacent pulse control signals CS are digitally converted and the corresponding target TFT turn-on voltages are different by a TFT turn-on voltage attenuation amplitude.
  • the pulse modulation module 22 in the timing controller 2 transmits a second gate driving IC GD(2) and GD(2') corresponding to the second pixel display area Zone(2).
  • the pulse control signal CS, the second gate drive IC GD(2), and the GD(2') internally generate a high frequency detection signal, starting from the detection of the rising edge of the start signal STV to the start signal STV Up to the falling edge, the high frequency detection signal performs digital conversion on the level of the pulse control signal CS, and the second gate drive IC GD(2) and GD(2') correspond to the result of the digital conversion.
  • the counter 31 when the counter 31 is added to 1440, it indicates that the second pixel display area Zone(2), which is responsible for the gate drive ICs GD(2) and GD(2'), has been charged, and the pulse in the timing controller 2 is completed.
  • the modulation module 22 transmits a pulse control signal CS different from the previous pulse control signal to the third gate drive IC GD(3) corresponding to the third pixel display area Zone(3), and GD(3').
  • the third gate drive IC GD(3) and GD(3') internally generate the same high frequency detection signal as the previous high frequency detection signal, starting from the rising edge of the detection start signal STV.
  • the high frequency detection signal performs digital conversion on the level of the pulse control signal CS several times before the falling edge of the start signal STV, and the third gate drive ICs GD(3) and GD(3') are converted according to the number.
  • the result outputs the corresponding target TFT turn-on voltage.
  • Step 4 When the counter 21 in the timing controller 2 is added to M, the counter 21 is reset to zero.
  • the i+1th gate drive IC GD(i+1) (or GD(i+1), and GD(s) corresponding to the i+1th pixel display area Zone(i+1) are driven.
  • the target TFT turn-on voltage of i+1')) is larger than the i-th gate drive IC GD(i) (or GD(i), and GD(i')) corresponding to driving the i-th pixel display region Zone(i)
  • the target TFT turns on the voltage, but there is linear attenuation when the TFT turn-on voltage is transmitted on the trace, and each gate drive IC GD(1) to GD(N) (or GD(1) to GD(N), and GD( 1') to GD(N')), the TFT voltages actually received are equal, which realizes real-time dynamic adjustment of the TFT turn-on voltage, so that the charging time of different pixel display areas is equal, which can eliminate the horizontal block problem and improve the liquid crystal.
  • the quality of the display panel is
  • a counter is provided in the timing controller, and a pulse modulation module electrically connected to the counter is provided.
  • the timing controller outputs data for one line, and the counter in the timing controller. Plus 1, when the counter in the timing controller is added to i ⁇ M/N, the pulse modulation module in the timing controller sends the i+1th gate drive IC corresponding to the display area of the i+1th pixel.

Abstract

一种液晶显示面板（1）的驱动方法，在时序控制器（2）内设置计数器（21）及脉冲调制模块（22），时序控制器（2）每输出一行显示数据，该时序控制器（2）内的计数器（21）加1，当时序控制器（2）内的计数器（21）每加到i×M/N时，该时序控制器（2）内的脉冲调制模块（22）向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号（CS），控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动对应的目标TFT开启电压，能够实时动态调整TFT开启电压，使各个栅极驱动IC实际接收到的TFT开启电压保持一致，从而使不同像素显示区域的充电时间相等，消除水平区块问题，提高液晶显示面板（1）的品质。

Description

液晶显示面板驱动方法 技术领域
本发明涉及液晶显示技术领域，尤其涉及一种液晶显示面板驱动方法。
背景技术
液晶显示器(Liquid Crystal Display，LCD)具有机身薄、省电、无辐射等众多优点，得到了广泛的应用，如：液晶电视、移动电话、个人数字助理(PDA)、数字相机、计算机屏幕或笔记本电脑屏幕等，在平板显示领域中占主导地位。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括液晶显示面板及背光模组(Backlight Module)。液晶显示面板的工作原理是在薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)与彩色滤光片基板(Color Filter，CF)之间灌入液晶分子，并在两片基板上施加驱动电压来控制液晶分子的旋转方向，以将背光模组的光线折射出来产生画面。
液晶显示面板包括多个呈阵列式排布的子像素，每个子像素电性连接一个薄膜晶体管(TFT)，该TFT的栅极(Gate)连接至水平方向的栅极扫描线，源极(Source)连接至竖直方向的数据线，漏极(Drain)则连接至像素电极。通过栅极驱动(Gate Driver)IC在栅极扫描线上施加足够的电压，会使得电性连接至该条栅极扫描线上的所有TFT打开，从而数据线上的信号电压能够写入像素，控制液晶的透光度，实现显示效果。
随着显示技术的发展，液晶显示面板的尺寸越来越大，解析度越来越高，但液晶显示面板通常都是靠脉冲调制(Pulse-Width Modulation，PWM)IC产生一个恒定的TFT开启电压(VGH)提供给栅极驱动IC来驱动各行子像素内的TFT，然后才能给子像素进行充电。如图1所示，现有的液晶显示面板驱动系统架构包括液晶显示面板100、数个栅极驱动IC GD10、GD20、GD30等，恒定的TFT开启电压VGH由设置在印刷电路板(Printed Circuit Board Assembly，PCBA)上的PWM IC产生，并通过设置在TFT阵列基板上的走线(Wire On Array，WOA)向各个栅极驱动IC传输。由于WOA走线较细，阻抗较大，TFT开启电压VGH会产生衰减，不同的栅极驱动IC实际接收到的TFT开启电压VGH存在较大的差异，从而造成不同栅极驱动IC分别对应的不同像素显示区域的充电时间也不相同， 常出现相邻的像素显示区域之间的水平区块现象(H Block)，即相邻的像素显示区域之间会有明显的水平分界，严重影响观看体验，导致液晶显示面板的品质下降。
发明内容
本发明的目的在于提供一种液晶显示面板驱动方法，能够实时动态调整TFT开启电压，使各个栅极驱动IC实际接收到的TFT开启电压保持一致，从而使不同像素显示区域的充电时间相等，消除水平区块问题，提高液晶显示面板的品质。
为实现上述目的，本发明提供一种液晶显示面板驱动方法，包括以下步骤：
步骤1、提供一液晶显示面板驱动系统；
所述液晶显示面板驱动系统包括：
液晶显示面板，设M为正整数，所述液晶显示面板具有M行像素，设N为大于1且能够整除M的正整数，该液晶显示面板被划分为N个像素显示区域，每一像素显示区域包括M/N行像素；
至少于所述液晶显示面板的一侧设置的N个级联的栅极驱动IC，每一栅极驱动IC负责驱动一个像素显示区域的M/N行像素；
以及电性连接各个栅极驱动IC的时序控制器；
所述时序控制器包括计数器、及电性连接所述计数器的脉冲调制模块；
步骤2、所述时序控制器为所述N个级联的栅极驱动IC提供起始信号，向对应驱动第1个像素显示区域的第1个栅极驱动IC提供初始的TFT开启电压，同时开始向液晶显示面板逐行输出显示数据，每输出一行显示数据，该时序控制器内的计数器加1；
步骤3、设i为正整数，且1≤i﹤N，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压；
步骤4、当时序控制器内的计数器加到M时，该计数器复位清零。
所述步骤3中脉冲控制信号控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压的执行过程为：第i+1个栅极驱动IC内部产生一高频侦测信号，从第i+1个栅极驱动IC侦测到起始信号的上升沿开始至起始信号的下降沿为止，该高频侦测信号对 脉冲控制信号的电平进行数次数字转换，第i+1个栅极驱动IC根据数字转换的结果输出对应的目标TFT开启电压。
高频侦测信号对脉冲控制信号的电平进行数字转换时，将脉冲控制信号的高电平转换为逻辑数字1，将脉冲控制信号的低电平转换为逻辑数字0。
设高频侦测信号对脉冲控制信号的电平进行数次数字转换的次数为a，a为大于1的正整数，则满足2a＞N。
所述脉冲调制模块向各个栅极驱动IC发送的各条脉冲控制信号不同。
各个栅极驱动IC内部产生的高频侦测信号相同。
液晶显示面板的另一侧也设置N个栅极驱动IC，一个像素显示区域的M/N行像素由位于该像素显示区域两侧的两个栅极驱动IC共同驱动。
第i+1个栅极驱动IC的目标TFT开启电压大于第i个栅极驱动IC的目标TFT开启电压；各个栅极驱动IC最终实际接收到的TFT开启电压相等。
本发明还提供一种液晶显示面板驱动方法，包括以下步骤：
步骤1、提供一液晶显示面板驱动系统；
所述液晶显示面板驱动系统包括：
液晶显示面板，设M为正整数，所述液晶显示面板具有M行像素，设N为大于1且能够整除M的正整数，该液晶显示面板被划分为N个像素显示区域，每一像素显示区域包括M/N行像素；
至少于所述液晶显示面板的一侧设置的N个级联的栅极驱动IC，每一栅极驱动IC负责驱动一个像素显示区域的M/N行像素；
以及电性连接各个栅极驱动IC的时序控制器；
所述时序控制器包括计数器、及电性连接所述计数器的脉冲调制模块；
步骤2、所述时序控制器为所述N个级联的栅极驱动IC提供起始信号，向对应驱动第1个像素显示区域的第1个栅极驱动IC提供初始的TFT开启电压，同时开始向液晶显示面板逐行输出显示数据，每输出一行显示数据，该时序控制器内的计数器加1；
步骤3、设i为正整数，且1≤i﹤N，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压；
步骤4、当时序控制器内的计数器加到M时，该计数器复位清零；
其中，所述步骤3中脉冲控制信号控制第i+1个栅极驱动IC经内部计 算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压的执行过程为：第i+1个栅极驱动IC内部产生一高频侦测信号，从第i+1个栅极驱动IC侦测到起始信号的上升沿开始至起始信号的下降沿为止，该高频侦测信号对脉冲控制信号的电平进行数次数字转换，第i+1个栅极驱动IC根据数字转换的结果输出对应的目标TFT开启电压；
其中，第i+1个栅极驱动IC的目标TFT开启电压大于第i个栅极驱动IC的目标TFT开启电压；各个栅极驱动IC最终实际接收到的TFT开启电压相等。
本发明的有益效果：本发明提供的液晶显示面板驱动方法，在时序控制器内设置计数器、及电性连接所述计数器的脉冲调制模块，时序控制器每输出一行显示数据，该时序控制器内的计数器加1，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压，能够实时动态调整TFT开启电压，使各个栅极驱动IC实际接收到的TFT开启电压保持一致，从而使不同像素显示区域的充电时间相等，消除水平区块问题，提高液晶显示面板的品质。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的液晶显示面板驱动系统架构的示意图；
图2为本发明的液晶显示面板驱动方法的流程图；
图3为本发明的液晶显示面板驱动方法中液晶显示面板驱动系统的示意图；
图4为本发明的液晶显示面板驱动方法中高频侦测信号对控制信号进行电平转换的示意图；
图5为本发明的液晶显示面板驱动方法中各个栅极驱动IC的目标TFT开启电压的波形示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明 的优选实施例及其附图进行详细描述。
请参阅图2，结合图3至图5，本发明提供一种液晶显示面板驱动方法，包括以下步骤：
步骤1、提供一液晶显示面板驱动系统。
如图3所示，所述液晶显示面板驱动系统包括：
液晶显示面板1，设M为正整数，所述液晶显示面板1具有M行像素，设N为大于1且能够整除M的正整数，该液晶显示面板1被划分为N个像素显示区域Zone(1)至Zone(N)，每一像素显示区域包括M/N行像素；
至少于所述液晶显示面板1的一侧设置的N个级联的栅极驱动IC GD(1)至GD(N)，每一栅极驱动IC负责驱动一个像素显示区域的M/N行像素；
以及电性连接各个栅极驱动IC GD(1)至GD(N)的时序控制器2；所述时序控制器2包括计数器21、及电性连接所述计数器21的脉冲调制模块22。
以液晶显示面板1的解析度为3840×2160为例，液晶显示面板1具有2160行像素，该液晶显示面板1被划分为3个像素显示区域Zone(1)至Zone(3)，每一像素显示区域包括720行像素。至少于所述液晶显示面板1的一侧设置3个栅极驱动IC GD(1)至GD(3)，每一栅极驱动IC负责驱动一个像素显示区域的720行像素，即第1个像素显示区域Zone(1)仅由第1个栅极驱动IC GD(1)驱动，第2个像素显示区域Zone(2)仅由第2个栅极驱动IC GD(2)驱动，第3个像素显示区域Zone(3)仅由第3个栅极驱动IC GD(3)驱动，这适用于液晶显示面板单边驱动的情况；当然，也可在液晶显示面板1的另一侧也设置3个栅极驱动IC GD(1’)至GD(3’)，一个像素显示区域的720行像素由位于该像素显示区域两侧的两个栅极驱动IC共同驱动，即第1个像素显示区域Zone(1)由位于其两侧的GD(1)与GD(1’)两个栅极驱动IC共同驱动，第2个像素显示区域Zone(2)由位于其两侧的GD(2)与GD(2’)两个栅极驱动IC共同驱动，第3个像素显示区域Zone(3)由位于其两侧的GD(3)与GD(3’)两个栅极驱动IC共同驱动，这适用于液晶显示面板双边驱动的情况。
步骤2、所述时序控制器2为所述N个级联的栅极驱动IC GD(1)至GD(N)(或GD(1)至GD(N)、与GD(1’)至GD(N’))提供起始信号STV，向对应驱动第1个像素显示区域Zone(1)的第1个栅极驱动IC GD(1)(或GD(1)、与GD(1’))提供初始的TFT开启电压VGH，同时开始向液晶显示面板1逐行输出显示数据，每输出一行显示数据，该时序控制器2内的计数器21加1。
该步骤2中的第1个栅极驱动IC GD(1)(或GD(1)、与GD(1’))利用时序控制器2提供的初始的TFT开启电压驱动第1个像素显示区域Zone(1)内的各行像素进行充电。
步骤3、设i为正整数，且1≤i﹤N，当时序控制器2内的计数器21每加到i×M/N时，该时序控制器2内的脉冲调制模块22向对应驱动第i+1个像素显示区域Zone(i+1))的第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))发送一脉冲控制信号CS，控制第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))经内部计算和转换，输出与第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))对应的目标TFT开启电压。
具体地，结合图3与图4，该步骤3中脉冲控制信号CS控制第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))经内部计算和转换，输出与第i+1个栅极驱动ICGD(i+1)(或GD(i+1)、与GD(i+1’))对应的目标TFT开启电压的执行过程为：第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))内部产生一高频侦测信号，从第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))侦测到起始信号STV的上升沿开始至起始信号STV的下降沿为止，该高频侦测信号对脉冲控制信号CS的电平进行数次数字转换，第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))根据数字转换的结果输出对应的目标TFT开启电压。
进一步地，高频侦测信号对脉冲控制信号CS的电平进行数字转换时，将脉冲控制信号CS的高电平转换为逻辑数字1，将脉冲控制信号CS的低电平转换为逻辑数字0。以图4所示为例，高频侦测信号对脉冲控制信号CS的电平进行了3次数字转换，高频侦测信号第一个脉冲上升沿对应控制信号CS的高电平、高频侦测信号第二个脉冲上升沿对应控制信号CS的低电平、高频侦测信号第三个脉冲上升沿对应控制信号CS的高电平，则数字转换的结果为101。
值得注意的是，所述脉冲调制模块22向各个栅极驱动IC GD(2)至GD(N)(或GD(2)至GD(N)、与GD(2’)至GD(N’))发送的各条脉冲控制信号CS不同(主要是高、低电平的持续时间不同)，而各个栅极驱动IC GD(2)至GD(N)(或GD(2)至GD(N)、与GD(2’)至GD(N’))内部产生的高频侦测信号相同，那么用高频侦测信号对脉冲控制信号CS的电平进行数字转换就可以得到不同的结果，继续以高频侦测信号对脉冲控制信号CS的电平进行3次数字转换为例，可以得到000、001、010、011、100、101、110、111这八种数字转换结果，各个栅极驱动IC GD(2)至GD(N)(或GD(2)至GD(N)、与GD(2’)至GD(N’))可以根据数字转换结果的不同输出不同的与各数字转 换结果对应的目标TFT开启电压。另外，设高频侦测信号对脉冲控制信号CS的电平进行数次数字转换的次数为a，a为大于1的正整数，则需满足2a＞N，以保证负责驱动每一像素显示区域的栅极驱动IC均能输出一不同于其它栅极驱动IC的目标TFT开启电压。
所述脉冲调制模块22向各个栅极驱动IC GD(2)至GD(N)(或GD(2)至GD(N)、与GD(2’)至GD(N’))发送的各条脉冲控制信号CS不同是基于：在向同样的液晶显示面板1的各个栅极驱动IC均提供初始的TFT开启电压的情况下，通过实际量测得到相邻两个栅极驱动IC之间的TFT开启电压衰减幅值，由于TFT开启电压在走线上的衰减是线性的，目标TFT开启电压的增幅也应是线性的，通过设定时序控制器2的内部寄存器，设置所述脉冲调制模块22发出的相邻两条脉冲控制信号CS经数字转换后的结果各自对应的目标TFT开启电压相差一个TFT开启电压衰减幅值。
继续以液晶显示面板1的解析度为3840×2160为例，当计数器21加到720时，表示栅极驱动IC GD(1)与GD(1’)所负责的第1个像素显示区域Zone(1)已充电完毕，时序控制器2内的脉冲调制模块22向对应驱动第2个像素显示区域Zone(2)的第2个栅极驱动IC GD(2)、与GD(2’)发送一脉冲控制信号CS，第2个栅极驱动IC GD(2)、与GD(2’)内部产生一高频侦测信号，自侦测到起始信号STV的上升沿开始至起始信号STV的下降沿为止，该高频侦测信号对脉冲控制信号CS的电平进行数次数字转换，第2个栅极驱动IC GD(2)、与GD(2’)根据此数字转换的结果输出对应的目标TFT开启电压；
同样的，当计数器31加到1440时，表示栅极驱动IC GD(2)与GD(2’)所负责的第2个像素显示区域Zone(2)已充电完毕，时序控制器2内的脉冲调制模块22向对应驱动第3个像素显示区域Zone(3)的第3个栅极驱动IC GD(3)、与GD(3’)发送一不同于上一条脉冲控制信号的脉冲控制信号CS，第3个栅极驱动IC GD(3)、与GD(3’)内部产生与上一条高频侦测信号相同的高频侦测信号，自侦测到起始信号STV的上升沿开始至起始信号STV的下降沿为止，该高频侦测信号对脉冲控制信号CS的电平进行数次数字转换，第3个栅极驱动IC GD(3)、与GD(3’)根据此数字转换的结果输出对应的目标TFT开启电压。
依此类推。
步骤4、当时序控制器2内的计数器21加到M时，该计数器21复位清零。
继续以液晶显示面板1的解析度为3840×2160为例，当计数器21加 到2160时，表示栅极驱动IC GD(3)与GD(3’)所负责的第3个像素显示区域Zone(3)已充电完毕，计数器21复位清零，以进入下一幅画面的驱动和显示。
如图5所示，对应驱动第i+1个像素显示区域Zone(i+1)的第i+1个栅极驱动IC GD(i+1)(或GD(i+1)、与GD(i+1’))的目标TFT开启电压大于对应驱动第i个像素显示区域Zone(i)的第i个栅极驱动IC GD(i)(或GD(i)、与GD(i’))的目标TFT开启电压，但由于TFT开启电压在走线上传输时存在线性衰减，各个栅极驱动IC GD(1)至GD(N)(或GD(1)至GD(N)、与GD(1’)至GD(N’))最终实际接收到的TFT开启电压相等，这就实现了实时动态调整TFT开启电压，使得不同像素显示区域的充电时间相等，能够消除水平区块问题，提高液晶显示面板的品质。
综上所述，本发明的液晶显示面板驱动方法，在时序控制器内设置计数器、及电性连接所述计数器的脉冲调制模块，时序控制器每输出一行显示数据，该时序控制器内的计数器加1，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压，能够实时动态调整TFT开启电压，使各个栅极驱动IC实际接收到的TFT开启电压保持一致，从而使不同像素显示区域的充电时间相等，消除水平区块问题，提高液晶显示面板的品质。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (15)

  1. 一种液晶显示面板驱动方法，包括以下步骤：
    步骤1、提供一液晶显示面板驱动系统；
    所述液晶显示面板驱动系统包括：
    液晶显示面板，设M为正整数，所述液晶显示面板具有M行像素，设N为大于1且能够整除M的正整数，该液晶显示面板被划分为N个像素显示区域，每一像素显示区域包括M/N行像素；
    至少于所述液晶显示面板的一侧设置的N个级联的栅极驱动IC，每一栅极驱动IC负责驱动一个像素显示区域的M/N行像素；
    以及电性连接各个栅极驱动IC的时序控制器；
    所述时序控制器包括计数器、及电性连接所述计数器的脉冲调制模块；
    步骤2、所述时序控制器为所述N个级联的栅极驱动IC提供起始信号，向对应驱动第1个像素显示区域的第1个栅极驱动IC提供初始的TFT开启电压，同时开始向液晶显示面板逐行输出显示数据，每输出一行显示数据，该时序控制器内的计数器加1；
    步骤3、设i为正整数，且1≤i﹤N，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压；
    步骤4、当时序控制器内的计数器加到M时，该计数器复位清零。
  2. 如权利要求1所述的液晶显示面板驱动方法，其中，所述步骤3中脉冲控制信号控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压的执行过程为：第i+1个栅极驱动IC内部产生一高频侦测信号，从第i+1个栅极驱动IC侦测到起始信号的上升沿开始至起始信号的下降沿为止，该高频侦测信号对脉冲控制信号的电平进行数次数字转换，第i+1个栅极驱动IC根据数字转换的结果输出对应的目标TFT开启电压。
  3. 如权利要求2所述的液晶显示面板驱动方法，其中，高频侦测信号对脉冲控制信号的电平进行数字转换时，将脉冲控制信号的高电平转换为逻辑数字1，将脉冲控制信号的低电平转换为逻辑数字0。
  4. 如权利要求2所述的液晶显示面板驱动方法，其中，设高频侦测信 号对脉冲控制信号的电平进行数次数字转换的次数为a，a为大于1的正整数，则满足2a＞N。
  5. 如权利要求2所述的液晶显示面板驱动方法，其中，所述脉冲调制模块向各个栅极驱动IC发送的各条脉冲控制信号不同。
  6. 如权利要求5所述的液晶显示面板驱动方法，其中，各个栅极驱动IC内部产生的高频侦测信号相同。
  7. 如权利要求1所述的液晶显示面板驱动方法，其中，液晶显示面板的另一侧也设置N个栅极驱动IC，一个像素显示区域的M/N行像素由位于该像素显示区域两侧的两个栅极驱动IC共同驱动。
  8. 如权利要求1所述的液晶显示面板驱动方法，其中，第i+1个栅极驱动IC的目标TFT开启电压大于第i个栅极驱动IC的目标TFT开启电压；各个栅极驱动IC最终实际接收到的TFT开启电压相等。
  9. 一种液晶显示面板驱动方法，包括以下步骤：
    步骤1、提供一液晶显示面板驱动系统；
    所述液晶显示面板驱动系统包括：
    液晶显示面板，设M为正整数，所述液晶显示面板具有M行像素，设N为大于1且能够整除M的正整数，该液晶显示面板被划分为N个像素显示区域，每一像素显示区域包括M/N行像素；
    至少于所述液晶显示面板的一侧设置的N个级联的栅极驱动IC，每一栅极驱动IC负责驱动一个像素显示区域的M/N行像素；
    以及电性连接各个栅极驱动IC的时序控制器；
    所述时序控制器包括计数器、及电性连接所述计数器的脉冲调制模块；
    步骤2、所述时序控制器为所述N个级联的栅极驱动IC提供起始信号，向对应驱动第1个像素显示区域的第1个栅极驱动IC提供初始的TFT开启电压，同时开始向液晶显示面板逐行输出显示数据，每输出一行显示数据，该时序控制器内的计数器加1；
    步骤3、设i为正整数，且1≤i﹤N，当时序控制器内的计数器每加到i×M/N时，该时序控制器内的脉冲调制模块向对应驱动第i+1个像素显示区域的第i+1个栅极驱动IC发送一脉冲控制信号，控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压；
    步骤4、当时序控制器内的计数器加到M时，该计数器复位清零；
    其中，所述步骤3中脉冲控制信号控制第i+1个栅极驱动IC经内部计算和转换，输出与第i+1个栅极驱动IC对应的目标TFT开启电压的执行过 程为：第i+1个栅极驱动IC内部产生一高频侦测信号，从第i+1个栅极驱动IC侦测到起始信号的上升沿开始至起始信号的下降沿为止，该高频侦测信号对脉冲控制信号的电平进行数次数字转换，第i+1个栅极驱动IC根据数字转换的结果输出对应的目标TFT开启电压；
    其中，第i+1个栅极驱动IC的目标TFT开启电压大于第i个栅极驱动IC的目标TFT开启电压；各个栅极驱动IC最终实际接收到的TFT开启电压相等。
  10. 如权利要求9所述的液晶显示面板驱动方法，其中，高频侦测信号对脉冲控制信号的电平进行数字转换时，将脉冲控制信号的高电平转换为逻辑数字1，将脉冲控制信号的低电平转换为逻辑数字0。
  11. 如权利要求9所述的液晶显示面板驱动方法，其中，设高频侦测信号对脉冲控制信号的电平进行数次数字转换的次数为a，a为大于1的正整数，则满足2a＞N。
  12. 如权利要求9所述的液晶显示面板驱动方法，其中，所述脉冲调制模块向各个栅极驱动IC发送的各条脉冲控制信号不同。
  13. 如权利要求12所述的液晶显示面板驱动方法，其中，各个栅极驱动IC内部产生的高频侦测信号相同。
  14. 如权利要求9所述的液晶显示面板驱动方法，其中，液晶显示面板的另一侧也设置N个栅极驱动IC，一个像素显示区域的M/N行像素由位于该像素显示区域两侧的两个栅极驱动IC共同驱动。
  15. 如权利要求9所述的液晶显示面板驱动方法，其中，第i+1个栅极驱动IC的目标TFT开启电压大于第i个栅极驱动IC的目标TFT开启电压；各个栅极驱动IC最终实际接收到的TFT开启电压相等。
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