WO2017122271A1 - High-frequency amplifier and amplifier module - Google Patents

High-frequency amplifier and amplifier module Download PDF

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Publication number
WO2017122271A1
WO2017122271A1 PCT/JP2016/050671 JP2016050671W WO2017122271A1 WO 2017122271 A1 WO2017122271 A1 WO 2017122271A1 JP 2016050671 W JP2016050671 W JP 2016050671W WO 2017122271 A1 WO2017122271 A1 WO 2017122271A1
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Prior art keywords
transistor
harmonic
signal
fundamental wave
supply circuit
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PCT/JP2016/050671
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French (fr)
Japanese (ja)
Inventor
英悟 桑田
裕太郎 山口
山中 宏治
淳 西原
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三菱電機株式会社
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Priority to JP2017561086A priority Critical patent/JP6482685B2/en
Priority to PCT/JP2016/050671 priority patent/WO2017122271A1/en
Publication of WO2017122271A1 publication Critical patent/WO2017122271A1/en

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F3/00Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
    • H03F3/189High frequency amplifiers, e.g. radio frequency amplifiers
    • H03F3/19High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only
    • H03F3/193High frequency amplifiers, e.g. radio frequency amplifiers with semiconductor devices only with field-effect devices

Definitions

  • the present invention relates to a high frequency amplifier in which a plurality of transistors for amplifying a signal are connected in cascade, and an amplifier module in which a plurality of high frequency amplifiers are mounted.
  • a high-frequency amplifier disclosed in Non-Patent Document 1 includes an open stub having a length of a quarter wavelength of harmonics and a phase adjustment line with respect to an input / output terminal of a transistor that amplifies a signal.
  • a harmonic matching circuit is connected. Since a harmonic matching circuit is connected to the input / output terminal of the transistor, high-efficiency operation can be realized.
  • the conventional high-frequency amplifier when cascaded in multiple stages, a harmonic matching circuit is connected between the transistor stages. Since this harmonic matching circuit is configured using an open stub, the short-circuit point for the harmonics included in the signal amplified by the front-stage transistor is different between the front-stage transistor and the rear-stage transistor. It is formed on the main line that connects the two. For this reason, the harmonic contained in the signal amplified by the front-stage transistor is reflected at the short-circuit point, the harmonic returns to the front-stage transistor, and the harmonic is supplied to the rear-stage transistor. Not. Therefore, the latter-stage transistor has a problem that, when a signal is amplified, the harmonics contained in the signal amplified by the former-stage transistor cannot be used.
  • the present invention has been made to solve the above-described problems.
  • the rear-stage transistor amplifies the signal, it is possible to use a harmonic contained in the signal amplified by the front-stage transistor.
  • An object of the present invention is to obtain a high frequency amplifier that can be used.
  • Another object of the present invention is to obtain an amplifier module on which a plurality of the high-frequency amplifiers are mounted.
  • the high-frequency amplifier according to the present invention is connected between a plurality of transistors connected in cascade and a plurality of transistor stages, and passes a fundamental wave contained in a signal amplified by a transistor on the front stage side.
  • a harmonic supply circuit that blocks and supplies the harmonics included in the signal to the subsequent transistor, and is connected in parallel with the harmonic supply circuit, and is included in the signal amplified by the previous transistor.
  • a fundamental wave supply circuit for preventing the passage of higher harmonics and supplying the fundamental wave included in the signal to the transistor on the rear stage side.
  • the harmonic supply circuit that blocks the passage of the fundamental wave included in the signal amplified by the transistor on the front stage side and supplies the harmonic wave included in the signal to the transistor on the rear stage side.
  • a fundamental wave supply circuit that blocks passage of harmonics contained in the signal amplified by the front-stage transistor and supplies the fundamental wave contained in the signal to the rear-stage transistor.
  • Embodiment 1 is a configuration diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention. It is a block diagram which shows the high frequency amplifier by Embodiment 2 of this invention. It is a block diagram which shows the fundamental wave supply circuit 10 of the high frequency amplifier by Embodiment 2 of this invention. It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. 6 is an explanatory diagram showing a relationship between a phase difference between a harmonic and a fundamental wave and an operation efficiency of a transistor 2. It is a block diagram which shows the high frequency amplifier by Embodiment 4 of this invention.
  • FIG. 1 is a block diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention.
  • FIG. 1 shows an example of a high frequency amplifier in which two transistors are connected in cascade, a high frequency amplifier in which three or more transistors are connected in cascade may be used.
  • a transistor 1 is a pre-stage transistor that amplifies a signal.
  • the transistor 2 is a rear-stage transistor that amplifies the signal amplified by the transistor 1.
  • the transistors 1 and 2 are bipolar transistors will be described.
  • FIG. 1 shows an example of a high frequency amplifier in which two transistors are connected in cascade
  • a high frequency amplifier in which three or more transistors are connected in cascade may be used.
  • a transistor 1 is a pre-stage transistor that amplifies a signal.
  • the transistor 2 is a rear-stage transistor that amplifies the signal amplified by the transistor 1.
  • the transistors 1 and 2 are bipolar transistors will be described.
  • FIG. 1 shows an example
  • the input terminals of transistors 1 and 2 are base terminals 1a and 2a
  • the output terminals of transistors 1 and 2 are collector terminals 1b and 2b
  • the emitter terminals 1c and 2c of transistors 1 and 2 are connected to the ground.
  • An example is shown.
  • the connection form of the input terminals and output terminals of the transistors 1 and 2 is merely an example.
  • the transistors 1 and 2 are bipolar transistors will be described.
  • the transistors 1 and 2 are not limited to bipolar transistors, and may be field effect transistors, for example.
  • the transistors 1 and 2 are field effect transistors, the input terminals of the transistors 1 and 2 are connected to the gate terminal, the output terminals of the transistors 1 and 2 are connected to the drain terminal, and the source terminals of the transistors 1 and 2 are connected to the ground.
  • the form is considered.
  • the harmonic supply circuit 3 is connected between the collector terminal 1b that is the output terminal of the transistor 1 and the base terminal 2a that is the input terminal of the transistor 2, and is included in the signal amplified by the transistor 1 on the front stage side. This is a circuit that blocks the passage of the fundamental wave and supplies harmonics contained in the signal to the transistor 2 on the rear stage side.
  • harmonic matching is performed to match the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the signal amplified by the transistor 1.
  • a circuit etc. can be considered.
  • the fundamental wave supply circuit 4 is connected in parallel with the harmonic wave supply circuit 3 and prevents the harmonic wave contained in the signal amplified by the transistor 1 on the previous stage from passing through and is included in the signal. This is a circuit for supplying a fundamental wave to the transistor 2 on the rear stage side.
  • the circuit configuration of the fundamental wave supply circuit 4 for example, fundamental wave matching that matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the fundamental frequency included in the signal amplified by the transistor 1.
  • a circuit etc. can be considered.
  • the bias circuit 5 is a circuit that applies a bias voltage to the base terminal 2 a of the transistor 2.
  • FIG. 1 shows an example in which the bias circuit 5 is connected to the base terminal 2 a of the transistor 2, but the connecting point may be anywhere as long as it is between the transistor 1 and the transistor 2. It may be connected to the terminal 1b.
  • the harmonic supply circuit 3 When the harmonic supply circuit 3 receives the amplified RF signal from the collector terminal 1b of the transistor 1, the harmonic supply circuit 3 prevents the fundamental wave included in the RF signal from passing, and the harmonic included in the RF signal. Is supplied to the base terminal 2a of the transistor 2 on the rear stage side.
  • the fundamental wave supply circuit 4 blocks the passage of harmonics contained in the RF signal, and the fundamental wave contained in the RF signal. Is supplied to the base terminal 2a of the transistor 2 on the rear stage side.
  • the transistor 2 When the harmonic wave is supplied from the harmonic wave supply circuit 3 to the base terminal 2a and the fundamental wave is supplied from the fundamental wave supply circuit 4 to the base terminal 2a, the transistor 2 superimposes the fundamental wave and the harmonic wave.
  • the signal is amplified, and the amplified signal is output from the collector terminal 2b which is an output terminal.
  • the transistor 2 may be a class F amplifier or an inverse class F amplifier capable of realizing a high efficiency operation.
  • High-efficiency amplifiers such as class F amplifiers and inverse class F amplifiers have a reflection circuit that reflects harmonic power on the output side of the transistor, which is an amplifying element, and the reflection circuit is caused by the nonlinearity of the transistor.
  • High-efficiency operation is realized by reflecting the generated harmonic power to the transistor side and using the harmonic power when the transistor amplifies the RF signal.
  • the most efficient operation when current is supplied to the transistor from the input terminal, the most efficient operation is achieved when the power that is the product of the voltage appearing at the output terminal of the transistor and the current is minimized. Realized. That is, the most efficient operation is realized when the overlap between the current waveform and the voltage waveform is minimized.
  • the high-efficiency amplifier is a class F amplifier
  • the overlap between the current waveform and the voltage waveform is minimized when the current waveform becomes a rectangular wave f (x).
  • the overlap between the current waveform and the voltage waveform is minimized when the voltage waveform becomes a rectangular wave f (x).
  • the fundamental wave and harmonic components of the rectangular wave f (x) are expanded by a Fourier series, the following equation (1) is obtained.
  • x is the phase of the fundamental wave.
  • the transistor 2 achieves high-efficiency operation when a third harmonic wave having an amplitude that is 1/3 of that of the fundamental wave input from the base terminal 2a as an input terminal is input. Is done.
  • the transistor 2 When the transistor 2 is composed of a high-efficiency amplifier such as a class F amplifier or an inverse class F amplifier, a reflection circuit is provided. Therefore, when the RF signal is amplified, the transistor 2 is generated due to the nonlinearity of the transistor 3
  • the harmonic power of the harmonic can be used, in general, the power of the third harmonic generated due to the nonlinearity of the transistor 2 is small, and the amplitude of the harmonic of the third harmonic is It is considerably smaller than one third of the amplitude of the fundamental wave. Therefore, if the harmonic supply circuit 3 is not connected between the stages of the transistor 1 and the transistor 2, it is difficult to operate the transistor 2 with high efficiency.
  • the harmonic supply circuit 3 that supplies the harmonic contained in the RF signal amplified by 1 to the base terminal 2a of the transistor 2 is connected between the stage of the transistor 1 and the transistor 2, the harmonic of the third harmonic
  • the efficiency of the transistor 2 can be increased by bringing the amplitude of the wave closer to one third of the amplitude of the fundamental wave.
  • the fundamental wave included in the RF signal amplified by the transistor 1 on the front stage side is prevented from passing, and the harmonics included in the RF signal are prevented.
  • a harmonic supply circuit 3 that supplies a wave to the transistor 2 on the rear stage side and a harmonic wave included in the RF signal amplified by the transistor 1 on the front stage side are blocked and included in the RF signal. Since the fundamental wave supply circuit 4 for supplying the fundamental wave to the rear-stage transistor 2 is provided, when the rear-stage transistor 2 amplifies the RF signal, the RF signal amplified by the front-stage transistor 1 is converted into an RF signal. The included harmonics can be used. Therefore, it is possible to obtain an effect capable of realizing a high-efficiency operation of the rear-stage transistor 2.
  • the bias circuit 5 for applying a bias voltage to the base terminal 2a of the transistor 2 is connected to the base terminal 2a of the transistor 2.
  • the bias circuit is an internal part of the fundamental wave supply circuit. May be implemented.
  • FIG. 2 is a block diagram showing a high-frequency amplifier according to Embodiment 2 of the present invention.
  • the fundamental wave supply circuit 10 is connected in parallel with the harmonic wave supply circuit 3 and, like the fundamental wave supply circuit 4 in FIG. 1, harmonics contained in the RF signal amplified by the transistor 1 on the preceding stage side. This is a circuit that blocks the passage and supplies the fundamental wave included in the RF signal to the transistor 2 on the rear stage side.
  • the fundamental wave supply circuit 10 has a bias circuit mounted therein.
  • FIG. 3 is a block diagram showing a fundamental wave supply circuit 10 of a high frequency amplifier according to Embodiment 2 of the present invention.
  • the main line 11 is a line connecting the collector terminal 1 b of the transistor 1 and the base terminal 2 a of the transistor 2.
  • the fundamental wave matching circuit 12 includes, for example, filter circuits 12a and 12b including a low-pass filter, a high-pass filter, or a band-pass filter, or filter circuits 12a and 12b in which these filters are combined.
  • 1 is a circuit for matching the output impedance of the transistor 1 and the input impedance of the transistor 2 at the frequency of the fundamental wave included in the RF signal amplified by 1.
  • the fundamental wave matching circuit 12 is a harmonic contained in the RF signal amplified by the transistor 1.
  • Any circuit may be used as long as it is a circuit that prevents the signal from passing through and supplies the fundamental wave contained in the RF signal to the base terminal 2a of the transistor 2, and is not limited to the one constituted by the filter circuits 12a and 12b.
  • it is fundamental from a transmission line, impedance conversion transformer, or impedance conversion balun having a length of one quarter of the wavelength of the fundamental wave that has the function of preventing the passage of harmonic waves and allowing the passage of the fundamental wave.
  • the wave matching circuit 12 can be configured.
  • the bias circuit 13 is a circuit that is connected to the main line 11 and the shunt and applies a bias voltage to the base terminal 2a of the transistor 2.
  • the bias circuit 13 is for the harmonics included in the RF signal amplified by the transistor 1.
  • the short point is formed in the main line 11.
  • One end of the transmission line 13a is connected to the junction 12c between the filter circuit 12a and the filter circuit 12b, and has a length of one quarter of the wavelength of the fundamental wave included in the RF signal amplified by the transistor 1. is there.
  • the DC cut circuit 13b is a circuit that is connected between the other end of the transmission line 13a and the ground, and cuts off a direct current component. It is composed of stubs or interdigital capacitors.
  • the power source 13c is connected between the other end of the transmission line 13a and the ground, and outputs a bias voltage.
  • the fundamental wave matching circuit 12 of the fundamental wave supply circuit 10 prevents the harmonics contained in the RF signal amplified by the transistor 1 from passing, and causes the fundamental wave contained in the RF signal to pass through the base of the transistor 2. This is a circuit to be supplied to the terminal 2a. Therefore, the harmonics included in the RF signal output from the collector terminal 1b of the transistor 1 do not ideally pass through the fundamental matching circuit 12, but some power of the harmonics does not pass through the fundamental matching circuit 12. May pass through.
  • the transmission line 13a of the bias circuit 13 connected to the main line 11 and the shunt is a line having a length that is a quarter of the wavelength of the fundamental wave.
  • the impedance of the bias circuit 13 seen from the junction 12c between the filter circuit 12a and the filter circuit 12b is open at the fundamental wave and shorted at the even harmonics. For this reason, the short point about the harmonic of an even-numbered harmonic is formed in the junction 12c of the filter circuit 12a and the filter circuit 12b. Therefore, even harmonics included in the RF signal output from the collector terminal 1b of the transistor 1 are reflected at the junction 12c where the short point is formed, and are reflected toward the collector terminal 1b side of the transistor 1.
  • the bias circuit 13 has a function of blocking even harmonics, and has higher harmonic blocking performance than the case where the fundamental wave supply circuit 10 is configured by the fundamental wave matching circuit 12 alone. Can be increased.
  • the bias circuit 13 has a function of cutting off even harmonics. However, for example, by connecting an open stub to the junction 12c, the harmonics of odd harmonics can be obtained. A wave blocking function may be provided.
  • the fundamental wave supply circuit 10 has the output impedance of the transistor 1 and the transistor at the frequency of the fundamental wave included in the RF signal amplified by the transistor 1.
  • a fundamental wave matching circuit 12 for matching with the input impedance of 2, and a main line 11 and a shunt connected to the shunt, and a short point for a harmonic contained in the RF signal amplified by the transistor 1 is formed in the main line 11. Therefore, it is possible to improve the cutoff performance of even harmonics as compared with the fundamental wave supply circuit 4 of FIG. Therefore, it is possible to achieve the effect that the high-efficiency operation of the transistor 2 can be realized more reliably than in the first embodiment.
  • the harmonic supply circuit 3 matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the RF signal amplified by the transistor 1.
  • the example comprised by the harmonic matching circuit which aims at this was shown, you may be comprised from the harmonic matching circuit and the phase adjuster which adjusts the phase of a harmonic.
  • the harmonic supply circuit 20 includes a harmonic matching circuit 21 and a phase adjuster 22.
  • the harmonic matching circuit 21 is composed of a high-pass filter, for example, and matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the RF signal amplified by the transistor 1. It is a circuit which aims at.
  • the phase adjuster 22 is a circuit that adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21.
  • the harmonics included in the RF signal are applied to the base terminal of the transistor 2 in order to increase the operation efficiency of the transistor 2 by bringing the current waveform or voltage waveform close to the rectangular wave f (x).
  • a harmonic supply circuit 3 to be supplied to 2a is connected between the stages of the transistor 1 and the transistor 2.
  • the transistor can be further adjusted by adjusting the phase of the harmonic. 2 may be able to increase the operating efficiency.
  • FIG. 5 is an explanatory diagram showing the relationship between the phase difference between the harmonic and the fundamental wave and the operation efficiency of the transistor 2.
  • ⁇ s (2f 0 ) indicated on the horizontal axis indicates the phase difference between the harmonic of the second harmonic contained in the RF signal and the fundamental wave
  • ⁇ PAE indicated on the vertical axis is The operating efficiency of the transistor 2 is shown.
  • the relationship between the phase difference and the operation efficiency of the transistor 2 varies depending on the size of the transistor 1 on the previous stage, the frequency of the RF signal, and the like.
  • the phase difference is about 215 [deg]
  • the transistor The operating efficiency of 2 is the highest.
  • the phase difference when the operation efficiency of the transistor 2 becomes maximum is represented by ⁇ s, max .
  • the phase adjuster 22 adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21 by a preset phase adjustment amount ⁇ M, and supplies the harmonic wave after the phase adjustment to the base terminal 2 a of the transistor 2.
  • the phase difference ⁇ s between the harmonic of the second harmonic contained in the RF signal that is the signal to be amplified by the high-frequency amplifier and the fundamental wave is known at the design stage.
  • the phase difference ⁇ s, mod between the harmonic phase adjusted by the harmonic matching circuit 21 and the fundamental wave coincides with the phase difference ⁇ s, max that maximizes the operation efficiency of the transistor 2.
  • the phase adjustment amount ⁇ M of the harmonic matching circuit 21 is set in advance.
  • the phase adjuster 22 adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21 in the plus direction or the minus direction by the phase adjustment amount ⁇ M set in advance, so that the phase difference ⁇ s, mod coincides with the phase difference ⁇ s, max at which the operation efficiency of the transistor 2 is maximized.
  • the harmonic supply circuit 20 has the output frequency of the transistor 1 and the transistor at the harmonic frequency included in the RF signal amplified by the transistor 1. 2 is configured with a harmonic matching circuit 21 for matching with the input impedance of 2 and a phase adjuster 22 for adjusting the phase of the harmonics that have passed through the harmonic matching circuit 21. In addition, the operation efficiency of the transistor 2 can be further increased.
  • phase adjuster 22 is connected to the output side of the harmonic matching circuit 21, but the phase adjuster 22 is connected to the input side of the harmonic matching circuit 21. It may be a thing.
  • the high-frequency amplifier is mounted with the harmonic supply circuit 20 including the harmonic matching circuit 21 and the phase adjuster 22.
  • the harmonic supply circuit 20 further includes A harmonic attenuator that attenuates the amplitude of the harmonic may be provided.
  • the harmonic supply circuit 30 includes a harmonic matching circuit 21, a phase adjuster 22, and a harmonic attenuator 31.
  • the harmonic attenuator 31 is a circuit that attenuates the amplitude of the harmonic whose phase is adjusted by the phase adjuster 22.
  • the harmonics included in the RF signal are applied to the base terminal of the transistor 2 in order to increase the operation efficiency of the transistor 2 by bringing the current waveform or voltage waveform close to the rectangular wave f (x).
  • a harmonic supply circuit 3 or 20 to be supplied to 2a is connected between the stages of the transistor 1 and the transistor 2.
  • the amplitude of the 3rd harmonic supplied to the base terminal 2a of the transistor 2 is 1/3 of the amplitude of the fundamental wave.
  • the operating efficiency of the transistor 2 is the highest, and the operating efficiency of the transistor 2 is reduced when the amplitude of the third harmonic is greater than one third of the amplitude of the fundamental wave.
  • the amplitude of the third harmonic contained in the RF signal amplified by the transistor 1 is much smaller than one third of the amplitude of the fundamental, and therefore the harmonic supply circuit 3 or 20, even if the harmonics included in the RF signal are supplied to the base terminal 2 a of the transistor 2, the amplitude of the third harmonic is larger than one third of the amplitude of the fundamental wave. Few. However, when the size of the transistor 1 on the front stage side is large and the power of the RF signal output from the transistor 1 is large, or when the frequency of the RF signal is low, the RF signal output from the transistor 1 is included. As a result, the amplitude of the third harmonic wave supplied to the base terminal 2a of the transistor 2 may be larger than one third of the amplitude of the fundamental wave.
  • the harmonic supply circuit 30 includes a harmonic attenuator 31 that attenuates the amplitude of the harmonic.
  • the harmonic supply circuit 30 includes the harmonic matching circuit 21, it is known at the design stage how large the harmonic of the third harmonic is at the base terminal 2a of the transistor 2. It is. For this reason, in the fourth embodiment, the harmonic attenuator 31 is set in advance so that the amplitude of the harmonic of the third harmonic coincides with one third of the amplitude of the fundamental wave.
  • the harmonic supply circuit 30 since the harmonic supply circuit 30 is configured to include the harmonic attenuator 31 that attenuates the amplitude of the harmonic, the harmonic supply circuit 30 includes: By mounting the harmonic matching circuit 21, even when the amplitude of the harmonic of the third harmonic is larger than one third of the amplitude of the fundamental wave, it is possible to realize the high operation efficiency of the transistor 2. Play.
  • the harmonic attenuator 31 is connected to the output side of the phase adjuster 22, but the harmonic is applied to the input side of the harmonic matching circuit 21 or the input side of the phase adjuster 22.
  • the wave attenuator 31 may be connected.
  • the phase adjuster 22 may not be mounted on the harmonic supply circuit 30, and the harmonic attenuator 31 may be connected to the input side or the output side of the harmonic matching circuit 21.
  • Embodiment 5 the high-frequency amplifier capable of realizing the high-efficiency operation of the rear-stage transistor 2 is shown.
  • the high-frequency amplifier according to any one of the first to fourth embodiments is described above.
  • a plurality of amplifier modules that is, a plurality of signal lines in which a plurality of high-frequency amplifiers according to any of the embodiments are connected in series or a plurality of signal lines into which the high-frequency amplifier according to any of the embodiments is inserted. You may make it obtain the provided amplifier module.
  • the high-frequency amplifier according to the present invention is suitable for transistors that need to increase the overall operation efficiency by increasing the operation efficiency of the transistors on the subsequent stage among the transistors connected in cascade.

Abstract

A high-frequency amplifier is provided with: a harmonic supply circuit (3) that blocks passage of a fundamental included in an RF signal amplified by a preceding-stage transistor (1) and supplies a harmonic included in the RF signal to a subsequent-stage transistor (2); and a fundamental supply circuit (4) that blocks passage of the harmonic included in the RF signal amplified by the preceding-stage transistor (1) and supplies the fundamental included in the RF signal to the subsequent-stage transistor (2). As a result, when the subsequent-stage transistor (2) amplifies the RF signal, the harmonic included in the RF signal amplified by the preceding-stage transistor (1) can be used.

Description

高周波増幅器及び増幅器モジュールHigh frequency amplifier and amplifier module
 この発明は、信号を増幅する複数のトランジスタが縦続に接続されている高周波増幅器と、複数の高周波増幅器を実装している増幅器モジュールとに関するものである。 The present invention relates to a high frequency amplifier in which a plurality of transistors for amplifying a signal are connected in cascade, and an amplifier module in which a plurality of high frequency amplifiers are mounted.
 例えば、非特許文献1に開示されている高周波増幅器は、信号を増幅するトランジスタの入出力端子に対して、高調波で4分の1波長の長さを有するオープンスタブと、位相調整線路とからなる高調波整合回路が接続されている。
 トランジスタの入出力端子に高調波整合回路が接続されているため、高効率な動作を実現することができる。
For example, a high-frequency amplifier disclosed in Non-Patent Document 1 includes an open stub having a length of a quarter wavelength of harmonics and a phase adjustment line with respect to an input / output terminal of a transistor that amplifies a signal. A harmonic matching circuit is connected.
Since a harmonic matching circuit is connected to the input / output terminal of the transistor, high-efficiency operation can be realized.
 従来の高周波増幅器は以上のように構成されているので、多段に縦続接続される場合、トランジスタの段間には高調波整合回路が接続される。この高調波整合回路は、オープンスタブを用いて構成しているため、前段側のトランジスタにより増幅された信号に含まれている高調波についてのショート点が、前段側のトランジスタと後段側のトランジスタとを繋ぐ主線路に形成される。このため、前段側のトランジスタにより増幅された信号に含まれている高調波が当該ショート点で反射されて、その高調波が前段側のトランジスタに戻り、その高調波が後段側のトランジスタには供給されない。したがって、後段側のトランジスタでは、信号を増幅するに際して、前段側のトランジスタにより増幅された信号に含まれている高調波を利用することができないという課題があった。 Since the conventional high-frequency amplifier is configured as described above, when cascaded in multiple stages, a harmonic matching circuit is connected between the transistor stages. Since this harmonic matching circuit is configured using an open stub, the short-circuit point for the harmonics included in the signal amplified by the front-stage transistor is different between the front-stage transistor and the rear-stage transistor. It is formed on the main line that connects the two. For this reason, the harmonic contained in the signal amplified by the front-stage transistor is reflected at the short-circuit point, the harmonic returns to the front-stage transistor, and the harmonic is supplied to the rear-stage transistor. Not. Therefore, the latter-stage transistor has a problem that, when a signal is amplified, the harmonics contained in the signal amplified by the former-stage transistor cannot be used.
 この発明は上記のような課題を解決するためになされたもので、後段側のトランジスタが信号を増幅する際、前段側のトランジスタにより増幅された信号に含まれている高調波を利用することができる高周波増幅器を得ることを目的とする。
 また、この発明は、上記の高周波増幅器を複数実装している増幅器モジュールを得ることを目的とする。
The present invention has been made to solve the above-described problems. When the rear-stage transistor amplifies the signal, it is possible to use a harmonic contained in the signal amplified by the front-stage transistor. An object of the present invention is to obtain a high frequency amplifier that can be used.
Another object of the present invention is to obtain an amplifier module on which a plurality of the high-frequency amplifiers are mounted.
 この発明に係る高周波増幅器は、縦続に接続されている複数のトランジスタと、複数のトランジスタの段間に接続されており、前段側のトランジスタにより増幅された信号に含まれている基本波の通過を阻止して、その信号に含まれている高調波を後段側のトランジスタに供給する高調波供給回路と、高調波供給回路と並列に接続されており、前段側のトランジスタにより増幅された信号に含まれている高調波の通過を阻止して、その信号に含まれている基本波を後段側のトランジスタに供給する基本波供給回路とを備えるようにしたものである。 The high-frequency amplifier according to the present invention is connected between a plurality of transistors connected in cascade and a plurality of transistor stages, and passes a fundamental wave contained in a signal amplified by a transistor on the front stage side. A harmonic supply circuit that blocks and supplies the harmonics included in the signal to the subsequent transistor, and is connected in parallel with the harmonic supply circuit, and is included in the signal amplified by the previous transistor. And a fundamental wave supply circuit for preventing the passage of higher harmonics and supplying the fundamental wave included in the signal to the transistor on the rear stage side.
 この発明によれば、前段側のトランジスタにより増幅された信号に含まれている基本波の通過を阻止して、その信号に含まれている高調波を後段側のトランジスタに供給する高調波供給回路と、前段側のトランジスタにより増幅された信号に含まれている高調波の通過を阻止して、その信号に含まれている基本波を後段側のトランジスタに供給する基本波供給回路とを備えるように構成したので、後段側のトランジスタが信号を増幅する際、前段側のトランジスタにより増幅された信号に含まれている高調波を利用することができる効果がある。 According to this invention, the harmonic supply circuit that blocks the passage of the fundamental wave included in the signal amplified by the transistor on the front stage side and supplies the harmonic wave included in the signal to the transistor on the rear stage side. And a fundamental wave supply circuit that blocks passage of harmonics contained in the signal amplified by the front-stage transistor and supplies the fundamental wave contained in the signal to the rear-stage transistor. Thus, when the rear-stage transistor amplifies the signal, there is an effect that the harmonics contained in the signal amplified by the front-stage transistor can be used.
この発明の実施の形態1による高周波増幅器を示す構成図である。1 is a configuration diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention. この発明の実施の形態2による高周波増幅器を示す構成図である。It is a block diagram which shows the high frequency amplifier by Embodiment 2 of this invention. この発明の実施の形態2による高周波増幅器の基本波供給回路10を示す構成図である。It is a block diagram which shows the fundamental wave supply circuit 10 of the high frequency amplifier by Embodiment 2 of this invention. この発明の実施の形態3による高周波増幅器を示す構成図である。It is a block diagram which shows the high frequency amplifier by Embodiment 3 of this invention. 高調波と基本波の位相差と、トランジスタ2の動作効率との関係を示す説明図である。6 is an explanatory diagram showing a relationship between a phase difference between a harmonic and a fundamental wave and an operation efficiency of a transistor 2. この発明の実施の形態4による高周波増幅器を示す構成図である。It is a block diagram which shows the high frequency amplifier by Embodiment 4 of this invention.
 以下、この発明をより詳細に説明するために、この発明を実施するための形態について、添付の図面にしたがって説明する。 Hereinafter, in order to explain the present invention in more detail, modes for carrying out the present invention will be described with reference to the accompanying drawings.
実施の形態1.
 図1はこの発明の実施の形態1による高周波増幅器を示す構成図である。
 図1では、2つのトランジスタが縦続に接続されている高周波増幅器の例を示しているが、3つ以上のトランジスタが縦続に接続されている高周波増幅器であってもよい。
 図1において、トランジスタ1は信号を増幅する前段側のトランジスタである。
 トランジスタ2はトランジスタ1により増幅された信号を増幅する後段側のトランジスタである。
 この実施の形態1では、トランジスタ1,2がバイポーラトランジスタである例を説明する。図1では、トランジスタ1,2の入力端子がベース端子1a,2a、トランジスタ1,2の出力端子がコレクタ端子1b,2bであり、トランジスタ1,2のエミッタ端子1c,2cがグランドと接続されている例を示している。ただし、トランジスタ1,2の入力端子及び出力端子の接続形態はあくまで一例である。
 この実施の形態1では、トランジスタ1,2がバイポーラトランジスタである例を説明するが、トランジスタ1,2がバイポーラトランジスタであるものに限るものではなく、例えば、電界効果トランジスタなどであってもよい。例えば、トランジスタ1,2が電界効果トランジスタであれば、トランジスタ1,2の入力端子がゲート端子、トランジスタ1,2の出力端子がドレイン端子、トランジスタ1,2のソース端子がグランドと接続される接続形態などが考えられる。
Embodiment 1 FIG.
1 is a block diagram showing a high-frequency amplifier according to Embodiment 1 of the present invention.
Although FIG. 1 shows an example of a high frequency amplifier in which two transistors are connected in cascade, a high frequency amplifier in which three or more transistors are connected in cascade may be used.
In FIG. 1, a transistor 1 is a pre-stage transistor that amplifies a signal.
The transistor 2 is a rear-stage transistor that amplifies the signal amplified by the transistor 1.
In the first embodiment, an example in which the transistors 1 and 2 are bipolar transistors will be described. In FIG. 1, the input terminals of transistors 1 and 2 are base terminals 1a and 2a, the output terminals of transistors 1 and 2 are collector terminals 1b and 2b, and the emitter terminals 1c and 2c of transistors 1 and 2 are connected to the ground. An example is shown. However, the connection form of the input terminals and output terminals of the transistors 1 and 2 is merely an example.
In the first embodiment, an example in which the transistors 1 and 2 are bipolar transistors will be described. However, the transistors 1 and 2 are not limited to bipolar transistors, and may be field effect transistors, for example. For example, if the transistors 1 and 2 are field effect transistors, the input terminals of the transistors 1 and 2 are connected to the gate terminal, the output terminals of the transistors 1 and 2 are connected to the drain terminal, and the source terminals of the transistors 1 and 2 are connected to the ground. The form is considered.
 高調波供給回路3はトランジスタ1の出力端子であるコレクタ端子1bと、トランジスタ2の入力端子であるベース端子2aとの間に接続され、前段側のトランジスタ1により増幅された信号に含まれている基本波の通過を阻止して、その信号に含まれている高調波を後段側のトランジスタ2に供給する回路である。
 高調波供給回路3の回路構成として、例えば、トランジスタ1により増幅された信号に含まれている高調波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る高調波整合回路などが考えられる。
The harmonic supply circuit 3 is connected between the collector terminal 1b that is the output terminal of the transistor 1 and the base terminal 2a that is the input terminal of the transistor 2, and is included in the signal amplified by the transistor 1 on the front stage side. This is a circuit that blocks the passage of the fundamental wave and supplies harmonics contained in the signal to the transistor 2 on the rear stage side.
As a circuit configuration of the harmonic supply circuit 3, for example, harmonic matching is performed to match the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the signal amplified by the transistor 1. A circuit etc. can be considered.
 基本波供給回路4は高調波供給回路3と並列に接続されており、前段側のトランジスタ1により増幅された信号に含まれている高調波の通過を阻止して、その信号に含まれている基本波を後段側のトランジスタ2に供給する回路である。
 基本波供給回路4の回路構成として、例えば、トランジスタ1により増幅された信号に含まれている基本波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る基本波整合回路などが考えられる。
The fundamental wave supply circuit 4 is connected in parallel with the harmonic wave supply circuit 3 and prevents the harmonic wave contained in the signal amplified by the transistor 1 on the previous stage from passing through and is included in the signal. This is a circuit for supplying a fundamental wave to the transistor 2 on the rear stage side.
As the circuit configuration of the fundamental wave supply circuit 4, for example, fundamental wave matching that matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the fundamental frequency included in the signal amplified by the transistor 1. A circuit etc. can be considered.
 バイアス回路5はトランジスタ2のベース端子2aにバイアス電圧を印加する回路である。
 図1では、バイアス回路5が、トランジスタ2のベース端子2aと接続されている例を示しているが、トランジスタ1とトランジスタ2の間であれば、接続箇所はどこでもよく、例えば、トランジスタ1のコレクタ端子1bと接続されていてもよい。
The bias circuit 5 is a circuit that applies a bias voltage to the base terminal 2 a of the transistor 2.
FIG. 1 shows an example in which the bias circuit 5 is connected to the base terminal 2 a of the transistor 2, but the connecting point may be anywhere as long as it is between the transistor 1 and the transistor 2. It may be connected to the terminal 1b.
 次に動作について説明する。
 トランジスタ1は、増幅対象の信号であるRF(radio frequency)信号が入力端子であるベース端子1aから入力されると、そのRF信号を増幅し、出力端子であるコレクタ端子1bから増幅後のRF信号を出力する。
Next, the operation will be described.
When an RF (radio frequency) signal that is a signal to be amplified is input from a base terminal 1a that is an input terminal, the transistor 1 amplifies the RF signal, and an RF signal that is amplified from a collector terminal 1b that is an output terminal Is output.
 高調波供給回路3は、トランジスタ1のコレクタ端子1bから増幅後のRF信号を受けると、そのRF信号に含まれている基本波の通過を阻止して、そのRF信号に含まれている高調波を後段側のトランジスタ2のベース端子2aに供給する。
 基本波供給回路4は、トランジスタ1のコレクタ端子1bから増幅後のRF信号を受けると、そのRF信号に含まれている高調波の通過を阻止して、そのRF信号に含まれている基本波を後段側のトランジスタ2のベース端子2aに供給する。
When the harmonic supply circuit 3 receives the amplified RF signal from the collector terminal 1b of the transistor 1, the harmonic supply circuit 3 prevents the fundamental wave included in the RF signal from passing, and the harmonic included in the RF signal. Is supplied to the base terminal 2a of the transistor 2 on the rear stage side.
When receiving the amplified RF signal from the collector terminal 1b of the transistor 1, the fundamental wave supply circuit 4 blocks the passage of harmonics contained in the RF signal, and the fundamental wave contained in the RF signal. Is supplied to the base terminal 2a of the transistor 2 on the rear stage side.
 トランジスタ2は、高調波供給回路3から高調波がベース端子2aに供給され、基本波供給回路4から基本波がベース端子2aに供給されると、その基本波と高調波が重ね合されている信号を増幅し、出力端子であるコレクタ端子2bから増幅後の信号を出力する。 When the harmonic wave is supplied from the harmonic wave supply circuit 3 to the base terminal 2a and the fundamental wave is supplied from the fundamental wave supply circuit 4 to the base terminal 2a, the transistor 2 superimposes the fundamental wave and the harmonic wave. The signal is amplified, and the amplified signal is output from the collector terminal 2b which is an output terminal.
 ここで、トランジスタ2は、高効率な動作を実現するために、高効率動作の実現が可能なF級増幅器や、逆F級増幅器などが用いられることがある。
 F級増幅器や逆F級増幅器などの高効率増幅器では、増幅素子であるトランジスタの出力側に高調波の電力を反射させる反射回路を備えており、その反射回路が、トランジスタの非線形性に起因して生じる高調波の電力をトランジスタ側に反射させ、トランジスタが、RF信号を増幅する際、その高調波の電力を利用することで、高効率な動作を実現している。
 高効率増幅器では、入力端子から電流がトランジスタに供給されている際に、そのトランジスタの出力端子に現れる電圧と、その電流との積である電力が最小になるときに、最も高効率な動作が実現される。即ち、その電流の波形と、その電圧の波形との重なりが最小になるときに、最も高効率な動作が実現される。
Here, in order to realize a highly efficient operation, the transistor 2 may be a class F amplifier or an inverse class F amplifier capable of realizing a high efficiency operation.
High-efficiency amplifiers such as class F amplifiers and inverse class F amplifiers have a reflection circuit that reflects harmonic power on the output side of the transistor, which is an amplifying element, and the reflection circuit is caused by the nonlinearity of the transistor. High-efficiency operation is realized by reflecting the generated harmonic power to the transistor side and using the harmonic power when the transistor amplifies the RF signal.
In a high-efficiency amplifier, when current is supplied to the transistor from the input terminal, the most efficient operation is achieved when the power that is the product of the voltage appearing at the output terminal of the transistor and the current is minimized. Realized. That is, the most efficient operation is realized when the overlap between the current waveform and the voltage waveform is minimized.
 例えば、高効率増幅器がF級増幅器である場合、その電流波形と電圧波形の重なりが最小になるのは、その電流波形が矩形波f(x)になるときであり、また、高効率増幅器が逆F級増幅器である場合、その電流波形と電圧波形の重なりが最小になるのは、その電圧波形が矩形波f(x)になるときである。
 このとき、矩形波f(x)の基本波及び高調波の成分をフーリエ級数で展開すると、下記の式(1)のようになる。
Figure JPOXMLDOC01-appb-I000001
 式(1)において、xは基本波の位相である。
For example, when the high-efficiency amplifier is a class F amplifier, the overlap between the current waveform and the voltage waveform is minimized when the current waveform becomes a rectangular wave f (x). In the case of an inverse class F amplifier, the overlap between the current waveform and the voltage waveform is minimized when the voltage waveform becomes a rectangular wave f (x).
At this time, when the fundamental wave and harmonic components of the rectangular wave f (x) are expanded by a Fourier series, the following equation (1) is obtained.
Figure JPOXMLDOC01-appb-I000001
In equation (1), x is the phase of the fundamental wave.
 式(1)より、振幅が小さい5倍波以上の高調波を無視すると、基本波の振幅に対して、3倍波の高調波の振幅が3分の1になるとき、電流波形又は電圧波形が矩形波f(x)に近づいて、効率が向上する。
 したがって、トランジスタ2が、入力端子であるベース端子2aから入力される基本波と比べて、振幅が3分の1である3倍波の高調波が入力されるときに、高効率な動作が実現される。
From the equation (1), when ignoring harmonics with a small fifth or higher harmonic, when the amplitude of the third harmonic is one third of the amplitude of the fundamental wave, the current waveform or voltage waveform Approaches the rectangular wave f (x), and the efficiency is improved.
Therefore, the transistor 2 achieves high-efficiency operation when a third harmonic wave having an amplitude that is 1/3 of that of the fundamental wave input from the base terminal 2a as an input terminal is input. Is done.
 トランジスタ2が、F級増幅器や逆F級増幅器などの高効率増幅器で構成されている場合、反射回路を備えているため、RF信号を増幅する際、トランジスタ2の非線形性に起因して生じる3倍波の高調波の電力を利用することができるが、一般的に、トランジスタ2の非線形性に起因して生じる3倍波の高調波の電力は小さく、3倍波の高調波の振幅は、基本波の振幅の3分の1よりかなり小さい。
 したがって、トランジスタ1とトランジスタ2の段間に、高調波供給回路3が接続されていなければ、トランジスタ2を高効率で動作させることが困難であるが、この実施の形態1では、前段側のトランジスタ1により増幅されたRF信号に含まれている高調波をトランジスタ2のベース端子2aに供給する高調波供給回路3がトランジスタ1とトランジスタ2の段間に接続されているため、3倍波の高調波の振幅を、基本波の振幅の3分の1に近づけて、トランジスタ2の効率を高めることができる。
When the transistor 2 is composed of a high-efficiency amplifier such as a class F amplifier or an inverse class F amplifier, a reflection circuit is provided. Therefore, when the RF signal is amplified, the transistor 2 is generated due to the nonlinearity of the transistor 3 Although the harmonic power of the harmonic can be used, in general, the power of the third harmonic generated due to the nonlinearity of the transistor 2 is small, and the amplitude of the harmonic of the third harmonic is It is considerably smaller than one third of the amplitude of the fundamental wave.
Therefore, if the harmonic supply circuit 3 is not connected between the stages of the transistor 1 and the transistor 2, it is difficult to operate the transistor 2 with high efficiency. Since the harmonic supply circuit 3 that supplies the harmonic contained in the RF signal amplified by 1 to the base terminal 2a of the transistor 2 is connected between the stage of the transistor 1 and the transistor 2, the harmonic of the third harmonic The efficiency of the transistor 2 can be increased by bringing the amplitude of the wave closer to one third of the amplitude of the fundamental wave.
 以上で明らかなように、この実施の形態1によれば、前段側のトランジスタ1により増幅されたRF信号に含まれている基本波の通過を阻止して、そのRF信号に含まれている高調波を後段側のトランジスタ2に供給する高調波供給回路3と、前段側のトランジスタ1により増幅されたRF信号に含まれている高調波の通過を阻止して、そのRF信号に含まれている基本波を後段側のトランジスタ2に供給する基本波供給回路4とを備えるように構成したので、後段側のトランジスタ2がRF信号を増幅する際、前段側のトランジスタ1により増幅されたRF信号に含まれている高調波を利用することができる。したがって、後段側のトランジスタ2の高効率動作を実現することができる効果が得られる。 As apparent from the above, according to the first embodiment, the fundamental wave included in the RF signal amplified by the transistor 1 on the front stage side is prevented from passing, and the harmonics included in the RF signal are prevented. A harmonic supply circuit 3 that supplies a wave to the transistor 2 on the rear stage side and a harmonic wave included in the RF signal amplified by the transistor 1 on the front stage side are blocked and included in the RF signal. Since the fundamental wave supply circuit 4 for supplying the fundamental wave to the rear-stage transistor 2 is provided, when the rear-stage transistor 2 amplifies the RF signal, the RF signal amplified by the front-stage transistor 1 is converted into an RF signal. The included harmonics can be used. Therefore, it is possible to obtain an effect capable of realizing a high-efficiency operation of the rear-stage transistor 2.
実施の形態2.
 上記実施の形態1では、トランジスタ2のベース端子2aにバイアス電圧を印加するバイアス回路5が、トランジスタ2のベース端子2aと接続されているものを示したが、バイアス回路が基本波供給回路の内部に実装されているものであってもよい。
Embodiment 2. FIG.
In the first embodiment, the bias circuit 5 for applying a bias voltage to the base terminal 2a of the transistor 2 is connected to the base terminal 2a of the transistor 2. However, the bias circuit is an internal part of the fundamental wave supply circuit. May be implemented.
 図2はこの発明の実施の形態2による高周波増幅器を示す構成図であり、図2において、図1と同一符号は同一または相当部分を示すので説明を省略する。
 基本波供給回路10は高調波供給回路3と並列に接続されており、図1の基本波供給回路4と同様に、前段側のトランジスタ1により増幅されたRF信号に含まれている高調波の通過を阻止して、そのRF信号に含まれている基本波を後段側のトランジスタ2に供給する回路である。
 基本波供給回路10は、図1の基本波供給回路4と異なり、内部にバイアス回路を実装している。
2 is a block diagram showing a high-frequency amplifier according to Embodiment 2 of the present invention. In FIG. 2, the same reference numerals as those in FIG.
The fundamental wave supply circuit 10 is connected in parallel with the harmonic wave supply circuit 3 and, like the fundamental wave supply circuit 4 in FIG. 1, harmonics contained in the RF signal amplified by the transistor 1 on the preceding stage side. This is a circuit that blocks the passage and supplies the fundamental wave included in the RF signal to the transistor 2 on the rear stage side.
Unlike the fundamental wave supply circuit 4 of FIG. 1, the fundamental wave supply circuit 10 has a bias circuit mounted therein.
 図3はこの発明の実施の形態2による高周波増幅器の基本波供給回路10を示す構成図であり、図3において、図1と同一符号は同一または相当部分を示すので説明を省略する。図3では、図面の簡略化のため、高調波供給回路3を省略している。
 主線路11はトランジスタ1のコレクタ端子1bとトランジスタ2のベース端子2aとを繋いでいる線路である。
 基本波整合回路12は例えば低域通過フィルタ、高域通過フィルタ又は帯域通過フィルタを含むフィルタ回路12a,12b、あるいは、それらのフィルタが組み合わされているフィルタ回路12a,12bから構成されており、トランジスタ1により増幅されたRF信号に含まれている基本波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る回路である。
FIG. 3 is a block diagram showing a fundamental wave supply circuit 10 of a high frequency amplifier according to Embodiment 2 of the present invention. In FIG. 3, the same reference numerals as those in FIG. In FIG. 3, the harmonic supply circuit 3 is omitted for simplification of the drawing.
The main line 11 is a line connecting the collector terminal 1 b of the transistor 1 and the base terminal 2 a of the transistor 2.
The fundamental wave matching circuit 12 includes, for example, filter circuits 12a and 12b including a low-pass filter, a high-pass filter, or a band-pass filter, or filter circuits 12a and 12b in which these filters are combined. 1 is a circuit for matching the output impedance of the transistor 1 and the input impedance of the transistor 2 at the frequency of the fundamental wave included in the RF signal amplified by 1.
 ここでは、2つのフィルタ回路12a,12bから構成されている基本波整合回路12の例を示しているが、基本波整合回路12は、トランジスタ1により増幅されたRF信号に含まれている高調波の通過を阻止して、そのRF信号に含まれている基本波をトランジスタ2のベース端子2aに供給する回路であればよく、フィルタ回路12a,12bから構成されているものに限るものではない。
 例えば、高調波の通過を阻止して、基本波の通過を許容する機能を有する基本波の波長の4分の1の長さを有する伝送線路、インピーダンス変換トランス、あるいは、インピーダンス変換バランなどから基本波整合回路12を構成することができる。
Here, an example of the fundamental wave matching circuit 12 composed of two filter circuits 12a and 12b is shown, but the fundamental wave matching circuit 12 is a harmonic contained in the RF signal amplified by the transistor 1. Any circuit may be used as long as it is a circuit that prevents the signal from passing through and supplies the fundamental wave contained in the RF signal to the base terminal 2a of the transistor 2, and is not limited to the one constituted by the filter circuits 12a and 12b.
For example, it is fundamental from a transmission line, impedance conversion transformer, or impedance conversion balun having a length of one quarter of the wavelength of the fundamental wave that has the function of preventing the passage of harmonic waves and allowing the passage of the fundamental wave. The wave matching circuit 12 can be configured.
 バイアス回路13は主線路11とシャントに接続され、トランジスタ2のベース端子2aにバイアス電圧を印加する回路であり、バイアス回路13は、トランジスタ1により増幅されたRF信号に含まれている高調波についてのショート点を主線路11に形成するように作用する。
 伝送線路13aは一端がフィルタ回路12aとフィルタ回路12bの接合点12cに接続され、トランジスタ1により増幅されたRF信号に含まれている基本波の波長の4分の1の長さを有する線路である。
 DCカット回路13bは伝送線路13aの他端とグランド間に接続されて、直流成分を遮断する回路であり、例えば、コンデンサ、オープンスタブ、基本波の波長の4分の1より長い線路を有するショートスタブ、あるいは、インターデジタルキャパシタなどから構成される。
 電源13cは伝送線路13aの他端とグランド間に接続されており、バイアス電圧を出力する。
The bias circuit 13 is a circuit that is connected to the main line 11 and the shunt and applies a bias voltage to the base terminal 2a of the transistor 2. The bias circuit 13 is for the harmonics included in the RF signal amplified by the transistor 1. The short point is formed in the main line 11.
One end of the transmission line 13a is connected to the junction 12c between the filter circuit 12a and the filter circuit 12b, and has a length of one quarter of the wavelength of the fundamental wave included in the RF signal amplified by the transistor 1. is there.
The DC cut circuit 13b is a circuit that is connected between the other end of the transmission line 13a and the ground, and cuts off a direct current component. It is composed of stubs or interdigital capacitors.
The power source 13c is connected between the other end of the transmission line 13a and the ground, and outputs a bias voltage.
 次に動作について説明する。
 基本波供給回路10以外は、上記実施の形態1と同様であるため、ここでは、基本波供給回路10について説明する。
 基本波供給回路10の基本波整合回路12は、トランジスタ1により増幅されたRF信号に含まれている高調波の通過を阻止して、そのRF信号に含まれている基本波をトランジスタ2のベース端子2aに供給する回路である。
 したがって、トランジスタ1のコレクタ端子1bから出力されたRF信号に含まれている高調波は、理想的には、基本波整合回路12を通過しないが、高調波の若干の電力が基本波整合回路12を通過する可能性がある。
Next, the operation will be described.
Since the components other than the fundamental wave supply circuit 10 are the same as those in the first embodiment, the fundamental wave supply circuit 10 will be described here.
The fundamental wave matching circuit 12 of the fundamental wave supply circuit 10 prevents the harmonics contained in the RF signal amplified by the transistor 1 from passing, and causes the fundamental wave contained in the RF signal to pass through the base of the transistor 2. This is a circuit to be supplied to the terminal 2a.
Therefore, the harmonics included in the RF signal output from the collector terminal 1b of the transistor 1 do not ideally pass through the fundamental matching circuit 12, but some power of the harmonics does not pass through the fundamental matching circuit 12. May pass through.
 しかし、この実施の形態2では、主線路11とシャントに接続されているバイアス回路13の伝送線路13aが、基本波の波長の4分の1の長さを有する線路であるため、基本波整合回路12におけるフィルタ回路12aとフィルタ回路12bの接合点12cからバイアス回路13側を見込んだインピーダンスが、基本波でオープン、偶数倍波の高調波でショートとなる。
 このため、フィルタ回路12aとフィルタ回路12bの接合点12cに、偶数倍波の高調波についてのショート点が形成される。
 したがって、トランジスタ1のコレクタ端子1bから出力されたRF信号に含まれている偶数倍波の高調波は、ショート点が形成されている接合点12cで反射されて、トランジスタ1のコレクタ端子1b側に戻るため、そのRF信号に含まれている偶数倍波の高調波がトランジスタ2のベース端子2aに供給されなくなる。
 つまり、バイアス回路13は、偶数倍波の高調波の遮断機能を備えており、基本波整合回路12だけで基本波供給回路10を構成する場合よりも、偶数倍波の高調波の遮断性能を高めることができる。
 この実施の形態2では、バイアス回路13が、偶数倍波の高調波の遮断機能を備えているものを示したが、例えば、オープンスタブを接合点12cに接続するなどによって、奇数倍波の高調波の遮断機能を備えるようにしてもよい。
However, in the second embodiment, the transmission line 13a of the bias circuit 13 connected to the main line 11 and the shunt is a line having a length that is a quarter of the wavelength of the fundamental wave. In the circuit 12, the impedance of the bias circuit 13 seen from the junction 12c between the filter circuit 12a and the filter circuit 12b is open at the fundamental wave and shorted at the even harmonics.
For this reason, the short point about the harmonic of an even-numbered harmonic is formed in the junction 12c of the filter circuit 12a and the filter circuit 12b.
Therefore, even harmonics included in the RF signal output from the collector terminal 1b of the transistor 1 are reflected at the junction 12c where the short point is formed, and are reflected toward the collector terminal 1b side of the transistor 1. Therefore, even harmonics included in the RF signal are not supplied to the base terminal 2a of the transistor 2.
In other words, the bias circuit 13 has a function of blocking even harmonics, and has higher harmonic blocking performance than the case where the fundamental wave supply circuit 10 is configured by the fundamental wave matching circuit 12 alone. Can be increased.
In the second embodiment, the bias circuit 13 has a function of cutting off even harmonics. However, for example, by connecting an open stub to the junction 12c, the harmonics of odd harmonics can be obtained. A wave blocking function may be provided.
 以上で明らかなように、この実施の形態2によれば、基本波供給回路10が、トランジスタ1により増幅されたRF信号に含まれている基本波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る基本波整合回路12と、主線路11とシャントに接続され、トランジスタ1により増幅されたRF信号に含まれている高調波についてのショート点を主線路11に形成するバイアス回路13とから構成されているので、図1の基本波供給回路4よりも、偶数倍波の高調波の遮断性能を高めることができる。したがって、上記実施の形態1よりも確実にトランジスタ2の高効率動作を実現することができる効果が得られる。 As can be seen from the above, according to the second embodiment, the fundamental wave supply circuit 10 has the output impedance of the transistor 1 and the transistor at the frequency of the fundamental wave included in the RF signal amplified by the transistor 1. A fundamental wave matching circuit 12 for matching with the input impedance of 2, and a main line 11 and a shunt connected to the shunt, and a short point for a harmonic contained in the RF signal amplified by the transistor 1 is formed in the main line 11. Therefore, it is possible to improve the cutoff performance of even harmonics as compared with the fundamental wave supply circuit 4 of FIG. Therefore, it is possible to achieve the effect that the high-efficiency operation of the transistor 2 can be realized more reliably than in the first embodiment.
実施の形態3.
 上記実施の形態1,2では、高調波供給回路3が、トランジスタ1により増幅されたRF信号に含まれている高調波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る高調波整合回路で構成されている例を示したが、その高調波整合回路と、高調波の位相を調整する位相調整器とから構成されているものであってもよい。
Embodiment 3 FIG.
In the first and second embodiments, the harmonic supply circuit 3 matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the RF signal amplified by the transistor 1. Although the example comprised by the harmonic matching circuit which aims at this was shown, you may be comprised from the harmonic matching circuit and the phase adjuster which adjusts the phase of a harmonic.
 図4はこの発明の実施の形態3による高周波増幅器を示す構成図であり、図4において、図1及び図2と同一符号は同一または相当部分を示すので説明を省略する。
 高調波供給回路20は高調波整合回路21と位相調整器22から構成されている。
 高調波整合回路21は例えば高域通過フィルタなどから構成され、トランジスタ1により増幅されたRF信号に含まれている高調波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る回路である。
 位相調整器22は高調波整合回路21を通過した高調波の位相を調整する回路である。
4 is a block diagram showing a high frequency amplifier according to Embodiment 3 of the present invention. In FIG. 4, the same reference numerals as those in FIGS.
The harmonic supply circuit 20 includes a harmonic matching circuit 21 and a phase adjuster 22.
The harmonic matching circuit 21 is composed of a high-pass filter, for example, and matches the output impedance of the transistor 1 and the input impedance of the transistor 2 at the harmonic frequency included in the RF signal amplified by the transistor 1. It is a circuit which aims at.
The phase adjuster 22 is a circuit that adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21.
 次に動作について説明する。
 上記実施の形態1,2では、電流波形又は電圧波形を矩形波f(x)に近づけて、トランジスタ2の動作効率を高めるために、RF信号に含まれている高調波をトランジスタ2のベース端子2aに供給する高調波供給回路3をトランジスタ1とトランジスタ2の段間に接続している。
 しかし、トランジスタ2のベース端子2aに供給する高調波と基本波の位相差と、トランジスタ2の動作効率との間には一定の関係があるため、高調波の位相を調整すれば、さらに、トランジスタ2の動作効率を高めることができることがある。
Next, the operation will be described.
In the first and second embodiments, the harmonics included in the RF signal are applied to the base terminal of the transistor 2 in order to increase the operation efficiency of the transistor 2 by bringing the current waveform or voltage waveform close to the rectangular wave f (x). A harmonic supply circuit 3 to be supplied to 2a is connected between the stages of the transistor 1 and the transistor 2.
However, since there is a certain relationship between the phase difference between the harmonic and the fundamental wave supplied to the base terminal 2a of the transistor 2 and the operation efficiency of the transistor 2, the transistor can be further adjusted by adjusting the phase of the harmonic. 2 may be able to increase the operating efficiency.
 図5は高調波と基本波の位相差と、トランジスタ2の動作効率との関係を示す説明図である。
 図5において、横軸に示している∠Γ(2f)は、RF信号に含まれている2倍波の高調波と基本波との位相差を示し、縦軸に示しているΔPAEはトランジスタ2の動作効率を示している。
 位相差とトランジスタ2の動作効率との関係は、前段側のトランジスタ1のサイズや、RF信号の周波数などによって変化するが、図5の例では、位相差が約215[deg]のとき、トランジスタ2の動作効率が最高になっている。以下、トランジスタ2の動作効率が最高になるときの位相差を∠Γs,maxで表すものとする。
FIG. 5 is an explanatory diagram showing the relationship between the phase difference between the harmonic and the fundamental wave and the operation efficiency of the transistor 2.
In FIG. 5, ∠Γ s (2f 0 ) indicated on the horizontal axis indicates the phase difference between the harmonic of the second harmonic contained in the RF signal and the fundamental wave, and ΔPAE indicated on the vertical axis is The operating efficiency of the transistor 2 is shown.
The relationship between the phase difference and the operation efficiency of the transistor 2 varies depending on the size of the transistor 1 on the previous stage, the frequency of the RF signal, and the like. In the example of FIG. 5, when the phase difference is about 215 [deg], the transistor The operating efficiency of 2 is the highest. Hereinafter, the phase difference when the operation efficiency of the transistor 2 becomes maximum is represented by ∠Γ s, max .
 位相調整器22は、事前に設定されている位相調整量ΔMだけ、高調波整合回路21を通過した高調波の位相を調整し、位相調整後の高調波をトランジスタ2のベース端子2aに供給する。
 一般的に、高周波増幅器による増幅対象の信号であるRF信号に含まれている2倍波の高調波と基本波との位相差∠Γは、設計段階で既知である。
 このため、高調波整合回路21により調整された高調波の位相と、基本波との位相差∠Γs,modが、トランジスタ2の動作効率が最高になる位相差∠Γs,maxと一致するように、高調波整合回路21の位相調整量ΔMが事前に設定される。
   ΔM=|∠Γs,mod-∠Γ|     (2)
 これにより、位相調整器22が事前に設定されている位相調整量ΔMだけ、高調波整合回路21を通過した高調波の位相をプラス方向又はマイナス方向に調整することで、位相差∠Γs,modが、トランジスタ2の動作効率が最高になる位相差∠Γs,maxと一致するようになる。
The phase adjuster 22 adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21 by a preset phase adjustment amount ΔM, and supplies the harmonic wave after the phase adjustment to the base terminal 2 a of the transistor 2. .
In general, the phase difference ∠Γ s between the harmonic of the second harmonic contained in the RF signal that is the signal to be amplified by the high-frequency amplifier and the fundamental wave is known at the design stage.
For this reason, the phase difference ∠Γ s, mod between the harmonic phase adjusted by the harmonic matching circuit 21 and the fundamental wave coincides with the phase difference ∠Γ s, max that maximizes the operation efficiency of the transistor 2. As described above, the phase adjustment amount ΔM of the harmonic matching circuit 21 is set in advance.
ΔM = | ∠Γ s, mod −∠Γ s | (2)
Thereby, the phase adjuster 22 adjusts the phase of the harmonic wave that has passed through the harmonic matching circuit 21 in the plus direction or the minus direction by the phase adjustment amount ΔM set in advance, so that the phase difference ∠Γ s, mod coincides with the phase difference ∠Γ s, max at which the operation efficiency of the transistor 2 is maximized.
 以上で明らかなように、この実施の形態3によれば、高調波供給回路20が、トランジスタ1により増幅されたRF信号に含まれている高調波の周波数で、トランジスタ1の出力インピーダンスと、トランジスタ2の入力インピーダンスとの整合を図る高調波整合回路21と、高調波整合回路21を通過した高調波の位相を調整する位相調整器22とから構成されているので、上記実施の形態1,2よりも更にトランジスタ2の動作効率を高めることができる効果がある。 As is apparent from the above, according to the third embodiment, the harmonic supply circuit 20 has the output frequency of the transistor 1 and the transistor at the harmonic frequency included in the RF signal amplified by the transistor 1. 2 is configured with a harmonic matching circuit 21 for matching with the input impedance of 2 and a phase adjuster 22 for adjusting the phase of the harmonics that have passed through the harmonic matching circuit 21. In addition, the operation efficiency of the transistor 2 can be further increased.
 この実施の形態3では、高調波整合回路21の出力側に位相調整器22が接続されている例を示しているが、高調波整合回路21の入力側に位相調整器22が接続されているものであってもよい。 In the third embodiment, an example is shown in which the phase adjuster 22 is connected to the output side of the harmonic matching circuit 21, but the phase adjuster 22 is connected to the input side of the harmonic matching circuit 21. It may be a thing.
実施の形態4.
 上記実施の形態3では、高周波増幅器が、高調波整合回路21と位相調整器22から構成されている高調波供給回路20を実装しているものを示したが、高調波供給回路20が、さらに、高調波の振幅を減衰させる高調波減衰器を備えるようにしてもよい。
Embodiment 4 FIG.
In the third embodiment, the high-frequency amplifier is mounted with the harmonic supply circuit 20 including the harmonic matching circuit 21 and the phase adjuster 22. However, the harmonic supply circuit 20 further includes A harmonic attenuator that attenuates the amplitude of the harmonic may be provided.
 図6はこの発明の実施の形態4による高周波増幅器を示す構成図であり、図6において、図4と同一符号は同一または相当部分を示すので説明を省略する。
 高調波供給回路30は高調波整合回路21、位相調整器22及び高調波減衰器31から構成されている。
 高調波減衰器31は位相調整器22により位相が調整された高調波の振幅を減衰させる回路である。
6 is a block diagram showing a high-frequency amplifier according to Embodiment 4 of the present invention. In FIG. 6, the same reference numerals as those in FIG.
The harmonic supply circuit 30 includes a harmonic matching circuit 21, a phase adjuster 22, and a harmonic attenuator 31.
The harmonic attenuator 31 is a circuit that attenuates the amplitude of the harmonic whose phase is adjusted by the phase adjuster 22.
 上記実施の形態1~3では、電流波形又は電圧波形を矩形波f(x)に近づけて、トランジスタ2の動作効率を高めるために、RF信号に含まれている高調波をトランジスタ2のベース端子2aに供給する高調波供給回路3又は20をトランジスタ1とトランジスタ2の段間に接続している。
 式(1)から明らかなように、5倍波以上の高調波を無視すると、トランジスタ2のベース端子2aに供給する3倍波の高調波の振幅が、基本波の振幅の3分の1であるときにトランジスタ2の動作効率が最も高くなり、3倍波の高調波の振幅が、基本波の振幅の3分の1よりも大きくなると、トランジスタ2の動作効率が低下する。
In the first to third embodiments, the harmonics included in the RF signal are applied to the base terminal of the transistor 2 in order to increase the operation efficiency of the transistor 2 by bringing the current waveform or voltage waveform close to the rectangular wave f (x). A harmonic supply circuit 3 or 20 to be supplied to 2a is connected between the stages of the transistor 1 and the transistor 2.
As is clear from the equation (1), if the harmonics of 5th harmonic or higher are ignored, the amplitude of the 3rd harmonic supplied to the base terminal 2a of the transistor 2 is 1/3 of the amplitude of the fundamental wave. At some point, the operating efficiency of the transistor 2 is the highest, and the operating efficiency of the transistor 2 is reduced when the amplitude of the third harmonic is greater than one third of the amplitude of the fundamental wave.
 一般的には、トランジスタ1により増幅されたRF信号に含まれている3倍波の高調波の振幅は、基本波の振幅の3分の1よりも、かなり小さいため、高調波供給回路3又は20が、RF信号に含まれている高調波をトランジスタ2のベース端子2aに供給しても、3倍波の高調波の振幅が、基本波の振幅の3分の1よりも大きくなることは少ない。
 しかし、前段側のトランジスタ1のサイズが大きくて、トランジスタ1から出力されるRF信号の電力が大きい場合や、そのRF信号の周波数が低い場合などでは、トランジスタ1から出力されるRF信号に含まれている高調波の振幅が大きくなり、その結果、トランジスタ2のベース端子2aに供給される3倍波の高調波の振幅が、基本波の振幅の3分の1よりも大きくなることがある。
In general, the amplitude of the third harmonic contained in the RF signal amplified by the transistor 1 is much smaller than one third of the amplitude of the fundamental, and therefore the harmonic supply circuit 3 or 20, even if the harmonics included in the RF signal are supplied to the base terminal 2 a of the transistor 2, the amplitude of the third harmonic is larger than one third of the amplitude of the fundamental wave. Few.
However, when the size of the transistor 1 on the front stage side is large and the power of the RF signal output from the transistor 1 is large, or when the frequency of the RF signal is low, the RF signal output from the transistor 1 is included. As a result, the amplitude of the third harmonic wave supplied to the base terminal 2a of the transistor 2 may be larger than one third of the amplitude of the fundamental wave.
 そこで、この実施の形態4では、3倍波の高調波の振幅が、基本波の振幅の3分の1よりも大きくなる場合でも、トランジスタ2の高い動作効率を実現するため、高調波供給回路30が、高調波の振幅を減衰させる高調波減衰器31を備えている。
 なお、高調波供給回路30が、高調波整合回路21を備えることで、トランジスタ2のベース端子2aにおいて、3倍波の高調波の振幅がどのぐらいの大きさになるかは、設計段階で既知である。このため、この実施の形態4では、3倍波の高調波の振幅が、基本波の振幅の3分の1と一致するような減衰量が高調波減衰器31に事前に設定されているものとする。
Therefore, in the fourth embodiment, even if the amplitude of the harmonic of the third harmonic is larger than one third of the amplitude of the fundamental wave, the harmonic supply circuit 30 includes a harmonic attenuator 31 that attenuates the amplitude of the harmonic.
Note that, since the harmonic supply circuit 30 includes the harmonic matching circuit 21, it is known at the design stage how large the harmonic of the third harmonic is at the base terminal 2a of the transistor 2. It is. For this reason, in the fourth embodiment, the harmonic attenuator 31 is set in advance so that the amplitude of the harmonic of the third harmonic coincides with one third of the amplitude of the fundamental wave. And
 以上で明らかなように、この実施の形態4によれば、高調波供給回路30が、高調波の振幅を減衰させる高調波減衰器31を備えるように構成したので、高調波供給回路30が、高調波整合回路21を実装することで、3倍波の高調波の振幅が、基本波の振幅の3分の1よりも大きくなる場合でも、トランジスタ2の高い動作効率を実現することができる効果を奏する。 As apparent from the above, according to the fourth embodiment, since the harmonic supply circuit 30 is configured to include the harmonic attenuator 31 that attenuates the amplitude of the harmonic, the harmonic supply circuit 30 includes: By mounting the harmonic matching circuit 21, even when the amplitude of the harmonic of the third harmonic is larger than one third of the amplitude of the fundamental wave, it is possible to realize the high operation efficiency of the transistor 2. Play.
 この実施の形態4では、位相調整器22の出力側に高調波減衰器31が接続されている例を示しているが、高調波整合回路21の入力側又は位相調整器22の入力側に高調波減衰器31が接続されているものであってもよい。
 また、位相調整器22が高調波供給回路30に実装されておらず、高調波整合回路21の入力側又は出力側に高調波減衰器31が接続されているものであってもよい。
In the fourth embodiment, an example is shown in which the harmonic attenuator 31 is connected to the output side of the phase adjuster 22, but the harmonic is applied to the input side of the harmonic matching circuit 21 or the input side of the phase adjuster 22. The wave attenuator 31 may be connected.
Further, the phase adjuster 22 may not be mounted on the harmonic supply circuit 30, and the harmonic attenuator 31 may be connected to the input side or the output side of the harmonic matching circuit 21.
実施の形態5.
 上記実施の形態1~4では、後段側のトランジスタ2の高効率動作を実現することができる高周波増幅器を示したが、上記実施の形態1~4のうち、いずれかの実施の形態の高周波増幅器を複数実装している増幅器モジュール、即ち、いずれかの実施の形態の高周波増幅器を複数直列に接続している信号線路や、いずれかの実施の形態の高周波増幅器が挿入されている信号線路を複数備えている増幅器モジュールを得るようにしてもよい。
Embodiment 5 FIG.
In the first to fourth embodiments, the high-frequency amplifier capable of realizing the high-efficiency operation of the rear-stage transistor 2 is shown. However, the high-frequency amplifier according to any one of the first to fourth embodiments is described above. A plurality of amplifier modules, that is, a plurality of signal lines in which a plurality of high-frequency amplifiers according to any of the embodiments are connected in series or a plurality of signal lines into which the high-frequency amplifier according to any of the embodiments is inserted. You may make it obtain the provided amplifier module.
 なお、本願発明はその発明の範囲内において、各実施の形態の自由な組み合わせ、あるいは各実施の形態の任意の構成要素の変形、もしくは各実施の形態において任意の構成要素の省略が可能である。 In the present invention, within the scope of the invention, any combination of the embodiments, or any modification of any component in each embodiment, or omission of any component in each embodiment is possible. .
 この発明に係る高周波増幅器は、縦続に接続されているトランジスタのうち、後段側のトランジスタの動作効率を高めて、全体の動作効率を高める必要があるものに適している。 The high-frequency amplifier according to the present invention is suitable for transistors that need to increase the overall operation efficiency by increasing the operation efficiency of the transistors on the subsequent stage among the transistors connected in cascade.
 1 トランジスタ(前段側のトランジスタ)、1a ベース端子、1b コレクタ端子、1c エミッタ端子、2 トランジスタ(後段側のトランジスタ)、2a ベース端子、2b コレクタ端子、2c エミッタ端子、3 高調波供給回路、4 基本波供給回路、5 バイアス回路、10 基本波供給回路、11 主線路、12 基本波整合回路、12a,12b フィルタ回路、12c 接続点、13 バイアス回路、13a 伝送線路、13b DCカット回路、13c 電源、20 高調波供給回路、21 高調波整合回路、22 位相調整器、30 高調波供給回路、31 高調波減衰器。 1 transistor (front-stage transistor), 1a base terminal, 1b collector terminal, 1c emitter terminal, 2 transistor (rear-stage transistor), 2a base terminal, 2b collector terminal, 2c emitter terminal, 3 harmonic supply circuit, 4 basic Wave supply circuit, 5 bias circuit, 10 fundamental wave supply circuit, 11 main line, 12 fundamental wave matching circuit, 12a, 12b filter circuit, 12c connection point, 13 bias circuit, 13a transmission line, 13b DC cut circuit, 13c power supply, 20 harmonic supply circuit, 21 harmonic matching circuit, 22 phase adjuster, 30 harmonic supply circuit, 31 harmonic attenuator.

Claims (5)

  1.  縦続に接続されている複数のトランジスタと、
     前記複数のトランジスタの段間に接続されており、前段側のトランジスタにより増幅された信号に含まれている基本波の通過を阻止して、前記信号に含まれている高調波を後段側のトランジスタに供給する高調波供給回路と、
     前記高調波供給回路と並列に接続されており、前段側のトランジスタにより増幅された信号に含まれている高調波の通過を阻止して、前記信号に含まれている基本波を後段側のトランジスタに供給する基本波供給回路と
     を備えた高周波増幅器。
    A plurality of transistors connected in cascade;
    Connected between the stages of the plurality of transistors, blocks the fundamental wave included in the signal amplified by the transistor on the front stage side, and converts the harmonics included in the signal to the transistor on the rear stage side A harmonic supply circuit for supplying to
    Connected in parallel with the harmonic supply circuit, blocks the harmonics contained in the signal amplified by the previous-stage transistor, and transmits the fundamental wave contained in the signal to the subsequent-stage transistor. A high-frequency amplifier comprising a fundamental wave supply circuit for supplying to the circuit.
  2.  前記基本波供給回路は、
     前段側のトランジスタと後段側のトランジスタとを繋ぐ主線路に挿入され、前段側のトランジスタにより増幅された信号に含まれている基本波の周波数で、前段側のトランジスタの出力インピーダンスと、後段側のトランジスタの入力インピーダンスとの整合を図る基本波整合回路と、
     前記主線路とシャントに接続され、前段側のトランジスタにより増幅された信号に含まれている高調波についてのショート点を前記主線路に形成するバイアス回路とから構成されていることを特徴とする請求項1記載の高周波増幅器。
    The fundamental wave supply circuit includes:
    Inserted into the main line connecting the front-stage transistor and the rear-stage transistor, and at the fundamental frequency contained in the signal amplified by the front-stage transistor, the output impedance of the front-stage transistor and the rear-stage transistor A fundamental matching circuit that matches the input impedance of the transistor;
    A bias circuit connected to the main line and a shunt and configured to form a short point on the main line with respect to a harmonic contained in a signal amplified by a transistor on the front stage side. Item 4. The high frequency amplifier according to Item 1.
  3.  前記高調波供給回路は、
     前段側のトランジスタにより増幅された信号に含まれている高調波の周波数で、前段側のトランジスタの出力インピーダンスと、後段側のトランジスタの入力インピーダンスとの整合を図る高調波整合回路と、
     前記高調波の位相を調整する位相調整器とから構成されていることを特徴とする請求項1記載の高周波増幅器。
    The harmonic supply circuit is
    A harmonic matching circuit that matches the output impedance of the front-stage transistor and the input impedance of the rear-stage transistor at the harmonic frequency included in the signal amplified by the front-stage transistor;
    2. The high-frequency amplifier according to claim 1, comprising a phase adjuster for adjusting a phase of the harmonic.
  4.  前記高調波供給回路は、
     前段側のトランジスタにより増幅された信号に含まれている高調波の周波数で、前段側のトランジスタの出力インピーダンスと、後段側のトランジスタの入力インピーダンスとの整合を図る高調波整合回路と、
     前記高調波の振幅を減衰させる高調波減衰器とから構成されていることを特徴とする請求項1記載の高周波増幅器。
    The harmonic supply circuit is
    A harmonic matching circuit that matches the output impedance of the front-stage transistor and the input impedance of the rear-stage transistor at the harmonic frequency included in the signal amplified by the front-stage transistor;
    The high-frequency amplifier according to claim 1, comprising a harmonic attenuator that attenuates the amplitude of the harmonic.
  5.  信号を増幅する高周波増幅器を複数備えており、
     前記高周波増幅器は、
     縦続に接続されている複数のトランジスタと、
     前記複数のトランジスタの段間に接続されており、前段側のトランジスタにより増幅された信号に含まれている基本波の通過を阻止して、前記信号に含まれている高調波を後段側のトランジスタに供給する高調波供給回路と、
     前記高調波供給回路と並列に接続されており、前段側のトランジスタにより増幅された信号に含まれている高調波の通過を阻止して、前記信号に含まれている基本波を後段側のトランジスタに供給する基本波供給回路とから構成されていることを特徴とする増幅器モジュール。
    It has multiple high frequency amplifiers that amplify the signal,
    The high-frequency amplifier is
    A plurality of transistors connected in cascade;
    Connected between the stages of the plurality of transistors, blocks the fundamental wave included in the signal amplified by the transistor on the front stage side, and converts the harmonics included in the signal to the transistor on the rear stage side A harmonic supply circuit for supplying to
    Connected in parallel with the harmonic supply circuit, blocks the harmonics contained in the signal amplified by the previous-stage transistor, and transmits the fundamental wave contained in the signal to the subsequent-stage transistor. An amplifier module comprising: a fundamental wave supply circuit that supplies power to
PCT/JP2016/050671 2016-01-12 2016-01-12 High-frequency amplifier and amplifier module WO2017122271A1 (en)

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WO2020158080A1 (en) * 2019-01-29 2020-08-06 住友電気工業株式会社 Higher harmonics processing circuit and amplifier
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