JPWO2018109930A1 - Doherty amplifier - Google Patents

Abstract

A Doherty amplifier having high saturated output power performance and good power efficiency performance in linear operation is obtained. In a series-connected doherty amplifier configured using a balun, a carrier amplifier is connected to one balanced terminal T2 of a synthesis circuit via an impedance conversion circuit, and a peak amplifier is: The other balanced terminal T3 of the combining circuit 200 is connected, and the combined output signal is output from the unbalanced terminal T1 of the combining circuit 200.

Description

  The present invention relates to a Doherty amplifier for use in transmitters of wireless communication, having high saturated output power performance and good power efficiency performance during linear operation.

A communication signal for high-speed wireless communication has a high PAPR (Peak to Average Power Ratio), and a power amplifier used for a transmitter operates with an average power smaller than a saturated output power. Therefore, to reduce the power consumption of the transmitter, a power amplifier with high efficiency at average power is required. A Doherty amplifier proposed by Doherty as such a power amplifier is effective (see, for example, Non-Patent Document 1).
As the output power of the power amplifier increases, the size of the transistor used therein increases and the output impedance of the transistor decreases. Therefore, in a power amplifier having a large output power, the matching circuit of the transistor requires a high impedance conversion ratio, which causes problems such as narrow band performance and an increase in loss of the matching circuit. For this reason, a high-performance Doherty amplifier is desired which has small problems such as narrow band performance and increased matching circuit loss even at high power operation.
Also, it is known to apply a balun to a power amplifier (see, for example, Patent Document 1).

Patent No. 5829885

W. H. Doherty "A new high efficiency power amplifier for modulated waves," Proc. IRE, vol. 24, No. 9, pp. 1163-1182, Sept. 1936.

  18 to 20 show circuit diagrams of conventional Doherty amplifiers proposed by Doherty (see, for example, Non-Patent Document 1). The Doherty amplifier is configured by combining the carrier amplifier 100 operating in classes AB to B and the peak amplifier 101 operating in class C to obtain high efficiency performance even in linear operation at low signal levels. As this Doherty amplifier, two configurations of a parallel load connection type shown in FIG. 18 and a series load connection type configured in combination with the baluns 102 and 103 shown in FIG. 19 or 20 have been proposed. In the Doherty amplifier circuit shown in FIG. 18, a splitter 206 is provided on the input side, and λ / 4 lines 20a and 20b and a phase adjustment line 105 are provided on the line.

  Here, in the parallel load connection type configuration, the impedance conversion ratio at the time of performing output matching of the carrier amplifier 100 and the peak amplifier 101 is generally larger than that of the serial load connection type configuration, and as a result, the configuration of the output matching circuit Problems such as narrowband performance and increased matching circuit loss.

  In order to solve this problem in the parallel load connection configuration, it is possible to use a series load connection configuration in which the impedance transformation ratio of the matching circuit is smaller than this. Doherty first proposed a series load connected Doherty amplifier configured as shown in FIG. In the series load connection type circuit configuration of FIG. 19, the transistor of the peak amplifier 101 (vacuum tube at that time) operates on the premise that the output impedance in the linear operation becomes short circuit. However, in the transistor of the actual peak amplifier 101, the output impedance in the linear operation does not become a short circuit but is rather open. Therefore, this problem can be solved by loading the impedance conversion circuit 104 for converting an open circuit into a short circuit on the output side of the peak amplifier 101 during linear operation as shown in FIG. In the configuration of FIG. 20, the phase adjustment line 105 is provided on the input side of the carrier amplifier 100 due to the provision of the impedance conversion circuit 104.

  However, in the configuration of FIG. 20, the impedance conversion circuit 104 provided on the output side of the peak amplifier 101 is used to optimize the impedance condition for looking at the output load side from the carrier amplifier 100 during linear operation and saturation operation. It is necessary to realize by using. For this reason, there is a problem that it is not direct to achieve the optimum load impedance condition for the carrier amplifier 100, and as a result, it is difficult to obtain the optimum impedance condition.

  The present invention has been made to solve the problems as described above, and it is an object of the present invention to provide a Doherty amplifier that can achieve good power efficiency even in linear operation.

  According to the present invention, in a Doherty amplifier, a distribution circuit for dividing an input signal into a first input signal and a second input signal having a phase difference from each other, a carrier amplifier for amplifying the first input signal, and a second input signal. The peak amplifier whose output impedance is open at the time of small-signal operation where the linear operation is also performed, the impedance conversion circuit connected to the output side of the carrier amplifier, and the carrier amplifier amplifies and outputs through the impedance conversion circuit A carrier circuit is connected to one balanced terminal of the synthesis circuit via an impedance conversion circuit, including a synthesis circuit composed of a balun that synthesizes one output signal and a second output signal amplified and output by the peak amplifier. Peak amplifier is connected to the other balanced terminal of the combining circuit, and Output signal is output.

  According to the present invention, it is possible to provide a Doherty amplifier capable of achieving good power efficiency even during linear operation, which makes it possible to reduce the power consumption of a wireless transmitter.

FIG. 1 is a circuit diagram showing a Doherty amplifier according to a first embodiment of the present invention. FIG. 1 is a circuit diagram showing a synthesis circuit of a Doherty amplifier according to a first embodiment of the present invention. It is a circuit diagram for demonstrating the operation | movement of the synthetic | combination circuit of the Doherty amplifier in Embodiment 1 of this invention. FIG. 5 is a circuit diagram showing a distribution circuit used for the Doherty amplifier in the first embodiment of the present invention. FIG. 7 is a circuit diagram showing another example of the distribution circuit used for the Doherty amplifier according to the first embodiment of the present invention. FIG. 7 is a circuit diagram showing another example of the distribution circuit used for the Doherty amplifier according to the first embodiment of the present invention. It is a figure which shows the drain efficiency characteristic with respect to the back-off amount from the saturation output voltage of the Doherty amplifier in Embodiment 1 of this invention. FIG. 7 is a circuit diagram showing a Doherty amplifier according to a second embodiment of the present invention. FIG. 7 is a circuit diagram showing a synthesis circuit of a Doherty amplifier according to a second embodiment of the present invention. FIG. 7 is a circuit diagram showing a Doherty amplifier according to a third embodiment of the present invention. FIG. 13 is a circuit diagram showing a Doherty amplifier according to a fourth embodiment of the present invention. FIG. 13 is a circuit diagram showing a synthesis circuit of a Doherty amplifier according to a fourth embodiment of the present invention. FIG. 17 is a circuit diagram showing another example of the synthesis circuit used for the Doherty amplifier according to the fourth embodiment of the present invention. FIG. 14 is a circuit diagram showing a Doherty amplifier according to a fifth embodiment of the present invention. FIG. 21 is a circuit diagram showing a distribution circuit used for a Doherty amplifier according to a fifth embodiment of the present invention. It is a circuit diagram showing a Doherty amplifier according to a sixth embodiment of the present invention. It is a circuit diagram showing a Doherty amplifier according to a seventh embodiment of the present invention. It is a circuit diagram showing a conventional Doherty amplifier. FIG. 7 is a circuit diagram showing another example of a conventional Doherty amplifier. FIG. 7 is a circuit diagram showing another example of a conventional Doherty amplifier.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the drawings, the same reference numerals indicate the same or corresponding parts.

Embodiment 1
FIG. 1 is a circuit diagram showing a configuration of a Doherty amplifier according to a first embodiment of the present invention. The Doherty amplifier includes a distribution circuit 202 distributes the input signal S1 to the first input signal S2 and the second input signal S3 having a proper phase difference theta _d each other, a carrier amplifier 100 for amplifying the first input signal S2, A peak amplifier 101 which amplifies the second input signal S3 and whose output impedance is open in the small signal operation, an impedance conversion circuit 201 connected to the output side of the carrier amplifier 100, and an impedance conversion which is amplified by the carrier amplifier 100 It comprises a combining circuit 200 that combines the first output signal S4 output via the circuit 201 and the second output signal S5 amplified and output by the peak amplifier 101.

FIG. 2 is a circuit diagram showing a detailed configuration of the synthesis circuit 200 of the first embodiment. The synthesis circuit 200 is configured using a first coupled transmission line 300 and a second coupled transmission line 310 having a length of 1⁄4 wavelength with respect to the fundamental frequency f ₀ and having equal performance. It is a balun. The first coupled transmission line 300 is composed of a first transmission line 301 and a second transmission line 302 disposed in parallel and in close proximity to each other. The first transmission line 301 has a first terminal p1 and a second terminal p2. The second transmission line 302 faces the first terminal p1 and faces the fourth terminal p4 and the second terminal p2. It has a terminal p3. The second coupled transmission line 310 is composed of a third transmission line 311 and a fourth transmission line 312 disposed in parallel and in close proximity to each other. The third transmission line 311 has a fifth terminal p5 and a sixth terminal p6. The fourth transmission line 312 faces the fifth terminal p5 and faces the eighth terminal p8 and the sixth terminal p6. It has a terminal p7. The second terminal p2, the fifth terminal p5, and the sixth terminal p6 are short-circuited to the ground, and the fourth terminal p4 and the seventh terminal p7 are connected to each other. The first terminal p1 forms an unbalanced terminal T1 between the first terminal p1 and the ground, and the third terminal p3 and the eighth terminal p8 form balanced terminals T2 and T3 in opposite phase to each other. As a thing equivalent to such a balun, there exists a thing of patent document 1, for example.

  The output side of the carrier amplifier 100 is connected to one balanced terminal T2 of the synthesis circuit 200 via the impedance conversion circuit 201, and the output side of the peak amplifier 101 is connected to the other balanced terminal T3 of the synthesis circuit 200. . A combined output signal of the first output signal S4 and the second output signal S5 combined by the combining circuit 200 is output from the unbalanced terminal T1.

Next, the operation will be described.
In the synthesis circuit 200 shown in FIG. 2, the even mode characteristic impedance Z _oe and the odd mode characteristic impedance Z _oo of the first coupled transmission line 300 and the second coupled transmission line 310 are output load connected to the unbalanced terminal T 1. The impedance Z _s and the impedance Z _{L of the} load connected to the balanced terminals T 2 and T 3 are designed in advance so as to satisfy the following equation (1).
In the following, in order to make the description easy to understand, it is assumed that the load impedances Z _s and Z _L are real numbers, and further that Z _L = R.

In the saturation operation (large signal operation), the carrier amplifier 100 and the peak amplifier 101 operate in the same manner as a normal push-pull amplifier, and the balanced terminal T2 and the balanced terminal T3 operate as balanced terminals operating in opposite phase to each other. As a result, the impedances Z ₂ and Z _{3 obtained by} considering the synthesis circuit 200 from the balanced terminal T 2 and the balanced terminal T 3 at the time of saturation operation are given by the following equation (2) at the time of matching.

Next, when one balanced terminal T3 is opened as shown in FIG. 3 (this corresponds to the fact that the output impedance Z _out of the peak amplifier 101 is opened in the small signal operation in which the linear operation is performed), the other the following relational expression (3) holds from one balanced terminal T2 with respect to the impedance Z ₂ in anticipation of the combining circuit 200.

Therefore, the impedance _{Z 2} when linear operation (small signal operation), the formula (1) to equation (3), is given by the following equation (4).

From the above, as an open balanced terminal T3, the impedance Z ₂ in anticipation of the combining circuit 200 from the balanced terminal T2, when operating as a balanced terminal balanced terminal T2 and the balanced terminal T3 is operated in opposite phases, balanced terminal T2 The impedance Z ₂ is half the impedance Z ₂ estimated from the synthesis circuit 200. Therefore, the Doherty amplifier of the present invention shown in FIG. 1, by using the balun synthesis circuit 200, at the time of the output impedance Z _out linear operation to be the opening of the peak amplifier 101, from the carrier amplifier 100 side combining circuit 200 side I expected but the impedance _{Z 2} is _Z 2 = R / 2, and the at the time of saturation operation the carrier amplifier 100 and peak amplifier 101 operates equilibrium impedance _Z 2, _{Z 3 becomes Z 2} = Z 3 = R.

In general, the amplifier in high efficiency as the value of the load impedance Z ₁ looking into the load side from the transistor is increased, conversely, as the output power value of the load impedance Z ₁ becomes small becomes high. Therefore, high efficiency is the value of the load impedance Z ₁ is increased at the time of linear operation desired, during saturation operation a large output power is desired controlling the load impedance in accordance with the power level so that the value of the load impedance Z ₁ is reduced There is a need to. In order to realize such an impedance condition, an impedance conversion circuit 201 is provided between the carrier amplifier 100 and the combining circuit 200.

Here, the impedance conversion circuit 201, a load impedance _{Z 1} of the carrier amplifier 100 allow for load side, at the time of linear operation to _Z 1 = 2R, furthermore, at the time of saturation operation is impedance converted into _Z 1 = R. Such impedance conversion can be realized by using a transmission line or a circuit in which an inductor L and a capacitor C are combined.

Incidentally, including the phase delay theta _t due to the impedance conversion circuit 201, since the first output signal S4 and the second output signal S5 is set to be in opposite phase in a balanced terminal T2 and the balanced terminal T3, from the distribution circuit 202 phase difference theta _d between first input signal S2 and the second input signal S3 is provided at the fundamental frequency f ₀ so as to satisfy the following equation (5).

  4 to 6 show various configuration examples of the distribution circuit 202. FIG. The distribution circuit shown in FIG. 4 is configured by combining a balun 400 that performs reverse phase distribution and a phase adjustment line 401. The distribution circuit shown in FIG. 5 is configured by combining an in-phase distributor 402 such as a Wilson coupler and a phase adjustment line 403. The distribution circuit shown in FIG. 6 is configured using a 90 ° hybrid circuit 404.

On the other hand, when the maximum voltage amplitude of the carrier amplifier 100 and peak amplifier 101 and _{V max,} respectively the output power of the carrier amplifier 100 and peak amplifier 101 at saturation _{operation, V} ^max 2 / R, and the synthesized in the synthesizing circuit 200 The maximum output power is P _sat = V _max ² / R + V _max ² / R = 2 V _max ² / R. On the other hand, the output power (maximum value of output power) in the linear operation where only the carrier amplifier 100 is operating is P _out = V _max ² / (2R), and is 1/4 times the output power P _{sat in} the saturation operation. It becomes (-6 dB).

  FIG. 7 shows the drain efficiency with respect to the back-off amount from the saturated output power of the Doherty amplifier according to the first embodiment of the present invention, and for the above reasons, high efficiency performance is obtained even in linear operation as shown in FIG. Operate as a Doherty amplifier.

From the above, unlike the conventional series load connection type Doherty amplifier shown in FIG. 20, the series load connection type Doherty amplifier according to the first embodiment of the present invention shown in FIG. The impedance in view of the side is open (Z _out = ∞), but an impedance conversion circuit for converting this into a short circuit is unnecessary on the peak amplifier 101 side. On the other hand, since the impedance conversion circuit 201 is provided on the output side of the carrier amplifier 100, it is possible to directly and easily control the optimum impedance condition for the load side from the carrier amplifier 100 during linear operation and saturation operation. It is possible.

  Thus, according to the present invention, in the series load connection type Doherty amplifier, the optimum load impedance condition at the time of linear operation and saturation operation for the carrier amplifier is directly determined using the impedance conversion circuit provided at the output side of the carrier amplifier. The present invention provides a Doherty amplifier that allows control. This makes it possible to easily realize the optimum load impedance condition according to the operation level of the carrier amplifier.

Second Embodiment
FIG. 8 is a circuit diagram showing the configuration of a Doherty amplifier according to the second embodiment of the present invention, and the basic configuration is the same as that of the Doherty amplifier according to the first embodiment shown in FIG. It is. Therefore, the same reference numerals as the reference numerals in the circuit diagram shown in FIG. 1 indicate the same or corresponding parts, and the description will be omitted. FIG. 9 is a circuit diagram showing a detailed configuration of the synthesis circuit 210 used in the second embodiment.

The combining circuit 210 shown in FIG. 9 is configured using a coupled transmission line 320 having a length of 1⁄4 wavelength with respect to the fundamental frequency f ₀ and a transmission line 330 having a length of 1⁄4 wavelength. The balun. The coupled transmission line 320 is composed of a first transmission line 321 and a second transmission line 322 disposed in parallel and in close proximity to each other. The first transmission line 321 has a first terminal p1 and a second terminal p2, and the second transmission line 322 has a fourth terminal p4 facing the first terminal p1 and a third terminal p3 facing the second terminal p2. have. The transmission line 330 having a length of 1⁄4 wavelength includes an eighth terminal p8 and a seventh terminal p7. That is, this combining circuit 210 is configured without using the second combined transmission line 310 in the combining circuit 200 shown in FIG. The second terminal p2 is shorted to ground. The fourth terminal p4 and the seventh terminal p7 are connected to each other. The first terminal p1 forms an unbalanced terminal T1 between the first terminal p1 and the ground, and the third terminal p3 and the eighth terminal p8 form balanced terminals T2 and T3 in opposite phase to each other.

  The balun used in the synthesis circuit 210 of the Doherty amplifier of the second embodiment shown in FIG. 9 is a characteristic equivalent to that of the balun used in the synthesis circuit 200 of the Doherty amplifier of the first embodiment shown in FIG. The Doherty amplifier of mode 2 operates in the same manner as the Doherty amplifier of the first embodiment.

Third Embodiment
Figure 10 is a circuit diagram showing the configuration of a Doherty amplifier according to a third embodiment of the present invention, instead of the impedance conversion circuit 201 of FIG. 1 showing the first embodiment, the fundamental wave frequency f ₀ 1 / It is configured using a 1⁄4 wavelength transmission line 203 having a length of 4 wavelengths. The same reference numerals as the reference numerals in the circuit diagrams of the Doherty amplifiers of the first and second embodiments indicate the same or corresponding parts, and the description will be omitted. Further, the synthesis circuit 200 may be configured using the synthesis circuit 210 shown in FIG. 9 as in the second embodiment.

In the third embodiment, in particular, assuming that the characteristic impedance Z ₀ of the 1⁄4 wavelength transmission line 203 is Z ₀ = R, then the impedance Z ₂ = R / 2 for looking at the combination circuit side is Z ₁ = 2R, and , Z ₂ = R can be impedance transformed to Z ₁ = R.
Since the phase delay θ _t of the 1⁄4 wavelength transmission line 203 is approximately 90 degrees, the phase difference θ _d in the distribution circuit 202 is designed to be approximately 90 degrees from the relationship of equation (5). .
Also in the third embodiment, the same effects as those of the first and second embodiments can be obtained.

Fourth Embodiment
FIG. 11 is a circuit diagram of a Doherty amplifier according to the fourth embodiment of the present invention, and FIGS. 12 and 13 are circuit diagrams showing a detailed configuration of a synthesis circuit 220 used in the fourth embodiment. The combining circuit 220 shown in FIG. 13 shows another example in which the second combined transmission line 310 in FIG. 12 is not used. The same reference numerals as in the circuit diagrams of the Doherty amplifiers of the first to third embodiments denote the same or corresponding parts, and a description thereof will be omitted.

The synthesis circuit 220 of FIG. 12 is a balun used in the synthesis circuit of the Doherty amplifier according to the first embodiment shown in FIG. 2 and has a secondary at the ninth terminal p9 between the fourth terminal p4 and the seventh terminal p7 connected to each other. A second harmonic injection extraction circuit 340 having an injection extraction terminal T4 for injecting or extracting harmonics is provided. For example, as shown in FIG. 12, the second harmonic injection extraction circuit 340 connects the transmission lines 341 and 342 of 1⁄4 wavelength to the fundamental frequency f ₀ in series and connects them in series to a second connection point. It can be configured by providing an injection / extraction terminal T4 for injecting or extracting harmonics, and setting the other end of the transmission line 341 as an open end. This makes it possible to inject and extract the second harmonic without affecting the fundamental wave, and as a result, it is possible to easily realize the optimum circuit conditions for the second harmonic frequency.

The synthesis circuit 220 of FIG. 13 is a balun used in the synthesis circuit of the Doherty amplifier of the second embodiment shown in FIG. 9 and has a secondary at the ninth terminal p9 between the fourth terminal p4 and the seventh terminal p7 connected to each other. A second harmonic injection extraction circuit 340 having an injection extraction terminal T4 for injecting or extracting harmonics is provided, and the characteristic is equivalent to that of the synthesis circuit 220 shown in FIG.
Also in the fourth embodiment, the same effects as in the first to third embodiments can be obtained.

Embodiment 5
FIG. 14 is a circuit diagram showing a configuration of a Doherty amplifier according to the fifth embodiment of the present invention, and FIG. 15 is a circuit diagram showing a detailed configuration of distribution circuit 204 used in the fifth embodiment. The same reference numerals as in the circuit diagrams of the Doherty amplifiers of the first to fourth embodiments denote the same or corresponding parts, and a description thereof will be omitted. Further, the synthesis circuit 200 may be configured using the synthesis circuit 210 as in the second embodiment.

The distribution circuit 204 includes a balun 400, a second harmonic injection extraction circuit 405 having an injection extraction terminal T5 for injecting or extracting a second harmonic, and a phase adjustment line 401.
The second harmonic injection extraction circuit 405 enables the injection extraction of the second harmonic without affecting the fundamental wave, and as a result, the optimum circuit conditions for the second harmonic frequency can be easily achieved. It will be realized.
Also in the fifth embodiment, the same effects as in the first to third embodiments can be obtained.

Sixth Embodiment
FIG. 16 is a circuit diagram of a Doherty amplifier according to a sixth embodiment of the present invention. The same reference numerals as in the circuit diagrams of the Doherty amplifiers of the first to fifth embodiments denote the same or corresponding parts, and the description will be omitted. Further, as in the fourth embodiment, the combining circuit 220 may be configured using either the combining circuit 220 shown in FIG. 12 or the combining circuit 220 shown in FIG.

Similar to the distribution circuit of the fifth embodiment shown in FIG. 15, distribution circuit 204 has a balun 400 and a second harmonic injection extraction circuit 405 having an injection extraction terminal T5 for injecting or extracting the second harmonic and a phase adjustment line And 401.
The second harmonic injection extraction circuit 405 enables the injection extraction of the second harmonic without affecting the fundamental wave, and as a result, the optimum circuit conditions for the second harmonic frequency can be easily achieved. It will be realized.
Also in the sixth embodiment, the same effect as the first to fifth embodiments can be obtained.

Embodiment 7
FIG. 17 is a circuit diagram showing a configuration of a Doherty amplifier according to a seventh embodiment of the present invention.
As the synthesizing circuit, the synthesizing circuit 220 shown in the fourth embodiment is used, and as the distributing circuit, the distributing circuit 204 shown in the fifth embodiment is used. Like the fourth embodiment, the combining circuit 220 may be configured using either the combining circuit 220 shown in FIG. 12 or the combining circuit 220 shown in FIG.
Adjust the amplitude and phase of the second harmonic between the injection / extraction terminal T4 for injecting or extracting the second harmonic of the synthesis circuit 220 and the injection / extraction terminal T5 for injecting or extracting the second harmonic of the distribution circuit 204 The second harmonic amplitude and phase adjustment circuit 205 is loaded.

With this configuration, feedback to the second harmonic that injects the second harmonic generated at the output side of the Doherty amplifier to the input side with appropriate amplitude and phase, or the second harmonic generated at the input side of the Doherty amplifier It is possible to feed forward harmonics to the output side with an appropriate amplitude and phase at the output side, which enables high efficiency and low distortion of the Doherty amplifier.
Also in the seventh embodiment, the same effects as in the first to sixth embodiments can be obtained.

The present invention can freely combine each embodiment within the scope of the invention, or can appropriately modify or omit each embodiment.

Reference Signs List 100 carrier amplifier, 101 peak amplifier, 200, 210, 220 synthesis circuit, 201 impedance conversion circuit, 202, 204 distribution circuit, 203 quarter wavelength transmission line, 205 second harmonic amplitude / phase adjustment circuit, 300 first combination Transmission line, 301 first transmission line, 302 second transmission line, 310 second coupled transmission line, 311 third transmission line, 312 fourth transmission line, 320 coupled transmission line, 321 first transmission line, 322 second transmission line , 330 transmission line, 340, 405 second harmonic injection extraction circuit, 341, 342 transmission line, 400 balun, 401, 403 phase adjustment line, S1 input signal, S2 first input signal, S3 second input signal, S4 second 1 output signal, S5 second output signal, p1 first terminal, p2 second terminal, p3 third terminal, p 4 fourth terminal, p5 fifth terminal, p6 sixth terminal, p7 seventh terminal, p8 eighth terminal, p9 ninth terminal, T1 unbalanced terminal, T2, T3 balanced terminal, T4, T5 injection / extraction terminal.

Claims (8)

  A distribution circuit for dividing an input signal into a first input signal and a second input signal having a phase difference from each other, a carrier amplifier for amplifying the first input signal, and a small operation for amplifying the second input signal and performing linear operation A peak amplifier whose output impedance is open during signal operation, an impedance conversion circuit connected to the output side of the carrier amplifier, and a first output signal amplified by the carrier amplifier and output via the impedance conversion circuit And a synthesis circuit composed of a balun that synthesizes the second output signal amplified and output by the peak amplifier, and the carrier amplifier is connected to one balanced terminal of the synthesis circuit via the impedance conversion circuit. Connected and the peaking amplifier is connected to the other balanced terminal of the combining circuit, and the Doherty amplifier, characterized in that the output signal synthesized from the terminal is output. The combining circuit is a balun configured using a first coupled transmission line and a second coupled transmission line having a length of 1⁄4 wavelength with respect to a fundamental wave frequency,
The first coupled transmission line is composed of a first transmission line and a second transmission line disposed in parallel and in close proximity to each other, and the first transmission line has a first terminal and a second terminal, The second transmission line has a third terminal opposite to the first terminal and opposite to the fourth terminal, and a third terminal.
The second coupled transmission line is composed of a third transmission line and a fourth transmission line arranged in parallel and in close proximity to each other, and the third transmission line has a fifth terminal and a sixth terminal, The fourth transmission line has a seventh terminal facing the fifth terminal and the eighth terminal facing the fifth terminal, and
The second terminal, the fifth terminal and the sixth terminal are short-circuited to ground, the fourth terminal and the seventh terminal are connected to each other, and the first terminal forms an unbalanced terminal with the ground; The Doherty amplifier according to claim 1, wherein the three terminals and the eighth terminal form balanced terminals in opposite phase to each other. The combining circuit is a balun configured using a coupled transmission line having a length of 1⁄4 wavelength with respect to a fundamental frequency and a transmission line having a length of 1⁄4 wavelength,
The coupled transmission line is composed of a first transmission line and a second transmission line arranged in parallel and in proximity to each other, and the first transmission line has a first terminal and a second terminal, and the second transmission The line has a fourth terminal facing the first terminal and a third terminal facing the second terminal,
The transmission line has a seventh terminal and an eighth terminal,
The second terminal is short-circuited to ground, the fourth terminal and the seventh terminal are connected to each other, the first terminal forms an unbalanced terminal with the ground, and the third terminal and the eighth terminal are each connected. The Doherty amplifier according to claim 1, characterized in that it comprises balanced terminals in opposite phase to each other.   The impedance conversion circuit according to claim 1, wherein the impedance conversion circuit comprises a quarter wavelength transmission line having a predetermined characteristic impedance and a length of a quarter wavelength to the fundamental frequency. A Doherty amplifier according to any one of the preceding claims.   The said synthetic | combination circuit is comprised by the balun which the 2nd harmonic injection extraction circuit which has an injection extraction terminal which injects or extracts a 2nd harmonic is loaded. A Doherty amplifier according to any one of the preceding claims.   The distribution circuit includes a balun loaded with a second harmonic injection extraction circuit having an injection extraction terminal for injecting or extracting a second harmonic, and a phase adjustment line. The Doherty amplifier according to any one of Items 4.   The combining circuit comprises a balun loaded with a second harmonic injection extraction circuit having an injection extraction terminal for injecting or extracting the second harmonic, and the distribution circuit is an injection for injecting or extracting the second harmonic The Doherty amplifier according to any one of claims 1 to 4, characterized by comprising a balun loaded with a second harmonic injection extraction circuit having an extraction terminal and a phase adjustment line.   Adjusting the amplitude and phase of the second harmonic between the injection / extraction terminal for injecting or extracting the second harmonic of the synthesis circuit and the injection / extraction terminal for injecting or extracting the second harmonic of the distribution circuit 8. A Doherty amplifier according to claim 7, characterized in that a second harmonic amplitude and phase adjustment circuit is loaded.

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