WO2017121243A1 - Active layer, thin film transistor, array substrate, and display apparatus and fabrication methods - Google Patents

Active layer, thin film transistor, array substrate, and display apparatus and fabrication methods Download PDF

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Publication number
WO2017121243A1
WO2017121243A1 PCT/CN2016/112952 CN2016112952W WO2017121243A1 WO 2017121243 A1 WO2017121243 A1 WO 2017121243A1 CN 2016112952 W CN2016112952 W CN 2016112952W WO 2017121243 A1 WO2017121243 A1 WO 2017121243A1
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Prior art keywords
thin film
approximately
active layer
film transistor
indium oxide
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PCT/CN2016/112952
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French (fr)
Inventor
Liangchen YAN
Guangcai Yuan
Xiaoguang XU
Lei Wang
Junbiao Peng
Linfeng Lan
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Boe Technology Group Co., Ltd.
South China University Of Technology
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Application filed by Boe Technology Group Co., Ltd., South China University Of Technology filed Critical Boe Technology Group Co., Ltd.
Priority to KR1020177016036A priority Critical patent/KR20180010173A/en
Priority to US15/534,415 priority patent/US20180061990A1/en
Priority to JP2017532605A priority patent/JP6806682B2/en
Priority to EP16871752.8A priority patent/EP3403281B1/en
Publication of WO2017121243A1 publication Critical patent/WO2017121243A1/en

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Definitions

  • the present disclosure generally relates to flat panel display technologies and, more particularly, relates to an active layer, a thin film transistor, an array substrate, and a display apparatus, and their fabrication methods.
  • a thin film transistor includes a substrate, a gate electrode, a gate insulating layer, an active layer, a source electrode, and a drain electrode. Together with the active layer, the source and drain electrodes covering the active layer form a back channel structure to reduce the size and parasitic capacitance of the thin film transistor.
  • the back channel structure in the thin film transistor is made of silicon and other semiconductor oxide material.
  • a back channel etched thin film transistor made of oxide-based semiconductor materials, such as tin oxide and zinc oxide, may provide high mobility, desired transparency to visible light, and uniformity in large area, and hence is widely used.
  • oxide-based semiconductor materials have low conductivity, and are generally fabricated by using a radio frequency (RF) sputtering process.
  • RF radio frequency
  • the disclosed active layer, thin film transistor, array substrate, and display apparatus, and their fabrication methods are directed to at least partially alleviate one or more problems set forth above and to solve other problems in the art.
  • the present disclosure provides an active layer, a thin film transistor, an array substrate, and a display apparatus, and their fabrication methods.
  • a method for fabricating an active layer in a thin film transistor is provided by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer.
  • the thin film is made of a material selected to provide the active layer with a carrier concentration of at least approximately 1x10 17 cm -3 and a carrier mobility of at least approximately 20 cm 2 /Vs.
  • the carrier concentration in the active layer is greater than or equal to approximately 1x10 18 cm -3 ; and the carrier mobility in the active layer is greater than or equal to approximately 30cm 2 /Vs.
  • the material includes one or more selected from zirconium indium oxide, hafnium zinc oxide, indium tin oxide, zinc oxide, and Ln-doped zinc oxide.
  • the zirconium indium oxide has a chemical formula of Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • the thin film is etched by a wet etching process.
  • the wet etching process includes: etching a zirconium indium oxide thin film at an etching rate of greater than or equal to approximately 60 nm/min in a phosphoric acid having a weight concentration of approximately 40 %to 60 %; and annealing the zirconium indium oxide thin film in air at a temperature between approximately 150 Ā°C and 220 Ā°C for at least approximately 30 minutes.
  • An etching rate of the zirconium indium oxide thin film after annealing is dropped to be less than or equal to 10 nm/min.
  • the wet etching process includes: etching a zirconium indium oxide thin film at an etching rate of greater than or equal to approximately 60 nm/min in a phosphoric acid having a weight concentration of approximately 50 %; and annealing the zirconium indium oxide thin film in air at a temperature approximately 200 Ā°C for at least approximately 30 minutes.
  • An etching rate of the zirconium indium oxide thin film after annealing is dropped to be less than or equal to approximately 5 nm/min.
  • a method for fabricating a thin film transistor is provided by forming a gate electrode thin film on a substrate by a direct current (DC) sputtering process; etching the gate electrode thin film to form a gate electrode; forming a gate insulating layer on the gate electrode; forming an active layer thin film by a DC sputtering process on the gate insulating layer; etching the active layer thin film by a wet etching process followed by an annealing process to form an active layer; and forming a source/drain thin film by a DC sputtering process on the active layer; and etching the source/drain thin film to form a source electrode and a drain electrode.
  • DC direct current
  • the method further includes: selecting a material suitable for the DC sputtering process for forming the active layer thin film, such that the active layer has a carrier concentration of at least approximately 1x10 17 cm -3 and a carrier mobility of at least approximately 20 cm 2 /Vs.
  • the carrier concentration in the active layer is greater than or equal to approximately 1x10 18 cm -3 ; and the carrier mobility in the active layer is greater than or equal to approximately 30cm 2 /Vs.
  • the material is selected from zirconium indium oxide, hafnium zinc oxide, indium tin oxide, zinc oxide, Ln-doped zinc oxide, and a combination thereof.
  • the zirconium indium oxide has a chemical formula of Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • the wet etching process for etching the active layer thin film includes: etching a zirconium indium oxide thin film at an etching rate of greater than or equal to approximately 60 nm/min in a phosphoric acid having a weight concentration of approximately 40 %to 60 %; and annealing the zirconium indium oxide thin film in air at a temperature between approximately 150 Ā°C and 220 Ā°C for at least approximately 30 minutes.
  • An etching rate of the zirconium indium oxide thin film after annealing is dropped to be less than or equal to 10 nm/min.
  • the wet etching process for etching the active layer thin film includes: etching a zirconium indium oxide thin film at an etching rate of greater than or equal to approximately 60 nm/min in a phosphoric acid having a weight concentration of approximately 50 %; and annealing the zirconium indium oxide thin film in air at a temperature approximately 200 Ā°C for at least approximately 30 minutes.
  • An etching rate of the zirconium indium oxide thin film after annealing is dropped to be less than or equal to approximately 5 nm/min.
  • the gate insulating layer is formed by an electrochemical oxidation method on the gate electrode.
  • each of etching the gate electrode thin film and etching the source/drain thin film includes a wet etching process.
  • a thin film transistor includes an active layer, made of a direct-current-sputtered material providing the active layer with a carrier concentration of at least approximately 1x10 17 cm -3 and a carrier mobility of at least approximately 20 cm 2 /Vs.
  • the thin film transistor is free of an etch stop layer.
  • the carrier concentration in the active layer is greater than or equal to approximately 1x10 18 cm -3 ; and the carrier mobility in the active layer is greater than or equal to approximately 30cm 2 /Vs.
  • the direct-current-sputtered material includes one or more selected from zirconium indium oxide, hafnium zinc oxide, indium tin oxide, zinc oxide, and Ln-doped zinc oxide.
  • the zirconium indium oxide has a chemical formula of Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • the thin film transistor further includes: a gate electrode on the substrate; a gate insulating layer covering the gate electrode; and a source electrode and a drain electrode.
  • the active layer is on the gate insulating layer, and the source electrode and the drain electrode are on the active layer and both in contact with the active layer.
  • the gate electrode has a thickness of approximately 100 nm to 800 nm; the gate insulating layer has a thickness of approximately 30 nm to 600 nm; the active layer has a thickness of approximately 10 nm to 200 nm; and the source electrode and the drain electrode have a thickness of approximately 100 nm to 1000 nm.
  • the gate electrode is made of a material including one or more of aluminum, aluminum alloy, tantalum, tantalum alloy, and molybdenum.
  • the gate insulating layer is made of an insulating oxide selected from aluminum oxide, molybdenum oxide, tantalum oxide, aluminum neodymium oxide, and a combination thereof.
  • the source electrode and the drain electrode are made of a conductive metal, including one or more selected from aluminum, molybdenum, tantalum, and aluminum neodymium alloy.
  • the substrate is coated with a buffer layer or a water-oxygen-barrier layer.
  • An array substrate including the disclosed thin film transistor is provided.
  • a display apparatus including the disclosed array substrate is provided.
  • FIG. 1 illustrates a schematic view of an exemplary back-channel-etched oxide thin film transistor according to some embodiments of present disclosure
  • FIG. 2 illustrates a polarizing microscope scanning view of another exemplary back-channel-etched oxide thin film transistor according to some embodiments of present disclosure
  • FIG. 3 illustrates output characteristics curves of certain exemplary back-channel-etched oxide thin film transistors according to some embodiments of present disclosure
  • FIG. 4 illustrates a flow chart of a fabrication method for an exemplary active layer according to some embodiments of present disclosure
  • FIG. 5 illustrates a flow chart of a fabrication method for an exemplary thin film transistor according to some embodiments of present disclosure.
  • an active layer in a thin film transistor may be fabricated by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer.
  • the thin film may be made of a material selected to provide the active layer with a carrier concentration of at least approximately 1x10 17 cm -3 and a carrier mobility of at least approximately 20 cm 2 /Vs.
  • the ā€œmaterialā€ selected for forming the thin film and thus for forming the active layer may also be referred to as an ā€œactive layer materialā€ , or sometimes a ā€œdirect-current-sputtered materialā€ or a ā€œDC-sputtered materialā€ .
  • the thin film may also be referred to as an ā€œactive layer thin filmā€ .
  • oxide-based semiconductor materials Conventional methods for forming oxide-based semiconductor materials include a radio frequency (RF) sputtering process. Compared with a DC sputtering process, an RF sputtering process has disadvantages of slowness, requiring adjustments, poor repeatability, uneven composition of pluralistic film, and large RF radiation. Thus, the RF sputtering process is not widely used in the industry. Moreover, most oxide-based semiconductor materials are susceptible to acid and likely to be corroded during etching process, making it impractical to form source electrode and drain electrode on oxide-based semiconductor materials by direct etching. As a result, use of oxide-based semiconductor materials has limitations in massive applications.
  • RF radio frequency
  • an exemplary active layer is formed by a DC sputtering process using a selected material.
  • the active layer has desired carrier concentration and carrier mobility.
  • the combination of the DC sputtering process with the selected material for the active layer may overcome difficulties often occurred in conventional processes. For example, as disclosed herein, arcing discharge phenomenon caused by defects in a conventional method may not occur.
  • gate electrode and source/drain electrodes may also be formed using DC sputtering processes to form a desired thin film transistor (TFT) .
  • TFT thin film transistor
  • the entire thin film transistor may be produced mainly by the DC sputtering processes. This may significantly simplify the entire TFT process and may be a breakthrough solution in TFT technology.
  • the selected active layer material may include, for example, zirconium indium oxide, hafnium zinc oxide, indium tin oxide, zinc oxide, Ln-doped zinc oxide, and a combination thereof.
  • the active layer is made of zirconium indium oxide.
  • the chemical formula of zirconium indium oxide may include Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • x may be 0.1, 0.3, 0.5, 0.7, 0.9, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, or any value between the disclosed range
  • y may be 1, 5, 10, 15, 20, 25, 30, 35, 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 100, or any value in the disclosed range.
  • the zirconium indium oxide having the chemical structure Zr x In 100-x O y may have advantages of high mobility, wide optical band gap, high stability, and superior conductivity.
  • a zirconium indium oxide thin film formed by direct current (DC) sputtering may have the same advantages.
  • the zirconium indium oxide thin film Prior to annealing, the zirconium indium oxide thin film may be in an amorphous state, and may have a high acid etch rate, suitable for using wet etching patterning process. After annealing, the zirconium indium oxide thin film may be changed from the amorphous state to a crystalline state.
  • the zirconium indium oxide thin film may have a substantially low acid etch rate or otherwise unsusceptible to acid, eliminating the need for configuring an etch barrier layer.
  • the active layer may not be etched.
  • a thin film transistor incorporating such active layer may use the DC sputtering process entirely to form the corresponding gate electrode, active layer, source electrode and drain electrode sequentially.
  • the gate insulating layer may be directly formed by using an electrochemical oxidation process after the gate electrode is formed.
  • thin film transistors may be formed in various types of structures, such as bottom-gate staggered structure. Such thin film transistors may have high carrier mobility, desired electrical uniformity, and controllable thickness for the gate insulating layer.
  • the carrier concentration in the active layer when the carrier concentration in the active layer is greater than or equal to approximately 1x10 17 cm -3 , defects caused by arc discharge during the DC sputtering may be avoided.
  • the carrier concentration in the active layer may be greater than or equal to approximately 1x10 18 cm -3 .
  • the carrier mobility in the active layer is greater or equal to approximately 20cm 2 /Vs.
  • the carrier mobility in the active layer may be greater than or equal to approximately 30cm 2 /Vs.
  • the active layer described above may also have high conductivity, making it more suitable for DC sputtering deposition. Thus, the film formation rate can be improved, fabrication process can be simplified, and film formation cost can be reduced.
  • the etching rate may be greater than or equal to approximately 60nm/min.
  • the active layer is annealed at approximately 150Ā°C to 220Ā°C, for example, about 160Ā°C, 180Ā°C, or 200Ā°C, for approximately 30 minutes, the etching rate of the active layer in a phosphoric acid with a concentration ratio by weight of approximately 40%to 60%is dropped to be less than or equal to 10nm/min.
  • the active layer according to the present disclosure has a high acid etching rate before annealing and a low acid etching rate after annealing. After annealing, the active layer is acid-resistant. The active layer is wet etched by a patterning process before annealing. After the active layer is annealed, when source electrode and drain electrode are formed on the active layer by a patterning process, the active layer is not etched by the etching acid, making it suitable for forming back-channel-etched oxide thin film transistor.
  • the present disclosure also provides a thin film transistor.
  • the thin film transistor includes the disclosed active layer.
  • the thin film transistor according to the present disclosure may be formed by a whole-DC sputtering process.
  • a gate electrode, an active layer, a source electrode and a drain electrode may be formed sequentially.
  • a gate insulating layer may be directly formed by using an electrochemical oxidation process after the gate electrode is formed.
  • the thin film transistor may be formed in various types of structures, such as bottom-gate staggered structure.
  • Such thin film transistor may have high carrier mobility, desired electrical uniformity, and controllable thickness for gate insulating layer to increase adaptability in flat panel displays, such as liquid crystal displays (LCDs) , and active matrix organic light emitting diode displays (AMOLEDs) .
  • LCDs liquid crystal displays
  • AMOLEDs active matrix organic light emitting diode displays
  • the present invention provides a back-channel-etched oxide thin film transistor.
  • FIG. 1 illustrates a schematic view of an exemplary back-channel-etched oxide thin film transistor according to various embodiments of the present disclosure.
  • FIG. 2 illustrates a polarizing microscope scanning view of another exemplary back-channel-etched oxide thin film transistor according to various embodiments of the present disclosure.
  • the thin film transistor may include a substrate 1, a gate electrode 2, a gate insulating layer 3, an active layer 4, a source electrode 501, and a drain electrode 502.
  • the gate electrode 2 is formed on the substrate 1.
  • the gate insulating layer 3 is configured on the substrate 1 to cover the gate electrode 2.
  • the active layer 4 is configured on the gate insulating layer 3, corresponding to the gate electrode 2.
  • the source electrode 501 and the drain electrode 502 are electrically connected to both ends of the active layer 4, respectively.
  • a back channel structure is formed on the active layer 4.
  • both source electrode 501 and drain electrode 502 may be configured on one end of the gate insulating layer 3.
  • the substrate 1 may be a glass substrate, a flexible polymer substrate, a silicon wafer, a metal foil, a quartz substrate, or other appropriate material substrate.
  • the gate electrode 2 may be an aluminum layer, an aluminum alloy layer, a tantalum layer, a tantalum alloy layer, a molybdenum layer, a stack of two or more sub-layers of combination selected from aluminum, aluminum alloy, tantalum, tantalum alloy, or any suitable gate structures.
  • the active layer 4 may be made of the disclosed zirconium indium oxide.
  • An insulating oxide layer may be directly formed on the gate electrode 2 as the gate insulating layer 3. That is, the gate insulating layer 3 may be made of insulating oxide formed by an electrochemical oxidation process.
  • the insulating oxide may be aluminum oxide, molybdenum oxide, tantalum oxide, or aluminum neodymium oxide.
  • the source electrode 501 and the drain electrode 502 may be made of conductive metal that can be etched by acid.
  • the conductive metal may be aluminum, molybdenum, tantalum, or aluminum neodymium alloy.
  • the source electrode 501 and the drain electrode 502 may directly contact the active layer without an etch barrier layer there-between.
  • the substrate 1 may be coated with a buffer layer or a water-oxygen-barrier layer to increase the barrier ability of the substrate.
  • the buffer layer may be made of silicon nitride, silicon oxide, silicon oxynitride, and aluminum oxide, etc.
  • the gate electrode 2 has a thickness of approximately 100nm to 800nm.
  • the gate electrode 2 may have a thickness of 150nm, 200nm, 300nm, 400nm, 500nm, 600nm, or 700nm, etc.
  • the gate insulating layer 3 has a thickness of approximately 30nm to 600nm.
  • the gate electrode layer 3 may have a thickness be 50nm, 100nm, 150nm, 200nm, 300nm, 400nm, or 500nm, etc.
  • the active layer 4 has a thickness of approximately 10nm to 200nm.
  • the active layer 4 may have a thickness of 20nm, 40nm, 60nm, 80nm, 100nm, 130nm, 150nm, or 180nm, etc.
  • the source electrode 501 and the drain electrode 502 have a thickness of approximately 100nm to 1000nm.
  • the source electrode 501 and drain electrode 502 may have a thickness of 150nm, 200nm, 300nm, 400nm, 500nm, 600nm, 700nm, 800nm, or 900nm, etc.
  • the back channel has a width of approximately 3 ā‡ m to 30 ā‡ m.
  • the back channel may have a width of 5 ā‡ m, 10 ā‡ m, 15 ā‡ m, 20 ā‡ m, or 25 ā‡ m, etc.
  • the present disclosure also provides an array substrate.
  • the array substrate includes any of the disclosed thin film transistors.
  • the array substrate according to the present disclosure has the advantages of high carrier mobility and desired electrical uniformity.
  • the present disclosure also provides a display apparatus.
  • the display apparatus includes any of the disclosed array substrates.
  • the display apparatus according to the present disclosure has the advantages of high carrier mobility and desired electrical uniformity.
  • FIG. 4 illustrates a flow chart of a fabrication method for an exemplary active layer according to the present disclosure. As shown in FIG. 4, the fabrication method for the active layer includes the following steps.
  • Step S01 using a DC sputtering process to form a zirconium indium oxide thin film with a predetermined thickness.
  • a DC sputtering process is used to form a zirconium indium oxide thin film with a predetermined thickness.
  • the chemical formula of zirconium indium oxide is Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • Step S02 using a wet etching patterning process to etch the zirconium indium oxide thin film to form an active layer.
  • the fabrication method for the active layer according to the present disclosure has the advantages of high film formation rate and simplified fabrication process. In addition, the absence of the barrier layer on the active layer reduces film formation cost.
  • the zirconium indium oxide thin film is wet etched in a phosphoric acid with a concentration ratio by weight of approximately 40%to 60%, the zirconium indium oxide thin film is annealed at approximately 150Ā°C to 220Ā°C for approximately 30 minutes to form the desired active layer.
  • the active layer is changed from an amorphous state to a crystalline state, which has high acid resistance.
  • FIG. 5 illustrates a flow chart of a fabrication method for an exemplary thin film transistor according to the present disclosure. As shown in FIG. 5, the fabrication method includes the following steps.
  • Step S101 using a DC sputtering process to form a first thin film layer with a gate electrode material on a substrate with a predetermined thickness and then using a wet etching patterning process to form the gate electrode.
  • a first thin film layer is formed on a substrate by using a DC sputtering process.
  • the first thin film layer is then etched by a wet etching patterning process to form a first patterned thin film layer.
  • the first patterned thin film layer has a shape of a gate electrode.
  • Step S102 using an electrochemical oxidation method to form a gate insulating layer from the gate insulating layer material with a predetermined thickness on the gate electrode.
  • a gate insulating layer may be directly formed by using an electrochemical oxidation process after the gate electrode is formed.
  • the thin film transistor may be formed in various types of structures, such as a bottom-gate staggered structure.
  • Such thin film transistor may have high carrier mobility, desired electrical uniformity, and controllable thickness of gate insulating layer.
  • Step S103 using a DC sputtering process to form a zirconium indium oxide thin film with a predetermined thickness on the gate insulating layer, using a wet etching patterning process to obtain a patterned zirconium indium oxide thin film, and then annealing the patterned zirconium indium oxide thin film to form an active layer.
  • a zirconium indium oxide thin film with a predetermined thickness is formed on the gate insulating layer by using a DC sputtering process.
  • the zirconium indium oxide thin film is then etched by a wet etching patterning process to form a patterned zirconium indium oxide thin film.
  • the patterned zirconium indium oxide thin film has a shape of an active layer.
  • the zirconium indium oxide has a chemical formula as Zr x In 100-x O y , where 0.1 ā‡ x ā‡ 20 and y>0.
  • Step S104 using a DC sputtering process to form a second thin film layer with a predetermined thickness on the active layer, and then using a wet etching patterning process to form a source electrode and a drain electrode.
  • a second thin film layer with a predetermined thickness is formed on the active layer by using a DC sputtering process.
  • the second thin film layer is then etched by a wet etching patterning process to form a source electrode and a drain electrode.
  • multiple steps of DC sputtering process may be used to deposit multiple layers to reach a predetermined thickness depending on the actual design requirement.
  • the DC sputtering process and the electrochemical oxidation process are used herein for fabricating thin film transistors without limitations.
  • an electrochemical oxidation process may include the following steps.
  • a substrate formed with gate electrodes is submerged or inserted into an electrolyte solution at one side, and is electrically connected to an anode of power source.
  • a conductive metal as a material to form a gate insulating layer is submerged at the other side of the electrolyte solution, and is electrically connected to a cathode of power source. Then an electrical current is supplied through the anode and the cathode to perform electrochemical oxidation to form an insulating oxide of the conductive metal on the gate electrode and any exposed surface of the substrate.
  • the metal oxide layer is used as gate insulating layer.
  • the fabrication process of thin film transistors uses a DC sputtering process to form a gate electrode, uses an electrochemical oxidation process to form a gate insulating layer on the gate electrode, and then uses a DC sputtering process to form an active layer, a source electrode and a drain electrode, sequentially.
  • the source electrode and the drain electrode are directly formed on the active layer by using a wet etching patterning process without damaging the active layer.
  • various types of thin film transistor structures may be formed with a controlled thickness of gate insulating layer.
  • Such fabrication process is simple, low cost, and suitable for widespread adoption.
  • the present invention provides an active layer.
  • the thickness of the active layer is approximately 20nm.
  • the active layer is made of zirconium indium oxide, with an approximate chemical formula Zr 1 In 91 O 100 .
  • the carrier concentration is approximately 1.5x10 18 cm -3 .
  • the carrier mobility is approximately 31cm 2 /Vs.
  • the active layer Before being annealed, the active layer has an etching rate equal to approximately 60nm/min in a concentration of approximate 50%by weight phosphoric acid solution. After being annealed in air at approximately 200Ā°C temperature for approximately 30 minutes, the active layer has an etching rate equal to 5nm/min in the phosphoric acid solution.
  • the present invention provides an active layer.
  • the thickness of the active layer is approximately 25nm.
  • the active layer is made of zirconium indium oxide, with an approximate chemical formula Zr 6 In 94 O 100 .
  • the carrier concentration is approximately 1.0x10 18 cm -3 .
  • the carrier mobility is approximately 30cm 2 /Vs.
  • the active layer Before being annealed, the active layer has an etching rate equal to approximately 65nm/min in a phosphoric acid solution having a concentration of approximate 50%by weight. After being annealed in air at approximately 210Ā°C temperature for approximately 35 minutes, the active layer has an etching rate equal to approximately 4nm/min in the phosphoric acid solution.
  • the present invention provides an active layer.
  • the thickness of the active layer is approximately 22nm.
  • the active layer is made of zirconium indium oxide, with an approximate chemical formula Zr 11 In 89 O 100 .
  • the carrier concentration is approximately 2.5x10 19 cm -3 .
  • the carrier mobility is approximately 35cm 2 /Vs.
  • the active layer Before being annealed, the active layer has an etching rate equal to approximately 63nm/min in a phosphoric acid solution having concentration of approximate 50%by weight. After being annealed in air at approximately 210Ā°C temperature for approximately 30 minutes, the active layer has an etching rate equal to approximately 3nm/min in the phosphoric acid solution.
  • the present invention provides an active layer.
  • the thickness of the active layer is approximately 20nm.
  • the active layer is made of zirconium indium oxide, with an approximate chemical formula Zr 16 In 84 O 100 .
  • the carrier concentration is approximately 1.0x10 20 cm -3 .
  • the carrier mobility is approximately 55cm 2 /Vs.
  • the active layer Before being annealed, the active layer has an etching rate equal to approximately 67nm/min in a phosphoric acid solution having concentration of approximate 50%by weight. After being annealed in air at approximately 200Ā°C temperature for approximately 30 minutes, the active layer has an etching rate equal to approximately 3.5nm/min in the phosphoric acid solution.
  • the present invention provides a back-channel-etched oxide thin film transistor.
  • the thin film transistor has a bottom-gate staggered structure.
  • the thin film transistor includes a substrate, a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode.
  • the substrate is a glass substrate with a thickness of approximately 0.7mm.
  • the gate electrode is formed on the substrate, is made of aluminum, and has a thickness of approximately 300nm.
  • the gate insulating layer formed on the substrate to cover the gate electrode is made of aluminum oxide, and has a thickness of approximately 200nm.
  • the active layer is formed on the gate insulating layer, corresponding to the gate electrode.
  • the source electrode and the drain electrode are electrically connected to both ends of the active layer, respectively, to form an approximate 5 ā‡ m thick back channel on the active layer.
  • the source electrode and the drain electrode are also located at both ends of the gate insulating layer.
  • the source electrode and the drain electrode are made of aluminum, with a thickness of approximately 500nm.
  • the fabrication method for the above back-channel-etched oxide thin film transistor includes the following steps.
  • Step S201 using a DC sputtering process to deposit an approximate 300nm thick aluminum thin film on a substrate and then using a phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a gate electrode.
  • Step S202 using an electrochemical oxidation process to form an approximate 200nm thick aluminum oxide thin film on the gate electrode as a gate insulating layer.
  • Step S203 using a DC sputtering process to form an approximate 20nm thick zirconium indium oxide thin film on the gate insulating layer, using phosphoric acid having a concentration of approximate 50%by weight to etch the zirconium indium oxide thin film to form a patterned zirconium indium oxide thin film, and then annealing the patterned zirconium indium oxide thin film in air at approximately 200Ā°C temperature for approximately 30 minutes to form an active layer.
  • Step S204 using a DC sputtering process to form an approximate 500nm thick aluminum thin film on the active layer and then using phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a source electrode and a drain electrode.
  • the present invention provides a back-channel-etched oxide thin film transistor.
  • the thin film transistor has a bottom-gate staggered structure.
  • the thin film transistor includes a substrate, a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode.
  • the substrate is a quartz substrate with a thickness of approximately 0.7mm.
  • the substrate is covered with an approximate 50nm thick aqueous oxygen barrier layer.
  • the gate electrode is formed on the substrate, is made of tantalum, and has a thickness of approximately 400nm.
  • the gate insulating layer formed on the substrate to cover the gate electrode is made of tantalum oxide, and has a thickness of approximately 350nm.
  • the active layer is formed on the gate insulating layer, corresponding to the gate electrode.
  • the source electrode and the drain electrode are electrically connected to both ends of the active layer, respectively, to form an approximate 6 ā‡ m thick back channel on the active layer.
  • the source electrode and the drain electrode are also located at both ends of the gate insulating layer.
  • the source electrode and the drain electrode are made of tantalum, with a thickness of approximately 700nm.
  • the fabrication method for the above back-channel-etched oxide thin film transistor includes the following steps.
  • Step S301 using a DC sputtering process to deposit an approximate 400nm thick tantalum thin film on a substrate and then using phosphoric acid having a concentration of approximate 50%by weight to etch the tantalum thin film to form a gate electrode.
  • Step S302 using an electrochemical oxidation process to form an approximate 350nm thick tantalum oxide thin film on the gate electrode as a gate insulating layer.
  • Step S303 using a DC sputtering process to form an approximate 25nm thick zirconium indium oxide thin film on the gate insulating layer, using phosphoric acid having a concentration of approximate 50%by weight to etch the zirconium indium oxide thin film to form a patterned zirconium indium oxide thin film, and then annealing the patterned zirconium indium oxide thin film in air at approximately 200Ā°C temperature for approximately 30 minutes to form an active layer.
  • Step S304 using a DC sputtering process to form an approximate 700nm thick tantalum thin film on the active layer and then using phosphoric acid having a concentration of approximate 50%by weight to etch the tantalum thin film to form a source electrode and a drain electrode.
  • the present invention provides a back-channel-etched oxide thin film transistor.
  • the thin film transistor has a bottom-gate staggered structure.
  • the thin film transistor includes a substrate, a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode.
  • the substrate is a glass substrate with a thickness of approximately 0.7mm.
  • the gate electrode is formed on the substrate, is made of aluminum, and has a thickness of approximately 300nm.
  • the gate insulating layer formed on the substrate to cover the gate electrode is made of aluminum oxide, and has a thickness of approximately 200nm.
  • the active layer is formed on the gate insulating layer, corresponding to the gate electrode.
  • the source electrode and the drain electrode are electrically connected to both ends of the active layer, respectively, to form an approximate 3 ā‡ m thick back channel on the active layer.
  • the source electrode and the drain electrode are also located at both ends of the gate insulating layer.
  • the source electrode and the drain electrode are made of aluminum, with a thickness of approximately 500nm.
  • the fabrication method for the above back-channel-etched oxide thin film transistor includes the following steps.
  • Step S401 using a DC sputtering process to deposit an approximate 300nm thick aluminum thin film on a substrate and then using phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a gate electrode.
  • Step S402 using an electrochemical oxidation process to form an approximate 200nm thick aluminum oxide thin film on the gate electrode as a gate insulating layer.
  • Step S403 using a DC sputtering process to form an approximate 20nm thick zirconium indium oxide thin film on the gate insulating layer, using phosphoric acid having a concentration of approximate 50%by weight to etch the zirconium indium oxide thin film to form a patterned zirconium indium oxide thin film, and then annealing the patterned zirconium indium oxide thin film in air at approximately 200Ā°C temperature for approximately 30 minutes to form an active layer.
  • Step S404 using a DC sputtering process to form an approximate 500nm thick aluminum thin film on the active layer and then using phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a source electrode and a drain electrode.
  • the present invention provides a back-channel-etched oxide thin film transistor.
  • the thin film transistor has a bottom-gate staggered structure.
  • the thin film transistor includes a substrate, a gate electrode, a gate insulating layer, an active layer, a source electrode and a drain electrode.
  • the substrate is a glass substrate with a thickness of approximately 0.7mm.
  • the gate electrode is formed on the substrate, is made of aluminum, and has a thickness of approximately 300nm.
  • the gate insulating layer formed on the substrate to cover the gate electrode is made of aluminum oxide, and has a thickness of approximately 200nm.
  • the active layer is formed on the gate insulating layer, corresponding to the gate electrode.
  • the source electrode and the drain electrode are electrically connected to both ends of the active layer, respectively, to form an approximate 4.3 ā‡ m thick back channel on the active layer.
  • the source electrode and the drain electrode are also located at both ends of the gate insulating layer.
  • the source electrode and the drain electrode are made of aluminum, with a thickness of approximately 500nm.
  • the fabrication method for the above back-channel-etched oxide thin film transistor includes the following steps.
  • Step S501 using a DC sputtering process to deposit an approximate 300nm thick aluminum thin film on a substrate and then using phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a gate electrode.
  • Step S502 using an electrochemical oxidation process to form an approximate 200nm thick aluminum oxide thin film on the gate electrode as a gate insulating layer.
  • Step S503 using a DC sputtering process to form an approximate 20nm thick zirconium indium oxide thin film on the gate insulating layer, using phosphoric acid having a concentration of approximate 50%by weight to etch the zirconium indium oxide thin film to form a patterned zirconium indium oxide thin film, and then annealing the patterned zirconium indium oxide thin film in air at approximately 200Ā°C temperature for approximately 30 minutes to form an active layer.
  • Step S504 using a DC sputtering process to form an approximate 500nm thick aluminum thin film on the active layer and then using phosphoric acid having a concentration of approximate 50%by weight to etch the aluminum thin film to form a source electrode and a drain electrode.
  • each of the back-channel-etched oxide thin film transistors illustrated in the above examples is measured to obtain a plurality of output characteristics curves, respectively.
  • FIG. 3 illustrates output characteristics curves of certain exemplary back-channel-etched oxide thin film transistors according to the present disclosure. As shown in FIG. 3, the output characteristics curves represent the relationships between the drain electrode current (in Ampere) and the drain electrode voltage (in Volt) under different gate electrode voltages (in Volt) , corresponding to different back-channel-etched oxide thin film transistors according to various embodiments. The four output characteristics curves have similar shapes, but do not intersect with each other.
  • Curve I corresponds to a back-channel-etched oxide thin film transistor formed by a fabrication process with steps S201 through S204.
  • Curve II corresponds to a back-channel-etched oxide thin film transistor formed by a fabrication process with steps S301 through S304.
  • Curve III corresponds to a back-channel-etched oxide thin film transistor formed by a fabrication process with steps S401 through S404.
  • Curve IV corresponds to a back-channel-etched oxide thin film transistor formed by a fabrication process with steps S501 through S504.
  • the gate electrode voltage of the back-channel-etched oxide thin film transistor according to the present disclosure may be adjusted to control the drain electrode current to achieve desirable output characteristics.
  • Array substrates and display apparatus incorporating the disclosed thin film transistors may have desired performance and quality.

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Abstract

An active layer, a thin film transistor, an array substrate, and a display apparatus, and fabrication methods thereof are provided. A method for fabricating an active layer (4) in a thin film transistor is provided by forming a thin film by a direct current (DC) sputtering process; and etching the thin film to form the active layer (4). The thin film is made of a material selected to provide the active layer (4) with a carrier concentration of at least approximately 1x10 17cm -3 and a carrier mobility of at least approximately 20 cm 2/Vs.

Description

ACTIVEĀ LAYER,Ā THINĀ FILMĀ TRANSISTOR,Ā ARRAYĀ SUBSTRATE,Ā ANDĀ DISPLAYĀ APPARATUSĀ ANDĀ FABRICATIONĀ METHODS
CROSS-REFERENCESĀ TOĀ RELATEDĀ APPLICATIONS
ThisĀ applicationĀ claimsĀ theĀ priorityĀ ofĀ ChineseĀ PatentĀ ApplicationĀ No.Ā CN201610027679.2,Ā filedĀ onĀ JanuaryĀ 15,Ā 2016,Ā theĀ entireĀ contentĀ ofĀ whichĀ isĀ incorporatedĀ hereinĀ byĀ reference.
FIELDĀ OFĀ THEĀ DISCLOSURE
TheĀ presentĀ disclosureĀ generallyĀ relatesĀ toĀ flatĀ panelĀ displayĀ technologiesĀ and,Ā moreĀ particularly,Ā relatesĀ toĀ anĀ activeĀ layer,Ā aĀ thinĀ filmĀ transistor,Ā anĀ arrayĀ substrate,Ā andĀ aĀ displayĀ apparatus,Ā andĀ theirĀ fabricationĀ methods.
BACKGROUND
InĀ flatĀ panelĀ displays,Ā especiallyĀ inĀ electroluminescenceĀ displays,Ā thinĀ filmĀ transistorsĀ (TFT)Ā asĀ coreĀ componentsĀ haveĀ beenĀ receivingĀ moreĀ andĀ moreĀ attention.Ā Generally,Ā aĀ thinĀ filmĀ transistorĀ includesĀ aĀ substrate,Ā aĀ gateĀ electrode,Ā aĀ gateĀ insulatingĀ layer,Ā anĀ activeĀ layer,Ā aĀ sourceĀ electrode,Ā andĀ aĀ drainĀ electrode.Ā TogetherĀ withĀ theĀ activeĀ layer,Ā theĀ sourceĀ andĀ drainĀ electrodesĀ coveringĀ theĀ activeĀ layerĀ formĀ aĀ backĀ channelĀ structureĀ toĀ reduceĀ theĀ sizeĀ andĀ parasiticĀ capacitanceĀ ofĀ theĀ thinĀ filmĀ transistor.
Generally,Ā theĀ backĀ channelĀ structureĀ inĀ theĀ thinĀ filmĀ transistorĀ isĀ madeĀ ofĀ siliconĀ andĀ otherĀ semiconductorĀ oxideĀ material.Ā AĀ backĀ channelĀ etchedĀ thinĀ filmĀ transistorĀ madeĀ ofĀ oxide-basedĀ semiconductorĀ materials,Ā suchĀ asĀ tinĀ oxideĀ andĀ zincĀ oxide,Ā mayĀ provideĀ highĀ  mobility,Ā desiredĀ transparencyĀ toĀ visibleĀ light,Ā andĀ uniformityĀ inĀ largeĀ area,Ā andĀ henceĀ isĀ widelyĀ used.Ā However,Ā oxide-basedĀ semiconductorĀ materialsĀ haveĀ lowĀ conductivity,Ā andĀ areĀ generallyĀ fabricatedĀ byĀ usingĀ aĀ radioĀ frequencyĀ (RF)Ā sputteringĀ process.
TheĀ disclosedĀ activeĀ layer,Ā thinĀ filmĀ transistor,Ā arrayĀ substrate,Ā andĀ displayĀ apparatus,Ā andĀ theirĀ fabricationĀ methodsĀ areĀ directedĀ toĀ atĀ leastĀ partiallyĀ alleviateĀ oneĀ orĀ moreĀ problemsĀ setĀ forthĀ aboveĀ andĀ toĀ solveĀ otherĀ problemsĀ inĀ theĀ art.
BRIEFĀ SUMMARYĀ OFĀ THEĀ DISCLOSURE
TheĀ presentĀ disclosureĀ providesĀ anĀ activeĀ layer,Ā aĀ thinĀ filmĀ transistor,Ā anĀ arrayĀ substrate,Ā andĀ aĀ displayĀ apparatus,Ā andĀ theirĀ fabricationĀ methods.
AĀ methodĀ forĀ fabricatingĀ anĀ activeĀ layerĀ inĀ aĀ thinĀ filmĀ transistorĀ isĀ providedĀ byĀ formingĀ aĀ thinĀ filmĀ byĀ aĀ directĀ currentĀ (DC)Ā sputteringĀ processļ¼›Ā andĀ etchingĀ theĀ thinĀ filmĀ toĀ formĀ theĀ activeĀ layer.Ā TheĀ thinĀ filmĀ isĀ madeĀ ofĀ aĀ materialĀ selectedĀ toĀ provideĀ theĀ activeĀ layerĀ withĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.
Optionally,Ā theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā andĀ theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
Optionally,Ā theĀ materialĀ includesĀ oneĀ orĀ moreĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā andĀ Ln-dopedĀ zincĀ oxide.
Optionally,Ā theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
Optionally,Ā theĀ thinĀ filmĀ isĀ etchedĀ byĀ aĀ wetĀ etchingĀ process.
Optionally,Ā theĀ wetĀ etchingĀ processĀ includes:Ā etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 40Ā ļ¼…toĀ 60Ā ļ¼…ļ¼›Ā andĀ annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ betweenĀ approximatelyĀ 150Ā ā„ƒĀ andĀ 220Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes.Ā AnĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ 10Ā nm/min.
Ā Optionally,Ā theĀ wetĀ etchingĀ processĀ includes:Ā etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 50Ā ļ¼…ļ¼›Ā andĀ annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ approximatelyĀ 200Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes.Ā AnĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 5Ā nm/min.
AĀ methodĀ forĀ fabricatingĀ aĀ thinĀ filmĀ transistorĀ isĀ providedĀ byĀ formingĀ aĀ gateĀ electrodeĀ thinĀ filmĀ onĀ aĀ substrateĀ byĀ aĀ directĀ currentĀ (DC)Ā sputteringĀ processļ¼›Ā etchingĀ theĀ gateĀ electrodeĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrodeļ¼›Ā formingĀ aĀ gateĀ insulatingĀ layerĀ onĀ theĀ gateĀ electrodeļ¼›Ā formingĀ anĀ activeĀ layerĀ thinĀ filmĀ byĀ aĀ DCĀ sputteringĀ processĀ onĀ theĀ gateĀ insulatingĀ layerļ¼›Ā etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ byĀ aĀ wetĀ etchingĀ processĀ followedĀ byĀ anĀ annealingĀ processĀ toĀ formĀ anĀ activeĀ layerļ¼›Ā andĀ formingĀ aĀ source/drainĀ thinĀ filmĀ byĀ aĀ DCĀ sputteringĀ processĀ onĀ theĀ activeĀ layerļ¼›Ā andĀ etchingĀ theĀ source/drainĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
Optionally,Ā theĀ methodĀ furtherĀ includes:Ā selectingĀ aĀ materialĀ suitableĀ forĀ theĀ DCĀ sputteringĀ processĀ forĀ formingĀ theĀ activeĀ layerĀ thinĀ film,Ā suchĀ thatĀ theĀ activeĀ layerĀ hasĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.
Optionally,Ā theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā andĀ theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
Optionally,Ā theĀ materialĀ isĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā Ln-dopedĀ zincĀ oxide,Ā andĀ aĀ combinationĀ thereof.
Optionally,Ā theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
Optionally,Ā theĀ wetĀ etchingĀ processĀ forĀ etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ includes:Ā etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 40Ā ļ¼…toĀ 60Ā ļ¼…ļ¼›Ā andĀ annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ betweenĀ approximatelyĀ 150Ā ā„ƒĀ andĀ 220Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes.Ā AnĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ 10Ā nm/min.
Optionally,Ā theĀ wetĀ etchingĀ processĀ forĀ etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ includes:Ā etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 50Ā ļ¼…ļ¼›Ā andĀ annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ approximatelyĀ 200Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes.Ā AnĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 5Ā nm/min.
Optionally,Ā theĀ gateĀ insulatingĀ layerĀ isĀ formedĀ byĀ anĀ electrochemicalĀ oxidationĀ methodĀ onĀ theĀ gateĀ electrode.
Optionally,Ā eachĀ ofĀ etchingĀ theĀ gateĀ electrodeĀ thinĀ filmĀ andĀ etchingĀ theĀ source/drainĀ thinĀ filmĀ includesĀ aĀ wetĀ etchingĀ process.
AĀ thinĀ filmĀ transistorĀ includesĀ anĀ activeĀ layer,Ā madeĀ ofĀ aĀ direct-current-sputteredĀ materialĀ providingĀ theĀ activeĀ layerĀ withĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.Ā TheĀ thinĀ filmĀ transistorĀ isĀ freeĀ ofĀ anĀ etchĀ stopĀ layer.
Optionally,Ā theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā andĀ theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
Optionally,Ā theĀ direct-current-sputteredĀ materialĀ includesĀ oneĀ orĀ moreĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā andĀ Ln-dopedĀ zincĀ oxide.
Optionally,Ā theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
Optionally,Ā theĀ thinĀ filmĀ transistorĀ furtherĀ includes:Ā aĀ gateĀ electrodeĀ onĀ theĀ substrateļ¼›Ā aĀ gateĀ insulatingĀ layerĀ coveringĀ theĀ gateĀ electrodeļ¼›Ā andĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.Ā TheĀ activeĀ layerĀ isĀ onĀ theĀ gateĀ insulatingĀ layer,Ā andĀ theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ onĀ theĀ activeĀ layerĀ andĀ bothĀ inĀ contactĀ withĀ theĀ activeĀ layer.
Optionally,Ā theĀ gateĀ electrodeĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 100Ā nmĀ toĀ 800Ā nmļ¼›Ā theĀ gateĀ insulatingĀ layerĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 30Ā nmĀ toĀ 600Ā nmļ¼›Ā theĀ activeĀ layerĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 10Ā nmĀ toĀ 200Ā nmļ¼›Ā andĀ theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ haveĀ aĀ thicknessĀ ofĀ approximatelyĀ 100Ā nmĀ toĀ 1000Ā nm.
Optionally,Ā theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ aĀ materialĀ includingĀ oneĀ orĀ moreĀ ofĀ aluminum,Ā aluminumĀ alloy,Ā tantalum,Ā tantalumĀ alloy,Ā andĀ molybdenum.
Optionally,Ā theĀ gateĀ insulatingĀ layerĀ isĀ madeĀ ofĀ anĀ insulatingĀ oxideĀ selectedĀ fromĀ aluminumĀ oxide,Ā molybdenumĀ oxide,Ā tantalumĀ oxide,Ā aluminumĀ neodymiumĀ oxide,Ā andĀ aĀ combinationĀ thereof.
Optionally,Ā theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ aĀ conductiveĀ metal,Ā includingĀ oneĀ orĀ moreĀ selectedĀ fromĀ aluminum,Ā molybdenum,Ā tantalum,Ā andĀ aluminumĀ neodymiumĀ alloy.
Optionally,Ā theĀ substrateĀ isĀ coatedĀ withĀ aĀ bufferĀ layerĀ orĀ aĀ water-oxygen-barrierĀ layer.
AnĀ arrayĀ substrateĀ includingĀ theĀ disclosedĀ thinĀ filmĀ transistorĀ isĀ provided.
AĀ displayĀ apparatusĀ includingĀ theĀ disclosedĀ arrayĀ substrateĀ isĀ provided.
OtherĀ aspectsĀ ofĀ theĀ presentĀ disclosureĀ canĀ beĀ understoodĀ byĀ thoseĀ skilledĀ inĀ theĀ artĀ inĀ lightĀ ofĀ theĀ description,Ā theĀ claims,Ā andĀ theĀ drawingsĀ ofĀ theĀ presentĀ disclosure.
BRIEFĀ DESCRIPTIONĀ OFĀ THEĀ DRAWINGS
TheĀ followingĀ drawingsĀ areĀ merelyĀ examplesĀ forĀ illustrativeĀ purposesĀ accordingĀ toĀ variousĀ disclosedĀ embodimentsĀ andĀ areĀ notĀ intendedĀ toĀ limitĀ theĀ scopeĀ ofĀ theĀ presentĀ disclosure.
FIG.Ā 1Ā illustratesĀ aĀ schematicĀ viewĀ ofĀ anĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ presentĀ disclosureļ¼›
FIG.Ā 2Ā illustratesĀ aĀ polarizingĀ microscopeĀ scanningĀ viewĀ ofĀ anotherĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ presentĀ disclosureļ¼›
FIG.Ā 3Ā illustratesĀ outputĀ characteristicsĀ curvesĀ ofĀ certainĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorsĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ presentĀ disclosureļ¼›
FIG.Ā 4Ā illustratesĀ aĀ flowĀ chartĀ ofĀ aĀ fabricationĀ methodĀ forĀ anĀ exemplaryĀ activeĀ layerĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ presentĀ disclosureļ¼›Ā and
FIG.Ā 5Ā illustratesĀ aĀ flowĀ chartĀ ofĀ aĀ fabricationĀ methodĀ forĀ anĀ exemplaryĀ thinĀ filmĀ transistorĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ presentĀ disclosure.
DETAILEDĀ DESCRIPTION
ReferenceĀ willĀ nowĀ beĀ madeĀ inĀ detailĀ toĀ exemplaryĀ embodimentsĀ ofĀ theĀ disclosure,Ā whichĀ areĀ illustratedĀ inĀ theĀ accompanyingĀ drawings.Ā WhereverĀ possible,Ā theĀ sameĀ referenceĀ numbersĀ willĀ beĀ usedĀ throughoutĀ theĀ drawingsĀ toĀ referĀ toĀ theĀ sameĀ orĀ likeĀ parts.Ā ShapesĀ andĀ sizesĀ inĀ theĀ drawingsĀ doĀ notĀ reflectĀ theĀ trueĀ proportionsĀ ofĀ theĀ components.Ā ItĀ shouldĀ beĀ understoodĀ thatĀ theĀ exemplaryĀ embodimentsĀ describedĀ hereinĀ areĀ onlyĀ intendedĀ toĀ illustrateĀ andĀ explainĀ theĀ presentĀ inventionĀ andĀ notĀ toĀ limitĀ theĀ presentĀ invention.Ā OtherĀ applications,Ā advantages,Ā alternations,Ā modifications,Ā orĀ equivalentsĀ toĀ theĀ disclosedĀ embodimentsĀ areĀ obviousĀ toĀ thoseĀ skilledĀ inĀ theĀ artĀ andĀ areĀ intendedĀ toĀ beĀ encompassedĀ withinĀ theĀ scopeĀ ofĀ theĀ presentĀ disclosure.
AnĀ activeĀ layer,Ā aĀ thinĀ filmĀ transistor,Ā anĀ arrayĀ substrate,Ā andĀ aĀ displayĀ apparatus,Ā andĀ theirĀ fabricationĀ methodsĀ areĀ providedĀ accordingĀ toĀ someĀ embodimentsĀ ofĀ theĀ presentdisclosure.Ā ForĀ example,Ā anĀ activeĀ layerĀ inĀ aĀ thinĀ filmĀ transistorĀ mayĀ beĀ fabricatedĀ byĀ  formingĀ aĀ thinĀ filmĀ byĀ aĀ directĀ currentĀ (DC)Ā sputteringĀ processļ¼›Ā andĀ etchingĀ theĀ thinĀ filmĀ toĀ formĀ theĀ activeĀ layer.Ā TheĀ thinĀ filmĀ mayĀ beĀ madeĀ ofĀ aĀ materialĀ selectedĀ toĀ provideĀ theĀ activeĀ layerĀ withĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.
InĀ someĀ embodiments,Ā theĀ ā€œmaterialā€Ā selectedĀ forĀ formingĀ theĀ thinĀ filmĀ andĀ thusĀ forĀ formingĀ theĀ activeĀ layerĀ mayĀ alsoĀ beĀ referredĀ toĀ asĀ anĀ ā€œactiveĀ layerĀ materialā€Ā ,Ā orĀ sometimesĀ aĀ ā€œdirect-current-sputteredĀ materialā€Ā orĀ aĀ ā€œDC-sputteredĀ materialā€Ā .Ā TheĀ thinĀ filmĀ mayĀ alsoĀ beĀ referredĀ toĀ asĀ anĀ ā€œactiveĀ layerĀ thinĀ filmā€Ā .
ConventionalĀ methodsĀ forĀ formingĀ oxide-basedĀ semiconductorĀ materialsĀ includeĀ aĀ radioĀ frequencyĀ (RF)Ā sputteringĀ process.Ā ComparedĀ withĀ aĀ DCĀ sputteringĀ process,Ā anĀ RFĀ sputteringĀ processĀ hasĀ disadvantagesĀ ofĀ slowness,Ā requiringĀ adjustments,Ā poorĀ repeatability,Ā unevenĀ compositionĀ ofĀ pluralisticĀ film,Ā andĀ largeĀ RFĀ radiation.Ā Thus,Ā theĀ RFĀ sputteringĀ processĀ isĀ notĀ widelyĀ usedĀ inĀ theĀ industry.Ā Moreover,Ā mostĀ oxide-basedĀ semiconductorĀ materialsĀ areĀ susceptibleĀ toĀ acidĀ andĀ likelyĀ toĀ beĀ corrodedĀ duringĀ etchingĀ process,Ā makingĀ itĀ impracticalĀ toĀ formĀ sourceĀ electrodeĀ andĀ drainĀ electrodeĀ onĀ oxide-basedĀ semiconductorĀ materialsĀ byĀ directĀ etching.Ā AsĀ aĀ result,Ā useĀ ofĀ oxide-basedĀ semiconductorĀ materialsĀ hasĀ limitationsĀ inĀ massiveĀ applications.
AsĀ such,Ā inĀ someĀ embodiments,Ā anĀ exemplaryĀ activeĀ layerĀ isĀ formedĀ byĀ aĀ DCĀ sputteringĀ processĀ usingĀ aĀ selectedĀ material.Ā InĀ thisĀ case,Ā theĀ activeĀ layerĀ hasĀ desiredĀ carrierĀ concentrationĀ andĀ carrierĀ mobility.Ā TheĀ combinationĀ ofĀ theĀ DCĀ sputteringĀ processĀ withĀ theĀ selectedĀ materialĀ forĀ theĀ activeĀ layerĀ mayĀ overcomeĀ difficultiesĀ oftenĀ occurredĀ inĀ conventionalĀ processes.Ā ForĀ example,Ā asĀ disclosedĀ herein,Ā arcingĀ dischargeĀ phenomenonĀ causedĀ byĀ defectsĀ inĀ aĀ conventionalĀ methodĀ mayĀ notĀ occur.
InĀ variousĀ embodiments,Ā inĀ additionĀ toĀ formingĀ theĀ activeĀ layerĀ byĀ aĀ DCĀ sputteringĀ process,Ā gateĀ electrodeĀ andĀ source/drainĀ electrodesĀ mayĀ alsoĀ beĀ formedĀ usingĀ DCĀ sputteringĀ processesĀ toĀ formĀ aĀ desiredĀ thinĀ filmĀ transistorĀ (TFT)Ā .Ā InĀ someĀ cases,Ā theĀ entireĀ thinĀ filmĀ transistorĀ mayĀ beĀ producedĀ mainlyĀ byĀ theĀ DCĀ sputteringĀ processes.Ā ThisĀ mayĀ significantlyĀ simplifyĀ theĀ entireĀ TFTĀ processĀ andĀ mayĀ beĀ aĀ breakthroughĀ solutionĀ inĀ TFTĀ technology.
TheĀ selectedĀ activeĀ layerĀ materialĀ mayĀ include,Ā forĀ example,Ā zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā Ln-dopedĀ zincĀ oxide,Ā andĀ aĀ combinationĀ thereof.
InĀ oneĀ embodiment,Ā theĀ activeĀ layerĀ isĀ madeĀ ofĀ zirconiumĀ indiumĀ oxide.Ā TheĀ chemicalĀ formulaĀ ofĀ zirconiumĀ indiumĀ oxideĀ mayĀ includeĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.Ā ForĀ example,Ā xĀ mayĀ beĀ 0.1,Ā 0.3,Ā 0.5,Ā 0.7,Ā 0.9,Ā 1,Ā 2,Ā 3,Ā 4,Ā 5,Ā 6,Ā 7,Ā 8,Ā 9,Ā 10,Ā 11,Ā 12,Ā 13,Ā 14,Ā 15,Ā 16,Ā 17,Ā 18,Ā 19,Ā 20,Ā orĀ anyĀ valueĀ betweenĀ theĀ disclosedĀ range,Ā andĀ yĀ mayĀ beĀ 1,Ā 5,Ā 10,Ā 15,Ā 20,Ā 25,Ā 30,Ā 35,Ā 40,Ā 45,Ā 50,Ā 55,Ā 60,Ā 65,Ā 70,Ā 75,Ā 80,Ā 85,Ā 90,Ā 95,Ā 100,Ā orĀ anyĀ valueĀ inĀ theĀ disclosedĀ range.
TheĀ zirconiumĀ indiumĀ oxideĀ havingĀ theĀ chemicalĀ structureĀ ZrxIn100-xOyĀ mayĀ haveĀ advantagesĀ ofĀ highĀ mobility,Ā wideĀ opticalĀ bandĀ gap,Ā highĀ stability,Ā andĀ superiorĀ conductivity.Ā AĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ formedĀ byĀ directĀ currentĀ (DC)Ā sputteringĀ mayĀ haveĀ theĀ sameĀ advantages.Ā PriorĀ toĀ annealing,Ā theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ mayĀ beĀ inĀ anĀ amorphousĀ state,Ā andĀ mayĀ haveĀ aĀ highĀ acidĀ etchĀ rate,Ā suitableĀ forĀ usingĀ wetĀ etchingĀ patterningĀ process.Ā AfterĀ annealing,Ā theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ mayĀ beĀ changedĀ fromĀ theĀ amorphousĀ stateĀ toĀ aĀ crystallineĀ state.Ā AtĀ thisĀ point,Ā theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ mayĀ haveĀ aĀ substantiallyĀ lowĀ acidĀ etchĀ rateĀ orĀ otherwiseĀ unsusceptibleĀ toĀ acid,Ā eliminatingĀ theĀ needĀ forĀ configuringĀ anĀ etchĀ barrierĀ layer.Ā WhenĀ theĀ sourceĀ andĀ drainĀ electrodesĀ areĀ formedĀ onĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ byĀ usingĀ directĀ etchingĀ patterningĀ process,Ā theĀ activeĀ layerĀ mayĀ notĀ beĀ etched.
WhenĀ theĀ activeĀ layerĀ hasĀ theĀ characteristicsĀ describedĀ above,Ā aĀ thinĀ filmĀ transistorĀ incorporatingĀ suchĀ activeĀ layerĀ mayĀ useĀ theĀ DCĀ sputteringĀ processĀ entirelyĀ toĀ formĀ theĀ correspondingĀ gateĀ electrode,Ā activeĀ layer,Ā sourceĀ electrodeĀ andĀ drainĀ electrodeĀ sequentially.Ā InĀ addition,Ā theĀ gateĀ insulatingĀ layerĀ mayĀ beĀ directlyĀ formedĀ byĀ usingĀ anĀ electrochemicalĀ oxidationĀ processĀ afterĀ theĀ gateĀ electrodeĀ isĀ formed.Ā InĀ thisĀ case,Ā thinĀ filmĀ transistorsĀ mayĀ beĀ formedĀ inĀ variousĀ typesĀ ofĀ structures,Ā suchĀ asĀ bottom-gateĀ staggeredĀ structure.Ā SuchĀ thinĀ filmĀ transistorsĀ mayĀ haveĀ highĀ carrierĀ mobility,Ā desiredĀ electricalĀ uniformity,Ā andĀ controllableĀ thicknessĀ forĀ theĀ gateĀ insulatingĀ layer.
InĀ oneĀ embodiment,Ā whenĀ theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1017cm-3,Ā defectsĀ causedĀ byĀ arcĀ dischargeĀ duringĀ theĀ DCĀ sputteringĀ mayĀ beĀ avoided.Ā Preferably,Ā theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ mayĀ beĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3.Ā TheĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ orĀ equalĀ toĀ approximatelyĀ 20cm2/Vs.Ā Preferably,Ā theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ mayĀ beĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.Ā TheĀ activeĀ layerĀ describedĀ aboveĀ mayĀ alsoĀ haveĀ highĀ conductivity,Ā makingĀ itĀ moreĀ suitableĀ forĀ DCĀ sputteringĀ deposition.Ā Thus,Ā theĀ filmĀ formationĀ rateĀ canĀ beĀ improved,Ā fabricationĀ processĀ canĀ beĀ simplified,Ā andĀ filmĀ formationĀ costĀ canĀ beĀ reduced.
Further,Ā whenĀ theĀ activeĀ layerĀ isĀ submergedĀ inĀ aĀ phosphoricĀ acidĀ withĀ aĀ concentrationĀ ratioĀ byĀ weightĀ ofĀ approximatelyĀ 40ļ¼…toĀ 60ļ¼…,Ā forĀ exampleĀ aboutĀ 50ļ¼…,Ā theĀ etchingĀ rateĀ mayĀ beĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60nm/min.Ā WhenĀ theĀ activeĀ layerĀ isĀ annealedĀ atĀ approximatelyĀ 150ā„ƒĀ toĀ 220ā„ƒ,Ā forĀ example,Ā aboutĀ 160ā„ƒ,Ā 180ā„ƒ,Ā orĀ 200ā„ƒ,Ā forĀ approximatelyĀ 30Ā minutes,Ā theĀ etchingĀ rateĀ ofĀ theĀ activeĀ layerĀ inĀ aĀ phosphoricĀ acidĀ withĀ aĀ  concentrationĀ ratioĀ byĀ weightĀ ofĀ approximatelyĀ 40ļ¼…toĀ 60ļ¼…isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ 10nm/min.
AsĀ such,Ā theĀ activeĀ layerĀ accordingĀ toĀ theĀ presentĀ disclosureĀ hasĀ aĀ highĀ acidĀ etchingĀ rateĀ beforeĀ annealingĀ andĀ aĀ lowĀ acidĀ etchingĀ rateĀ afterĀ annealing.Ā AfterĀ annealing,Ā theĀ activeĀ layerĀ isĀ acid-resistant.Ā TheĀ activeĀ layerĀ isĀ wetĀ etchedĀ byĀ aĀ patterningĀ processĀ beforeĀ annealing.Ā AfterĀ theĀ activeĀ layerĀ isĀ annealed,Ā whenĀ sourceĀ electrodeĀ andĀ drainĀ electrodeĀ areĀ formedĀ onĀ theĀ activeĀ layerĀ byĀ aĀ patterningĀ process,Ā theĀ activeĀ layerĀ isĀ notĀ etchedĀ byĀ theĀ etchingĀ acid,Ā makingĀ itĀ suitableĀ forĀ formingĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.
TheĀ presentĀ disclosureĀ alsoĀ providesĀ aĀ thinĀ filmĀ transistor.Ā TheĀ thinĀ filmĀ transistorĀ includesĀ theĀ disclosedĀ activeĀ layer.
BecauseĀ theĀ disclosedĀ activeĀ layerĀ materialĀ isĀ used,Ā theĀ thinĀ filmĀ transistorĀ accordingĀ toĀ theĀ presentĀ disclosureĀ mayĀ beĀ formedĀ byĀ aĀ whole-DCĀ sputteringĀ process.Ā AĀ gateĀ electrode,Ā anĀ activeĀ layer,Ā aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrodeĀ mayĀ beĀ formedĀ sequentially.Ā InĀ addition,Ā aĀ gateĀ insulatingĀ layerĀ mayĀ beĀ directlyĀ formedĀ byĀ usingĀ anĀ electrochemicalĀ oxidationĀ processĀ afterĀ theĀ gateĀ electrodeĀ isĀ formed.Ā InĀ thisĀ case,Ā theĀ thinĀ filmĀ transistorĀ mayĀ beĀ formedĀ inĀ variousĀ typesĀ ofĀ structures,Ā suchĀ asĀ bottom-gateĀ staggeredĀ structure.Ā SuchĀ thinĀ filmĀ transistorĀ mayĀ haveĀ highĀ carrierĀ mobility,Ā desiredĀ electricalĀ uniformity,Ā andĀ controllableĀ thicknessĀ forĀ gateĀ insulatingĀ layerĀ toĀ increaseĀ adaptabilityĀ inĀ flatĀ panelĀ displays,Ā suchĀ asĀ liquidĀ crystalĀ displaysĀ (LCDs)Ā ,Ā andĀ activeĀ matrixĀ organicĀ lightĀ emittingĀ diodeĀ displaysĀ (AMOLEDs)Ā .
ForĀ example,Ā theĀ presentĀ inventionĀ providesĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.Ā FIG.Ā 1Ā illustratesĀ aĀ schematicĀ viewĀ ofĀ anĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ accordingĀ toĀ variousĀ embodimentsĀ ofĀ theĀ presentĀ disclosure.Ā FIG.Ā 2Ā illustratesĀ aĀ polarizingĀ microscopeĀ scanningĀ viewĀ ofĀ anotherĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ  filmĀ transistorĀ accordingĀ toĀ variousĀ embodimentsĀ ofĀ theĀ presentĀ disclosure.Ā AsĀ shownĀ inĀ FIGS.Ā 1-2,Ā havingĀ aĀ widelyĀ usedĀ bottom-gateĀ staggeredĀ structure,Ā theĀ thinĀ filmĀ transistorĀ mayĀ includeĀ aĀ substrateĀ 1,Ā aĀ gateĀ electrodeĀ 2,Ā aĀ gateĀ insulatingĀ layerĀ 3,Ā anĀ activeĀ layerĀ 4,Ā aĀ sourceĀ electrodeĀ 501,Ā andĀ aĀ drainĀ electrodeĀ 502.
TheĀ gateĀ electrodeĀ 2Ā isĀ formedĀ onĀ theĀ substrateĀ 1.Ā TheĀ gateĀ insulatingĀ layerĀ 3Ā isĀ configuredĀ onĀ theĀ substrateĀ 1Ā toĀ coverĀ theĀ gateĀ electrodeĀ 2.Ā TheĀ activeĀ layerĀ 4Ā isĀ configuredĀ onĀ theĀ gateĀ insulatingĀ layerĀ 3,Ā correspondingĀ toĀ theĀ gateĀ electrodeĀ 2.Ā TheĀ sourceĀ electrodeĀ 501Ā andĀ theĀ drainĀ electrodeĀ 502Ā areĀ electricallyĀ connectedĀ toĀ bothĀ endsĀ ofĀ theĀ activeĀ layerĀ 4,Ā respectively.Ā InĀ addition,Ā aĀ backĀ channelĀ structureĀ isĀ formedĀ onĀ theĀ activeĀ layerĀ 4.Ā Alternatively,Ā bothĀ sourceĀ electrodeĀ 501Ā andĀ drainĀ electrodeĀ 502Ā mayĀ beĀ configuredĀ onĀ oneĀ endĀ ofĀ theĀ gateĀ insulatingĀ layerĀ 3.
Specifically,Ā theĀ substrateĀ 1Ā mayĀ beĀ aĀ glassĀ substrate,Ā aĀ flexibleĀ polymerĀ substrate,Ā aĀ siliconĀ wafer,Ā aĀ metalĀ foil,Ā aĀ quartzĀ substrate,Ā orĀ otherĀ appropriateĀ materialĀ substrate.Ā TheĀ gateĀ electrodeĀ 2Ā mayĀ beĀ anĀ aluminumĀ layer,Ā anĀ aluminumĀ alloyĀ layer,Ā aĀ tantalumĀ layer,Ā aĀ tantalumĀ alloyĀ layer,Ā aĀ molybdenumĀ layer,Ā aĀ stackĀ ofĀ twoĀ orĀ moreĀ sub-layersĀ ofĀ combinationĀ selectedĀ fromĀ aluminum,Ā aluminumĀ alloy,Ā tantalum,Ā tantalumĀ alloy,Ā orĀ anyĀ suitableĀ gateĀ structures.
TheĀ activeĀ layerĀ 4Ā mayĀ beĀ madeĀ ofĀ theĀ disclosedĀ zirconiumĀ indiumĀ oxide.Ā AnĀ insulatingĀ oxideĀ layerĀ mayĀ beĀ directlyĀ formedĀ onĀ theĀ gateĀ electrodeĀ 2Ā asĀ theĀ gateĀ insulatingĀ layerĀ 3.Ā ThatĀ is,Ā theĀ gateĀ insulatingĀ layerĀ 3Ā mayĀ beĀ madeĀ ofĀ insulatingĀ oxideĀ formedĀ byĀ anĀ electrochemicalĀ oxidationĀ process.Ā ForĀ example,Ā theĀ insulatingĀ oxideĀ mayĀ beĀ aluminumĀ oxide,Ā molybdenumĀ oxide,Ā tantalumĀ oxide,Ā orĀ aluminumĀ neodymiumĀ oxide.
ForĀ theĀ fabricationĀ ofĀ theĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor,Ā theĀ sourceĀ electrodeĀ 501Ā andĀ theĀ drainĀ electrodeĀ 502Ā mayĀ beĀ madeĀ ofĀ conductiveĀ metalĀ thatĀ canĀ beĀ  etchedĀ byĀ acid.Ā ForĀ example,Ā theĀ conductiveĀ metalĀ mayĀ beĀ aluminum,Ā molybdenum,Ā tantalum,Ā orĀ aluminumĀ neodymiumĀ alloy.Ā InĀ oneĀ embodiment,Ā theĀ sourceĀ electrodeĀ 501Ā andĀ theĀ drainĀ electrodeĀ 502Ā mayĀ directlyĀ contactĀ theĀ activeĀ layerĀ withoutĀ anĀ etchĀ barrierĀ layerĀ there-between.
Further,Ā inĀ oneĀ embodiment,Ā theĀ substrateĀ 1Ā mayĀ beĀ coatedĀ withĀ aĀ bufferĀ layerĀ orĀ aĀ water-oxygen-barrierĀ layerĀ toĀ increaseĀ theĀ barrierĀ abilityĀ ofĀ theĀ substrate.Ā ForĀ example,Ā theĀ bufferĀ layerĀ mayĀ beĀ madeĀ ofĀ siliconĀ nitride,Ā siliconĀ oxide,Ā siliconĀ oxynitride,Ā andĀ aluminumĀ oxide,Ā etc.
InĀ anotherĀ embodiment,Ā inĀ theĀ thinĀ filmĀ transistorĀ accordingĀ toĀ theĀ presentĀ disclosure,Ā theĀ gateĀ electrodeĀ 2Ā hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 100nmĀ toĀ 800nm.Ā ForĀ example,Ā theĀ gateĀ electrodeĀ 2Ā mayĀ haveĀ aĀ thicknessĀ ofĀ 150nm,Ā 200nm,Ā 300nm,Ā 400nm,Ā 500nm,Ā 600nm,Ā orĀ 700nm,Ā etc.Ā TheĀ gateĀ insulatingĀ layerĀ 3Ā hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 30nmĀ toĀ 600nm.Ā ForĀ example,Ā theĀ gateĀ electrodeĀ layerĀ 3Ā mayĀ haveĀ aĀ thicknessĀ beĀ 50nm,Ā 100nm,Ā 150nm,Ā 200nm,Ā 300nm,Ā 400nm,Ā orĀ 500nm,Ā etc.Ā TheĀ activeĀ layerĀ 4Ā hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 10nmĀ toĀ 200nm.Ā ForĀ example,Ā theĀ activeĀ layerĀ 4Ā mayĀ haveĀ aĀ thicknessĀ ofĀ 20nm,Ā 40nm,Ā 60nm,Ā 80nm,Ā 100nm,Ā 130nm,Ā 150nm,Ā orĀ 180nm,Ā etc.
TheĀ sourceĀ electrodeĀ 501Ā andĀ theĀ drainĀ electrodeĀ 502Ā haveĀ aĀ thicknessĀ ofĀ approximatelyĀ 100nmĀ toĀ 1000nm.Ā ForĀ example,Ā theĀ sourceĀ electrodeĀ 501Ā andĀ drainĀ electrodeĀ 502Ā mayĀ haveĀ aĀ thicknessĀ ofĀ 150nm,Ā 200nm,Ā 300nm,Ā 400nm,Ā 500nm,Ā 600nm,Ā 700nm,Ā 800nm,Ā orĀ 900nm,Ā etc.Ā TheĀ backĀ channelĀ hasĀ aĀ widthĀ ofĀ approximatelyĀ 3Ī¼mĀ toĀ 30Ī¼m.Ā ForĀ example,Ā theĀ backĀ channelĀ mayĀ haveĀ aĀ widthĀ ofĀ 5Ā Ī¼m,Ā 10Ā Ī¼m,Ā 15Ā Ī¼m,Ā 20Ā Ī¼m,Ā orĀ 25Ā Ī¼m,Ā etc.Ā ByĀ adjustingĀ theĀ thicknessesĀ ofĀ eachĀ componentĀ ofĀ theĀ thinĀ filmĀ transistor,Ā theĀ thinĀ filmĀ transistorĀ mayĀ achieveĀ differentĀ propertiesĀ andĀ performances.Ā Thus,Ā suchĀ thinĀ filmĀ transistorĀ isĀ adaptableĀ toĀ variousĀ applications.
TheĀ presentĀ disclosureĀ alsoĀ providesĀ anĀ arrayĀ substrate.Ā TheĀ arrayĀ substrateĀ includesĀ anyĀ ofĀ theĀ disclosedĀ thinĀ filmĀ transistors.Ā InĀ oneĀ embodiment,Ā theĀ arrayĀ substrateĀ accordingĀ toĀ theĀ presentĀ disclosureĀ hasĀ theĀ advantagesĀ ofĀ highĀ carrierĀ mobilityĀ andĀ desiredĀ electricalĀ uniformity.
TheĀ presentĀ disclosureĀ alsoĀ providesĀ aĀ displayĀ apparatus.Ā TheĀ displayĀ apparatusĀ includesĀ anyĀ ofĀ theĀ disclosedĀ arrayĀ substrates.Ā InĀ oneĀ embodiment,Ā theĀ displayĀ apparatusĀ accordingĀ toĀ theĀ presentĀ disclosureĀ hasĀ theĀ advantagesĀ ofĀ highĀ carrierĀ mobilityĀ andĀ desiredĀ electricalĀ uniformity.
TheĀ presentĀ disclosureĀ alsoĀ providesĀ aĀ fabricationĀ methodĀ forĀ anĀ activeĀ layer.Ā FIG.Ā 4Ā illustratesĀ aĀ flowĀ chartĀ ofĀ aĀ fabricationĀ methodĀ forĀ anĀ exemplaryĀ activeĀ layerĀ accordingĀ toĀ theĀ presentĀ disclosure.Ā AsĀ shownĀ inĀ FIG.Ā 4,Ā theĀ fabricationĀ methodĀ forĀ theĀ activeĀ layerĀ includesĀ theĀ followingĀ steps.
StepĀ S01:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ withĀ aĀ predeterminedĀ thickness.
Specifically,Ā aĀ DCĀ sputteringĀ processĀ isĀ usedĀ toĀ formĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ withĀ aĀ predeterminedĀ thickness.Ā InĀ oneĀ embodiment,Ā theĀ chemicalĀ formulaĀ ofĀ zirconiumĀ indiumĀ oxideĀ isĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
StepĀ S02:Ā usingĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ etchĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ anĀ activeĀ layer.
TheĀ fabricationĀ methodĀ forĀ theĀ activeĀ layerĀ accordingĀ toĀ theĀ presentĀ disclosureĀ hasĀ theĀ advantagesĀ ofĀ highĀ filmĀ formationĀ rateĀ andĀ simplifiedĀ fabricationĀ process.Ā InĀ addition,Ā theĀ absenceĀ ofĀ theĀ barrierĀ layerĀ onĀ theĀ activeĀ layerĀ reducesĀ filmĀ formationĀ cost.
Further,Ā afterĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ isĀ wetĀ etchedĀ inĀ aĀ phosphoricĀ acidĀ withĀ aĀ concentrationĀ ratioĀ byĀ weightĀ ofĀ approximatelyĀ 40ļ¼…toĀ 60ļ¼…,Ā theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ isĀ annealedĀ atĀ approximatelyĀ 150ā„ƒĀ toĀ 220ā„ƒĀ forĀ approximatelyĀ 30Ā minutesĀ toĀ formĀ theĀ desiredĀ activeĀ layer.Ā AsĀ evidence,Ā afterĀ theĀ activeĀ layerĀ isĀ annealed,Ā theĀ activeĀ layerĀ isĀ changedĀ fromĀ anĀ amorphousĀ stateĀ toĀ aĀ crystallineĀ state,Ā whichĀ hasĀ highĀ acidĀ resistance.
TheĀ presentĀ disclosureĀ alsoĀ providesĀ aĀ fabricationĀ methodĀ forĀ aĀ thinĀ filmĀ transistor.Ā FIG.Ā 5Ā illustratesĀ aĀ flowĀ chartĀ ofĀ aĀ fabricationĀ methodĀ forĀ anĀ exemplaryĀ thinĀ filmĀ transistorĀ accordingĀ toĀ theĀ presentĀ disclosure.Ā AsĀ shownĀ inĀ FIG.Ā 5,Ā theĀ fabricationĀ methodĀ includesĀ theĀ followingĀ steps.
StepĀ S101:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ aĀ firstĀ thinĀ filmĀ layerĀ withĀ aĀ gateĀ electrodeĀ materialĀ onĀ aĀ substrateĀ withĀ aĀ predeterminedĀ thicknessĀ andĀ thenĀ usingĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ formĀ theĀ gateĀ electrode.
ForĀ example,Ā aĀ firstĀ thinĀ filmĀ layerĀ isĀ formedĀ onĀ aĀ substrateĀ byĀ usingĀ aĀ DCĀ sputteringĀ process.Ā TheĀ firstĀ thinĀ filmĀ layerĀ isĀ thenĀ etchedĀ byĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ formĀ aĀ firstĀ patternedĀ thinĀ filmĀ layer.Ā TheĀ firstĀ patternedĀ thinĀ filmĀ layerĀ hasĀ aĀ shapeĀ ofĀ aĀ gateĀ electrode.
StepĀ S102:Ā usingĀ anĀ electrochemicalĀ oxidationĀ methodĀ toĀ formĀ aĀ gateĀ insulatingĀ layerĀ fromĀ theĀ gateĀ insulatingĀ layerĀ materialĀ withĀ aĀ predeterminedĀ thicknessĀ onĀ theĀ gateĀ electrode.
ForĀ example,Ā aĀ gateĀ insulatingĀ layerĀ mayĀ beĀ directlyĀ formedĀ byĀ usingĀ anĀ electrochemicalĀ oxidationĀ processĀ afterĀ theĀ gateĀ electrodeĀ isĀ formed.Ā InĀ thisĀ case,Ā theĀ thinĀ filmĀ transistorĀ mayĀ beĀ formedĀ inĀ variousĀ typesĀ ofĀ structures,Ā suchĀ asĀ aĀ bottom-gateĀ staggeredĀ structure.Ā  SuchĀ thinĀ filmĀ transistorĀ mayĀ haveĀ highĀ carrierĀ mobility,Ā desiredĀ electricalĀ uniformity,Ā andĀ controllableĀ thicknessĀ ofĀ gateĀ insulatingĀ layer.
StepĀ S103:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ withĀ aĀ predeterminedĀ thicknessĀ onĀ theĀ gateĀ insulatingĀ layer,Ā usingĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ obtainĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ thenĀ annealingĀ theĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ anĀ activeĀ layer.
ForĀ example,Ā aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ withĀ aĀ predeterminedĀ thicknessĀ isĀ formedĀ onĀ theĀ gateĀ insulatingĀ layerĀ byĀ usingĀ aĀ DCĀ sputteringĀ process.Ā TheĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ isĀ thenĀ etchedĀ byĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ formĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film.Ā TheĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ hasĀ aĀ shapeĀ ofĀ anĀ activeĀ layer.Ā TheĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ asĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
StepĀ S104:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ aĀ secondĀ thinĀ filmĀ layerĀ withĀ aĀ predeterminedĀ thicknessĀ onĀ theĀ activeĀ layer,Ā andĀ thenĀ usingĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
ForĀ example,Ā aĀ secondĀ thinĀ filmĀ layerĀ withĀ aĀ predeterminedĀ thicknessĀ isĀ formedĀ onĀ theĀ activeĀ layerĀ byĀ usingĀ aĀ DCĀ sputteringĀ process.Ā TheĀ secondĀ thinĀ filmĀ layerĀ isĀ thenĀ etchedĀ byĀ aĀ wetĀ etchingĀ patterningĀ processĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
Further,Ā whenĀ formingĀ theĀ firstĀ thinĀ filmĀ layer,Ā theĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ theĀ secondĀ thinĀ filmĀ layer,Ā multipleĀ stepsĀ ofĀ DCĀ sputteringĀ processĀ mayĀ beĀ usedĀ toĀ depositĀ multipleĀ layersĀ toĀ reachĀ aĀ predeterminedĀ thicknessĀ dependingĀ onĀ theĀ actualĀ designĀ  requirement.Ā TheĀ DCĀ sputteringĀ processĀ andĀ theĀ electrochemicalĀ oxidationĀ processĀ areĀ usedĀ hereinĀ forĀ fabricatingĀ thinĀ filmĀ transistorsĀ withoutĀ limitations.
ForĀ example,Ā anĀ electrochemicalĀ oxidationĀ processĀ mayĀ includeĀ theĀ followingĀ steps.Ā AĀ substrateĀ formedĀ withĀ gateĀ electrodesĀ isĀ submergedĀ orĀ insertedĀ intoĀ anĀ electrolyteĀ solutionĀ atĀ oneĀ side,Ā andĀ isĀ electricallyĀ connectedĀ toĀ anĀ anodeĀ ofĀ powerĀ source.Ā AĀ conductiveĀ metalĀ asĀ aĀ materialĀ toĀ formĀ aĀ gateĀ insulatingĀ layerĀ isĀ submergedĀ atĀ theĀ otherĀ sideĀ ofĀ theĀ electrolyteĀ solution,Ā andĀ isĀ electricallyĀ connectedĀ toĀ aĀ cathodeĀ ofĀ powerĀ source.Ā ThenĀ anĀ electricalĀ currentĀ isĀ suppliedĀ throughĀ theĀ anodeĀ andĀ theĀ cathodeĀ toĀ performĀ electrochemicalĀ oxidationĀ toĀ formĀ anĀ insulatingĀ oxideĀ ofĀ theĀ conductiveĀ metalĀ onĀ theĀ gateĀ electrodeĀ andĀ anyĀ exposedĀ surfaceĀ ofĀ theĀ substrate.Ā TheĀ metalĀ oxideĀ layerĀ isĀ usedĀ asĀ gateĀ insulatingĀ layer.Ā TheĀ aboveĀ exampleĀ isĀ forĀ illustrationĀ purposesĀ onlyĀ andĀ doesĀ notĀ limitĀ theĀ specificĀ detailsĀ ofĀ theĀ metalĀ oxidationĀ operationĀ principle.
TheĀ fabricationĀ processĀ ofĀ thinĀ filmĀ transistorsĀ accordingĀ toĀ theĀ presentĀ disclosureĀ usesĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ aĀ gateĀ electrode,Ā usesĀ anĀ electrochemicalĀ oxidationĀ processĀ toĀ formĀ aĀ gateĀ insulatingĀ layerĀ onĀ theĀ gateĀ electrode,Ā andĀ thenĀ usesĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ activeĀ layer,Ā aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode,Ā sequentially.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ directlyĀ formedĀ onĀ theĀ activeĀ layerĀ byĀ usingĀ aĀ wetĀ etchingĀ patterningĀ processĀ withoutĀ damagingĀ theĀ activeĀ layer.Ā AsĀ aĀ result,Ā variousĀ typesĀ ofĀ thinĀ filmĀ transistorĀ structuresĀ mayĀ beĀ formedĀ withĀ aĀ controlledĀ thicknessĀ ofĀ gateĀ insulatingĀ layer.Ā SuchĀ fabricationĀ processĀ isĀ simple,Ā lowĀ cost,Ā andĀ suitableĀ forĀ widespreadĀ adoption.
MoreĀ examplesĀ areĀ givenĀ toĀ furtherĀ illustrateĀ theĀ presentĀ invention.Ā WhenĀ noĀ specificĀ conditionsĀ areĀ mentionedĀ inĀ anyĀ operations,Ā normalĀ operationĀ conditionsĀ orĀ manufacturerĀ recommendedĀ conditionsĀ mayĀ beĀ assumed.Ā WhenĀ aĀ materialĀ isĀ notĀ specifiedĀ orĀ notĀ  identifiedĀ withĀ specificĀ manufacturer,Ā suchĀ materialĀ willĀ beĀ assumedĀ toĀ beĀ aĀ commerciallyĀ availableĀ product.
InĀ oneĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ anĀ activeĀ layer.Ā TheĀ thicknessĀ ofĀ theĀ activeĀ layerĀ isĀ approximatelyĀ 20nm.Ā TheĀ activeĀ layerĀ isĀ madeĀ ofĀ zirconiumĀ indiumĀ oxide,Ā withĀ anĀ approximateĀ chemicalĀ formulaĀ Zr1In91O100.Ā TheĀ carrierĀ concentrationĀ isĀ approximatelyĀ 1.5x1018cm-3.Ā TheĀ carrierĀ mobilityĀ isĀ approximatelyĀ 31cm2/Vs.Ā BeforeĀ beingĀ annealed,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 60nm/minĀ inĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ phosphoricĀ acidĀ solution.Ā AfterĀ beingĀ annealedĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutes,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ 5nm/minĀ inĀ theĀ phosphoricĀ acidĀ solution.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ anĀ activeĀ layer.Ā TheĀ thicknessĀ ofĀ theĀ activeĀ layerĀ isĀ approximatelyĀ 25nm.Ā TheĀ activeĀ layerĀ isĀ madeĀ ofĀ zirconiumĀ indiumĀ oxide,Ā withĀ anĀ approximateĀ chemicalĀ formulaĀ Zr6In94O100.Ā TheĀ carrierĀ concentrationĀ isĀ approximatelyĀ 1.0x1018cm-3.Ā TheĀ carrierĀ mobilityĀ isĀ approximatelyĀ 30cm2/Vs.Ā BeforeĀ beingĀ annealed,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 65nm/minĀ inĀ aĀ phosphoricĀ acidĀ solutionĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weight.Ā AfterĀ beingĀ annealedĀ inĀ airĀ atĀ approximatelyĀ 210ā„ƒĀ temperatureĀ forĀ approximatelyĀ 35Ā minutes,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 4nm/minĀ inĀ theĀ phosphoricĀ acidĀ solution.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ anĀ activeĀ layer.Ā TheĀ thicknessĀ ofĀ theĀ activeĀ layerĀ isĀ approximatelyĀ 22nm.Ā TheĀ activeĀ layerĀ isĀ madeĀ ofĀ zirconiumĀ indiumĀ oxide,Ā withĀ anĀ approximateĀ chemicalĀ formulaĀ Zr11In89O100.Ā TheĀ carrierĀ concentrationĀ isĀ approximatelyĀ 2.5x1019cm-3.Ā TheĀ carrierĀ mobilityĀ isĀ approximatelyĀ 35cm2/Vs.Ā BeforeĀ beingĀ annealed,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 63nm/minĀ inĀ aĀ phosphoricĀ  acidĀ solutionĀ havingĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weight.Ā AfterĀ beingĀ annealedĀ inĀ airĀ atĀ approximatelyĀ 210ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutes,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 3nm/minĀ inĀ theĀ phosphoricĀ acidĀ solution.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ anĀ activeĀ layer.Ā TheĀ thicknessĀ ofĀ theĀ activeĀ layerĀ isĀ approximatelyĀ 20nm.Ā TheĀ activeĀ layerĀ isĀ madeĀ ofĀ zirconiumĀ indiumĀ oxide,Ā withĀ anĀ approximateĀ chemicalĀ formulaĀ Zr16In84O100.Ā TheĀ carrierĀ concentrationĀ isĀ approximatelyĀ 1.0x1020cm-3.Ā TheĀ carrierĀ mobilityĀ isĀ approximatelyĀ 55cm2/Vs.Ā BeforeĀ beingĀ annealed,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 67nm/minĀ inĀ aĀ phosphoricĀ acidĀ solutionĀ havingĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weight.Ā AfterĀ beingĀ annealedĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutes,Ā theĀ activeĀ layerĀ hasĀ anĀ etchingĀ rateĀ equalĀ toĀ approximatelyĀ 3.5nm/minĀ inĀ theĀ phosphoricĀ acidĀ solution.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.Ā TheĀ thinĀ filmĀ transistorĀ hasĀ aĀ bottom-gateĀ staggeredĀ structure.Ā TheĀ thinĀ filmĀ transistorĀ includesĀ aĀ substrate,Ā aĀ gateĀ electrode,Ā aĀ gateĀ insulatingĀ layer,Ā anĀ activeĀ layer,Ā aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.Ā TheĀ substrateĀ isĀ aĀ glassĀ substrateĀ withĀ aĀ thicknessĀ ofĀ approximatelyĀ 0.7mm.Ā TheĀ gateĀ electrodeĀ isĀ formedĀ onĀ theĀ substrate,Ā isĀ madeĀ ofĀ aluminum,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 300nm.
TheĀ gateĀ insulatingĀ layerĀ formedĀ onĀ theĀ substrateĀ toĀ coverĀ theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ aluminumĀ oxide,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 200nm.Ā TheĀ activeĀ layerĀ isĀ formedĀ onĀ theĀ gateĀ insulatingĀ layer,Ā correspondingĀ toĀ theĀ gateĀ electrode.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ electricallyĀ connectedĀ toĀ bothĀ endsĀ ofĀ theĀ activeĀ layer,Ā respectively,Ā toĀ formĀ anĀ approximateĀ 5Ī¼mĀ thickĀ backĀ channelĀ onĀ theĀ activeĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ  drainĀ electrodeĀ areĀ alsoĀ locatedĀ atĀ bothĀ endsĀ ofĀ theĀ gateĀ insulatingĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ aluminum,Ā withĀ aĀ thicknessĀ ofĀ approximatelyĀ 500nm.
TheĀ fabricationĀ methodĀ forĀ theĀ aboveĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ includesĀ theĀ followingĀ steps.
StepĀ S201:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ depositĀ anĀ approximateĀ 300nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ aĀ substrateĀ andĀ thenĀ usingĀ aĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrode.
StepĀ S202:Ā usingĀ anĀ electrochemicalĀ oxidationĀ processĀ toĀ formĀ anĀ approximateĀ 200nmĀ thickĀ aluminumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ electrodeĀ asĀ aĀ gateĀ insulatingĀ layer.
StepĀ S203:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 20nmĀ thickĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ insulatingĀ layer,Ā usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ thenĀ annealingĀ theĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutesĀ toĀ formĀ anĀ activeĀ layer.
StepĀ S204:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 500nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ theĀ activeĀ layerĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.Ā TheĀ thinĀ filmĀ transistorĀ hasĀ aĀ bottom-gateĀ staggeredĀ structure.Ā TheĀ thinĀ filmĀ transistorĀ includesĀ aĀ substrate,Ā aĀ gateĀ electrode,Ā aĀ gateĀ insulatingĀ layer,Ā anĀ activeĀ layer,Ā aĀ  sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.Ā TheĀ substrateĀ isĀ aĀ quartzĀ substrateĀ withĀ aĀ thicknessĀ ofĀ approximatelyĀ 0.7mm.Ā TheĀ substrateĀ isĀ coveredĀ withĀ anĀ approximateĀ 50nmĀ thickĀ aqueousĀ oxygenĀ barrierĀ layer.Ā TheĀ gateĀ electrodeĀ isĀ formedĀ onĀ theĀ substrate,Ā isĀ madeĀ ofĀ tantalum,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 400nm.
TheĀ gateĀ insulatingĀ layerĀ formedĀ onĀ theĀ substrateĀ toĀ coverĀ theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ tantalumĀ oxide,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 350nm.Ā TheĀ activeĀ layerĀ isĀ formedĀ onĀ theĀ gateĀ insulatingĀ layer,Ā correspondingĀ toĀ theĀ gateĀ electrode.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ electricallyĀ connectedĀ toĀ bothĀ endsĀ ofĀ theĀ activeĀ layer,Ā respectively,Ā toĀ formĀ anĀ approximateĀ 6Ī¼mĀ thickĀ backĀ channelĀ onĀ theĀ activeĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ alsoĀ locatedĀ atĀ bothĀ endsĀ ofĀ theĀ gateĀ insulatingĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ tantalum,Ā withĀ aĀ thicknessĀ ofĀ approximatelyĀ 700nm.
TheĀ fabricationĀ methodĀ forĀ theĀ aboveĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ includesĀ theĀ followingĀ steps.
StepĀ S301:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ depositĀ anĀ approximateĀ 400nmĀ thickĀ tantalumĀ thinĀ filmĀ onĀ aĀ substrateĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ tantalumĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrode.
StepĀ S302:Ā usingĀ anĀ electrochemicalĀ oxidationĀ processĀ toĀ formĀ anĀ approximateĀ 350nmĀ thickĀ tantalumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ electrodeĀ asĀ aĀ gateĀ insulatingĀ layer.
StepĀ S303:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 25nmĀ thickĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ insulatingĀ layer,Ā usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ thenĀ annealingĀ theĀ patternedĀ zirconiumĀ  indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutesĀ toĀ formĀ anĀ activeĀ layer.
StepĀ S304:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 700nmĀ thickĀ tantalumĀ thinĀ filmĀ onĀ theĀ activeĀ layerĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ tantalumĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.Ā TheĀ thinĀ filmĀ transistorĀ hasĀ aĀ bottom-gateĀ staggeredĀ structure.Ā TheĀ thinĀ filmĀ transistorĀ includesĀ aĀ substrate,Ā aĀ gateĀ electrode,Ā aĀ gateĀ insulatingĀ layer,Ā anĀ activeĀ layer,Ā aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.Ā TheĀ substrateĀ isĀ aĀ glassĀ substrateĀ withĀ aĀ thicknessĀ ofĀ approximatelyĀ 0.7mm.Ā TheĀ gateĀ electrodeĀ isĀ formedĀ onĀ theĀ substrate,Ā isĀ madeĀ ofĀ aluminum,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 300nm.
TheĀ gateĀ insulatingĀ layerĀ formedĀ onĀ theĀ substrateĀ toĀ coverĀ theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ aluminumĀ oxide,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 200nm.Ā TheĀ activeĀ layerĀ isĀ formedĀ onĀ theĀ gateĀ insulatingĀ layer,Ā correspondingĀ toĀ theĀ gateĀ electrode.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ electricallyĀ connectedĀ toĀ bothĀ endsĀ ofĀ theĀ activeĀ layer,Ā respectively,Ā toĀ formĀ anĀ approximateĀ 3Ī¼mĀ thickĀ backĀ channelĀ onĀ theĀ activeĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ alsoĀ locatedĀ atĀ bothĀ endsĀ ofĀ theĀ gateĀ insulatingĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ aluminum,Ā withĀ aĀ thicknessĀ ofĀ approximatelyĀ 500nm.
TheĀ fabricationĀ methodĀ forĀ theĀ aboveĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ includesĀ theĀ followingĀ steps.
StepĀ S401:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ depositĀ anĀ approximateĀ 300nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ aĀ substrateĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrode.
StepĀ S402:Ā usingĀ anĀ electrochemicalĀ oxidationĀ processĀ toĀ formĀ anĀ approximateĀ 200nmĀ thickĀ aluminumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ electrodeĀ asĀ aĀ gateĀ insulatingĀ layer.
StepĀ S403:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 20nmĀ thickĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ insulatingĀ layer,Ā usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ thenĀ annealingĀ theĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutesĀ toĀ formĀ anĀ activeĀ layer.
StepĀ S404:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 500nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ theĀ activeĀ layerĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
InĀ anotherĀ embodiment,Ā theĀ presentĀ inventionĀ providesĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistor.Ā TheĀ thinĀ filmĀ transistorĀ hasĀ aĀ bottom-gateĀ staggeredĀ structure.Ā TheĀ thinĀ filmĀ transistorĀ includesĀ aĀ substrate,Ā aĀ gateĀ electrode,Ā aĀ gateĀ insulatingĀ layer,Ā anĀ activeĀ layer,Ā aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.Ā TheĀ substrateĀ isĀ aĀ glassĀ substrateĀ withĀ aĀ thicknessĀ ofĀ approximatelyĀ 0.7mm.Ā TheĀ gateĀ electrodeĀ isĀ formedĀ onĀ theĀ substrate,Ā isĀ madeĀ ofĀ aluminum,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 300nm.
TheĀ gateĀ insulatingĀ layerĀ formedĀ onĀ theĀ substrateĀ toĀ coverĀ theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ aluminumĀ oxide,Ā andĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 200nm.Ā TheĀ activeĀ layerĀ isĀ formedĀ onĀ theĀ gateĀ insulatingĀ layer,Ā correspondingĀ toĀ theĀ gateĀ electrode.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ electricallyĀ connectedĀ toĀ bothĀ endsĀ ofĀ theĀ activeĀ layer,Ā respectively,Ā toĀ formĀ anĀ approximateĀ 4.3Ī¼mĀ thickĀ backĀ channelĀ onĀ theĀ activeĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ alsoĀ locatedĀ atĀ bothĀ endsĀ ofĀ theĀ gateĀ insulatingĀ layer.Ā TheĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ aluminum,Ā withĀ aĀ thicknessĀ ofĀ approximatelyĀ 500nm.
TheĀ fabricationĀ methodĀ forĀ theĀ aboveĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ includesĀ theĀ followingĀ steps.
StepĀ S501:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ depositĀ anĀ approximateĀ 300nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ aĀ substrateĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrode.
StepĀ S502:Ā usingĀ anĀ electrochemicalĀ oxidationĀ processĀ toĀ formĀ anĀ approximateĀ 200nmĀ thickĀ aluminumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ electrodeĀ asĀ aĀ gateĀ insulatingĀ layer.
StepĀ S503:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 20nmĀ thickĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ onĀ theĀ gateĀ insulatingĀ layer,Ā usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ toĀ formĀ aĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ film,Ā andĀ thenĀ annealingĀ theĀ patternedĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ approximatelyĀ 200ā„ƒĀ temperatureĀ forĀ approximatelyĀ 30Ā minutesĀ toĀ formĀ anĀ activeĀ layer.
StepĀ S504:Ā usingĀ aĀ DCĀ sputteringĀ processĀ toĀ formĀ anĀ approximateĀ 500nmĀ thickĀ aluminumĀ thinĀ filmĀ onĀ theĀ activeĀ layerĀ andĀ thenĀ usingĀ phosphoricĀ acidĀ havingĀ aĀ concentrationĀ ofĀ  approximateĀ 50ļ¼…byĀ weightĀ toĀ etchĀ theĀ aluminumĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
InĀ anotherĀ embodiment,Ā eachĀ ofĀ theĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorsĀ illustratedĀ inĀ theĀ aboveĀ examplesĀ isĀ measuredĀ toĀ obtainĀ aĀ pluralityĀ ofĀ outputĀ characteristicsĀ curves,Ā respectively.Ā FIG.Ā 3Ā illustratesĀ outputĀ characteristicsĀ curvesĀ ofĀ certainĀ exemplaryĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorsĀ accordingĀ toĀ theĀ presentĀ disclosure.Ā AsĀ shownĀ inĀ FIG.Ā 3,Ā theĀ outputĀ characteristicsĀ curvesĀ representĀ theĀ relationshipsĀ betweenĀ theĀ drainĀ electrodeĀ currentĀ (inĀ Ampere)Ā andĀ theĀ drainĀ electrodeĀ voltageĀ (inĀ Volt)Ā underĀ differentĀ gateĀ electrodeĀ voltagesĀ (inĀ Volt)Ā ,Ā correspondingĀ toĀ differentĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorsĀ accordingĀ toĀ variousĀ embodiments.Ā TheĀ fourĀ outputĀ characteristicsĀ curvesĀ haveĀ similarĀ shapes,Ā butĀ doĀ notĀ intersectĀ withĀ eachĀ other.
CurveĀ IĀ correspondsĀ toĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ formedĀ byĀ aĀ fabricationĀ processĀ withĀ stepsĀ S201Ā throughĀ S204.Ā CurveĀ IIĀ correspondsĀ toĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ formedĀ byĀ aĀ fabricationĀ processĀ withĀ stepsĀ S301Ā throughĀ S304.Ā CurveĀ IIIĀ correspondsĀ toĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ formedĀ byĀ aĀ fabricationĀ processĀ withĀ stepsĀ S401Ā throughĀ S404.Ā CurveĀ IVĀ correspondsĀ toĀ aĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ formedĀ byĀ aĀ fabricationĀ processĀ withĀ stepsĀ S501Ā throughĀ S504.Ā AsĀ shownĀ inĀ FIG.Ā 3,Ā theĀ gateĀ electrodeĀ voltageĀ ofĀ theĀ back-channel-etchedĀ oxideĀ thinĀ filmĀ transistorĀ accordingĀ toĀ theĀ presentĀ disclosureĀ mayĀ beĀ adjustedĀ toĀ controlĀ theĀ drainĀ electrodeĀ currentĀ toĀ achieveĀ desirableĀ outputĀ characteristics.Ā ArrayĀ substratesĀ andĀ displayĀ apparatusĀ incorporatingĀ theĀ disclosedĀ thinĀ filmĀ transistorsĀ mayĀ haveĀ desiredĀ performanceĀ andĀ quality.
VariousĀ embodimentsĀ haveĀ beenĀ describedĀ toĀ illustrateĀ theĀ operationĀ principlesĀ andĀ exemplaryĀ implementations.Ā TheĀ embodimentsĀ disclosedĀ hereinĀ areĀ exemplaryĀ only.Ā OtherĀ  applications,Ā advantages,Ā alternations,Ā modifications,Ā orĀ equivalentsĀ toĀ theĀ disclosedĀ embodimentsĀ areĀ obviousĀ toĀ thoseĀ skilledĀ inĀ theĀ artĀ andĀ areĀ intendedĀ toĀ beĀ encompassedĀ withinĀ theĀ scopeĀ ofĀ theĀ presentĀ disclosure.

Claims (28)

  1. AĀ methodĀ forĀ fabricatingĀ anĀ activeĀ layerĀ inĀ aĀ thinĀ filmĀ transistor,Ā comprising:
    formingĀ aĀ thinĀ filmĀ byĀ aĀ directĀ currentĀ (DC)Ā sputteringĀ processļ¼›Ā and
    etchingĀ theĀ thinĀ filmĀ toĀ formĀ theĀ activeĀ layer,Ā whereinĀ theĀ thinĀ filmĀ isĀ madeĀ ofĀ aĀ materialĀ selectedĀ toĀ provideĀ theĀ activeĀ layerĀ withĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.
  2. TheĀ methodĀ accordingĀ toĀ claimĀ 1,Ā wherein:
    theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā and
    theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
  3. TheĀ methodĀ accordingĀ toĀ claimĀ 1,Ā wherein:
    theĀ materialĀ includesĀ oneĀ orĀ moreĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā andĀ Ln-dopedĀ zincĀ oxide.
  4. TheĀ methodĀ accordingĀ toĀ claimĀ 3,Ā wherein:
    theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
  5. TheĀ methodĀ accordingĀ toĀ claimĀ 4,Ā wherein:
    theĀ thinĀ filmĀ isĀ etchedĀ byĀ aĀ wetĀ etchingĀ process.
  6. TheĀ methodĀ accordingĀ toĀ claimĀ 5,Ā whereinĀ theĀ wetĀ etchingĀ processĀ includes:
    etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 40Ā ļ¼…toĀ 60Ā ļ¼…ļ¼›Ā and
    annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ betweenĀ approximatelyĀ 150Ā ā„ƒĀ andĀ 220Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes,Ā wherein:
    anĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ 10nm/min.
  7. TheĀ methodĀ accordingĀ toĀ claimĀ 5,Ā whereinĀ theĀ wetĀ etchingĀ processĀ includes:
    etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 50Ā ļ¼…ļ¼›Ā and
    annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ approximatelyĀ 200Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes,Ā wherein:
    anĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 5Ā nm/min.
  8. AĀ methodĀ forĀ fabricatingĀ aĀ thinĀ filmĀ transistor,Ā comprising:
    formingĀ aĀ gateĀ electrodeĀ thinĀ filmĀ onĀ aĀ substrateĀ byĀ aĀ directĀ currentĀ (DC)Ā sputteringĀ processļ¼›
    etchingĀ theĀ gateĀ electrodeĀ thinĀ filmĀ toĀ formĀ aĀ gateĀ electrodeļ¼›
    formingĀ aĀ gateĀ insulatingĀ layerĀ onĀ theĀ gateĀ electrodeļ¼›
    formingĀ anĀ activeĀ layerĀ thinĀ filmĀ byĀ aĀ DCĀ sputteringĀ processĀ onĀ theĀ gateĀ insulatingĀ layerļ¼›
    etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ byĀ aĀ wetĀ etchingĀ processĀ followedĀ byĀ anĀ annealingĀ processĀ toĀ formĀ anĀ activeĀ layerļ¼›Ā and
    formingĀ aĀ source/drainĀ thinĀ filmĀ byĀ aĀ DCĀ sputteringĀ processĀ onĀ theĀ activeĀ layerļ¼›Ā and
    etchingĀ theĀ source/drainĀ thinĀ filmĀ toĀ formĀ aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrode.
  9. TheĀ methodĀ accordingĀ toĀ claimĀ 8,Ā furtherĀ including:
    selectingĀ aĀ materialĀ suitableĀ forĀ theĀ DCĀ sputteringĀ processĀ forĀ formingĀ theĀ activeĀ layerĀ thinĀ film,Ā suchĀ thatĀ theĀ activeĀ layerĀ hasĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs.
  10. TheĀ methodĀ accordingĀ toĀ claimĀ 9,Ā wherein:
    theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā and
    theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
  11. TheĀ methodĀ accordingĀ toĀ claimĀ 9,Ā wherein:
    theĀ materialĀ isĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā Ln-dopedĀ zincĀ oxide,Ā andĀ aĀ combinationĀ thereof.
  12. TheĀ methodĀ accordingĀ toĀ claimĀ 11,Ā whereinĀ theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
  13. TheĀ methodĀ accordingĀ toĀ claimĀ 12,Ā whereinĀ theĀ wetĀ etchingĀ processĀ forĀ etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ includes:
    etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 40Ā ļ¼…toĀ 60Ā ļ¼…ļ¼›Ā and
    annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ betweenĀ approximatelyĀ 150Ā ā„ƒĀ andĀ 220Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes,Ā wherein:
    anĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ 10Ā nm/min.
  14. TheĀ methodĀ accordingĀ toĀ claimĀ 12,Ā whereinĀ theĀ wetĀ etchingĀ processĀ forĀ etchingĀ theĀ activeĀ layerĀ thinĀ filmĀ includes:
    etchingĀ aĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ atĀ anĀ etchingĀ rateĀ ofĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 60Ā nm/minĀ inĀ aĀ phosphoricĀ acidĀ havingĀ aĀ weightĀ concentrationĀ ofĀ approximatelyĀ 50Ā ļ¼…ļ¼›Ā and
    annealingĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ inĀ airĀ atĀ aĀ temperatureĀ approximatelyĀ 200Ā ā„ƒĀ forĀ atĀ leastĀ approximatelyĀ 30Ā minutes,Ā wherein:
    anĀ etchingĀ rateĀ ofĀ theĀ zirconiumĀ indiumĀ oxideĀ thinĀ filmĀ afterĀ annealingĀ isĀ droppedĀ toĀ beĀ lessĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 5Ā nm/min.
  15. TheĀ methodĀ accordingĀ toĀ claimĀ 8,Ā wherein:
    theĀ gateĀ insulatingĀ layerĀ isĀ formedĀ byĀ anĀ electrochemicalĀ oxidationĀ methodĀ onĀ theĀ gateĀ electrode.
  16. TheĀ methodĀ accordingĀ toĀ claimĀ 8,Ā wherein:
    eachĀ ofĀ etchingĀ theĀ gateĀ electrodeĀ thinĀ filmĀ andĀ etchingĀ theĀ source/drainĀ thinĀ filmĀ includesĀ aĀ wetĀ etchingĀ process.
  17. AĀ thinĀ filmĀ transistor,Ā comprising:
    anĀ activeĀ layer,Ā madeĀ ofĀ aĀ direct-current-sputteredĀ materialĀ providingĀ theĀ activeĀ layerĀ withĀ aĀ carrierĀ concentrationĀ ofĀ atĀ leastĀ approximatelyĀ 1x1017cm-3Ā andĀ aĀ carrierĀ mobilityĀ ofĀ atĀ leastĀ approximatelyĀ 20Ā cm2/Vs,
    whereinĀ theĀ thinĀ filmĀ transistorĀ isĀ freeĀ ofĀ anĀ etchĀ stopĀ layer.
  18. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 17,Ā wherein:
    theĀ carrierĀ concentrationĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 1x1018cm-3ļ¼›Ā and
    theĀ carrierĀ mobilityĀ inĀ theĀ activeĀ layerĀ isĀ greaterĀ thanĀ orĀ equalĀ toĀ approximatelyĀ 30cm2/Vs.
  19. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 17,Ā wherein:
    theĀ direct-current-sputteredĀ materialĀ includesĀ oneĀ orĀ moreĀ selectedĀ fromĀ zirconiumĀ indiumĀ oxide,Ā hafniumĀ zincĀ oxide,Ā indiumĀ tinĀ oxide,Ā zincĀ oxide,Ā andĀ Ln-dopedĀ zincĀ oxide.
  20. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 19,Ā wherein:
    theĀ zirconiumĀ indiumĀ oxideĀ hasĀ aĀ chemicalĀ formulaĀ ofĀ ZrxIn100-xOy,Ā whereĀ 0.1ā‰¤xā‰¤20Ā andĀ y>0.
  21. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 17,Ā furtherĀ including:
    aĀ gateĀ electrodeĀ onĀ theĀ substrateļ¼›
    aĀ gateĀ insulatingĀ layerĀ coveringĀ theĀ gateĀ electrodeļ¼›Ā and
    aĀ sourceĀ electrodeĀ andĀ aĀ drainĀ electrodeļ¼›
    wherein:
    theĀ activeĀ layerĀ isĀ onĀ theĀ gateĀ insulatingĀ layer,Ā and
    theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ onĀ theĀ activeĀ layerĀ andĀ bothĀ inĀ contactĀ withĀ theĀ activeĀ layer.
  22. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 21,Ā wherein:
    theĀ gateĀ electrodeĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 100Ā nmĀ toĀ 800Ā nmļ¼›
    theĀ gateĀ insulatingĀ layerĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 30Ā nmĀ toĀ 600Ā nmļ¼›
    theĀ activeĀ layerĀ hasĀ aĀ thicknessĀ ofĀ approximatelyĀ 10Ā nmĀ toĀ 200Ā nmļ¼›Ā and
    theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ haveĀ aĀ thicknessĀ ofĀ approximatelyĀ 100Ā nmĀ toĀ 1000Ā nm.
  23. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 21,Ā wherein:
    theĀ gateĀ electrodeĀ isĀ madeĀ ofĀ aĀ materialĀ includingĀ oneĀ orĀ moreĀ ofĀ aluminum,Ā aluminumĀ alloy,Ā tantalum,Ā tantalumĀ alloy,Ā andĀ molybdenum.
  24. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 21,Ā wherein:
    theĀ gateĀ insulatingĀ layerĀ isĀ madeĀ ofĀ anĀ insulatingĀ oxideĀ selectedĀ fromĀ aluminumĀ oxide,Ā molybdenumĀ oxide,Ā tantalumĀ oxide,Ā aluminumĀ neodymiumĀ oxide,Ā andĀ aĀ combinationĀ thereof.
  25. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 21,Ā wherein:
    theĀ sourceĀ electrodeĀ andĀ theĀ drainĀ electrodeĀ areĀ madeĀ ofĀ aĀ conductiveĀ metal,Ā includingĀ oneĀ orĀ moreĀ selectedĀ fromĀ aluminum,Ā molybdenum,Ā tantalum,Ā andĀ aluminumĀ neodymiumĀ alloy.
  26. TheĀ thinĀ filmĀ transistorĀ accordingĀ toĀ claimĀ 21,Ā wherein:
    theĀ substrateĀ isĀ coatedĀ withĀ aĀ bufferĀ layerĀ orĀ aĀ water-oxygen-barrierĀ layer.
  27. AnĀ arrayĀ substrate,Ā comprisingĀ theĀ thinĀ filmĀ transistorĀ accordingĀ toĀ anyĀ oneĀ ofĀ claimsĀ 17-26.
  28. AĀ displayĀ apparatus,Ā comprisingĀ theĀ arrayĀ substrateĀ accordingĀ toĀ claimĀ 27.
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JP6806682B2 (en) 2021-01-06
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CN105655389A (en) 2016-06-08

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