KR20130029272A - Thin film transistor - Google Patents

Thin film transistor Download PDF

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Publication number
KR20130029272A
KR20130029272A KR1020110092600A KR20110092600A KR20130029272A KR 20130029272 A KR20130029272 A KR 20130029272A KR 1020110092600 A KR1020110092600 A KR 1020110092600A KR 20110092600 A KR20110092600 A KR 20110092600A KR 20130029272 A KR20130029272 A KR 20130029272A
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KR
South Korea
Prior art keywords
thin film
semiconductor layer
channel layer
substrate
film transistor
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KR1020110092600A
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Korean (ko)
Inventor
한진우
유태환
조요한
이승주
Original Assignee
삼성코닝정밀소재 주식회사
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Priority to KR1020110092600A priority Critical patent/KR20130029272A/en
Publication of KR20130029272A publication Critical patent/KR20130029272A/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78696—Thin film transistors, i.e. transistors with a channel being at least partly a thin film characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel

Abstract

The present invention relates to a thin film transistor, and more particularly to a thin film transistor having a double channel layer.
To this end, the invention comprises a substrate; A gate electrode formed on the substrate; A gate insulating film formed on the substrate and the gate electrode; A first semiconductor layer formed on the gate insulating film and including indium oxide; And a channel layer formed on the first semiconductor layer, the second semiconductor layer including tin oxide; And a source electrode and a drain electrode formed on both sides of the channel layer and electrically connected to a predetermined area of the channel layer.

Description

Thin Film Transistor {THIN FILM TRANSISTOR}

The present invention relates to a thin film transistor, and more particularly to a thin film transistor having a double channel layer.

In recent years, there has been a growing interest in information display and a demand for a portable information medium has increased, and a lightweight thin film flat panel display (FPD), which replaces a cathode ray tube (CRT) Research and commercialization of a liquid crystal display (LCD), an organic light emitting display (OLED), and the like have been focused on.

In such a liquid crystal display device and an organic light emitting display device, a thin film transistor (TFT) is used as a switching and / or driving device.

1 is a cross-sectional structure diagram of a general thin film transistor.

Referring to FIG. 1, in the thin film transistor, a gate electrode 20 is formed on an insulating substrate 10, an insulating film 30 is formed on the gate electrode 20, and a channel layer 40 is formed on the insulating film 30. ) And source 51 / drain 52 electrodes are formed.

Such thin film transistors include an amorphous silicon thin film transistor, a polycrystalline silicon thin film transistor, and an oxide thin film transistor.

An amorphous silicon thin film transistor is a device that can be uniformly formed on a large substrate over 2 m at low cost and is the most widely used device at present. However, since the amorphous silicon thin film transistor has a low electron mobility of 1 cm 2 / Vs or less, it is difficult to apply it to an active matrix organic light emitting diode (AMOLED).

In addition, polycrystalline silicon thin film transistors (poly-Si TFTs) have high mobility of tens to hundreds of cm 2 / Vs, which are far superior to a-Si TFTs, It has a performance that can be applied. However, in order to fabricate a poly-Si TFT, a complicated process is required compared to an a-Si TFT, and the additional cost is also increased. Particularly, there is a problem in that uniformity of the p-Si TFT is reduced when applied to a large substrate.

Recently, oxide thin film transistors that can have the advantages of a-Si TFT and poly-Si TFT have attracted attention as switching devices.

Of the oxide thin film transistors, indium oxide thin film transistors have an indium oxide based channel layer that is easy to control the thickness and has excellent interfacial properties with the insulating film, but the etching rate is so fast that an additional etch stopper is required as well as other channel materials. Low electron mobility is a problem.

In the case of the tin oxide thin film transistor, it has higher electron mobility than the indium oxide thin film transistor and does not require an additional etch stopper. However, since the thickness of the tin oxide based channel layer is difficult to control, the thickness of less than 30 nm is difficult to deposit. There is this.

In general, a thin film transistor including an indium oxide or a tin oxide-based compound as a channel layer has a threshold voltage less than zero, and thus is normally on, which increases power consumption. To solve this problem, the carrier of the channel layer should be reduced or reduced in thickness. The carrier is based on the composition ratio of the channel layer itself, and it was not easy to reduce the composition ratio without changing the composition ratio itself. Possible without change.

However, when the tin oxide-based compound is used as the channel layer, there is a critical thickness corresponding to each composition ratio in which the channel layer does not exhibit inherent properties below a certain thickness. Such a critical thickness is known to occur when the tin oxide particles act as crystal nuclei 80 on the surface of the insulating film 70 during the deposition of the channel layer 60 as shown in FIG. 2.

Therefore, when the tin oxide-based compound is used as the channel layer, there is a problem in that it is difficult to use a channel layer having a thickness below or similar to the critical thickness.

The present invention has been made to solve the problems of the prior art as described above, an object of the present invention is to provide a thin film transistor having a fast electron mobility.

To this end, the invention comprises a substrate; A gate electrode formed on the substrate; A gate insulating film formed on the substrate and the gate electrode; A first semiconductor layer formed on the gate insulating film and including indium oxide; And a channel layer formed on the first semiconductor layer, the second semiconductor layer including tin oxide; And a source electrode and a drain electrode formed on both sides of the channel layer and electrically connected to a predetermined area of the channel layer.

Here, the substrate may be a glass substrate or a plastic substrate.

The gate electrode, the source electrode, and the drain electrode may include a diffusion barrier film and a copper film deposited on the diffusion barrier film; . ≪ / RTI >

Herein, the diffusion barrier layer may include any one of titanium, tantalum, molybdenum, chromium, nickel or platinum.

The channel layer may have a thickness of 20 nm to 40 nm, and the thickness of the first semiconductor layer and the second semiconductor layer may be 10 nm to 20 nm, respectively.

In addition, the insulating layer may be formed of silicon oxide or silicon nitride.

According to the present invention, by configuring the channel layer as the first semiconductor layer containing indium oxide and the second semiconductor layer containing tin oxide, the electron mobility of the thin film transistor can be improved.

In addition, the thickness of the first semiconductor layer containing indium oxide and the second semiconductor layer containing tin oxide can be controlled to freely adjust the threshold voltage.

1 is a cross-sectional structural view of a typical thin film transistor.
2 is a conceptual diagram showing crystal nuclei generated on the surface of an insulating film during deposition of a tin oxide series channel layer.
3 is a schematic structural diagram of a thin film transistor according to an embodiment of the present invention;
4 is an XRR graph of a thin film deposited with a single layer of a tin oxide-based compound on an insulating film made of silicon oxide;
5 is an XRR graph of a thin film on which an indium oxide compound and a tin oxide compound are deposited according to the present invention on an insulating film made of silicon oxide.

Hereinafter, a thin film transistor according to an exemplary embodiment will be described in detail with reference to the accompanying drawings.

In the following description of the present invention, detailed description of known functions and configurations incorporated herein will be omitted when it may make the subject matter of the present invention rather unclear.

3 is a schematic diagram of a thin film transistor according to an exemplary embodiment of the present invention.

Referring to FIG. 3, the thin film transistor according to the present invention may include a substrate, a gate electrode, a gate insulating layer, a channel layer, and a source / drain electrode.

The substrate 100 may be a glass, a semiconductor wafer, a metal oxide, a ceramic material, a plastic, or the like, which may satisfy the thermodynamic and mechanical requirements for the thin film transistor. In particular, the substrate 100 is preferably glass or plastic, but is not limited thereto.

The gate electrode 200 is formed on the substrate 100, and a voltage for turning on / off the thin film transistor is applied. Metal, or a conductive material such as a metal oxide, and may be formed, for example, metal such as Pt, Ru, Au, Ag, Mo, Al, W or Cu, or IZO (InZnO) or AZO (AlZnO) A metal or conductive oxide such as may be used.

In addition, the gate electrode 200 may have a structure of a diffusion barrier (not shown) and a copper film deposited on the diffusion barrier.

The diffusion barrier layer (not shown) is for preventing copper atoms from diffusing to the substrate to improve the bonding strength and electrical properties of the copper, and may include any one of titanium, tantalum, molybdenum, chromium, nickel, or platinum. .

The gate insulating layer 300 may be formed using an insulating material used in a conventional semiconductor device, and may use silicon oxide or silicon nitride. For example, HfO 2 , Al 2 O 3 , Si 3 N 4, or a mixture thereof, which is a high-K material having a higher dielectric constant than SiO 2 or SiO 2 , may be used.

The channel layer 400 is positioned on the gate insulating layer 300. The channel layer 400 may include a source region and a drain region doped with n-type or p-type impurities, and a channel region connecting the source region and the drain region. Typically, the source region and the drain region are located at both ends of the channel layer 400, and the channel region is located at the center.

The channel layer 400 may be stacked on the first semiconductor layer 410 including indium oxide and the first semiconductor layer 410, and may include the second semiconductor layer 420 including tin oxide.

As such, the channel layer 400 is formed by using the first semiconductor layer 410 made of indium oxide as a lower layer and the second semiconductor layer 420 made of tin oxide as an upper layer, thereby forming a thin film transistor. The channel layer 400 has excellent interfacial properties with the gate insulating film 300 and has a fast electron mobility.

In addition, due to such a double layer structure, tin oxide, which is a constituent element of the second semiconductor layer 420, only diffuses into the first semiconductor layer 410 including indium oxide, and diffuses to the gate insulating film 300. By preventing it, the thickness of the second semiconductor layer 420 including tin oxide may be adjusted to be thin.

That is, the tin oxide is prevented from acting as a crystal nucleus on the surface of the gate insulating film 300, so that the second semiconductor layer 420 including tin oxide does not have the threshold thickness as described above in the art which is the background of the invention. By doing so, the channel layer 400 can be manufactured thinner than the channel layer including the conventional tin oxide. As a result, the thickness of the first semiconductor layer 410 including indium oxide and the second semiconductor layer 420 including tin oxide can be controlled to freely adjust the threshold voltage.

The thickness of the channel layer 400 may be 20 nm to 40 nm, and the thickness of the first semiconductor layer 410 and the second semiconductor layer 420 may be 10 nm to 20 nm, respectively.

4 is an XRR graph of a thin film in which a tin oxide-based compound is deposited as a single layer on an insulating film made of silicon oxide. 5 is an XRR graph of a thin film on which an indium oxide compound and a tin oxide compound are deposited according to the present invention on an insulating film made of silicon oxide.

4 and 5, the roughness at the interface between the insulating film and the interface when the tin oxide-based compound is composed of a single layer is significantly higher than that of the thin film having a double layer of indium oxide and tin oxide according to the present invention. It can be seen that high.

That is, according to the present invention, it can be seen that the performance and process yield of the thin film transistor can be improved.

The source electrode 510 and the drain electrode 520 are spaced apart from each other on both sides of the channel layer 400, and are electrically connected to a predetermined region of the channel layer 400.

The source electrode 510 and the drain electrode 520 may be made of a conductive material such as metal, or may have a structure of a diffusion barrier film and a copper film deposited on the diffusion barrier film as in the gate electrode 200 described above.

By manufacturing a liquid crystal display (LCD) and an organic light emitting display (OLED) using the thin film transistor having the above structure, it is possible to improve the performance of the display device.

While the invention has been shown and described with reference to certain preferred embodiments thereof, it will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims. This is possible.

Therefore, the scope of the present invention should not be limited by the described embodiments, but should be determined by the scope of the appended claims as well as the appended claims.

10: insulated substrate 20: gate electrode
30 insulating film 40 semiconductor layer
51 source electrode 52 drain electrode
60 channel layer 70 insulating film
80: crystal nucleus
100 substrate 200 gate electrode
300: gate insulating film 400: channel layer
410: first semiconductor layer 420: second semiconductor layer
510: source electrode 520: drain electrode

Claims (7)

Board;
A gate electrode formed on the substrate;
A gate insulating film formed on the substrate and the gate electrode;
A first semiconductor layer formed on the gate insulating film and including indium oxide; And a channel layer formed on the first semiconductor layer, the second semiconductor layer including tin oxide; And
And a source electrode and a drain electrode formed on both sides of the channel layer and electrically connected to a predetermined region of the channel layer.
The method of claim 1,
Wherein the substrate comprises a glass substrate or a plastic substrate.
The method of claim 1,
The gate electrode, the source electrode, and the drain electrode,
Diffusion barrier film, and
A copper film deposited on the diffusion preventing film; And a gate electrode formed on the gate insulating film.
The method of claim 3,
Wherein the diffusion barrier layer comprises any one of titanium, tantalum, molybdenum, chromium, nickel, and platinum.
The method of claim 1,
The thickness of the channel layer is a thin film transistor, characterized in that 20nm ~ 40nm.
The method of claim 1,
The thickness of the first semiconductor layer and the second semiconductor layer is a thin film transistor, characterized in that each 10nm ~ 20nm.
The method of claim 1,
Wherein the insulating film is made of silicon oxide or silicon nitride.

KR1020110092600A 2011-09-14 2011-09-14 Thin film transistor KR20130029272A (en)

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KR1020110092600A KR20130029272A (en) 2011-09-14 2011-09-14 Thin film transistor

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106298957A (en) * 2016-09-28 2017-01-04 京东方科技集团股份有限公司 A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device
CN114185209A (en) * 2022-02-17 2022-03-15 成都中电熊猫显示科技有限公司 Array substrate, display panel and display device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106298957A (en) * 2016-09-28 2017-01-04 京东方科技集团股份有限公司 A kind of thin film transistor (TFT) and preparation method thereof, array base palte, display device
CN114185209A (en) * 2022-02-17 2022-03-15 成都中电熊猫显示科技有限公司 Array substrate, display panel and display device
CN114185209B (en) * 2022-02-17 2022-05-27 成都中电熊猫显示科技有限公司 Array substrate, display panel and display device

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