WO2017107160A1 - 基于异构混合内存的nvm坏块识别处理及纠错方法和系统 - Google Patents

基于异构混合内存的nvm坏块识别处理及纠错方法和系统 Download PDF

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Publication number
WO2017107160A1
WO2017107160A1 PCT/CN2015/098814 CN2015098814W WO2017107160A1 WO 2017107160 A1 WO2017107160 A1 WO 2017107160A1 CN 2015098814 W CN2015098814 W CN 2015098814W WO 2017107160 A1 WO2017107160 A1 WO 2017107160A1
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block
data
read
nvm
address unit
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PCT/CN2015/098814
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English (en)
French (fr)
Inventor
薛英仪
马先明
庞观士
陈志列
沈航
徐成泽
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研祥智能科技股份有限公司
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Priority to PCT/CN2015/098814 priority Critical patent/WO2017107160A1/zh
Publication of WO2017107160A1 publication Critical patent/WO2017107160A1/zh

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/52—Protection of memory contents; Detection of errors in memory contents

Definitions

  • the present invention relates to the field of computer technologies, and in particular, to a NVM bad block identification processing and error correction method and system based on heterogeneous mixed memory.
  • Non-Volatile Memory Non-Volatile Memory
  • DRAM Dynamic Random Access Memory
  • Heterogeneous hybrid memory has the characteristics of NVM and DRAM at the same time. It not only has the function of conventional memory, but the data stored in DRAM will disappear immediately after power off, which is volatile. At the same time, it can also play the NVM after power failure.
  • the ability to save data and take full advantage of the non-volatile nature of NVM is a new type of memory that is used in combination.
  • Heterogeneous hybrid memory meets the conventional memory interface of existing industrial control equipment, and it has become a research hotspot without introducing new industrial control equipment or adding new auxiliary equipment.
  • NVM and DRAM characteristics in heterogeneous mixed memory are different.
  • NVM has a congenital defect with limited total number of erasing. After a certain number of erasing times, NVM will be invalid, and the damage in NVM storage area is permanent, and is limited to today. The manufacturing process and life limit, NVM will inevitably appear bad blocks, the conventional DRAM memory data processing method does not involve NVM bad blocks, does not apply to different Constructs NVM memory in memory.
  • An NVM bad block identification processing and error correction method based on heterogeneous mixed memory comprising:
  • the data in any of the address units in the block is different from the data obtained after the operation of the data read and the data obtained after the operation is written into the address unit and then read again, determining the The block is a bad block;
  • the block is determined to be the same. For a good block.
  • the step of detecting data in each of the address units in the block of the NVM comprises:
  • Reading the data of the current address unit obtaining the first read data, and performing the operation on the first read data to obtain the first operation data;
  • the block Determining whether the second read data is the same as the first operation data, if different, the block is a bad block; if the same, further determining whether the current address unit is an end address unit of a block of NVM, if yes The block is a good block, otherwise the next address unit is used as the current address unit, and the step of reading the data of the current address unit is returned.
  • the NVM includes a data storage area and a spare block area; the spare block area stores a state table for recording a block state of the NVM and a replacement relationship for recording the bad block and the good block. Mapping table; the method further includes:
  • the location corresponding to the block in the state table and the mapping table is marked as a good block
  • the location corresponding to the block in the state table is marked as a bad block
  • the bad block is a data storage area or a spare block area is used as a block of a replacement block, a good block of the spare block area is obtained, and a good block of the spare block area is used as a replacement block of the bad block, in the mapping table Positions corresponding to the bad block are saved with location information of the good block, and location information of the bad block is saved in a location corresponding to the good block in the mapping table; if the bad block is used as a spare block area In place of the block of the block, the location corresponding to the bad block in the mapping table is also marked as not available as a replacement block.
  • the bad block is a block in which the spare block area is not used as a replacement block
  • the position corresponding to the bad block in the mapping table is marked as not available as a replacement block.
  • the determining whether the second read data is the same as the first operation data, and after the different steps further comprising:
  • the determining whether the second read data is the same as the first operation data, if the same step further comprises: inversely storing the second read data into the current address unit ;
  • determining whether the third read data is the same as the first operation data if the same step further comprises: inversely storing the third read data into the current address unit.
  • both the operation and the inverse operation are to negate the data.
  • the spare block area further stores a page erasure count record table, wherein the page erase count record table stores the sequence number of the page and the corresponding number of erase and write times, and the method further includes:
  • the page erasure count record table it is determined whether there is a page exceeding the maximum number of erasures in the block of the NVM, and if so, the block is determined to be a bad block, otherwise the block is determined to be a good block.
  • the method further includes:
  • the preset number of steps S2-S4 is repeatedly executed. When the operation result obtained by executing each of the steps S2-S4 is not 0, it is determined that the data is erroneous, and data error correction is performed according to the operation result.
  • the step of performing ECC check on the data to generate a write checksum and performing the ECC check on the read data to generate an ECC check in the read checksum includes: :
  • the data is split and filled to generate data of a preset byte
  • the row check value and the column check value are sequentially stored and complemented to generate a checksum of the preset byte.
  • the step of performing data error correction according to the operation result includes:
  • the row address and the column address of the error are determined according to the operation result
  • An NVM bad block identification processing and error correction system based on heterogeneous mixed memory comprising:
  • a detecting module configured to detect data in each address unit in the block of the NVM during the self-test
  • the determining module is configured to: if the data in any of the address units in the block, the data obtained after the operation of the read data is different from the data obtained after the data obtained by the operation is written into the address unit and then read again And determining that the block is a bad block;
  • the determining module is further configured to: if the data in all the address units in the block, the data obtained after the operation of the read data and the data obtained after the operation are written into the address unit, and then read again The data is the same, then the block is determined to be a good block.
  • the detecting module comprises:
  • a first data acquiring unit configured to use a starting address unit of a block of the NVM as a current address unit, read data of the current address unit, obtain first read data, and perform operation on the first read data, Obtaining first operational data;
  • a second data acquiring unit configured to write the first operation data into the current address unit, and read the first operation data to obtain second read data
  • a processing unit configured to determine whether the second read data is the same as the first operation data, if different, the block is a bad block; if the same, further determine whether the current address unit is an end of the NVM block The address unit, if yes, the block is a good block, otherwise the next address unit is used as the current address unit, and the step of returning the first data acquisition module to read the data of the current address unit is returned.
  • the NVM includes a data storage area and a spare block area in which a state table for recording a block state of the NVM and a replacement relationship for recording the bad block and the good block are saved.
  • Mapping table the system further includes:
  • a block processing module configured to: if the block is a good block, mark a location corresponding to the block in the state table and the mapping table as a good block;
  • the block processing module is further configured to: if the block is a bad block, mark a location corresponding to the block in the state table as a bad block;
  • the block processing module is further configured to acquire a good block of the spare block area if the bad block is a data storage area or a block of the spare block area used as a replacement block, and use the good block of the spare block area as the bad a replacement block of the block, where the location of the good block is saved in a position corresponding to the bad block in the mapping table, and the mapping table is in the mapping table The position corresponding to the block is saved, and the location information of the bad block is saved. If the bad block is a block used as a replacement block, the location corresponding to the bad block in the mapping table is marked as not available. Replacement block
  • the block processing module is further configured to: if the bad block is a block in which the spare block area is not used as a replacement block, the position corresponding to the bad block in the mapping table is marked as not being used as a replacement block.
  • the processing unit is further configured to write the first operation data to the current address unit again, read the first operation data again, obtain a third read data, and determine the third Whether the read data is the same as the first operational data, if different, the block is a bad block, and if they are the same, then the step of further determining whether the current address unit is an end address unit of a block of NVM is re-entered.
  • the processing unit is further configured to determine whether the second read data is the same as the first operation data, and if the same, the second read data is inversely operated and stored in the current address.
  • the unit is further configured to determine whether the third read data is the same as the first operation data, and if the same, convert the third read data into the current address unit.
  • both the operation and the inverse operation are to negate the data.
  • the spare block area further stores a page erase count record table, wherein the page erase count record table stores the page number and the corresponding number of times of erasing, and the system further includes:
  • a record determination module configured to obtain the page erase count record table, determine, according to the page erase count record table, whether there is a page exceeding the maximum number of erase times in the block of the NVM, and if yes, determine the block It is a bad block, otherwise it is determined that the block is a good block.
  • system further comprises:
  • Error correction module for executing:
  • the error correction module performs ECC check on the data, specifically determining whether the data required for the ECC check satisfies the preset byte, and if not, the data is split and complemented. Presetting the data of the byte, performing row check and column check on the data of the preset byte, obtaining a row check value and a column check value, and sequentially storing the row check value and the column check value And fill in the checksum of the preset byte.
  • the error correction module is further configured to determine whether a bit of the operation result has a preset number of 1, if yes, it is determined that the data is error correctable, otherwise it is determined that the data is not error correctable, if If the data is error correctable, the row address and the column address of the error are determined according to the operation result, the error data is obtained according to the row address and the column address, and the error data is inversely operated to obtain the correct data.
  • the above-mentioned heterogeneous mixed memory based NVM bad block identification processing and error correction method and system by detecting data in each address unit in a block of NVM in a self-test process, if data in any address unit in the block The data obtained after the operation of the read data is different from the data obtained by writing the data obtained after the operation into the address unit, and then the block is determined to be a bad block; if all the addresses in the block The data in the unit, the data obtained after the operation of the read data, and the operation After the obtained data is written into the address unit and the data read again is the same, it is determined that the block is a good block.
  • the read data is written to the same address after operation, instead of directly writing the read data to the same address, and then reading out and comparing the result of the first read data, according to the comparison result. Determining whether it is a bad block can identify bad blocks in the NVM and reduce the chance of misjudgment, ensuring the reliability and integrity of the data in the NVM memory.
  • FIG. 1 is a flow chart of an NVM bad block identification method based on heterogeneous mixed memory in one embodiment
  • FIG. 2 is a flow chart of NVM bad block processing based on heterogeneous mixed memory in one embodiment
  • FIG. 3 is a schematic diagram of an NVM memory, a state table, and a mapping table in one embodiment
  • FIG. 4 is a schematic diagram of an updated state table and mapping table in an embodiment
  • FIG. 5 is a flowchart of a NVM bad block identification method based on heterogeneous mixed memory in another embodiment
  • FIG. 6 is a flow chart of generating an checksum by performing ECC check on data in one embodiment
  • FIG. 8 is a structural block diagram of an NVM bad block identification system based on heterogeneous mixed memory in one embodiment
  • Figure 9 is a block diagram showing the structure of a detecting module in an embodiment
  • FIG. 10 is a structural block diagram of a NVM bad block identification processing system based on heterogeneous mixed memory in another embodiment
  • FIG. 11 is a structural block diagram of an NVM bad block identification processing system based on heterogeneous mixed memory in one embodiment
  • FIG. 12 is a structural block diagram of an NVM bad block identification process and an error correction system based on heterogeneous mixed memory in one embodiment.
  • an NVM bad block identification processing and an error correction method based on heterogeneous mixed memory are provided, and the method includes:
  • the self-test process executing: detecting data in each address unit in the block of the NVM; if the data in any of the address units in the block, the data obtained after the operation of the read data and the operation After the obtained data is written into the address unit and the data obtained by reading again is different, it is determined that the block is a bad block; if the data in all the address units in the block, the data obtained after the operation of the read data is After the data obtained by the operation is written into the address unit and the data read again is the same, it is determined that the block is a good block.
  • the self-test is performed on the block of the NVM, and the self-test is performed before the first use of the NVM, or the special instruction self-test is issued by the user.
  • the self-test is issued by the application layer to the NVM memory buffer controller.
  • the data in each address unit in the block of the NVM is detected.
  • the address unit refers to the memory space in the block of the NVM, and the block of the NVM is composed of a plurality of address units, and the self-test is performed in units of address units.
  • the size of the unit can be customized, preferably, with 1 byte as an address unit.
  • the rules of the operation can be customized, such as adding, subtracting, multiplying, and inverting data.
  • the block by detecting data in each address unit in the block of the NVM during the self-test, if the data in any of the address units in the block, the data obtained after the operation of the read data is After the data obtained by the operation is written into the address unit and the data obtained by reading again is different, it is determined that the block is a bad block; if the data in all the address units in the block is operated on the read data, Got The obtained data is the same as the data obtained by writing the data obtained after the operation to the address unit and then read again, and then the block is determined to be a good block.
  • the data can be read correctly, and the data cannot be written.
  • the data read for the first time is the correct data, and is the same as the original data saved in the block. If the data read for the first time is not operated, Write this data directly, although the bad block can not write data, but the original data is saved in the bad block, which causes the second read data to be the original data saved in the bad block and the first
  • the data read once is the same, so that it is judged to be good or bad, so that such bad blocks cannot be recognized.
  • the read data is written to the same address after the operation, instead of directly writing the read data to the same address, and then reading the result of the operation with the first read data. Comparison, according to the comparison result to determine whether it is a bad block, can identify bad blocks in the NVM and reduce the probability of misjudgment, to ensure the reliability and integrity of the data in the NVM memory.
  • an NVM bad block identification processing and an error correction method based on heterogeneous mixed memory are provided, and the method includes:
  • Step S110 is performed by using the start address unit of the block of the NVM as the current address unit, reading the data of the current address unit, obtaining the first read data, and performing the operation on the first read data to obtain the first operation data.
  • the detection is started from the start address unit of the NVM block, and the size of the address unit can be customized.
  • the size of the address unit can be customized.
  • 1 byte is an address unit.
  • the rules of the operation can be customized, such as adding, subtracting, multiplying, and inverting data.
  • Step S120 writing first operation data to the current address unit, and reading the first operation data to obtain second read data.
  • the first operation data after the operation is written into the current address unit, and then from the current address.
  • the unit reads the first operation data to obtain the second read data, and ensures that the second read data is the data saved after the operation, instead of the original data originally saved in the NVM block.
  • step S130 it is determined whether the second read data is the same as the first operation data. If not, the block is a bad block, otherwise the process proceeds to step S140.
  • the second read data is different from the first operation data, and the address unit cannot be used normally, and one block of the NVM is included. As long as one address unit is not normal in the address unit, the block is a bad block, and the remaining address units are not detected.
  • step S140 it is determined whether the current address unit is an end address unit of a block of the NVM, and if so, the block is good or bad, otherwise the process proceeds to step S150.
  • the current address unit is the end address unit of the block of the NVM, it means that all the address units from the start address unit to the end address unit in the NVM block can be used normally, and the block is a good block.
  • step S150 the next address unit is used as the current address unit, and the process returns to step S110.
  • the next address unit is returned as the current address unit to step S110, and the remaining address units that have not been detected in the block are detected.
  • the address unit is detected in order from the start address unit of the block of the NVM. If an abnormal address unit is detected, it is not necessary to detect the remaining address unit, and the block is determined to be a bad block.
  • the NVM includes a data storage area in which a state table for recording the state of the block of the NVM and a mapping table for recording the replacement relationship of the bad block and the good block are stored, and a spare block area.
  • the NVM includes a data storage area for storing data, and further includes a special storage area that is allocated by the NVM memory buffer controller, that is, a spare block area, and the spare block area stores a linked list for recording and managing data bad blocks, including A state table and a mapping table, which are also used as replacement storage spaces for bad blocks.
  • the state table records the block status of all blocks of the NVM, that is, bad blocks or good blocks.
  • the mapping table records the replacement relationship between the bad block and the good block. The position of the good block that replaces it can be found by the position of the bad block. The position of the bad block that it replaces can also be found by the position of the good block, as shown in FIG.
  • the method further includes:
  • step S210 if the block is a good block, the position corresponding to the block in the state table and the mapping table is marked as a good block.
  • the state table includes location information of the NVM block and a block state corresponding to each location.
  • the mapping table includes location information of the NVM block and information corresponding to each location. It can be understood that the location information can be represented by a block number. If the block is a good block, the position corresponding to the block in the state table and the mapping table is marked as a good block, and the symbol of the mark can be customized. For example, in the state table, "Good” is used to indicate a good block, and in the mapping table, " 0xFFFF" indicates a good block and can be used as a replacement block.
  • step S220 if the block is a bad block, the position corresponding to the block in the state table is marked as a bad block.
  • the marked symbols can be customized, such as "Bad" in the status table to indicate bad blocks.
  • the blocks of the NVM data storage area and the spare block area have their own block status and are recorded in the status table.
  • Step S230 if the bad block is a data storage area or a spare block area is used as a block of the replacement block, the good block of the spare block area is obtained, and the good block of the spare block area is used as the replacement block of the bad block, and the mapping is performed.
  • the location corresponding to the bad block in the table saves the location information of the block, and the location information of the bad block is stored in the mapping table corresponding to the good block. If the bad block is the spare block area used as the block of the replacement block, the mapping needs to be performed. The position in the table corresponding to the bad block is marked as not available as a replacement block.
  • the bad block needs to be replaced by the good block of the spare block area, and the position of the good block of the spare block area is mapped to the bad block position by the mapping table, in the mapping table.
  • the position corresponding to the bad block saves the position information of the block, and the position information of the bad block is saved in the position corresponding to the good block in the mapping table, so that the data can be directly written according to the position mapping relationship when saving or reading data.
  • Blocks or directly read data from a good block play a role in shielding the system from bad blocks. It can be understood that the data that has been erroneous after the ECC check can be corrected and then written into a good block of the mapped position.
  • the block is first marked as a bad block "Bad" in the state table, and a new good block is obtained from the spare block area, assuming its sequence number. It is No. 71, and then the serial number No. 71 of the good block is stored in the position where the serial number No. 47 in the map is located, and the position of the spare block No. 71 in the mapping table is stored in the serial number No. 47.
  • the replacement block No. 71 is found through the mapping table, and the data Data2 is directly written into the replacement block.
  • the block in the spare block area may also become a bad block. If the block used as the replacement block in the spare block area is a bad block, such as a replacement block of the block used as the serial number No. 47, the block of the serial number No. 71 becomes If a bad block is needed, it is necessary to re-acquire a new good block in the spare block area, assuming that its serial number is No. 72, and then save the serial number No. 72 of the good block in the position of the serial number No. 47 in the mapping table, and In the mapping table, the location No. 72 is stored in the location No. 47, and the location corresponding to the bad block in the mapping table is marked as not available as a replacement block. For example, the location of No. 71 is marked as “0x0000” to indicate that it is unavailable. As a replacement block, as shown in FIG. 4, it is an updated state table and mapping table. It can be understood that the marked symbols can be customized.
  • Step S240 if the bad block is a block in which the spare block area is not used as a replacement block, then in the mapping table and the bad The position corresponding to the block is marked as not available as a replacement block.
  • the spare block area is not a bad block as a replacement block, since it has not been used as a replacement block, only the position corresponding to the bad block in the mapping table is marked as not replaceable. Just fine. As shown in FIG. 3, the position marked with "0x0000" at No. 70 indicates that it cannot be used as a replacement block, and it can be understood that the symbol of the mark can be customized.
  • an NVM bad block identification processing and an error correction method based on heterogeneous mixed memory are provided, and the method includes:
  • Step S310 reading data of the current address unit, obtaining first read data, and performing operation on the first read data to obtain first operation data.
  • Step S320 writing first operation data to the current address unit, and reading the first operation data to obtain second read data.
  • step S330 it is determined whether the second read data is the same as the first operation data. If not, the process proceeds to step S340, otherwise, the process proceeds to step S370.
  • the block when the second read data is different from the first operation data, the block is not directly determined to be a bad block, so as to avoid an error caused by the NVM block itself, thereby causing the error to be a bad block and reducing The probability of misjudgment.
  • Step S340 writing the first operation data to the current address unit again, and reading the first operation data again to obtain the third read data.
  • the data read for the third time is the data that is saved after the operation of the first read data, instead of the original data originally saved in the block of the NVM.
  • step S350 it is determined whether the third read data is the same as the first operation data. If not, the process proceeds to step S360 to determine that the block is a bad block, otherwise the process proceeds to step S370.
  • the third read data is different from the first operation data, and the address unit cannot be used normally, and one block of the NVM is included. As long as one address unit is not normal in the address unit, the block is a bad block, and the remaining address units are not detected.
  • Step S370 determining whether the current address unit is the end address unit of the block of the NVM, and if yes, proceeding to step S380 to determine whether the block is good or bad, otherwise proceeding to step S390.
  • step S390 the next address unit is used as the current address unit, and the process returns to step S310.
  • determining whether the second read data is the same as the first operation data if the same step further comprises: performing the inverse operation on the second read data and storing the current address unit; Whether the data is the same as the first operation data, if the same step further comprises: inversely calculating the third read data and storing the current address unit.
  • the second read data is inversely stored and stored in the current address unit or the third read data is inversely stored and stored in the current address unit, since the second read data and the third read data are both
  • the first read data is restored after the inverse operation, in order to ensure that the original data is read and saved without being rewritten.
  • the inverse operation refers to the opposite operation corresponding to the operation. If 1 is added to the original data, the inverse operation is decremented by 1.
  • both the operation and the inverse operation are to negate the data.
  • both the operation and the inverse operation are to invert the data, and the inverse operation of the inverse operation is the inverse operation itself, which is simple and convenient.
  • the spare block area further stores a page erasure count record table, wherein the page erase count record table stores the page number and the corresponding number of times of erasing, and the method further includes: obtaining the page erase count Record the table, according to the page erase count record table, determine whether there is more than the most in the NVM block The page of the number of times of erasing, if yes, determines that the block is a bad block, otherwise it is determined that the block is a good block.
  • the maximum number of erasures is the value specified in the design manual of the selected NVM. If there is a page in the NVM that exceeds the maximum number of erasures, then the page is invalid and unavailable, then the block is a bad block. Otherwise, there is no page in the NVM block that exceeds the maximum number of erasures, indicating that each block in the NVM The page is available, then this block is good or bad.
  • the bad block can also be identified by the page erase count record table, which further ensures the reliability and integrity of the data. .
  • the method further includes:
  • the preset number of steps S2-S4 is repeatedly executed. When the operation result obtained by executing each of the steps S2-S4 is not 0, it is determined that the data is erroneous, and data error correction is performed according to the operation result.
  • the ECC check refers to a process of performing parity check on a data block to generate an ECC checksum. Parity is the process of verifying the row and column of a data block to generate a row check value and a column check value.
  • the ECC check When the data is written, the ECC check generates a write checksum, and when the written data is re-read, the ECC check generates a read checksum, and the checksum and the read are written.
  • the checksum is XORed by bit. If it is 0, the data is correct. Otherwise, in order to avoid misjudgment, steps S2-S4 are repeatedly executed according to the preset number of times, and when the obtained operation result is not 0, it is determined that the data is in error.
  • the step S2-S4 is performed again, and if the result is 0, the number is determined. According to the correctness, if it is not 0, it is determined that the data is erroneous, and data error correction is performed according to the operation result.
  • Error correction can only be performed if the result of the operation is met, and other cases indicate an uncorrectable error.
  • the data is subjected to an ECC check to generate a write checksum
  • the read data is subjected to an ECC check to generate a read checksum.
  • the process of performing ECC verification includes:
  • step S410 it is determined whether the data required for the ECC check satisfies the preset byte. If not, the process proceeds to step S420, otherwise, the process proceeds to step S430.
  • the data is ECC checked in units of preset bytes.
  • the preset byte is 256 bytes.
  • step S420 the data is split and filled to generate data of a preset byte.
  • the preset data is directly added to the data of the preset byte. If 0 is added afterwards, the data length reaches the preset byte. If the data length is greater than the preset byte, split and fill the data to generate multiple preset bytes.
  • Step S430 performing row check and column check on the data of the preset byte to obtain a row check value and a column check value.
  • the row check is performed by performing an exclusive OR operation on the specified row of data to obtain a row check value
  • the column check is performed by performing an exclusive OR operation on the designated column of the data to obtain a column check value.
  • the X bit is checked for X bit. If the result is 0, it indicates that the data to be verified contains an even number of 1; if the result is 1, it indicates that the data to be verified contains an odd number of 1.
  • the 256 bytes of raw data is generated to generate a 16Bit row check value of 6Bit column check value.
  • the 256-byte data forms a matrix of 256 rows and 8 columns, and each element of the matrix represents a Bit. Bit.
  • Table 1 Byte0 to Byte255 represent 256 bytes of data, and Bit0 to Bit7 indicate that each byte has 8 bits.
  • the rule of row check is specifically: XOR is used to obtain 16 Bit data by using the data of the specified row, and the 16 bit bits are represented by RP0 to RP15, which represents the row polarity.
  • RP0 indicates the polarity of 0, 2, 4, 6, ... 252, 254 bytes, that is, 1 byte is processed, and 1 Byte is skipped.
  • RP1 indicates the polarity of the first, third, fifth, seventh, ..., 255 bytes, that is, one Byte is skipped, and one Byte is processed.
  • RP2 indicates the polarity of 0, 1, 4, 5, 8, 9, ... 252, 253 bytes, that is, 2 Bytes are processed, and 2 Bytes are skipped.
  • RP3 indicates the polarity of the second, third, sixth, seventh, tenth, eleventh, 254th, and 255th bytes, that is, two Bytes are skipped, and two Bytes are processed.
  • RP4 means that 4 Bytes are processed and 4 Bytes are skipped.
  • RP5 means skipping 4 Bytes and processing 4 Bytes.
  • RP6 means that 8 Bytes are processed and 8 Bytes are skipped.
  • RP7 means skipping 8 Bytes and processing 8 Bytes.
  • RP8 means processing 16 Bytes and skipping 16 Bytes.
  • RP9 means skipping 16 Bytes and processing 16 Bytes.
  • RP10 means to process 32 Bytes and skip 32 Bytes.
  • RP11 means skipping 32 Bytes and processing 32 Bytes.
  • RP12 means that 64 bytes are processed and 64 bytes are skipped.
  • RP13 means skipping 64 Bytes and processing 64 Bytes.
  • RP14 indicates that 128 bytes are processed and 128 bytes are skipped.
  • RP15 means skipping 128 Bytes and processing 128 Bytes.
  • the rule of the column check is specifically: XORing the data of the specified column to obtain 6 Bit data, and the 6 bit bits are represented by CP0 to CP5, representing the column polarity.
  • CP0 indicates the polarity of the 0th, 2nd, 4th, and 6th columns
  • CP1 indicates the polarity of the 1st, 3rd, 5th, and 7th columns.
  • CP2 indicates the polarity of the 0th, 1st, 4th, and 5th columns
  • CP3 indicates the polarity of the 2nd, 3rd, 6th, and 7th columns.
  • CP4 indicates the polarity of columns 0, 1, 2, and 3
  • CP5 indicates the polarity of columns 4, 5, 6, and 7.
  • step S440 the row check value and the column check value are sequentially stored and complemented to generate a checksum of the preset byte.
  • the preset byte is adjusted according to the row check value and the bit number of the column check value, and the checksum of the integer byte is generated. If the row check value is 16 bits and the column check value is 6 bits, the check result is stored in 3 bytes, and the sequential storage is as shown in Table 3, and the excess two bit positions are set.
  • the step of performing data error correction according to the operation result includes:
  • Step S510 it is judged whether there is a preset number of 1 in the bit of the operation result, and if yes, the process proceeds to step S520, otherwise the data is not error-corrected.
  • a bit of the operation result has a preset number of 1, wherein the preset number is adjusted according to the bit value of the row check value and the column check value, and is a row check value and a column check. Half of the total number of bits in the test. If the row check value is 16 bits and the column check value is 6 bits, the total number of bits is 22, and the preset number is 11. If the bit of the operation result has a preset number of 1, it is determined that the data is correctable Wrong, proceed to step S520, otherwise the data is not error correctable.
  • Step S520 determining an erroneous row address and a column address according to the operation result.
  • the values of the odd bit bits of each byte of the operation result corresponding to the row polarity are extracted and stored in the order from the low bit bit to the high bit bit, and the obtained value is the row address of the error data.
  • the lower three bits of Bit 7, Bit 5, and Bit 3 of the operation result corresponding to the column polarity are extracted, and the remaining positions are 0, indicating the column address of the error data.
  • the checksum generated by ECC check on 256-byte data is 3 bytes, and is stored in s0, s1, and s2. If s0, s1, and s2 have 11 bit bits, It means that the data has a bit error and can be corrected.
  • the method of locating the erroneous bit is to first determine the row address (ie, which byte is erroneous) and then determine the column address (ie, which bit bit in the byte is in error).
  • the method of determining the row address is to extract Bit7, Bit5, Bit3, and Bit1 in s1 as the upper four bits, and extract Bit7, Bit5, Bit3, and Bit1 in s0 as the lower four bits, and then the upper four bits and the lower four bits.
  • the value indicates the row address of the error byte (range 0 to 255).
  • the method of determining the column address is to use one byte to represent the column address, and extract Bit7, Bit5, and Bit3 in s2 as the lower three bits, and the remaining positions are 0.
  • the value of this byte indicates the column address of the error bit (the range is 0). ⁇ 7).
  • Step S530 obtaining error data according to the row address and the column address, and performing inverse operation on the error data to obtain correct data.
  • the position of the error data is determined according to the row address and the column address, the error data is acquired, and the error data is inverted to obtain the correct data. If the row address is 10 and the column address is 5, it means that the data of the location of Byte10 and Bit5 in Table 2 is wrong, and the error data is inverted to obtain the correct data.
  • a NVM bad block based on heterogeneous mixed memory is provided.
  • Identification processing and error correction systems including:
  • the detecting module 610 is configured to detect data in each address unit in the block of the NVM during the self-test.
  • the determining module 620 is configured to determine, if the data in any one of the address units in the block, the data obtained after the operation of the read data is different from the data obtained by writing the data obtained after the operation into the address unit, The block is a bad block.
  • the determining module 620 is further configured to: if the data in all the address units in the block, the data obtained after the operation of the read data is the same as the data obtained after the data obtained by the operation is written into the address unit, and then the data is read again, the determining block is determined. For a good block.
  • the detecting module 610 includes:
  • the first data obtaining unit 611 is configured to use the starting address unit of the block of the NVM as the current address unit, read the data of the current address unit, obtain the first read data, and perform the operation on the first read data to obtain the first Calculate data.
  • the second data acquiring unit 612 is configured to write the first operation data into the current address unit, and read the first operation data to obtain the second read data.
  • the processing unit 613 is configured to determine whether the second read data is the same as the first operation data, if different, the block is a bad block; if the same, further determine whether the current address unit is an end address unit of the NVM block, if yes The block is a good block, otherwise the next address unit is used as the current address unit, and the step of the first data acquisition module entering the data of the current address unit is returned.
  • the NVM includes a data storage area and a spare block area, and a state table for recording a block state of the NVM and a mapping table for recording a replacement relationship of the bad block and the good block are stored in the spare block area.
  • the method further includes:
  • the block processing module 630 is configured to mark a location corresponding to the block in the state table and the mapping table as a good block if the block is a good block.
  • the block processing module 630 is further configured to mark a location corresponding to the block in the state table as a bad block if the block is a bad block.
  • the block processing module 630 is further configured to acquire a good block of the spare block area if the bad block is a data storage area or a block of the spare block area used as a replacement block, and replace the good block of the spare block area as a bad block.
  • Block the location information of the block is saved in the mapping table corresponding to the bad block, and the location information of the bad block is saved in the mapping table corresponding to the good block, if the bad block is the spare block area used as the replacement block
  • the block also needs to mark the position corresponding to the bad block in the mapping table as not being used as a replacement block.
  • the block processing module 630 is further configured to mark a location corresponding to the bad block in the mapping table as a non-replacement block if the bad block is a block in which the spare block area is not used as a replacement block.
  • the processing unit 613 is further configured to write the first operation data to the current address unit again, read the first operation data again, obtain the third read data, and determine the third read data and the first Whether the operation data is the same or not, the block is a bad block. If they are the same, the process proceeds to a step of further determining whether the current address unit is an end address unit of a block of NVM.
  • the processing unit 613 is further configured to: determine whether the second read data is the same as the first operation data, and if the same, convert the second read data into the current address unit; After determining whether the third read data is identical to the first operation data, if the same, the third read data is inversely stored and stored in the current address unit.
  • both the operation and the inverse operation are to negate the data.
  • the spare block area further stores a page erasure count record table, wherein the page erase count record table stores the page number and the corresponding number of times of erasing, as shown in FIG. include:
  • the record table determination module 640 is configured to obtain a page erase count record table, determine, according to the page erase count record table, whether there is a page exceeding the maximum number of erase times in the block of the NVM, and if yes, determine that the block is a bad block, otherwise The decision block is a good block.
  • system further includes:
  • the error correction module 650 is configured to execute:
  • S2 The data is sent to the NVM memory, and the data is subjected to ECC check to generate a write checksum;
  • the error correction module 650 performs ECC check on the data, specifically determining whether the data required for the ECC check meets the preset byte, and if not, splitting and filling the data to generate a preset.
  • the data of the byte is subjected to row check and column check on the data of the preset byte to obtain a row check value and a column check value, and the row check value and the column check value are sequentially stored and complemented to generate a preset.
  • the checksum of the bytes is performed bytes.
  • the error correction module 650 is further configured to determine whether a bit of the operation result has a preset number of 1, and if yes, determine that the data is error correctable, otherwise determine that the data is not error correctable, if the data is Error correction, according to the operation result to determine the row address and column address of the error, according to the row address and column address to obtain error data, the error data is inverted to obtain the correct data.

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Abstract

一种基于异构混合内存的NVM坏块识别处理及纠错方法，该方法包括：在自检过程中，执行：检测NVM的块中的每个地址单元中的数据，如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定块为坏块；如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定块为好块。将读取的数据进行运算后写入相同的地址，能识别NVM中的坏块并且降低误判的几率，保证NVM内存中的数据的可靠性和完整性。此外，还提供了一种基于异构混合内存的NVM坏块识别处理及纠错系统。

Description

基于异构混合内存的NVM坏块识别处理及纠错方法和系统 技术领域
本发明涉及计算机技术领域，特别是涉及一种基于异构混合内存的NVM坏块识别处理及纠错方法和系统。
背景技术
随着电阻存储器、铁电存储器、相变存储器等为代表的新兴非易失性随机存储介质(Non-Volatile Memory，NVM)技术的发展，推进了存储技术的发展，为新型的内存与存储体系结构的产生打下了良好的基础。通过把新型的NVM和动态随机访问存储器(Dynamic Random Access Memory，DRAM)相结合，搭建混合内存架构，形成异构混合内存。异构混合内存同时具有NVM和DRAM的特点，不仅仅具备常规内存的功能，存储在DRAM中的数据在断电后会立即消失，是易失性的；同时还能发挥NVM在断电后还能保存数据的优势，充分发挥NVM非易失性的特点，是一种混合使用的新型内存。
异构混合内存满足现有工业控制设备的常规内存接口，无需引进新的工业控制设备或添加新的辅助设备，成为了一个研究热点。
异构混合内存中的NVM与DRAM特性不同，NVM存在擦写总次数有限制的先天缺陷，达到一定擦写次数后NVM将会失效，并且NVM存储区域出现的损坏是永久性的，同时限于当今的制造工艺和寿命限制，NVM将不可避免的出现坏块，常规的DRAM内存数据处理方法不涉及到NVM坏块，不适用于异 构混合内存中的NVM内存。
发明内容
基于此，有必要针对上述问题，提供一种基于异构混合内存的NVM坏块识别处理及纠错方法和系统，能识别NVM中的坏块，并进行处理和数据纠错，保证NVM内存中的数据的可靠性和完整性。
一种基于异构混合内存的NVM坏块识别处理及纠错方法，所述方法包括：
在自检过程中，执行：
检测NVM的块中的每个地址单元中的数据；
如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；
如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定所述块为好块。
在其中一个实施例中，所述检测NVM的块中的每个地址单元中的数据的步骤包括：
将NVM的块的起始地址单元作为当前地址单元，执行：
读取所述当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据；
将所述第一运算数据写入所述当前地址单元，读取所述第一运算数据得到第二读取数据；
判断所述第二读取数据与第一运算数据是否相同，如果不同，则所述块为坏块；如果相同，则进一步判断所述当前地址单元是否为NVM的块的结束地址单元，如果是，则所述块为好块，否则将下一个地址单元作为当前地址单元，返回所述读取所述当前地址单元的数据的步骤。
在其中一个实施例中，所述NVM包含数据存储区和备用块区；所述备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表；所述方法还包括：
如果所述块为好块，则在状态表和映射表中与所述块对应的位置标记为好块；
如果所述块为坏块，则在状态表中与所述块对应的位置标记为坏块；
如果所述坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为所述坏块的替换块，在映射表中与所述坏块对应的位置保存所述好块的位置信息，在映射表中与所述好块对应的位置保存所述坏块的位置信息；如果所述坏块为备用块区用作替换块的块，还需要在映射表中与所述坏块对应的位置标记为不可用作替换块。
如果所述坏块为备用块区没有用作替换块的块，则在映射表中与所述坏块对应的位置标记为不可用作替换块。
在其中一个实施例中，在所述判断第二读取数据与第一运算数据是否相同，如果不同的步骤之后，还包括：
将第一运算数据再次写入所述当前地址单元，再次读取所述第一运算数据，得到第三读取数据；
判断所述第三读取数据与第一运算数据是否相同，如果不同，则所述块为 坏块，如果相同，则再进入所述进一步判断所述当前地址单元是否为NVM的块的结束地址单元的步骤。
在其中一个实施例中，在所述判断第二读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将所述第二读取数据反运算后存入所述当前地址单元；
在所述判断第三读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将所述第三读取数据反运算后存入所述当前地址单元。
在其中一个实施例中，所述运算和反运算都为对数据进行取反。
在其中一个实施例中，所述备用块区还保存了页面擦写次数记录表，所述页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，所述方法还包括：
获取所述页面擦写次数记录表；
根据所述页面擦写次数记录表，判断NVM的块中是否存在超过最大擦写次数的页面，如果是，则判定所述块为坏块，否则判定所述块为好块。
在其中一个实施例中，所述方法还包括：
S1：获取数据写入请求；
S2：将数据写入到NVM内存中，将所述数据进行ECC校验生成写入校验和；
S3：从所述数据写入的位置读取所述数据，将读取出的数据进行ECC校验生成读取校验和；
S4：将所述写入校验和以及读取校验和进行异或运算，得到运算结果；
S5：如果运算结果为0，则所述数据正确，否则
重复执行预设次数步骤S2-S4，当每次执行完步骤S2-S4得到的运算结果都不为0时，判定所述数据出错，并根据所述运算结果进行数据纠错。
在其中一个实施例中，所述将所述数据进行ECC校验生成写入校验和以及将读取出的数据进行ECC校验生成读取校验和中对数据进行ECC校验的步骤包括：
判断需要进行ECC校验的数据是否满足预设字节；
如果不满足则将所述数据进行拆分和补齐生成预设字节的数据；
对所述预设字节的数据进行行校验和列校验，得到行校验值和列校验值；
将所述行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
在其中一个实施例中，所述根据所述运算结果进行数据纠错的步骤包括：
判断所述运算结果的比特位是否存在预设数目的1，如果是则判定为数据可纠错，否则判定为数据不可纠错；
如果数据可纠错，则根据所述运算结果确定出错的行地址和列地址；
根据所述行地址和列地址获取出错数据，将所述出错数据进行取反运算得到正确数据。
一种基于异构混合内存的NVM坏块识别处理及纠错系统，所述系统包括：
检测模块，用于在自检过程中，检测NVM的块中的每个地址单元中的数据；
判定模块，用于如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；
所述判定模块还用于如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的 数据都相同，则判定所述块为好块。
在其中一个实施例中，所述检测模块包括：
第一数据获取单元，用于将NVM的块的起始地址单元作为当前地址单元，读取所述当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据；
第二数据获取单元，用于将所述第一运算数据写入所述当前地址单元，读取所述第一运算数据得到第二读取数据；
处理单元，用于判断所述第二读取数据与第一运算数据是否相同，如果不同，则所述块为坏块；如果相同，则进一步判断所述当前地址单元是否为NVM的块的结束地址单元，如果是，则所述块为好块，否则将下一个地址单元作为当前地址单元，返回第一数据获取模块进入读取所述当前地址单元的数据的步骤。
在其中一个实施例中，所述NVM包含数据存储区和备用块区，所述备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表，所述系统还包括：
块处理模块，用于如果所述块为好块，则在状态表和映射表中与所述块对应的位置标记为好块；
所述块处理模块还用于如果所述块为坏块，则在状态表中与所述块对应的位置标记为坏块；
所述块处理模块还用于如果所述坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为所述坏块的替换块，在映射表中与所述坏块对应的位置保存所述好块的位置信息，在映射表中与所 述好块对应的位置保存所述坏块的位置信息，如果所述坏块为备用块区用作替换块的块，还需要在映射表中与所述坏块对应的位置标记为不可用作替换块；
所述块处理模块还用于如果所述坏块为备用块区没有用作替换块的块，则在映射表中与所述坏块对应的位置标记为不可用作替换块。
在其中一个实施例中，所述处理单元还用于将第一运算数据再次写入所述当前地址单元，再次读取所述第一运算数据，得到第三读取数据，判断所述第三读取数据与第一运算数据是否相同，如果不同，则所述块为坏块，如果相同，则再进入所述进一步判断所述当前地址单元是否为NVM的块的结束地址单元的步骤。
在其中一个实施例中，所述处理单元还用于在判断第二读取数据与第一运算数据是否相同，如果相同之后，将所述第二读取数据反运算后存入所述当前地址单元；还用于在判断第三读取数据与第一运算数据是否相同，如果相同之后，将所述第三读取数据反运算后存入所述当前地址单元。
在其中一个实施例中，所述运算和反运算都为对数据进行取反。
在其中一个实施例中，所述备用块区还保存了页面擦写次数记录表，所述页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，所述系统还包括：
记录表判定模块，用于获取所述页面擦写次数记录表，根据所述页面擦写次数记录表，判断NVM的块中是否存在超过最大擦写次数的页面，如果是，则判定所述块为坏块，否则判定所述块为好块。
在其中一个实施例中，所述系统还包括：
纠错模块，用于执行：
S1：获取数据写入请求；
S2：将数据到NVM内存中，将所述数据进行ECC校验生成写入校验和；
S3：从所述数据写入的位置读取所述数据，将读取出的数据进行ECC校验生成读取校验和；
S4：将所述写入校验和以及读取校验和进行异或运算，得到运算结果；
S5：如果运算结果为0，则所述数据正确，否则重复执行预设次数S2-S4，当每次执行完S2-S4得到的运算结果都不为0时，判定所述数据出错，并根据所述运算结果进行数据纠错。
在其中一个实施例中，所述纠错模块对数据进行ECC校验具体是判断需要进行ECC校验的数据是否满足预设字节，如果不满足则将所述数据进行拆分和补齐生成预设字节的数据，对所述预设字节的数据进行行校验和列校验，得到行校验值和列校验值，将所述行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
在其中一个实施例中，所述纠错模块还用于判断所述运算结果的比特位是否存在预设数目的1，如果是则判定为数据可纠错，否则判定为数据不可纠错，如果数据可纠错，则根据所述运算结果确定出错的行地址和列地址，根据所述行地址和列地址获取出错数据，将所述出错数据进行取反运算得到正确数据。
上述基于异构混合内存的NVM坏块识别处理及纠错方法和系统，通过在自检过程中，检测NVM的块中的每个地址单元中的数据，如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得 到的数据写入地址单元后再次读取得到的数据都相同，则判定所述块为好块。将读取的数据进行运算后写入相同的地址，而不是直接将读取的数据写入相同的地址，再读出来和第一次读取的数据进行运算后的结果进行比较，根据比较结果判断是否是坏块，能识别NVM中的坏块并且降低误判的几率，保证NVM内存中的数据的可靠性和完整性。
附图说明
图1为一个实施例中基于异构混合内存的NVM坏块识别方法的流程图；
图2为一个实施例中基于异构混合内存的NVM坏块处理的流程图；
图3为一个实施例中NVM内存、状态表和映射表的示意图；
图4为一个实施例中更新的状态表和映射表的示意图；
图5为另一个实施例中基于异构混合内存的NVM坏块识别方法的流程图；
图6为一个实施例中将数据进行ECC校验生成校验和的流程图；
图7为一个实施例中根据运算结果进行数据纠错的流程图；
图8为一个实施例中基于异构混合内存的NVM坏块识别系统的结构框图；
图9为一个实施例中检测模块的结构框图；
图10为另一个实施例中基于异构混合内存的NVM坏块识别处理系统的结构框图；
图11为一个实施例中基于异构混合内存的NVM坏块识别处理系统的结构框图；
图12为一个实施例中基于异构混合内存的NVM坏块识别处理及纠错系统的结构框图。
具体实施方式
为了使本发明的目的、技术方案及优点更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。
在一个实施例中，提供了一种基于异构混合内存的NVM坏块识别处理及纠错方法，该方法包括：
在自检过程中，执行：检测NVM的块中的每个地址单元中的数据；如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定所述块为好块。
本实施例中，对NVM的块进行自检，是在第一次开机使用NVM前进行自检或者由用户发出特殊指令自检，自检由应用层向NVM内存缓冲控制器发出特殊指令执行。自检时，检测NVM的块中的每个地址单元中的数据，地址单元是指NVM的块中的内存空间，NVM的块由多个地址单元组成，以地址单元为单位进行自检，地址单元的大小可以自定义，优选的，以1字节为一个地址单元。运算的规则可以自定义，如对数据进行加减乘除、取反等运算。
本实施例中，通过在自检过程中，检测NVM的块中的每个地址单元中的数据，如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；如果块中所有地址单元中的数据，对读取的所述数据运算后得 到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定所述块为好块。
对于某类坏块，可以正确读取数据，不能写入数据，则第一次读取的数据是正确的数据，和块中保存的原始数据相同，如果不对第一次读取的数据进行运算就直接将此数据进行写入，虽然坏块不能写入数据，但是坏块中本来就保存有原始数据，则导致第二次再读取的数据是坏块中本来保存的原始数据与第一次读取的数据相同，从而判定为好坏，导致不能识别出此类坏块。本实施例中，将读取的数据进行运算后写入相同的地址，而不是直接将读取的数据写入相同的地址，再读出来和第一次读取的数据进行运算后的结果进行比较，根据比较结果判断是否是坏块，能识别NVM中的坏块并且降低误判的几率，保证NVM内存中的数据的可靠性和完整性。
在一个实施例中，如图1所示，提供了一种基于异构混合内存的NVM坏块识别处理及纠错方法，该方法包括：
将NVM的块的起始地址单元作为当前地址单元执行步骤S110，读取当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据。
本实施例中，从NVM块的起始地址单元开始进行检测，地址单元的大小可以自定义，优选的，以1字节为一个地址单元。运算的规则可以自定义，如对数据进行加减乘除、取反等运算。
步骤S120，将第一运算数据写入所述当前地址单元，读取第一运算数据得到第二读取数据。
本实施例中，将运算后的第一运算数据写入当前地址单元，再从当前地址 单元读取第一运算数据得到第二读取数据，保证第二次读取的数据是经过运算后保存的数据，而不是NVM的块中原先保存的原始数据。
步骤S130，判断第二读取数据与第一运算数据是否相同，如果不同，则所述块为坏块，否则进入步骤S140。
本实施例中，如果地址单元的读取或写入功能有一项出错，则会导致第二读取数据与第一运算数据不相同，则所述地址单元不能正常使用，NVM的一个块中包含的地址单元中只要有一个地址单元不正常，则此块为坏块，就不用再对剩下的地址单元进行检测了。
步骤S140，判断当前地址单元是否为NVM的块的结束地址单元，如果是，则所述块为好坏，否则进入步骤S150。
本实施例中，当前地址单元如果为NVM的块的结束地址单元，则说明NVM的块中从起始地址单元到结束地址单元的所有地址单元都能正常使用，则此块为好块。
步骤S150，将下一个地址单元作为当前地址单元，返回步骤S110。
本实施例中，如果当前地址单元不是NVM的块的结束地址单元，则将下一个地址单元作为当前地址单元返回步骤S110，对块中还没有检测的剩下的地址单元进行检测。
本实施例中，从NVM的块的起始地址单元开始顺序对地址单元进行检测，如果检测出不正常的地址单元，则不需要对剩下的地址单元进行检测，判断此块为坏块。
在一个实施例中，NVM包含数据存储区和备用块区，备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表， 本实施例中，NVM包含数据存储区用于存储数据，还包含NVM内存缓冲控制器划出的一个特殊存储区域即备用块区，备用块区保存了用于记录和管理数据坏块的链表包括状态表和映射表，备用块区还用于作为坏块的替换存储空间。状态表中记录了NVM的所有块的块状态，即是坏块还是好块。映射表记录了坏块和好块的替换关系，通过坏块的位置可以找到替换它的好块的位置，通过好块的位置也可以找到它所替换的坏块的位置，如图2所示，所述方法还包括：
步骤S210，如果块为好块，则在状态表和映射表中与块对应的位置标记为好块。
本实施例中，状态表中包括NVM块的位置信息和各个位置对应的块状态。映射表中包括NVM块的位置信息和各个位置对应的信息。可以理解的是，位置信息可以用块序号来表示。如果块为好块，则在状态表和映射表中与块对应的位置标记为好块，标记的符号可以自定义，如在状态表中用“Good”表示好块，在映射表中用“0xFFFF”表示好块，可以被用作替换块。
步骤S220，如果块为坏块，则在状态表中与块对应的位置标记为坏块。
本实施例中，标记的符号可以自定义，如在状态表中用“Bad”表示坏块。经过自检之后，NVM数据存储区和备用块区的块都有了自己的块状态，记录在状态表中。
步骤S230，如果坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为所述坏块的替换块，在映射表中与坏块对应的位置保存好块的位置信息，在映射表中与好块对应的位置保存坏块的位置信息，如果坏块为备用块区用作替换块的块，还需要在映射表中与坏块对应的位置标记为不可用作替换块。
本实施例中，如果数据存储区的块是坏块，则需要用备用块区的好块替换坏块，通过映射表，把备用块区的好块的位置映射到坏块位置，在映射表中与坏块对应的位置保存好块的位置信息，在映射表中与好块对应的位置保存坏块的位置信息，使在保存或读取数据时可根据位置映射关系直接将数据写入好块或直接从好块读取数据，起到对系统屏蔽坏块的作用。可以理解的是，经过ECC校验后出错的数据可以经过纠正后再写入映射位置的好块。如图3所示，例如如果检测出序号为No.47的块出错，先在状态表中标记该块为坏块“Bad”，同时从备用块区中获取一个新的好块，假设其序号为No.71，然后将此好块的序号No.71保存在映射中的序号No.47所在的位置，而且映射表中的备用块No.71所在位置保存序号No.47。经过映射处理后，当将数据Data2写入序号为No.47的块时，由于状态表中记录该块为坏块，就通过映射表找到替换块No.71，直接将数据Data2写入替换块No.71；当读取序号为No.47的块的数据时，由于状态表中记录该块为坏块，就通过映射表找到替换块No.71，直接去替换块No.71中读取数据Data2；映射表中的这种双向映射可确保数据的可靠性。
进一步的，备用块区域中的块也有可能成为坏块，如果备用块区用作替换块的块是坏块，如用作序号No.47的块的替换块，即序号No.71的块成为了坏块，则需要重新在备用块区获取一个新的好块，假设其序号为No.72，然后将此好块的序号No.72保存在映射表中序号No.47所在的位置，而且映射表中序号No.72所在位置保存序号No.47，还需要在映射表中与坏块对应的位置标记为不可用作替换块，如在No.71所在位置标记为“0x0000”表示不可用作替换块，如图4所示，为更新后的状态表和映射表。可以理解的是，标记的符号可以自定义。
步骤S240，如果坏块为备用块区没有用作替换块的块，则在映射表中与坏 块对应的位置标记为不可用作替换块。
本实施例中，如果备用块区没有用作替换块的块是坏块，则由于它还没有被用作替换块，只需要在映射表中与坏块对应的位置标记为不可用作替换块即可。如图3所示，在No.70所在位置标记为“0x0000”表示不可用作替换块，可以理解的是，标记的符号可以自定义。
在另一个实施例中，如图5所示，提供了一种基于异构混合内存的NVM坏块识别处理及纠错方法，该方法包括：
步骤S310，读取当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据。
步骤S320，将第一运算数据写入所述当前地址单元，读取第一运算数据得到第二读取数据。
步骤S330，判断第二读取数据与第一运算数据是否相同，如果不同，则进入步骤S340，否则进入步骤S370。
本实施例中，当第二读取数据与第一运算数据不相同时，没有直接判定所述块是坏块，是为了避免不是NVM块本身引起的出错，导致误判其为坏块，减少了误判的几率。
步骤S340，将第一运算数据再次写入所述当前地址单元，再次读取所述第一运算数据，得到第三读取数据。
本实施例中，再次保证第三次读取的数据是第一次读取的数据经过运算后保存的数据，而不是NVM的块中原先保存的原始数据。
步骤S350，判断第三读取数据与第一运算数据是否相同，如果不同，则进入步骤S360判定所述块为坏块，否则进入步骤S370。
本实施例中，如果地址单元的读取或写入功能有一项出错，则会导致第三读取数据与第一运算数据不相同，则所述地址单元不能正常使用，NVM的一个块中包含的地址单元中只要有一个地址单元不正常，则此块为坏块，就不用再对剩下的地址单元进行检测了。
步骤S370，判断当前地址单元是否为NVM的块的结束地址单元，如果是，则进入步骤S380判定所述块为好坏，否则进入步骤S390。
步骤S390，将下一个地址单元作为当前地址单元，返回步骤S310。
在一个实施例中，在判断第二读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将第二读取数据反运算后存入当前地址单元；在判断第三读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将所述第三读取数据反运算后存入当前地址单元。
本实施例中，将第二读取数据反运算后存入当前地址单元或将第三读取数据反运算后存入当前地址单元，由于第二读取数据和第三读取数据都是第一读取数据经过运算后的数据，则再进行反运算后就又恢复了第一读取数据，是为了保证原始数据被读取又保存后没有被改写。其中反运算是指与运算对应的相反的运算，如对原始数据加1，则其反运算为减1。
在一个实施例中，运算和反运算都为对数据进行取反。
本实施例中，运算和反运算都为对数据进行取反，取反运算的反运算就是取反运算本身，简单方便。
在一个实施例中，备用块区还保存了页面擦写次数记录表，页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，所述方法还包括：获取页面擦写次数记录表，根据页面擦写次数记录表，判断NVM的块中是否存在超过最 大擦写次数的页面，如果是，则判定所述块为坏块，否则判定所述块为好块。
本实施例中，最大擦写次数是所选用的NVM的设计手册中规定的值。如果NVM的块中存在超过最大擦写次数的页面，则此页面己失效不可用，则此块为坏块，否则NVM的块中不存在超过最大擦写次数的页面，说明NVM的块中各个页面都可用，则此块为好坏。通过页面擦写次数记录表也可以识别坏块，进一步的保证了数据的可靠性和完整性。。
在一个实施例中，所述方法还包括：
S1：获取数据写入请求；
S2：将数据到NVM内存中，将所述数据进行ECC校验生成写入校验和；
S3：从所述数据写入的位置读取所述数据，将读取出的数据进行ECC校验生成读取校验和；
S4：将所述写入校验和以及读取校验和进行异或运算，得到运算结果；
S5：如果运算结果为0，则所述数据正确，否则
重复执行预设次数步骤S2-S4，当每次执行完步骤S2-S4得到的运算结果都不为0时，判定所述数据出错，并根据所述运算结果进行数据纠错。
本实施例中，ECC校验是指对数据块进行奇偶检验生成ECC校验和的过程。奇偶检验是指分别对数据块的行、列进行校验生成行校验值和列校验值的过程。当写入数据的时候进行ECC校验生成一个写入校验和，当重新读取所述写入的数据时进行ECC校验生成一个读取校验和，将写入校验和以及读取校验和按位进行异或运算，如果为0，则所述数据正确。否则，为了避免误判，根据预设次数，重复执行步骤S2-S4，得到的运算结果都不为0时，判定所述数据出错。优选的，预设次数为1，则再执行一次步骤S2-S4，如果结果为0，则判定所述数 据正确，如果不为0，则判定所述数据出错，并根据所述运算结果进行数据纠错。
只有符合条件的运算结果才能进行纠错，其它的情况则表示出现了不可纠正的错误。
在一个实施例中，如图6所示，所述将所述数据进行ECC校验生成写入校验和以及将读取出的数据进行ECC校验生成读取校验和的步骤中对数据进行ECC校验的过程包括：
步骤S410，判断需要进行ECC校验的数据是否满足预设字节，如果不满足，则进入步骤S420，否则进入步骤S430。
本实施例中，以预设字节为单位对数据进行ECC校验，优选的，预设字节为256字节。
步骤S420，将数据进行拆分和补齐生成预设字节的数据。
本实施例中，如果数据长度小于预设字节，则直接添加预设数据补齐成预设字节的数据。如在后添加0使数据长度达到预设字节。如果数据长度大于预设字节，则进行拆分和补齐生成多个预设字节的数据。
步骤S430，对预设字节的数据进行行校验和列校验，得到行校验值和列校验值。
本实施例中，通过对数据的指定行进行异或运算进行行校验，得到行校验值，通过对数据的指定列进行异或运算进行列校验，得到列校验值。对每个待校验的Bit(比特)位求异或，若结果为0，则表明待校验的数据含有偶数个1；若结果为1，则表明待校验的数据含有奇数个1。优先的，每256字节原始数据生成16Bit的行校验值6Bit的列校验值。
具体的，256字节数据形成256行、8列的矩阵，矩阵每个元素表示一个Bit 位。如表1所示，Byte0～Byte255表示256字节数据，Bit0～Bit7表示每个字节有8bit。
表1
Figure PCTCN2015098814-appb-000001
行校验的规则具体是：用指定行的数据进行异或得到16个Bit的数据，这16个bit位用RP0～RP15表示，代表行极性。
RP0表示第0、2、4、6、…252、254个字节的极性，即处理1个Byte，跳过1个Byte。
RP1表示第1、3、5、7…253、255个字节的极性，即跳过1个Byte，处理1个Byte。
RP2表示第0、1、4、5、8、9…252、253个字节的极性，即处理2个Byte，跳过2个Byte。
RP3表示第2、3、6、7、10、11…254、255个字节的极性，即跳过2个Byte，处理2个Byte。
RP4表示处理4个Byte，跳过4个Byte。
RP5表示跳过4个Byte，处理4个Byte。
RP6表示处理8个Byte，跳过8个Byte。
RP7表示跳过8个Byte，处理8个Byte。
RP8表示处理16个Byte，跳过16个Byte。
RP9表示跳过16个Byte，处理16个Byte。
RP10表示处理32个Byte，跳过32个Byte。
RP11表示跳过32个Byte，处理32个Byte。
RP12表示处理64个Byte，跳过64个Byte。
RP13表示跳过64个Byte，处理64个Byte。
RP14表示处理128个Byte，跳过128个Byte。
RP15表示跳过128个Byte，处理128个Byte。
用公式表示就是：RP0＝Byte0^Byte 2^Byte 4^Byte 6…^Byte 252^Byte 254，表示第0行的8个Bit位跟第2行8个Bit位异或后，再跟第4行的8个Bit位异或，以此类推，直到跟254行的8个Bit位异或得到RP0，RP0就是128行，即128*8＝1024个Bit位求异或的结果。以此类推，RP0～RP15每个Bit位都是128个字节(也就是128行)即128*8＝1024个Bit位求异或的结果。
表2
Figure PCTCN2015098814-appb-000002
如表2所示，列校验的规则具体是：用指定列的数据进行异或得到6个Bit的数据，这6个Bit位用CP0～CP5表示，代表列极性。
CP0表示第0、2、4、6列的极性，CP1表示第1、3、5、7列的极性。
CP2表示第0、1、4、5列的极性，CP3表示第2、3、6、7列的极性。
CP4表示第0、1、2、3列的极性，CP5表示第4、5、6、7列的极性。
用公式表示就是：CP0＝Bit0^Bit2^Bit4^Bit6，表示第0列的256个Bit位跟第2列的256个Bit位异或之后，再跟第4列的256个Bit位异或、再跟第6列的256个Bit位异或得到CP0，CP0其实是256*4＝1024个Bit位异或的结果。CP1～CP5依此类推。
步骤S440，将行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
本实施例中，预设字节根据行校验值和列校验值的bit数进行调整，补齐生成整数字节的校验和。如行校验值为16bit、列校验值为6bit时，使用3个字节存放校验结果，进行顺序存储后如表3所示，并将多余的两个Bit位置1。
表3
ECC Bit7 Bit6 Bit5 Bit4 Bit3 Bit2 Bit1 Bit0
Byte0 RP7 RP6 RP5 RP4 RP3 RP2 RP1 RP0
Byte1 RP15 RP14 RP13 RP12 RP11 RP10 RP9 RP8
Byte2 CP5 CP4 CP3 CP2 CP1 CP0 1 1
在一个实施例中，如图7所示，根据所述运算结果进行数据纠错的步骤包括：
步骤S510，判断运算结果的比特位是否存在预设数目的1，如果是则进入步骤S520，否则数据不可纠错。
本实施例中，先判断运算结果的比特位是否存在预设数目的1，其中预设数目会根据行校验值和列校验值的bit位数进行调整，为行校验值和列校验值的总bit位数的一半。如行校验值为16bit、列校验值为6bit时，总bit位数为22，则预设数目为11。如果运算结果的比特位存在预设数目的1，则判定为数据可纠 错，进入步骤S520，否则数据不可纠错。
步骤S520，根据所述运算结果确定出错的行地址和列地址。
本实施例中，抽取行极性对应的运算结果的每个字节的奇数bit位的值并按照从低bit位到高bit位的顺序存储，得到的值就是出错数据的行地址。抽取列极性对应的运算结果的字节的Bit7，Bit5，Bit3作为的低三bit位，其余位置0，表示出错数据的列地址。比如对256字节的数据进行ECC校验生成的校验和经过运算后的结果为3字节，保存在s0，s1，s2中，如果s0，s1，s2中共有11个Bit位为1，则表示数据出现了一个比特位的错误，可以纠错。定位出错的比特位的方法是，先确定行地址(即哪个字节出错)，再确定列地址(即该字节中的哪一个Bit位出错)。确定行地址的方法是，抽取s1中的Bit7，Bit5，Bit3，Bit1，作为高四位，抽取s0中的Bit7，Bit5，Bit3，Bit1作为低四位，则高四位、低四位组成的值就表示出错字节的行地址(范围为0～255)。确定列地址的方法是：用一个字节表示列地址，抽取s2中的Bit7，Bit5，Bit3作为低三位，其余位置0，则这个字节的值表示出错比特位的列地址(范围为0～7)。
步骤S530，根据所述行地址和列地址获取出错数据，将所述出错数据进行取反运算得到正确数据。
本实施例中，根据行地址和列地址确定出错数据的位置，获取出错数据，将出错数据进行取反运算得到正确数据。如行地址是10，列地址是5，则代表表2中Byte10，Bit5所在位置的数据出错，将出错数据进行取反运算得到正确数据。
在一个实施例中，如图8所示，提供了一种基于异构混合内存的NVM坏块 识别处理及纠错系统，包括：
检测模块610，用于在自检过程中，检测NVM的块中的每个地址单元中的数据。
判定模块620，用于如果块中任一地址单元中的数据，对读取的数据运算后得到的数据与将运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定块为坏块。
判定模块620还用于如果块中所有地址单元中的数据，对读取的数据运算后得到的数据与将运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定块为好块。
在一个实施例中，如图9所示，检测模块610包括：
第一数据获取单元611，用于将NVM的块的起始地址单元作为当前地址单元，读取当前地址单元的数据，得到第一读取数据，将第一读取数据进行运算，得到第一运算数据。
第二数据获取单元612，用于将第一运算数据写入当前地址单元，读取第一运算数据得到第二读取数据。
处理单元613，用于判断第二读取数据与第一运算数据是否相同，如果不同，则块为坏块；如果相同，则进一步判断当前地址单元是否为NVM的块的结束地址单元，如果是，则块为好块，否则将下一个地址单元作为当前地址单元，返回第一数据获取模块进入读取当前地址单元的数据的步骤。
在另一个实施例中，所述NVM包含数据存储区和备用块区，备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表，在上述实施例的基础上，如图10所示，还包括：
块处理模块630，用于如果所述块为好块，则在状态表和映射表中与所述块对应的位置标记为好块。
所述块处理模块630还用于如果块为坏块，则在状态表中与块对应的位置标记为坏块。
所述块处理模块630还用于如果坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为坏块的替换块，在映射表中与所述坏块对应的位置保存好块的位置信息，在映射表中与好块对应的位置保存坏块的位置信息，如果坏块为备用块区用作替换块的块，还需要在映射表中与坏块对应的位置标记为不可用作替换块。
所述块处理模块630还用于如果坏块为备用块区没有用作替换块的块，则在映射表中与坏块对应的位置标记为不可用作替换块。
在一个实施例中，所述处理单元613还用于将第一运算数据再次写入当前地址单元，再次读取第一运算数据，得到第三读取数据，判断第三读取数据与第一运算数据是否相同，如果不同，则块为坏块，如果相同，则再进入进一步判断所述当前地址单元是否为NVM的块的结束地址单元的步骤。
在一个实施例中，所述处理单元613还用于在判断第二读取数据与第一运算数据是否相同，如果相同之后，将第二读取数据反运算后存入当前地址单元；还用于在判断第三读取数据与第一运算数据是否相同，如果相同之后，将第三读取数据反运算后存入所述当前地址单元。
在一个实施例中，运算和反运算都为对数据进行取反。
在又一个实施例中，备用块区还保存了页面擦写次数记录表，页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，如图11所示，所述系统还 包括：
记录表判定模块640，用于获取页面擦写次数记录表，根据页面擦写次数记录表，判断NVM的块中是否存在超过最大擦写次数的页面，如果是，则判定块为坏块，否则判定块为好块。
在再一个实施例中，如图12所示，所述系统还包括：
纠错模块650，用于执行：
S1：获取数据写入请求；
S2：将数据到NVM内存中，将数据进行ECC校验生成写入校验和；
S3：从数据写入的位置读取数据，将读取出的数据进行ECC校验生成读取校验和；
S4：将写入校验和以及读取校验和进行异或运算，得到运算结果；
S5：如果运算结果为0，则数据正确，否则重复执行预设次数S2-S4，当每次执行完S2-S4得到的运算结果都不为0时，判定数据出错，并根据运算结果进行数据纠错。
在一个实施例中，所述纠错模块650对数据进行ECC校验具体是判断需要进行ECC校验的数据是否满足预设字节，如果不满足则将数据进行拆分和补齐生成预设字节的数据，对预设字节的数据进行行校验和列校验，得到行校验值和列校验值，将行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
在一个实施例中，所述纠错模块650还用于判断运算结果的比特位是否存在预设数目的1，如果是则判定为数据可纠错，否则判定为数据不可纠错，如果数据可纠错，则根据运算结果确定出错的行地址和列地址，根据行地址和列地址获取出错数据，将出错数据进行取反运算得到正确数据。
以上所述实施例仅表达了本发明的几种实施方式，其描述较为具体和详细，但并不能因此而理解为对本发明专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本发明构思的前提下，还可以做出若干变形和改进，这些都属于本发明的保护范围。因此，本发明专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种基于异构混合内存的NVM坏块识别处理及纠错方法，所述方法包括：
    在自检过程中，执行：
    检测NVM的块中的每个地址单元中的数据；
    如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；
    如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据都相同，则判定所述块为好块。
  2. 根据权利要求1所述的方法，其特征在于，所述检测NVM的块中的每个地址单元中的数据的步骤包括：
    将NVM的块的起始地址单元作为当前地址单元，执行：
    读取所述当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据；
    将所述第一运算数据写入所述当前地址单元，读取所述第一运算数据得到第二读取数据；
    判断所述第二读取数据与第一运算数据是否相同，如果不同，则所述块为坏块；如果相同，则进一步判断所述当前地址单元是否为NVM的块的结束地址单元，如果是，则所述块为好块，否则将下一个地址单元作为当前地址单元，返回所述读取所述当前地址单元的数据的步骤。
  3. 根据权利要求1所述的方法，其特征在于，所述NVM包含数据存储区和备用块区；所述备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表；所述方法还包括：
    如果所述块为好块，则在状态表和映射表中与所述块对应的位置标记为好块；
    如果所述块为坏块，则在状态表中与所述块对应的位置标记为坏块；
    如果所述坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为所述坏块的替换块，在映射表中与所述坏块对应的位置保存所述好块的位置信息，在映射表中与所述好块对应的位置保存所述坏块的位置信息；如果所述坏块为备用块区用作替换块的块，还需要在映射表中与所述坏块对应的位置标记为不可用作替换块。
    如果所述坏块为备用块区没有用作替换块的块，则在映射表中与所述坏块对应的位置标记为不可用作替换块。
  4. 根据权利要求2所述的方法，其特征在于，在所述判断第二读取数据与第一运算数据是否相同，如果不同的步骤之后，还包括：
    将第一运算数据再次写入所述当前地址单元，再次读取所述第一运算数据，得到第三读取数据；
    判断所述第三读取数据与第一运算数据是否相同，如果不同，则所述块为坏块，如果相同，则再进入所述进一步判断所述当前地址单元是否为NVM的块的结束地址单元的步骤。
  5. 根据权利要求4所述的方法，其特征在于，在所述判断第二读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将所述第二读取数据反 运算后存入所述当前地址单元；
    在所述判断第三读取数据与第一运算数据是否相同，如果相同的步骤之后还包括：将所述第三读取数据反运算后存入所述当前地址单元。
  6. 根据权利要求5所述的方法，其特征在于，所述运算和反运算都为对数据进行取反。
  7. 根据权利要求1所述的方法，其特征在于，所述备用块区还保存了页面擦写次数记录表，所述页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，所述方法还包括：
    获取所述页面擦写次数记录表；
    根据所述页面擦写次数记录表，判断NVM的块中是否存在超过最大擦写次数的页面，如果是，则判定所述块为坏块，否则判定所述块为好块。
  8. 根据权利要求1所述的方法，其特征在于，所述方法还包括：
    S1：获取数据写入请求；
    S2：将数据写入到NVM内存中，将所述数据进行ECC校验生成写入校验和；
    S3：从所述数据写入的位置读取所述数据，将读取出的数据进行ECC校验生成读取校验和；
    S4：将所述写入校验和以及读取校验和进行异或运算，得到运算结果；
    S5：如果运算结果为0，则所述数据正确，否则
    重复执行预设次数步骤S2-S4，当每次执行完步骤S2-S4得到的运算结果都不为0时，判定所述数据出错，并根据所述运算结果进行数据纠错。
  9. 根据权利要求8所述的方法，其特征在于，所述将所述数据进行ECC 校验生成写入校验和以及将读取出的数据进行ECC校验生成读取校验和中对数据进行ECC校验的步骤包括：
    判断需要进行ECC校验的数据是否满足预设字节；
    如果不满足则将所述数据进行拆分和补齐生成预设字节的数据；
    对所述预设字节的数据进行行校验和列校验，得到行校验值和列校验值；
    将所述行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
  10. 根据权利要求8所述的方法，其特征在于，所述根据所述运算结果进行数据纠错的步骤包括：
    判断所述运算结果的比特位是否存在预设数目的1，如果是则判定为数据可纠错，否则判定为数据不可纠错；
    如果数据可纠错，则根据所述运算结果确定出错的行地址和列地址；
    根据所述行地址和列地址获取出错数据，将所述出错数据进行取反运算得到正确数据。
  11. 一种基于异构混合内存的NVM坏块识别处理及纠错系统，其特征在于，所述系统包括：
    检测模块，用于在自检过程中，检测NVM的块中的每个地址单元中的数据；
    判定模块，用于如果块中任一地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的数据不相同，则判定所述块为坏块；
    所述判定模块还用于如果块中所有地址单元中的数据，对读取的所述数据运算后得到的数据与将所述运算后得到的数据写入地址单元后再次读取得到的 数据都相同，则判定所述块为好块。
  12. 根据权利要求11所述的系统，其特征在于，所述检测模块包括：
    第一数据获取单元，用于将NVM的块的起始地址单元作为当前地址单元，读取所述当前地址单元的数据，得到第一读取数据，将所述第一读取数据进行运算，得到第一运算数据；
    第二数据获取单元，用于将所述第一运算数据写入所述当前地址单元，读取所述第一运算数据得到第二读取数据；
    处理单元，用于判断所述第二读取数据与第一运算数据是否相同，如果不同，则所述块为坏块；如果相同，则进一步判断所述当前地址单元是否为NVM的块的结束地址单元，如果是，则所述块为好块，否则将下一个地址单元作为当前地址单元，返回第一数据获取模块进入读取所述当前地址单元的数据的步骤。
  13. 根据权利要求11所述的系统，其特征在于，所述NVM包含数据存储区和备用块区，所述备用块区中保存了用于记录NVM的块状态的状态表和用于记录坏块和好块的替换关系的映射表，所述系统还包括：
    块处理模块，用于如果所述块为好块，则在状态表和映射表中与所述块对应的位置标记为好块；
    所述块处理模块还用于如果所述块为坏块，则在状态表中与所述块对应的位置标记为坏块；
    所述块处理模块还用于如果所述坏块为数据存储区或备用块区用作替换块的块，则获取备用块区的好块，将所述备用块区的好块作为所述坏块的替换块，在映射表中与所述坏块对应的位置保存所述好块的位置信息，在映射表中与所 述好块对应的位置保存所述坏块的位置信息，如果所述坏块为备用块区用作替换块的块，还需要在映射表中与所述坏块对应的位置标记为不可用作替换块；
    所述块处理模块还用于如果所述坏块为备用块区没有用作替换块的块，则在映射表中与所述坏块对应的位置标记为不可用作替换块。
  14. 根据权利要求12所述的系统，其特征在于，所述处理单元还用于将第一运算数据再次写入所述当前地址单元，再次读取所述第一运算数据，得到第三读取数据，判断所述第三读取数据与第一运算数据是否相同，如果不同，则所述块为坏块，如果相同，则再进入所述进一步判断所述当前地址单元是否为NVM的块的结束地址单元的步骤。
  15. 根据权利要求14所述的系统，其特征在于，所述处理单元还用于在判断第二读取数据与第一运算数据是否相同，如果相同之后，将所述第二读取数据反运算后存入所述当前地址单元；还用于在判断第三读取数据与第一运算数据是否相同，如果相同之后，将所述第三读取数据反运算后存入所述当前地址单元。
  16. 根据权利要求15所述的系统，其特征在于，所述运算和反运算都为对数据进行取反。
  17. 根据权利要求11所述的系统，其特征在于，所述备用块区还保存了页面擦写次数记录表，所述页面擦写次数记录表中保存了页面的序号和所对应的擦写次数，所述系统还包括：
    记录表判定模块，用于获取所述页面擦写次数记录表，根据所述页面擦写次数记录表，判断NVM的块中是否存在超过最大擦写次数的页面，如果是，则判定所述块为坏块，否则判定所述块为好块。
  18. 根据权利要求11所述的系统，其特征在于，所述系统还包括：
    纠错模块，用于执行：
    S1：获取数据写入请求；
    S2：将数据到NVM内存中，将所述数据进行ECC校验生成写入校验和；
    S3：从所述数据写入的位置读取所述数据，将读取出的数据进行ECC校验生成读取校验和；
    S4：将所述写入校验和以及读取校验和进行异或运算，得到运算结果；
    S5：如果运算结果为0，则所述数据正确，否则重复执行预设次数S2-S4，当每次执行完S2-S4得到的运算结果都不为0时，判定所述数据出错，并根据所述运算结果进行数据纠错。
  19. 根据权利要求18所述的系统，其特征在于，所述纠错模块对数据进行ECC校验具体是判断需要进行ECC校验的数据是否满足预设字节，如果不满足则将所述数据进行拆分和补齐生成预设字节的数据，对所述预设字节的数据进行行校验和列校验，得到行校验值和列校验值，将所述行校验值和列校验值顺序存储并补齐生成预设字节的校验和。
  20. 根据权利要求19所述的系统，其特征在于，所述纠错模块还用于判断所述运算结果的比特位是否存在预设数目的1，如果是则判定为数据可纠错，否则判定为数据不可纠错，如果数据可纠错，则根据所述运算结果确定出错的行地址和列地址，根据所述行地址和列地址获取出错数据，将所述出错数据进行取反运算得到正确数据。
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