WO2017076366A1 - 五电平逆变器拓扑电路及三相五电平逆变器拓扑电路 - Google Patents

五电平逆变器拓扑电路及三相五电平逆变器拓扑电路 Download PDF

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Publication number
WO2017076366A1
WO2017076366A1 PCT/CN2016/104937 CN2016104937W WO2017076366A1 WO 2017076366 A1 WO2017076366 A1 WO 2017076366A1 CN 2016104937 W CN2016104937 W CN 2016104937W WO 2017076366 A1 WO2017076366 A1 WO 2017076366A1
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Prior art keywords
circuit
bidirectional switch
diode
circuit module
phase
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PCT/CN2016/104937
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English (en)
French (fr)
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WO2017076366A8 (zh
Inventor
汪洪亮
Original Assignee
汪洪亮
刘雁飞
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Priority to CN201680064411.4A priority Critical patent/CN108702104B/zh
Priority to US15/767,721 priority patent/US10250159B2/en
Publication of WO2017076366A1 publication Critical patent/WO2017076366A1/zh
Publication of WO2017076366A8 publication Critical patent/WO2017076366A8/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4837—Flying capacitor converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0095—Hybrid converter topologies, e.g. NPC mixed with flying capacitor, thyristor converter mixed with MMC or charge pump mixed with buck
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/4833—Capacitor voltage balancing
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/56—Power conversion systems, e.g. maximum power point trackers

Definitions

  • the invention relates to a power converter topology circuit in the field of power electronics, in particular to a five-level inverter topology circuit and a three-phase five-level inverter topology circuit.
  • Photovoltaic power generation has a good development prospect because of its abundant resources and wide distribution. For photovoltaic power generation systems, how to reduce costs and improve efficiency has become an important issue for photovoltaic power generation.
  • photovoltaic arrays generate direct current.
  • an inverter is used to convert direct current output from a photovoltaic array into alternating current.
  • the common mode loop generates high frequency leakage current, causing electromagnetic interference and endangering equipment and personal safety. Therefore, high-frequency leakage current is an important issue that needs to be solved by non-isolated inverter systems.
  • the existing disclosed inverter topology circuits are classified into two types.
  • the first type is a symmetric topology circuit with dual AC inductors, such as a full-bridge inverter topology circuit. Since the input voltage required for a full-bridge inverter topology circuit is half that of a half-bridge inverter topology, in many cases, no additional boost circuit boost is required. However, due to the existence of parasitic parameters, full-bridge inverters are difficult to completely eliminate high-frequency leakage current. By properly improving the traditional H4 full-bridge circuit, high-frequency leakage current can be reduced and meet industry standards. However, it is a symmetric dual-inductor mode, and the two inductor cores cannot be shared, which increases the cost.
  • the second type is a single-inductor asymmetric topology circuit, such as a half-bridge inverter topology circuit or a midpoint clamp inverter topology circuit.
  • This type of topology circuit clamps the end of the AC grid or AC load directly to the midpoint of the DC bus voltage, which ensures that the voltage across the parasitic capacitance of the PV panel is constant, thus solving the leakage current well. Due to its voltage The utilization rate is half of the first class, so an extra boost circuit is required, resulting in reduced efficiency and increased cost.
  • Three-phase inverter systems typically employ a three-level half-bridge inverter topology circuit. However, (1) the voltage utilization rate is low; (2) the AC filter has high inductance; (3) an additional circuit is required to increase the input voltage, so the cost is high.
  • the present invention provides a five-level inverter topology circuit to solve at least some of the above problems in the prior art.
  • bidirectional switch refers to a switch that can flow in both directions but can only withstand unidirectional voltage, such as an IGBT with an anti-parallel diode, or a MOSFET with a parallel diode.
  • the five-level inverter topology circuit provided by the invention is suitable for use with two DC power sources connected in series.
  • the five-level inverter topology circuit includes at least: a half bridge inverter circuit.
  • the half bridge inverter circuit outputs five mutually different levels, including a zero level.
  • the half bridge inverter circuit includes at least one floating capacitor. The floating capacitor is charged by the first DC power source or the second DC power source.
  • the two DC power sources are implemented by one power source connected in parallel to two capacitors connected in series. Among them, each capacitor acts as a DC power source.
  • the present invention provides a single-phase five-level inverter topology circuit suitable for use with two DC power supplies connected in series, characterized by comprising: a half bridge inverter circuit;
  • the half bridge inverter circuit includes a first circuit module and a second circuit module.
  • the first end of the first circuit module is connected to the common end of the two DC power sources, the second end is connected to the third input end of the second circuit module, and the third end is connected to the fourth input end of the second circuit module;
  • the control terminal is adapted to provide at least three working modes under the control of the control signal accessed by the control terminal: mode one: for the three terminals, only the first end and the second end are connected; For the three terminals, only the first end and the third end are connected; Modal three: Disconnect the connection between any two of the three terminals.
  • the second circuit module includes a current limiting device, a floating capacitor and a topology control portion; a first input end of the second circuit module is adapted to be connected to a positive pole of the first DC power source, and a second input end is adapted to be connected to the second DC link a negative end of the power supply; the output end is connected to the load end of the half-bridge inverter circuit; the topology control part of the second circuit module is connected to a plurality of control ends, and is adapted to provide at least control under the control signal of the control end access Five working modes: for four inputs and one output;
  • Modal one connecting the current limiting device and the floating capacitor in series and connecting between the first input end and the output end, disconnecting the connection between the other end and the end;
  • Modal 2 connecting the current limiting device to the first input end Between the output terminal and the output terminal, the floating capacitor is connected between the fourth input end and the output end, and the connection between the other end and the end is disconnected;
  • the third mode the current limiting device and the floating capacitor are connected in series and connected to the first input end and the output.
  • the first circuit module includes two circuit branches; the first circuit branch is connected between the first end and the second end; and the second circuit branch is connected between the first end and the third end
  • Each circuit branch is also corresponding to the connection control signal end, and is adapted to be turned off under the shutdown control signal of the control signal terminal, and turned on under the conduction signal of the control signal terminal.
  • the current limiting device in the second circuit module has many implementation forms, such as one or a combination of the following: an inductor; a resistor; a semiconductor device operating in an active mode or a linear mode.
  • the current limiting device is configured to suppress an inrush current when the floating capacitor is charged. That is to say, the current limiting device forms part of a floating capacitor charging circuit.
  • the floating capacitor is charged by the first DC power source or the second DC power source.
  • the first current power source or the second DC power source supplies power to the load of the half bridge inverter circuit, or Any one of the two current sources is superimposed with the floating capacitor algebra to power the load of the half-bridge inverter circuit such that the second circuit module outputs five mutually different levels, including a zero level.
  • the second circuit module in the half bridge inverter circuit comprises six switching circuit branches, a current limiting device and a floating capacitor.
  • a first end of the first circuit circuit branch is connected to the first input end of the second circuit module, and a second end of the first switch circuit branch is connected to the first end of the second switch circuit branch;
  • a second end of the second switching circuit branch is connected to the second input end of the second circuit module
  • the first end of the third switching circuit branch is simultaneously connected to the third input end of the second circuit module and the positive pole of the floating capacitor, and the second end of the third switching circuit branch is connected to the fourth switching circuit branch One end
  • the second end of the fourth switching circuit branch is simultaneously connected to the fourth input end of the second circuit module and the negative pole of the floating capacitor; the common end of the third switching circuit branch and the fourth switching circuit branch pass current limiting The device is connected to the common end of the first switch circuit branch and the second switch circuit branch;
  • a first end of the fifth switching circuit branch is connected to the positive pole of the floating capacitor, a second end of the fifth switching circuit branch is connected to the first end of the sixth switching circuit branch; and a second end of the sixth switching circuit branch Connecting a negative pole of the floating capacitor; a common end of the fifth switch circuit branch and the sixth switch circuit branch is connected to an output end of the second circuit module.
  • the common end of the third switch circuit branch and the fourth switch circuit branch are connected to the common end of the first switch circuit branch and the second switch circuit branch through a current limiting inductor.
  • the half bridge inverter circuit also includes a filter inductor.
  • the output end of the half-bridge inverter circuit is connected to the load end of the half-bridge inverter circuit, specifically that the output end of the half-bridge inverter circuit is connected to the half-bridge inverter through the filter inductor The load side of the circuit.
  • the filter inductor is used to filter harmonics of the switching frequency to obtain an almost sinusoidal load current.
  • each of the switch circuit branches in the second circuit module includes at least one bidirectional switch.
  • the first end of each of the bidirectional switches is connected to a first end of a branch of the switch circuit where the bidirectional switch is located, and the second end of each of the bidirectional switches is connected to a second end of the branch of the switch circuit where the bidirectional switch is located
  • circuit branch between the first end and the second end of the first circuit module and the circuit branch between the first end and the third end each include at least one bidirectional switch.
  • the first circuit module in the half bridge inverter circuit includes a first bidirectional switch, a first diode, a second diode, a third diode, and a fourth diode.
  • the first diode is connected to the first end of the first circuit module, and the first diode is connected to the first end of the first bidirectional switch.
  • the third diode negative electrode is connected to the first diode negative electrode, and the third diode positive electrode is connected to the third end of the first circuit module.
  • the second diode negative electrode is connected to the first diode positive electrode, and the second diode positive electrode is simultaneously connected to the second end of the first bidirectional switch and the fourth diode positive electrode.
  • the fourth diode negative electrode is connected to the second end of the first circuit module.
  • the first circuit module in the half bridge inverter circuit comprises a first bidirectional switch, a second bidirectional switch, a first diode and a second diode.
  • the anode of the first diode is connected to the cathode of the second diode, and the cathode of the first diode is connected to the first end of the first bidirectional switch.
  • the second end of the first bidirectional switch is connected to the second end of the first circuit module.
  • the anode of the second diode is connected to the second end of the second bidirectional switch, and the first end of the second bidirectional switch is connected to the third end of the first circuit module.
  • a common end of the first diode and the second diode is coupled to the first end of the first circuit module.
  • the first circuit module in the half bridge inverter circuit comprises a first bidirectional switch, a second bidirectional switch and eight diodes.
  • the cathode of the first diode is connected to the first end of the first bidirectional switch, and the anode of the first diode is connected to the cathode of the second diode.
  • the anode of the second diode is coupled to the second end of the first bidirectional switch.
  • a common end of the first diode and the second diode is coupled to the first end of the first circuit module.
  • the anode of the third diode is connected to the cathode of the fourth diode, and the cathode of the third diode Connecting the first end of the first bidirectional switch.
  • the anode of the fourth diode is connected to the second end of the first bidirectional switch.
  • the common end of the third diode and the fourth diode is connected to the second end of the first circuit module.
  • the anode of the fifth diode is connected to the cathode of the sixth diode, and the cathode of the fifth diode is connected to the first end of the second bidirectional switch.
  • the anode of the sixth diode is connected to the second end of the second bidirectional switch.
  • a common end of the fifth diode and the sixth diode is connected to the first end of the first circuit module.
  • the anode of the seventh diode is connected to the cathode of the eighth diode, and the cathode of the seventh diode is connected to the first end of the second bidirectional switch.
  • the anode of the eighth diode is connected to the second end of the second bidirectional switch.
  • the common end of the seventh diode and the eighth diode is connected to the third end of the first circuit module.
  • the second circuit module in the half bridge inverter circuit is replaced with another second circuit module;
  • the other second circuit module includes a floating capacitor, a first current limiting inductor, and a second current limiting inductor.
  • eight bidirectional switches
  • the first end of the first bidirectional switch is connected to the positive pole of the first DC power source, and the second end of the first bidirectional switch is simultaneously connected to the third end of the first circuit module and the first end of the second current limiting inductor; the second bidirectional switch The first end of the first circuit module is connected to the first end of the first current limiting inductor, the second end of the second bidirectional switch is connected to the negative end of the second DC power supply, and the second end of the third bidirectional switch is connected.
  • the first end of the third bidirectional switch is connected to the first end of the fifth bidirectional switch; the second end of the fifth bidirectional switch is simultaneously connected to the second end of the first current limiting inductor and the positive suspension capacitor
  • the first end of the sixth bidirectional switch is simultaneously connected to the second end of the second current limiting inductor and the negative terminal of the floating capacitor, and the second end of the sixth bidirectional switch is connected to the second end of the fourth bidirectional switch, and the first end of the fourth bidirectional switch
  • the second end of the second bidirectional switch is connected to the second end; the first end of the seventh bidirectional switch is connected to the positive pole of the floating capacitor, the second end of the seventh bidirectional switch is connected to the first end of the eighth bidirectional switch; the second end of the eighth bidirectional switch Connecting the negative electrode of the floating capacitor;
  • the first circuit module in the half bridge inverter circuit includes the first pair The switch, the second bidirectional switch, the third bidirectional switch, and the fourth bidirectional switch.
  • the second end of the first bidirectional switch is connected to the first end of the second bidirectional switch, and the first end of the first bidirectional switch is connected to the first end of the third bidirectional switch.
  • the second end of the third bidirectional switch is connected to the second end of the first circuit module.
  • the common end of the first bidirectional switch and the second bidirectional switch is connected to the first end of the first circuit module.
  • the second end of the second bidirectional switch is connected to the second end of the fourth bidirectional switch, and the first end of the fourth bidirectional switch is connected to the third end of the first circuit module.
  • the single-phase five-level inverter topology circuit further includes two DC power supplies connected in series; the load end of the half-bridge inverter circuit connects the common ends of the two DC power sources through a load.
  • the present invention provides a three-phase five-level inverter topology circuit comprising three single-phase five-level inverter topology circuits provided by the first aspect.
  • the input sides of the three single-phase five-level inverter topologies are connected in parallel, and the AC outputs of the three single-phase five-level inverter topologies are used for one-to-one connection to a three-phase AC grid or Three AC voltage outputs of a three-phase AC load.
  • the single-phase five-level inverter topology circuit provided by the present invention includes a half-bridge inverter circuit.
  • the half-bridge inverter circuit contains a floating capacitor and outputs five different levels, including a zero level.
  • the single-phase five-level inverter topology circuit adopts a five-level half-bridge structure, and only needs one AC filter inductor, thereby reducing system cost and volume, completely eliminating leakage current, and high efficiency.
  • the invention also discloses a three-phase five-level inverter topology circuit. Under the same operating conditions, the five-level inverter topology circuit provided by the invention adopts a floating capacitor, and the voltage utilization ratio is twice that of the existing half-bridge five-level inverter topology circuit, and no additional circuit is needed. The DC side midpoint voltage can be automatically balanced.
  • the AC filter inductance is less than the AC filter inductance of the three-level half-bridge inverter.
  • the present invention provides a five level inverter topology circuit that can be used, but is not limited to, a renewable energy system, such as a single phase or three phase photovoltaic system.
  • FIG. 1 is a partial block diagram showing a circuit principle of a single-phase five-level inverter topology circuit according to an embodiment of the present invention
  • FIG. 2(a) is a partial block diagram showing the circuit principle of a single-phase five-level inverter topology circuit including a second circuit module M2 according to an embodiment of the present invention
  • 2(b) is a partial block diagram showing the circuit principle of a single-phase five-level inverter topology circuit including another second circuit module M2 according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of a first circuit principle of a first circuit module M1 in a single-phase five-level inverter topology circuit according to an embodiment of the present invention
  • FIG. 4 is a schematic diagram of a second circuit principle of a first circuit module M1 in a single-phase five-level inverter topology circuit according to an embodiment of the present invention
  • FIG. 5 is a schematic diagram of a third circuit principle of a first circuit module M1 in a single-phase five-level inverter topology circuit according to an embodiment of the present disclosure
  • FIG. 6 is a schematic diagram of a fourth circuit principle of a first circuit module M1 in a single-phase five-level inverter topology circuit according to an embodiment of the present invention
  • FIG. 7 is a schematic diagram of a circuit principle of a single-phase five-level inverter topology circuit including the first circuit module M1 shown in FIG. 3 according to an embodiment of the present disclosure
  • FIG. 8 is a schematic diagram of a first working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of a second working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention.
  • FIG. 10 is a schematic diagram of a third working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention.
  • FIG. 11 is a schematic diagram of a fourth working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention.
  • FIG. 12 is a schematic diagram of a fifth working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention
  • FIG. 13 is a schematic diagram of a sixth working mode of the single-phase five-level inverter topology circuit shown in FIG. 7 according to an embodiment of the present invention.
  • FIG. 14(a) is an equivalent block diagram of a single-phase five-level inverter topology circuit according to an embodiment of the present invention.
  • FIG. 14(b) is a partial block diagram showing the circuit principle of a three-phase five-level inverter topology circuit based on the equivalent circuit shown in FIG. 14(a) according to an embodiment of the present invention.
  • the present invention provides a five-level inverter topology circuit.
  • the technical solutions in the embodiments of the present invention are clearly and completely described in the following with reference to the drawings in the embodiments of the present invention. It is apparent that the described embodiments are only a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts shall fall within the scope of the present invention.
  • V dc used in the embodiment of the present invention denotes a DC power supply voltage
  • M1 and M2 respectively denote a first circuit module and a second circuit module in a half bridge inverter circuit
  • C 1 denotes The first capacitor of the first DC power source
  • C 2 represents a second capacitor serving as a second DC power source
  • C s represents a floating capacitor
  • the ratio of the peak-to-peak value of the inverter AC output voltage to the minimum DC input voltage is defined as the voltage utilization rate.
  • the minimum DC input voltage is equal to the DC power supply voltage V dc .
  • the diode is used to represent a unidirectional conduction element, but the one-directional conduction element in the present invention is not limited to the diode.
  • the anode of the diode refers to the anode and the cathode refers to the cathode.
  • the unidirectional conduction element in the present invention may also be a unidirectional conduction device other than a diode.
  • a switching MOSFET is used as a controllable (on and off) switching transistor in the present invention, but the controllable element in the present invention is not limited to the MOSFET.
  • An N-channel MOSFET will be described as an example. The first end of the N-channel MOSFET is the drain, the second end is the source, and the control is the gate. A control signal is applied to the control terminal of each of the controllable elements of the present invention. For the sake of brevity, we will not repeat them later.
  • the controllable elements of the present invention can also be implemented with other controllable switching transistor devices other than MOSFETs, such as IGBTs.
  • bidirectional switch refers to a semiconductor switch that can flow in both directions but can only withstand unidirectional voltage, such as an IGBT with an anti-parallel diode, or a MOSFET with a parallel diode.
  • the term “common” refers to the junction of the first component and the second component.
  • the five-level inverter topology circuit provided by the embodiment of the present invention can be used together with two DC power sources connected in series to solve the above technical problem.
  • the five-level inverter topology circuit includes at least one half-bridge inverter circuit.
  • the half bridge inverter circuit is capable of outputting five mutually different levels, including a zero level.
  • the half bridge inverter circuit includes a first circuit module and a second circuit module, wherein the second circuit module includes at least one floating capacitor.
  • the first circuit module includes at least two circuit branches connected between any one of the two DC power sources and the second circuit module, and the two circuit branches are extended to be connected to the suspension inside the second circuit module capacitance.
  • the floating capacitor is charged by the first DC power source or the second DC power source.
  • the load of the half-bridge inverter circuit is powered by the first DC power source or the second DC power source, or the load of the half-bridge inverter circuit is superposed by the first DC power source and the floating capacitor algebra or the second DC The power supply is superimposed with the floating capacitor algebra.
  • Figure 1 shows a block diagram of the circuit principle of a single-phase five-level inverter topology circuit.
  • the single-phase five-level inverter topology circuit is connected to two capacitors connected in series (the first capacitor C 1 and the second capacitor C 2 ).
  • the first capacitor C 1 serves as a first DC power source
  • the second capacitor C 2 serves as a second DC power source.
  • the single phase five level inverter topology circuit includes a half bridge inverter circuit.
  • the half bridge inverter circuit outputs five mutually different levels, including a zero level.
  • the half bridge inverter circuit includes a first circuit module M1 and a second circuit module M2.
  • the first circuit module M1 includes a first end I 1 , a second end I 2 , and a third end I 3 , and is mainly designed to provide at least three working modes: a first mode is to use the first end I 1 and the second end I 2 is connected, and disconnects the third end I 3 from the first end I 1 , and disconnects the third end I 3 from the second end I 2 ; the second mode is the first end I 1 and the third The terminal I 3 is connected, and disconnects the second end I 2 from the first end I 1 , and disconnects the second end I 2 from the third end I 3 ; Modal 3: disconnects any of the three terminals The connection between the two terminals.
  • At least two circuit branches may be included, one of the circuit branches being located between the first end I 1 and the second end I 2 , and the other circuit branch being located at the first end I 1 and the third end I 3 between.
  • the first terminal I 1 is connected to the common terminal U x of the first capacitor C 1 and the second capacitor C 2 .
  • the second circuit module M2 includes four input terminals I in-1 to I in-4 , an output terminal I out and a floating capacitor C s , and a current limiting inductor L s . In addition to this, there is at least one circuit branch between each input and output Iout of the topology control section.
  • the second circuit module M2 receives an input signal between any two different input terminals, and outputs five mutually different levels, including a zero level, through the output terminal Iout .
  • the second circuit module M2 which is designed as a second circuit module, provides five different working modes, specifically including:
  • Mode 1 Connect the current limiting device and the floating capacitor in series and connect to the first input and output Between the ends, disconnect the other end and the end;
  • modal 2 connect the current limiting device between the first input end and the output end, and connect the floating capacitor between the fourth input end and the output end, Disconnect the other end and the end;
  • modal three connect the current limiting device and the floating capacitor in series, connect the first input end and the output end, and open the connection between the fourth input end and the output end, disconnect the other End-to-end connection; or connecting the current limiting device and the floating capacitor in series, connecting between the second input end and the output end, and connecting the connection between the third input end and the output end, disconnecting the other end from the end;
  • State 4 connecting the current limiting device between the second input end and the output end, connecting the floating capacitor between the third input end and the output end, disconnecting the other end from the end;
  • Modal 5 the current limiting device Connected in series with the floating capacitor and connected between the second input and the output, disconnecting the
  • the first circuit module M1 is connected to a second end of the third input I 2 of the second circuit module M2 terminal I in-3, I 3 connected to a first terminal of the third circuit module M1 of the second circuit module M2
  • the fourth input I in-4 .
  • the first input terminal I in-1 of the second circuit module M2 is connected to the anode of the first capacitor C 1
  • the second input terminal I in-2 is connected to the cathode of the second capacitor C 2 .
  • Output of the second circuit module M2 is connected to the AC terminal I out a first end of the filter inductance of L 1, L 1, a second end connected to the filter inductor AC or AC grid to a first end of the AC load.
  • the common terminal U x of the first capacitor C 1 and the second capacitor C 2 is connected to the second end of the AC grid or the AC load.
  • the current limiting inductor L s is a current limiting device.
  • Other current limiting devices may also be used herein, such as one or a combination of the following: an inductor; a resistor; a semiconductor device operating in an active mode or a linear mode.
  • the current limiting inductor L s and the AC filter inductor L 1 act together to filter out the harmonics of the switching frequency, thereby obtaining an almost sinusoidal load current.
  • the inductive reactance of the current limiting inductor L s is small. More precisely, the inductive reactance of the current limiting inductor L s only needs one percent of the inductive reactance of the AC filter inductor L 1 . Therefore, the voltage of the current limiting inductor L s is very small and can even be ignored.
  • the current limiting device is for suppressing an inrush current when the floating capacitor C s is charged. That is to say, the current limiting device forms part of the charging circuit of the floating capacitor C s .
  • the basic function of the first circuit block is M1 (1) to the suspension of the capacitor C s to provide a charging path, the suspension voltage capacitor C s is equal to or very close to the first capacitor C 1 (the second capacitor C 2) Voltage; ( 2) When the floating capacitor C s is charged, the inrush current is suppressed.
  • a circuit branch between the first end I 1 and the second end I 2 of the first circuit module M1 or a circuit branch between the first end I 1 and the third end I 3 constitutes a first capacitor C 1 (ie, the first DC power source) or a partial charging path between the second capacitor C 2 (ie, the second DC power source) to the floating capacitor C s .
  • FIG. 2(a) shows a schematic diagram of a circuit principle of the second circuit module M2.
  • the second circuit module M2 includes a floating capacitor C s , six switching circuit branches and a current limiting inductor L s .
  • Each switching circuit branch includes at least one bidirectional switch.
  • the subscript symbol of each of the bidirectional switches is the same as the sequence number of the switching circuit branch where the bidirectional switch is located.
  • the bidirectional switch in the branch of the first switching circuit is T 1 .
  • the first end of the first bidirectional switch T 1 is connected to the first end of the first capacitor C 1
  • the second end of the first bidirectional switch T 1 is connected to the first end of the second bidirectional switch T 2
  • the second end of the second bidirectional switch T 2 is connected to the second capacitor C 2 negative electrode.
  • the first end of the third bidirectional switch T 3 is simultaneously connected to the second end I 2 of the first circuit module M1 and the positive pole of the floating capacitor C s
  • the second end of the third bidirectional switch T 3 is connected to the fourth bidirectional switch The first end of T 4 .
  • the second end of the fourth bidirectional switch T 4 is simultaneously connected to the third end I 3 of the first circuit module M1 and the negative pole of the floating capacitor C s .
  • the common ends of the third and fourth bidirectional switches are connected to the common ends of the first and second bidirectional switches through the current limiting inductor L s .
  • the first end of the fifth bidirectional switch T 5 is connected to the anode of the floating capacitor C s
  • the second end of the fifth bidirectional switch T 5 is connected to the first end of the sixth bidirectional switch T 6
  • the second end of the sixth bidirectional switch T 6 is connected to the negative terminal of the floating capacitor C s .
  • the fifth, sixth common terminal L 1 of the bidirectional switch connected to a first end of the AC mains or AC load via an AC filter inductor.
  • the common end of the first capacitor C 1 and the second capacitor C 2 is connected to the second end of the AC grid or the AC load.
  • the current limiting inductor L s in Figure 2(a) can be replaced by two current limiting inductors.
  • the first current limiting inductor operates in the positive half cycle of the grid voltage and the second current limiting inductor does not operate.
  • the second current limiting inductor operates in the negative half cycle of the grid voltage and the first current limiting inductor does not operate.
  • Figure 2 (b) shows the circuit connection diagram of the two current limiting inductors, but the circuit connection of the two current limiting inductors is not limited to the connection mode shown in Figure 2 (b).
  • FIG. 2(b) shows another schematic diagram of the circuit principle of the second circuit module M2.
  • the second circuit module M2 includes a floating capacitor C s , eight bidirectional switches T 1 -T 8 and two current limiting inductors L s1 , L s2 .
  • the first end of the first bidirectional switch T 1 is connected to the positive pole of the first capacitor C 1 , and the second end of the first bidirectional switch T 1 is connected to the third end I 3 of the first circuit module M1 and the second current limiting inductor L s2 first end.
  • the first end of the second bidirectional switch T 2 is connected to the second end I 2 of the first circuit module M1 and the first end of the first current limiting inductor L s1 .
  • the second end of the second bidirectional switch T 2 is connected to the second capacitor C 2 negative electrode.
  • the first end of the third bidirectional switch T 3 is connected to the first end of the fifth bidirectional switch T 5 , and the second end of the third bidirectional switch T 3 is connected to the first end of the first bidirectional switch T 1 .
  • the second end of the fifth bidirectional switch T 5 is simultaneously connected to the second end of the first current limiting inductor L s1 and the positive terminal of the floating capacitor C s .
  • the first end of the sixth bidirectional switch T 6 is simultaneously connected to the second end of the second current limiting inductor L s2 and the negative terminal of the floating capacitor C s .
  • T sixth bidirectional switch 6 is connected to a second end of the second end of the fourth bidirectional switch T 4
  • T fourth bidirectional switch 4 is connected to a first terminal of a second end of the second bidirectional switch T 2.
  • the first end of the seventh bidirectional switch T 7 is connected to the positive pole of the floating capacitor C s
  • the second end of the seventh bidirectional switch T 7 is connected to the first end of the eighth bidirectional switch T 8
  • the second end of the eighth bidirectional switch T 8 is connected to the negative terminal of the floating capacitor C s .
  • the seventh, eighth common terminal L 1 of the bidirectional switch connected to a first end of the AC mains or AC load via an AC filter inductor.
  • the common end of the first capacitor C 1 and the second capacitor C 2 is connected to the second end of the AC grid or the AC load.
  • FIG. 3 is a schematic diagram showing the first circuit principle of the first circuit module M1 in the single-phase five-level inverter topology circuit according to the embodiment of the present invention.
  • the first circuit module M1 further includes a first bidirectional switch T 31 , a first diode D 31 , a second diode D 32 , a third diode D 33 , and a fourth diode D 34 .
  • the first diode D 31 is positively connected to the first end I 1 of the first circuit module M1 , and the first diode D 31 is connected to the first end of the first bidirectional switch T 31 .
  • the third diode D 33 is connected to the anode of the first diode D 31 , and the third diode D 33 is connected to the third terminal I 3 of the first circuit module M1 .
  • the second diode D 32 is connected to the anode of the first diode D 31 , and the second diode D 32 is connected to the second end of the first bidirectional switch T 31 .
  • the positive electrode of the fourth diode D 34 is connected to the positive electrode of the second diode D 32 .
  • the fourth diode D 34 is connected to the second terminal I 2 of the first circuit module M1.
  • FIG. 4 is a schematic diagram showing a second circuit principle of the first circuit module M1 in the single-phase five-level inverter topology circuit according to the embodiment of the present invention.
  • the first circuit module M1 further includes a first bidirectional switch T 41 , a second bidirectional switch T 42 , a first diode D 41 and a second diode D 42 .
  • the anode of the first diode D 41 is connected to the cathode of the second diode D 42 , and the cathode of the first diode D 41 is connected to the first terminal of the first bidirectional switch T 41 .
  • the second end of the first bidirectional switch T 41 is connected to the second end I 2 of the first circuit module M1.
  • the third terminal I 3 of the second diode D connected to the positive second bidirectional switch 42 of the second end 42 of T, T a second bidirectional switch connecting a first terminal of the first circuit 42 of the module Ml.
  • the common end of the first and second diodes is connected to the first end I 1 of the first circuit module M1.
  • FIG. 5 is a schematic diagram showing a third circuit principle of the first circuit module M1 in the single-phase five-level inverter topology circuit according to the embodiment of the present invention.
  • the first circuit module M1 further includes a first bidirectional switch T 51 , a second bidirectional switch T 52 , and eight diodes D 51 DD D 58 .
  • the cathode of the first diode D 51 is connected to the first terminal of the first bidirectional switch T 51 , and the anode of the first diode D 51 is connected to the cathode of the second diode D 52 .
  • the anode of the second diode D 52 is connected to the second end of the first bidirectional switch T 51 .
  • the common end of the first and second diodes is connected to the first end I 1 of the first circuit module M1.
  • the anode of the third diode D 53 is connected to the cathode of the fourth diode D 54 , and the cathode of the third diode D 53 is connected to the first terminal of the first bidirectional switch T 51 .
  • the anode of the fourth diode D 54 is connected to the second end of the first bidirectional switch T 51 .
  • the common end of the third and fourth diodes is connected to the second end I 2 of the first circuit module M1.
  • the anode of the fifth diode D 55 is connected to the cathode of the sixth diode D 56 , and the cathode of the fifth diode D 55 is connected to the first terminal of the second bidirectional switch T 52 .
  • the anode of the sixth diode D 56 is connected to the second end of the second bidirectional switch T 52 .
  • the common end of the fifth and sixth diodes is connected to the first end I 1 of the first circuit module M1.
  • the anode of the seventh diode D 57 is connected to the cathode of the eighth diode D 58 , and the cathode of the seventh diode D 57 is connected to the first terminal of the second bidirectional switch T 52 .
  • the anode of the eighth diode D 58 is connected to the second end of the second bidirectional switch T 52 .
  • the common end of the seventh and eighth diodes is connected to the third end I 3 of the first circuit module M1.
  • FIG. 6 is a schematic diagram showing a fourth circuit principle of the first circuit module M1 in the single-phase five-level inverter topology circuit according to the embodiment of the present invention.
  • the first circuit module M1 further includes a first bidirectional switch T 61 , a second bidirectional switch T 62 , a third bidirectional switch T 63 , and a fourth bidirectional switch T 64 .
  • the second end of the first bidirectional switch T 61 is connected to the first end of the second bidirectional switch T 62 , and the first end of the first bidirectional switch T 61 is connected to the first end of the third bidirectional switch T 63 .
  • the second end of the third bidirectional switch T 63 is connected to the second end I 2 of the first circuit module M1.
  • the common end of the first and second bidirectional switches is connected to the first end I 1 of the first circuit module M1.
  • the second bidirectional switch T is connected to the second end 62 of the fourth end of the second bidirectional switch T 64, T fourth bidirectional switch connected to a first terminal of the first circuit module 64 Ml third terminal I 3.
  • the single-phase five-level inverter with the first circuit module M1 shown in FIG. 3 and the second circuit module M2 shown in FIG. 2(a) is taken as an example to illustrate the single phase provided by the present invention.
  • the DC output voltage of the DC power source is V dc .
  • V Ls is used to mean the current limiting inductor voltage when the current limiting inductor L s current flows from left to right in the drawing.
  • the capacitance value of the first capacitor C 1 is equal to the capacitance value of the second capacitor C 2 .
  • the present invention does not limit the magnitude relationship between the capacitance value of the first capacitor C 1 and the capacitance value of the second capacitor C 2 .
  • both the first capacitor C 1 voltage and the second capacitor C 2 voltage are equal to 0.5 V dc .
  • the floating capacitor voltage is an algebraic superposition of 0.5 V dc and the voltage V Ls .
  • the inductive reactance of the current limiting inductor L s is very small, so the voltage V Ls is negligible. So the floating capacitor voltage is very close to 0.5Vdc.
  • the filter inductor L 1 in the circuit of the definition is defined to flow from left to right as a forward current and vice versa. The solid line circuit in the drawing works, and the dotted circuit does not work.
  • the first working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG. 8.
  • the forward current path is:
  • the negative current path is:
  • the first circuit module M1 operates in its mode three
  • the second circuit module M2 operates in its mode one.
  • the second working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG. 9.
  • the forward current path is:
  • the negative current path is:
  • the first circuit module M1 operates in its modal state 1
  • the second circuit module M2 operates in its modality 2.
  • the floating capacitor C s is charged by the first capacitor C 1 .
  • the charging circuit is: C 1 ⁇ T 1 ⁇ L s ⁇ T 3 ⁇ C s ⁇ D 33 ⁇ T 31 ⁇ D 32 ⁇ C 1 .
  • the third working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG.
  • the forward current path is:
  • the negative current path is:
  • the first circuit module M1 operates in its mode one
  • the second circuit module M2 operates in its mode three.
  • the charging circuit of the floating capacitor C s is the same as the charging circuit of the second mode.
  • the fourth working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG.
  • the forward current path is:
  • the charging circuit of the floating capacitor C s At this point, the first circuit module M1 operates in its modality 2, and the second circuit module M2 operates in its modality 3.
  • the fifth working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG.
  • the forward current path is: D 31 ⁇ T 31 ⁇ D 34 ⁇ C s ⁇ T 6 ⁇ L 1 ⁇ G ⁇ D 31 .
  • the first circuit module M1 operates in its modality 2
  • the second circuit module M2 operates in its modality four.
  • the second capacitor C 2 charges the floating capacitor C s
  • the charging circuit is the same as the charging circuit of the fourth mode.
  • the sixth working mode of the single-phase five-level inverter provided by the embodiment of the present invention is as shown in FIG.
  • the forward current path is:
  • the negative current path is:
  • the first circuit module M1 operates in its mode three
  • the second circuit module M2 operates in its mode five.
  • the single-phase five-level inverter shown in Fig. 7 alternates in the above six operating modes to obtain the required inverter output voltage.
  • the single-phase five-level inverter output voltage U OX is equal to the sum of the floating capacitor voltage and the first capacitor voltage; in the sixth working mode, the single-phase five-electricity
  • the flat inverter output voltage U OX is equal to the sum of the negative floating capacitor voltage and the negative second capacitor voltage. Therefore, the peak-to-peak value of the output voltage of the single-phase five-level inverter is equal to 2V dc .
  • the voltage utilization of the single-phase five-level inverter is equal to two.
  • the voltage utilization of existing single-phase five-level half-bridge inverters (without floating capacitors) is equal to one.
  • the voltage utilization of the single-phase five-level inverter provided by the present invention is twice that of the existing single-phase five-level half-bridge inverter. Since the single-phase five-level inverter outputs five mutually different levels including zero, the ripple voltage is smaller than the ripple voltage of the single-phase three-level inverter. Therefore, the inductive reactance of the filter inductor L 1 is smaller than the corresponding inductive reactance in the single-phase three-level inverter.
  • the current limiting inductor L s operates both as a current limiting device and as a filter inductor, it does not require a freewheeling circuit.
  • FIG. 14(a) is an equivalent block diagram of a single-phase five-level inverter topology circuit according to an embodiment of the present invention.
  • the first input terminal defining the second circuit module M2 is the first DC input terminal of the single-phase five-level inverter topology circuit, and similarly, the first circuit module M1 The first end is the second DC input end, the second input end of the second circuit module M2 is the third DC input end, and the output end of the second circuit module M2 is the output end thereof.
  • Figure 14(b) is a partial block circuit diagram of a three-phase five-level inverter topology circuit based on the equivalent circuit of Figure 14(a).
  • the three-phase five-level inverter topology circuit includes three of the single-phase five-level inverter topology circuits.
  • the input sides of the three single-phase five-level inverter topologies are connected in parallel. That is, the first DC input terminals of the three single-phase five-level inverter topologies are connected to the first capacitor C 1 positive pole, and the second DC input terminal is connected to the first capacitor C 1 and the second capacitor At the common end of C 2 , the third DC input terminal is connected to the second capacitor C 2 anode.
  • the AC output ends of the three single-phase five-level inverter topology circuits are connected in one-to-one correspondence with the three-phase AC power grid or the AC load access terminals.
  • Each of the three single-phase five-level inverter topology circuits may adopt any one of the circuits shown in FIGS. 3 to 6.
  • the three first circuit modules M1 preferentially select the same circuit for integration, for example, the circuit shown in FIG.
  • the three-phase five-level inverter provided by the present invention has twice the voltage utilization of the existing three-phase five-level half-bridge inverter, so its current is reduced by half. Therefore, the three-phase five-level inverter provided by the invention has low device cost and low AC filter inductance.
  • the midpoint voltage on the DC side can be automatically balanced. That is to say, the additional circuit is not required, and the midpoint voltage of the DC side of the five-level inverter provided by the present invention can be balanced.
  • the five-level inverter topology circuit provided by the present invention can be used for, but not limited to, a renewable energy system, such as a single-phase or three-phase grid-connected photovoltaic system.
  • the above is only a specific embodiment of the present invention, and it should be noted that those skilled in the art can make some improvements and refinements without departing from the principles of the present invention, for example, according to the present embodiment.
  • the topology circuit in the example utilizes the topological circuit obtained by the symmetrical characteristic, and these improvements and refinements should also be regarded as the protection scope of the present invention.

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Abstract

一种五电平逆变器拓扑电路及三相五电平逆变器拓扑电路，适于和两个串联连接的直流电源（C1，C2）一起使用，包括：一个半桥逆变器电路；所述半桥逆变器电路包括第一电路模块（M1）和第二电路模块（M2）。所述半桥逆变器电路能够输出包括零电平之内的五种电平。该五电平逆变器拓扑电路采用五电平半桥结构，只需要一个交流滤波电感（L1），因此降低了系统成本和体积，消除了漏电流，效率高。

Description

五电平逆变器拓扑电路及三相五电平逆变器拓扑电路
本申请要求2015年11月6日提交的美国临时专利申请US62/252,111的优先权，其公开内容整体并入于此作为参考。
技术领域
本发明涉及电力电子领域中的电力变换器拓扑电路，特别是五电平逆变器拓扑电路及三相五电平逆变器拓扑电路。
背景技术
随着全球能源和环境问题加剧，可再生能源发展迅速。光伏发电因其资源丰富，分布广泛，具有很好的发展前景。对于光伏发电系统来说，如何降低成本，提高效率成为光伏发电的重要课题。
众所周知，光伏阵列产生直流电。在光伏发电系统中，逆变器用于将光伏阵列输出的直流电转化成交流电。非隔离型光伏逆变器存在共模回路。该共模回路产生高频漏电流，引起电磁干扰，同时危及设备和人身安全。因此，高频漏电流是非隔离型逆变器系统需要解决的一个重要问题。
根据电路结构，现有公开的逆变器拓扑电路分成两类。
第一类是双交流电感的对称拓扑电路，比如全桥逆变器拓扑电路。由于全桥逆变器拓扑电路所需的输入电压为半桥逆变器拓扑电路的一半，因此很多场合，无需额外的升压电路升压。但是，全桥逆变器由于其寄生参数的存在，很难完全消除高频漏电流。通过适当改进传统H4全桥电路，可以减小高频漏电流，并满足行业标准。但其为对称双电感工作模态，两个电感磁芯不能共用，增大了成本。
第二类是单电感的非对称拓扑电路，比如半桥逆变器拓扑电路或中点钳位逆变器拓扑电路。该类拓扑电路通过将交流电网或交流负载的一端直接钳位至直流母线电压的中点，很好保证了光伏电池板的寄生电容两端电压恒定不变，从而很好地解决了漏电流。由于其电压利 用率为第一类的一半，因此需要额外的升压电路，导致效率降低，成本增大。
三相逆变器系统通常采用三电平半桥逆变器拓扑电路。但是，(1)电压利用率低；(2)交流滤波感抗高；(3)需要附加电路来提高输入电压，因此成本高。
发明内容
本发明提供了一种五电平逆变器拓扑电路，以解决现有技术中的上述问题中的至少部分技术问题。
为了叙述方便，本申请中的术语“双向开关”指电流可以双向流动但只能承受单向电压的开关，比如带有反向并联二极管的IGBT，或内置并联二极管的MOSFET。
本发明提供的五电平逆变器拓扑电路，适于和两个串联连接的直流电源一起使用。所述五电平逆变器拓扑电路至少包括：一个半桥逆变器电路。所述半桥逆变器电路输出五个互不相同的电平，包括零电平。所述半桥逆变器电路至少包括一个悬浮电容。所述悬浮电容由第一直流电源或第二直流电源充电。
可选地，所述两个直流电源由一个电源并联连接两个串联连接的电容实现。其中，每个电容充当一个直流电源。
第一方面，本发明提供了一种单相五电平逆变器拓扑电路，适于和两个串联连接的直流电源一起使用，其特征在于，包括：一个半桥逆变器电路；所述半桥逆变器电路包括第一电路模块和第二电路模块。
所述第一电路模块的第一端连接所述两直流电源的公共端，第二端连接第二电路模块的第三输入端，第三端连接第二电路模块的第四输入端；并连接若干控制端，适于在控制端接入的控制信号的控制下，提供至少三种工作模态：模态一：对于三个端子，仅将第一端与第二端连接；模态二，对于三个端子，仅将第一端与第三端连接；模态三：断开三个端子中任意两个端子之间的连接。
所述第二电路模块包括限流装置、悬浮电容和拓扑控制部分；所述第二电路模块的第一输入端适于连接第一直流电源的正极，第二输入端适于连接第二直流电源的负极；输出端连接所述半桥逆变器电路的负载端；所述第二电路模块的拓扑控制部分连接若干控制端，适于在控制端接入的控制信号的控制下，提供至少五种工作模态：针对四个输入端和一个输出端；
模态一：将限流装置和悬浮电容串联后连接在第一输入端和输出端之间，断开其他端与端之间的连接；模态二：将限流装置连接在第一输入端和输出端之间，将悬浮电容连接在第四输入端和输出端之间，断开其他端与端的连接；模态三：将限流装置和悬浮电容串联后连接在第一输入端和输出端之间且导通第四输入端与输出端之间的连接，断开其他端与端的连接；或者将限流装置和悬浮电容串联后连接在第二输入端和输出端之间且导通第三输入端与输出端之间的连接，断开其他端与端的连接；模态四：将限流装置连接在第二输入端和输出端之间，将悬浮电容连接在第三输入端和输出端之间，断开其他端与端的连接；模态五：将限流装置和悬浮电容串联后连接在第二输入端和输出端之间，断开其他端与端之间的连接。
可选地，所述第一电路模块包括两个电路支路；第一电路支路连接在第一端与第二端之间；第二电路支路连接在第一端与第三端之间；每一个电路支路均还对应连接控制信号端，适于在控制信号端接入的关断控制信号下关断，在控制信号端接入的导通信号下导通。
所述第二电路模块中的限流装置有很多实现形式，比如以下一种或者几种的组合：电感；电阻；运行在有源模态或线性模态的半导体器件。所述限流装置用于抑制悬浮电容充电时的冲击电流。也就是说，所述限流装置构成悬浮电容充电回路的一部分。
所述悬浮电容由第一直流电源或第二直流电源充电。所述第一电流电源或第二直流电源给所述半桥逆变器电路的负载供电，或者，所 述两个电流电源中的任一个与悬浮电容代数叠加后给所述半桥逆变器电路的负载供电，从而使第二电路模块输出五个互不相同的电平，包括零电平。
可选地，所述半桥逆变器电路中的第二电路模块包括六个开关电路支路、限流装置和悬浮电容。
第一开关电路支路的第一端连接所述第二电路模块的第一输入端，第一开关电路支路的第二端连接第二开关电路支路的第一端；
第二开关电路支路的第二端连接所述第二电路模块的第二输入端；
第三开关电路支路的第一端同时连接所述第二电路模块的第三输入端和所述悬浮电容的正极，第三开关电路支路的第二端连接第四开关电路支路的第一端；
第四开关电路支路的第二端同时连接所述第二电路模块的第四输入端和所述悬浮电容的负极；第三开关电路支路、第四开关电路支路的公共端通过限流装置连接第一开关电路支路、第二开关电路支路的公共端；
第五开关电路支路的第一端连接所述悬浮电容的正极，第五开关电路支路的第二端连接第六开关电路支路的第一端；第六开关电路支路的第二端连接所述悬浮电容的负极；第五开关电路支路、第六开关电路支路的公共端连接所述第二电路模块的输出端。
可选地，第三开关电路支路、第四开关电路支路的公共端通过限流电感连接第一开关电路支路、第二开关电路支路的公共端。
所述半桥逆变器电路还包括一个滤波电感。
所述半桥逆变器电路的输出端连接所述半桥逆变器电路的负载端具体是指所述半桥逆变器电路的输出端通过所述滤波电感连接所述半桥逆变器电路的负载端。所述滤波电感用于滤除开关频率的谐波，从而获得几乎正弦的负载电流。
可选地，所述第二电路模块中的每个开关电路支路至少包括一个双向开关。其中，每个所述双向开关的第一端连接该双向开关所在开关电路支路的第一端，每个所述双向开关的第二端连接该双向开关所在开关电路支路的第二端
可选地，所述第一电路模块中的位于第一端和第二端之间的电路支路以及位于第一端和第三端之间的电路支路均至少包括一个双向开关。
可选地，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第一二极管、第二二极管、第三二极管和第四二极管。
第一二极管正极连接所述第一电路模块的第一端，第一二极管负极连接第一双向开关的第一端。第三二极管负极连接第一二极管负极，第三二极管正极连接所述第一电路模块的第三端。第二二极管负极连接第一二极管正极，第二二极管正极同时连接第一双向开关的第二端和第四二极管正极。第四二极管负极连接所述第一电路模块的第二端。
可选地，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第二双向开关、第一二极管和第二二极管。
第一二极管的正极连接第二二极管的负极，第一二极管的负极连接第一双向开关的第一端。第一双向开关的第二端连接所述第一电路模块的第二端。第二二极管的正极连接第二双向开关的第二端，第二双向开关的第一端连接所述第一电路模块的第三端。第一二极管、第二二极管的公共端连接所述第一电路模块的第一端。
可选地，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第二双向开关和八个二极管。
第一二极管的负极连接第一双向开关的第一端，第一二极管的正极连接第二二极管的负极。第二二极管的正极连接第一双向开关的第二端。第一二极管、第二二极管的公共端连接所述第一电路模块的第一端。第三二极管的正极连接第四二极管的负极，第三二极管的负极 连接第一双向开关的第一端。第四二极管的正极连接第一双向开关的第二端。第三二极管、第四二极管的公共端连接所述第一电路模块的第二端。
第五二极管的正极连接第六二极管的负极，第五二极管的负极连接第二双向开关的第一端。第六二极管的正极连接第二双向开关的第二端。第五二极管、第六二极管的公共端连接所述第一电路模块的第一端。第七二极管的正极连接第八二极管的负极，第七二极管的负极连接第二双向开关的第一端。第八二极管的正极连接第二双向开关的第二端。第七二极管、第八二极管的公共端连接所述第一电路模块的第三端。
可选地，所述半桥逆变器电路中的第二电路模块替换为另一第二电路模块；所述另一第二电路模块包括悬浮电容、第一限流电感、第二限流电感以及八个双向开关；
第一双向开关的第一端连接第一直流电源的正极，第一双向开关的第二端同时连接第一电路模块的第三端和第二限流电感的第一端；第二双向开关的第一端同时连接第一电路模块的第二端和第一限流电感的第一端，第二双向开关的第二端连接第二直流电源的负极；第三双向开关的第二端连接第一双向开关的第一端，第三双向开关的第一端连接第五双向开关的第一端；第五双向开关的第二端同时连接第一限流电感的第二端和悬浮电容正极；第六双向开关的第一端同时连接第二限流电感的第二端和悬浮电容负极，第六双向开关的第二端连接第四双向开关的第二端，第四双向开关的第一端连接第二双向开关的第二端；第七双向开关的第一端连接悬浮电容正极，第七双向开关的第二端连接第八双向开关的第一端；第八双向开关的第二端连接悬浮电容负极；第七双向开关、第八双向开关的公共端连接第二电路模块的输出端。
可选地，所述半桥逆变器电路中的第一电路模块包括第一双 向开关、第二双向开关、第三双向开关和第四双向开关。
第一双向开关的第二端连接第二双向开关的第一端，第一双向开关的第一端连接第三双向开关的第一端。第三双向开关的第二端连接所述第一电路模块的第二端。第一双向开关、第二双向开关的公共端连接所述第一电路模块的第一端。第二双向开关的第二端连接第四双向开关的第二端，第四双向开关的第一端连接所述第一电路模块的第三端。
可选地，所述单相五电平逆变器拓扑电路还包括两个串联连接的直流电源；所述半桥逆变器电路的负载端通过负载连接两个直流电源的公共端。
第二方面，本发明提供了一种三相五电平逆变器拓扑电路，包括三个第一方面提供的单相五电平逆变器拓扑电路。其中，所述三个单相五电平逆变器拓扑电路输入侧并联连接，所述三个单相五电平逆变器拓扑电路的交流输出端用于一对一连接三相交流电网或三相交流负载的三个交流电压输出端。
本发明提供的单相五电平逆变器拓扑电路包括一个半桥逆变器电路。该半桥逆变器电路含有一个悬浮电容并且输出五个互不相同的电平，包括零电平。该单相五电平逆变器拓扑电路采用五电平半桥结构，只需要一个交流滤波电感，因此降低了系统成本和体积，完全消除了漏电流，效率高。本发明还公开了三相五电平逆变器拓扑电路。在相同的运行条件下，本发明提供的五电平逆变器拓扑电路采用了悬浮电容，其电压利用率是现有半桥五电平逆变器拓扑电路的两倍，而且不需要附加电路，直流侧中点电压就可以自动平衡。另外，由于采用的是五电平结构，因此，交流滤波感抗比三电平半桥逆变器的交流滤波感抗小。
本发明提供了一种五电平逆变器拓扑电路，可以用于，但不限于，可再生能源系统，比如单相或三相光伏系统。
附图说明
为了更全面地理解本发明的技术方案，对后面的实施例或现有技术描述中所需要使用的附图进行介绍如下。通过参考附图会更加清楚地理解本发明的特征信息和优点，附图是示意性的而不应理解为对本发明进行任何限制，在附图中：
图1为本发明实施例提供的一种单相五电平逆变器拓扑电路的电路原理部分方框图；
图2(a)为本发明实施例提供的含有一种第二电路模块M2的单相五电平逆变器拓扑电路的电路原理部分方框图；
图2(b)为本发明实施例提供的含有另一种第二电路模块M2的单相五电平逆变器拓扑电路的电路原理部分方框图；
图3为本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第一种电路原理示意图；
图4为本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第二种电路原理示意图；
图5为本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第三种电路原理示意图；
图6为本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第四种电路原理示意图；
图7为本发明实施例提供的含有图3所示的第一电路模块M1的单相五电平逆变器拓扑电路电路原理示意图；
图8为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第一种工作模态示意图；
图9为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第二种工作模态示意图；
图10为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第三种工作模态示意图；
图11为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第四种工作模态示意图；
图12为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第五种工作模态示意图；
图13为本发明实施例提供的图7所示的单相五电平逆变器拓扑电路的第六种工作模态示意图；
图14(a)为本发明实施例提供的单相五电平逆变器拓扑电路的等效方框图。
图14(b)为本发明实施例提供的基于图14(a)所示等效电路的三相五电平逆变器拓扑电路的电路原理部分方框图。
为了叙述方便，在各个附图中同一元器件采用相同的参考标号。同一附图中相同的符号，比如
Figure PCTCN2016104937-appb-000001
表示相互连接在一起。
具体实施方式
本发明提供了一种五电平逆变器拓扑电路。为了使本技术领域的人员更好地理解本发明中的技术方案及其如何实现，下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述。显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都应当属于本发明保护的范围。
如附图所示，本发明实施例中使用的术语“Vdc”表示直流电源电压，M1、M2分别表示半桥逆变器电路中的第一电路模块和第二电路模块，C1表示充当第一直流电源的第一电容，C2表示充当第二直流电源的第二电容，Cs表示悬浮电容。
为了叙述方便，逆变器交流输出电压的峰峰值与最小直流输入电压的比值定义为电压利用率。本发明实施例中，最小直流输入电压等于直流电源电压Vdc。
注意，二极管被用作代表单方向导通元件，但本发明中的单方向导通元件不限定于二极管。二极管的正极指阳极，负极指阴极。本发明中的单方向导通元件也可以采用二极管之外的其它单方向导通器件。
为了叙述方便，开关MOSFET被用作代表本发明中的可控型(导通和关断)开关管，但本发明中的可控型元件不限定于MOSFET。以N沟道MOSFET为例进行说明。N沟道MOSFET的第一端指漏极，第二端指源极，控制端指栅极。本发明中的每个可控型元件的控制端施加一个驱动控制信号。简洁起见，后面不再赘述。本发明中的可控型元件也可以采用MOSFET之外的其它可控型开关管器件实现，比如IGBT。
简洁起见，术语“双向开关”指电流可以双向流动但只能承受单向电压的半导体开关，比如带有反向并联二极管的IGBT，或内置并联二极管的MOSFET。
简洁起见，术语“公共端”是指第一元器件和第二元器件的连接处。
本发明实施例提供的五电平逆变器拓扑电路，能够和两个串联连接的直流电源一起使用以解决上述的技术问题。所述五电平逆变器拓扑电路至少包括一个半桥逆变器电路。所述半桥逆变器电路能够输出五个互不相同的电平，其中包括零电平。所述半桥逆变器电路包括第一电路模块和第二电路模块，其中第二电路模块至少包括一个悬浮电容。所述第一电路模块包括至少两个连接在两个直流电源中的任一个与第二电路模块之间的电路支路，且所述两个电路支路延伸连接到第二电路模块内部的悬浮电容。所述悬浮电容由第一直流电源或第二直流电源充电。所述半桥逆变器电路的负载由第一直流电源或者第二直流电源供电，或者，所述半桥逆变器电路的负载由第一直流电源与悬浮电容代数叠加或者第二直流电源与悬浮电容代数叠加后供电。
根据本发明实施例上述核心思想，结合附图对实施例进行详细阐述。
图1给出了一种单相五电平逆变器拓扑电路的电路原理部分方框图。所述单相五电平逆变器拓扑电路和两个串联连接的电容(第一电容C1、第二电容C2)连接。其中，第一电容C1作为第一直流电源，第二电容C2作为第二直流电源。所述单相五电平逆变器拓扑电路包括一个半桥逆变器电路。所述半桥逆变器电路输出五个互不相同的电平，包括零电平。
所述半桥逆变器电路包括第一电路模块M1和第二电路模块M2。
第一电路模块M1包括第一端I1、第二端I2、第三端I3，主要设计为提供至少三种工作模态：模态一是将第一端I1和第二端I2连接，并断开第三端I3与第一端I1的连接，以及断开第三端I3与第二端I2的连接；模态二是将第一端I1和第三端I3连接，并断开第二端I2与第一端I1的连接，以及断开第二端I2与第三端I3的连接；模态三：断开三个端子中任意两个端子之间的连接。具体来说，可以包括至少两个电路支路，其中一个电路支路位于第一端I1与第二端I2之间，另一个电路支路位于第一端I1与第三端I3之间。第一端I1连接第一电容C1和第二电容C2的公共端Ux。
所述第二电路模块M2包括四个输入端Iin-1～Iin-4、一个输出端Iout和一个悬浮电容Cs、一个限流电感Ls。除此之外还包括拓扑控制部分每个输入端与输出端Iout之间至少有一个电路支路。所述第二电路模块M2接收任意两个不同的输入端之间的输入信号，通过输出端Iout输出五个互不相同的电平，包括零电平。对应于所提供五种不同的电平，所述拓扑控制部分设计为是的第二电路模块M2提供五种不同的工作模态，具体来说包括：
针对四个输入端和一个输出端；
模态一：将限流装置和悬浮电容串联后连接在第一输入端和输出 端之间，断开其他端与端之间的连接；模态二：将限流装置连接在第一输入端和输出端之间，将悬浮电容连接在第四输入端和输出端之间，断开其他端与端的连接；模态三：将限流装置和悬浮电容串联后连接在第一输入端和输出端之间且导通第四输入端与输出端之间的连接，断开其他端与端的连接；或者将限流装置和悬浮电容串联后连接在第二输入端和输出端之间且导通第三输入端与输出端之间的连接，断开其他端与端的连接；模态四：将限流装置连接在第二输入端和输出端之间，将悬浮电容连接在第三输入端和输出端之间，断开其他端与端的连接；模态五：将限流装置和悬浮电容串联后连接在第二输入端和输出端之间，断开其他端与端之间的连接。
所述第一电路模块M1的第二端I2连接所述第二电路模块M2的第三输入端Iin-3，第一电路模块M1的第三端I3连接所述第二电路模块M2的第四输入端Iin-4。所述第二电路模块M2的第一输入端Iin-1连接第一电容C1的正极，第二输入端Iin-2连接第二电容C2的负极。所述第二电路模块M2的输出端Iout连接交流滤波电感L1的第一端，交流滤波电感L1的第二端连接交流电网或交流负载的第一端。第一电容C1和第二电容C2的公共端Ux连接交流电网或交流负载的第二端。
限流电感Ls是一种限流装置。此处也可以采用其它限流装置，比如以下一种或者几种的组合：电感；电阻；运行在有源模态或线性模态的半导体器件。另外，限流电感Ls和交流滤波电感L1共同作用滤除开关频率的谐波，从而获得几乎正弦的负载电流。限流电感Ls的感抗很小。更准确地说，限流电感Ls的感抗只需要交流滤波电感L1感抗的百分之一就够了。因此，限流电感Ls的电压非常小，甚至可以忽略。
所述限流装置用于抑制悬浮电容Cs充电时的冲击电流。也就是说，所述限流装置构成悬浮电容Cs充电回路的一部分。
所述第一电路模块M1的基本功能是(1)给悬浮电容Cs提供充电路径，使悬浮电容Cs电压值等于或者非常接近于第一电容C1(第二电 容C2)电压；(2)当悬浮电容Cs充电时，抑制冲击电流。所述第一电路模块M1的第一端I1和第二端I2之间的电路支路或者第一端I1和第三端I3之间的电路支路构成从第一电容C1(即第一直流电源)或第二电容C2(即第二直流电源)到悬浮电容Cs之间的部分充电路径。
图2(a)给出了第二电路模块M2的一种电路原理示意图。所述第二电路模块M2包括悬浮电容Cs、六个开关电路支路和一个限流电感Ls。每个开关电路支路至少包括一个双向开关。为了叙述方便，每个所述双向开关的下标符号和该双向开关所在的开关电路支路的顺序号相同，比如，第一开关电路支路中的双向开关为T1。
第一双向开关T1的第一端连接所述第一电容C1正极，第一双向开关T1的第二端连接第二双向开关T2的第一端。第二双向开关T2的第二端连接所述第二电容C2负极。第三双向开关T3的第一端同时连接所述第一电路模块M1的第二端I2和所述悬浮电容Cs的正极，第三双向开关T3的第二端连接第四双向开关T4的第一端。第四双向开关T4的第二端同时连接所述第一电路模块M1的第三端I3和所述悬浮电容Cs的负极。第三、第四双向开关的公共端通过限流电感Ls连接第一、第二双向开关的公共端。
第五双向开关T5的第一端连接所述悬浮电容Cs的正极，第五双向开关T5的第二端连接第六双向开关T6的第一端。第六双向开关T6的第二端连接所述悬浮电容Cs的负极。第五、第六双向开关的公共端通过交流滤波电感L1连接交流电网或交流负载的第一端。第一电容C1与第二电容C2的公共端连接交流电网或交流负载的第二端。
图2(a)中的限流电感Ls可以采用两个限流电感代替。第一限流电感工作在电网电压的正半周而第二限流电感不工作，第二限流电感工作在电网电压的负半周而第一限流电感不工作。图2(b)给出了两个限流电感的电路连接示意图，但两个限流电感的电路连接方式并不限于图2(b)给出的连接方式。
图2(b)给出了第二电路模块M2的另一种电路原理示意图。所述第二电路模块M2包括悬浮电容Cs、八个双向开关T1～T8和两个限流电感Ls1、Ls2。
第一双向开关T1的第一端连接所述第一电容C1正极，第一双向开关T1的第二端连接所述第一电路模块M1的第三端I3和第二限流电感Ls2第一端。第二双向开关T2的第一端连接所述第一电路模块M1的第二端I2和第一限流电感Ls1第一端。第二双向开关T2的第二端连接所述第二电容C2负极。第三双向开关T3的第一端连接第五双向开关T5的第一端，第三双向开关T3的第二端连接第一双向开关T1的第一端。第五双向开关T5的第二端同时连接第一限流电感Ls1第二端和所述悬浮电容Cs的正极。第六双向开关T6的第一端同时连接第二限流电感Ls2第二端和所述悬浮电容Cs的负极。第六双向开关T6的第二端连接第四双向开关T4的第二端，第四双向开关T4的第一端连接第二双向开关T2的第二端。第七双向开关T7的第一端连接所述悬浮电容Cs的正极，第七双向开关T7的第二端连接第八双向开关T8的第一端。第八双向开关T8的第二端连接所述悬浮电容Cs的负极。第七、第八双向开关的公共端通过交流滤波电感L1连接交流电网或交流负载的第一端。
同时，第一电容C1与第二电容C2的公共端连接交流电网或交流负载的第二端。
图3给出了本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第一种电路原理示意图。所述第一电路模块M1进一步包括第一双向开关T31、第一二极管D31、第二二极管D32、第三二极管D33和第四二极管D34。
第一二极管D31正极连接所述第一电路模块M1的第一端I1，第一二极管D31负极连接第一双向开关T31的第一端。第三二极管D33负极连接第一二极管D31负极，第三二极管D33正极连接所述第一电路模块M1的第三端I3。第二二极管D32负极连接第一二极管D31正极，第二二极 管D32正极连接第一双向开关T31的第二端。同时，第四二极管D34正极连接第二二极管D32正极。第四二极管D34负极连接所述第一电路模块M1的第二端I2。
图4给出了本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第二种电路原理示意图。所述第一电路模块M1进一步包括第一双向开关T41、第二双向开关T42、第一二极管D41和第二二极管D42。
第一二极管D41的正极连接第二二极管D42的负极，第一二极管D41的负极连接第一双向开关T41的第一端。第一双向开关T41的第二端连接所述第一电路模块M1的第二端I2。第二二极管D42的正极连接第二双向开关T42的第二端，第二双向开关T42的第一端连接所述第一电路模块M1的第三端I3。第一、第二二极管的公共端连接所述第一电路模块M1的第一端I1。
图5给出了本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第三种电路原理示意图。所述第一电路模块M1进一步包括第一双向开关T51、第二双向开关T52和八个二极管D51～D58。
第一二极管D51的负极连接第一双向开关T51的第一端，第一二极管D51的正极连接第二二极管D52的负极。第二二极管D52的正极连接第一双向开关T51的第二端。第一、第二二极管的公共端连接所述第一电路模块M1的第一端I1。第三二极管D53的正极连接第四二极管D54的负极，第三二极管D53的负极连接第一双向开关T51的第一端。第四二极管D54的正极连接第一双向开关T51的第二端。第三、第四二极管的公共端连接所述第一电路模块M1的第二端I2。
第五二极管D55的正极连接第六二极管D56的负极，第五二极管D55的负极连接第二双向开关T52的第一端。第六二极管D56的正极连接第二双向开关T52的第二端。第五、第六二极管的公共端连接所述第一电路模块M1的第一端I1。第七二极管D57的正极连接第八二极管D58的 负极，第七二极管D57的负极连接第二双向开关T52的第一端。第八二极管D58的正极连接第二双向开关T52的第二端。第七、第八二极管的公共端连接所述第一电路模块M1的第三端I3。
图6给出了本发明实施例提供的单相五电平逆变器拓扑电路中的第一电路模块M1的第四种电路原理示意图。所述第一电路模块M1进一步包括第一双向开关T61、第二双向开关T62、第三双向开关T63和第四双向开关T64。
第一双向开关T61的第二端连接第二双向开关T62的第一端，第一双向开关T61的第一端连接第三双向开关T63的第一端。第三双向开关T63的第二端连接所述第一电路模块M1的第二端I2。第一、第二双向开关的公共端连接所述第一电路模块M1的第一端I1。同时，第二双向开关T62的第二端连接第四双向开关T64的第二端，第四双向开关T64的第一端连接所述第一电路模块M1的第三端I3。
如图7所示，以带有图3所示第一电路模块M1和图2(a)所示第二电路模块M2的单相五电平逆变器为例，说明本发明提供的单相五电平逆变器的工作原理。下面给出了六个工作模态。
根据本实施例，假设直流电源的直流输出电压为Vdc。术语“VLs”用于表示当附图中的限流电感Ls电流从左流向右时的限流电感电压。假定第一电容C1的电容值等于第二电容C2的电容值。显然，本发明并不限定第一电容C1的电容值与第二电容C2的电容值之间的大小关系。根据本实施例的假定，第一电容C1电压和第二电容C2电压都等于0.5Vdc。由于悬浮电容Cs由第一电容C1或第二电容C2充电，因此，所述悬浮电容电压为0.5Vdc与电压VLs的代数叠加和。限流电感Ls的感抗非常小，因此，电压VLs可以忽略不计。所以悬浮电容电压非常接近于0.5Vdc。定义附图电路中的滤波电感L1电流从左向右流动为正向电流，反之为负向电流。附图中的实线电路工作，虚线电路不工作。
本发明实施例提供的单相五电平逆变器的第一工作模态如图8 所示。正向电流路径为：
Figure PCTCN2016104937-appb-000002
负向电流路径为：
Figure PCTCN2016104937-appb-000003
该阶段第一电路模块M1工作在其模态三，第二电路模块M2工作在其模态一。逆变器输出电压UOX等于所述悬浮电容电压和第一电容电压以及负的电压VLs之和，即UOX＝0.5Vdc+0.5Vdc-VLs≈Vdc。
本发明实施例提供的单相五电平逆变器的第二工作模态如图9所示。正向电流路径为：
Figure PCTCN2016104937-appb-000004
负向电流路径为：
Figure PCTCN2016104937-appb-000005
该阶段第一电路模块M1工作在其模态一，第二电路模块M2工作在其模态二。逆变器输出电压UOX等于第一电容电压与负的电压VLs之和，即UOX＝0.5Vdc-VLs≈0.5Vdc。
第二工作模态下，悬浮电容Cs由第一电容C1充电。充电回路为：C1→T1→Ls→T3→Cs→D33→T31→D32→C1。
本发明实施例提供的单相五电平逆变器的第三工作模态如图10所示。正向电流路径为：
Figure PCTCN2016104937-appb-000006
负向电流路径为：
Figure PCTCN2016104937-appb-000007
该阶段第一电路模块M1工作在其模态一，第二电路模块M2工作在其模态三。逆变器输出电压UOX等于第一电容电压与负的悬浮电容电压以及负的电压VLs之和，即UOX＝0.5Vdc+(-0.5Vdc)-VLs≈0。此时悬浮电容Cs的充电回路和第二模态的充电回路相同。
本发明实施例提供的单相五电平逆变器的第四工作模态如图11所示。正向电流路径为：
Figure PCTCN2016104937-appb-000008
此时悬浮电容Cs的充电回路：
Figure PCTCN2016104937-appb-000009
该阶段第一电路模块M1工作在其模态二，第二电路模块M2工作在其模态三。逆变器输出电压UOX等于悬浮电容电压与负的第二电容电压以及负的电压VLs之和，即UOX＝0.5Vdc+(-0.5Vdc)-VLs≈0。
本发明实施例提供的单相五电平逆变器的第五工作模态如图12 所示。正向电流路径为：D31→T31→D34→Cs→T6→L1→G→D31。该阶段第一电路模块M1工作在其模态二，第二电路模块M2工作在其模态四。此时第二电容C2为悬浮电容Cs充电，充电回路和第四模态的充电回路相同。逆变器输出电压UOX等于负的悬浮电容电压与负的电压VLs之和，即UOX＝-0.5Vdc-VLs≈-0.5Vdc。
本发明实施例提供的单相五电平逆变器的第六工作模态如图13所示。正向电流路径为：
Figure PCTCN2016104937-appb-000010
负向电流路径为：
Figure PCTCN2016104937-appb-000011
该阶段第一电路模块M1工作在其模态三，第二电路模块M2工作在其模态五。逆变器输出电压UOX等于负的悬浮电容电压与负的第二电容电压以及负的电压VLs之和，即UOX＝(-0.5Vdc)+(-0.5Vdc)-VLs≈-Vdc。
通过控制相应的开关管导通或关断，图7所示的单相五电平逆变器在上述的六种工作模态下交替工作，从而获得需要的逆变输出电压。
由于电压VLs非常小，可以忽略不计。在第一工作模态下，所述单相五电平逆变器输出电压UOX等于所述悬浮电容电压和第一电容电压之和；在第六工作模态下，所述单相五电平逆变器输出电压UOX等于负的悬浮电容电压与负的第二电容电压之和。因此，所述单相五电平逆变器输出电压的峰峰值等于2Vdc。根据本发明中关于电压利用率的定义，所述单相五电平逆变器的电压利用率等于二。但是，现有单相五电平半桥逆变器(无悬浮电容)的电压利用率等于一。因此，在相同的运行条件下，本发明提供的单相五电平逆变器的电压利用率是现有单相五电平半桥逆变器电压利用率的两倍。由于所述单相五电平逆变器输出五个包括零在内的相互不同的电平，因此纹波电压小于单相三电平逆变器的纹波电压。所以，滤波电感L1的感抗小于单相三电平逆变器中的对应电感感抗。
由于限流电感Ls既作为限流装置工作又作为滤波电感工作，因此，它不需要续流回路。
图14(a)是本发明实施例提供的单相五电平逆变器拓扑电路的等效方框图。如图14(a)所示，定义第二电路模块M2的第一输入端为所述单相五电平逆变器拓扑电路的第一直流输入端，类似地，第一电路模块M1的第一端为其第二直流输入端，第二电路模块M2的第二输入端为其第三直流输入端，第二电路模块M2的输出端为其输出端。
图14(b)是基于图14(a)中的等效电路的三相五电平逆变器拓扑电路的部分方框电路图。如图14(b)所示，所述三相五电平逆变器拓扑电路包括三个所述单相五电平逆变器拓扑电路。所述三个单相五电平逆变器拓扑电路输入侧并联连接。也就是说，所述三个单相五电平逆变器拓扑电路的第一直流输入端均连接第一电容C1正极，第二直流输入端均连接第一电容C1与第二电容C2的公共端，第三直流输入端均连接第二电容C2负极。所述三个单相五电平逆变器拓扑电路的交流输出端与三相交流电网或交流负载接入端一一对应连接。
所述三个单相五电平逆变器拓扑电路中的每个第一电路模块M1可以采用图3至图6所示的任一个电路。这三个第一电路模块M1优先选择相同的电路以便于集成，比如，都采用图3所示的电路。
注意，实际应用中广泛使用三相交流电压，因此，以三相五电平逆变器拓扑电路为例进行说明。采用上述方法，本领域的普通技术人员不付出创造性的劳动获得的其它多相结构，比如四相，五相等，都应视为属于本发明保护的范围。
在相同的运行条件下，本发明提供的三相五电平逆变器的电压利用率是现有三相五电平半桥逆变器的两倍，因此其电流减小了一半。所以，本发明提供的三相五电平逆变器采用的器件成本低，交流滤波感抗小。
由于直流侧两个直流电源以同等的机率给悬浮电容充电，因此直流侧的中点电压可以自动平衡。也就是说，不需要附加电路，本发明提供的五电平逆变器直流侧的中点电压就可以平衡。
本发明提供的五电平逆变器拓扑电路，可以用于，但不限于，可再生能源系统，比如单相或三相并网光伏系统。
本说明书中的各个实施例均采用递进的方式描述，各个实施例之间相同或相似的部分互相参见即可，每个实施例重点说明的都是与其他实施例的不同之处。
需要说明的是，在本文中，诸如“第一”和“第二”，“上”和“下”等之类的关系术语仅仅用来将一个实体或者操作与另一个实体或操作区分开来，而不一定要求或者暗示这些实体或操作之间存在任何这种实际的关系或者顺序。而且，术语“包括”、“包含”或者任何其他变体意在涵盖非排他性的包含，从而使得一系列要素的过程、方法、物品或者设备不仅包括那些要素，而且还包括没有明确列出的其他要素，或者是还包括为这种过程、方法、物品或者设备所固有的要素。在没有更多限制的情况下，由语句“包括一个……”限定的要素，并不排除在包括所述要素的过程、方法、物品或者设备同时还存在另外的其它要素。
以上所述仅是本发明的具体实施方式，应当指出，对于本技术领域的普通技术人员来说，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，比如，根据本实施例中的拓扑电路电路利用对称特性得到的拓扑电路，这些改进和润饰也应视为本发明的保护范围。

Claims (16)

  1. 一种单相五电平逆变器拓扑电路，适于和两个串联连接的直流电源一起使用，其特征在于，包括：一个半桥逆变器电路；所述半桥逆变器电路包括第一电路模块和第二电路模块；
    所述第一电路模块的第一端连接所述两直流电源的公共端，第二端连接第二电路模块的第三输入端，第三端连接第二电路模块的第四输入端；并连接若干控制端，适于在控制端接入的控制信号的控制下，提供至少三种工作模态：模态一：对于三个端子，仅将第一端与第二端连接；模态二，对于三个端子，仅将第一端与第三端连接；模态三：断开三个端子中任意两个端子之间的连接；
    所述第二电路模块包括限流装置、悬浮电容和拓扑控制部分；所述第二电路模块的第一输入端适于连接第一直流电源的正极，第二输入端适于连接第二直流电源的负极；输出端连接所述半桥逆变器电路的负载端；所述第二电路模块的拓扑控制部分连接若干控制端，适于在控制端接入的控制信号的控制下，使得第二电路模块提供至少五种工作模态：针对四个输入端和一个输出端；
    模态一：将限流装置和悬浮电容串联后连接在第一输入端和输出端之间，断开其他端与端之间的连接；模态二：将限流装置连接在第一输入端和输出端之间，将悬浮电容连接在第四输入端和输出端之间，断开其他端与端的连接；模态三：将限流装置和悬浮电容串联后连接在第一输入端和输出端之间且导通第四输入端与输出端之间的连接，断开其他端与端的连接；或者将限流装置和悬浮电容串联后连接在第二输入端和输出端之间且导通第三输入端与输出端之间的连接，断开其他端与端的连接；模态四：将限流装置连接在第二输入端和输出端之间，将悬浮电容连接在第三输入端和输出端之间，断开其他端与端的连接；模态五：将限流装置和悬浮电容串联后连接在第二输入端和输出端之间，断开其他端与端之间的连接。
  2. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，
    所述第一电路模块包括两个电路支路；第一电路支路连接在第一端与第二端之间；第二电路支路连接在第一端与第三端之间；每一个电路支路均还对应连接控制信号端，适于在控制信号端接入的关断控制信号下关断，在控制信号端接入的导通信号下导通。
  3. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，所述限流装置包括以下一种或者几种的组合：电感；电阻；运行在有源模态或线性模态的半导体器件。
  4. 根据权利要求2所述的单相五电平逆变器拓扑电路，其特征在于，所述第一电路模块的第一端与第二端之间的任一个电路支路包括至少一个双向开关；所述第一电路模块的第一端与第三端之间的任一个电路支路包括至少一个双向开关。
  5. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第二电路模块中的拓扑控制部分包括六个开关电路支路；
    第一开关电路支路的第一端连接所述第二电路模块的第一输入端，第一开关电路支路的第二端连接第二开关电路支路的第一端；
    第二开关电路支路的第二端连接所述第二电路模块的第二输入端；
    第三开关电路支路的第一端同时连接所述第二电路模块的第三输入端和所述悬浮电容的正极，第三开关电路支路的第二端连接第四开关电路支路的第一端；
    第四开关电路支路的第二端同时连接所述第二电路模块的第四输入端和所述悬浮电容的负极；第三开关电路支路、第四开关电路支路的公共端通过限流装置连接第一开关电路支路、第二开关电路支路的公共端；
    第五开关电路支路的第一端连接所述悬浮电容的正极，第五开关电路支路的第二端连接第六开关电路支路的第一端；第六开关电路支路的第二端连接所述悬浮电容的负极；第五开关电路支路、第六开关电路支路的公共端连接所述第二电路模块的输出端。
  6. 根据权利要求5所述的单相五电平逆变器拓扑电路，其特征在于，所述六个开关电路支路中的任一个至少包括一个双向开关；每个双向开关的第一端连接该双向开关所在开关电路支路的第一端，每个双向开关的第二端连接该双向开关所在开关电路支路的第二端。
  7. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第二电路模块替换为另一第二电路模块；所述另一第二电路模块包括悬浮电容、第一限流电感、第二限流电感以及八个双向开关；
    第一双向开关的第一端连接第一直流电源的正极，第一双向开关的第二端同时连接第一电路模块的第三端和第二限流电感的第一端；第二双向开关的第一端同时连接第一电路模块的第二端和第一限流电感的第一端，第二双向开关的第二端连接第二直流电源的负极；第三双向开关的第二端连接第一双向开关的第一端，第三双向开关的第一端连接第五双向开关的第一端；第五双向开关的第二端同时连接第一限流电感的第二端和悬浮电容正极；第六双向开关的第一端同时连接第二限流电感的第二端和悬浮电容负极，第六双向开关的第二端连接第四双向开关的第二端，第四双向开关的第一端连接第二双向开关的第二端；第七双向开关的第一端连接悬浮电容正极，第七双向开关的第二端连接第八双向开关的第一端；第八双向开关的第二端连接悬浮电容负极；第七双向开关、第八双向开关的公共端连接第二电路模块的输出端。
  8. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路还包括：滤波电感；
    所述半桥逆变器电路的输出端连接所述半桥逆变器电路的负载端具体是指所述半桥逆变器电路的输出端通过所述滤波电感连接所述半桥逆变器电路的负载端。
  9. 根据权利要求4所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第一二极管、第二二极管、第三二极管和第四二极管；
    第一二极管正极连接所述第一电路模块的第一端，第一二极管负极连接第一双向开关的第一端；第三二极管负极连接第一二极管负极，第三二极管正极连接所述第一电路模块的第三端；第二二极管负极连接第一二极管正极，第二二极管正极同时连接第一双向开关的第二端和第四二极管正极；第四二极管负极连接所述第一电路模块的第二端。
  10. 根据权利要求4所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第二双向开关、第一二极管和第二二极管；
    第一二极管的正极连接第二二极管的负极，第一二极管的负极连接第一双向开关的第一端；第一双向开关的第二端连接所述第一电路模块的第二端；第二二极管的正极连接第二双向开关的第二端；第二双向开关的第一端连接所述第一电路模块的第三端；第一二极管、第二二极管的公共端连接所述第一电路模块的第一端。
  11. 根据权利要求4所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第二双向开关和八个二极管；
    第一二极管的负极连接第一双向开关的第一端，第一二极管的正极连接第二二极管的负极；第二二极管的正极连接第一双向开关的第二端；第一二极管、第二二极管的公共端连接所述第一电路模块的第一端；第三二极管的正极连接第四二极管的负极，第三二极 管的负极连接第一双向开关的第一端；第四二极管的正极连接第一双向开关的第二端；第三二极管、第四二极管的公共端连接所述第一电路模块的第二端；第五二极管的正极连接第六二极管的负极，第五二极管的负极连接第二双向开关的第一端；第六二极管的正极连接第二双向开关的第二端；第五二极管、第六二极管的公共端连接所述第一电路模块的第一端；第七二极管的正极连接第八二极管的负极，第七二极管的负极连接第二双向开关的第一端；第八二极管的正极连接第二双向开关的第二端；第七二极管、第八二极管的公共端连接所述第一电路模块的第三端。
  12. 根据权利要求4所述的单相五电平逆变器拓扑电路，其特征在于，所述半桥逆变器电路中的第一电路模块包括第一双向开关、第二双向开关、第三双向开关和第四双向开关；
    第一双向开关的第二端连接第二双向开关的第一端；第一双向开关的第一端连接第三双向开关的第一端；第三双向开关的第二端连接所述第一电路模块的第二端；第一双向开关、第二双向开关的公共端连接所述第一电路模块的第一端；第二双向开关的第二端连接第四双向开关的第二端，第四双向开关的第一端连接所述第一电路模块的第三端。
  13. 根据权利要求1所述的单相五电平逆变器拓扑电路，其特征在于，还包括两个串联连接的直流电源；所述半桥逆变器电路的负载端通过负载连接两个直流电源的公共端。
  14. 一种三相五电平逆变器拓扑电路，其特征在于，包括三个单相五电平逆变器拓扑电路；每一个单相五电平逆变器拓扑电路均为如权利要求1至13任一项所述的单相五电平逆变器拓扑电路；其中，所述三个单相五电平逆变器拓扑电路输入侧并联连接，所述三个单相五电平逆变器拓扑电路的交流输出端用于一对一连接三相交流电网或三相交流负载的三个交流电压输出端。
  15. 根据权利要求14所述的三相五电平逆变器拓扑电路，其特征在于，所述三个单相五电平逆变器拓扑电路中的第一电路模块采用相同的电路。
  16. 根据权利要求14所述的三相五电平逆变器拓扑电路，其特征在于，所述三个单相五电平逆变器拓扑电路中的第二电路模块采用相同的电路。
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