WO2017071521A1 - 用于检测时钟同步路径的方法、节点及系统 - Google Patents

用于检测时钟同步路径的方法、节点及系统 Download PDF

Info

Publication number
WO2017071521A1
WO2017071521A1 PCT/CN2016/102751 CN2016102751W WO2017071521A1 WO 2017071521 A1 WO2017071521 A1 WO 2017071521A1 CN 2016102751 W CN2016102751 W CN 2016102751W WO 2017071521 A1 WO2017071521 A1 WO 2017071521A1
Authority
WO
WIPO (PCT)
Prior art keywords
node
synchronization
clock
synchronization detection
message
Prior art date
Application number
PCT/CN2016/102751
Other languages
English (en)
French (fr)
Inventor
江元龙
徐金春
刘娴
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to JP2018518619A priority Critical patent/JP6598175B2/ja
Priority to EP19180920.1A priority patent/EP3614586B1/en
Priority to KR1020187008626A priority patent/KR102055201B1/ko
Priority to ES16858956T priority patent/ES2816077T3/es
Priority to EP16858956.2A priority patent/EP3334068B1/en
Publication of WO2017071521A1 publication Critical patent/WO2017071521A1/zh
Priority to US15/961,532 priority patent/US10462760B2/en

Links

Images

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • H04W56/001Synchronization between nodes
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0641Change of the master or reference, e.g. take-over or failure of the master
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0638Clock or time synchronisation among nodes; Internode synchronisation
    • H04J3/0658Clock or time synchronisation among packet nodes
    • H04J3/0673Clock or time synchronisation among packet nodes using intermediate nodes, e.g. modification of a received timestamp before further transmission to the next packet node, e.g. including internal delay time or residence time into the packet
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0679Clock or time synchronisation in a network by determining clock distribution path in a network
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0688Change of the master or reference, e.g. take-over or failure of the master
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems
    • H04J3/02Details
    • H04J3/06Synchronising arrangements
    • H04J3/0635Clock or time synchronisation in a network
    • H04J3/0685Clock or time synchronisation in a node; Intranode synchronisation
    • H04J3/0697Synchronisation in a packet node
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/06Management of faults, events, alarms or notifications
    • H04L41/0681Configuration of triggering conditions
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L41/00Arrangements for maintenance, administration or management of data switching networks, e.g. of packet switching networks
    • H04L41/12Discovery or management of network topologies
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00Arrangements for monitoring or testing data switching networks
    • H04L43/10Active monitoring, e.g. heartbeat, ping or trace-route
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/42Centralised routing
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W24/00Supervisory, monitoring or testing arrangements
    • H04W24/04Arrangements for maintaining operational condition
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W56/00Synchronisation arrangements
    • H04W56/0035Synchronisation arrangements detecting errors in frequency or phase
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04WWIRELESS COMMUNICATION NETWORKS
    • H04W84/00Network topologies
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L45/00Routing or path finding of packets in data switching networks
    • H04L45/02Topology update or discovery

Definitions

  • the present invention relates to the field of mobile communications technologies, and in particular, to a method, a node, and a system for detecting a clock synchronization path.
  • Clock synchronization includes frequency synchronization and phase synchronization.
  • Frequency synchronization refers to maintaining a certain strict specific relationship between frequencies or phases between signals, that is, a constant phase difference between signals remains in a small range, such as less than 100 nanoseconds.
  • the main clock synchronization technologies include IEEE 1588v2 and Synchronous Ethernet (Sync E). Synchronous Ethernet is used to achieve frequency synchronization, while 1588v2 is mainly used to implement time synchronization, that is, phase synchronization.
  • a mobile network base station of 3G or more obtains a clock synchronization signal from its bearer network, thereby performing frequency synchronization and time synchronization.
  • the normal synchronization of the mobile network and the normal operation of the service can be guaranteed.
  • a mobile bearer network such as a packet transport network (PTN), an Internet Protocol Radio Access Network (IP RAN), etc.
  • PDN packet transport network
  • IP RAN Internet Protocol Radio Access Network
  • devices in a mobile bearer network need to be grouped with devices in other networks.
  • the clocks of the two connected devices are not synchronized.
  • the problem of whether the clock is out of synchronization is determined by manually analyzing the clock synchronization signals of the two devices that are docked, and/or the efficiency is low by manually analyzing the nodes having faults on the clock synchronization path.
  • the above-mentioned clock synchronization problem also exists in other communication networks that require time delays, such as power control networks, IEEE 802.1AS low-latency Ethernet, and the like.
  • Embodiments of the present invention provide a method, a node, and a system for detecting a clock synchronization path, which are helpful for improving the working efficiency of acquiring a state of a clock synchronization path.
  • a first aspect of the embodiments of the present invention provides a method for detecting a clock synchronization path, which can be applied to a mobile bearer network.
  • the mobile bearer network includes a base transceiver station (BTS), a building integrated timing supply (BITS), and a plurality of nodes.
  • the first node in the method is a node that initiates clock synchronization detection.
  • the method includes:
  • the first node generates a detection request message, where the synchronization detection request message includes an identifier (ID) of the first node;
  • the first node receives a first synchronization detection response message sent by the second node, where the first synchronization detection response message includes clock topology information of the second node and an ID of the first node;
  • the first node obtains a first detection result according to the first synchronization detection response message, where the first detection result is used to indicate a state of a clock synchronization path between the first node and the second node.
  • the first node receives a second synchronization detection response message sent by a third node that transmits a clock synchronization signal with the second node, where the second synchronization detection response message includes the third node Clock topology information, clock topology information of the second node, and an ID of the first node;
  • the first node obtains a second detection result according to the second synchronization detection response message, where the second detection result is used to indicate a state of a clock synchronization path between the first node and the third node, where A clock synchronization path between the first node and the third node passes through the second node.
  • the first node may receive at least two synchronization detection response messages, and may acquire at least two detection results, where each detection result is used to represent a clock of the first location and the synchronization detection response message sending node. a state of the synchronization path, the first node according to the at least two The detection result may be analyzed to obtain a clock synchronization path of the first node, thereby helping to determine a node whose clock is not synchronized according to the clock synchronization path, that is, a node that is not on the clock synchronization path where the first node is located is a clock Nodes that are out of sync.
  • the first node sends the synchronization detection request message to the second node by using a port for transmitting a clock synchronization signal, where the port for transmitting a clock synchronization signal is the A port on a node that is capable of transmitting a clock synchronization signal with the second node.
  • the synchronization detection request message further includes a first synchronization type, where the first synchronization type is used to indicate frequency synchronization, and the synchronization detection request message is used to request to detect a frequency synchronization path,
  • the sending, by the first node, the synchronization detection request message to the second node by using a port for transmitting a clock synchronization signal includes:
  • the first node Determining, by the first node, a port for transmitting a frequency synchronization signal according to the first synchronization type in the synchronization detection request message and the port for transmitting a clock synchronization signal, where the first node is configured to transmit a frequency synchronization signal Port is a port on the first node capable of transmitting a frequency synchronization signal with the second node;
  • the first node sends the synchronization detection request message to the second node by using the port for transmitting a frequency synchronization signal.
  • the synchronization detection request message further includes a second synchronization type, where the second synchronization type is used to indicate time synchronization, and the synchronization detection request message is used to request to detect a time synchronization path, where
  • the sending, by the first node, the synchronization detection request message to the second node by using a port for transmitting a clock synchronization signal includes:
  • the first node sends the synchronization detection request message to the second node by using the port for transmitting a time synchronization signal.
  • the method before the first node generates a synchronization detection request message, the method also includes:
  • the first node After the first node determines to track the clock tracking node of the first node, the first node generates a synchronization detection request message.
  • the first node determines whether the first node initiates clock synchronization detection, and may detect whether the first node loses the first node. Whether the clock source or the BTS signal is abnormal, determining whether the first node initiates clock synchronization detection. The first node determines that the clock source of the first node is lost or detects that there is an abnormality in the BTS signal, and determines that the first node initiates clock synchronization detection, that is, the first node generates the synchronization detection request message.
  • the first detection result includes a first synchronization path, where the first synchronization path is a clock synchronization path of the first node and the second node, and a clock topology of the second node
  • the information includes an ID of the second node
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message includes:
  • the first node obtains the first synchronization path according to the ID of the second node and the ID of the first node that are included in the first synchronization detection response message.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes first alarm information, where the first alarm information is used to indicate sending
  • the node of the first synchronization detection response message has a physical layer fault
  • the first detection result further includes a first alarm message, where the first alarm message is used to notify a node that has a physical layer fault
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message further includes:
  • the first node according to the first synchronization detection response message includes the second node ID, generating the first alarm message, where the first alarm message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes second alarm information, where the second alarm information is used to indicate sending
  • the node of the first synchronization detection response message detects that the clock source is abnormal
  • the first detection result further includes a second alarm message, where the second alarm message is used to notify the node whose clock source is abnormal;
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message further includes:
  • the first node generates the second alarm message according to the ID of the second node that is included in the first synchronization detection response message, where the second alarm message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes performance monitoring information, where the performance monitoring information is used to determine the a frequency offset performance of the node that synchronously detects the response message
  • the first detection result further includes a performance abnormality message, where the performance abnormality message is used to notify the node that the frequency offset performance is degraded
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message further includes:
  • the first node generates the performance abnormality message according to the ID of the second node included in the first synchronization detection response message, where the performance abnormality message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes first alarm information, where the first alarm information is used to indicate sending The node of the first synchronization detection response message has a physical layer fault
  • the first detection result includes a first alarm message, where the first alarm message is used to notify a node that has a physical layer fault
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message includes:
  • the first node generates the first alarm message according to the ID of the second node that is included in the first synchronization detection response message, where the first alarm message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes second alarm information, where the second alarm information is used to indicate sending
  • the node of the first synchronization detection response message detects that the clock source is abnormal
  • the first detection result includes a second alarm message
  • the second alarm message is used to notify a node whose clock source is abnormal
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message includes:
  • the first node generates the second alarm message according to the ID of the second node that is included in the first synchronization detection response message, where the second alarm message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes performance monitoring information, where the performance monitoring information is used to indicate the first a frequency offset performance of a node that synchronously detects a response message
  • the first detection result includes a performance abnormality message, where the performance abnormality message is used to notify a node that has a frequency offset performance degradation
  • the obtaining, by the first node, the first detection result according to the first synchronization detection response message further includes:
  • the first node generates the performance abnormality message according to the ID of the second node included in the first synchronization detection response message, where the performance abnormality message includes an ID of the second node.
  • a second aspect of the embodiments of the present invention provides another method for detecting a clock synchronization path, which is applied to a mobile bearer network, where the mobile bearer network includes a BTS, a BITS, and a plurality of nodes.
  • Method package include:
  • the second node receives the first synchronization detection request message sent by the first node, where the first synchronization detection request message includes clock topology information of the first node;
  • the second node generates a synchronization detection response message according to the first synchronization detection request message, where the synchronization detection response message includes clock topology information of the second node and clock topology information of the first node;
  • the second node sends the synchronization detection response message.
  • the method further includes:
  • the third node is a node capable of transmitting a clock synchronization signal with the second node, and the second synchronization detection request message includes the Clock topology information of the first node and clock topology information of the second node;
  • the second node sends the second synchronization detection request message to the third node.
  • the third node is a clock source of the second node
  • the sending, by the second node, the second synchronization detection request message to the third node includes:
  • the first node is a node that initiates clock synchronization detection
  • the clock topology information of the first node is an identifier ID of the first node
  • the second node sends the synchronization detection
  • the response message includes:
  • the second node sends the synchronization detection response message to the first node according to the ID of the first node included in the first synchronization detection request message.
  • the first synchronization detection request message further includes clock topology information of the fourth node
  • the clock topology information of the fourth node is an ID of the fourth node
  • the synchronization detection response message is further Including the ID of the fourth node, the fourth node is to initiate clock synchronization detection And sending, by the second node, the synchronization detection response message includes:
  • the second node sends the synchronization detection response message to the fourth node according to the ID of the fourth node included in the first synchronization detection request message.
  • the first node is a clock source of the second node
  • the second node generates a synchronization detection response message according to the first synchronization detection request message, including:
  • the synchronization detection response message is generated.
  • the generating, by the second node, the synchronization detection response message according to the first synchronization detection request message includes:
  • the second node adds a first synchronization type to the synchronization detection response message, the first synchronization type is used to indicate frequency synchronization, and the first synchronization detection request message is used to request detection of a frequency synchronization path.
  • the generating, by the second node, the synchronization detection response message according to the first synchronization detection request message includes:
  • the second node adds a second synchronization type to the synchronization detection response message, the second synchronization type is used to indicate time synchronization, and the first synchronization detection request message is used to request detection of a time synchronization path.
  • the method further includes:
  • the second node After detecting that the second node has a physical layer fault, the second node adds the first alarm information to the synchronization detection response message, where the first alarm information is used to indicate a node that sends the synchronization detection response message. There is a physical layer failure.
  • the method further includes:
  • the second node After detecting that the clock source of the second node is abnormal, the second node adds a second alarm information to the synchronization detection response message, where the second alarm information is used to indicate a node that sends the synchronization detection response message. An abnormality was detected in its clock source.
  • the method further includes:
  • the second node After detecting that the frequency offset performance of the second node is degraded, the second node adds performance monitoring information to the synchronization detection response message, where the performance monitoring information is used to determine a node of the first synchronization detection response message. Frequency offset performance.
  • the first node is a clock tracking node of the second node, and the clock tracking node of the second node is used to directly A node providing a clock synchronization signal, or the second node is a clock tracking node of the first node, and the clock tracking node of the first node is a node for directly providing a clock synchronization signal for the first node.
  • the first node is a clock tracking node of the second node
  • the clock tracking node of the second node is used to directly a node that provides a clock synchronization signal
  • the clock topology information of the second node includes an ID of the second node and a port list of the second node
  • the port list of the second node includes the second node A port for receiving a clock synchronization signal and N ports for transmitting a clock synchronization signal.
  • a third aspect of the embodiments of the present invention provides a first node, including:
  • a message generating unit configured to generate a synchronization detection request message, where the synchronization detection request message includes an ID of the first node
  • a message sending unit configured to send the synchronization detection request message to the second node
  • a message receiving unit configured to receive a first synchronization detection response message sent by the second node, where the first synchronization detection response message includes clock topology information of the second node and an ID of the first node;
  • a result obtaining unit configured to obtain a first detection result according to the first synchronization detection response message, where the first detection result is used to indicate clock synchronization between the first node and the second node The state of the path.
  • the message receiving unit is further configured to receive a second synchronization detection response message sent by the third node, where the second synchronization detection response message includes clock topology information of the third node, Clock topology information of the second node and an ID of the first node;
  • the result obtaining unit is further configured to obtain a second detection result according to the second synchronization detection response message, where the second detection result is used to indicate a clock synchronization path between the first node and the third node. a state in which a clock synchronization path between the first node and the third node passes through the second node.
  • the message sending unit is specifically configured to send the synchronization detection request message to the second node by using a port for transmitting a clock synchronization signal, where the port for transmitting the clock synchronization signal is A port on the first node capable of transmitting a clock synchronization signal with the second node.
  • the synchronization detection request message further includes a first synchronization type, where the first synchronization type is used to indicate frequency synchronization, and the synchronization detection request message is used to request to detect a frequency synchronization path;
  • the message sending unit includes:
  • a first port determining unit configured to determine, according to the first synchronization type in the synchronization detection request message and the port for transmitting a clock synchronization signal, a port for transmitting a frequency synchronization signal, where the transmission is performed
  • the port of the frequency synchronization signal is a port on the first node capable of transmitting a frequency synchronization signal with the second node;
  • a first message sending unit configured to send the synchronization detection request message to the second node by using the port for transmitting a frequency synchronization signal determined by the first port determining unit.
  • the synchronization detection request message further includes a second synchronization type, where the second synchronization type is used to indicate time synchronization, and the synchronization detection request message is used to request to detect a time synchronization path;
  • the message sending unit includes:
  • a second port determining unit configured to perform, according to the second synchronization in the synchronization detection request message a port for transmitting a clock synchronization signal, a port for transmitting a time synchronization signal, the port for transmitting a time synchronization signal being capable of transmitting a time synchronization signal with the second node on the first node port;
  • a second message sending unit configured to send the synchronization detection request message to the second node by using the port for transmitting a time synchronization signal determined by the second port determining unit.
  • the first node further includes: a determining unit;
  • the determining unit is configured to determine whether to track a clock tracking node of the first node, where the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node;
  • the message generating unit is further configured to: after the determining unit determines to track the clock tracking node of the first node, generate the synchronization detection request message.
  • the first detection result includes a first synchronization path, where the first synchronization path is a clock synchronization path of the first node and the second node, and a clock topology of the second node
  • the information includes an ID of the second node
  • the result obtaining unit is specifically configured to obtain the first synchronization path according to the ID of the second node and the ID of the first node included in the first synchronization detection response message.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes first alarm information, where the first alarm information is used to indicate sending
  • the node of the first synchronization detection response message has a physical layer fault
  • the first detection result further includes a first alarm message, where the first alarm message is used to notify a node that has a physical layer fault
  • the result obtaining unit is specifically configured to:
  • the clock topology information of the second node includes the second node ID
  • the first synchronization detection response message further includes second alarm information, where the second alarm information is used to indicate that the node that sends the first synchronization detection response message detects that its clock source is abnormal, the first detection
  • the result further includes a second alert message, the second alert message being used to notify a node whose clock source is abnormal;
  • the result obtaining unit is specifically configured to:
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes performance monitoring information, where the performance monitoring information is used to determine the a frequency offset performance of the node that synchronously detects the response message
  • the first detection result further includes a performance abnormality message, where the performance abnormality message is used to notify the node that the frequency offset performance is degraded
  • the result obtaining unit is specifically configured to:
  • the first node For a specific implementation manner of the first node, refer to the method for detecting a clock synchronization path according to the first aspect.
  • a fourth aspect of the embodiment of the present invention provides a second node, including:
  • a request message receiving unit configured to receive a first synchronization detection request message sent by the first node, where the first synchronization detection request message includes clock topology information of the first node;
  • a response message generating unit configured to generate a synchronization detection response message according to the first synchronization detection request message, where the synchronization detection response message includes clock topology information of the second node and clock topology information of the first node;
  • a response message sending unit configured to send the synchronization detection response message.
  • the second node further includes:
  • a node determining unit configured to determine that a third node exists
  • a request message generating unit configured to generate a second synchronization detection request message according to the first synchronization detection request message, where the third node is a node capable of transmitting a clock synchronization signal with the second node, and the second synchronization detection
  • the request message includes clock topology information of the first node and clock topology information of the second node;
  • a request message sending unit configured to send the second synchronization detection request message to the third node.
  • the third node is a clock tracking node of the second node
  • the clock tracking node of the second node is a node for directly providing a clock synchronization signal for the second node
  • the request message sending unit is specifically configured to send, by using a port for receiving a clock synchronization signal, the second synchronization detection request message to the third node, where the port for receiving a clock synchronization signal is the second A port on the node that receives the clock synchronization signal provided by the third node.
  • the first node is a node that initiates clock synchronization detection
  • the clock topology information of the first node is an identifier ID of the first node
  • the response message sending unit is specifically configured to:
  • the first synchronization detection request message further includes clock topology information of the fourth node
  • the synchronization detection response message further includes clock topology information of the fourth node, and a clock of the fourth node
  • the topology information is the ID of the fourth node
  • the fourth node is a node that initiates clock synchronization detection
  • the response message sending unit is specifically configured to:
  • the first node is a clock tracking node of the second node
  • the clock tracking node of the second node is configured to directly provide a clock synchronization signal for the second node.
  • the node, the response message generating unit includes:
  • a port determining unit configured to determine whether the port that the request message receiving unit receives the first synchronization detection request message is a port for transmitting a clock synchronization signal
  • the message generating unit is configured to: after determining that the port that receives the first synchronization detection request message is the port for transmitting a clock synchronization signal, generate the synchronization detection response message.
  • the response message generating unit includes:
  • a port determining unit configured to determine that the port that receives the first synchronization detection request message is a port for transmitting a frequency synchronization signal
  • a message generating unit configured to add a first synchronization type to the synchronization detection response message, where the first synchronization type is used to indicate frequency synchronization, and the first synchronization detection request message is used to request detection of a frequency synchronization path.
  • the response message generating unit includes:
  • a port determining unit configured to determine that the port that receives the first synchronization detection request message is a port for transmitting a time synchronization signal
  • a message generating unit configured to add a second synchronization type to the synchronization detection response message, where the second synchronization type is used to indicate time synchronization, and the first synchronization detection request message is used to request detection of a time synchronization path.
  • the second node further includes:
  • a first adding unit configured to add a first alarm information to the synchronization detection response message after detecting that the second node has a physical layer fault, where the first alarm information is used to indicate that the synchronization detection response message is sent
  • the node has a physical layer failure.
  • the second node further includes:
  • a second adding unit configured to: after detecting that the clock source of the second node is abnormal, adding the second alarm information to the synchronization detection response message, where the second alarm information is used to send the synchronization detection response message The node detected that its clock source is abnormal.
  • the second node further includes:
  • a performance information adding unit configured to detect that the frequency offset performance of the second node is degraded, The monitoring information is added to the synchronization detection response message, and the performance monitoring information is used to indicate that the frequency offset performance of the node of the first synchronization detection response message is degraded.
  • the second node refers to the method for detecting a clock synchronization path according to the second aspect.
  • a fifth aspect of the embodiments of the present invention provides a system for detecting a clock synchronization path, the system comprising the first node of the third aspect and the second node of the fourth aspect.
  • the first node may initiate detection of clock synchronization, that is, the first node generates a synchronization detection request message, and the synchronization detection request message includes an ID of the first node.
  • the first node may transmit a synchronization detection request message to a node on the path for transmitting the clock synchronization signal through a path for transmitting the clock synchronization signal.
  • the node that receives the synchronization detection request message for example, the second node, carries its own clock topology information and the ID of the first node in the synchronization detection response message, and sends a synchronization detection to the node that initiates the clock synchronization detection, such as the first node. Response message.
  • the node included in the path for transmitting the clock synchronization signal sends a synchronization detection response message carrying its own clock topology information to the node that initiates the clock synchronization detection.
  • the initiating clock synchronization detecting node may obtain a detection result about the clock synchronization path according to the received one or more synchronization detection response messages.
  • the initiating clock synchronization detecting node may determine the node whose clock is not synchronized and/or the node that is faulty according to the detection result, and help improve the working efficiency of acquiring the state of the clock synchronization path.
  • FIG. 1 is a schematic diagram of a scenario of a mobile bearer network.
  • FIG. 2 is a schematic flowchart diagram of a method for detecting a clock synchronization path according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic diagram of a network scenario according to Embodiment 1 of the present invention.
  • FIG. 4 is a schematic flowchart diagram of a method for detecting a clock synchronization path according to Embodiment 2 of the present invention.
  • FIG. 5 is a schematic diagram of a network scenario according to Embodiment 2 of the present invention.
  • FIG. 6 is a schematic diagram of a format of a synchronization detection message according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a first node according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of a second node according to an embodiment of the present invention.
  • FIG. 9 is a schematic structural diagram of another first node according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of another second node according to an embodiment of the present invention.
  • the embodiment of the invention provides a method, a node and a system for detecting a clock synchronization path, which can be applied to a mobile bearer network, such as a packet transport network (PTN) and a radio access network (Internet Protocol Radio).
  • a bearer network such as an Access Network (IP RAN) can also be used to determine whether there is a scene in which the clocks are not synchronized between nodes.
  • IP RAN Access Network
  • R1-R9 are network nodes in a mobile bearer network.
  • the network node may include, but is not limited to, a transmission device, a wireless network control device, a base station control device, a wireless core network device, and the like.
  • the transmission device can be a device such as a switch, a router, or a packet transport network (PTN) device.
  • PPN packet transport network
  • the BTS obtains the time and frequency synchronization signals from R5 through the Pulse Per Second (1PPS) + Time Of Day (TOD) interface, that is, the 1PPS+TOD interface and the Ethernet interface.
  • BITS is the external clock source of the synchronous network in Figure 1.
  • R1 also obtains the time and frequency synchronization signals from BITS through the 1PPS+TOD interface and the Ethernet interface.
  • BITS is placed at the second and third level nodes of the digital synchronization network to provide timing signals to various devices that require clock synchronization.
  • the interface between the transmission bearer devices is an interface for transmitting Sync E and 1588v2 messages, and the interfaces are different in different bearer networks or transport networks, and may be Ethernet interfaces for the packet network.
  • the actual network scenario may include multiple BITS.
  • Figure 1 shows only the network scenario including one BITS and one BTS.
  • the direction indicated by the arrow in Fig. 1 is the distribution direction of the clock synchronization signal generated by the BITS as the clock source in the network scenario shown in Fig. 1.
  • the network scenario shown in Figure 1 exists but is not limited to three clock synchronization paths, such as a clock synchronization path from R1 to R5, which can be simply expressed as R1->R2->R3->R4->R5; one from R1
  • the clock synchronization path to R9 can be simply expressed as R1->R2->R7->R9; a clock synchronization path from R1 to R8 can be simply expressed as R1->R6->R7.
  • the mobile carrier network is R10 (not shown in Figure 1)
  • the clock source is from another BITS.
  • the clock synchronization signal provided by another BITS is different from the clock synchronization signal provided by BITS in Figure 1.
  • R10 is connected to R4, there will be a problem that the clock is not synchronized.
  • a common method for locating a clock that is not synchronized is to manually log in or access devices on the network one by one to determine which device is the clock source of the device being logged in or accessed, and then determine the clock synchronization path to
  • the method for detecting the clock synchronization path helps to improve the working efficiency of acquiring the state about the clock synchronization path.
  • the method for detecting a clock synchronization path provided by the embodiment of the present invention can be applied to the network scenario shown in FIG. 1.
  • the method provided in Embodiment 1 of the present invention is a path detection method in which a leaf node initiates detection and hop-by-hop detection from a leaf node to a root node.
  • the method provided in Embodiment 2 of the present invention is a path detection method in which a root node initiates detection and hop-by-hop detection from a root node to a leaf node.
  • the method provided in Embodiment 3 of the present invention is a path detection method in which the controller initiates detection and hop-by-hop detection from a leaf node to a root node.
  • the method provided in Embodiment 4 of the present invention is a path detection method in which the controller initiates detection and hop-by-hop detection from the root node to the leaf node.
  • the root node can be a node that communicates with the BITS.
  • the leaf node may be a node on the clock synchronization path other than the root node.
  • a node capable of communicating with the BTS belongs to the leaf node.
  • R1 is the root node
  • R2-R9 are leaf nodes. The meaning of the root node and the leaf node is for the direction of clock synchronization distribution.
  • FIG. 2 is a schematic flowchart diagram of a method for detecting a clock synchronization path according to Embodiment 1 of the present invention. As shown in FIG. 2, the method provided in Embodiment 1 of the present invention may include the following contents of 101-110.
  • the first node generates a first synchronization detection request message, where the first synchronization detection request message includes an ID of the first node.
  • the ID of the first node may be a serial number, an index, a character string, or the like, which can uniquely identify the information of the first node.
  • the specific expressions of the ID of the first node are not illustrated one by one.
  • the second node may be used as the The clock traced node of the first node.
  • the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node.
  • the clock source in the embodiment of the present invention is a timing source of a synchronization signal, which may be an external clock source or an internal clock source. For example, if the clock source of a certain network node fails, a certain network node that acquires the synchronization signal from the clock source enters the free running mode and becomes a new clock source.
  • the first node For example, if the first node initiates detection of the clock synchronization path where the first node is located, the first node needs to determine a neighbor node with which clock synchronization relationship is established.
  • the first node may determine, according to the port list of the first node, a neighbor node that has a clock synchronization relationship with the first node.
  • the port list of the first node includes a port of the first node for receiving a clock synchronization signal and N ports for transmitting a clock synchronization signal. N is an integer greater than or equal to 1.
  • the port in the port list of the first node may be recorded in the form of an identifier of the port.
  • the identifier of the port may be a port name, a port number, and the like, which can uniquely identify the port, and is not illustrated here.
  • the clock synchronization signal is from a clock tracking node of the first node or a clock source itself.
  • the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node, and the port may be a physical port or a logical port, for example, a Precision Time Protocol (PTP) port. , rate 155.520Mbps Synchronous Transfer Module (STM) STM-1 channel port.
  • PTP port is divided into a master port for transmitting a synchronous clock, a slave port for receiving a synchronous clock, and a passive port for neither transmitting nor receiving.
  • the STM-1 channel port is used to transmit Synchronous Digital Hierarchy (SDH) signals.
  • SDH Synchronous Digital Hierarchy
  • the first node may generate the first synchronization detection request message according to the ID of the first node.
  • the first synchronization detection request message includes an ID of the first node.
  • the embodiment of the present invention provides a synchronous detection message format. Please refer to FIG. 6. It should be noted that the present invention only proposes a possible and easy-to-understand format, and the specific format of the synchronization detection message is not limited.
  • the format of the synchronization detection message shown in FIG. 6 is a TLV (Type-Length-Value) format, and the TLV format is a protocol type and a variable encapsulation format.
  • Req./Reply The field is used to describe whether the message containing the field is a synchronization detection request message or a synchronization detection response message.
  • the Sync Type field is used to indicate the type of clock synchronization, that is, frequency synchronization or time synchronization.
  • the Sync Type field can indicate frequency synchronization; with 1588v2, the Sync Type field indicates time synchronization.
  • the content carried in the Sync Type field is used to determine the type of clock synchronization.
  • both synchronous Ethernet technology and 1588v2 can be used to implement time synchronization and frequency synchronization.
  • the Sync Topology field is used to carry clock topology information. The content carried in the Sync Topology field can be determined according to the content of the Sync Type field. If the content of the Sync Type field indicates frequency synchronization, the clock topology information carried in the Sync Topology field includes a port list for transmitting a frequency synchronization signal.
  • the clock topology information carried in the Sync Topology field may further include an ID of the node.
  • the identifier of the port in the port list for transmitting the frequency synchronization signal may be one or more of a port name, a port number, a MAC address of the port, and an IP address of the port. If the content of the Sync Type field indicates time synchronization, the clock topology information carried in the Sync Topology field includes a port list for transmitting a time synchronization signal.
  • the clock topology information carried in the Sync Topology field may further include an ID of the node.
  • the port list for transmitting the time synchronization signal may be a list of all enabled PTP ports.
  • the port in the PTP port list may include a port name, a port number, a port status (Slave, Master, etc.), a port MAC address, a port IP address, and the like.
  • the Sync States field is used to indicate the clock status. The contents of the Sync States field are different depending on the contents of the Sync Type field. If the Sync Type field indicates frequency synchronization, the content of the Sync States field is used to indicate one or more of device lock status, clock source information, clock source status, clock alarm information, and clock performance detection information.
  • the clock source information may include one or more of a clock source priority, a clock source identifier, and a clock source synchronization status message (SSM) level.
  • SSM clock source synchronization status message
  • the clock source SSM level includes PRC, SSU-A, SSU-B, SEC, and the like.
  • the clock source status includes normal, port physical status Down, frequency offset abnormality, BITS clock source abnormality, and the like.
  • the clock alarm information includes one or more of the first alarm information and the second alarm information.
  • the synchronization detection message can be encapsulated in the LSP Ping as a new Forwarding Equivalence Class (FEC), and can also be encapsulated in the Transmission Control Protocol. (Transmission Control Protocol, TCP) or as a special application protocol in the User Datagram Protocol (UDP) packet. It can also encapsulate ordinary Ethernet packets or Internet Protocol (IP) packets. In this context, it can be applied to various network synchronization scenarios including switches, routers, or Multi-Protocol Label Switching (MPLS) devices.
  • the format of the synchronization detection message encapsulated in a specific protocol is not exemplified here.
  • the first synchronization detection request message is one of the synchronization detection request messages described in the Req./Reply field of the format of the synchronization detection message shown in FIG.
  • the embodiment of the present invention is a clock synchronization path detection initiated by the leaf node R5 to the root node R1. Therefore, the first node in the embodiment of the present invention is R5 in FIG.
  • the first node may determine whether to initiate detection of a clock synchronization path.
  • the method further includes: the first node determining whether to track the clock tracking node of the first node, and clock tracking of the first node
  • the node is a node for directly providing a clock synchronization signal to the first node; after the first node determines to track the clock tracking node of the first node, executing the first node to generate a first synchronization detection request.
  • the first node may determine to track the clock tracking node of the first node by checking that the device locking state is in a locked mode. In the scenario shown in Figure 3, the clock tracking node of R5 is R4.
  • the method further includes: the first node determining whether to lose the clock tracking node of the first node; After the clock tracking node of the first node is described, the first node is executed to generate the first synchronization detection request message. Specifically, the first node may determine to lose the clock tracking node of the first node by checking that the device locking state is in an unlocked mode.
  • the first node sends the first synchronization detection request message to a second node.
  • the first node sends the first synchronization detection request message by using a port of the first node that receives a clock synchronization signal. If the first node receives the end of the clock synchronization signal The port is capable of communicating with the second node, that is, the second node is a clock tracking node of the first node, and the clock tracking node of the second node is a node for directly providing a clock synchronization signal for the second node And the first node sends the first clock synchronization detection request message to the second node by using a port of the first node that receives a clock synchronization signal. That is, R5 can transmit the first synchronization detection request message to R4 in FIG.
  • the first node may obtain the IP address or the MAC address of the peer node of the physical connection by using the port that receives the clock synchronization signal, or obtain the clock tracking node by using the data table of the first node locally cached.
  • LLDP Link Layer Discovery Protocol
  • the second node is a clock tracking node of the first node
  • the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node
  • the port of the first node for transmitting the clock synchronization signal is a port of the first node for receiving a clock synchronization signal.
  • the first synchronization type in the first synchronization detection request message is the first synchronization type
  • the first synchronization type is used to indicate frequency synchronization
  • the first synchronization detection request message is used to request to detect the frequency synchronization path
  • Determining, by the first node, a port for transmitting a frequency synchronization signal according to the first synchronization type in the first synchronization detection request message and the port for transmitting a clock synchronization signal and then the first node Transmitting, by the port for transmitting a frequency synchronization signal, the first synchronization detection request message to the second node.
  • the port for transmitting the frequency synchronization signal is a port for receiving the frequency synchronization signal.
  • the synchronization type in the first synchronization detection request message is the second synchronization type
  • the second synchronization type is used to indicate time synchronization
  • the first synchronization detection request message is used to request to detect the time synchronization path
  • Determining, by the first node, a port for transmitting a time synchronization signal according to the second synchronization type in the first synchronization detection request message and a port for transmitting a clock synchronization signal Determining, by the first node, a port for transmitting a time synchronization signal according to the second synchronization type in the first synchronization detection request message and a port for transmitting a clock synchronization signal, and then the first node passes the The port for transmitting the time synchronization signal sends the first synchronization detection request message to the second node.
  • the port for transmitting the time synchronization signal is a port for receiving a time synchronization signal.
  • the second node receives the first synchronization detection request message sent by the first node, and generates a first synchronization detection response message according to the first synchronization detection request message, where the first synchronization detection response is
  • the message includes clock topology information of the second node and an ID of the first node.
  • the second node receives the first synchronization detection request message sent by the first node, and determines whether a port that receives the first synchronization detection request message is used to transmit a clock synchronization signal. port. After the second node determines that the port that receives the first synchronization detection request message is the port for transmitting a clock synchronization signal, the second node may generate the first synchronization detection response message.
  • the port of the second node for transmitting a clock synchronization signal is a port of the second node for transmitting a clock synchronization signal.
  • the second node after receiving the first synchronization detection request message, the second node obtains the ID of the first node from the first synchronization detection request message.
  • the second node generates the first synchronization detection response message according to the clock topology information of the second node and the ID of the first node.
  • the clock topology information of the second node in the first synchronization detection response message may be added after the ID of the first node.
  • the clock topology information of the second node includes an ID of the second node and a port list of the second node.
  • the port list of the second node includes a port of the second node for receiving a clock synchronization signal and M ports of the second node for transmitting a clock synchronization signal.
  • M is an integer greater than or equal to 1.
  • the second node for transmitting a clock synchronization signal For example, if the port of the second node for transmitting a clock synchronization signal is a port of the second node for transmitting a frequency synchronization signal, the second node adds the first synchronization type to the The first synchronization detection response message is described.
  • the port of the second node for transmitting the frequency synchronization signal is a port of the second node for transmitting a frequency synchronization signal.
  • the second node for transmitting a clock synchronization signal is a port of the second node for transmitting a time synchronization signal
  • the second node adds the second synchronization type to the first Synchronous detection response message.
  • the port of the second node for transmitting the time synchronization signal is a port of the second node for transmitting a time synchronization signal.
  • the second node sends the first synchronization detection response message to the first node.
  • the node that initiates the clock synchronization detection carries the ID of the node that initiated the clock synchronization detection in the synchronization detection request message sent to the second node.
  • the second node sends the first synchronization detection response message to a node that initiates clock synchronization detection.
  • the first node is a node that initiates clock synchronization detection
  • the first synchronization detection request message includes an ID of the first node.
  • the sending, by the second node, the first synchronization detection response message to the node that initiates the clock synchronization detection includes: sending, by the second node, the first synchronization to the first node according to the ID of the first node Detect response message.
  • the first node is not a node that initiates clock synchronization detection
  • the fourth node is a node that initiates clock synchronization detection
  • the first synchronization detection request message includes an ID of the fourth node.
  • the first synchronization detection response message includes an ID of the fourth node.
  • the sending, by the second node, the first synchronization detection response message to the node that initiates the clock synchronization detection includes: the second node according to the ID of the fourth node included in the first synchronization detection request message, to the The fourth node sends the first synchronization detection response message.
  • the first node receives the first synchronization detection response message sent by the second node, and according to the clock topology information of the second node that is included in the first synchronization detection response message, and the first The ID of the node obtains a first synchronization path, and the first synchronization path is a clock synchronization path between the first node and the second node.
  • R5 may obtain the ID of R5 and the clock topology information of R4 from the first synchronization detection response message.
  • the clock topology information of R4 includes the ID of R4 and the clock port list of R4.
  • the clock port list of R4 includes the port of R4 for receiving the clock synchronization signal and the port of R4 for transmitting the clock synchronization signal.
  • R5 may determine that the first synchronization path is R4->R5 according to the ID of R4 and the ID of R5.
  • the second node is a clock tracking node of the first node, and the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node, that is, a clock tracking node with R4 being R5. .
  • the second node is not the last node of the clock synchronization path, that is, the second node has a port that receives a clock synchronization signal, and the second node is not directly connected.
  • the node of the BITS, the method for detecting the clock synchronization path provided by this embodiment further includes the content of 106 to 110.
  • the second node determines that a third node exists, and generates a second synchronization detection request message, where the third node is a node capable of transmitting a clock synchronization signal with the second node, where the second synchronization detection request message includes Clock topology information of the first node and clock topology information of the second node.
  • the determining, by the second node, that the third node is included includes: determining, by the second node, that the second node has a port that receives a clock synchronization signal according to the port list of the second node, and the second node Not a node that connects to BITS.
  • the port at which the second node receives the clock synchronization signal can communicate with the third node.
  • the method for determining the third node by the second node is the same as the method for determining the second node by the first node in 102, and details are not described herein again.
  • the third node corresponds to R3 in FIG.
  • the second node generates the second synchronization detection request message according to the first synchronization detection request message and the clock topology information of the second node.
  • the second node may add an ID of the second node to the first synchronization detection request message to generate the second synchronization detection request message.
  • the second node may add the ID of the second node and the clock port list of the second node to the first synchronization detection request message, and generate the second synchronization detection. Request message.
  • the third node is a clock tracking node of the second node.
  • the clock tracking node of the second node is a node for directly providing a clock synchronization signal to the second node.
  • the second node sends the second synchronization detection request message to the third node.
  • the second node sends the second synchronization detection request message to the third node by using the port for transmitting a clock synchronization signal.
  • the port for transmitting a clock synchronization signal is a port on the second node capable of transmitting a clock synchronization signal with the third node, that is, a port on the second node that receives the clock synchronization signal.
  • the second node is configured according to the first synchronization type and the usage in the second synchronization detection request message. Determining, by the port transmitting the clock synchronization signal, a port for transmitting the frequency synchronization signal, and then the second node transmitting the second synchronization detection request to the third node by using the port for transmitting the frequency synchronization signal Message.
  • the port of the second node for transmitting the frequency synchronization signal is a port of the second node for receiving a frequency synchronization signal.
  • the second node If the synchronization type in the second synchronization detection request message is the second synchronization type, the second node according to the second synchronization type in the second synchronization detection request message and used for transmission clock synchronization a port of the signal, the port for transmitting the time synchronization signal is determined, and then the second node transmits the second synchronization detection request message to the third node by using the port for transmitting the time synchronization signal.
  • the port of the second node for transmitting the time synchronization signal is a port of the second node for receiving a time synchronization signal.
  • the third node receives the second synchronization detection request message sent by the second node, and generates a second synchronization detection response message according to the second synchronization detection request message, where the second synchronization detection response is
  • the message includes clock topology information of the third node, clock topology information of the second node, and an ID of the first node.
  • the third node receives the second synchronization detection request message sent by the second node, and determines whether a port that receives the second synchronization detection request message is used to transmit a clock synchronization signal. port. After the third node determines that the port that receives the second synchronization detection request message is the port for transmitting a clock synchronization signal, the third node may generate the second synchronization detection response message.
  • the port of the third node for transmitting the clock synchronization signal is a port of the third node for transmitting a clock synchronization signal.
  • the third node after receiving the second synchronization detection request message, obtains clock topology information of the second node and an ID of the first node from the second synchronization detection request message.
  • the third node generates the second synchronization detection response message according to the clock topology information of the third node, the clock topology information of the second node, and the ID of the first node.
  • the clock topology information of the third node in the second synchronization detection response message may be added after the clock topology information of the second node. That is, the clock topology information of the third node in the second synchronization detection response message is located after the clock topology information of the second node, and the second The clock topology information of the node is located after the ID of the first node.
  • the clock topology information of the third node includes an ID of the third node and a port list of the third node.
  • the port list of the third node includes a port of the third node for receiving a clock synchronization signal and L ports of the third node for transmitting a clock synchronization signal.
  • L is an integer greater than or equal to 1.
  • the third node adds the first synchronization type to the port.
  • the second synchronization detection response message is described.
  • the port of the third node for transmitting the frequency synchronization signal is a port of the third node for transmitting a frequency synchronization signal.
  • the third node adds the second synchronization type to the second Synchronous detection response message.
  • the port of the third node for transmitting the time synchronization signal is a port of the third node for transmitting a time synchronization signal.
  • the third node sends the second synchronization detection response message to the first node.
  • the node that initiates the clock synchronization detection carries the ID of the node that initiated the clock synchronization detection in the synchronization detection request message sent to the third node.
  • the third node sends the second synchronization detection response message to a node that initiates clock synchronization detection.
  • the first node is a node that initiates clock synchronization detection
  • the second synchronization detection request message includes an ID of the first node.
  • the sending, by the third node, the second synchronization detection response message to the node that initiates the clock synchronization detection includes: the third node may send the second synchronization to the first node according to the ID of the first node Detect response message.
  • the first node is not a node that initiates clock synchronization detection
  • the fourth node is a node that initiates clock synchronization detection
  • the second synchronization detection request message includes an ID of the fourth node
  • the second synchronization detection response message includes an ID of the fourth node.
  • the sending, by the second node, the second synchronization detection response message to the node that initiates the clock synchronization detection includes: the second node according to the ID of the fourth node included in the second synchronization detection request message, to the The fourth node sends the second synchronization detection response message.
  • the first node receives the second synchronization detection response message sent by the third node, and according to the clock topology information of the third node included in the second synchronization detection response message, the second Obtaining, by the clock topology information of the node and the ID of the first node, a second synchronization path, where the second synchronization path is a clock synchronization path between the first node and the third node, and the second synchronization path Passing through the second node.
  • R5 may obtain the ID of R5, the clock topology information of R4, and the clock topology information of R3 from the second synchronization detection response message.
  • the clock topology information of R4 includes the ID of R4 and the clock port list of R4.
  • the clock port list of R4 includes the port of R4 for receiving the clock synchronization signal and the port of R4 for transmitting the clock synchronization signal.
  • the clock topology information of R3 includes the ID of R3 and the clock port list of R3.
  • the clock port list of R3 includes the port of R3 for receiving the clock synchronization signal and the port of R3 for transmitting the clock synchronization signal.
  • R5 may determine that the second synchronization path is R3->R4->R5 according to the ID of R4 and the ID of R3.
  • the third node is a clock tracking node of the second node, and the clock tracking node of the second node is a node for directly providing a clock synchronization signal to the second node, that is, a clock tracking node with R3 being R4.
  • the second node is a clock tracking node of the first node, and the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node, that is, a clock tracking of R4 is R5. node.
  • the solid arrow is the sending direction of the synchronous detection request message
  • the dotted arrow is the sending direction of the synchronous detection response message.
  • R5 initiates detection of a clock synchronization path, and synchronous detection response messages generated by R1, R2, R3, and R4 are sent to R5.
  • the dotted arrow of R4 to R5 is the first synchronization detection response message in FIG. 2
  • the dotted arrow of R3 to R5 is the second synchronization detection response message in FIG. 2
  • the solid arrow of R5 to R4 is For the first synchronization detection request message in FIG.
  • R5 can receive the synchronization detection response message sent by R4, R3, R2, and R1, then R5 can obtain a complete clock synchronization path according to these synchronization detection response messages, which can be expressed as R1->R2->R3->R4- >R5.
  • R5 can only get part of the clock synchronization path. For example, R5 can only receive the synchronous detection response message sent by R4 and R3, so it can be inferred that there is a link failure between R3 and R2 or a synchronization failure of the physical port. Further, the clock synchronization path obtained according to R5 can prompt the administrator to detect the failed physical link and port.
  • the first node may use the first synchronization path as a first detection result, and the first detection result is used to indicate between the first node and the second node.
  • the state of the clock synchronization path That is, the process in which the first node obtains the first synchronization path is a process in which the first node obtains the first detection result.
  • the first node generates a first synchronization detection request message, and sends the first synchronization detection request message to the second node.
  • the second node feeds back the first synchronization detection response message to the first node according to the first synchronization detection request message.
  • the first node obtains the first synchronization path according to the first synchronization detection response message, and so on, implements the first node to efficiently obtain the clock synchronization path, and helps determine the node whose clock is not synchronized according to the clock synchronization path.
  • another embodiment of the present invention provides a method for locating a fault on a clock synchronization path.
  • a method for locating a fault on a clock synchronization path according to another embodiment of the present invention will be described with reference to FIG. 2 and FIG. 3.
  • the content overlapping with the content provided in the first embodiment will not be described again, and only the contents different from the method provided in the first embodiment will be described.
  • the second node obtains the first alarm information after detecting that the second node has a physical layer fault.
  • the first alarm information is used to indicate that a node that sends the first synchronization detection response message has a physical layer fault.
  • the generating, by the second node of the first synchronization detection request message, the first synchronization detection response message, the second node, the second node adds the first alarm information to the first synchronization detection response message.
  • the first alarm information further includes an indication value of a specific alarm type such as a synchronization processing hardware failure and a frequency output module failure, and the frequency output module failure includes TR_LOC, HEAD_ERR, HEAD_BAD, BUS_ERR, etc.
  • the first synchronization detection response message includes the second synchronization type
  • the first alarm information further includes synchronization processing hardware.
  • the indication value of the specific alarm type such as the fault and the PTP physical link alarm, includes the ETH_LOS, ETH_LINK_DOWN, and the like.
  • the method further includes: the first node obtaining, according to the first synchronization detection response message, a first alarm message, where the first alarm message is used to notify that a physical layer fault exists.
  • the first alarm information includes an ID of the second node.
  • the ID of the second node may be derived from clock topology information of the second node.
  • the first detection result obtained by the first node includes a first synchronization path and the first alarm message.
  • the first synchronization path obtained by the first node is the same as the first synchronization path in the first embodiment, and details are not described herein again.
  • the first node obtains the first alarm message according to the first synchronization detection response message, and the first node determines, according to the first alarm information included in the first synchronization detection response message,
  • the second node has a physical layer fault; the first node generates the first alarm message according to the ID of the second node that is included in the first synchronization detection response message, where the first alarm message includes the The ID of the second node.
  • R5 may first detect whether there is a physical layer fault on the local node, and if yes, output a first alarm message for advertising that the R5 has a physical layer fault. If there are multiple synchronization detection response messages carrying the first alarm information in the synchronization detection response message received by the R5, the R5 may output the first alarm message in the order of the nodes on the clock synchronization path. For example, if R4 and R3 all have the physical layer fault, R5 may first output a first alarm message for announcing that R3 has a physical layer fault. After the R3 physical layer fault is removed, the R5 may output a first alarm message for announcing that the R4 has a physical layer fault.
  • yet another embodiment of the present invention provides another method for locating a fault.
  • the content overlapping with the content provided in the foregoing embodiment will not be described again, and only the content different from the method provided in the foregoing embodiment will be described.
  • the second node obtains the second alarm message after detecting that the clock source of the second node is abnormal.
  • the second alarm information is used to indicate that the node that sends the first synchronization detection response message detects that its clock source is abnormal.
  • the second node of 103 according to the first same
  • the step of detecting the request message, the generating the first synchronization detection response message further includes: adding, by the second node, the second alarm information to the first synchronization detection response message.
  • the second alarm information includes a frequency input reference source loss, such as SYNC_C_LOS, EXT_SYNC_LOS, LTI, etc.; clock loss, such as CLK_LOCK_FAIL; ESMC message Loss, for example, SSM_PKT_LOS, etc.; current reference source FREQ violation, such as SYN_BAD, etc.; frequency input reference source SSM level degradation and other specific abnormal type indication values, such as S1_SYN_CHANGE.
  • a frequency input reference source loss such as SYNC_C_LOS, EXT_SYNC_LOS, LTI, etc.
  • clock loss such as CLK_LOCK_FAIL
  • ESMC message Loss for example, SSM_PKT_LOS, etc.
  • current reference source FREQ violation such as SYN_BAD, etc.
  • frequency input reference source SSM level degradation and other specific abnormal type indication values such as S1_SYN_CHANGE.
  • the second alarm information includes a 1PPS+TOD input loss, such as EXT_TIME_LOC, etc.; time loss, such as TIME_LOCK_FAIL, etc.; PTP input degradation, such as PTPSRC_CLKCLS_DEC, etc. ; Announce message loss, such as PTP_PKT_LOS; etc.; Sync or Delay_Resp message loss and other specific exception type indication value.
  • a 1PPS+TOD input loss such as EXT_TIME_LOC, etc.
  • time loss such as TIME_LOCK_FAIL, etc.
  • PTP input degradation such as PTPSRC_CLKCLS_DEC, etc.
  • Announce message loss such as PTP_PKT_LOS; etc.
  • Sync or Delay_Resp message loss and other specific exception type indication value such as PTP_PKT_LOS.
  • the method further includes: the first node obtaining a second alarm message according to the first synchronization detection response message, where the second alarm message is used to notify the second
  • the node has a clock source exception
  • the second alarm message includes an ID of the second node.
  • the ID of the second node may be derived from clock topology information of the second node.
  • the first detection result obtained by the first node includes a first synchronization path and the second alarm message.
  • the first synchronization path obtained by the first node is the same as the first synchronization path in the first embodiment, and details are not described herein again.
  • the first detection result obtained by the first node may further include the first alarm message in the foregoing embodiment.
  • the first node obtains the second alarm message according to the first synchronization detection response message, and the first node determines, according to the second alarm information that is included in the first synchronization detection response message, The clock source of the second node is abnormal; the first node generates the second alarm message according to the ID of the second node that is included in the first synchronization detection response message, where the second alarm message includes the The ID of the second node.
  • R5 may first output a second alarm message for announcing that the clock source is abnormal in R2.
  • R5 can wait for the clock source of R2 to be abnormally eliminated, and then detect whether the faults of R3 and R4 are eliminated, and output a second alarm message for notifying that there is a clock source abnormality if the fault of R3 or R4 is not eliminated. This will not be illustrated one by one here.
  • the alarm is generated in the clock synchronization path of the first node.
  • the node implements fault detection, which facilitates the administrator to handle alarms or faults in a timely manner.
  • yet another embodiment of the present invention provides another method that can be used to determine performance degradation.
  • the content overlapping with the content provided in the foregoing embodiment will not be described again, and only the content different from the method provided in the foregoing embodiment will be described.
  • the method further includes: after the second node detects that the frequency offset performance of the second node is degraded, obtaining performance monitoring information.
  • the performance monitoring information is used to indicate a frequency offset performance of a node of the first synchronization detection response message.
  • the method further includes: the first node obtaining, according to the first synchronization detection response message, a performance abnormality message, where the performance abnormality message is used to notify that the frequency offset performance is degraded.
  • the node the performance exception message includes an ID of the second node.
  • the ID of the second node may be derived from clock topology information of the second node.
  • the first detection result obtained by the first node includes a first synchronization path and the performance abnormality message.
  • the first synchronization path obtained by the first node is the same as the first synchronization path in the first embodiment, and details are not described herein again.
  • the obtaining, by the first node, the performance abnormality message according to the first synchronization detection response message further includes: the first node includes the sex according to the first synchronization detection response message The information can be monitored to determine that the frequency offset performance of the second node is degraded; the first node generates the performance abnormality message according to the ID of the second node included in the first synchronization detection response message, the performance The exception message includes the ID of the second node.
  • R5 In the network scenario shown in Figure 3, if R5 itself has a situation in which the frequency offset performance is degraded, it has not been alarmed. R5 analyzes the received synchronization detection response message one by one, and if the synchronization detection response message from R4 and R3 includes performance monitoring information indicating frequency offset performance degradation, the synchronization detection response message from R2 and R1 does not include The performance monitoring information indicating the degradation of the frequency offset performance, the R5 outputs a performance abnormality message for announcing that the R3 has a frequency offset performance degradation. After the frequency offset performance of R5 is restored to normal, re-monitor whether the frequency offset performance of R4 and R5 is normal. If it is normal, the problem of frequency offset performance degradation is solved. On the other hand, R5 refers to the elimination method of the frequency offset performance degradation of R3, and eliminates the problem of deterioration of the frequency offset performance hop by hop.
  • the node having the performance abnormality in the clock synchronization path of the first node is analyzed, and the clock is implemented. Performance detection of nodes on the synchronization path, which facilitates administrators to handle performance anomalies in a timely manner.
  • the various embodiments described above for locating faults and embodiments for determining performance degradation may be considered as separate embodiments. If the above various embodiments for locating faults and the embodiment for determining performance degradation are as separate embodiments, the plurality of embodiments do not include the first synchronization path in the first embodiment, such as 105 and 110. Accordingly, the various embodiments are intended to add to the various embodiments described above for locating faults and the added content for embodiments for determining performance degradation.
  • FIG. 4 is a schematic flowchart diagram of a method for detecting a clock synchronization path according to Embodiment 2 of the present invention. As shown in FIG. 4, the method provided in Embodiment 2 of the present invention may include the following contents of 201-211.
  • the first node determines whether to track the clock tracking node of the first node.
  • the embodiment of the present invention is a clock synchronization path detection initiated by the root node R1 to the leaf node. Therefore, the first node in the embodiment of the present invention is R1 in FIG. Before the first node generates the first synchronization detection request message, the first node needs to determine whether to initiate detection of a clock synchronization path.
  • the first node determines whether to initiate detection of a clock synchronization path by determining whether to track the clock tracking node of the first node.
  • the clock tracking node of the first node is a node for directly providing a clock synchronization signal to the first node.
  • the first node may determine to track the clock tracking node of the first node by checking that the device locking state is locked.
  • the first node determines, according to the port of the first node that receives the clock synchronization signal, whether to track the clock tracking node of the first node. If the port of the first node for receiving the clock synchronization signal is connected to the BITS, it is determined that the first node tracks the BITS.
  • the execution 202 After the first node determines to track the clock tracking node of the first node, the execution 202 generates a first synchronization detection request.
  • the clock source of the R1 is BITS, and the first node can serve as a clock tracking node of the second node, and provide a clock synchronization signal to the second node.
  • the clock tracking node of the second node is a node for directly providing a clock synchronization signal to the second node
  • the first node determines to track the clock tracking node of the first node, generate a first synchronization detection request message, where the first synchronization detection request message includes an ID of the first node.
  • the first synchronization detection request message further includes a port list of the first node.
  • the port list of the first node includes a port of the first node for receiving a clock synchronization signal and N ports for transmitting a clock synchronization signal.
  • N is an integer greater than or equal to 1.
  • the port in the port list of the first node may be recorded in the form of an identifier of the port.
  • the identifier of the port may be a port name, a port number, and the like, which can uniquely identify the port, and is not illustrated here.
  • the port can be a physical port or a logical port.
  • the clock synchronization signal is derived from the BITS in FIG.
  • the first node sends the first synchronization detection request message to a second node.
  • the first node sends the first synchronization detection request message by using a port of the first node that sends a clock synchronization signal. If the first node transmits the end of the clock synchronization signal
  • the port can communicate with the second node, that is, the first node is a clock tracking node of the second node, and the first node can send the first node through a port of the first node that sends a clock synchronization signal
  • a clock synchronization detection request message is sent to the second node. That is, R1 can transmit the first synchronization detection request message to R2 in FIG. 5 by the port transmitting the clock synchronization signal.
  • the first node is a clock tracking node of the second node, and the port of the first node for transmitting a clock synchronization signal is used by the first node to send a clock synchronization signal.
  • the first synchronization type in the first synchronization detection request message is the first synchronization type
  • the first synchronization type is used to indicate frequency synchronization
  • the first synchronization detection request message is used to request to detect the frequency synchronization path
  • Determining, by the first node, a port for transmitting a frequency synchronization signal according to the first synchronization type in the first synchronization detection request message and the port for transmitting a clock synchronization signal and then the first node Transmitting, by the port for transmitting a frequency synchronization signal, the first synchronization detection request message to the second node.
  • the port for transmitting the frequency synchronization signal is a port for transmitting a frequency synchronization signal.
  • the synchronization type in the first synchronization detection request message is the second synchronization type
  • the second synchronization type is used to indicate time synchronization
  • the first synchronization detection request message is used to request to detect the time synchronization path
  • Determining, by the first node, a port for transmitting a time synchronization signal according to the second synchronization type in the first synchronization detection request message and a port for transmitting a clock synchronization signal Determining, by the first node, a port for transmitting a time synchronization signal according to the second synchronization type in the first synchronization detection request message and a port for transmitting a clock synchronization signal, and then the first node passes the The port for transmitting the time synchronization signal sends the first synchronization detection request message to the second node.
  • the port for transmitting the time synchronization signal is a port for transmitting a time synchronization signal.
  • the second node receives the first synchronization detection request message sent by the first node, and generates a first synchronization detection response message according to the first synchronization detection request message, where the first synchronization detection response is
  • the message includes clock topology information of the second node and an ID of the first node.
  • the second node sends the first synchronization detection response message to the first node.
  • the first node receives the first synchronization detection response message sent by the second node, and according to the clock topology information of the second node that is included in the first synchronization detection response message, and the first The ID of the node obtains a first synchronization path, and the first synchronization path is a clock synchronization path between the first node and the second node.
  • R1 may obtain the ID of R1 and the clock topology information of R2 from the first synchronization detection response message.
  • the clock topology information of R2 includes the ID of R2 and the clock port list of R2.
  • the clock port list of R2 includes the port of R2 for receiving the clock synchronization signal and the port of R2 for transmitting the clock synchronization signal.
  • R1 may determine that the first synchronization path is R1->R2 according to the ID of R1 and the ID of R2.
  • the first node is a clock tracking node of the second node, that is, a clock tracking node where R1 is R2.
  • the second node is not the last node of the clock synchronization path, that is, the second node has a port that sends a clock synchronization signal, and the second node is not a node that connects the BTS, then the embodiment
  • the method provided for detecting the clock synchronization path further includes the contents of 206 to 210.
  • the second node determines that a third node exists, and generates a second synchronization detection request message, where the third node is a node that can transmit a clock synchronization signal with the second node, where the second synchronization detection request message includes The ID of the first node and the clock topology information of the second node.
  • the determining, by the second node, that the third node exists includes: the second node determining, according to the port list of the second node, that the second node has a port that sends a clock synchronization signal, and the second node Not a node that connects to the BTS.
  • the port of the second node transmitting the clock synchronization signal can communicate with the third node.
  • the method for determining the third node by the second node is the same as the method for determining the second node by the first node in 202, and details are not described herein again.
  • the third node corresponds to R3 in FIG.
  • the second node generates the second synchronization detection request message according to the first synchronization detection request message and the clock topology information of the second node. Specifically, the second node may add the ID of the second node and the clock port list of the second node to the first synchronization detection request message to generate the second synchronization detection request message.
  • the second The node is a clock tracking node of the third node.
  • the clock tracking node of the third node is a node for directly providing a clock synchronization signal to the third node.
  • the second node sends the second synchronization detection request message to the third node.
  • the port for transmitting the clock synchronization signal is a port on the second node capable of transmitting a clock synchronization signal with the third node, that is, a port for transmitting the clock synchronization signal on the second node; a port for transmitting a frequency synchronization signal of the second node is a port for transmitting a frequency synchronization signal of the second node; the second node
  • the port for transmitting the time synchronization signal is a port of the second node for transmitting a time synchronization signal.
  • the third node receives the second synchronization detection request message sent by the second node, and obtains a second synchronization detection response message according to the second synchronization detection request message, where the second synchronization detection response is sent.
  • the message includes clock topology information of the third node, clock topology information of the second node, and an ID of the first node.
  • the third node sends the second synchronization detection response message to the first node.
  • the first node receives the second synchronization detection response message sent by the third node, and according to the clock topology information of the third node included in the second synchronization detection response message, the second Obtaining, by the clock topology information of the node and the ID of the first node, a second synchronization path, where the second synchronization path is a clock synchronization path between the first node and the third node, and the second synchronization path Passing through the second node.
  • R1 may obtain the ID of R1, the clock topology information of R2, and the clock topology information of R3 from the second synchronization detection response message.
  • the clock topology information of R2 includes the ID of R2 and the clock port list of R2.
  • the clock port list of R2 includes the port of R2 for receiving the clock synchronization signal and the port of R2 for transmitting the clock synchronization signal.
  • the clock topology information of R3 includes the ID of R3 and the clock port list of R3.
  • R3's clock port list includes R3's for receiving clock synchronization signals. The port and the port of R3 used to send the clock synchronization signal.
  • R1 may determine that the second synchronization path is R1->R2->R3 according to the ID of R2 and the ID of R3.
  • the second node is a clock tracking node of the third node, that is, a clock tracking node where R2 is R3, and the first node is a clock tracking node of the second node, that is, a clock tracking node where R1 is R2.
  • the solid arrow is the transmission direction of the synchronization detection request message
  • the dotted arrow is the transmission direction of the synchronization detection response message.
  • R1 initiates detection of a clock synchronization path
  • synchronous detection response messages generated by R2, R3, R4, and R5 are sent to R1.
  • the dotted arrow of R2 to R1 is the first synchronization detection response message in FIG. 4
  • the dotted arrow of R3 to R1 is the second synchronization detection response message in FIG. 4
  • the solid arrow of R1 to R2 is For the first synchronization detection request message in FIG.
  • R1 can receive the synchronization detection response message sent by R2, R3, R4, and R5, R1 can obtain a complete clock synchronization path according to these synchronization detection response messages, which can be expressed as R1->R2->R3->R4- >R5.
  • R1 can only get part of the clock synchronization path. For example, R1 can only receive the synchronization detection response message sent by R2 and R3, so it can be inferred that there is a link failure between R3 and R4. Further, the clock synchronization path obtained according to R1 can prompt the administrator to detect the failed physical link.
  • the first node may use the first synchronization path as a first detection result, and the first detection result is used to indicate clock synchronization between the first node and the second node.
  • the first node generates a first synchronization detection request message, and sends the first synchronization detection request message to the second node.
  • the second node feeds back the first synchronization detection response message to the first node according to the first synchronization detection request message.
  • the first node obtains the first synchronization path according to the first synchronization detection response message, and so on, implements the first node to efficiently obtain the clock synchronization path, and helps determine the node whose clock is not synchronized according to the clock synchronization path.
  • another embodiment of the present invention provides a method for locating a fault on a clock synchronization path.
  • a method for locating a fault on a clock synchronization path provided by another embodiment of the present invention will be described with reference to FIG. 4 and FIG. 5.
  • the content overlapping with the content provided in the first embodiment and the second embodiment will not be described again, and only the contents different from the methods provided in the first embodiment and the second embodiment will be described.
  • the second node obtains the first alarm information after detecting that the second node has a physical layer fault.
  • the first alarm information is used to indicate that a node that sends the first synchronization detection response message has a physical layer fault.
  • the generating, by the second node of the second synchronization detection request message, the first synchronization detection response message, the second node further includes: adding, by the second node, the first alarm information to the first synchronization detection response message.
  • the method further includes: the first node obtaining, according to the first synchronization detection response message, a first alarm message, where the first alarm message is used to notify that there is a physical layer fault. Node.
  • R1 may first detect whether the local node has a physical layer fault, and if yes, output a first alarm message for advertising that the physical layer fault exists in R1. If there are multiple synchronization detection response messages carrying the first alarm information in the synchronization detection response message received by R1, R1 may output the first alarm message in sequence with reference to the nodes on the clock synchronization path. For example, if both R2 and R3 have the physical layer fault, R1 may first output a first alarm message for announcing that R2 has a physical layer fault. After the R2 physical layer fault is eliminated, the first alarm message is sent to notify the R3 that there is a physical layer fault.
  • yet another embodiment of the present invention provides another method for locating a fault.
  • the content overlapping with the content provided in the first embodiment and the second embodiment will not be described again, and only the contents different from the methods provided in the first embodiment and the second embodiment will be described.
  • the second node obtains a second alarm message after detecting that the clock source of the second node is abnormal.
  • the second alarm information is used to indicate that the node that sends the first synchronization detection response message detects that its clock source is abnormal.
  • the method further includes: the first node obtaining a second alarm message according to the first synchronization detection response message, where the second alarm message is used to notify the second The node has a clock source exception, and the second alarm message includes an ID of the second node.
  • R1 may first output a second alarm message for announcing that the clock source is abnormal. After the clock source of R2 is abnormally eliminated, the fault of R3 and R4 is detected to be eliminated, and the second alarm message for notifying that the clock source is abnormal is output when the fault of R3 or R4 is not eliminated. This will not be illustrated one by one here.
  • the alarm is generated in the clock synchronization path of the first node.
  • the node implements fault detection, which facilitates the administrator to handle alarms or faults in a timely manner.
  • yet another embodiment of the present invention provides another method that can be used to determine performance degradation.
  • the content overlapping with the content provided in the foregoing embodiment will not be described again, and only the content different from the method provided in the foregoing embodiment will be described.
  • the method further includes: after the second node detects that the frequency offset performance of the second node is degraded, obtaining performance monitoring information.
  • the method further includes: the first node obtaining, according to the first synchronization detection response message, a performance abnormality message, where the performance abnormality message is used to notify that the frequency offset performance is degraded.
  • the performance exception message includes an ID of the second node.
  • R1 analyzes the received synchronization detection response messages one by one, if from R2 and R3.
  • the synchronization detection response message includes performance monitoring information indicating frequency offset performance degradation
  • the synchronization detection response message from R2 and R1 does not include performance monitoring information indicating frequency offset performance degradation
  • the R1 output is used to announce that R2 has frequency offset performance. Degraded performance exception message.
  • the frequency deviation performance of R3 is re-monitored. If it is normal, the frequency offset is normal. The problem of performance degradation is solved.
  • R1 refers to the elimination method of the frequency offset performance degradation of R2, and eliminates the problem of deterioration of the frequency offset performance hop by hop.
  • the node having the performance abnormality in the clock synchronization path of the first node is analyzed, and the clock is implemented. Performance detection of nodes on the synchronization path, which facilitates administrators to handle performance anomalies in a timely manner.
  • the various embodiments described above for locating faults and embodiments for determining performance degradation may be considered as separate embodiments. If the above various embodiments for locating faults and the embodiments for determining performance degradation are as separate embodiments, the plurality of embodiments do not include the first synchronization path, such as 206 and 211. Accordingly, the various embodiments are intended to add to the various embodiments described above for locating faults and the added content for embodiments for determining performance degradation.
  • Embodiment 3 of the present invention provides a method for triggering clock synchronization path detection by a controller.
  • the first node is a controller
  • the second node is R5 in FIG. 3
  • the third node is R3 in FIG. 3.
  • the method provided in Embodiment 3 of the present invention is not described herein again. For details, refer to the method provided in Embodiment 1.
  • Embodiment 4 of the present invention provides a method for triggering clock synchronization path detection by a controller.
  • the first node is a controller
  • the second node is R1 in FIG. 5
  • the third node is R2 in FIG. 5.
  • the method provided in Embodiment 4 may omit 201 and 202 on the basis of the method provided in Embodiment 2.
  • the controller further includes the content of the first synchronization detection request generated by the controller.
  • the method for generating the first synchronization detection request by the controller is the same as the method for generating the first synchronization detection request by R1 in the second embodiment, and details are not described herein again.
  • the method provided in the fourth embodiment is the same as that in the second embodiment, and is not described here. For details, refer to the method provided in the second embodiment.
  • FIG. 7 is a schematic structural diagram of a first node according to an embodiment of the present invention.
  • the first node provided in the embodiment corresponding to FIG. 7 may be a node for initiating clock synchronization path detection provided by any one of Embodiments 1 to 4, such as the first node in FIG. 2 or FIG. 4.
  • the first node includes a message generating unit 11, a message sending unit 12, a message receiving unit 13, and a result obtaining unit 14, wherein the message sending unit 12 includes a first port determining unit 121 and a first message.
  • the transmitting unit 122, or the message transmitting unit 12, includes a first port determining unit 123 and a first message transmitting unit 124.
  • the message generating unit 11 is configured to generate a synchronization detection request message, where the synchronization detection request message includes an ID of the first node.
  • the message generating unit 11 is configured to acquire clock topology information of the first node when the first node is a node that initiates clock synchronization detection, where the clock topology information of the first node includes the An identifier ID of a node and a clock port list of the first node, and then the first node generates a synchronization detection request message according to the clock topology information of the first node, so that the synchronization detection request message includes The ID of a node.
  • the specific implementation process of the message generating unit 11 refer to 101 in Embodiment 1 or 202 in Embodiment 2.
  • the message sending unit 12 is configured to send the synchronization detection request message to the second node.
  • the message sending unit 12 sends the synchronization detection request message to the second node by using a port for transmitting a clock synchronization signal, where the port for transmitting the clock synchronization signal is the first node.
  • a port on which a clock synchronization signal can be transmitted with the second node.
  • the synchronization detection request message may include the first synchronization type or the second synchronization type
  • the message transmitting unit has two structures. The first synchronization type is used to indicate frequency synchronization, the synchronization detection request message is used to request detection of a frequency synchronization path, the second synchronization type is used to represent time synchronization, and the synchronization detection request message is used for Request to detect the time synchronization path.
  • the message sending unit 12 includes:
  • the first port determining unit 121 is configured to determine, according to the first synchronization type in the synchronization detection request message and the port for transmitting a clock synchronization signal, a port for transmitting a frequency synchronization signal, where The port transmitting the frequency synchronization signal is a port on the first node capable of transmitting a frequency synchronization signal with the second node.
  • the first message sending unit 122 is configured to send the synchronization detection request message to the second node by using the port for transmitting the frequency synchronization signal determined by the first port determining unit.
  • the message sending unit 12 includes:
  • a second port determining unit 123 configured to perform, according to the second synchronization in the synchronization detection request message a step type and a port for transmitting a clock synchronization signal, determining a port for transmitting a time synchronization signal, wherein the port for transmitting the time synchronization signal is capable of transmitting a time synchronization signal with the second node on the first node Port.
  • the second message sending unit 124 is configured to send the synchronization detection request message to the second node by using the port for transmitting a time synchronization signal determined by the second port determining unit.
  • the message receiving unit 13 is configured to receive a first synchronization detection response message sent by the second node, where the first synchronization detection response message includes clock topology information of the second node and an ID of the first node.
  • a result obtaining unit 14 configured to obtain, according to the first synchronization detection response message, a first detection result, where the first detection result is used to indicate a state of a clock synchronization path between the first node and the second node .
  • the path obtaining unit 14 extracts the second node included in the first synchronization detection response message according to the first synchronization detection response message sent by the second node received by the message receiving unit 13 The clock topology information and the ID of the first node, and then acquiring a first synchronization path according to the clock topology information of the second node and the clock topology information of the first node, corresponding to FIG. 3, the first synchronization path That is, R4->R5, the second node is a clock tracking node of the first node, that is, R4 is a clock tracking node of R5; corresponding to FIG.
  • the first synchronization path is R1->R2
  • the second node is a clock tracking node of the first node, that is, a clock tracking node where R1 is R2.
  • the first node may use the first synchronization path as a first detection result.
  • the message receiving unit 13 is further configured to receive a second synchronization detection response message sent by the third node, where the second synchronization detection response message includes a clock topology of the third node.
  • the result obtaining unit 14 is further configured to obtain a second detection result according to the second synchronization detection response message, where the second The detection result is used to indicate a state of a clock synchronization path between the first node and the third node, and a clock synchronization path between the first node and the third node passes through the second node.
  • the first node further includes a determining unit 10, where the determining unit 10 is configured to determine whether the clock tracking node of the first node is tracked; the message generating unit 11 is further configured to determine by the determining unit. After tracking to the clock tracking node of the first node, the synchronization detection request message is generated.
  • the first detection result includes a first synchronization path
  • the first synchronization path is a clock synchronization path of the first node and the second node
  • clock topology information of the second node includes the The ID of the second node is used to obtain the first synchronization path according to the ID of the second node and the ID of the first node that are included in the first synchronization detection response message.
  • the first node generates a first synchronization detection request message, and sends the first synchronization detection request message to the second node.
  • the second node feeds back the first synchronization detection response message to the first node according to the first synchronization detection request message.
  • the first node obtains the first synchronization path according to the first synchronization detection response message, and so on, implements the first node to efficiently obtain the clock synchronization path, and helps determine the node whose clock is not synchronized according to the clock synchronization path.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes first alarm information, where the first alarm information is used to indicate that the first A node detecting a response message has a physical layer fault
  • the first detection result further includes a first alarm message, where the first alarm message is used to notify a node that has a physical layer fault.
  • the result obtaining unit 14 is specifically configured to determine, according to the first alarm information included in the first synchronization detection response message, that the second node has a physical layer fault, and according to the first synchronization detection response message, The ID of the second node generates the first alarm message, where the first alarm message includes an ID of the second node.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes second alarm information, where the second alarm information is used to indicate that the first A node of the synchronization detection response message detects that its clock source is abnormal.
  • the first detection result includes or further includes a second alarm message, and the second alarm message is used to notify a node whose clock source is abnormal.
  • the result obtaining unit 14 is specifically configured to: according to the first synchronization detection response message Determining, by the second alarm information, that the clock source of the second node is abnormal, and generating the second alarm message according to the ID of the second node that is included in the first synchronization detection response message, the second alarm The message includes the ID of the second node.
  • the alarm is generated in the clock synchronization path of the first node.
  • the node implements fault detection, which facilitates the administrator to handle alarms or faults in a timely manner.
  • the clock topology information of the second node includes an ID of the second node
  • the first synchronization detection response message further includes performance monitoring information, where the performance monitoring information is used to determine the first synchronization detection.
  • the first detection result includes or further includes a performance abnormality message, where the performance abnormality message is used to notify the node that the frequency offset performance is degraded.
  • the result obtaining unit 14 is specifically configured to determine, according to the performance monitoring information included in the first synchronization detection response message, a frequency offset performance degradation of the second node, and according to the first synchronization detection response message, The ID of the second node generates the performance abnormality message, where the performance abnormality message includes an ID of the second node.
  • the node having the performance abnormality in the clock synchronization path of the first node is analyzed, and the clock is implemented. Performance detection of nodes on the synchronization path, which facilitates administrators to handle performance anomalies in a timely manner.
  • FIG. 8 is a schematic structural diagram of a second node, where the second node includes a request message receiving unit 21, a response message generating unit 22, and a response message sending unit 23, where the response is
  • the message generating unit 22 includes a port judging unit 221 and a message generating unit 222, which are not indicated in FIG.
  • the request message receiving unit 21 is configured to receive a first synchronization detection request message sent by the first node, where the first synchronization detection request message includes clock topology information of the first node.
  • the request message receiving unit 21 receives the first synchronization detection request message sent by the message sending unit 12 of the first node. If the first node is a node that initiates clock synchronization detection, then the The clock topology information of a node includes only the ID of the first node; if the first node is not the node that initiates clock synchronization detection, the clock topology information of the first node includes the ID and location of the first node. A list of ports of the first node.
  • the response message generating unit 22 is configured to generate a synchronization detection response message according to the first synchronization detection request message, where the synchronization detection response message includes clock topology information of the second node and clock topology information of the first node. .
  • the response message generating unit includes a port judging unit 221 and a message generating unit 222.
  • the port determining unit 221 is configured to determine whether the port that the request message receiving unit receives the first synchronization detecting request message is a port for transmitting a clock synchronization signal.
  • the message generating unit 222 is configured to generate the synchronization detection response message after determining that the port that receives the first synchronization detection request message is the port for transmitting a clock synchronization signal.
  • the port determining unit 221 is configured to determine that the port that receives the first synchronization detection request message is a port for transmitting a frequency synchronization signal.
  • the message generating unit 222 is configured to add a first synchronization type to the synchronization detection response message, where the first synchronization type is used to indicate frequency synchronization, and the first synchronization detection request message is used to request a frequency synchronization path. Test.
  • the port determining unit 221 is configured to determine that the port that receives the first synchronization detection request message is a port for transmitting a time synchronization signal.
  • the message generating unit 222 is configured to add a second synchronization type to the synchronization detection response message, the second synchronization type is used to indicate time synchronization, and the first synchronization detection request message is used to request to perform a time synchronization path. Detection.
  • the response message sending unit 23 is configured to send the synchronization detection response message.
  • the response message sending unit 23 sends the synchronization detection response message to a node that initiates clock synchronization detection.
  • the first node is a node that initiates clock synchronization detection
  • the clock topology information of the first node is an identifier ID of the first node
  • the response message sending unit 23 detects according to the first synchronization.
  • the ID of the first node included in the request message, the said to the first node The message receiving unit 13 transmits the synchronization detection response message.
  • the first synchronization detection request message further includes clock topology information of the fourth node
  • the synchronization detection response message further includes clock topology information of the fourth node
  • the clock topology information of the fourth node is The ID of the fourth node is the node that initiates the clock synchronization detection
  • the response message sending unit 23 sends the ID of the fourth node according to the first synchronization detection request message to the The four nodes send the synchronization detection response message.
  • the second node further includes: a node determining unit 24, a request message generating unit 25, and a request message sending unit 26.
  • the node determining unit 24 is configured to determine that there is a third node. That is, the node determining unit 24 determines that the second node is not the last node of the clock synchronization path to be tested, that is, the third node exists.
  • the request message generating unit 25 is configured to generate a second synchronization detection request message according to the first synchronization detection request message, where the third node is a node capable of transmitting a clock synchronization signal with the second node, and the second The synchronization detection request message includes clock topology information of the first node and clock topology information of the second node.
  • the request message sending unit 26 is configured to send the second synchronization detection request message to the third node.
  • the request message sending unit 26 sends the second synchronization to the third node by using a port for receiving a clock synchronization signal. And detecting a request message, where the port for receiving the clock synchronization signal is a port on the second node that receives the clock synchronization signal provided by the third node. If the second node is a clock tracking node of the third node, the request message sending unit 26 sends the second synchronization detection request message to the third node by using a port for sending a clock synchronization signal. .
  • the first synchronization detection request message sent by the first node is received, and a synchronization detection response message is generated according to the first synchronization detection detection request message, and the synchronization detection response message is sent to the first node or the clock synchronization detection is initiated.
  • the node is such that the first node or the node that initiates clock synchronization detection efficiently obtains the clock synchronization path, and the node that facilitates the first node or initiates clock synchronization detection determines the node whose clock is not synchronized according to the clock synchronization path.
  • the second node further includes:
  • the first adding unit 27 is configured to: after detecting that the second node has a physical layer fault, add the first alarm information to the synchronization detection response message, where the first alarm information is used to indicate that the synchronization detection response is sent. There is a physical layer failure in the node of the message.
  • the second node further includes:
  • the second adding unit 28 is configured to: after detecting that the clock source of the second node is abnormal, add the second alarm information to the synchronization detection response message, where the second alarm information is used to indicate that the synchronization detection response is sent.
  • the second node further includes:
  • the performance information adding unit 29 is configured to: after detecting that the frequency offset performance of the second node is degraded, adding performance monitoring information to the synchronization detection response message, where the performance monitoring information is used to indicate the first synchronization detection response The frequency offset performance of the node of the message deteriorates.
  • the embodiment of the present invention can feed back fault information or abnormality information or performance degradation information to the first node when detecting that the second node has a fault or abnormality or performance degradation, so that the first node notifies the administrator to process in time.
  • the first node shown in FIG. 7 and the second node shown in FIG. 8 are used to implement the contents of Embodiments 1 to 4 of the present invention.
  • FIG. 9 is a schematic structural diagram of another first node according to an embodiment of the present invention.
  • the first node includes: at least one processor 901, such as a CPU, at least one communication bus 902, and communication.
  • the communication bus 902 is used to implement connection communication between these components.
  • the communication interface 903 can be a 1PPS+TOD interface and an Ethernet interface for establishing a communication connection between the first node and the base station BTS, or for establishing a connection with the building integrated timing system BITS.
  • the memory 906 may be a high speed RAM memory or a non-volatile memory such as at least one disk memory.
  • the processor 901 may include a determining unit, a message generating unit, and a result obtaining unit.
  • the determining unit corresponds to the determining unit 10 in FIG. 7 for performing 201 in the second embodiment, or It is used to execute the clock tracking node in the 101 in the first embodiment to determine whether to track the first node.
  • the message generating unit corresponds to the message generating unit 11 in FIG. 7 for performing 101 in the first embodiment, or for executing the first synchronization detecting request message in 201 in the second embodiment.
  • the result obtaining unit corresponds to the result obtaining unit 14 in FIG. 7 for performing 105 in the first embodiment, or 206 in the second embodiment.
  • the input device 904 includes a message receiving unit, which corresponds to the message receiving unit 13 in FIG. 7. For a specific implementation manner, refer to the detailed description of the message receiving unit 13 in the first node shown in FIG. 7.
  • the input device 904 can be a communication interface having a receiving function in a communication interface.
  • the output device 905 includes a message sending unit, which corresponds to the message sending unit 12 in FIG. 7. For a specific implementation manner, refer to the detailed description of the message sending unit 12 in the first node shown in FIG. 7.
  • the output device 905 can be a communication interface having a transmitting function in the communication interface.
  • FIG. 10 is a schematic structural diagram of another second node according to an embodiment of the present invention.
  • the first node includes: at least one processor 1001, such as a CPU, at least one communication bus 1002, and communication.
  • the interface 1003 is an input device 1004, an output device 1005, and a memory 1006.
  • the second node is a device in the mobile bearer network and is not connected to the BTS and the BITS.
  • the communication bus 1002 is used to implement connection communication between these components.
  • the communication interface 1003 is an interface for transmitting 1588V2 messages.
  • the interface of the communication interface 1003 is different in different bearer networks or transport networks, and may be a 1PPS+TOD interface or other interfaces, as the case may be.
  • the memory 1006 may be a high speed RAM memory or a non-volatile memory such as at least one disk memory.
  • the processor 1001 may include a response message generating unit, a node determining unit, a request message generating unit, a first adding unit, a second adding unit, and a performance information adding unit.
  • the response message generating unit corresponds to the response message generating unit 22 in FIG. 8 for performing 103 in the first embodiment, or 204 in the second embodiment.
  • the node determining unit 24 corresponds to the node determining unit 24 in FIG.
  • the request message generating unit corresponds to the request message generating unit 25 in FIG. 8, and the node determining unit and the request message generating unit are configured to execute 106 in the first embodiment, or 207 in the second embodiment.
  • the units respectively correspond to the first adding unit 27, the second adding unit 28, and the performance information adding unit 29 in FIG. 8, are executed when the response message generating unit generates a synchronization detecting response message, or are generated in the response message generating unit Execute after the synchronization detection response message.
  • the input device 1004 includes a request message receiving unit, and the request message receiving unit corresponds to the request message receiving unit 21 in FIG. 8. For specific implementation, refer to the request message receiving in the second node shown in FIG. A detailed description of unit 21.
  • the input device 1004 may be a communication interface having a receiving function in a communication interface.
  • the output device 1005 includes a response message sending unit and a request message sending unit, and the response message sending unit corresponds to the response message sending unit 23 in FIG. 8 for executing 104 in the first embodiment, or the second embodiment. 205 in.
  • the request message sending unit corresponds to the request message sending unit 26 in FIG. 8 for performing 107 in the first embodiment, or 208 in the second embodiment.
  • the output device 1005 may be a communication interface having a transmitting function in a communication interface.
  • first node shown in FIG. 9 and the second node shown in FIG. 10 are used to implement the content described in Embodiments 1 to 4 of the present invention.
  • the embodiment of the invention further provides a system for detecting a clock synchronization path, the system comprising the first node described in FIG. 7 or FIG. 9 and the second node described in FIG. 8 or FIG.
  • one network node is a clock tracking node of another network node, indicating that the one network node is a node that directly provides a clock synchronization signal to the other network node. If frequency synchronization is between the one network node and the another network node, the one network node is a clock tracking node of the another network node, indicating that the one network node is the another network A locked node, and the one network node directly provides a frequency synchronization signal to the other network node.
  • the another network node may receive the frequency synchronization signal sent by the one network node through the port identified as master through its own port identified as slave.
  • the above general purpose processor may be a microprocessor or the processor or any conventional processor.
  • the steps of the method disclosed in the embodiment of the present invention may be directly implemented as a hardware processor, or may be performed by a combination of hardware and software modules in the processor.
  • the code that implements the above functions can be stored in a computer readable medium.
  • Computer readable media includes computer storage media.
  • a storage medium may be any available media that can be accessed by a computer.
  • the computer readable medium may be a random access memory (English full name is random access memory, abbreviated as RAM), read-only memory (English full name is read-only memory, English abbreviation for ROM), Electrical erasable programmable read-only memory (English full name electrically erasable programmable read-only memory, abbreviated as EEPROM), read-only optical disc (English full name compact disc read-only memory, English abbreviation for CD-ROM) or other disc
  • RAM random access memory
  • read-only memory English full name is read-only memory, English abbreviation for ROM
  • Electrical erasable programmable read-only memory English full name electrically erasable programmable read-only memory, abbreviated as EEPROM
  • read-only optical disc English full name compact disc read-only memory, English abbreviation for CD-ROM
  • the computer readable medium may be a compact disc (English full name compact disc, abbreviated as CD), a laser disc, a digital video disc (English full name digital video disc, abbreviated as DVD), a floppy disk or a Blu-ray disc.

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Health & Medical Sciences (AREA)
  • Cardiology (AREA)
  • General Health & Medical Sciences (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Mobile Radio Communication Systems (AREA)

Abstract

本申请提供一种用于检测时钟同步路径的方法、节点及系统,其中方法包括如下:第一节点生成同步检测请求消息,并将同步检测请求消息发送至第二节点,同步检测请求消息包括第一节点的标识符ID;第二节点根据同步检测请求消息生成同步检测响应消息,并将所述同步检测响应消息发送至第一节点,同步检测响应消息包括第二节点的时钟拓扑信息和第一节点的ID;第一节根据同步检测响应消息,获得第一检测结果,第一检测结果用于表示第一节点与第二节点间的时钟同步路径的状态。本发明实施例能够有助于提高获取时钟同步路径的状态的工作效率。

Description

用于检测时钟同步路径的方法、节点及系统
本申请要求于2015年10月30日提交中国专利局、申请号为CN201510728622.0、发明名称为“用于检测时钟同步路径的方法、节点及系统”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及移动通信技术领域,具体涉及一种用于检测时钟同步路径的方法、节点及系统。
背景技术
在现代通信网络中,大多数电信业务的正常运行要求全网设备之间的频率或相位差异保持在合理的误差水平内,即网络时钟同步的需求。时钟同步包括频率同步和相位同步。频率同步,是指信号之间的频率或相位上保持某种严格的特定关系,即信号之间保持恒定的相位差保持在很小的范围内,例如小于100纳秒。目前,主要的时钟同步技术包括IEEE 1588v2和同步以太(Sync E)。同步以太用于实现频率同步,而1588v2主要用于实现时间同步,也即相位同步。3G以上的移动网络基站从其承载网络中获得时钟同步信号,从而进行频率同步和时间同步。当承载网络中的所有设备都达到了时钟同步,才能保证移动网络的正常同步和业务的正常运行。
移动承载网中,例如分组交换网(Packet Transport Network,PTN)、无线接入网IP化(Internet Protocol Radio Access Network,IP RAN)等,移动承载网中的设备需要与其他网络中的设备进行组网和对接的过程中,会存在对接的两个设备的时钟不同步的问题。目前,通过人工分析对接的两个设备的时钟同步信号来确定是否存在时钟不同步的问题,和/或通过人工分析时钟同步路径上存在故障的节点,效率较低。上述的时钟同步问题也存在于其他对延时要求苛刻的通信网络,例如电力控制网,IEEE 802.1AS低延时以太网等。
发明内容
本发明实施例提供一种用于检测时钟同步路径的方法、节点及系统,有助于提高获取时钟同步路径的状态的工作效率。
本发明实施例第一方面提供一种用于检测时钟同步路径的方法,可应用于移动承载网中。所述移动承载网包括基站(base transceiver station,BTS)、大楼综合定时系统(building integrated timing supply,BITS)以及多个节点。该方法中的第一节点为发起时钟同步检测的节点。该方法包括:
第一节点生成检测请求消息,所述同步检测请求消息包括所述第一节点的标识符(identifier,ID);
所述第一节点向第二节点发送所述同步检测请求消息;
所述第一节点接收所述第二节点发送的第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。
在可能实现的方式中,所述第一节点接收与所述第二节点传输时钟同步信号的第三节点发送的第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID;
所述第一节点根据所述第二同步检测响应消息,获得第二检测结果,所述第二检测结果用于表示所述第一节点与所述第三节点间的时钟同步路径的状态,所述第一节点与所述第三节点间的时钟同步路径经过所述第二节点。
以此类推,所述第一节点可以接收至少两个同步检测响应消息,可以获取至少两个检测结果,其中,每个检测结果用于表示所述第一地点与同步检测响应消息发送节点的时钟同步路径的状态,所述第一节点根据所述至少两 个检测结果可以分析得出所述第一节点的时钟同步路径,进而有助于根据时钟同步路径确定时钟不同步的节点,即不属于所述第一节点所在的时钟同步路径上的节点为时钟不同步的节点。
在可能实现的方式中,所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息,所述用于传输时钟同步信号的端口为所述第一节点上能够与所述第二节点传输时钟同步信号的端口。
在可能实现的方式中,所述同步检测请求消息还包括第一同步类型,所述第一同步类型用于表示频率同步,所述同步检测请求消息用于请求对频率同步路径进行检测,所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息包括:
所述第一节点根据所述同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,所述用于传输频率同步信号的端口为所述第一节点上能够与所述第二节点传输频率同步信号的端口;
所述第一节点通过所述用于传输频率同步信号的端口,向所述第二节点发送所述同步检测请求消息。
在可能实现的方式中,所述同步检测请求消息还包括第二同步类型,所述第二同步类型用于表示时间同步,所述同步检测请求消息用于请求对时间同步路径进行检测,所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息包括:
所述第一节点根据所述同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,所述用于传输时间同步信号的端口为所述第一节点上能够与所述第二节点传输时间同步信号的端口;
所述第一节点通过所述用于传输时间同步信号的端口,向所述第二节点发送所述同步检测请求消息。
在可能实现的方式中,所述第一节点生成同步检测请求消息之前,所述 方法还包括:
所述第一节点判断是否跟踪到所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点;
所述第一节点确定跟踪到所述第一节点的时钟跟踪节点后,执行所述第一节点生成同步检测请求消息。
在可能实现的方式中,所述第一节点在生成所述同步检测请求消息之前,确定所述第一节点是否发起时钟同步检测,可以通过检测所述第一节点是否丢失所述第一节点的时钟源或所述BTS信号是否异常,确定所述第一节点是否发起时钟同步检测。所述第一节点在确定丢失所述第一节点的时钟源或检测到BTS信号存在异常,确定所述第一节点发起时钟同步检测,即所述第一节点生成所述同步检测请求消息。
在可能实现的方式中,所述第一检测结果包括第一同步路径,所述第一同步路径为所述第一节点与所述第二节点的时钟同步路径,所述第二节点的时钟拓扑信息包括所述第二节点的ID;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID和所述第一节点的ID,获得所述第一同步路径。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果还包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
所述第一节点根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的 ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果还包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
所述第一节点根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果还包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
所述第一节点根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
所述第一节点根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
所述第一节点根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
所述第一节点根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;
所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
本发明实施例第二方面提供另一种用于检测时钟同步路径的方法,应用于移动承载网中,所述移动承载网包括BTS、BITS以及多个节点。该方法包 括:
第二节点接收第一节点发送的第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的时钟拓扑信息;
所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息,所述同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息;
所述第二节点发送所述同步检测响应消息。
在可能实现的方式中,所述第二节点接收第一节点发送的第一同步检测请求消息之后,所述方法还包括:
所述第二节点确定存在第三节点,生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息;
所述第二节点向所述第三节点发送所述第二同步检测请求消息。
在可能实现的方式中,所述第三节点为所述第二节点的时钟源,所述第二节点向所述第三节点发送所述第二同步检测请求消息包括:
所述第二节点通过用于接收时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息,所述用于接收时钟同步信号的端口为所述第二节点上接收所述第三节点提供的时钟同步信号的端口。
在可能实现的方式中,所述第一节点是发起时钟同步检测的节点,所述第一节点的时钟拓扑信息为所述第一节点的标识符ID,所述第二节点发送所述同步检测响应消息包括:
所述第二节点根据所述第一同步检测请求消息包括的所述第一节点的ID,向所述第一节点发送所述同步检测响应消息。
在可能实现的方式中,所述第一同步检测请求消息还包括第四节点的时钟拓扑信息,所述第四节点的时钟拓扑信息为所述第四节点的ID,所述同步检测响应消息还包括所述第四节点的ID,所述第四节点是发起时钟同步检测 的节点,所述第二节点发送所述同步检测响应消息包括:
所述第二节点根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述同步检测响应消息。
在可能实现的方式中,所述第一节点为所述第二节点的时钟源,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
所述第二节点判断接收所述第一同步检测请求消息的端口是否为用于传输时钟同步信号的端口;
所述第二节点确定接收所述第一同步检测请求消息的端口是所述用于传输时钟同步信号的端口后,生成所述同步检测响应消息。
在可能实现的方式中,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
所述第二节点确定接收所述第一同步检测请求消息的端口是用于传输频率同步信号的端口;
所述第二节点将第一同步类型添加至所述同步检测响应消息,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测。
在可能实现的方式中,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
所述第二节点确定接收所述第一同步检测请求消息的端口是用于传输时间同步信号的端口;
所述第二节点将第二同步类型添加至所述同步检测响应消息,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测。
在可能实现的方式中,所述方法还包括:
所述第二节点检测到所述第二节点存在物理层故障后,将第一告警信息添加至所述同步检测响应消息,所述第一告警信息用于表示发送所述同步检测响应消息的节点存在物理层故障。
在可能实现的方式中,所述方法还包括:
所述第二节点检测到所述第二节点的时钟源异常后,将第二告警信息添加至所述同步检测响应消息,所述第二告警信息用于表示发送所述同步检测响应消息的节点检测到其时钟源异常。
在可能实现的方式中,所述方法还包括:
所述第二节点检测到所述第二节点的频偏性能劣化后,将性能监测信息添加至所述同步检测响应消息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能。
在第一方面或第二方面的可能的实现方式中,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,或者所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。
在第一方面或第二方面的可能的实现方式中,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表,所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。
本发明实施例的第三方面提供一种第一节点,包括:
消息生成单元,用于生成同步检测请求消息,所述同步检测请求消息包括所述第一节点的ID;
消息发送单元,用于向第二节点发送所述同步检测请求消息;
消息接收单元,用于接收所述第二节点发送的第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID;
结果获得单元,用于根据所述第一同步检测响应消息,获得第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步 路径的状态。
在可能实现的方式中,所述消息接收单元,还用于接收第三节点发送的第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID;
所述结果获得单元,还用于根据所述第二同步检测响应消息,获得第二检测结果,所述第二检测结果用于表示所述第一节点与所述第三节点间的时钟同步路径的状态,所述第一节点与所述第三节点间的时钟同步路径经过所述第二节点。
在可能实现的方式中,所述消息发送单元具体用于通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息,所述用于传输时钟同步信号的端口为所述第一节点上能够与所述第二节点传输时钟同步信号的端口。
在可能实现的方式中,所述同步检测请求消息还包括第一同步类型,所述第一同步类型用于表示频率同步,所述同步检测请求消息用于请求对频率同步路径进行检测;
所述消息发送单元包括:
第一端口确定单元,用于根据所述同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,所述用于传输频率同步信号的端口为所述第一节点上能够与所述第二节点传输频率同步信号的端口;
第一消息发送单元,用于通过所述第一端口确定单元确定的所述用于传输频率同步信号的端口,向所述第二节点发送所述同步检测请求消息。
在可能实现的方式中,所述同步检测请求消息还包括第二同步类型,所述第二同步类型用于表示时间同步,所述同步检测请求消息用于请求对时间同步路径进行检测;
所述消息发送单元包括:
第二端口确定单元,用于根据所述同步检测请求消息中的所述第二同步 类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,所述用于传输时间同步信号的端口为所述第一节点上能够与所述第二节点传输时间同步信号的端口;
第二消息发送单元,用于通过所述第二端口确定单元确定的所述用于传输时间同步信号的端口,向所述第二节点发送所述同步检测请求消息。
在可能实现的方式中,所述第一节点还包括:判断单元;
所述判断单元用于判断是否跟踪到所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点;
所述消息生成单元还用于所述判断单元确定跟踪到所述第一节点的时钟跟踪节点后,生成所述同步检测请求消息。
在可能实现的方式中,所述第一检测结果包括第一同步路径,所述第一同步路径为所述第一节点与所述第二节点的时钟同步路径,所述第二节点的时钟拓扑信息包括所述第二节点的ID;
所述结果获得单元具体用于根据所述第一同步检测响应消息包括的所述第二节点的ID和所述第一节点的ID,获得所述第一同步路径。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果还包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
所述结果获得单元具体用于:
根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点 的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果还包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
所述结果获得单元具体用于:
根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
在可能实现的方式中,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果还包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
所述结果获得单元具体用于:
根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;
根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
所述第一节点的具体实现方式可参见第一方面所述的用于检测时钟同步路径的方法。
本发明实施例第四方面提供一种第二节点,包括:
请求消息接收单元,用于接收第一节点发送的第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的时钟拓扑信息;
响应消息生成单元,用于根据所述第一同步检测请求消息,生成同步检测响应消息,所述同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息;
响应消息发送单元,用于发送所述同步检测响应消息。
在可能实现的方式中,所述第二节点还包括:
节点确定单元,用于确定存在第三节点;
请求消息生成单元,用于根据所述第一同步检测请求消息生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息;
请求消息发送单元,用于向所述第三节点发送所述第二同步检测请求消息。
在可能实现的方式中,所述第三节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,
所述请求消息发送单元具体用于通过用于接收时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息,所述用于接收时钟同步信号的端口为所述第二节点上接收所述第三节点提供的时钟同步信号的端口。
在可能实现的方式中,所述第一节点是发起时钟同步检测的节点,所述第一节点的时钟拓扑信息为所述第一节点的标识符ID,所述响应消息发送单元具体用于:
根据所述第一同步检测请求消息包括的所述第一节点的ID,向所述第一节点发送所述同步检测响应消息。
在可能实现的方式中,所述第一同步检测请求消息还包括第四节点的时钟拓扑信息,所述同步检测响应消息还包括所述第四节点的时钟拓扑信息,所述第四节点的时钟拓扑信息为所述第四节点的ID,所述第四节点是发起时钟同步检测的节点,所述响应消息发送单元具体用于:
根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述同步检测响应消息。
在可能实现的方式中,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号 的节点,所述响应消息生成单元包括:
端口判断单元,用于判断所述请求消息接收单元接收所述第一同步检测请求消息的端口是否为用于传输时钟同步信号的端口;
消息生成单元,用于确定接收所述第一同步检测请求消息的端口是所述用于传输时钟同步信号的端口后,生成所述同步检测响应消息。
在可能实现的方式中,所述响应消息生成单元包括:
端口判断单元,用于确定接收所述第一同步检测请求消息的端口是用于传输频率同步信号的端口;
消息生成单元,用于将第一同步类型添加至所述同步检测响应消息,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测。
在可能实现的方式中,所述响应消息生成单元包括:
端口判断单元,用于确定接收所述第一同步检测请求消息的端口是用于传输时间同步信号的端口;
消息生成单元,用于将第二同步类型添加至所述同步检测响应消息,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测。
在可能实现的方式中,所述第二节点还包括:
第一添加单元,用于检测到所述第二节点存在物理层故障后,将第一告警信息添加至所述同步检测响应消息,所述第一告警信息用于表示发送所述同步检测响应消息的节点存在物理层故障。
在可能实现的方式中,所述第二节点还包括:
第二添加单元,用于检测到所述第二节点的时钟源异常后,将第二告警信息添加至所述同步检测响应消息,所述第二告警信息用于表示发送所述同步检测响应消息的节点检测到其时钟源异常。
在可能实现的方式中,所述第二节点还包括:
性能信息添加单元,用于检测到所述第二节点的频偏性能劣化后,将性 能监测信息添加至所述同步检测响应消息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能劣化。
所述第二节点的具体实现方式可参见第二方面所述的用于检测时钟同步路径的方法。
本发明实施例第五方面提供一种用于检测时钟同步路径的系统,所述系统包括第三方面的第一节点和第四方面的第二节点。
在本发明实施例中,第一节点可以发起时钟同步的检测,即第一节点生成同步检测请求消息,同步检测请求消息包括第一节点的ID。第一节点可通过用于传输时钟同步信号的路径,向用于传输时钟同步信号的路径上的节点发送同步检测请求消息。接收到同步检测请求消息的节点,比如第二节点,将自身的时钟拓扑信息和第一节点的ID携带在同步检测响应消息中,向发起时钟同步检测的节点,比如第一节点,发送同步检测响应消息。这样,用于传输时钟同步信号的路径包括的节点均会向发起时钟同步检测的节点发送携带自身的时钟拓扑信息的同步检测响应消息。发起时钟同步检测节点可根据接收到的一个或多个同步检测响应消息,获得关于时钟同步路径的检测结果。发起时钟同步检测节点可根据检测结果,确定时钟不同步的节点和/或存在故障的节点,有助于提高获取时钟同步路径的状态的工作效率。
附图说明
图1为移动承载网的场景示意图。
图2为本发明实施例一提供的用于检测时钟同步路径的方法的流程示意图。
图3为本发明实施例一提供的网络场景示意图。
图4为本发明实施例二提供的用于检测时钟同步路径的方法的流程示意图。
图5为本发明实施例二提供的网络场景示意图。
图6为本发明实施例提供的同步检测消息格式的示意图。
图7为本发明实施例提供的一种第一节点的结构示意图。
图8为本发明实施例提供的一种第二节点的结构示意图。
图9为本发明实施例提供的另一种第一节点的结构示意图。
图10为本发明实施例提供的另一种第二节点的结构示意图。
具体实施方式
本发明实施例提供一种用于检测时钟同步路径的方法、节点及系统,可以应用于移动承载网中,例如分组交换网(Packet Transport Network,PTN)、无线接入网IP化(Internet Protocol Radio Access Network,IP RAN)等承载网,还可以应用于判断节点之间是否存在时钟不同步的场景。
如图1所示,R1-R9为某个移动承载网中的网络节点。所述网络节点可以包括但不限于传输设备、无线网络控制设备、基站控制设备、无线核心网设备等设备。传输设备可以为交换机、路由器、分组传送网(PTN)设备等设备。图1中,BTS通过秒脉冲(Pulse Per Second,1PPS)+日时间(Time Of Day,TOD)接口,即1PPS+TOD接口,和以太网接口两种方式,从R5分别获取时间和频率同步信号,而BITS则是图1中同步网络的外部时钟源,R1同样通过1PPS+TOD接口和以太网接口两种方式从BITS分别获取时间和频率同步信号。通常,BITS设置在数字同步网的二、三级节点,向需要时钟同步的各种设备提供定时信号。传输承载设备之间的接口为传递Sync E和1588v2报文的接口,在不同的承载网或传送网中,接口不同,对于分组网络来说可以是以太网接口。实际的网络场景可能包括多个BITS,图1只展示了包括一个BITS和一个BTS的网络场景。图1中箭头所示的方向为作为时钟源的BITS产生的时钟同步信号在图1所示的网络场景中的分发方向。图1所示的网络场景中存在但不限于3条时钟同步路径,比如一条从R1到R5的时钟同步路径,可简单表示为R1->R2->R3->R4->R5;一条从R1到R9的时钟同步路径,可简单表示为R1->R2->R7->R9;一条从R1到R8的时钟同步路径,可简单表示为R1->R6->R7。若移动承载网中的R10(图1中未示出)的 时钟源来自于另一BITS,另一BITS提供的时钟同步信号与图1中的BITS提供的时钟同步信号不同,R10要与R4对接就会存在时钟不同步的问题。通常的定位时钟不同步的问题的方法,就是逐一人工登录或访问网络中的设备,确定被登录或被访问的设备的时钟源是哪个设备,进而确定每个设备所属的时钟同步路径。
为了解决通常的获取时钟同步路径的状态的效率较低的问题,本发明实施例提供的用于检测时钟同步路径的方法,有助于提高获取关于时钟同步路径的状态的工作效率。
本发明实施例提供的用于检测时钟同步路径的方法可应用于图1所示的网络场景中。本发明实施例一提供的方法是叶子节点发起检测并从叶子节点向根节点逐跳检测的路径检测方法。本发明实施例二提供的方法是根节点发起检测并从根节点向叶子节点逐跳检测的路径检测方法。本发明实施例三提供的方法是控制器发起检测并从叶子节点向根节点逐跳检测的路径检测方法。本发明实施例四提供的方法是控制器发起检测并从根节点向叶子节点逐跳检测的路径检测方法。所述根节点可以是和BITS通信的节点。所述叶子节点可以是时钟同步路径上除了所述根节点外的节点。能够和BTS通信的节点属于所述叶子节点。如图1所示的网络场景,若R1为根节点,则R2-R9均为叶子节点,根节点和叶子节点的含义是针对时钟同步分发的方向来说的。
下面将结合图2至图5,对本发明实施例提供的用于检测时钟同步路径的方法进行详细的介绍。
图2为本发明实施例一提供的用于检测时钟同步路径的方法的流程示意图。如图2所示,本发明实施例一提供的方法可以包括下述101-110的内容。
101,第一节点生成第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的ID。
具体的,所述第一节点的ID。所述第一节点的ID可以是序列号、索引、字符串等能够唯一的标识所述第一节点的信息,在此不再对第一节点的ID的具体表现形式进行逐一举例说明。本发明实施例一中,第二节点可作为所述 第一节点的时钟跟踪节点(clock traced node)。所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。本发明实施例中的时钟源则是同步信号的源(timing source),它可以是外部时钟源,也可以是内部时钟源。例如,某一网络节点的时钟源故障,从该时钟源获取同步信号的某一网络节点进入自由运行模式,自己成为新的时钟源。
举例说明,若第一节点发起检测所述第一节点所在的时钟同步路径,则所述第一节点需要确定与其具有时钟同步关系的邻居节点。所述第一节点可根据所述第一节点的端口列表来确定与所述第一节点具有时钟同步关系的邻居节点。所述第一节点的端口列表包括所述第一节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。N为大于或等于1的整数。所述第一节点的端口列表中的端口可以是以端口的标识的形式进行记录。所述端口的标识可以是端口的名称,端口号等能够唯一标识所述端口的信息,在此不再逐一举例说明。所述时钟同步信号来自于所述第一节点的时钟跟踪节点或时钟源本身。所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点所述端口可以是物理端口或逻辑端口,例如,高精度时间协议(Precision Time Protocol,PTP)端口、速率155.520Mbps同步传输模块(Synchronous Transfer Module,STM)STM-1信道端口等。其中,PTP端口分为用于发送同步时钟的主时钟端口(Master Port)、用于接收同步时钟的从时钟端口(Slave Port)、既不发送也不接收的被动端口(Passive Port)。STM-1信道端口用于传输同步数字体系(Synchronous Digital Hierarchy,SDH)信号。
举例说明,所述第一节点可根据所述第一节点的ID,生成所述第一同步检测请求消息。所述第一同步检测请求消息包括所述第一节点的ID。
本发明实施例提供一种同步检测消息格式,请参见图6,需要说明的是,本发明只是提出一种可能的、便于理解的格式,对于同步检测消息的具体格式不做限定。图6所示的同步检测消息的格式为TLV(Type-Length-Value)格式,TLV格式是一种协议类型和变量封装的格式。如图6所示,Req./Reply 字段用来描述包含该字段的消息是同步检测请求消息或者是同步检测响应消息。Sync Type字段用于表示时钟同步类型,即频率同步或时间同步。通常地,使用同步以太技术,则Sync Type字段可表示频率同步;使用1588v2,则Sync Type字段表示时间同步。当然,Sync Type字段所携带的内容用于确定时钟同步的类型,在一种实现方式中,采用同步以太技术和1588v2均可以用来实现时间同步和频率同步。Sync Topology字段用于携带时钟拓扑信息。Sync Topology字段所携带内容可根据Sync Type字段的内容来确定。若Sync Type字段的内容表示频率同步,Sync Topology字段所携带的时钟拓扑信息包括用于传输频率同步信号的端口列表。可选地,Sync Topology字段所携带的时钟拓扑信息还可包括节点的ID。所述用于传输频率同步信号的端口列表中的端口的标识可以是端口的名称、端口号、端口的MAC地址、端口的IP地址中的一个或多个。若Sync Type字段的内容表示时间同步,Sync Topology字段所携带的时钟拓扑信息包括用于传输时间同步信号的端口列表。可选地,Sync Topology字段所携带的时钟拓扑信息还可包括节点的ID。所述用于传输时间同步信号的端口列表可以是所有使能的PTP端口列表。所述PTP端口列表中的端口可以包括端口名称、端口号、端口的状态(Slave,Master等)、端口MAC地址、端口IP地址等。Sync States字段用于表示时钟状态。根据Sync Type字段的内容,Sync States字段的内容不同。若Sync Type字段表示频率同步,Sync States字段的内容用于表示设备锁定状态、时钟源信息、时钟源状态、时钟告警信息以及时钟性能检测信息中的一个或多个。时钟源信息可以包括时钟源优先级、时钟源标识、时钟源同步状态信息(Synchronization Status Message,SSM)等级中的一个或多个。所述时钟源SSM等级包括PRC、SSU-A、SSU-B、SEC等。所述时钟源状态包括正常、端口物理状态Down、频偏异常、BITS时钟源异常等。所述时钟告警信息包括第一告警信息和第二告警信息中的一个或多个。
举例说明,同步检测消息可以封装在LSP Ping中作为新的转发等价类FEC(Forwarding Equivalence Class,FEC),还可以封装在传输控制协议 (Transmission Control Protocol,TCP)或用于数据报协议(User Datagram Protocol,UDP)报文中作为特殊的应用协议,还可以封装普通的以太(Ethernet)报文或者互连网协议(Internet Protocol,IP)报文中,从而可以适用于包括交换机、路由器或者多协议标记交换(Multi-Protocol Label Switching,MPLS)设备的各种网络同步场景。在此不再对封装于具体协议中的同步检测消息的格式进行举例说明。所述第一同步检测请求消息为图6所示同步检测消息的格式中Req./Reply字段为Req.字段所描述的同步检测请求消息中的一种。
结合图3所示的网络场景示意图,本发明实施例是由叶子节点R5向根节点R1发起的时钟同步路径检测,因此本发明实施例中的所述第一节点即为图3中的R5。可选地,在所述第一节点执行生成所述第一同步检测请求消息的之前,所述第一节点可判断是否发起时钟同步路径的检测。举例说明,所述第一节点生成第一同步检测请求消息之前,所述方法还包括:所述第一节点判断是否跟踪到所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点;所述第一节点确定跟踪到所述第一节点的时钟跟踪节点后,执行所述第一节点生成第一同步检测请求。具体地,所述第一节点可通过检查设备锁定状态处于locked(锁定)模式后,确定跟踪到所述第一节点的时钟跟踪节点。在图3所示的场景中,R5的时钟跟踪节点为R4。
可选的,所述第一节点生成第一同步检测请求消息之前,所述方法还包括:所述第一节点判断是否丢失所述第一节点的时钟跟踪节点;所述第一节点确定丢失所述第一节点的时钟跟踪节点后,执行所述第一节点生成所述第一同步检测请求消息。具体地,所述第一节点可通过检查设备锁定状态处于unlocked(未锁定)模式后,确定丢失所述第一节点的时钟跟踪节点。
102,所述第一节点向第二节点发送所述第一同步检测请求消息。
具体的,所述第一节点通过所述第一节点的接收时钟同步信号的端口,发送所述第一同步检测请求消息。若所述第一节点的接收时钟同步信号的端 口能够与第二节点通信,即所述第二节点为所述第一节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,则所述第一节点通过所述第一节点的接收时钟同步信号的端口,将所述第一时钟同步检测请求消息发送至所述第二节点。即R5可通过自身的接收时钟同步信号的端口,将所述第一同步检测请求消息发送至图3中的R4。可选地,所述第一节点还可以通过自身接收时钟同步信号的端口获取其物理连接的对端节点的IP或MAC地址,或者通过所述第一节点本地缓存的数据表获取作为时钟跟踪节点的IP或MAC地址,或者通过查询链路层发现协议(Link Layer Discovery Protocol,LLDP)维护的数据表获取作为时钟跟踪节点的IP或MAC地址。在本实施例中,所述第二节点是所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点,所述第一节点的用于传输时钟同步信号的端口为所述第一节点的用于接收时钟同步信号的端口。
若所述第一同步检测请求消息中的同步类型为第一同步类型,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测,则所述第一节点根据所述第一同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,然后所述第一节点通过所述用于传输频率同步信号的端口,向所述第二节点发送所述第一同步检测请求消息。在本实施例中,所述用于传输频率同步信号的端口为用于接收频率同步信号的端口。
若所述第一同步检测请求消息中的同步类型为第二同步类型,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测,则所述第一节点根据所述第一同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,然后所述第一节点通过所述用于传输时间同步信号的端口,向所述第二节点发送所述第一同步检测请求消息。在本实施例中,所述用于传输时间同步信号的端口为用于接收时间同步信号的端口。
103,所述第二节点接收所述第一节点发送的所述第一同步检测请求消息,并根据所述第一同步检测请求消息,生成第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID。
可选地,所述第二节点接收所述第一节点发送的所述第一同步检测请求消息,并判断接收所述第一同步检测请求消息的端口是否为所述用于传输时钟同步信号的端口。所述第二节点确定接收所述第一同步检测请求消息的端口为所述用于传输时钟同步信号的端口后,所述第二节点可生成所述第一同步检测响应消息。本实施例中,所述第二节点的用于传输时钟同步信号的端口为所述第二节点的用于发送时钟同步信号的端口。
举例说明,所述第二节点在接收到所述第一同步检测请求消息后,从所述第一同步检测请求消息中获得所述第一节点的ID。所述第二节点根据所述第二节点的时钟拓扑信息和所述第一节点的ID,生成所述第一同步检测响应消息。可选地,所述第一同步检测响应消息中的所述第二节点的时钟拓扑信息可添加于所述第一节点的ID之后。
举例说明,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表。所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和所述第二节点的M个用于发送时钟同步信号的端口。M为大于或等于1的整数。
举例说明,若所述第二节点的用于传输时钟同步信号的端口为所述第二节点的用于传输频率同步信号的端口,则所述第二节点将所述第一同步类型添加至所述第一同步检测响应消息。所述第二节点的用于传输频率同步信号的端口为所述第二节点的用于发送频率同步信号的端口。若所述第二节点的用于传输时钟同步信号的端口为所述第二节点的用于传输时间同步信号的端口,则所述第二节点将所述第二同步类型添加至所述第一同步检测响应消息。所述第二节点的用于传输时间同步信号的端口为所述第二节点的用于发送时间同步信号的端口。
104,所述第二节点向所述第一节点发送所述第一同步检测响应消息。
举例说明,发起时钟同步检测的节点会将发起时钟同步检测的节点的ID携带在发送至所述第二节点的同步检测请求消息中。所述第二节点向发起时钟同步检测的节点发送所述第一同步检测响应消息。
在一种实现方式中,所述第一节点是发起时钟同步检测的节点,所述第一同步检测请求消息包括所述第一节点的ID。所述第二节点向发起时钟同步检测的节点发送所述第一同步检测响应消息包括:所述第二节点可根据所述第一节点的ID,向所述第一节点发送所述第一同步检测响应消息。
在另一种实现方式中,所述第一节点不为发起时钟同步检测的节点,第四节点是发起时钟同步检测的节点,则所述第一同步检测请求消息包括所述第四节点的ID,所述第一同步检测响应消息包括所述第四节点的ID。所述第二节点向发起时钟同步检测的节点发送所述第一同步检测响应消息包括:所述第二节点根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述第一同步检测响应消息。
105,所述第一节点接收所述第二节点发送的所述第一同步检测响应消息,并根据所述第一同步检测响应消息包括的所述第二节点的时钟拓扑信息和所述第一节点的ID,获得第一同步路径,所述第一同步路径为所述第一节点与所述第二节点间的时钟同步路径。
如图3所示,R5可从所述第一同步检测响应消息中获得R5的ID和R4的时钟拓扑信息。R4的时钟拓扑信息包括R4的ID和R4的时钟端口列表。R4的时钟端口列表包括R4的用于接收时钟同步信号的端口和R4的用于发送时钟同步信号的端口。R5可根据R4的ID和R5的ID,确定所述第一同步路径为R4->R5。所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点,即R4为R5的时钟跟踪节点。
在该实施例中,所述第二节点不是时钟同步路径的最后一个节点,即所述第二节点存在接收时钟同步信号的端口,且所述第二节点不是直接连接 BITS的节点,则该实施例提供的用于检测时钟同步路径的方法还包括106至110的内容。
106,所述第二节点确定存在第三节点,生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息。
举例说明,所述第二节点确定存在第三节点包括:所述第二节点根据所述第二节点的端口列表,确定所述第二节点存在接收时钟同步信号的端口,且所述第二节点不是连接BITS的节点。换句话说,所述第二节点接收时钟同步信号的端口能够与所述第三节点通信。所述第二节点确定所述第三节点的方法与102中所述第一节点确定第二节点的方法相同,在此不再赘述。所述第三节点对应于图3中的R3。
举例说明,所述第二节点根据所述第一同步检测请求消息和所述第二节点的时钟拓扑信息,生成所述第二同步检测请求消息。在一种实现方式中,所述第二节点可将所述第二节点的ID添加至所述第一同步检测请求消息,生成所述第二同步检测请求消息。在另一种实现方式中,所述第二节点可将所述第二节点的ID和所述第二节点的时钟端口列表添加至所述第一同步检测请求消息,生成所述第二同步检测请求消息。在本实施中,所述第三节点是所述第二节点的时钟跟踪节点。所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点。
107,所述第二节点向所述第三节点发送所述第二同步检测请求消息。
举例说明,所述第二节点通过所述用于传输时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息。其中,所述用于传输时钟同步信号的端口为所述第二节点上能够与所述第三节点传输时钟同步信号的端口,即所述第二节点上接收所述时钟同步信号的端口。
若所述第二同步检测请求消息中的同步类型为所述第一同步类型,则所述第二节点根据所述第二同步检测请求消息中的所述第一同步类型和所述用 于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,然后所述第二节点通过所述用于传输频率同步信号的端口,向所述第三节点发送所述第二同步检测请求消息。所述第二节点的用于传输频率同步信号的端口为所述第二节点的用于接收频率同步信号的端口。
若所述第二同步检测请求消息中的同步类型为所述第二同步类型,则所述第二节点根据所述第二同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,然后所述第二节点通过所述用于传输时间同步信号的端口,向所述第三节点发送所述第二同步检测请求消息。所述第二节点的用于传输时间同步信号的端口为所述第二节点的用于接收时间同步信号的端口。
108,所述第三节点接收所述第二节点发送的所述第二同步检测请求消息,并根据所述第二同步检测请求消息,生成第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID。
可选地,所述第三节点接收所述第二节点发送的所述第二同步检测请求消息,并判断接收所述第二同步检测请求消息的端口是否为所述用于传输时钟同步信号的端口。所述第三节点确定接收所述第二同步检测请求消息的端口为所述用于传输时钟同步信号的端口后,所述第三节点可生成所述第二同步检测响应消息。本实施例中,所述第三节点的用于传输时钟同步信号的端口为所述第三节点的用于发送时钟同步信号的端口。
举例说明,所述第三节点在接收到所述第二同步检测请求消息后,从所述第二同步检测请求消息中获得所述第二节点的时钟拓扑信息和所述第一节点的ID。所述第三节点根据所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID,生成所述第二同步检测响应消息。可选地,所述第二同步检测响应消息中的所述第三节点的时钟拓扑信息可添加于所述第二节点的时钟拓扑信息之后。即所述第二同步检测响应消息中的所述第三节点的时钟拓扑信息位于所述第二节点的时钟拓扑信息之后,所述第二 节点的时钟拓扑信息位于所述第一节点的ID之后。
举例说明,所述第三节点的时钟拓扑信息包括所述第三节点的ID和所述第三节点的端口列表。所述第三节点的端口列表包括所述第三节点的用于接收时钟同步信号的端口和所述第三节点的L个用于发送时钟同步信号的端口。L为大于或等于1的整数。
举例说明,若所述第三节点的用于传输时钟同步信号的端口为所述第三节点的用于传输频率同步信号的端口,则所述第三节点将所述第一同步类型添加至所述第二同步检测响应消息。所述第三节点的用于传输频率同步信号的端口为所述第三节点的用于发送频率同步信号的端口。若所述第三节点的用于传输时钟同步信号的端口为所述第三节点的用于传输时间同步信号的端口,则所述第三节点将所述第二同步类型添加至所述第二同步检测响应消息。所述第三节点的用于传输时间同步信号的端口为所述第三节点的用于发送时间同步信号的端口。
109,所述第三节点向所述第一节点发送所述第二同步检测响应消息。
举例说明,发起时钟同步检测的节点会将发起时钟同步检测的节点的ID携带在发送至所述第三节点的同步检测请求消息中。所述第三节点向发起时钟同步检测的节点发送所述第二同步检测响应消息。
在一种实现方式中,所述第一节点是发起时钟同步检测的节点,所述第二同步检测请求消息包括所述第一节点的ID。所述第三节点向发起时钟同步检测的节点发送所述第二同步检测响应消息包括:所述第三节点可根据所述第一节点的ID,向所述第一节点发送所述第二同步检测响应消息。
在另一种实现方式中,所述第一节点不为发起时钟同步检测的节点,第四节点是发起时钟同步检测的节点,则所述第二同步检测请求消息包括所述第四节点的ID,所述第二同步检测响应消息包括所述第四节点的ID。所述第二节点向发起时钟同步检测的节点发送所述第二同步检测响应消息包括:所述第二节点根据所述第二同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述第二同步检测响应消息。
110,所述第一节点接收所述第三节点发送的所述第二同步检测响应消息,并根据所述第二同步检测响应消息包括的所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID,获得第二同步路径,所述第二同步路径为所述第一节点与所述第三节点间的时钟同步路径,所述第二同步路径经过所述第二节点。
如图3所示,R5可从所述第二同步检测响应消息中获得R5的ID、R4的时钟拓扑信息和R3的时钟拓扑信息。R4的时钟拓扑信息包括R4的ID和R4的时钟端口列表。R4的时钟端口列表包括R4的用于接收时钟同步信号的端口和R4的用于发送时钟同步信号的端口。R3的时钟拓扑信息包括R3的ID和R3的时钟端口列表。R3的时钟端口列表包括R3的用于接收时钟同步信号的端口和R3的用于发送时钟同步信号的端口。R5可根据R4的ID和R3的ID,确定所述第二同步路径为R3->R4->R5。所述第三节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,即R3为R4的时钟跟踪节点,所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点,即R4为R5的时钟跟踪节点。
结合图3所示的网络场景示意图,实线箭头即为同步检测请求消息的发送方向,虚线箭头为同步检测响应消息的发送方向。由图3可知,R1->R2->R3->R4->R5的时钟同步路径上,R5发起时钟同步路径的检测,R1、R2、R3和R4所产生的同步检测响应消息均发送至R5。R4至R5的虚线箭头即为图2中的所述第一同步检测响应消息,R3至R5的虚线箭头即为图2中的所述第二同步检测响应消息,R5至R4的实线箭头即为图2中的所述第一同步检测请求消息,R4至R3的实线箭头即为图2中的所述第二同步检测请求消息。若R5能接收到R4、R3、R2以及R1发送的同步检测响应消息,那么R5可以根据这些同步检测响应消息获得一条完整的时钟同步路径,可表示为R1->R2->R3->R4->R5。
若R1->R2->R3->R4->R5这条时钟同步路径上存在链路故障或物理端口 的同步故障,那么R5只能得到部分时钟同步路径。例如R5只能收到R4和R3发送的同步检测响应消息,那么可以推断出R3与R2之间存在链路故障或物理端口的同步故障。进一步地,根据R5获得的时钟同步路径可以提示管理员检测发生故障的物理链路和端口。
本发明实施例提供的方法中,所述第一节点可将所述第一同步路径作为第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。即所述第一节点获得所述第一同步路径的过程即为所述第一节点获得所述第一检测结果的过程。
在本发明实施例中,第一节点生成了第一同步检测请求消息,并将所述第一同步检测请求消息发送至第二节点。第二节点根据所述第一同步检测请求消息,向第一节点反馈第一同步检测响应消息。第一节点根据第一同步检测响应消息获得第一同步路径,以此类推,实现第一节点高效地获得时钟同步路径,且有助于根据时钟同步路径确定时钟不同步的节点。
基于本发明实施例一提供的方法,本发明另一实施例提供了定位时钟同步路径上的故障的方法。结合图2和图3,对本发明另一实施例提供的定位时钟同步路径上的故障的方法进行说明。在下述说明中,不再对和实施例一提供的内容重复的内容进行赘述,仅对和实施例一提供的方法不同的内容进行说明。
可选的,103之前还包括:所述第二节点检测到所述第二节点存在物理层故障后,获得第一告警信息。所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障。103的所述第二节点根据所述第一同步检测请求消息,生成第一同步检测响应消息还包括:所述第二节点将所述第一告警信息添加至所述第一同步检测响应消息。若所述第一同步检测响应消息包括所述第一同步类型,则所述第一告警信息还包括同步处理硬件故障和频率输出模块故障等具体告警类型的指示值,所述频率输出模块故障包括TR_LOC、HEAD_ERR、HEAD_BAD、BUS_ERR等。若所述第一同步检测响应消息包括所述第二同步类型,则所述第一告警信息还包括同步处理硬件 故障和PTP物理链路告警等具体告警类型的指示值,所述PTP物理链路告警包括ETH_LOS、ETH_LINK_DOWN等。
可选地,105之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得第一告警消息,所述第一告警消息用于通告存在物理层故障的节点。所述第一告警信息包括所述第二节点的ID。所述第二节点的ID可来自于所述第二节点的时钟拓扑信息。在该实施例中,所述第一节点获得的第一检测结果包括第一同步路径和所述第一告警消息。所述第一节点获得的第一同步路径与实施例一中的第一同步路径相同,在此不再赘述。
举例说明,所述第一节点根据所述第一同步检测响应消息,获得第一告警消息包括:所述第一节点根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
如图3所示的网络场景,R5可先检测本节点是否存在物理层故障,若存在则输出用于通告R5存在物理层故障的第一告警消息。若R5接收到的同步检测响应消息中有多个携带第一告警信息的同步检测响应消息,则R5可参考时钟同步路径上节点间的顺序输出第一告警消息。例如,R4、R3均存在所述物理层故障,则R5可先输出用于通告R3存在物理层故障的第一告警消息。R5可在R3物理层故障消除后,再输出用于通告R4存在物理层故障的第一告警消息。
在实施例一提供的方法或上述另一实施例提供的方法的基础上,本发明的又一实施例提供了另一种可用于定位故障的方法。在下述说明中,不再对和前述实施例提供的内容重复的内容进行赘述,仅对和前述实施例提供的方法不同的内容进行说明。
可选的,103之前还包括:所述第二节点检测到所述第二节点的时钟源异常后,获得第二告警消息。所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常。103的所述第二节点根据所述第一同 步检测请求消息,生成第一同步检测响应消息还包括:所述第二节点将所述第二告警信息添加至所述第一同步检测响应消息。若所述第一同步检测响应消息包括所述第一同步类型,则所述第二告警信息包括频率输入参考源丢失,例如SYNC_C_LOS、EXT_SYNC_LOS、LTI等;时钟失锁,例如CLK_LOCK_FAIL等;ESMC报文丢失,例如SSM_PKT_LOS等;当前参考源FREQ越限,例如SYN_BAD等;频率输入参考源SSM等级劣化等具体异常类型的指示值,例如S1_SYN_CHANGE等。若所述第一同步检测响应消息包括所述第二同步类型,则所述第二告警信息包括1PPS+TOD输入丢失,例如EXT_TIME_LOC等;时间失锁,例如TIME_LOCK_FAIL等;PTP输入劣化,例如PTPSRC_CLKCLS_DEC等;Announce报文丢失,例如PTP_PKT_LOS等;Sync或Delay_Resp报文丢失等具体异常类型的指示值。
可选地,105之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得第二告警消息,所述第二告警消息用于通告所述第二节点存在时钟源异常,所述第二告警消息包括所述第二节点的ID。所述第二节点的ID可来自于所述第二节点的时钟拓扑信息。在该实施例中,所述第一节点获得的第一检测结果包括第一同步路径和所述第二告警消息。所述第一节点获得的第一同步路径与实施例一中的第一同步路径相同,在此不再赘述。可选地,所述第一节点获得的第一检测结果还可包括上述实施例中的第一告警消息。
举例说明,所述第一节点根据所述第一同步检测响应消息,获得第二告警消息包括:所述第一节点根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
如图3所示的网络场景,若R5接收到的多个同步检测响应消息,比如R4、R3、R2发送的同步检测响应消息,均不包括所述第一告警消息,但均包括所述第二告警消息,且R1并没有发送所述第一告警消息或所述第二告警消 息,则R5可先输出用于通告R2存在时钟源异常的第二告警消息。R5可待R2的时钟源异常消除后,再检测R3、R4的故障是否消除,且在R3或R4的故障未消除的情况下输出用于通告存在时钟源异常的第二告警消息。在此不再逐一举例说明。
在本发明实施例中,通过检测除第一节点外的其它节点反馈的同步检测响应消息是否包括第一告警消息或第二告警消息,分析得出第一节点的时钟同步路径中存在告警或故障的节点,实现故障检测,进而方便管理员及时处理告警或故障。
上述实施例提供的方法的基础上,本发明的又一实施例提供了另一种可用于确定性能劣化的方法。在下述说明中,不再对和前述实施例提供的内容重复的内容进行赘述,仅对和前述实施例提供的方法不同的内容进行说明。
可选的,103之前还包括:所述第二节点检测到所述第二节点的频偏性能劣化后,获得性能监测信息。所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能。103的所述第二节点根据所述第一同步检测请求消息,生成第一同步检测响应消息还包括:所述第一节点根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
可选地,105之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点,所述性能异常消息包括所述第二节点的ID。所述第二节点的ID可来自于所述第二节点的时钟拓扑信息。在该实施例中,所述第一节点获得的第一检测结果包括第一同步路径和所述性能异常消息。所述第一节点获得的第一同步路径与实施例一中的第一同步路径相同,在此不再赘述。
举例说明,所述第一节点根据所述第一同步检测响应消息,获得性能异常消息还包括:所述第一节点根据所述第一同步检测响应消息包括的所述性 能监测信息,确定所述第二节点的频偏性能劣化;所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
如图3所示的网络场景,若R5本身存在频偏性能劣化的情况,但是还未报警。R5对接收到的所述同步检测响应消息中进行逐一分析,若来自R4和R3的同步检测响应消息中包括表示频偏性能劣化的性能监测信息,来自R2和R1的同步检测响应消息中不包括表示频偏性能劣化的性能监测信息,则R5输出用于通告R3存在频偏性能劣化的性能异常消息。R5待R3的频偏性能恢复正常后,重新监测R4和R5的频偏性能是否正常,如果正常,则频偏性能劣化的问题解决。反之,R5参照R3的频偏性能劣化的消除方式,逐跳消除频偏性能劣化的问题。
在本发明实施例中,通过检测除第一节点外其它节点反馈的同步检测响应消息是否存在频偏性能劣化异常,分析得出第一节点的时钟同步路径中存在性能异常的节点,实现对时钟同步路径上节点的性能检测,进而方便管理员及时处理性能异常。
上述用于定位故障的多个实施例和用于确定性能劣化的实施例可作为独立的实施例。若上述用于定位故障的多个实施例和用于确定性能劣化的实施例作为独立的实施例,则该多个实施例不包括实施例一中的关于获得第一同步路径的,比如105和110。相应地,该多个实施例要增加上述用于定位故障的多个实施例和用于确定性能劣化的实施例中增加的内容。
图4,为本发明实施例二提供的用于检测时钟同步路径的方法的流程示意图。如图4所示,本发明实施例二提供的方法可以包括下述201-211的内容。
201,第一节点判断是否跟踪到所述第一节点的时钟跟踪节点。
结合图5所示的网络场景,本发明实施例是由根节点R1向叶子节点发起的时钟同步路径检测,因此本发明实施例中的所述第一节点即为图5中的R1。在所述第一节点生成所述第一同步检测请求消息之前,所述第一节点需判断是否发起时钟同步路径的检测。
举例说明,所述第一节点通过判断是否跟踪到所述第一节点的时钟跟踪节点来判断是否发起时钟同步路径的检测。所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。具体的,所述第一节点可通过检查设备锁定状态处于locked(锁定)后,确定跟踪到所述第一节点的时钟跟踪节点。可选的,所述第一节点根据所述第一节点的用于接收时钟同步信号的端口判断是否跟踪到所述第一节点的时钟跟踪节点。若所述第一节点的用于接收时钟同步信号的端口与BITS相连,则确定所述第一节点跟踪到BITS。
所述第一节点确定跟踪到所述第一节点的时钟跟踪节点后,执行202生成第一同步检测请求。图5中,所述R1的时钟源为BITS,所述第一节点可作为第二节点的时钟跟踪节点,向所述第二节点提供时钟同步信号。所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点
202,所述第一节点确定跟踪到所述第一节点的时钟跟踪节点后,生成第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的ID。
具体的,所述第一节点的ID的具体描述可参见本发明实施例一种对所述第一节点的ID的描述,在此不再赘述。可选地,所述第一同步检测请求消息还包括所述第一节点的端口列表。所述第一节点的端口列表包括所述第一节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。N为大于或等于1的整数。所述第一节点的端口列表中的端口可以是以端口的标识的形式进行记录。所述端口的标识可以是端口的名称,端口号等能够唯一标识所述端口的信息,在此不再逐一举例说明。所述端口可以是物理端口或逻辑端口。与实施例一不同的是,所述时钟同步信号来自于图5中的BITS。
所述第一同步检测请求消息的格式可参见实施例一中,结合图6的具体描述,在此不再赘述。
203,所述第一节点向第二节点发送所述第一同步检测请求消息。
具体的,所述第一节点通过所述第一节点的发送时钟同步信号的端口,发送所述第一同步检测请求消息。若所述第一节点的发送时钟同步信号的端 口能够与第二节点通信,即所述第一节点为所述第二节点的时钟跟踪节点,则所述第一节点通过所述第一节点的发送时钟同步信号的端口,能够将所述第一时钟同步检测请求消息送至所述第二节点。即R1可通过发送时钟同步信号的端口,将所述第一同步检测请求消息发送至图5中的R2。在本实施例中,所述第一节点是所述第二节点的时钟跟踪节点,则所述第一节点的用于传输时钟同步信号的端口为所述第一节点的用于发送时钟同步信号的端口。
若所述第一同步检测请求消息中的同步类型为第一同步类型,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测,则所述第一节点根据所述第一同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,然后所述第一节点通过所述用于传输频率同步信号的端口,向所述第二节点发送所述第一同步检测请求消息。在本实施例中,所述用于传输频率同步信号的端口为用于发送频率同步信号的端口。
若所述第一同步检测请求消息中的同步类型为第二同步类型,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测,则所述第一节点根据所述第一同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,然后所述第一节点通过所述用于传输时间同步信号的端口,向所述第二节点发送所述第一同步检测请求消息。在本实施例中,所述用于传输时间同步信号的端口为用于发送时间同步信号的端口。
204,所述第二节点接收所述第一节点发送的所述第一同步检测请求消息,并根据所述第一同步检测请求消息,生成第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID。
205,所述第二节点向所述第一节点发送所述第一同步检测响应消息。
本发明实施例二中204和205的具体实现过程可参见实施例一中103和104的具体描述,在此不再赘述。
206,所述第一节点接收所述第二节点发送的所述第一同步检测响应消息,并根据所述第一同步检测响应消息包括的所述第二节点的时钟拓扑信息和所述第一节点的ID,获得第一同步路径,所述第一同步路径为所述第一节点与所述第二节点间的时钟同步路径。
如图5所示,R1可从所述第一同步检测响应消息中获得R1的ID和R2的时钟拓扑信息。R2的时钟拓扑信息包括R2的ID和R2的时钟端口列表。R2的时钟端口列表包括R2的用于接收时钟同步信号的端口和R2的用于发送时钟同步信号的端口。R1可根据R1的ID和R2的ID,确定所述第一同步路径为R1->R2。所述第一节点为所述第二节点的时钟跟踪节点,即R1为R2的时钟跟踪节点。
在该实施例中,所述第二节点不是时钟同步路径的最后一个节点,即所述第二节点存在发送时钟同步信号的端口,且所述第二节点不是连接BTS的节点,则该实施例提供的用于检测时钟同步路径的方法还包括206至210的内容。
207,所述第二节点确定存在第三节点,生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的ID和所述第二节点的时钟拓扑信息。
举例说明,所述第二节点确定存在第三节点包括:所述第二节点根据所述第二节点的端口列表,确定所述第二节点存在发送时钟同步信号的端口,且所述第二节点不是连接BTS的节点。换句话说,所述第二节点的发送时钟同步信号的端口能够与所述第三节点通信。所述第二节点确定所述第三节点的方法与202中所述第一节点确定第二节点的方法相同,在此不再赘述。所述第三节点对应于图5中的R3。
举例说明,所述第二节点根据所述第一同步检测请求消息和所述第二节点的时钟拓扑信息,生成所述第二同步检测请求消息。具体的,所述第二节点可将所述第二节点的ID和所述第二节点的时钟端口列表添加至所述第一同步检测请求消息,生成所述第二同步检测请求消息。在本实施中,所述第二 节点是所述第三节点的时钟跟踪节点。所述第三节点的时钟跟踪节点是用于为所述第三节点直接提供时钟同步信号的节点。
208,所述第二节点向所述第三节点发送所述第二同步检测请求消息。
本发明实施例二中208与实施例一中107不同之处在于:所述用于传输时钟同步信号的端口为所述第二节点上能够与所述第三节点传输时钟同步信号的端口,即所述第二节点上发送所述时钟同步信号的端口;所述第二节点的用于传输频率同步信号的端口为所述第二节点的用于发送频率同步信号的端口;所述第二节点的用于传输时间同步信号的端口为所述第二节点的用于发送时间同步信号的端口。所述第二节点向所述第三节点发送所述第二同步检测请求消息的其他内容可参见实施例一中107的具体描述,在此不再赘述。
209,所述第三节点接收所述第二节点发送的所述第二同步检测请求消息,并根据所述第二同步检测请求消息,获得第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID。
210,所述第三节点向所述第一节点发送所述第二同步检测响应消息。
本发明实施例二中209和210的具体实现方式可参见实施例一中108和109的具体描述,在此不再赘述。
211,所述第一节点接收所述第三节点发送的所述第二同步检测响应消息,并根据所述第二同步检测响应消息包括的所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID,获得第二同步路径,所述第二同步路径为所述第一节点与所述第三节点间的时钟同步路径,所述第二同步路径经过所述第二节点。
如图5所示,R1可从所述第二同步检测响应消息中获得R1的ID、R2的时钟拓扑信息和R3的时钟拓扑信息。R2的时钟拓扑信息包括R2的ID和R2的时钟端口列表。R2的时钟端口列表包括R2的用于接收时钟同步信号的端口和R2的用于发送时钟同步信号的端口。R3的时钟拓扑信息包括R3的ID和R3的时钟端口列表。R3的时钟端口列表包括R3的用于接收时钟同步信号 的端口和R3的用于发送时钟同步信号的端口。R1可根据R2的ID和R3的ID,确定所述第二同步路径为R1->R2->R3。所述第二节点为所述第三节点的时钟跟踪节点,即R2为R3的时钟跟踪节点,所述第一节点为所述第二节点的时钟跟踪节点,即R1为R2的时钟跟踪节点。
结合图5所示的网络场景,实线箭头即为同步检测请求消息的发送方向,虚线箭头为同步检测响应消息的发送方向。由图5可知,R1->R2->R3->R4->R5的时钟同步路径上,R1发起时钟同步路径的检测,R2、R3、R4和R5所产生的同步检测响应消息均发送至R1。R2至R1的虚线箭头即为图4中的所述第一同步检测响应消息,R3至R1的虚线箭头即为图4中的所述第二同步检测响应消息,R1至R2的实线箭头即为图4中的所述第一同步检测请求消息,R2至R3的实线箭头即为图4中的所述第二同步检测请求消息。若R1能接收到R2、R3、R4以及R5发送的同步检测响应消息,那么R1可以根据这些同步检测响应消息获得一条完整的时钟同步路径,可表示为R1->R2->R3->R4->R5。
若R1->R2->R3->R4->R5这条时钟同步路径上存在链路故障,那么R1只能得到部分时钟同步路径。例如R1只能收到R2和R3发送的同步检测响应消息,那么可以推断出R3与R4之间存在链路故障。进一步地,根据R1获得的时钟同步路径可以提示管理员检测发生故障的物理链路。
在本发明实施例中,所述第一节点可将所述第一同步路径作为第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。即所述第一节点获得所述第一同步路径的过程即为所述第一节点获得所述第一检测结果的过程。
在本发明实施例中,第一节点生成了第一同步检测请求消息,并将所述第一同步检测请求消息发送至第二节点。第二节点根据所述第一同步检测请求消息,向第一节点反馈第一同步检测响应消息。第一节点根据第一同步检测响应消息获得第一同步路径,以此类推,实现第一节点高效地获得时钟同步路径,且有助于根据时钟同步路径确定时钟不同步的节点。
基于本发明实施例二提供的方法,本发明另一实施例提供了定位时钟同步路径上的故障的方法。结合图4和图5,对本发明另一实施例提供的定位时钟同步路径上的故障的方法进行说明。在下述说明中,不再对和实施例一和实施例二提供的内容重复的内容进行赘述,仅对和实施例一和实施例二提供的方法不同的内容进行说明。
可选的,204之前还包括:所述第二节点检测到所述第二节点存在物理层故障后,获得第一告警信息。所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障。204的所述第二节点根据所述第一同步检测请求消息,生成第一同步检测响应消息还包括:所述第二节点将所述第一告警信息添加至所述第一同步检测响应消息。
可选地,206之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得第一告警消息,所述第一告警消息用于通告存在物理层故障的节点。
如图5所示的网络场景,R1可先检测本节点是否存在物理层故障,若存在则输出用于通告R1存在物理层故障的第一告警消息。若R1接收到的同步检测响应消息中有多个携带第一告警信息的同步检测响应消息,则R1可参考时钟同步路径上节点间的顺序输出第一告警消息。例如,R2、R3均存在所述物理层故障,则R1可先输出用于通告R2存在物理层故障的第一告警消息。R1可在R2物理层故障消除后,再输出用于通告R3存在物理层故障的第一告警消息。
在实施例二提供的方法或上述另一实施例提供的方法的基础上,本发明的又一实施例提供了另一种可用于定位故障的方法。在下述说明中,不再对和实施例一和实施例二提供的内容重复的内容进行赘述,仅对和实施例一和实施例二提供的方法不同的内容进行说明。
可选的,204之前还包括:所述第二节点检测到所述第二节点的时钟源异常后,获得第二告警消息。所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常。
可选地,206之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得第二告警消息,所述第二告警消息用于通告所述第二节点存在时钟源异常,所述第二告警消息包括所述第二节点的ID。
如图5所示的网络场景,若R1接收到的多个同步检测响应消息,比如R2、R3、R4发送的同步检测响应消息,均不包括所述第一告警消息,但均包括所述第二告警消息,则R1可先输出用于通告R2存在时钟源异常的第二告警消息。R1可待R2的时钟源异常消除后,再检测R3、R4的故障是否消除,且在R3或R4的故障未消除的情况下输出用于通告存在时钟源异常的第二告警消息。在此不再逐一举例说明。
在本发明实施例中,通过检测除第一节点外的其它节点反馈的同步检测响应消息是否包括第一告警消息或第二告警消息,分析得出第一节点的时钟同步路径中存在告警或故障的节点,实现故障检测,进而方便管理员及时处理告警或故障。
上述实施例提供的方法的基础上,本发明的又一实施例提供了另一种可用于确定性能劣化的方法。在下述说明中,不再对和前述实施例提供的内容重复的内容进行赘述,仅对和前述实施例提供的方法不同的内容进行说明。
可选的,204之前还包括:所述第二节点检测到所述第二节点的频偏性能劣化后,获得性能监测信息。
可选地,206之前,之后或同时,该方法还包括:所述第一节点根据所述第一同步检测响应消息,获得性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点,所述性能异常消息包括所述第二节点的ID。
如图5所示的网络场景,若R1本身频偏性能在正常范围内,未检测到频偏性能劣化,则R1对接收到的所述同步检测响应消息中进行逐一分析,若来自R2和R3的同步检测响应消息中包括表示频偏性能劣化的性能监测信息,来自R2和R1的同步检测响应消息中不包括表示频偏性能劣化的性能监测信息,则R1输出用于通告R2存在频偏性能劣化的性能异常消息。R1待R2的频偏性能恢复正常后,重新监测R3的频偏性能是否正常,如果正常,则频偏 性能劣化的问题解决。反之,R1参照R2的频偏性能劣化的消除方式,逐跳消除频偏性能劣化的问题。
在本发明实施例中,通过检测除第一节点外其它节点反馈的同步检测响应消息是否存在频偏性能劣化异常,分析得出第一节点的时钟同步路径中存在性能异常的节点,实现对时钟同步路径上节点的性能检测,进而方便管理员及时处理性能异常。
上述用于定位故障的多个实施例和用于确定性能劣化的实施例可作为独立的实施例。若上述用于定位故障的多个实施例和用于确定性能劣化的实施例作为独立的实施例,则该多个实施例不包括实施例一中的关于获得第一同步路径的,比如206和211。相应地,该多个实施例要增加上述用于定位故障的多个实施例和用于确定性能劣化的实施例中增加的内容。
本发明实施例三提供了一种控制器触发时钟同步路径检测的方法。实施例三提供的方法中,第一节点为控制器,第二节点为图3中的R5,第三节点为图3中的R3。在此不再对本发明实施例三提供的方法进行赘述,具体可参见实施例一提供的方法。
本发明实施例四提供了一种控制器触发时钟同步路径检测的方法。实施例四提供的方法中,第一节点为控制器,第二节点为图5中的R1,第三节点为图5中的R2。相应地,实施例四提供的方法可在实施例二提供的方法的基础上,省略201和202。203之前还包括控制器生成第一同步检测请求的内容。控制器生成第一同步检测请求的方法与实施例二中R1生成第一同步检测请求的方法相同,在此不再赘述。实施例四提供的方法与实施例二中相同的内容,在此不再赘述,具体可参见实施例二提供的方法。
请参见图7,为本发明实施例提供的一种第一节点的结构示意图。图7对应的实施例提供的第一节点可以是实施例一至实施例四中任一实施例提供的用于发起时钟同步路径检测的节点,比如图2或图4中的第一节点。所述第一节点包括消息生成单元11、消息发送单元12、消息接收单元13和结果获得单元14,其中所述消息发送单元12包括第一端口确定单元121和第一消息 发送单元122,或者所述消息发送单元12包括第一端口确定单元123和第一消息发送单元124。
消息生成单元11,用于生成同步检测请求消息,所述同步检测请求消息包括所述第一节点的ID。
具体实现中,所述消息生成单元11用于在确认第一节点为发起时钟同步检测的节点时,获取所述第一节点的时钟拓扑信息,所述第一节点的时钟拓扑信息包括所述第一节点的标识符ID和所述第一节点的时钟端口列表,然后所述第一节点根据所述第一节点的时钟拓扑信息生成同步检测请求消息,这样便使所述同步检测请求消息包括第一节点的ID。所述消息生成单元11的具体执行过程可参见实施例一中的101或实施例二中的202。
消息发送单元12,用于向第二节点发送所述同步检测请求消息。
具体实现中,所述消息发送单元12通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息,所述用于传输时钟同步信号的端口为所述第一节点上能够与所述第二节点传输时钟同步信号的端口。由于所述同步检测请求消息可能包括第一同步类型或第二同步类型,因此所述消息发送单元有两种结构。其中,所述第一同步类型用于表示频率同步,所述同步检测请求消息用于请求对频率同步路径进行检测;所述第二同步类型用于表示时间同步,所述同步检测请求消息用于请求对时间同步路径进行检测。
在一种实现方式中,消息发送单元12包括:
第一端口确定单元121,用于根据所述同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,所述用于传输频率同步信号的端口为所述第一节点上能够与所述第二节点传输频率同步信号的端口。
第一消息发送单元122,用于通过所述第一端口确定单元确定的所述用于传输频率同步信号的端口,向所述第二节点发送所述同步检测请求消息。
在另一种实现方式中,消息发送单元12包括:
第二端口确定单元123,用于根据所述同步检测请求消息中的所述第二同 步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,所述用于传输时间同步信号的端口为所述第一节点上能够与所述第二节点传输时间同步信号的端口。
第二消息发送单元124,用于通过所述第二端口确定单元确定的所述用于传输时间同步信号的端口,向所述第二节点发送所述同步检测请求消息。
消息接收单元13,用于接收所述第二节点发送的第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID。
结果获得单元14,用于根据所述第一同步检测响应消息,获得第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。
具体实现中,所述路径获得单元14根据消息接收单元13接收的所述第二节点发送的所述第一同步检测响应消息,提取所述第一同步检测响应消息所包括的所述第二节点的时钟拓扑信息和所述第一节点的ID,然后根据所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息获取第一同步路径,对应图3,所述第一同步路径即为R4->R5,所述第二节点为所述第一节点的时钟跟踪节点,即R4为R5的时钟跟踪节点;对应于图5,所述第一同步路径即为R1->R2,所述第二节点为所述第一节点的时钟跟踪节点,即R1为R2的时钟跟踪节点。所述第一节点可将所述第一同步路径作为第一检测结果。
可选地,在一种实现方式中,所述消息接收单元13还用于接收第三节点发送的第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID;所述结果获得单元14,还用于根据所述第二同步检测响应消息,获得第二检测结果,所述第二检测结果用于表示所述第一节点与所述第三节点间的时钟同步路径的状态,所述第一节点与所述第三节点间的时钟同步路径经过所述第二节点。
可选的,所述第一节点还包括判断单元10,所述判断单元10用于判断是否跟踪到所述第一节点的时钟跟踪节点;所述消息生成单元11还用于所述判断单元确定跟踪到所述第一节点的时钟跟踪节点后,生成所述同步检测请求消息。
举例说明,所述第一检测结果包括第一同步路径,所述第一同步路径为所述第一节点与所述第二节点的时钟同步路径,所述第二节点的时钟拓扑信息包括所述第二节点的ID;所述结果获得单元具体用于根据所述第一同步检测响应消息包括的所述第二节点的ID和所述第一节点的ID,获得所述第一同步路径。
在本发明实施例中,第一节点生成了第一同步检测请求消息,并将所述第一同步检测请求消息发送至第二节点。第二节点根据所述第一同步检测请求消息,向第一节点反馈第一同步检测响应消息。第一节点根据第一同步检测响应消息获得第一同步路径,以此类推,实现第一节点高效地获得时钟同步路径,且有助于根据时钟同步路径确定时钟不同步的节点。
可选的,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果还包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点。
所述结果获得单元14具体用于根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障,并根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
可选的,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果包括或还包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点。
所述结果获得单元14具体用于根据所述第一同步检测响应消息包括的所 述第二告警信息,确定所述第二节点的时钟源异常,并根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
在本发明实施例中,通过检测除第一节点外的其它节点反馈的同步检测响应消息是否包括第一告警消息或第二告警消息,分析得出第一节点的时钟同步路径中存在告警或故障的节点,实现故障检测,进而方便管理员及时处理告警或故障。
可选的,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果包括或还包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点。
所述结果获得单元14具体用于根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化,并根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
在本发明实施例中,通过检测除第一节点外其它节点反馈的同步检测响应消息是否存在频偏性能劣化异常,分析得出第一节点的时钟同步路径中存在性能异常的节点,实现对时钟同步路径上节点的性能检测,进而方便管理员及时处理性能异常。
请参见图8,为本发明实施例提供的一种第二节点的结构示意图,所述第二节点包括请求消息接收单元21、响应消息生成单元22和响应消息发送单元23,其中,所述响应消息生成单元22包括端口判断单元221和消息生成单元222,未在图8中标明。
请求消息接收单元21,用于接收第一节点发送的第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的时钟拓扑信息。具体实现中,所述请求消息接收单元21接收第一节点的所述消息发送单元12发送的第一同步检测请求消息。若所述第一节点是发起时钟同步检测的节点,则所述第 一节点的时钟拓扑信息只包括所述第一节点的ID;若所述第一节点不是发起时钟同步检测的节点,则所述第一节点的时钟拓扑信息包括所述第一节点的ID和所述第一节点的端口列表。
响应消息生成单元22,用于根据所述第一同步检测请求消息,生成同步检测响应消息,所述同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息。
所述响应消息生成单元包括端口判断单元221和消息生成单元222。
在一种实现方式中,所述端口判断单元221用于判断所述请求消息接收单元接收所述第一同步检测请求消息的端口是否为用于传输时钟同步信号的端口。所述消息生成单元222用于确定接收所述第一同步检测请求消息的端口是所述用于传输时钟同步信号的端口后,生成所述同步检测响应消息。
在另一种实现方式中,所述端口判断单元221用于确定接收所述第一同步检测请求消息的端口是用于传输频率同步信号的端口。所述消息生成单元222,用于将第一同步类型添加至所述同步检测响应消息,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测。
在又一种实现方式中,所述端口判断单元221用于确定接收所述第一同步检测请求消息的端口是用于传输时间同步信号的端口。所述消息生成单元222用于将第二同步类型添加至所述同步检测响应消息,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测。
响应消息发送单元23,用于发送所述同步检测响应消息。
具体实现中,所述响应消息发送单元23将所述同步检测响应消息发送至发起时钟同步检测的节点。
举例说明,所述第一节点是发起时钟同步检测的节点,所述第一节点的时钟拓扑信息为所述第一节点的标识符ID,所述响应消息发送单元23根据所述第一同步检测请求消息包括的所述第一节点的ID,向所述第一节点的所述 消息接收单元13发送所述同步检测响应消息。
举例说明,所述第一同步检测请求消息还包括第四节点的时钟拓扑信息,所述同步检测响应消息还包括所述第四节点的时钟拓扑信息,所述第四节点的时钟拓扑信息为所述第四节点的ID,所述第四节点是发起时钟同步检测的节点,所述响应消息发送单元23根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述同步检测响应消息。
可选的,所述第二节点还包括:节点确定单元24、请求消息生成单元25和请求消息发送单元26。
所述节点确定单元24用于确定存在第三节点。即所述节点确定单元24确定所述第二节点不是待测时钟同步路径的最后一个节点,即存在所述第三节点。所述请求消息生成单元25用于根据所述第一同步检测请求消息生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息。所述请求消息发送单元26用于向所述第三节点发送所述第二同步检测请求消息。
举例说明,若所述第三节点为所述第二节点的时钟跟踪节点,则所述请求消息发送单元26通过用于接收时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息,所述用于接收时钟同步信号的端口为所述第二节点上接收所述第三节点提供的时钟同步信号的端口。若所述第二节点为所述第三节点的时钟跟踪节点,则所述请求消息发送单元26通过用于发送时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息。
本发明实施例中,通过接收第一节点发送的第一同步检测请求消息,并根据第一同步检测检测请求消息生成同步检测响应消息,并发送同步检测响应消息至第一节点或发起时钟同步检测的节点,以使第一节点或发起时钟同步检测的节点高效地获得时钟同步路径,且有助于第一节点或发起时钟同步检测的节点根据时钟同步路径确定时钟不同步的节点。
可选的,所述第二节点还包括:
第一添加单元27,用于检测到所述第二节点存在物理层故障后,将第一告警信息添加至所述同步检测响应消息,所述第一告警信息用于表示发送所述同步检测响应消息的节点存在物理层故障。
可选的,所述第二节点还包括:
第二添加单元28,用于检测到所述第二节点的时钟源异常后,将第二告警信息添加至所述同步检测响应消息,所述第二告警信息用于表示发送所述同步检测响应消息的节点检测到其时钟源异常。
可选的,所述第二节点还包括:
性能信息添加单元29,用于检测到所述第二节点的频偏性能劣化后,将性能监测信息添加至所述同步检测响应消息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能劣化。
本发明实施例能够在检测出第二节点存在故障或异常或性能劣化时,将故障信息或异常信息或性能劣化信息反馈至第一节点,以便第一节点通告管理员及时处理。
图7所示的第一节点和图8所示的第二节点用于实现本发明实施例一至实施例四所述的内容,图7和图8未揭示的部分可参见实施例一至实施例四的具体描述。
请参见图9,为本发明实施例提供的另一种第一节点的结构示意图,如图9所示,该第一节点包括:至少一个处理器901,例如CPU,至少一个通信总线902,通信接口903,输入设备904、输出设备905,存储器906。其中,通信总线902用于实现这些组件之间的连接通信。其中,通信接口903可以是1PPS+TOD接口和以太接口,用于建立第一节点与基站BTS之间的通信连接,或用于建立与大楼综合定时系统BITS之间的连接。其中,存储器906可以是高速RAM存储器,也可以是非不稳定的存储器(non-volatile memory),例如至少一个磁盘存储器。
其中,处理器901可以包括判断单元、消息生成单元和结果获得单元。所述判断单元对应于图7中的判断单元10,用于执行实施例二中的201,或 用于执行实施例一中的101中判断是否跟踪到第一节点的时钟跟踪节点。所述消息生成单元对应于图7中的消息生成单元11,用于执行实施例一中的101,或用于执行实施例二中的201中生成第一同步检测请求消息。所述结果获得单元对应于图7中的结果获得单元14,用于执行实施例一中的105,或实施例二中的206。
其中,所述输入设备904包括消息接收单元,对应于图7中的消息接收单元13,其具体实现方式可参见图7所示的第一节点中的消息接收单元13的具体描述。所述输入设备904可以是通信接口中具有接收功能的通信接口。
其中,所述输出设备905包括消息发送单元,对应于图7中的消息发送单元12,其具体实现方式可参见图7所示的第一节点中的消息发送单元12的具体描述。所述输出设备905可以是通信接口中具有发送功能的通信接口。
请参见图10,为本发明实施例提供的另一种第二节点的结构示意图,如图10所示,该第一节点包括:至少一个处理器1001,例如CPU,至少一个通信总线1002,通信接口1003,输入设备1004、输出设备1005,存储器1006。所述第二节点是移动承载网中的设备,且不与BTS和BITS相连。其中,通信总线1002用于实现这些组件之间的连接通信。其中,通信接口1003为传递1588V2报文的接口,在不同的承载网或传送网中,所述通信接口1003接口有所不同,可以为1PPS+TOD接口或其他接口,视具体情况而定。其中,存储器1006可以是高速RAM存储器,也可以是非不稳定的存储器(non-volatile memory),例如至少一个磁盘存储器。
其中,处理器1001可以包括响应消息生成单元、节点确定单元、请求消息生成单元、第一添加单元、第二添加单元和性能信息添加单元。其中,所述响应消息生成单元对应于图8中的响应消息生成单元22,用于执行实施例一中的103,或实施例二中的204。所述节点确定单元24对应于图8中的节点确定单元24。所述请求消息生成单元对应于图8中的请求消息生成单元25,所述节点确定单元和所述请求消息生成单元用于执行实施例一中的106,或实施例二中的207。所述第一添加单元、所述第二添加单元和所述性能信息添加 单元分别对应于图8中的第一添加单元27、第二添加单元28和性能信息添加单元29,在所述响应消息生成单元生成同步检测响应消息时执行,或在所述响应消息生成单元生成同步检测响应消息后执行。
其中,所述输入设备1004包括请求消息接收单元,所述请求消息接收单元对应于图8中的请求消息接收单元21,其具体实现方式可参见图8所示的第二节点中的请求消息接收单元21的具体描述。所述输入设备1004可以是通信接口中具有接收功能的通信接口。
其中,所述输出设备1005包括响应消息发送单元和请求消息发送单元,所述响应消息发送单元对应于图8中的响应消息发送单元23,用于执行实施例一中的104,或实施例二中的205。所述请求消息发送单元对应于图8中的请求消息发送单元26,用于执行实施例一中的107,或实施例二中的208。所述输出设备1005可以是通信接口中具有发送功能的通信接口。
需要说明的是,图9所示的第一节点和图10所示的第二节点用于实现本发明实施例一至实施例四所述的内容。
本发明实施例还提供一种用于检测时钟同步路径的系统,所述系统包括图7或图9所述的第一节点,以及图8或图10所述的第二节点。
本发明上述实施例中,一个网络节点是另一个网络节点的时钟跟踪节点,表示所述一个网络节点是直接为所述另一个网络节点提供时钟同步信号的节点。如果所述一个网络节点和所述另一个网络节点之间是频率同步,则所述一个网络节点是所述另一个网络节点的时钟跟踪节点,表示所述一个网络节点是被所述另一个网络锁定的节点,且所述一个网络节点直接提供频率同步信号给所述另一个网络节点。换句话说,所述另一个网络节点可通过自身的标识为slave的端口接收所述一个网络节点通过标识为master的端口发送的频率同步信号。
上述通用处理器可以是微处理器或者该处理器也可以是任何常规的处理器。结合本发明实施例所公开的方法的步骤,可以直接体现为硬件处理器执行完成,或者用处理器中的硬件及软件模块组合执行完成。当使用软件实现 时,可以将实现上述功能的代码存储在计算机可读介质中。计算机可读介质包括计算机存储介质。存储介质可以是计算机能够存取的任何可用介质。以此为例但不限于:计算机可读介质可以是随机存取存储器(英文全称为random access memory,英文缩写为RAM)、只读存储器(英文全称为read-only memory,英文缩写为ROM)、电可擦可编程只读存储器(英文全称为electrically erasable programmable read-only memory,英文缩写为EEPROM)、只读光盘(英文全称为compact disc read-only memory,英文缩写为CD-ROM)或其他光盘存储、磁盘存储介质或者其他磁存储设备、或者能够用于携带或存储具有指令或数据结构形式的程序代码并能够由计算机存取的任何其他介质。计算机可读介质可以是压缩光碟(英文全称为compact disc,英文缩写为CD)、激光碟、数字视频光碟(英文全称为digital video disc,英文缩写为DVD)、软盘或者蓝光碟。
最后应说明的是:以上实施例仅用以示例性说明本发明的技术方案,而非对其限制;尽管参照前述实施例对本发明及本发明带来的有益效果进行了详细的说明,本领域的普通技术人员应当理解:其依然可以对前述各实施例所记载的技术方案进行修改,或者对其中部分技术特征进行等同替换;而这些修改或者替换,并不使相应技术方案的本质脱离本发明权利要求的范围。

Claims (57)

  1. 一种用于检测时钟同步路径的方法,其特征在于,所述方法包括:
    第一节点生成同步检测请求消息,所述同步检测请求消息包括所述第一节点的标识符ID;
    所述第一节点向第二节点发送所述同步检测请求消息;
    所述第一节点接收所述第二节点发送的第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。
  2. 根据权利要求1所述的方法,其特征在于,所述第一节点向第二节点发送所述同步检测请求消息之后,所述方法还包括:
    所述第一节点接收第三节点发送的第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID;
    所述第一节点根据所述第二同步检测响应消息,获得第二检测结果,所述第二检测结果用于表示所述第一节点与所述第三节点间的时钟同步路径的状态,所述第一节点与所述第三节点间的时钟同步路径经过所述第二节点。
  3. 根据权利要求1或2所述的方法,其特征在于,所述第一节点向第二节点发送所述同步检测请求消息包括:
    所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息,所述用于传输时钟同步信号的端口为所述第一节点上能够与所述第二节点传输时钟同步信号的端口。
  4. 根据权利要求3所述的方法,其特征在于,所述同步检测请求消息还包括第一同步类型,所述第一同步类型用于表示频率同步,所述同步检测请 求消息用于请求对频率同步路径进行检测;
    所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息包括:
    所述第一节点根据所述同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端口,所述用于传输频率同步信号的端口为所述第一节点上能够与所述第二节点传输频率同步信号的端口;
    所述第一节点通过所述用于传输频率同步信号的端口,向所述第二节点发送所述同步检测请求消息。
  5. 根据权利要求3所述的方法,其特征在于,所述同步检测请求消息还包括第二同步类型,所述第二同步类型用于表示时间同步,所述同步检测请求消息用于请求对时间同步路径进行检测;
    所述第一节点通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息包括:
    所述第一节点根据所述同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,所述用于传输时间同步信号的端口为所述第一节点上能够与所述第二节点传输时间同步信号的端口;
    所述第一节点通过所述用于传输时间同步信号的端口,向所述第二节点发送所述同步检测请求消息。
  6. 根据权利要求1至5任一所述的方法,其特征在于,所述第一节点生成同步检测请求消息之前,所述方法还包括:
    所述第一节点判断是否跟踪到所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点;
    所述第一节点确定跟踪到所述第一节点的时钟跟踪节点后,执行所述第一节点生成同步检测请求消息。
  7. 根据权利要求1至6任一所述的方法,其特征在于,所述第一检测结 果包括第一同步路径,所述第一同步路径为所述第一节点与所述第二节点的时钟同步路径,所述第二节点的时钟拓扑信息包括所述第二节点的ID;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID和所述第一节点的ID,获得所述第一同步路径。
  8. 根据权利要求7所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果还包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
  9. 根据权利要求7或8所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果还包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
  10. 根据权利要求7所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果还包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
  11. 根据权利要求1至6任一所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
  12. 根据权利要求1至6任一所述的方法或权利要求11所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
  13. 根据权利要求1至6任一所述的方法,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
    所述第一节点根据所述第一同步检测响应消息,获得第一检测结果还包括:
    所述第一节点根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能劣化;
    所述第一节点根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
  14. 根据权利要求1至13任一所述的方法,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,或者所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。
  15. 根据权利要求1至13任一所述的方法,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表,所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。
  16. 一种用于检测时钟同步路径的方法,其特征在于,所述方法包括:
    第二节点接收第一节点发送的第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的时钟拓扑信息;
    所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息,所述同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息;
    所述第二节点发送所述同步检测响应消息。
  17. 根据权利要求16所述的方法,其特征在于,所述第二节点接收第一节点发送的第一同步检测请求消息之后,所述方法还包括:
    所述第二节点确定存在第三节点,生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息;
    所述第二节点向所述第三节点发送所述第二同步检测请求消息。
  18. 根据权利要求17所述的方法,其特征在于,所述第三节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点向所述第三节点发送所述第二同步检测请求消息包括:
    所述第二节点通过用于接收时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息,所述用于接收时钟同步信号的端口为所述第二节点上接收所述第三节点提供的时钟同步信号的端口。
  19. 根据权利要求16至18任一所述的方法,其特征在于,所述第一节点是发起时钟同步检测的节点,所述第一节点的时钟拓扑信息为所述第一节点的标识符ID,所述第二节点发送所述同步检测响应消息包括:
    所述第二节点根据所述第一同步检测请求消息包括的所述第一节点的ID,向所述第一节点发送所述同步检测响应消息。
  20. 根据权利要求16至18任一所述的方法,其特征在于,所述第一同步检测请求消息还包括第四节点的时钟拓扑信息,所述第四节点的时钟拓扑 信息为所述第四节点的ID,所述同步检测响应消息还包括所述第四节点的ID,所述第四节点是发起时钟同步检测的节点,所述第二节点发送所述同步检测响应消息包括:
    所述第二节点根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述同步检测响应消息。
  21. 根据权利要求16或17所述的方法,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
    所述第二节点判断接收所述第一同步检测请求消息的端口是否为用于传输时钟同步信号的端口;
    所述第二节点确定接收所述第一同步检测请求消息的端口是所述用于传输时钟同步信号的端口后,生成所述同步检测响应消息。
  22. 根据权利要求16至20任一所述的方法,其特征在于,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
    所述第二节点确定接收所述第一同步检测请求消息的端口是用于传输频率同步信号的端口;
    所述第二节点将第一同步类型添加至所述同步检测响应消息,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测。
  23. 根据权利要求16至20任一所述的方法,其特征在于,所述第二节点根据所述第一同步检测请求消息,生成同步检测响应消息包括:
    所述第二节点确定接收所述第一同步检测请求消息的端口是用于传输时间同步信号的端口;
    所述第二节点将第二同步类型添加至所述同步检测响应消息,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测。
  24. 根据权利要求16至23任一所述的方法,其特征在于,所述方法还包括:
    所述第二节点检测到所述第二节点存在物理层故障后,将第一告警信息添加至所述同步检测响应消息,所述第一告警信息用于表示发送所述同步检测响应消息的节点存在物理层故障。
  25. 根据权利要求16至24任一所述的方法,其特征在于,所述方法还包括:
    所述第二节点检测到所述第二节点的时钟源异常后,将第二告警信息添加至所述同步检测响应消息,所述第二告警信息用于表示发送所述同步检测响应消息的节点检测到其时钟源异常。
  26. 根据权利要求16至23任一所述的方法,其特征在于,所述方法还包括:
    所述第二节点检测到所述第二节点的频偏性能劣化后,将性能监测信息添加至所述同步检测响应消息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能。
  27. 根据权利要求16或17所述的方法,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,或者所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。
  28. 根据权利要求16或17所述的方法,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表,所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。
  29. 一种第一节点,其特征在于,所述第一节点包括:
    消息生成单元,用于生成同步检测请求消息,所述同步检测请求消息包括所述第一节点的标识符ID;
    消息发送单元,用于向第二节点发送所述同步检测请求消息;
    消息接收单元,用于接收所述第二节点发送的第一同步检测响应消息,所述第一同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的ID;
    结果获得单元,用于根据所述第一同步检测响应消息,获得第一检测结果,所述第一检测结果用于表示所述第一节点与所述第二节点间的时钟同步路径的状态。
  30. 根据权利要求29所述的第一节点,其特征在于,
    所述消息接收单元,还用于接收第三节点发送的第二同步检测响应消息,所述第二同步检测响应消息包括所述第三节点的时钟拓扑信息、所述第二节点的时钟拓扑信息和所述第一节点的ID;
    所述结果获得单元,还用于根据所述第二同步检测响应消息,获得第二检测结果,所述第二检测结果用于表示所述第一节点与所述第三节点间的时钟同步路径的状态,所述第一节点与所述第三节点间的时钟同步路径经过所述第二节点。
  31. 根据权利要求29或30所述的第一节点,其特征在于,所述消息发送单元具体用于通过用于传输时钟同步信号的端口,向所述第二节点发送所述同步检测请求消息,所述用于传输时钟同步信号的端口为所述第一节点上能够与所述第二节点传输时钟同步信号的端口。
  32. 根据权利要求31所述的第一节点,其特征在于,所述同步检测请求消息还包括第一同步类型,所述第一同步类型用于表示频率同步,所述同步检测请求消息用于请求对频率同步路径进行检测;
    所述消息发送单元包括:
    第一端口确定单元,用于根据所述同步检测请求消息中的所述第一同步类型和所述用于传输时钟同步信号的端口,确定用于传输频率同步信号的端 口,所述用于传输频率同步信号的端口为所述第一节点上能够与所述第二节点传输频率同步信号的端口;
    第一消息发送单元,用于通过所述第一端口确定单元确定的所述用于传输频率同步信号的端口,向所述第二节点发送所述同步检测请求消息。
  33. 根据权利要求31所述的第一节点,其特征在于,所述同步检测请求消息还包括第二同步类型,所述第二同步类型用于表示时间同步,所述同步检测请求消息用于请求对时间同步路径进行检测;
    所述消息发送单元包括:
    第二端口确定单元,用于根据所述同步检测请求消息中的所述第二同步类型和用于传输时钟同步信号的端口,确定用于传输时间同步信号的端口,所述用于传输时间同步信号的端口为所述第一节点上能够与所述第二节点传输时间同步信号的端口;
    第二消息发送单元,用于通过所述第二端口确定单元确定的所述用于传输时间同步信号的端口,向所述第二节点发送所述同步检测请求消息。
  34. 根据权利要求29至33任一所述的第一节点,其特征在于,所述第一节点还包括:判断单元;
    所述判断单元用于判断是否跟踪到所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点;
    所述消息生成单元还用于所述判断单元确定跟踪到所述第一节点的时钟跟踪节点后,生成所述同步检测请求消息。
  35. 根据权利要求29至34任一所述的第一节点,其特征在于,所述第一检测结果包括第一同步路径,所述第一同步路径为所述第一节点与所述第二节点的时钟同步路径,所述第二节点的时钟拓扑信息包括所述第二节点的ID;
    所述结果获得单元具体用于根据所述第一同步检测响应消息包括的所述第二节点的ID和所述第一节点的ID,获得所述第一同步路径。
  36. 根据权利要求35所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果还包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
    根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第一告警消息,所述第一告警消息包括所述第二节点的ID。
  37. 根据权利要求35或36所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果还包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
    根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述第二告警消息,所述第二告警消息包括所述第二节点的ID。
  38. 根据权利要求35所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于确定所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果还包括性能异常消息,所述性能异常消息用于通告存在频偏性能劣化的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第 二节点的频偏性能劣化;
    根据所述第一同步检测响应消息包括的所述第二节点的ID,生成所述性能异常消息,所述性能异常消息包括所述第二节点的ID。
  39. 根据权利要求29至34任一所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第一告警信息,所述第一告警信息用于表示发送所述第一同步检测响应消息的节点存在物理层故障,所述第一检测结果包括第一告警消息,所述第一告警消息用于通告存在物理层故障的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述第一告警信息,确定所述第二节点存在物理层故障;
    用于根据所述第一同步检测响应消息包括的第二节点的ID,生成第一告警消息,所述第一告警消息包括所述第二节点的ID。
  40. 根据权利要求29至34任一所述的第一节点或权利要求39所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括第二告警信息,所述第二告警信息用于表示发送所述第一同步检测响应消息的节点检测到其时钟源异常,所述第一检测结果包括第二告警消息,所述第二告警消息用于通告时钟源异常的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述第二告警信息,确定所述第二节点的时钟源异常;
    根据所述第一同步检测响应消息包括的第二节点的ID,生成第二告警消息,所述第二告警消息包括所述第二节点的ID。
  41. 根据权利要求29至34任一所述的第一节点,其特征在于,所述第二节点的时钟拓扑信息包括所述第二节点的ID,所述第一同步检测响应消息还包括性能监测信息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能,所述第一检测结果包括性能异常消息,所述性能异常 消息用于通告存在频偏性能劣化的节点;
    所述结果获得单元具体用于:
    根据所述第一同步检测响应消息包括的所述性能监测信息,确定所述第二节点的频偏性能存在劣化;
    根据所述第一同步检测响应消息包括的第二节点的ID,生成性能异常消息,所述性能异常消息包括所述第二节点的ID。
  42. 根据权利要求29至41任一所述的第一节点,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,或者所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。
  43. 根据权利要求29至41任一所述的第一节点,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表,所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。
  44. 一种第二节点,其特征在于,所述第二节点包括:
    请求消息接收单元,用于接收第一节点发送的第一同步检测请求消息,所述第一同步检测请求消息包括所述第一节点的时钟拓扑信息;
    响应消息生成单元,用于根据所述第一同步检测请求消息,生成同步检测响应消息,所述同步检测响应消息包括所述第二节点的时钟拓扑信息和所述第一节点的时钟拓扑信息;
    响应消息发送单元,用于发送所述同步检测响应消息。
  45. 根据权利要求44所述的第二节点,其特征在于,所述第二节点还包括:
    节点确定单元,用于确定存在第三节点;
    请求消息生成单元,用于根据所述第一同步检测请求消息生成第二同步检测请求消息,所述第三节点是能够与所述第二节点传输时钟同步信号的节点,所述第二同步检测请求消息包括所述第一节点的时钟拓扑信息和所述第二节点的时钟拓扑信息;
    请求消息发送单元,用于向所述第三节点发送所述第二同步检测请求消息。
  46. 根据权利要求45所述的第二节点,其特征在于,所述第三节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,
    所述请求消息发送单元具体用于通过用于接收时钟同步信号的端口,向所述第三节点发送所述第二同步检测请求消息,所述用于接收时钟同步信号的端口为所述第二节点上接收所述第三节点提供的时钟同步信号的端口。
  47. 根据权利要求44至46任一所述的第二节点,其特征在于,所述第一节点是发起时钟同步检测的节点,所述第一节点的时钟拓扑信息为所述第一节点的标识符ID,所述响应消息发送单元具体用于:
    根据所述第一同步检测请求消息包括的所述第一节点的ID,向所述第一节点发送所述同步检测响应消息。
  48. 根据权利要求44至46任一所述的第二节点,其特征在于,所述第一同步检测请求消息还包括第四节点的时钟拓扑信息,所述同步检测响应消息还包括所述第四节点的时钟拓扑信息,所述第四节点的时钟拓扑信息为所述第四节点的ID,所述第四节点是发起时钟同步检测的节点,所述响应消息发送单元具体用于:
    根据所述第一同步检测请求消息包括的所述第四节点的ID,向所述第四节点发送所述同步检测响应消息。
  49. 根据权利要求44或45所述的第二节点,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述响应消息生成单元包括:
    端口判断单元,用于判断所述请求消息接收单元接收所述第一同步检测请求消息的端口是否为用于传输时钟同步信号的端口;
    消息生成单元,用于确定接收所述第一同步检测请求消息的端口是所述用于传输时钟同步信号的端口后,生成所述同步检测响应消息。
  50. 根据权利要求44至48任一所述的第二节点,其特征在于,所述响应消息生成单元包括:
    端口判断单元,用于确定接收所述第一同步检测请求消息的端口是用于传输频率同步信号的端口;
    消息生成单元,用于将第一同步类型添加至所述同步检测响应消息,所述第一同步类型用于表示频率同步,所述第一同步检测请求消息用于请求对频率同步路径进行检测。
  51. 根据权利要求44至48任一所述的第二节点,其特征在于,所述响应消息生成单元包括:
    端口判断单元,用于确定接收所述第一同步检测请求消息的端口是用于传输时间同步信号的端口;
    消息生成单元,用于将第二同步类型添加至所述同步检测响应消息,所述第二同步类型用于表示时间同步,所述第一同步检测请求消息用于请求对时间同步路径进行检测。
  52. 根据权利要求44至51任一所述的第二节点,其特征在于,所述第二节点还包括:
    第一添加单元,用于检测到所述第二节点存在物理层故障后,将第一告警信息添加至所述同步检测响应消息,所述第一告警信息用于表示发送所述同步检测响应消息的节点存在物理层故障。
  53. 根据权利要求44至52任一所述的第二节点,其特征在于,所述第二节点还包括:
    第二添加单元,用于检测到所述第二节点的时钟源异常后,将第二告警信息添加至所述同步检测响应消息,所述第二告警信息用于表示发送所述同 步检测响应消息的节点检测到其时钟源异常。
  54. 根据权利要求44至51任一所述的第二节点,其特征在于,所述第二节点还包括:
    性能信息添加单元,用于检测到所述第二节点的频偏性能劣化后,将性能监测信息添加至所述同步检测响应消息,所述性能监测信息用于表示所述第一同步检测响应消息的节点的频偏性能劣化。
  55. 根据权利要求44或45所述的第二节点,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,或者所述第二节点为所述第一节点的时钟跟踪节点,所述第一节点的时钟跟踪节点是用于为所述第一节点直接提供时钟同步信号的节点。
  56. 根据权利要求44或45所述的第二节点,其特征在于,所述第一节点为所述第二节点的时钟跟踪节点,所述第二节点的时钟跟踪节点是用于为所述第二节点直接提供时钟同步信号的节点,所述第二节点的时钟拓扑信息包括所述第二节点的ID和所述第二节点的端口列表,所述第二节点的端口列表包括所述第二节点的用于接收时钟同步信号的端口和N个用于发送时钟同步信号的端口。
  57. 一种用于检测时钟同步路径的系统,其特征在于,所述系统包括至少一个如权利要求29至43所述的第一节点和至少一个如权利要求44至56所述的第二节点。
PCT/CN2016/102751 2015-10-30 2016-10-20 用于检测时钟同步路径的方法、节点及系统 WO2017071521A1 (zh)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2018518619A JP6598175B2 (ja) 2015-10-30 2016-10-20 クロック同期パスを検出するための方法、ノード、およびシステム
EP19180920.1A EP3614586B1 (en) 2015-10-30 2016-10-20 Method, node and system for detecting clock synchronization path
KR1020187008626A KR102055201B1 (ko) 2015-10-30 2016-10-20 클록 동기화 경로를 검출하는 방법, 노드, 및 시스템
ES16858956T ES2816077T3 (es) 2015-10-30 2016-10-20 Procedimiento, nodo y sistema para detectar una ruta de sincronización de reloj
EP16858956.2A EP3334068B1 (en) 2015-10-30 2016-10-20 Method, node and system for detecting clock synchronization path
US15/961,532 US10462760B2 (en) 2015-10-30 2018-04-24 Method, node, and system for detecting clock synchronization path

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510728622.0 2015-10-30
CN201510728622.0A CN106656387B (zh) 2015-10-30 2015-10-30 用于检测时钟同步路径的方法、节点及系统

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US15/961,532 Continuation US10462760B2 (en) 2015-10-30 2018-04-24 Method, node, and system for detecting clock synchronization path

Publications (1)

Publication Number Publication Date
WO2017071521A1 true WO2017071521A1 (zh) 2017-05-04

Family

ID=58631343

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2016/102751 WO2017071521A1 (zh) 2015-10-30 2016-10-20 用于检测时钟同步路径的方法、节点及系统

Country Status (7)

Country Link
US (1) US10462760B2 (zh)
EP (2) EP3334068B1 (zh)
JP (1) JP6598175B2 (zh)
KR (1) KR102055201B1 (zh)
CN (1) CN106656387B (zh)
ES (2) ES2879435T3 (zh)
WO (1) WO2017071521A1 (zh)

Families Citing this family (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2019100336A1 (zh) * 2017-11-24 2019-05-31 华为技术有限公司 对网络设备进行同步的方法以及网络设备
CN110649983B (zh) 2018-06-26 2021-08-03 华为技术有限公司 一种同步方法及装置
WO2020001504A1 (zh) * 2018-06-26 2020-01-02 华为技术有限公司 一种同步方法及装置
CN113572559B (zh) * 2018-11-21 2022-06-14 华为技术有限公司 同步的方法和装置
JP7283069B2 (ja) * 2018-12-17 2023-05-30 日本電信電話株式会社 時刻同期経路選択装置、および、時刻同期経路選択方法
CN111258209A (zh) * 2018-12-25 2020-06-09 维沃移动通信有限公司 一种时间信息的获取方法、发送方法、终端和网络设备
JP7143568B2 (ja) * 2019-07-22 2022-09-29 トゥルク テレコムニカシオン アノニム シルケティ 完全または部分的なタイミングサポートなしの、従来のipコアネットワークにおける衛星に依存しない位相および周波数同期のための時間転送システムおよび方法
US11196500B1 (en) * 2020-07-23 2021-12-07 Cisco Technology, Inc. Continuance in quality level of an input timing signal
US11700309B2 (en) * 2020-08-13 2023-07-11 Alibaba Group Holding Limited Network parameter provisioning for instantiation of a network entity
CN111930849B (zh) * 2020-09-23 2022-08-02 睿视(苏州)视频科技有限公司 数据同步方法、装置及存储介质
CN112543502B (zh) * 2020-11-30 2022-10-11 紫光展锐(重庆)科技有限公司 通信同步方法、设备、装置及存储介质

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7436813B2 (en) * 2004-08-16 2008-10-14 Samsung Electronics Co., Ltd Method and system for acquiring time synchronization between base stations in a broadband wireless access communication system
CN101459502A (zh) * 2007-12-13 2009-06-17 华为技术有限公司 一种网络时钟同步的方法与装置
CN102347850A (zh) * 2010-07-28 2012-02-08 中兴通讯股份有限公司 一种p2mp路径的故障定位方法及系统
CN104954153A (zh) * 2014-03-24 2015-09-30 中兴通讯股份有限公司 节点故障检测方法及装置

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6711411B1 (en) * 2000-11-07 2004-03-23 Telefonaktiebolaget Lm Ericsson (Publ) Management of synchronization network
JP2006087065A (ja) * 2004-08-18 2006-03-30 Fujitsu Ltd 同期伝送ネットワークシステム
CN101252426B (zh) * 2007-09-11 2011-05-11 北京东土科技股份有限公司 一种高可靠性分布式冗余环网的实现方法
CN101262401B (zh) * 2007-12-28 2010-12-29 上海自动化仪表股份有限公司 一种环形网络中实现网络恢复的方法
US8606961B2 (en) * 2008-03-12 2013-12-10 Telefonaktiebolaget Lm Ericsson (Publ) Method and apparatus for link-state handshake for loop prevention
JP5849786B2 (ja) 2012-03-08 2016-02-03 富士通株式会社 データブロック出力装置、通信システム、データブロック出力方法、及び通信方法
CN104507155B (zh) * 2014-12-17 2018-02-27 苏州寻息电子科技有限公司 一种有源节点的组网同步与管理方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7436813B2 (en) * 2004-08-16 2008-10-14 Samsung Electronics Co., Ltd Method and system for acquiring time synchronization between base stations in a broadband wireless access communication system
CN101459502A (zh) * 2007-12-13 2009-06-17 华为技术有限公司 一种网络时钟同步的方法与装置
CN102347850A (zh) * 2010-07-28 2012-02-08 中兴通讯股份有限公司 一种p2mp路径的故障定位方法及系统
CN104954153A (zh) * 2014-03-24 2015-09-30 中兴通讯股份有限公司 节点故障检测方法及装置

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3334068A4 *

Also Published As

Publication number Publication date
EP3334068A4 (en) 2018-08-01
CN106656387B (zh) 2018-09-07
ES2816077T3 (es) 2021-03-31
JP2018536334A (ja) 2018-12-06
KR20180044977A (ko) 2018-05-03
EP3334068A1 (en) 2018-06-13
KR102055201B1 (ko) 2019-12-12
US10462760B2 (en) 2019-10-29
EP3614586A1 (en) 2020-02-26
EP3614586B1 (en) 2021-04-07
US20180242267A1 (en) 2018-08-23
JP6598175B2 (ja) 2019-10-30
EP3334068B1 (en) 2020-07-08
ES2879435T3 (es) 2021-11-22
CN106656387A (zh) 2017-05-10

Similar Documents

Publication Publication Date Title
WO2017071521A1 (zh) 用于检测时钟同步路径的方法、节点及系统
US10892884B2 (en) Method for updating clock synchronization topology, method for determining clock synchronization path, and device
US9819541B2 (en) PTP over IP in a network topology with clock redundancy for better PTP accuracy and stability
US9407526B1 (en) Network liveliness detection using session-external communications
US11617030B2 (en) Methods and apparatus for consistency check in disaggregated dense wavelength-division multiplexing (DWDM) systems
WO2017101528A1 (zh) 一种时钟链路切换方法、装置及基站
WO2008131624A1 (fr) Système ethernet réparti et son utilisation pour détection de dysfonctionnement
US20140211780A1 (en) Clock Synchronization Method and Device
WO2014082547A1 (zh) 一种同步链路故障检测方法及装置
EP2852098B1 (en) Method, node and system for detecting performance of layer three virtual private network
JP2013509744A (ja) 高精度時間プロトコルメッセージを処理するための方法およびクロックデバイス
US11411666B2 (en) Clock fault detection and correction between synchronized network devices
WO2019157802A1 (zh) 测量网络性能的方法、设备和网络系统
WO2010102565A1 (zh) 时间同步的方法、装置和系统
TWI836735B (zh) 網路設備及避免時鐘迴路的方法
WO2022063207A1 (zh) 处理时间同步故障的方法、装置及系统
WO2020238799A1 (zh) 一种基于twamp的检测方法及相关设备
Anand et al. LOW LATENCY LOW LOSS UNDER 1 MSEC PROTECTION IN 5G/LTE-A PACKET FRONTHAUL
CN117241365A (zh) 时间偏差的监控方法、装置及系统
WO2012174963A1 (zh) Ptp lsp的选取方法及装置
Azizi et al. MPLS-TP OAM Toolset: Interworking and Interoperability Issues
Stein et al. Transport Network Aspects

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16858956

Country of ref document: EP

Kind code of ref document: A1

WWE Wipo information: entry into national phase

Ref document number: 2016858956

Country of ref document: EP

ENP Entry into the national phase

Ref document number: 20187008626

Country of ref document: KR

Kind code of ref document: A

WWE Wipo information: entry into national phase

Ref document number: 2018518619

Country of ref document: JP

NENP Non-entry into the national phase

Ref country code: DE