WO2017070951A1 - 一种回波抵消的相关电路及方法 - Google Patents

一种回波抵消的相关电路及方法 Download PDF

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Publication number
WO2017070951A1
WO2017070951A1 PCT/CN2015/093454 CN2015093454W WO2017070951A1 WO 2017070951 A1 WO2017070951 A1 WO 2017070951A1 CN 2015093454 W CN2015093454 W CN 2015093454W WO 2017070951 A1 WO2017070951 A1 WO 2017070951A1
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WIPO (PCT)
Prior art keywords
resistor
resistance unit
unit
differential signal
adjustable
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PCT/CN2015/093454
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English (en)
French (fr)
Inventor
湛永坚
赵治磊
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华为技术有限公司
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Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to PCT/CN2015/093454 priority Critical patent/WO2017070951A1/zh
Priority to CN201580080700.9A priority patent/CN107615741B/zh
Publication of WO2017070951A1 publication Critical patent/WO2017070951A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04M—TELEPHONIC COMMUNICATION
    • H04M9/00—Arrangements for interconnection not involving centralised switching
    • H04M9/08—Two-way loud-speaking telephone systems with means for conditioning the signal, e.g. for suppressing echoes for one or both directions of traffic
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B3/00—Line transmission systems
    • H04B3/02—Details
    • H04B3/20—Reducing echo effects or singing; Opening or closing transmitting path; Conditioning for transmission in one direction or the other

Definitions

  • the present application relates to the field of communications technologies, and in particular, to a related circuit and method for echo cancellation.
  • DSL Digital Subscriber Line
  • VDSL Very High Bit-rate DSL
  • G.Fast systems G.Fast systems
  • Figure 1 shows the general structure of an xDSL system.
  • an xDSL system includes a Central Office (CO) end, one or more distribution boxes, and a number of Customer Premise Equipment (CEP).
  • CO Central Office
  • CEP Customer Premise Equipment
  • Different xDSL systems use early twisted-pair telephone channels, CEP and CO are connected by twisted pair, and xDSL system uses hybrid (Hybrid) circuit to realize signal transmission and separation.
  • FIG. 2 shows the function realization of the hybrid circuit.
  • the transmitter is a Line Driver (LD) and the receiver is a Low Noise AMP (LNA).
  • LNA Low Noise AMP
  • the signal sent by the local transmitter LD passes through the output of the hybrid circuit to reach the U interface, and the U interface is the interface of the hybrid circuit and the twisted pair.
  • the dotted line Tx in FIG. 2 is the transmission direction of the signal transmitted by the local transmitter, and the dotted line Rx is the end. The direction of transmission of the signal received by the receiver.
  • the signal sent by the local transmitter LD passes through the hybrid circuit, and a part of the signal is transmitted to the local receiver LNA, which causes interference to the receiving signal of the local receiver LNA in the Rx direction.
  • the hybrid circuit contains two matching resistors, 12.5 ⁇ , transformer, and echo cancellation circuit.
  • the U interface impedance is 100 ⁇
  • the transformer coil turns ratio is 1:2.
  • the hybrid circuit uses a differential circuit, and the transmitter LD differentiates two outputs, and outputs two differential signals of the same amplitude and opposite phases.
  • the echo cancellation circuit uses two of both 1K ⁇ and 499 ⁇ . For the resistance parameter, the two differential signals can cancel each other when they reach the two inputs of the local LNA.
  • the principle of the echo cancellation circuit is introduced by taking a pair of resistance parameters as an example.
  • One end of 1K ⁇ receives a differential signal
  • one end of 499 ⁇ receives another differential signal through a matching resistor of 12.5 ⁇ .
  • the other end of 1K ⁇ is connected to the other end of 499 ⁇ as an input terminal of the local LNA. Since the other differential signal is reduced by half after the matching resistor is 12.5 ⁇ , the 1K ⁇ and 499 ⁇ with a resistance ratio of 1:2 can make the two differential signals reach the same input and have opposite phases when they reach one input of the local LNA. Just offset each other. In this way, the signal sent by the local LD is not received by the local LNA, and the local LNA does not interfere with the received signal in the Rx direction.
  • the traditional hybrid circuit uses a fixed resistance parameter. Once the factory cannot be changed, it can be seen from the analysis in Fig. 3 that the echo cancellation circuit in the hybrid circuit achieves the ideal cancellation effect, and the matching resistor and the U interface impedance are required to be completely matched. Yes, however, in real-world applications, due to various application environmental factors, the matching resistor and the U interface impedance cannot be fully matched at all times. Thus, once the matching resistor and the U interface impedance do not match, the resistance parameter in the hybrid circuit is not In the case of change, the ideal cancellation effect cannot be achieved, and the local receiving signal cannot be isolated from the transmitted signal.
  • the resistance value of the resistance parameter in the echo cancellation circuit is often increased, but this increases the attenuation degree of the signal transmitted by the receiving end of the local receiver.
  • analog switch switching is used to select different resistance parameters.
  • this method is simple to control, it can be improved to some extent than using a single resistance value, but on the one hand, the input capacitance of the analog switch is large.
  • the area of the general circuit board is limited, and many sets of resistors cannot be placed. Therefore, the number of resistor parameters is limited, resulting in large adjustment granularity and failure to achieve the desired offset effect. It is impossible to avoid the problem that the received signal is received by the transmitted signal.
  • the present application provides a related circuit and method for echo cancellation to solve the existing technology.
  • the echo cancellation circuit the resistance parameter adjustment granularity is large, the ideal cancellation effect cannot be achieved, and the problem that the received signal receives the transmission signal interference cannot be avoided.
  • an echo cancellation circuit including a first resistance unit and a second resistance unit, wherein:
  • the first resistance unit and/or the second resistance unit is an adjustable resistance unit
  • One end of the first resistance unit receives a first differential signal
  • one end of the second resistance unit receives a second differential signal, the first differential signal and the second differential signal having the same amplitude and opposite phases
  • the other end of the first resistor unit is connected to the other end of the second resistor unit, and the connected end point is formed as a first differential signal after flowing through the first resistor unit and after flowing through the second resistor unit An output point of the mixed signal formed by the two differential signals;
  • the adjustable resistance unit is also coupled to the adjustable current source for receiving current output by the adjustable current source.
  • the adjustable resistance unit is a PIN diode
  • the adjustable resistance unit includes at least one fixed value resistor and a PIN diode connected in series; or
  • the adjustable resistance unit includes at least one fixed value resistor and a PIN diode connected in parallel; or
  • the adjustable resistance unit includes at least one fixed value resistor and a PIN diode, wherein at least one of the fixed value resistors is connected in series with the PIN diode in parallel.
  • the first resistance unit and/or the second resistance unit are adjustable resistors Unit, specifically including:
  • the first resistance unit is a fixed value resistor, and the second resistance unit is an adjustable resistance unit;
  • the second resistance unit is a fixed value resistor, and the first resistance unit is an adjustable resistance unit;
  • the first resistance unit and the second resistance unit are both adjustable resistance units.
  • an echo cancellation circuit including a first resistance unit, a second resistance unit, a third resistance unit, a fourth resistance unit, and an adjustable resistance unit, wherein:
  • One end of the first resistance unit and one end of the fourth resistance unit receive the first differential signal
  • One end of the second resistance unit and one end of the third resistance unit receive a second differential signal; the first differential signal and the second differential signal have the same amplitude and opposite phases;
  • the other end of the first resistor unit is connected to the other end of the second resistor unit, and the other end of the third resistor is connected to the other end of the fourth resistor unit, and the end points formed by the connection are respectively flowed through An output point of the mixed signal formed by the first differential signal after the one resistor unit and the second differential signal flowing through the second resistor unit, the second differential signal flowing through the third resistor unit, and after flowing through the fourth resistor unit An output point of the mixed signal formed by the first differential signal;
  • the first resistance unit and the third resistance unit are constant resistance values of the same resistance;
  • the second resistance unit includes a first constant value resistor and a second constant value resistor connected in series, and
  • the fourth resistance unit includes a third fixed value resistor and a fourth fixed value resistor connected in series;
  • One end of the adjustable resistance unit is connected between the first fixed value resistor and the second fixed value resistor, and the other end is connected between the third fixed value resistor and the fourth fixed value resistor. And for adjusting a magnitude of a second differential signal flowing through the second resistance unit, and adjusting a magnitude of the first differential signal flowing through the fourth resistance unit;
  • the adjustable resistance unit is also coupled to the adjustable current source for receiving current output by the adjustable current source.
  • the adjustable resistance unit is a PIN diode.
  • the PIN diode includes a first sub PIN diode and a second sub PIN diode connected in parallel.
  • a hybrid circuit comprising: a first matching resistor, a second matching resistor, a transformer, and any one of the first to second possible implementations of the first aspect, the first aspect
  • the echo cancellation circuit described therein wherein:
  • Two ends of one coil of the transformer are respectively connected to the first matching resistor and the second matching resistor;
  • One end of the second resistance unit receives a flow through the first matching resistor or the second matching resistor Second differential signal.
  • a hybrid circuit comprising: a first matching resistor, a second matching resistor, a transformer, and the second aspect, any one of the first to second possible implementations of the second aspect Echo cancellation circuit, where:
  • Two ends of one coil of the transformer are respectively connected to the first matching resistor and the second matching resistor;
  • One end of the second resistance unit receives a second differential signal flowing through the second matching resistor
  • One end of the fourth resistance unit receives a first differential signal flowing through the first matching resistor.
  • a fifth aspect provides an echo cancellation circuit system including a controller, a transmitter, a receiver, an adjustable current source, and a hybrid circuit as provided by the third aspect or the fourth aspect;
  • the transmitter, the receiver, and the adjustable current source are all connected to the controller, and the transmitter, the receiver, and the adjustable current source are all connected to the hybrid circuit;
  • the controller configured to send, by the transmitter, a first test signal to the hybrid circuit, and receive, by the receiver, a second test signal that is returned by the hybrid circuit based on the first test signal;
  • the second test signal is analyzed, and according to the analysis result, when the first differential signal and the second differential signal do not cancel each other at the output point, continuously adjusting the current output by the adjustable current source to change a resistance of the adjustable resistance unit connected to the adjustable current source until it is determined that the first differential signal and the second differential signal cancel each other according to a result of analyzing the second test signal received each time So far.
  • a method for echo cancellation comprising:
  • the controller sends a first test signal to the hybrid circuit
  • the controller receives a second test signal returned by the hybrid circuit based on the first test signal
  • the controller analyzes the second test signal to obtain an analysis result
  • the controller continuously determines, according to the analysis result, that the resistance value of the adjustable resistor in the hybrid circuit is continuously adjusted when the first differential signal and the second differential signal output by the hybrid circuit do not cancel each other until each reception according to the pair
  • the second test signal is analyzed to determine the first differential signal The number and the second differential signal cancel each other out.
  • the adjustable resistor is a PIN diode; and the controller continuously adjusts a resistance of the adjustable resistor in the hybrid circuit, including:
  • the controller continuously adjusts the current of the adjustable current source coupled to the PIN diode in the hybrid circuit to change the resistance of the PIN diode.
  • an apparatus for echo cancellation including:
  • a sending unit configured to send a first test signal to the hybrid circuit
  • a receiving unit configured to receive a second test signal returned by the hybrid circuit based on the first test signal sent by the sending unit
  • An analyzing unit configured to analyze the second test signal received by the receiving unit to obtain an analysis result
  • control unit configured to continuously adjust a resistance of the adjustable resistor in the hybrid circuit when the first differential signal and the second differential signal output by the hybrid circuit do not cancel each other according to the analysis result, until according to the analyzing And a result of analyzing the second test signal received each time by the unit determines that the first differential signal and the second differential signal cancel each other.
  • the adjustable resistor is a PIN diode; and the control unit is specifically configured to:
  • the current of the tunable current source connected to the PIN diode in the hybrid circuit is continuously adjusted to vary the resistance of the PIN diode.
  • a continuously adjustable resistor is introduced, and the resistance value of the adjustable resistor is continuously adjusted, so that the two differential signals can be zero at the output signal of the local transmitter to the local receiver, the circuit Under the premise of small structural change, the automatic adjustment of the resistance matching is realized, the isolation of the transmitted and received signals is obtained, the attenuation of the received signal transmitted from the opposite end is reduced, and the communication quality is improved.
  • FIG. 1 is a general structural diagram of an xDSL system in the prior art
  • FIG. 2 is a schematic diagram showing the function realization of a hybrid circuit in the prior art
  • FIG. 3 is a schematic diagram of a hybrid circuit in an xDSL system in the prior art
  • FIG. 4 is a structural diagram of a first echo cancellation circuit in the present application.
  • FIGS. 4a and 4b are diagrams showing an example of the structure of the first echo canceling circuit in the present application.
  • 5 and 5a are structural diagrams of a second echo cancellation circuit in the present application.
  • Figure 6 is a structural diagram of a first hybrid circuit in the present application.
  • Figure 7 is a structural diagram of a second hybrid circuit in the present application.
  • FIG. 8 is a schematic diagram of an echo cancellation circuit system in the present application.
  • Figure 10 is a structural diagram of an echo canceling device in the present application.
  • the transmitter may be, but is not limited to, the line driver LD of FIG. 2.
  • the receiver may be, but is not limited to, the low noise amplifier LNA of FIG. 2.
  • the present application also uses a differential circuit, and the transmitter differentiates two outputs. The two differential signals of the same amplitude and opposite phase are output, and the two differential signals pass through the hybrid circuit and cancel each other when they reach the input end of the receiver.
  • the present application introduces a continuously adjustable resistance unit in the echo cancellation circuit, and the two differential signals output by the local transmitter are adjusted by adjusting the continuous adjustable resistance unit It can complete the cancellation, obtain greater isolation of the transceiver signal, reduce the attenuation of the receiving signal received by the local receiver from the opposite end, and improve the communication quality.
  • the present application provides a first type of echo cancellation circuit including a first resistor unit 41 and a second resistor unit 42, wherein:
  • the first resistor unit 41 and/or the second resistor unit 42 are adjustable resistor units;
  • One end of the first resistance unit 41 receives a first differential signal
  • one end of the second resistance unit 42 receives a second differential signal, the first differential signal having the same amplitude and opposite phase as the second differential signal;
  • the other end of the first resistor unit 41 is connected to the other end of the second resistor unit 42.
  • the connected end point is formed as a first differential signal after flowing through the first resistor unit 41 and after flowing through the second resistor unit 42.
  • the adjustable resistance unit is also coupled to the adjustable current source for receiving current output by the adjustable current source.
  • the resistance of the first resistance unit and/or the resistance of the second resistance unit is an adjustable resistance
  • the resistance of the first resistance unit is received when receiving the current output from the adjustable current source.
  • the second resistor unit is capable of generating a continuously adjustable resistor, such that the first resistor unit can form a match with the second resistor unit, such that the first differential signal flowing through the first resistor unit flows through the second resistor unit.
  • the second differential signal after the offset is canceled at the output point, that is, the input point of the local receiver, that is, the two differential signals sent by the local transmitter do not reach the local receiver, and the local receiver Receiving the received signal from the peer transmitter does not cause interference.
  • the first resistor unit and/or the second resistor unit are adjustable resistor units, including a plurality of cases: the first resistor unit is a fixed value resistor, and the second resistor unit is adjustable. a resistor unit; the second resistor unit is a fixed value resistor, the first resistor unit is an adjustable resistor unit; and the first resistor unit and the second resistor unit are both adjustable resistor units. In either case, the resistance of the first resistor unit and the second resistor unit can be matched by adjusting the current output from the adjustable current source.
  • the adjustable resistance unit in the echo cancellation circuit shown in FIG. 4 includes various forms, for example, the adjustable resistance unit is a PIN diode; or the adjustable resistance unit includes at least one fixed value resistor and a PIN connected in series. a diode; or, the adjustable resistor unit includes at least one fixed resistor in parallel And the PIN diode; or, the adjustable resistor unit includes at least one fixed value resistor and a PIN diode, wherein at least one of the set resistors is connected in series with the PIN diode in parallel.
  • the adjustable resistance unit is a PIN diode
  • the adjustable resistance unit includes at least one fixed value resistor and a PIN connected in series.
  • the first resistor unit 41 is a constant value resistor
  • the second resistor unit is an adjustable resistor
  • the adjustable resistor includes a PIN diode connected in series and two fixed resistors. Then, a structural diagram as shown in Fig. 4a is formed.
  • the first resistor unit 41 is a constant value resistor
  • the second resistor unit is an adjustable resistor
  • the adjustable resistor includes two fixed resistors and a PIN diode, wherein The two fixed resistors are connected in series and connected in parallel with the PIN diode to form a structural diagram as shown in FIG. 4b.
  • the echo cancellation circuit provided in FIG. 4 is applicable to the scenario where the input end of the local receiver is one.
  • the present application provides a second echo cancellation circuit, see FIG.
  • the second echo cancellation circuit 50 provided by the present application includes a first resistance unit 51, a second resistance unit 52, a third resistance unit 53, a fourth resistance unit 54, and an adjustable resistance unit 55, wherein:
  • One end of the first resistance unit 51 and one end of the fourth resistance unit 54 receive a first differential signal, and one end of the second resistance unit 52 and one end of the third resistance unit 53 receive a second difference. a signal; the first differential signal and the second differential signal have the same amplitude and opposite phases;
  • the other end of the first resistor unit 51 is connected to the other end of the second resistor unit 52, and the other end of the third resistor unit 53 is connected to the other end of the fourth resistor unit 54.
  • An output point of the mixed signal formed by the first differential signal flowing through the first resistance unit 51 and the second differential signal flowing through the second resistance unit 52, respectively, and a second differential signal flowing through the third resistance unit 53 An output point of the mixed signal formed with the first differential signal flowing through the fourth resistance unit 54;
  • the first resistor unit 51 and the third resistor unit 53 are constant resistance values of the same resistance;
  • the second resistor unit 52 includes a first fixed value resistor and a second fixed value resistor in series, and the fourth The resistor unit 54 includes a third fixed value resistor and a fourth fixed value resistor connected in series;
  • One end of the adjustable resistance unit 55 is connected between the first fixed value resistor 51 and the second fixed value resistor 52, and the other end is connected to the third fixed value resistor and the fourth fixed value resistor Between, for adjusting the amplitude of the second differential signal flowing through the second resistance unit 52, and adjusting the amplitude of the first differential signal flowing through the fourth resistance unit 54;
  • the adjustable resistance unit 55 is also coupled to an adjustable current source for receiving current output by the adjustable current source.
  • the adjustable resistance unit 55 is a PIN diode.
  • the PIN diode can be used as a variable impedance component, so it only presents a linear resistance to the AC signal.
  • the adjustable current source is a high-precision statically adjustable current source that can output a continuously variable current. The resistance of the PIN diode appears with the inflow. The current changes linearly.
  • the amplitude of the second differential signal flowing through the second resistance unit 52 can be simultaneously adjusted by the change in the resistance of the PIN diode, and the first flow through the fourth resistance unit 54 can be adjusted.
  • the amplitude is constant, such that the amplitude of the first differential signal flowing through the first resistance unit 51, the second differential signal flowing through the second resistance unit 52 is the same, and flowing through the third resistance unit 53
  • the amplitude of the second differential signal, the first differential signal flowing through the fourth resistance unit 52 is the same, and since the phases of the first differential signal and the second differential signal are opposite, the first differential signal flowing through the first resistance unit 51 and The second differential signals flowing through the second resistance unit 52 may cancel each other at the output point, and the second differential signal flowing through the third resistance unit 53 and the first differential signal flowing through the fourth resistance unit 54 may
  • the PIN diode comprises a first sub-PIN diode and a second sub-PIN diode connected in parallel.
  • the adjustable resistor unit 55 that is, two sub-PIN diodes connected in parallel are used as the adjustable resistor unit 55, which can make the adjustment granularity of the adjustable resistor unit 55 smaller and reduce the PIN diode. The distortion produced by the tube.
  • the first hybrid circuit includes a first matching resistor 61, a second matching resistor 62, a transformer 63, and a The first type of echo cancellation circuit, in which:
  • One end of one coil of the transformer 63 is respectively connected to the first matching resistor 61 and the second matching resistor 62;
  • One end of the first resistance unit 41 receives a first differential signal
  • One end of the second resistance unit 42 receives a second differential signal flowing through the first matching resistor 61 or the second matching resistor 62.
  • the transformer 63 is connected to the twisted pair through the U interface, and the impedance of the U interface is not shown in FIG. 6. According to the turns ratio of the coil in the transformer 63 and the impedance of the U interface, the first matching resistor 61 and the second matching resistor 62 can be determined.
  • the resistance values of the first matching resistor 61 and the second matching resistor 62 are the same, the first resistor unit 41 directly receives the first differential signal, and the second resistor unit 42 receives the first matching resistor 61 or flows through the second matching.
  • the second differential signal of the resistor 62 in FIG.
  • the second differential signal flows through the second matching resistor 62 as an example, and the first differential signal and the second differential signal pass through the echo cancellation circuit at the output point.
  • the mutually canceled, the output point is connected to the input end of the local receiver, and the principle of the operation of the echo canceling circuit is as described in FIG. 4 provided by the present application, and details are not described herein again.
  • the present application Based on the second echo cancellation circuit provided by the present application, as shown in FIG. 7, the present application provides a second hybrid circuit including a first matching resistor 71, a second matching resistor 72, a transformer 73, and the present invention as provided by the present application.
  • the second echo cancellation circuit wherein:
  • One end of one coil of the transformer 73 is respectively connected to the first matching resistor 71 and the second matching resistor 72;
  • One end of the second resistance unit 52 receives a second differential signal flowing through the second matching resistor 72;
  • One end of the fourth resistance unit 54 receives a first differential signal flowing through the first matching resistor 71.
  • the transformer 73 is connected to the twisted pair through the U interface, and the U interface impedance is not shown in FIG.
  • the resistance values of the first matching resistor 71 and the second matching resistor 72 can be determined according to the turns ratio of the coils in the transformer 73 and the U interface impedance.
  • the resistance values of the first matching resistor 71 and the second matching resistor 72 are the same, and the first resistor
  • the unit 51 directly receives the first differential signal
  • the second resistor unit 52 receives the second differential signal flowing through the second matching resistor 72
  • the third resistor unit 53 directly receives the second differential signal
  • the fourth resistor unit 54 receives the first differential signal.
  • the present invention further provides an echo cancellation circuit system 80, including a controller 81, a transmitter 82, a receiver 83, and An adjustable current source 84, and a first or second hybrid circuit as provided herein;
  • the transmitter 82, the receiver 83, and the adjustable current source 84 are all connected to the controller 81, and the transmitter 82, the receiver 83, and the adjustable current source 84 are both
  • the first hybrid circuit or the second hybrid circuit is connected; preferably, the connection refers to a direct connection or an indirect connection through other components.
  • the controller 81 is configured to send, by the transmitter 82, a first test signal to a first hybrid circuit or a second hybrid circuit, and receive, by the receiver 83, a first hybrid circuit or a second hybrid
  • the circuit is based on the second test signal returned by the first test signal; and analyzing the second test signal, determining, according to the analysis result, that the first differential signal and the second differential signal are not at the output point
  • the current output by the adjustable current source 84 is continuously adjusted to change the resistance of the adjustable resistance unit connected to the adjustable current source 84 until the second test signal is received for each reception.
  • the result of the analysis determines that the first differential signal and the second differential signal cancel each other out.
  • the system calibrates the cancellation effect of the hybrid circuit.
  • the controller 81 passes the digital-to-analog converter, the transmitter 82 to the first hybrid circuit or The second hybrid circuit sends the first test signal. If the cancellation effect of the hybrid circuit is not satisfactory, the controller 81 receives the return of the hybrid circuit through the receiver 83 and the analog-to-digital converter.
  • the second test signal is a signal that is not cancelled by the hybrid circuit.
  • the controller 81 can adjust the resistance of the adjustable resistor in the hybrid circuit by adjusting the current output by the adjustable current source 84, thereby adjusting
  • the first differential signal and the amplitude of the second differential signal are matched, such that the first differential signal and the second differential signal cancel each other out at the output point, wherein the basis for determining that the two differential signals cancel each other is that the controller 81 pairs
  • the two differential signal signals are analyzed to determine that the second differential signal is less than the threshold, or when it is zero, it is determined that the two differential signals cancel each other.
  • the present application further provides a method for echo cancellation, including:
  • Step 900 The controller sends a first test signal to the hybrid circuit.
  • Step 910 The controller receives a second test signal returned by the hybrid circuit based on the first test signal.
  • Step 920 The controller analyzes the second test signal to obtain an analysis result.
  • Step 930 The controller determines, according to the analysis result, that the resistance value of the adjustable resistor in the hybrid circuit is continuously adjusted when the first differential signal and the second differential signal output by the hybrid circuit do not cancel each other until the pair is The result of the analysis of the received second test signal each time determines that the first differential signal and the second differential signal cancel each other.
  • the adjustable resistor is a PIN diode; the controller continuously adjusts the current of the adjustable current source connected to the PIN diode in the hybrid circuit to change the resistance of the PIN diode.
  • the present application further provides an apparatus 100 for echo cancellation, including:
  • the sending unit 101 is configured to send a first test signal to the hybrid circuit.
  • the receiving unit 102 is configured to receive a second test signal returned by the hybrid circuit based on the first test signal sent by the sending unit;
  • the analyzing unit 103 is configured to analyze the second test signal received by the receiving unit to obtain an analysis result
  • the control unit 104 is configured to continuously adjust the resistance of the adjustable resistor in the hybrid circuit when the first differential signal and the second differential signal output by the hybrid circuit do not cancel each other according to the analysis result. a value until it is determined that the first differential signal and the second differential signal cancel each other according to a result of analyzing the received second test signal by the analyzing unit.
  • the adjustable resistor is a PIN diode; the control unit 104 is specifically configured to:
  • the current of the tunable current source connected to the PIN diode in the hybrid circuit is continuously adjusted to vary the resistance of the PIN diode.
  • the echo cancellation circuit introduces a continuously adjustable resistor, and by continuously adjusting the resistance of the adjustable resistor, the two differential signals can be outputted from the local transmitter to the local receiver.
  • the automatic adjustment of the resistance matching is realized, the isolation of the transmitted and received signals is obtained, the attenuation of the received signal transmitted from the opposite end is reduced, and the communication quality is improved.
  • embodiments of the present application can be provided as a method, system, or computer program product.
  • the present application can take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment in combination of software and hardware.
  • the application can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the instructions stored in the computer readable memory produce an article of manufacture comprising the instruction device.
  • the apparatus implements the functions specified in one or more blocks of a flow or a flow and/or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.

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Abstract

本申请提供一种回波抵消的相关电路及方法，用以提高回波抵消效果。回波抵消电路中，第一电阻单元的一端、第四电阻单元的一端均接收第一差分信号，第二电阻单元的一端、第三电阻单元的一端均接收第二差分信号，第一电阻单元与第三电阻单元为阻值相同的定值电阻；第二电阻单元包括串联的第一定值电阻和第二定值电阻、第四电阻单元包括串联的第三定值电阻和第四定值电阻；可调电阻单元的一端连接于第一定值电阻与第二定值电阻之间、另一端连接于第三定值电阻与第四定值电阻之间，用于调节流经第二电阻单元的第二差分信号的幅值，以及调节流经第四电阻单元的第一差分信号的幅值；可调电阻单元还与可调电流源连接，用于接收可调电流源输出的电流。

Description

一种回波抵消的相关电路及方法 技术领域
本申请涉及通信技术领域，特别涉及一种回波抵消的相关电路及方法。
背景技术
随着用户对带宽要求的不断增长，数字用户线路(Digital Subscriber Line，DSL)系统在不断升级，以使得传输速率不断提高，使用频谱不断增加。xDSL表示不同类型的数字用户线路，包括非对称数字用户线路(Asymmetric Digital Subscriber Line，ADSL)、超高速数字用户线路(Very High Bit-rate DSL，VDSL)、以及G.Fast系统等。
如图1所示为xDSL系统的一般结构。通常而言，xDSL系统包括一个中心局(Central Office，CO)端，一个或多个分线盒，若干个用户端设备(Customer Premise Equipment，CEP)。不同的xDSL系统使用的都是早期布放的电话双绞线信道，CEP与CO端通过双绞线连接，xDSL系统使用混合(Hybrid)电路来实现收发信号分离。
如图2所示为混合电路的功能实现示意图。发射器为线路驱动器(Line Driver，LD)，接收器为低噪声放大器(Low Noise AMP，LNA)。本端发射器LD发出的信号经过混合电路输出到达U接口，U接口为混合电路与双绞线的接口，图2中虚线Tx为本端发射器发送的信号的传输方向，虚线Rx为本端接收器接收的信号的传输方向。
实际应用中，本端发射器LD发出的信号经过混合电路，会有一部分信号传输到本端接收器LNA，对本端接收器LNA在Rx方向的接收信号造成干扰。
如图3所示为现有技术xDSL系统中混合电路示例。混合电路中包含两个匹配电阻12.5Ω，变压器，和回波抵消电路。U接口阻抗为100Ω，变压器线圈匝数比为1:2。混合电路采用差分电路，发射器LD差分出两个输出端，输出幅度相同、相位相反的两路差分信号。回波抵消电路采用均为1KΩ和499Ω的两 对电阻参数，用于两路差分信号在到达本端LNA的两个输入端时，均可以相互抵消。
以其中一对电阻参数为例对回波抵消电路的原理进行介绍。1KΩ的一端接收一路差分信号，499Ω的一端通过匹配电阻12.5Ω接收另一路差分信号，1KΩ的另一端和499Ω的另一端连接作为本端LNA的一个输入端。由于另一路差分信号经过匹配电阻12.5Ω后幅度下降一半，因此采用阻值比值为1:2的1KΩ与499Ω，可以使两路差分信号到达本端LNA的一个输入端时幅度相同、相位相反，正好相互抵消。这样，可以使本端LD发出的信号不被本端LNA接收，不对本端LNA在Rx方向的接收信号造成干扰。
传统的混合电路使用的是固定的电阻参数，一旦出厂无法更改，从图3的分析可知，要使混合电路中的回波抵消电路达到理想的抵消效果，要求匹配电阻和U接口阻抗完全匹配才可以，然而在真实应用环境中，由于各种应用环境因素的影响，匹配电阻和U接口阻抗并不能时刻达到完全匹配，这样，一旦匹配电阻和U接口阻抗不匹配，在混合电路中电阻参数不变的情况下，就无法达到理想的抵消效果，也就无法使本端接收信号与发送信号隔离开来。
现有技术中，为了促使本端收发信号的隔离，往往增大回波抵消电路中电阻参数的阻值，但这样就会增加本端接收器接收对端发送的信号的衰减程度。
另外，现有技术中，采用模拟开关切换选择不同的电阻参数，这种方法虽然控制简单，比使用单一电阻值能在一定程度上有所改进，但是，一方面，模拟开关的输入电容很大，会严重影响高频信号的性能；另一方面，一般电路板的面积有限，不能安置很多组电阻，因此电阻参数的组数受限，导致调节粒度很大，无法达到理想的抵消效果，也就无法避免接收信号收到发送信号干扰的问题。
发明内容
本申请提供一种回波抵消的相关电路及方法，用以解决现有技术中存在 的回波抵消电路中电阻参数调节粒度很大，无法达到理想的抵消效果，以及无法避免接收信号收到发送信号干扰的问题。
第一方面，提供一种回波抵消电路，包括第一电阻单元、第二电阻单元，其中：
所述第一电阻单元和/或所述第二电阻单元为可调电阻单元；
所述第一电阻单元的一端接收第一差分信号，所述第二电阻单元的一端接收第二差分信号，所述第一差分信号与第二差分信号幅值相同、相位相反；
所述第一电阻单元的另一端与所述第二电阻单元的另一端相连，所述相连形成的端点作为流经第一电阻单元后的第一差分信号与流经第二电阻单元后的第二差分信号形成的混合信号的输出点；
所述可调电阻单元还与可调电流源连接，用于接收所述可调电流源输出的电流。
结合第一方面，在第一方面的第一种可能的实现方式中，所述可调电阻单元为PIN二极管；或
所述可调电阻单元包括串联的至少一个定值电阻和PIN二极管；或
所述可调电阻单元包括并联的至少一个定值电阻与PIN二极管；或
所述可调电阻单元包括至少一个定值电阻与PIN二极管，其中至少一个定值电阻串联后与所述PIN二极管并联。
结合第一方面或第一方面的第一种可能的实现方式，在第一方面的第二种可能的实现方式中，所述第一电阻单元和/或所述第二电阻单元为可调电阻单元，具体包括：
所述第一电阻单元为定值电阻，所述第二电阻单元为可调电阻单元；
所述第二电阻单元为定值电阻，所述第一电阻单元为可调电阻单元；
所述第一电阻单元和所述第二电阻单元均为可调电阻单元。
第二方面，提供一种回波抵消电路，包括第一电阻单元、第二电阻单元、第三电阻单元、第四电阻单元、可调电阻单元，其中：
所述第一电阻单元的一端、所述第四电阻单元的一端均接收第一差分信 号，所述第二电阻单元的一端、所述第三电阻单元的一端均接收第二差分信号；所述第一差分信号与第二差分信号幅值相同、相位相反；
所述第一电阻单元的另一端与所述第二电阻单元的另一端相连，所述第三电阻的另一端与所述第四电阻单元的另一端相连，相连形成的端点分别作为流经第一电阻单元后的第一差分信号与流经第二电阻单元后的第二差分信号形成的混合信号的输出点、流经第三电阻单元后的第二差分信号与流经第四电阻单元后的第一差分信号形成的混合信号的输出点；
所述第一电阻单元与所述第三电阻单元为阻值相同的定值电阻；所述第二电阻单元包括串联的第一定值电阻和第二定值电阻、所述第四电阻单元包括串联的第三定值电阻和第四定值电阻；
所述可调电阻单元的一端连接于所述第一定值电阻与所述第二定值电阻之间、另一端连接于所述第三定值电阻与所述第四定值电阻之间，用于调节流经第二电阻单元的第二差分信号的幅值，以及调节流经第四电阻单元的第一差分信号的幅值；
所述可调电阻单元还与可调电流源连接，用于接收所述可调电流源输出的电流。
结合第二方面，在第二方面的第一种可能的实现方式中，所述可调电阻单元为PIN二极管。
结合第二方面的第一种可能的实现方式，在第二方面的第二种可能的实现方式中，所述PIN二极管包括并联的第一子PIN二极管和第二子PIN二极管。
第三方面，提供一种混合电路，包括第一匹配电阻、第二匹配电阻、变压器、以及如第一方面、第一方面的第一种至第二种可能的实现方式中的任一种所述的回波抵消电路，其中：
所述变压器的一个线圈两端分别与所述第一匹配电阻和所述第二匹配电阻相连；
所述第二电阻单元的一端接收流经所述第一匹配电阻或第二匹配电阻的 第二差分信号。
第四方面，提供一种混合电路，包括第一匹配电阻、第二匹配电阻、变压器、以及第二方面、第二方面的第一种至第二种可能的实现方式中的任一种所述的回波抵消电路，其中：
所述变压器的一个线圈两端分别与所述第一匹配电阻和所述第二匹配电阻相连；
所述第二电阻单元的一端接收流经所述第二匹配电阻的第二差分信号；
所述第四电阻单元的一端接收流经所述第一匹配电阻的第一差分信号。
第五方面，提供一种回波抵消电路系统，包括控制器、发射器、接收器、可调电流源、以及如第三方面或第四方面提供的混合电路；
所述发射器、所述接收器、所述可调电流源均与所述控制器连接，且所述发射器、所述接收器、所述可调电流源均与所述混合电路连接；
所述控制器，用于通过所述发射器，向所述混合电路发送第一测试信号，通过所述接收器接收所述混合电路基于所述第一测试信号返回的第二测试信号；并对所述第二测试信号进行分析，根据分析结果确定所述第一差分信号与所述第二差分信号在所述输出点处未相互抵消时，连续调节所述可调电流源输出的电流来改变与所述可调电流源连接的可调电阻单元的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
第六方面，提供一种回波抵消的方法，包括：
控制器向混合电路发送第一测试信号；
所述控制器接收所述混合电路基于所述第一测试信号返回的第二测试信号；
所述控制器对所述第二测试信号进行分析，获得分析结果；
所述控制器根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信 号与所述第二差分信号相互抵消时为止。
结合第六方面，在第六方面的第一种可能的实现方式中，所述可调电阻为PIN二极管；所述控制器连续调节所述混合电路中可调电阻的阻值，包括：
所述控制器连续调节与所述混合电路中PIN二极管连接的可调电流源的电流来改变所述PIN二极管的阻值。
第七方面，提供一种回波抵消的装置，包括：
发送单元，用于向混合电路发送第一测试信号；
接收单元，用于接收所述混合电路基于所述发送单元发送的第一测试信号返回的第二测试信号；
分析单元，用于对所述接收单元接收的第二测试信号进行分析，获得分析结果；
控制单元，用于根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻值，直到根据所述分析单元对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
结合第七方面，在第七方面的第一种可能的实现方式中，所述可调电阻为PIN二极管；所述控制单元具体用于：
连续调节与所述混合电路中PIN二极管连接的可调电流源的电流来改变所述PIN二极管的阻值。
本申请提供的回波抵消电路中，引入了连续可调电阻，通过连续调节可调电阻的阻值，使得两路差分信号能够在本端发送器向本端接收器的输出信号为零，电路结构改变较小的前提下，实现自动调节电阻匹配，获得更大的收发信号的隔离度，减少来自对端发送的接收信号的衰减，提高通信质量。
附图说明
图1为现有技术中xDSL系统的一般结构图；
图2为现有技术中混合电路的功能实现示意图；
图3为现有技术中xDSL系统中混合电路示意图；
图4为本申请中第一种回波抵消电路结构图；
图4a和图4b为本申请中第一种回波抵消电路结构示例图；
图5和图5a为本申请中第二种回波抵消电路结构图；
图6为本申请中第一种混合电路结构图；
图7为本申请中第二种混合电路结构图；
图8为本申请中回波抵消电路系统示意图；
图9为本申请中回波抵消方法流程图；
图10为本申请中回波抵消装置结构图。
具体实施方式
为了使本申请的目的、技术方案和优点更加清楚，下面将结合附图对本申请作进一步地详细描述，显然，所描述的实施例仅仅是本申请的一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其它实施例，都属于本申请保护的范围。
在本申请中，发射器可以但不限于图2中的线路驱动器LD，接收器可以但不限于图2中的低噪声放大器LNA，本申请同样采用差分电路，发射器差分出两个输出端，输出幅度相同、相位相反的两路差分信号，这两路差分信号经过混合电路，到达接收器的输入端时，相互抵消。
为了避免混合电路中的回波抵消电路抵消效果不理想的情况下，本端发射器发出的信号在经过混合电路后，会有一部分信号传输到本端接收器，对本端接收器接收信号造成干扰、以及来自于对端的接收信号衰减的问题，本申请在回波抵消电路中引入连续可调电阻单元，通过对所述连续可调电阻单元的调节，使本端发射器输出的两路差分信号能够完成抵消，获得更大的收发信号隔离度，减少本端接收器接收来自于对端的接收信号的衰减，提高通信质量。
本申请提供两种回波抵消电路，下面结合附图进行详细说明。
参阅图4所示，本申请提供第一种回波抵消电路包括第一电阻单元41、第二电阻单元42，其中：
第一电阻单元41和/或第二电阻单元42为可调电阻单元；
第一电阻单元41的一端接收第一差分信号，第二电阻单元42的一端接收第二差分信号，所述第一差分信号与第二差分信号幅值相同、相位相反；
第一电阻单元41的另一端与第二电阻单元42的另一端相连，所述相连形成的端点作为流经第一电阻单元41后的第一差分信号与流经第二电阻单元42后的第二差分信号形成的混合信号的输出点；
所述可调电阻单元还与可调电流源连接，用于接收所述可调电流源输出的电流。
即，图4提供的回波抵消电路中，第一电阻单元的电阻和/或第二电阻单元的电阻为可调电阻，在接收可调电流源输出的电流时，第一电阻单元的电阻和/或第二电阻单元能够产生连续可调的电阻，这样能够使第一电阻单元可第二电阻单元形成匹配，进而使得流经第一电阻单元后的第一差分信号与流经第二电阻单元后的第二差分信号在输出点处相互抵消，所述输出点即本端接收器的输入点，也就是由本端发射器发送的两路差分信号不会到达本端接收器，对本端接收器接收来自于对端发送器的接受信号不会造成干扰。
较佳地，所述第一电阻单元和/或所述第二电阻单元为可调电阻单元，包括多种情况：所述第一电阻单元为定值电阻，所述第二电阻单元为可调电阻单元；所述第二电阻单元为定值电阻，所述第一电阻单元为可调电阻单元；所述第一电阻单元和所述第二电阻单元均为可调电阻单元。无论哪一种情况，都可以通过调节可调电流源输出的电流，使得第一电阻单元和第二电阻单元的阻值形成匹配。
较佳地，图4所示的回波抵消电路中的可调电阻单元包括多种形式，例如：可调电阻单元为PIN二极管；或者，可调电阻单元包括串联的至少一个定值电阻和PIN二极管；或者，可调电阻单元包括并联的至少一个定值电阻 与PIN二极管；或者，可调电阻单元包括至少一个定值电阻与PIN二极管，其中至少一个定值电阻串联后与所述PIN二极管并联。需要说明的是，以上形式仅是举例，可调电阻单元还可以为其他形式。
例如，若图4提供的回波抵消电路中，第一电阻单元41为定值电阻，第二电阻单元为可调电阻，且所述可调电阻包括串联的PIN二极管和两个定值电阻，则形成如图4a所示的结构图。
又例如，若图4提供的回波抵消电路中，第一电阻单元41为定值电阻，第二电阻单元为可调电阻，且所述可调电阻包括两个定值电阻与PIN二极管，其中两个定值电阻串联后与所述PIN二极管并联，则形成如图4b所示的结构图。
上述图4提供的回波抵消电路适用于本端接收器的输入端为一个的场景，针对本端接收器采用两个输入端的场景，本申请提供了第二种回波抵消电路，参阅图5所示，本申请提供的第二种回波抵消电路50包括第一电阻单元51、第二电阻单元52、第三电阻单元53、第四电阻单元54、可调电阻单元55，其中：
所述第一电阻单元51的一端、所述第四电阻单元54的一端均接收第一差分信号，所述第二电阻单元52的一端、所述第三电阻单元53的一端均接收第二差分信号；所述第一差分信号与第二差分信号幅值相同、相位相反；
所述第一电阻单元51的另一端与所述第二电阻单元52的另一端相连，所述第三电阻单元53的另一端与所述第四电阻单元54的另一端相连，相连形成的端点分别作为流经第一电阻单元51后的第一差分信号与流经第二电阻单元52后的第二差分信号形成的混合信号的输出点、流经第三电阻单元53后的第二差分信号与流经第四电阻单元54后的第一差分信号形成的混合信号的输出点；
所述第一电阻单元51与所述第三电阻单元53为阻值相同的定值电阻；所述第二电阻单元52包括串联的第一定值电阻和第二定值电阻、所述第四电阻单元54包括串联的第三定值电阻和第四定值电阻；
所述可调电阻单元55的一端连接于所述第一定值电阻51与所述第二定值电阻52之间、另一端连接于所述第三定值电阻与所述第四定值电阻之间，用于调节流经第二电阻单元52的第二差分信号的幅值，以及调节流经第四电阻单元54的第一差分信号的幅值；
所述可调电阻单元55还与可调电流源连接，用于接收所述可调电流源输出的电流。
较佳地，所述可调电阻单元55为PIN二极管。PIN二极管可以作为可变阻抗元件使用，所以对交流电信号只呈现一个线性电阻，可调电流源为高精度静态可调电流源，可输出连续可变电流，PIN二极管呈现的阻值随着流入电流的变化而呈线性变化。
图5所示的回波抵消电路中，通过PIN二极管阻值的改变，可以同时调节流经第二电阻单元52的第二差分信号的幅值，以及调节流经第四电阻单元54的第一差分信号的幅值，由于第一电阻单元51和第三电阻单元53为定值电阻，因此流经第一电阻单元51的第一差分信号和流经第三电阻单元53的第二差分信号的幅值不变，这样可以通过调节使得流经第一电阻单元51的第一差分信号、流经第二电阻单元52的第二差分信号的幅值相同，以及，流经第三电阻单元53的第二差分信号、流经第四电阻单元52的第一差分信号的幅值相同，由于第一差分信号和第二差分信号的相位相反，因此流经第一电阻单元51的第一差分信号和流经第二电阻单元52的第二差分信号可以在输出点处相互抵消，以及，流经第三电阻单元53的第二差分信号和流经第四电阻单元54的第一差分信号可以在另外一个输出点处相互抵消，所述输出点即本端接收器的输入端，这样本端发射器发出的两路差分信号都不会被本端接收器的两个输入端接收到，也就是本端接收器接收来自于对端发送的接收信号不会受到本端发射器发送信号的干扰。
较佳地，所述PIN二极管包括并联的第一子PIN二极管和第二子PIN二极管。参阅图5a所示，即，采用并联的两个子PIN二极管作为可调电阻单元55，这样可以使得所述可调电阻单元55的调节粒度更小，并且降低PIN二极 管产生的失真。
基于本申请提供的第一种回波抵消电路，参阅图6所示，本申请提供第一种混合电路，包括第一匹配电阻61、第二匹配电阻62、变压器63、以及如本申请提供的第一种回波抵消电路，其中：
所述变压器63的一个线圈两端分别与所述第一匹配电阻61和所述第二匹配电阻62相连；
所述第一电阻单元41的一端接收第一差分信号；
所述第二电阻单元42的一端接收流经所述第一匹配电阻61或第二匹配电阻62的第二差分信号。
其中，变压器63通过U接口连接双绞线，U接口阻抗未在图6中显示，根据变压器63中线圈的匝数比以及U接口阻抗，可确定第一匹配电阻61、第二匹配电阻62的阻值，第一匹配电阻61和第二匹配电阻62的阻值相同，第一电阻单元41直接接收第一差分信号，第二电阻单元42接收流经第一匹配电阻61或流经第二匹配电阻62的第二差分信号，本申请提供的图6中，以第二差分信号流过第二匹配电阻62作为示例，第一差分信号与第二差分信号经过回波抵消电路后，在输出点处相互抵消，输出点连接本端接收器的输入端，回波抵消电路工作的原理如本申请提供的图4中描述，在此不再赘述。
基于本申请提供的第二种回波抵消电路，参阅图7所示，本申请提供第二种混合电路，包括第一匹配电阻71、第二匹配电阻72、变压器73、以及如本申请提供的第二种回波抵消电路，其中：
所述变压器73的一个线圈两端分别与所述第一匹配电阻71和所述第二匹配电阻72相连；
所述第二电阻单元52的一端接收流经所述第二匹配电阻72的第二差分信号；
所述第四电阻单元54的一端接收流经所述第一匹配电阻71的第一差分信号。
同样，变压器73通过U接口连接双绞线，U接口阻抗未在图7中显示， 根据变压器73中线圈的匝数比以及U接口阻抗，可确定第一匹配电阻71、第二匹配电阻72的阻值，第一匹配电阻71和第二匹配电阻72的阻值相同，第一电阻单元51直接接收第一差分信号，第二电阻单元52接收流经第二匹配电阻72的第二差分信号，第三电阻单元53直接接收第二差分信号，第四电阻单元54接收流经第一匹配电阻71的第一差分信号，第一差分信号与第二差分信号经过回波抵消电路后，在两个输出点处分别相互抵消，两个输出点连接本端接收器的两个输入端，回波抵消电路工作的原理如本申请提供的图5中描述，在此不再赘述。
基于本申请提供的第一种混合电路或第二种混合电路，参阅图8所示，本申请还提供了一种回波抵消电路系统80，包括控制器81、发射器82、接收器83、可调电流源84、以及如本申请提供的第一种或第二种混合电路；
所述发射器82、所述接收器83、所述可调电流源84均与所述控制器81连接，且所述发射器82、所述接收器83、所述可调电流源84均与第一种混合电路或第二种混合电路连接；较佳地，所述连接是指直接连接，或经过其他组件间接连接。
所述控制器81，用于通过所述发射器82，向第一种混合电路或第二种混合电路发送第一测试信号，通过所述接收器83接收第一种混合电路或第二种混合电路基于所述第一测试信号返回的第二测试信号；并对所述第二测试信号进行分析，根据分析结果确定所述第一差分信号与所述第二差分信号在所述输出点处未相互抵消时，连续调节所述可调电流源84输出的电流来改变与所述可调电流源84连接的可调电阻单元的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
具体地，在本申请中，在正常通信之前，系统对混合电路的抵消效果进行校准，校准过程中，较佳地，控制器81通过数模转换器、发射器82向第一种混合电路或第二种混合电路发送第一测试信号，若混合电路的抵消效果不理想，则控制器81会通过接收器83、模数转换器接收到混合电路返回的第 二测试信号，所述第二测试信号为未被混合电路抵消掉的信号，此时控制器81通过调节可调电流源84输出的电流，可以调节混合电路中可调电阻的阻值，进而调节第一差分信号与第二差分信号的幅值相匹配，使得第一差分信号与第二差分信号在输出点出相互抵消，其中，判定两路差分信号相互抵消的依据为，控制器81对第二差分信号信号进行分析，判定第二差分信号小于阈值，或者为零时，则判定两路差分信号相互抵消。
基于上述回波抵消电路系统80，参阅图9所示，本申请还提供了一种回波抵消的方法，包括：
步骤900：控制器向混合电路发送第一测试信号；
步骤910：所述控制器接收所述混合电路基于所述第一测试信号返回的第二测试信号；
步骤920：所述控制器对所述第二测试信号进行分析，获得分析结果；
步骤930：所述控制器根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
较佳地，所述可调电阻为PIN二极管；所述控制器连续调节与所述混合电路中PIN二极管连接的可调电流源的电流来改变所述PIN二极管的阻值。
基于上述回波抵消的方法，参阅图10所示本申请还提供了一种回波抵消的装置100，包括：
发送单元101，用于向混合电路发送第一测试信号；
接收单元102，用于接收所述混合电路基于所述发送单元发送的第一测试信号返回的第二测试信号；
分析单元103，用于对所述接收单元接收的第二测试信号进行分析，获得分析结果；
控制单元104，用于根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻 值，直到根据所述分析单元对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
较佳地，所述可调电阻为PIN二极管；所述控制单元104具体用于：
连续调节与所述混合电路中PIN二极管连接的可调电流源的电流来改变所述PIN二极管的阻值。
综上所述，本申请提供的回波抵消电路中，引入了连续可调电阻，通过连续调节可调电阻的阻值，使得两路差分信号能够在本端发送器向本端接收器的输出信号为零，电路结构改变较小的前提下，实现自动调节电阻匹配，获得更大的收发信号的隔离度，减少来自对端发送的接收信号的衰减，提高通信质量。
本领域内的技术人员应明白，本申请的实施例可提供为方法、系统、或计算机程序产品。因此，本申请可采用完全硬件实施例、完全软件实施例、或结合软件和硬件方面的实施例的形式。而且，本申请可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器、CD-ROM、光学存储器等)上实施的计算机程序产品的形式。
本申请是参照根据本申请实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
尽管已描述了本申请的优选实施例，但本领域内的技术人员一旦得知了基本创造性概念，则可对这些实施例作出另外的变更和修改。所以，所附权利要求意欲解释为包括优选实施例以及落入本申请范围的所有变更和修改。
显然，本领域的技术人员可以对本申请实施例进行各种改动和变型而不脱离本申请实施例的精神和范围。这样，倘若本申请实施例的这些修改和变型属于本申请权利要求及其等同技术的范围之内，则本申请也意图包含这些改动和变型在内。

Claims (13)

  1. 一种回波抵消电路，其特征在于，包括第一电阻单元、第二电阻单元，其中：
    所述第一电阻单元和/或所述第二电阻单元为可调电阻单元；
    所述第一电阻单元的一端接收第一差分信号，所述第二电阻单元的一端接收第二差分信号，所述第一差分信号与第二差分信号幅值相同、相位相反；
    所述第一电阻单元的另一端与所述第二电阻单元的另一端相连，所述相连形成的端点作为流经第一电阻单元后的第一差分信号与流经第二电阻单元后的第二差分信号形成的混合信号的输出点；
    所述可调电阻单元还与可调电流源连接，用于接收所述可调电流源输出的电流。
  2. 如权利要求1所述的回波抵消电路，其特征在于，所述可调电阻单元为PIN二极管；或
    所述可调电阻单元包括串联的至少一个定值电阻和PIN二极管；或
    所述可调电阻单元包括并联的至少一个定值电阻与PIN二极管；或
    所述可调电阻单元包括至少一个定值电阻与PIN二极管，其中至少一个定值电阻串联后与所述PIN二极管并联。
  3. 如权利要求1或2所述的回波抵消电路，其特征在于，所述第一电阻单元和/或所述第二电阻单元为可调电阻单元，具体包括：
    所述第一电阻单元为定值电阻，所述第二电阻单元为可调电阻单元；
    所述第二电阻单元为定值电阻，所述第一电阻单元为可调电阻单元；
    所述第一电阻单元和所述第二电阻单元均为可调电阻单元。
  4. 一种回波抵消电路，其特征在于，包括第一电阻单元、第二电阻单元、第三电阻单元、第四电阻单元、可调电阻单元，其中：
    所述第一电阻单元的一端、所述第四电阻单元的一端均接收第一差分信号，所述第二电阻单元的一端、所述第三电阻单元的一端均接收第二差分信 号；所述第一差分信号与第二差分信号幅值相同、相位相反；
    所述第一电阻单元的另一端与所述第二电阻单元的另一端相连，所述第三电阻单元的另一端与所述第四电阻单元的另一端相连，相连形成的端点分别作为流经第一电阻单元后的第一差分信号与流经第二电阻单元后的第二差分信号形成的混合信号的输出点、流经第三电阻单元后的第二差分信号与流经第四电阻单元后的第一差分信号形成的混合信号的输出点；
    所述第一电阻单元与所述第三电阻单元为阻值相同的定值电阻；所述第二电阻单元包括串联的第一定值电阻和第二定值电阻、所述第四电阻单元包括串联的第三定值电阻和第四定值电阻；
    所述可调电阻单元的一端连接于所述第一定值电阻与所述第二定值电阻之间、另一端连接于所述第三定值电阻与所述第四定值电阻之间，用于调节流经第二电阻单元的第二差分信号的幅值，以及调节流经第四电阻单元的第一差分信号的幅值；
    所述可调电阻单元还与可调电流源连接，用于接收所述可调电流源输出的电流。
  5. 如权利要求4所述的回波抵消电路，其特征在于，所述可调电阻单元为PIN二极管。
  6. 如权利要求5所述的回波抵消电路，其特征在于，所述PIN二极管包括并联的第一子PIN二极管和第二子PIN二极管。
  7. 一种混合电路，其特征在于，包括第一匹配电阻、第二匹配电阻、变压器、以及如权利要求1-3任一项所述的回波抵消电路，其中：
    所述变压器的一个线圈两端分别与所述第一匹配电阻和所述第二匹配电阻相连；
    所述第二电阻单元的一端接收流经所述第一匹配电阻或第二匹配电阻的第二差分信号。
  8. 一种混合电路，其特征在于，包括第一匹配电阻、第二匹配电阻、变压器、以及如权利要求4-6任一项所述的回波抵消电路，其中：
    所述变压器的一个线圈两端分别与所述第一匹配电阻和所述第二匹配电阻相连；
    所述第二电阻单元的一端接收流经所述第二匹配电阻的第二差分信号；
    所述第四电阻单元的一端接收流经所述第一匹配电阻的第一差分信号。
  9. 一种回波抵消电路系统，其特征在于，包括控制器、发射器、接收器、可调电流源、以及如权利要求7或8所述的混合电路；
    所述发射器、所述接收器、所述可调电流源均与所述控制器连接，且所述发射器、所述接收器、所述可调电流源均与所述混合电路连接；
    所述控制器，用于通过所述发射器，向所述混合电路发送第一测试信号，通过所述接收器接收所述混合电路基于所述第一测试信号返回的第二测试信号；并对所述第二测试信号进行分析，根据分析结果确定所述第一差分信号与所述第二差分信号在所述输出点处未相互抵消时，连续调节所述可调电流源输出的电流来改变与所述可调电流源连接的可调电阻单元的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
  10. 一种回波抵消的方法，其特征在于，包括：
    控制器向混合电路发送第一测试信号；
    所述控制器接收所述混合电路基于所述第一测试信号返回的第二测试信号；
    所述控制器对所述第二测试信号进行分析，获得分析结果；
    所述控制器根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻值，直到根据对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
  11. 如权利要求10所述的方法，其特征在于，所述可调电阻为PIN二极管；所述控制器连续调节所述混合电路中可调电阻的阻值，包括：
    所述控制器连续调节与所述混合电路中PIN二极管连接的可调电流源的 电流来改变所述PIN二极管的阻值。
  12. 一种回波抵消的装置，其特征在于，包括：
    发送单元，用于向混合电路发送第一测试信号；
    接收单元，用于接收所述混合电路基于所述发送单元发送的第一测试信号返回的第二测试信号；
    分析单元，用于对所述接收单元接收的第二测试信号进行分析，获得分析结果；
    控制单元，用于根据所述分析结果确定所述混合电路输出的第一差分信号与第二差分信号未相互抵消时，连续调节所述混合电路中可调电阻的阻值，直到根据所述分析单元对每次接收的所述第二测试信号进行分析的结果确定所述第一差分信号与所述第二差分信号相互抵消时为止。
  13. 如权利要求12所述的装置，其特征在于，所述可调电阻为PIN二极管；所述控制单元具体用于：
    连续调节与所述混合电路中PIN二极管连接的可调电流源的电流来改变所述PIN二极管的阻值。
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