WO2017049706A1 - 扇出结构及电子装置 - Google Patents

扇出结构及电子装置 Download PDF

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Publication number
WO2017049706A1
WO2017049706A1 PCT/CN2015/093011 CN2015093011W WO2017049706A1 WO 2017049706 A1 WO2017049706 A1 WO 2017049706A1 CN 2015093011 W CN2015093011 W CN 2015093011W WO 2017049706 A1 WO2017049706 A1 WO 2017049706A1
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Prior art keywords
fan
metal layer
line
out line
insulating layer
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Ceased
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PCT/CN2015/093011
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English (en)
French (fr)
Inventor
杜鹏
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/897,763 priority Critical patent/US20180219031A1/en
Publication of WO2017049706A1 publication Critical patent/WO2017049706A1/zh
Anticipated expiration legal-status Critical
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G02F1/13452—Conductors connecting driver circuitry and terminals of panels
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1345—Conductors connecting electrodes to cell terminals
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/481—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs integrated with passive devices, e.g. auxiliary capacitors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65—Shapes or dispositions of interconnections
    • H10W70/654—Top-view layouts
    • H10W70/655—Fan-out layouts

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a fan-out structure, and to an electronic device having the fan-out structure.
  • the liquid crystal display panel is an important component of the liquid crystal display device, and the liquid crystal display panel can display an image under the cooperation of the backlight module and the driving circuit.
  • a TFT (Thin Film Transistor) array region is provided on an array substrate of a liquid crystal display panel.
  • the TFT array area is filled with signal lines and TFTs.
  • the driving circuit board connects the signal lines of the array substrate to the solder pads of the driving circuit board through a fan-out structure having a plurality of fanout lines.
  • the resistance distribution of the fan-out line is uneven because the solder legs are closely arranged and the signal lines are dispersed (ie, the distance from the solder pins to the signal lines are different).
  • There are differences in the resistance of the fan-out lines of different lengths which may cause the signal waveform to be deformed, thereby affecting the display quality of the liquid crystal display device.
  • the length of the fan-out line is adjusted based on the position of the fan-out line, so that the resistance of each fan-out line of the fan-out structure can be matched.
  • the method of matching the resistance will be described below by taking the fan-out structure shown in FIG. 1 as an example. All of the fan-out lines 11' of the fan-out structure shown in Fig. 1 are located in the same metal layer, and any two adjacent fan-out lines 11' do not overlap each other. In order to make the resistance of each of the fan-out lines 11' the same, the closer the fan-out line 11' closer to both ends is, the more the bending is closer to the intermediate fan-out line 11'.
  • the prior art only considers the influence of uneven distribution of resistance on the display effect, and does not consider the influence of uneven distribution of capacitance on the display effect. Since the RC signal delay of the signal line is caused by the interaction of the resistor and the capacitor, only considering the distribution of the resistor without considering the distribution of the capacitor also affects the display effect of the display panel. Further, referring to Fig. 1, the absence of overlap between the fan-out lines 11' results in an increase in the overall height of the fan-out structure, which is disadvantageous for the narrow frame of the liquid crystal display panel.
  • the technical problem to be solved by the present invention is that, when designing the fan-out structure, only the influence of uneven distribution of resistance on the display effect is considered, and the influence of uneven distribution of capacitance on the display effect is not considered; in addition, in the prior art There is no overlap between the fan-out lines of the fan-out structure, resulting in an increase in the overall height of the fan-out structure, which is disadvantageous for the narrow frame of the liquid crystal display panel.
  • the present invention provides a fan-out structure and an electronic device.
  • a fan-out structure comprising:
  • a vertical projection of the first fan-out line on the second metal layer is alternately arranged with the second fan-out line, and the vertical projection partially overlaps an adjacent second fan-out line.
  • the first fan-out line and the second fan-out line each have a fan-out portion and an adjustment portion connected to each other, the fan-out portion is a straight line, and the adjustment portion is a bent-and-returned bend. line;
  • the vertical projection of the adjustment portion of the first fan-out line on the second metal layer partially overlaps the adjustment portion of the second fan-out line.
  • the angle at which the adjustment portion is bent is 90°.
  • the insulating layer is formed on the first metal layer, and the second metal layer is formed on the insulating layer; or
  • the insulating layer is formed on the second metal layer, and the first metal layer is formed on the insulating layer.
  • the material of the first fan-out line is the same as the material of the second fan-out line.
  • an electronic device comprising:
  • the fan-out structure comprising:
  • a vertical projection of the first fan-out line on the second metal layer is alternately arranged with the second fan-out line, and the vertical projection partially overlaps an adjacent second fan-out line.
  • the first fan-out line and the second fan-out line each have a fan-out portion and an adjustment portion connected to each other, the fan-out portion is a straight line, and the adjustment portion is a bent-and-returned bend. a line, the angle of bending of the adjusting portion is 90°;
  • the insulating layer is formed on the first metal layer, and the second metal layer is formed on the insulating layer; or
  • the insulating layer is formed on the second metal layer, and the first metal layer is formed on the insulating layer.
  • the material of the first fan-out line is the same as the material of the second fan-out line.
  • the electronic device is a liquid crystal display panel.
  • the first fan-out line and the second fan-out line are respectively located on different metal layers, and the vertical projection of the first fan-out line on the second metal layer partially overlaps with the second fan-out line, so that the first A capacitance is formed between the fanout line and the second fanout line.
  • those skilled in the art can compensate for the difference in fan-out line resistance by adjusting the size of the overlap region, so that the time constant of each fan-out line is approximately equal or completely equal. That is to say, this setting enables the signal delay of each fan-out line to be the same, thereby improving the display effect of the display panel.
  • the vertical projection of the first fan-out line overlaps with the second fan-out line in this embodiment, so that the overall height of the fan-out structure can be effectively reduced, which is advantageous.
  • the narrow frame of the electronic device having the fan-out structure is advantageous.
  • Figure 1 is a schematic view showing the structure of a fan-out structure in the prior art
  • FIG. 2 is a cross-sectional view showing a fan-out structure of an embodiment of the present invention
  • FIG. 3 is a plan view showing a fan-out structure of an embodiment of the present invention, wherein a thick solid line indicates a projection of a first metal line on a second metal layer, and a thin solid line indicates a second metal line;
  • Figure 4 is a schematic view showing the outline of the fan-out structure shown in Figure 3 at a plan view angle;
  • Fig. 5 is a schematic view showing the dimensioning of the fan-out structure shown in Fig. 3.
  • the technical problem to be solved by the present invention is that only the influence of uneven distribution of resistance on the display effect is considered in designing the fan-out structure, and the influence of uneven distribution of capacitance on the display effect is not considered; in addition, in the prior art, There is no overlap between the fan-out lines of the fan-out structure, which leads to an increase in the overall height of the fan-out structure, which is disadvantageous for the narrow frame of the liquid crystal display panel.
  • an embodiment of the present invention provides a fan-out structure.
  • Fig. 2 is a schematic cross-sectional view showing a fan-out structure of an embodiment of the present invention.
  • 3 shows a top view of a fan-out structure in accordance with an embodiment of the present invention, wherein the thick solid line indicates the vertical projection 11 of the first fan-out line on the second metal layer 30, and the thin solid line indicates the second fan-out line 31.
  • the fan-out structure of the embodiment of the present invention mainly includes a plurality of first fan-out lines (only the vertical projection 11 corresponding to the first fan-out line is shown in the drawing) and a plurality of second fan-out lines. 31.
  • the first fanout line and the second fanout line 31 are layered.
  • all of the first fan-out lines are disposed on the first metal layer 10
  • all of the second fan-out lines 31 are disposed on the second metal layer 30.
  • An insulating layer 20 is disposed between the first metal layer 10 and the second metal layer 30.
  • the first metal layer 10 may be located below the second metal layer 30. That is, the insulating layer 20 is formed on the first metal layer 10, and the second metal layer 30 is formed on the insulating layer 20.
  • the first metal layer 10 may also be located above the second metal layer 30. That is, the insulating layer 20 is formed on the second metal layer 30, and the first metal layer 10 is formed on the insulating layer 20.
  • the thick solid line shown in FIG. 3 indicates the vertical projection 11 of the first fan-out line on the second metal layer 30.
  • the vertical projection 11 of the first fan-out line on the second metal layer 30 and the second fan-out line 31 are alternately arranged. That is to say, in addition to the first fan-out line located at the edge, the left and right sides of the vertical projection 11 of the other first fan-out lines are respectively provided with a second fan-out line 31.
  • the vertical projection 11 of the first fan-out line partially overlaps the adjacent second fan-out line 31 to form a capacitance between the first fan-out line and the second fan-out line 31.
  • the first fan-out line and the second fan-out line 31 are respectively located on different metal layers, and the vertical projection 11 and the second fan-out line of the first fan-out line on the second metal layer 30 are respectively 31 partially overlaps to form a capacitance between the first fanout line and the second fanout line 31.
  • those skilled in the art can compensate for the difference of the fan-out line resistance by adjusting the size of the overlapping area, so that the time constant of each fan-out line of the fan-out structure is approximately equal or completely equal. . That is to say, the setting can make the signal delay of each fan-out line the same, thereby improving the display effect of the liquid crystal display panel.
  • the vertical projection 11 of the first fan-out line of the present embodiment partially overlaps with the second fan-out line 31, thereby effectively reducing the overall height of the fan-out structure. It is advantageous to narrow the frame of the electronic device having the fan-out structure.
  • the first fan-out line and the second fan-out line 31 have the same structure.
  • the wire includes a fan-out portion b and an adjustment portion a that are connected to each other.
  • the fan-out portion b is a straight line
  • the adjustment portion a is a bent line that reciprocates.
  • the vertical projection 11 of the first fan-out line and the second fan-out line 31 overlap at the adjustment portion a. That is, the vertical projection of the adjustment portion a of the first fan-out line on the second metal layer 30 partially overlaps with the adjustment portion a of the second fan-out line 31.
  • the bending angle of the adjustment portion a is 90°.
  • the material of the first fan-out line 11 is the same as the material of the second fan-out line 31, and the material may be copper or aluminum.
  • the size of the overlapping area of each fan-out line and the adjacent fan-out line may be separately calculated based on the principle that the time constants of each fan-out line of the fan-out structure are equal.
  • the fan-out structure is optimized as follows: (1) The first fan-out line and the second fan-out line 31 of the fan-out structure are made of the same material, and the sheet resistance of the material is set to Rs; (2) fan The adjustment portion a of the outgoing line is disposed at an upper portion of the fan-out structure, and the fan-out portion b of the fan-out line is disposed at a lower portion of the fan-out structure; (3) all the adjustment portions a are parallel to each other; and (4) the bending angle of the adjustment portion a is 90 (5) The adjustment portion a of each fan-out line is equal in width and width, and the widths of all the adjustment portions a (set to w) are equal; (6) the height of each bent portion of the adjustment portion a (set to y ) the same; (7) overlap between the fan
  • h represents the height of the fan-out line
  • t represents half the width of the upper portion of the fan-out structure
  • b represents half the width of the lower portion of the fan-out structure.
  • w represents the length of the adjustment portion a of one of the outermost fan-out lines. The angle between the line connecting the lower end of the adjustment portion a of the outermost fan-out line and the center of the lower end surface of the fan-out structure and the lower end surface of the fan-out structure is shown.
  • ⁇ represents the angle between the fan-out portion of the outermost fan-out line and the lower end surface of the fan-out structure. Both angles are used to accurately calculate the resistance and capacitance of the fanout line.
  • the vertical projection 11 and the second fan-out line 31 of the first fan-out line which are sequentially arranged are sequentially numbered.
  • the vertical projection 11 of the first fan-out line located in the middle is numbered 1.
  • the numbers are sequentially incremented to the sides. Only the numbers of the second fan-out line 31 on the right side of the vertical projection 11 of the first fan-out line and the vertical projection 11 of the first fan-out line are shown in FIG.
  • p1 represents the upper pin pitch between the vertical projection 11 of the first fan-out line numbered 1 and the second fan-out line 31 of the previous number.
  • P2 denotes the lower pin pitch between the vertical projection 11 of the first fan-out line numbered 1 and the second fan-out line 31 of the previous number.
  • X1 represents the width of the vertical projection of the adjustment portion a of the first fan-out line numbered 1.
  • s represents the minimum spacing between the vertical projections 11 of all of the first fanouts or between all of the second fanoutlines 31.
  • the length of the vertical projection 11 of the first fan-out line numbered 1 is: Its resistance value is:
  • the area between the vertical projection 11 of the first fan-out line numbered 1 and the adjacent two second fan-out lines 31 is:
  • the absolute values of the absolute values of the first fan-out line and the second fan-out line 31 are ⁇ 0
  • the relative dielectric constant of the insulating layer 20 is ⁇ r
  • the thickness of the insulating layer 20 is t ins .
  • the total length of 31 of the second fanout line numbered 2 is:
  • G2 represents the width of the overlap between the second fan-out line 31 numbered 2 and the vertical projection 11 of the first fan-out line numbered 3, which together with g1 determines the capacitance value of the second fan-out line 31 numbered 2 .
  • the area and capacitance values of the overlapping area of the second fan-out line 31 numbered 2 and the vertical projection 11 of the first fan-out line numbered 1 and the vertical projection 11 of the first fan-out line numbered 3 are:
  • the resistance value of the first fan-out line numbered 3 is:
  • G3 represents the width of the overlap between the vertical projection 11 of the first fan-out line numbered 3 and the second fan-out line 31 numbered 4, which together with g2 determines the capacitance value of the first fan-out line numbered 3.
  • the area and capacitance values of the overlapping area of the vertical projection 11 of the first fan-out line numbered 3 and the second fan-out line 31 numbered 2 and the second fan-out line 31 numbered 4 are:
  • g(k-1) is the width of the overlap between the k-1th fanout line and the kth fanout line
  • the total length of the kth fanout line is:
  • the total resistance of the kth fanout line is:
  • g(k) represents the width of the overlap between the fan-out line numbered k and the fan-out line numbered k+1, which together with g(k-1) determines the capacitance value of the fan-out line numbered k.
  • the area of the overlap area between the kth fanout line and the adjacent fanout line and the capacitance values are:
  • the value of the unknown parameter g(k) can be calculated by a recursive algorithm. which is:
  • the overlap width corresponding to each fan-out line can be determined, thereby realizing the design of the impedance such as the fan-out line.
  • an embodiment of the present invention further provides an electronic device.
  • the electronic device described in this embodiment mainly includes a substrate and a fan-out structure described in the above embodiments.
  • the fan-out structure is disposed on the substrate.
  • the electronic device of this embodiment is preferably a liquid crystal display panel.
  • the liquid crystal display panel can be applied to electronic products such as mobile phones, digital cameras, and PDAs.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Structures Of Non-Positive Displacement Pumps (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)

Abstract

一种扇出结构及电子装置，其中扇出结构的第一扇出线和第二扇出线（31）分别位于不同的金属层（10，30），且第一扇出线在第二金属层（30）上的垂直投影（11）与第二扇出线（31）部分重叠，使第一扇出线和第二扇出线（31）之间形成电容，因此，在显著提高显示面板的显示效果的基础上有利于电子装置的窄边框化。

Description

扇出结构及电子装置
本申请要求享有2015年9月25日提交的名称为“扇出结构及电子装置”的中国专利申请CN201510623375.8的优先权，其全部内容通过引用并入本文中。
技术领域
本发明涉及显示技术领域，尤其涉及一种扇出结构，还涉及一种具有该扇出结构的电子装置。
背景技术
液晶显示面板是液晶显示装置的重要组件，在背光模组的配合以及驱动电路的驱动下，液晶显示面板能够显示图像。
通常情况下，在液晶显示面板的阵列基板上设置有TFT(薄膜晶体管)阵列区域。TFT阵列区域内布满了信号线以及TFT。驱动电路板通过具有多条扇出线(Fanout Line)的扇出结构将阵列基板的信号线与驱动电路板的焊脚连接。一般来讲，由于焊脚紧密排列且信号线分散排列(即，焊脚到信号线的距离各不相同)，因此扇出线的电阻分布不均。不同长度的扇出线的电阻存在差异，这会使信号波形发生变形，从而影响液晶显示装置的显示质量。
为了解决扇出线的电阻分布不均的问题，现有技术中基于扇出线的设置位置调节扇出线的长度，从而能够匹配扇出结构的各条扇出线的电阻。下面以图1中所示的扇出结构为例说明匹配电阻的方法。图1中所示的扇出结构的所有扇出线11’均位于同一金属层，并且任意相邻两条扇出线11’彼此不重叠。为了使各条扇出线11’的电阻相同，越靠近两端的扇出线11’的折弯越少，而越靠近中间的扇出线11’的折弯越多。
然而，在设计扇出结构时，现有技术仅考虑到电阻分布不均对显示效果的影响，未考虑电容分布不均对显示效果的影响。由于信号线的RC信号延迟是由电阻和电容的共同作用而引起的，因此仅考虑电阻的分布而未考虑电容的分布同样会影响显示面板的显示效果。此外，参照图1，扇出线11’间无重叠会导致扇出结构整体高度的增加，从而不利于液晶显示面板的窄边框化。
发明内容
本发明所要解决的技术问题是：目前在设计扇出结构时，仅考虑到电阻分布不均对显示效果的影响，而未考虑到电容分布不均对显示效果的影响；另外，现有技术中的扇出结构的扇出线间无重叠，导致扇出结构整体高度的增加，不利于液晶显示面板的窄边框化。
为了解决上述技术问题，本发明提供了一种扇出结构及电子装置。
根据本发明的一个方面，提供了一种扇出结构，其包括：
设置在第一金属层上的多条第一扇出线；以及
设置在第二金属层上的多条第二扇出线，所述第二金属层与所述第一金属层之间设置有绝缘层；
所述第一扇出线在所述第二金属层上的垂直投影与所述第二扇出线交替排列，并且所述垂直投影与相邻的第二扇出线部分重叠。
优选的是，所述第一扇出线和所述第二扇出线均具有彼此相连的扇出部与调整部，所述扇出部为直线走线，所述调整部为往复迂回的弯折走线；
所述第一扇出线的调整部在所述第二金属层上的垂直投影与所述第二扇出线的调整部部分重叠。
优选的是，所述调整部弯折的角度为90°。
优选的是，所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
优选的是，所述第一扇出线的材料与所述第二扇出线的材料相同。
根据本发明的另一个方面，提供了一种电子装置，其包括：
基板；以及
设置在所述基板上的扇出结构，所述扇出结构包括：
设置在第一金属层上的多条第一扇出线；以及
设置在第二金属层上的多条第二扇出线，所述第二金属层与所述第一金属层之间设置有绝缘层；
所述第一扇出线在所述第二金属层上的垂直投影与所述第二扇出线交替排列，并且所述垂直投影与相邻的第二扇出线部分重叠。
优选的是，所述第一扇出线和所述第二扇出线均具有彼此相连的扇出部与调整部，所述扇出部为直线走线，所述调整部为往复迂回的弯折走线,所述调整部弯折的角度为90°；
所述第一扇出线的调整部在所述第二金属层上的垂直投影与所述第二扇出线的调整 部部分重叠。
优选的是，所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
优选的是，所述第一扇出线的材料与所述第二扇出线的材料相同。
优选的是，所述电子装置为液晶显示面板。
与现有技术相比，上述方案中的一个或多个实施例可以具有如下优点或有益效果：
应用本发明的扇出结构，第一扇出线和第二扇出线分别位于不同的金属层上，并且第一扇出线在第二金属层上的垂直投影与第二扇出线部分重叠，使第一扇出线和第二扇出线之间形成电容。在本发明的基础上，本领域技术人员可通过调整重叠区域的大小，来利用形成的电容弥补扇出线电阻的差异，从而使每条扇出线的时间常数近似相等或者完全相等。也就是说，如此设置能使每条扇出线的信号延时都相同，从而提高了显示面板的显示效果。此外，相比于现有技术中扇出线之间彼此不重叠的方案，本实施例第一扇出线的垂直投影与第二扇出线部分重叠，因此可有效减少扇出结构的整体高度，有利于具有该扇出结构的电子装置的窄边框化。
本发明的其它特征和优点将在随后的说明书中阐述，并且部分地从说明书中变得显而易见，或者通过实施本发明而了解。本发明的目的和其他优点可通过在说明书、权利要求书以及附图中所特别指出的结构来实现和获得。
附图说明
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例共同用于解释本发明，并不构成对本发明的限制。在附图中：
图1示出了现有技术中扇出结构的结构示意图；
图2示出了本发明实施例扇出结构的剖面示意图；
图3示出了本发明实施例扇出结构的俯视图，其中粗实线表示第一金属线在第二金属层上的投影，细实线表示第二金属线；
图4示出了图3所示的扇出结构在俯视角度的轮廓示意图；以及
图5示出了图3所示的扇出结构的尺寸标注示意图。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式，借此对本发明如何应用技术 手段来解决技术问题，并达成技术效果的实现过程能充分理解并据以实施。需要说明的是，只要不构成冲突，本发明中的各个实施例以及各实施例中的各个特征可以相互结合，所形成的技术方案均在本发明的保护范围之内。
本发明所要解决的技术问题是：目前在设计扇出结构时仅考虑到电阻分布不均对显示效果的影响，而未考虑到电容分布不均对显示效果的影响；另外，现有技术中的扇出结构的扇出线间无重叠，导致扇出结构整体高度的增加，不利于液晶显示面板的窄边框化。为了解决上述技术问题，本发明实施例提供了一种扇出结构。
图2示出了本发明实施例扇出结构的剖面示意图。图3示出了本发明实施例扇出结构的俯视图，其中粗实线表示第一扇出线在第二金属层30上的垂直投影11，细实线表示第二扇出线31。参照图2和图3，本发明实施例的扇出结构主要包括多条第一扇出线(附图中仅示出了与第一扇出线相对应的垂直投影11)和多条第二扇出线31。
具体地，第一扇出线和第二扇出线31分层设置。在本实施例中，所有第一扇出线均设置在第一金属层10上，所有第二扇出线31均设置在第二金属层30上。第一金属层10和第二金属层30之间设置有绝缘层20。这里，第一金属层10可以位于第二金属层30的下方。即，绝缘层20形成在第一金属层10上，第二金属层30形成在绝缘层20上。第一金属层10还可以位于第二金属层30的上方。即，绝缘层20形成在第二金属层30上，第一金属层10形成在绝缘层20上。
图3中所示的粗实线表示第一扇出线在第二金属层30上的垂直投影11。第一扇出线在第二金属层30上的垂直投影11与第二扇出线31交替排列。也就是说，除了位于边缘的第一扇出线外，其余第一扇出线的垂直投影11的左右两侧分别设置有第二扇出线31。第一扇出线的垂直投影11与相邻的第二扇出线31部分重叠，从而在该第一扇出线和该第二扇出线31之间形成电容。
应用本实施例所述的扇出结构，第一扇出线和第二扇出线31分别位于不同的金属层上，并且第一扇出线在第二金属层30上的垂直投影11与第二扇出线31部分重叠，使第一扇出线和第二扇出线31之间形成电容。在本实施例的基础上，本领域技术人员可通过调整重叠区域的大小，来利用形成的电容弥补扇出线电阻的差异，从而使扇出结构的每条扇出线的时间常数近似相等或完全相等。也就是说，如此设置能使每条扇出线的信号延时都相同，从而提高了液晶显示面板的显示效果。此外，相比于现有技术中扇出线之间彼此不重叠的方案，本实施例第一扇出线的垂直投影11与第二扇出线31部分重叠，因此可有效减少扇出结构的整体高度，有利于具有该扇出结构的电子装置的窄边框化。
在本发明一优选的实施例中，第一扇出线和第二扇出线31的结构相同。以第一扇出 线为例，其包括彼此相连的扇出部b与调整部a。扇出部b为直线走线，调整部a为往复迂回的弯折走线。第一扇出线的垂直投影11和第二扇出线31在调整部a处发生重叠。也就是说，第一扇出线的调整部a在第二金属层30上的垂直投影与第二扇出线31的调整部a部分重叠。
特别地，为了方便计算扇出线的时间常数，可以做以下优选设置：调整部a的弯折角度为90°。第一扇出线11的材料与第二扇出线31的材料相同，材料可以为铜或者铝。
在具体实施过程中，可基于扇出结构的每条扇出线对应的时间常数均相等的原则，分别计算出各条扇出线与相邻扇出线的重叠区域的尺寸。
下面结合图4和图5详细阐述具体实施过程中计算扇出线与相邻扇出线的重叠区域的尺寸的过程。为了方便计算，对扇出结构做如下优化：(1)扇出结构的第一扇出线和第二扇出线31由相同的材料制成，该材料的方块电阻值设为Rs；(2)扇出线的调整部a设置在扇出结构的上部，扇出线的扇出部b设置在扇出结构的下部；(3)所有调整部a彼此平行；(4)调整部a的折弯角度为90°；(5)每条扇出线的调整部a上下同宽，并且所有调整部a的宽度(设为w)都相等；(6)调整部a的每个弯折部分的高度(设为y)相同；(7)扇出线之间仅在调整部a处发生重叠。
在图4中，h表示扇出线的高度，t表示扇出结构上部宽度的一半，b表示扇出结构下部宽度的一半。w表示最外侧的一条扇出线的调整部a的长度。
Figure PCTCN2015093011-appb-000001
表示最外侧的扇出线的调整部a的下端和扇出结构的下端面的中心的连线与扇出结构的下端面的夹角。θ表示最外侧的扇出线的扇出部与扇出结构的下端面的夹角。这两个角度都用于后续精确计算扇出线的电阻和电容。
如图5所示，对依次排列的第一扇出线的垂直投影11以及第二扇出线31顺次进行了编号。位于中间的第一扇出线的垂直投影11的编号为1。以此第一扇出线的垂直投影11为中心，编号依次往两侧递增。图5中仅示出了位于该第一扇出线的垂直投影11右侧的第二扇出线31和第一扇出线的垂直投影11的编号。
首先计算编号为1的第一扇出线的时间常数。
参照图5，p1表示编号为1的第一扇出线的垂直投影11与前一编号的第二扇出线31之间的上部引脚间距。p2表示编号为1的第一扇出线的垂直投影11与前一编号的第二扇出线31之间的下部引脚间距。x1表示编号为1的第一扇出线的调整部a的垂直投影的宽度。s表示所有第一扇出线的垂直投影11之间或者所有第二扇出线31之间的最小间距。g1表示编号为1的第一扇出线的垂直投影11与相邻的两条第二扇出线31之间相互重叠部分的宽度。从图5中可以看出g1＝p1-s，x1＝2g1+s＝2p1-s。
对于图4中标注的两个角θ和
Figure PCTCN2015093011-appb-000002
它们满足以下关系；
Figure PCTCN2015093011-appb-000003
Figure PCTCN2015093011-appb-000004
编号为1的第一扇出线的垂直投影11的长度为：
Figure PCTCN2015093011-appb-000005
其电阻值为：
Figure PCTCN2015093011-appb-000006
编号为1的第一扇出线的垂直投影11与相邻的两条第二扇出线31之间重叠的面积为：
Figure PCTCN2015093011-appb-000007
第一扇出线和第二扇出线31的绝对介电常数均为ε0，绝缘层20的相对介电常数为εr，绝缘层20的厚度为tins。于是，可以求出编号为1的第一扇出线的电容值：
Figure PCTCN2015093011-appb-000008
最后可以得到编号为1的第一扇出线的时间常数：
Figure PCTCN2015093011-appb-000009
接下来可以对编号为2的第二扇出线31进行类似的处理，可得编号为2的第二扇出线31的调整部a的宽度为x2＝2g1+s＝2p1-s。编号为2的第二扇出线的31总长度为：
Figure PCTCN2015093011-appb-000010
其电阻值为：
Figure PCTCN2015093011-appb-000011
g2表示编号为2的第二扇出线31与编号为3的第一扇出线的垂直投影11之间的重叠部分的宽度，它和g1共同决定了编号为2的第二扇出线31的电容值。编号为2的第二扇出线31与编号为1的第一扇出线的垂直投影11以及编号为3的第一扇出线的垂直投影11的重叠区域的面积和电容值分别为：
Figure PCTCN2015093011-appb-000012
Figure PCTCN2015093011-appb-000013
最后可以得到编号为2的第二扇出线31的时间常数：
Figure PCTCN2015093011-appb-000014
为了保证编号为1的第一扇出线的时间常数与编号为2的第二扇出线31的时间常数相等，则有：τ2＝τ1。即：
R2·C2＝R1·C1                                    (3)
联合式(1)、(2)和(3)进行求解，可以计算得出未知参数g2的值。即：
Figure PCTCN2015093011-appb-000015
同样，对于编号为3的第一扇出线，其调整部a的宽度为x3＝p1+g2。进一步可以计算出它的总长度从而，编号为3的第一扇出线的电阻值为：
Figure PCTCN2015093011-appb-000017
g3表示编号为3的第一扇出线的垂直投影11与编号为4的第二扇出线31之间的重叠部分的宽度，它和g2共同决定了编号为3的第一扇出线的电容值。编号为3的第一扇出线的垂直投影11与编号为2的第二扇出线31以及编号为4的第二扇出线31的重叠区域的面积和电容值分别为：
Figure PCTCN2015093011-appb-000018
Figure PCTCN2015093011-appb-000019
最后可以得到编号为3的第一扇出线的时间常数：
Figure PCTCN2015093011-appb-000020
为了保证编号为2和第二扇出线31的时间常数与编号为3的第一扇出线的时间常数相等，则有τ3＝τ2。即：
R3·C3＝R2·C2                                        (5)
联合式(1)至式(5)进行求解，可以计算得出未知参数g3的值。即：
Figure PCTCN2015093011-appb-000021
对于任意k≥3的走线，都可以有类似的结论，第k条扇出线的调整部a的宽度为x(k)＝p1+g(k-1)。其中，g(k-1)是第k-1条扇出线和第k条扇出线之间重叠部分的宽度，则第k条扇出线的总长度为：
Figure PCTCN2015093011-appb-000022
第k条扇出线的总电阻为：
Figure PCTCN2015093011-appb-000023
g(k)表示编号为k的扇出线与编号为k+1的扇出线之间的重叠部分的宽度，它和g(k-1)共同决定了编号为k的扇出线的电容值。第k条扇出线和相邻扇出线之间的重叠区域面积以及电容值分别为：
Figure PCTCN2015093011-appb-000024
Figure PCTCN2015093011-appb-000025
令第k条扇出线的时间常数τ(k)和第k-1条扇出线的时间常数τ(k-1)相等，即τ(k)＝τ(k-1)。通过递归算法可以计算得出未知参数g(k)的值。即：
Figure PCTCN2015093011-appb-000026
因此，按照上述算法，每一条扇出线对应的重叠宽度都可以被确定下来，从而实现扇出线等阻抗的设计。
相应地，本发明实施例还提供一种电子装置。本实施例所述的电子装置主要包括基板以及上述实施例所述的扇出结构。扇出结构设置在基板上。本实施例的电子装置优选为液晶显示面板。液晶显示面板可应用于移动电话、数码相机、PDA等电子产品中。
虽然本发明所公开的实施方式如上，但所述的内容只是为了便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属技术领域内的技术人员，在不脱离本发明所公开的精神和范围的前提下，可以在实施的形式上及细节上作任何的修改与变化，但本发明的保护范围，仍须以所附的权利要求书所界定的范围为准。

Claims (17)

  1. 一种扇出结构，包括：
    设置在第一金属层上的多条第一扇出线；以及
    设置在第二金属层上的多条第二扇出线，所述第二金属层与所述第一金属层之间设置有绝缘层；
    所述第一扇出线在所述第二金属层上的垂直投影与所述第二扇出线交替排列，并且所述垂直投影与相邻的第二扇出线部分重叠。
  2. 根据权利要求1所述的扇出结构，其中，
    所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
    所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
  3. 根据权利要求1所述的扇出结构，其中，所述第一扇出线的材料与所述第二扇出线的材料相同。
  4. 根据权利要求1所述的扇出结构，其中，所述第一扇出线和所述第二扇出线均具有彼此相连的扇出部与调整部，所述扇出部为直线走线，所述调整部为往复迂回的弯折走线；
    所述第一扇出线的调整部在所述第二金属层上的垂直投影与所述第二扇出线的调整部部分重叠。
  5. 根据权利要求4所述的扇出结构，其中，
    所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
    所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
  6. 根据权利要求4所述的扇出结构，其中，所述第一扇出线的材料与所述第二扇出线的材料相同。
  7. 根据权利要求4所述的扇出结构，其中，所述调整部弯折的角度为90°。
  8. 根据权利要求7所述的扇出结构，其中，
    所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
    所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
  9. 根据权利要求7所述的扇出结构，其中，所述第一扇出线的材料与所述第二扇出线的材料相同。
  10. 一种电子装置，其中，包括：
    基板；以及
    设置在所述基板上的扇出结构，所述扇出结构包括：
    设置在第一金属层上的多条第一扇出线；以及
    设置在第二金属层上的多条第二扇出线，所述第二金属层与所述第一金属层之间设置有绝缘层；
    所述第一扇出线在所述第二金属层上的垂直投影与所述第二扇出线交替排列，并且所述垂直投影与相邻的第二扇出线部分重叠。
  11. 根据权利要求10所述的电子装置，其中，
    所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
    所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
  12. 根据权利要求10所述的电子装置，其中，所述第一扇出线的材料与所述第二扇出线的材料相同。
  13. 根据权利要求10所述的电子装置，其中，所述电子装置为液晶显示面板。
  14. 根据权利要求10所述的电子装置，其中，所述第一扇出线和所述第二扇出线均具有彼此相连的扇出部与调整部，所述扇出部为直线走线，所述调整部为往复迂回的弯折走线，所述调整部弯折的角度为90°；
    所述第一扇出线的调整部在所述第二金属层上的垂直投影与所述第二扇出线的调整部部分重叠。
  15. 根据权利要求14所述的电子装置，其中，
    所述绝缘层形成在所述第一金属层上，所述第二金属层形成在所述绝缘层上；或者
    所述绝缘层形成在所述第二金属层上，所述第一金属层形成在所述绝缘层上。
  16. 根据权利要求14所述的电子装置，其中，所述第一扇出线的材料与所述第二扇出线的材料相同。
  17. 根据权利要求14所述的电子装置，其中，所述电子装置为液晶显示面板。
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