WO2017038448A1

WO2017038448A1 - Nitride semiconductor element

Info

Publication number: WO2017038448A1
Application number: PCT/JP2016/073883
Authority: WO
Inventors: 将一郎泉; 統之風田川; 大倉本; 達史濱口
Original assignee: ソニー株式会社
Priority date: 2015-09-02
Filing date: 2016-08-16
Publication date: 2017-03-09
Also published as: JPWO2017038448A1; JP6919565B2

Abstract

This nitride semiconductor element comprises: a first semiconductor layer; an active layer provided above the first semiconductor layer, and a second semiconductor layer provided above the active layer and having an emission window that emits light generated from the active layer. At least one recession or first dielectric multilayer film is formed on a side surface of the first semiconductor layer or second semiconductor layer.

Description

Nitride semiconductor device

The present technology relates to, for example, a nitride semiconductor device that emits light in the stacking direction.

The semiconductor element which comprises a surface emitting laser etc. is mounted in the submount etc. in order to discharge | emit the heat emitted from an own element. Solder is generally used at the time of mounting, but it is known that the solder rises due to the wettability of the element. When this rise is large, the solder is in contact with areas other than the desired area, causing a problem of current leakage.

On the other hand, for example, a light emitting device such as a surface emitting laser using a nitride semiconductor as a semiconductor material generally has a lower DBR layer (second reflective layer), a lower spacer layer (second compound semiconductor layer), and the like on a substrate. An active layer, an upper spacer layer (first compound semiconductor layer), an upper DBR layer (first reflective layer), and a contact layer (first electrode) are stacked in this order (see, for example, Patent Documents 1 and 2) . In such a light emitting element, since various characteristics are strongly affected by heat, attempts have been made to improve the heat removal property by covering most of the light emitting element with a solder having high thermal conductivity. For this reason, there has been a problem that a leak failure is likely to occur together with the rise of the solder due to the wettability of the element.

JP, 2015-35541, A JP, 2015-35542, A

On the other hand, for example, a method of suppressing the rising of the solder is considered by providing digging or the like in a member (mounted member) in contact with the nitride semiconductor element such as a submount. As described above, when the mounting member is processed, although a certain effect can be obtained with respect to the suppression of the solder rise, it is difficult to control the solder covering area of the element surface. Therefore, in this method, there is a problem that a sufficient effect can not be obtained with respect to the improvement of the above heat removal efficiency.

Therefore, it is desirable to provide a nitride semiconductor device capable of reducing the occurrence of a leak failure while enhancing the exhaust heat efficiency.

A nitride semiconductor device according to an embodiment of the present technology includes a first semiconductor layer, an active layer provided on the first semiconductor layer, and a second semiconductor layer provided on the active layer. At least one recess or dielectric multilayer film is formed on one of the side surfaces of the first semiconductor layer and the second semiconductor layer.

In the nitride semiconductor device according to the embodiment of the present technology, at least one recess or dielectric multilayer film is formed on one of the side surfaces of the first semiconductor layer and the second semiconductor layer in which the active layer is stacked. One is formed. By forming a large number of interfaces and recesses by the dielectric multilayer film on the side surfaces of the element, it becomes possible to control the covered area of the solder used at the time of mounting.

According to the nitride semiconductor device of the embodiment of the present technology, the recess or the dielectric multilayer film is formed on one of the side surfaces of the first semiconductor layer and the second semiconductor layer in which the active layer is stacked. By forming at least one, it becomes possible to control the covering area of the solder used at the time of mounting. Therefore, it is possible to suppress the rising of the solder and to reduce the occurrence of the leak failure while enhancing the heat removal efficiency by the coating of the solder. The effects of the present technology are not necessarily limited to the effects described herein, but may be any of the effects described in the present disclosure.

FIG. 1 is a cross-sectional view of a surface emitting semiconductor laser according to an embodiment of the present technology. It is a schematic diagram showing the planar shape of the dielectric multilayer of the semiconductor laser shown in FIG. It is a schematic diagram showing an example of the formation position of the dielectric multilayer shown in FIG. FIG. 7 is a cross-sectional view for illustrating the method of manufacturing the semiconductor laser shown in FIG. 1. It is sectional drawing for demonstrating the process of following FIG. 4A. It is sectional drawing for demonstrating the process of following FIG. 4B. It is sectional drawing for demonstrating the process of following FIG. 5A. It is a sectional view of LED concerning a 2nd embodiment of this art. FIG. 18 is an example of a cross-sectional view of a semiconductor laser soldered to a heat sink as an application example 1; FIG. 18 is an example of a cross-sectional view of a semiconductor laser soldered to a heat sink as an application example 1; It is an example of sectional drawing of LED soldered to the heat sink as application example 2. FIG. It is an example of sectional drawing of LED soldered to the heat sink as application example 2. FIG.

Hereinafter, an embodiment of the present technology will be described in detail with reference to the drawings. The description will be made in the following order.
1. First embodiment (semiconductor laser having a dielectric multilayer film and a recess on the side surface of the semiconductor layer on the substrate side)
1-1. Overall configuration 1-2. Manufacturing method 1-3. Action / Effect Second Embodiment (LED having dielectric multilayer film and recess on the side surface of the semiconductor layer on the substrate side)
3. Application example

<1. First embodiment>
FIG. 1 illustrates an example of a cross-sectional configuration of a surface-emitting semiconductor device (semiconductor laser 1) according to a first embodiment of the present technology. The semiconductor laser 1 has a substrate 11 and a plurality of dielectric multilayer films 41 in contact with the surface S1 of the substrate 11. A plurality of dielectric multilayer films 41 are provided on the substrate 11 at intervals. The semiconductor laser 1 further has a configuration in which a semiconductor layer 20, an insulating film 24, a transparent electrode 32, and a second reflective layer 42 are stacked in this order. When the dielectric multilayer film 41 facing the second reflective layer 42 among the plurality of dielectric multilayer films 41 is the first reflective layer 41A, the pair of first reflective layer 41A and the second reflective layer 42 is a resonator. Act as. The semiconductor layer 20 has a configuration in which the first semiconductor layer 21, the active layer 22, and the second semiconductor layer 23 are stacked in this order from the substrate 11 side. Each dielectric multilayer film 41 is embedded by the first semiconductor layer 21, and the side surface of the one or more dielectric multilayer films 41 is exposed on the side surface of the first semiconductor layer 21. That is, at least one dielectric multilayer film 41 is formed on the side surface of the first semiconductor layer 21. Furthermore, at least one recess 21A is formed on the side surface of the first semiconductor layer 21. The semiconductor laser 1 has a first electrode 31 in contact with the surface S2 (surface facing the surface S1) of the substrate 11. Note that the semiconductor laser 1 of FIG. 1 is schematically represented and is different from the actual dimensions.

(1-1. Overall configuration)
The substrate 11 is an element forming substrate used for manufacturing the semiconductor layer 20. The substrate 11 is provided in contact with the semiconductor layer 20 (first semiconductor layer 21). The substrate 11 may use various substrates such as GaN substrate, sapphire substrate, GaAs substrate, SiC substrate, alumina substrate, ZnS substrate, ZnO substrate, LiMgO substrate, LiGaO ₂ substrate, MgAl ₂ O ₄ substrate, InP substrate, for example. it can. In addition, an insulating substrate made of AlN or the like, a semiconductor substrate made of Si, SiC, Ge or the like, a metal substrate or an alloy substrate may be used. The thickness in the stacking direction of the substrate 11 (hereinafter simply referred to as thickness), for example, preferably 0.05 mm to 0.5 mm.

The semiconductor layer 20 has a configuration in which the first semiconductor layer 21, the active layer 22 and the second semiconductor layer 23 are sequentially stacked from the substrate 11 side. The first semiconductor layer 21 and the second semiconductor layer 23 have different conductivity types. For example, the first semiconductor layer 21 is formed of an n-type compound semiconductor, and the second semiconductor layer 23 is formed of a p-type compound semiconductor It is formed. The first semiconductor layer 21, the active layer 22 and the second semiconductor layer 23 are each formed of a nitride compound semiconductor. Specific nitride-based compound semiconductors include GaN-based compound semiconductors such as GaN, AlGaN, InGaN, and AlInGaN. Besides these, AlN, AlInN and InN can be mentioned. Furthermore, these compound semiconductors may contain boron (B) atoms, thallium (Tl) atoms, arsenic (As) atoms, phosphorus (P) atoms, and antimony (Sb) atoms, as desired. . The active layer 22 preferably has a quantum well structure. Specifically, it may have a single quantum well structure (QW structure) or may have a multiple quantum well structure (MQW structure). The active layer 22 having a quantum well structure has a structure in which the well layer and the barrier layer are stacked in at least one layer, but as a combination of (a compound semiconductor forming the well layer and a compound semiconductor forming the barrier layer), _{_{(In y Ga (1-y}} ) N, GaN), (In y Ga (1-y) N, In z Ga (1-z) N) [ where, y> z], (In y Ga (1- _y) N, AlGaN), (AlGaN / GaN), (AlzGa1 _- zN / AlyGa1 _-yN ) [where y> z] can be mentioned.

Each of the first semiconductor layer 21 and the second semiconductor layer 23 may be a layer having a single structure or a layer having a multilayer structure. Also, it may be a layer of a superlattice structure. Furthermore, it may be a layer provided with a composition gradient layer and a concentration gradient layer.

The first electrode 31 is provided on the surface opposite to the one surface of the substrate 11 on which the semiconductor layer 20 is formed. The first electrode 31 is made of, for example, gold (Au), silver (Ag), palladium (Pd), platinum (Pt), nickel (Ni), Ti (titanium), vanadium (V), tungsten (W), chromium Cr), Al (aluminum), Cu (copper), Zn (zinc), tin (Sn), and a single layer film or laminated film including at least one metal (including an alloy) of indium (In) Is preferred. Specifically, for example, Ti / Au, Ti / Al, Ti / Al / Au, Ti / Pt / Au, Ni / Au, Ni / Au / Pt, Ni / Pt, Pd / Pt, Ag / Pd, etc. A laminated film is mentioned. The layer closer to the “/” in the multilayer film structure is located closer to the active layer 22.

The transparent electrode 32 is provided on the semiconductor layer 20. The transparent electrode 32 is provided in contact with the emission window 24 W of the second semiconductor layer 23 for emitting the light emitted from the active layer 22. The transparent electrode 32 is formed of a so-called transparent conductive material having light transparency. Specific transparent conductive materials include, for example, indium-tin oxide (ITO, Indium Tin Oxide, Sn-doped In ₂ O ₃ , crystalline ITO and amorphous ITO), indium-zinc oxide (IZO, Indium) Zinc Oxide), IFO (F-doped In ₂ O ₃ ), tin oxide (SnO ₂ ), ATO (Sb-doped SnO ₂ ), FTO (F-doped SnO ₂ ), zinc oxide (ZnO, Al-doped ZnO or B-doped ZnO is included. Besides, a transparent conductive film having a gallium oxide, titanium oxide, niobium oxide, nickel oxide or the like as a base layer may be used. However, the material constituting the transparent electrode 32 depends on the arrangement of the second reflective layer 42 and the transparent electrode 32 described later, but is not limited to the transparent conductive material, and palladium (Pd), platinum (Pt) And metals such as nickel (Ni), gold (Au), cobalt (Co) and rhodium (Rh). The transparent electrode 32 may be made of at least one of these materials.

On the transparent electrode 32, a second electrode 33 for electrically connecting to an external electrode or circuit is provided. The second electrode 33 is, for example, a single layer film including at least one metal of Ti (titanium), aluminum (Al), Pt (platinum), Au (gold), Ni (nickel), and Pd (palladium). Or it is preferable that it is laminated film. Specifically, for example, laminated films of Ti / Pt / Au, Ti / Au, Ti / Pd / Au, Ti / Pd / Au, Ti / Ni / Au, Ti / Ni / Au / Cr / Au, etc. are listed. Be Although not provided here, a pad electrode may be appropriately provided also on the first electrode 31. When the first electrode 31 is formed of an Ag layer or an Ag / Pd layer, a cover metal layer (not shown) made of, for example, Ni / TiW / Pd / TiW / Ni is formed on the surface of the first electrode 31 Preferably, a pad electrode made of a multilayer film of, for example, Ti / Ni / Au, Ti / Ni / Au / Cr / Au, etc. is formed on the cover metal layer.

Preferably, a current confinement structure is formed between the semiconductor layer 20 (specifically, the second semiconductor layer 23) and the transparent electrode 32. The current confinement structure is formed of, for example, the insulating film 24 provided on the second semiconductor layer 23. The insulating film 24 has an opening 24A, and this opening becomes a current injection region in the semiconductor layer 20 (second semiconductor layer 23). At this time, the current injection region in the semiconductor layer 20 (second semiconductor layer 23) corresponds to the emission window 24H. The insulating film 24 is formed of, for example, SiO _x , SiN _x or AlO _x .

The current confinement structure does not necessarily have to be formed of the insulating film 24. For example, the mesa structure may be formed by etching the second semiconductor layer 23 by a reactive ion etching (RIE) method or the like, or a partial layer of the stacked second semiconductor layer 23 May be partially oxidized laterally to form a current confinement region. Furthermore, an impurity may be ion-implanted into the second semiconductor layer 23 to form a region with reduced conductivity, or these may be combined as appropriate. However, the transparent electrode 32 needs to be electrically connected to part of the second semiconductor layer 23 through which current flows due to current narrowing.

A plurality of dielectric multilayer films 41 are provided, for example, in the plane of the substrate 11, and are embedded in the first semiconductor layer 21. A part of the plurality of dielectric multilayer films 41 provided on the substrate 11 has an end face in the same plane as the end face of the semiconductor layer 20 and is exposed to the side face of the semiconductor laser 1. The dielectric multilayer film 41 is made of, for example, oxides such as Si, Mg, Al, Hf, Nb, Zr, Sc, Ta, Ga, Zn, Y, B, Ti, nitrides (for example, SiN _x , AlN _x , It is formed of AlGaN, GaN _x , BN _x or the like) or fluoride or the like. Specifically, SiO _x , TiO _x , NbO _x , ZrO _x , TaO _x , ZnO _x , AlO _x , HfO _x , SiN _x , AlN _{x and the} like can be mentioned.

The first reflective layer 41A functions as a Distributed Bragg Reflector (DBR) layer. It is preferable that the first reflective layer 41A has a configuration in which two or more types of dielectric films made of dielectric materials having different refractive indexes among the above-mentioned dielectric materials are alternately stacked. Thereby, the light reflection effect is obtained. Examples of combinations of two types of dielectric films include SiO _x / SiN _x , SiO _x / NbO _x , SiO _x / ZrO _x , SiO _x / AlN _{x and the} like. In order to obtain a desired light reflectance, the material, the film thickness, the number of laminations, etc. constituting each dielectric film may be appropriately selected. The thickness of each dielectric film can be appropriately adjusted according to the material to be used, etc., and is determined by the light emission wavelength λ 0 and the refractive index n at the light emission wavelength λ 0 of the material used. Specifically, it is preferable to use an odd multiple of λ0 / (4n). For example, in a light emitting element having a light emission wavelength λ 0 of 410 nm, when the dielectric multilayer film 41 is made of SiO _x / NbO _y , the thickness of each dielectric film is preferably about 40 nm to 70 nm. The number of stacked layers is preferably 5 or more, more preferably 15 or more. The thickness of the entire dielectric multilayer film 41 is preferably, for example, 0.6 μm to 3.0 μm. The dielectric multilayer film 41 is preferably arranged or arranged to grow laterally, for example, in the [1120] direction.

The planar shape of the dielectric multilayer film 41 is, for example, as shown in FIG. 2, lattice (rectangular) shape (A), polygonal shape including regular hexagon (B), circular shape including ellipse (C), stripe shape D) Or it is formed in island shape. The cross-sectional shape of the dielectric multilayer film 41 may be rectangular as shown in FIG. 1 or may be trapezoidal. Further, as shown in FIG. 3, a part of the dielectric multilayer film 41 may be missing from the substrate 11. The omission of the dielectric multilayer film 41 is caused by cracking or chipping of the dielectric multilayer film 41 at the time of cutting out by cleavage. Also, for example, it is generated by the difference between the linear thermal expansion coefficient of the substrate 11 and the linear thermal expansion coefficient of the dielectric multilayer film 41. When the missing of the dielectric multilayer film 41 occurs at the end face of the substrate 11, a recess 21A is formed on the side face of the semiconductor layer 20. The omission of the dielectric multilayer film 41 may be intentionally formed.

The second reflective layer 42 is provided at a position facing the first reflective layer 41A with the semiconductor layer 20 therebetween, and more specifically, provided on the transparent electrode 32. Similar to the dielectric multilayer film 41, the second reflective layer 42 is an oxide such as Si, Mg, Al, Hf, Nb, Zr, Sc, Ta, Ga, Zn, Y, B, Ti, nitride (for example, , SiN _x , AlN _x , AlGaN, GaN _x , BN _x, etc.) or fluoride or the like. The second reflective layer 42, the of the dielectric material, to obtain a high refractive index material such as SiN _x or TaO _x, that is high optical reflectance alternately laminating a low refractive index material such as SiO _x Can. In order to obtain a desired light reflectance, the film thickness, the number of laminations, etc. may be appropriately selected in addition to the material constituting each dielectric film. The thickness of each dielectric film can be appropriately adjusted according to the material to be used, etc., and is determined by the light emission wavelength λ 0 and the refractive index n at the light emission wavelength λ 0 of the material used. Specifically, it is preferable to use an odd multiple of λ0 / (4n). For example, in a light emitting element having a light emission wavelength λ 0 of 410 nm, when the dielectric multilayer film 41 is made of SiO _x / NbO _y , the thickness of each dielectric film is preferably about 40 nm to 70 nm. The number of layers is 2 or more, preferably 2 to 15. The thickness of the entire dielectric multilayer film 41 is preferably, for example, 0.6 μm to 3.0 μm.

(1-2. Manufacturing method)
The semiconductor laser 1 of the present embodiment can be manufactured, for example, as follows.

4A to 5B show a method of manufacturing the semiconductor laser 1 in the order of steps. First, as shown in FIG. 4A, a dielectric multilayer film 41X is formed. Specifically, it is formed by alternately laminating, for example, five layers of SiO _x films and SiN _x films on the substrate 11 by using any film forming method such as sputtering, CVD and evaporation. Subsequently, as shown in FIG. 4B, the dielectric multilayer film 41X is selectively etched to form a plurality of dielectric multilayer films 41 whose side surfaces are surrounded by the grooves 41H. In the etching step, wet etching with hydrofluoric acid or the like, dry etching using an RIE apparatus, or the like can be used.

Next, as shown in FIG. 5A, the semiconductor layer 20 and the insulating film 24 are formed on the substrate 11 and the dielectric multilayer film 41. Specifically, the dielectric multilayer film 41 is used as a mask for selective growth, and the substrate 11 is placed in a metal organic chemical vapor deposition (MOCVD) apparatus and heated to a desired temperature. For example, the semiconductor layer 20 including the first semiconductor layer 21 made of n-type GaN and the active layer (light emitting layer) 22 such as the second semiconductor layer 23 made of p-type GaN is grown. For growth, trimethylgallium (TMGa) as Ga source material, trimethylaluminum (TMAl) as Al source material, trimethylindium (TMIn) as In source material, silane (SiH ₄ ) as source material of n-type impurity Si, Mg as p-type impurity Cyclopentadienyl magnesium (Cp ₂ Mg) is used as a raw material for ammonia, and ammonia gas (NH ₃ ) or the like is used as a nitrogen raw material. Here, for example, the first semiconductor layer 21 is grown to 5 μm, the active layer 22 is grown to 80 nm, and the second semiconductor layer 23 is grown to 100 nm. Subsequently, for example, a SiO ₂ film is formed to a thickness of, for example, 200 nm using any film forming method such as sputtering, CVD and evaporation, and then selectively etched to form a current injection region. An insulating film 24 having an opening 24A in which the semiconductor layer 23 is exposed is formed. In the etching step, wet etching with hydrofluoric acid or the like, dry etching using an RIE apparatus, or the like can be used. Here, the area of the current injection region is equal to or less than half of the area of the opposing dielectric multilayer film 41 (first reflective layer 41A), and is, for example, about 25πm ² .

Then, as shown to FIG. 5B, the transparent electrode 32, the 2nd electrode 33, and the 2nd reflection layer 42 are formed. Specifically, for example, an ITO film is formed using any film forming method such as sputtering, CVD and evaporation, and then selectively etched to form a transparent electrode 32 having a desired shape. . In the etching step, wet etching using hydrochloric acid or the like, dry etching using a reactive ion etching apparatus, or the like can be used. Next, for example, Au, Pt and Ti are formed in this order using any film forming method such as sputtering, CVD and evaporation, and then selectively etched to form Ti / Pt only in the desired part. The second electrode 33 is formed leaving the / Au film. In the etching step, wet etching with an acid or the like, dry etching using a reactive ion etching apparatus or the like, lift-off by a PR method, or the like can be used. Subsequently, a dielectric multilayer film in which, for example, five layers of SiO _x films and SiN _x films are alternately laminated is formed using any film forming method such as sputtering, CVD and evaporation, for example, selective To form a second reflective layer 42 having a desired shape. In the etching step, wet etching with hydrofluoric acid or the like, dry etching using an RIE apparatus, or the like can be used.

Next, the substrate 11 is ground and polished from the back surface side, and then the first electrode 31 is deposited. Finally, the element is cut out from the substrate 11 by cleavage or the like. At this time, it cuts out so that the dielectric multilayer film 41 may be traversed. Thereby, the semiconductor laser 1 shown in FIG. 1 is completed.

As described above, in the semiconductor laser 1, the plurality of dielectric multilayer films 41, the first semiconductor layer 21, the active layer 22, the second semiconductor layer 23, the transparent electrode 32 and the second reflective layer 42 are formed on one surface of the substrate 11. The first electrode 31 is formed on the other surface of the substrate 11 stacked in this order and facing one surface of the substrate 11. In one of the first reflection layer 41A and the second reflection layer 42 (here, on the second reflection layer 42 side), a current injection region for enhancing the current injection efficiency to the active layer 22 and reducing the threshold current. A current narrowing structure (an opening 24A of the insulating film 24) is provided to narrow the width. In the semiconductor laser 1, the current injected from the first electrode 31 and the transparent electrode 32 is narrowed by the current narrowing structure and then injected into the active layer 22. This causes light emission due to recombination of electrons and holes. This light is reflected by the first reflection layer 41A and the second reflection layer 42, and laser oscillation occurs at a predetermined wavelength, and is emitted as laser light to the outside through the first reflection layer 41A or the second reflection layer 42. .

(1-3. Action / Effect)
As described above, since semiconductor lasers using nitride semiconductors are strongly affected by heat, the semiconductor lasers are generally mounted on a submount or the like using solder to discharge the heat. . In addition, since the solder has a high thermal conductivity, the heat dissipation efficiency tends to be improved by covering the surface of the semiconductor laser with the solder as much as possible. However, in a general semiconductor laser, the wettability of the side surface causes a rise of the solder, and the rise of the solder causes a leak failure.

As a method of solving this problem, a method is known in which a dip or the like is provided in a submount or the like on which a semiconductor laser is mounted to suppress the solder rising. However, although this method can reduce the solder rise, it is difficult to control the solder coated area on the surface of the semiconductor laser, and it is necessary to achieve both suppression of the solder rise and high heat removal efficiency. It was difficult.

On the other hand, in the semiconductor laser 1 of the present embodiment, the exposed surface or the recess 21A of the dielectric multilayer film 41 is provided on the side surface of the first semiconductor layer 21 on the substrate 11. The exposed surface of the dielectric multilayer film 41 provided on the side surface of the first semiconductor layer 21 has a smaller density of dangling bonds than that of the first semiconductor layer 21, and these are stacked in multiple layers to form the side surface of the semiconductor laser 1. And multiple interfaces are formed. Thereby, it becomes possible to control the covering area of the side surface of the semiconductor laser 1 by the solder used at the time of mounting. Further, the recess 21A is formed by a crack or a chip at the time of cutting out by cleavage, or a drop of the dielectric multilayer film 41 due to a difference in linear expansion coefficient between the substrate 11 and the dielectric multilayer film 41. Also by this recess 21A, the covering area of the side surface of the semiconductor laser 1 by the solder used at the time of mounting is controlled, specifically, the rising of the solder is reduced.

Therefore, in the semiconductor laser 1 according to the present embodiment, it is possible to suppress the rise of the solder and to reduce the occurrence of the leak failure while enhancing the heat removal efficiency by the coating of the solder.

Another embodiment will be described below. The same reference numerals are given to the same components as those in the first embodiment, and the description will be omitted.

<2. Second embodiment>
FIG. 6 illustrates an example of a cross-sectional configuration of a surface-emitting semiconductor element (LED 2) according to a second embodiment of the present disclosure. The LED 2 has a substrate 11 and a plurality of dielectric multilayer films 61 in contact with the surface S 1 of the substrate 11. A plurality of dielectric multilayer films 61 are provided on the substrate 11 at intervals. The LED 2 further has a configuration in which the semiconductor layer 20, the transparent electrode 52, and the n-type electrode 53 are stacked in this order. Each dielectric multilayer film 61 is embedded by the first semiconductor layer 21 of the semiconductor layer 20, and the side surface of the one or more dielectric multilayer films 61 is exposed on the side surface of the first semiconductor layer 21. That is, at least one dielectric multilayer film 61 is formed on the side surface of the first semiconductor layer 21. Furthermore, at least one recess 21A is formed on the side surface of the first semiconductor layer 21. The LED 2 has a p-type electrode 51 in contact with the surface S 2 (surface facing the surface S 1) of the substrate 11. The semiconductor laser 1 shown in FIG. 6 is schematically shown, and is different from the actual size.

The p-type electrode 51 is provided on the surface opposite to the one surface of the substrate 11 on which the semiconductor layer 20 is formed. The p-type electrode 51 is made of, for example, gold (Au), silver (Ag), palladium (Pd), platinum (Pt), nickel (Ni), Ti (titanium), vanadium (V), tungsten (W), chromium Cr), Al (aluminum), Cu (copper), Zn (zinc), tin (Sn), and a single layer film or laminated film including at least one metal (including an alloy) of indium (In) Is preferred. As the laminated film, for example, Ti / Au, Ti / Al, Ti / Al / Au, Ti / Pt / Au, Ni / Au, Ni / Au / Pt, Ni / Pt, Pd / Pt, Ag / Pd, etc. It can be mentioned.

The transparent electrode 52 is provided, for example, on the upper surface of the semiconductor layer 20 (the surface of the second semiconductor layer 23), and is formed of a so-called transparent conductive material having light transparency. Specific transparent conductive materials include, for example, indium-tin oxide (ITO, Indium Tin Oxide, Sn-doped In ₂ O ₃ , crystalline ITO and amorphous ITO), indium-zinc oxide (IZO, Indium Zinc Oxide, IFO (F-doped In ₂ O ₃ ), tin oxide (SnO ₂ ), ATO (Sb-doped SnO ₂ ), FTO (F-doped SnO ₂ ), zinc oxide (ZnO, Al-doped ZnO And B-doped ZnO). Besides, a transparent conductive film having a gallium oxide, titanium oxide, niobium oxide, nickel oxide or the like as a base layer may be used.

The n-type electrode 53 is provided on a part of the transparent electrode 52. The n-type electrode 53 is, for example, a single layer film including at least one metal of Ti (titanium), aluminum (Al), Pt (platinum), Au (gold), Ni (nickel), and Pd (palladium). Or it is preferable that it is a laminated film. Examples of the laminated film include Ti / Pt / Au, Ti / Au, Ti / Pd / Au, Ti / Pd / Au, Ti / Ni / Au, Ti / Ni / Au / Cr / Au, and the like.

A plurality of dielectric multilayer films 61 are provided, for example, in the plane of the substrate 11 as in the case of the dielectric multilayer film 41 in the above-described embodiment, and are embedded in the first semiconductor layer 21. The dielectric multilayer film 61 has a function of reflecting the light emitted from the active layer 22 to the transparent electrode 52 side. A part of the plurality of dielectric multilayer films 61 provided on the substrate 11 has the same end face as the semiconductor layer 20 and is exposed to the side face of the LED 2. The dielectric multilayer film 61 is, for example, an oxide or nitride such as Si, Mg, Al, Hf, Nb, Zr, Sc, Ta, Ga, Zn, Y, B, Ti, etc. (eg, SiN _x , AlN _x , It is formed of AlGaN, GaN _x , BN _x or the like) or fluoride or the like. Specifically, SiO _x , TiO _x , NbO _x , ZrO _x , TaO _x , ZnO _x , AlO _x , HfO _x , SiN _x , AlN _{x and the} like can be mentioned.

The dielectric multilayer film 61 does not necessarily have to alternately laminate two or more types of dielectric films made of dielectric materials having different refractive indexes among the above-mentioned dielectric materials, but, for example, SiN _x or TaO _x The light extraction efficiency is improved by alternately laminating a high refractive index material and a low refractive index material such as SiO _x . Specific combinations of dielectric materials include SiO _x / NbO _x , SiO _x / ZrO _x , SiO _x / AlN _{x and the} like in addition to SiO _x / SiN _x . The thickness of each dielectric film is preferably about 40 nm to 70 nm. The number of stacked layers is preferably 5 or more, more preferably 15 or more. The thickness of the entire dielectric multilayer film 61 is preferably, for example, 0.6 μm to 3.0 μm. The dielectric multilayer film 61 is preferably arranged or arranged to grow laterally, for example, in the [1120] direction.

The planar shape of the dielectric multilayer film 61 is formed, for example, in a lattice (rectangular) shape, a polygonal shape including a regular hexagon, a circular shape including an ellipse, a stripe shape, or an island shape as in the above embodiment. The cross-sectional shape of the dielectric multilayer film 61 may be rectangular as shown in FIG. 6 or may be trapezoidal.

The LED 2 can be manufactured, for example, as follows, using a method similar to that of the above embodiment. First, as in the above embodiment, the dielectric multilayer film 61 and the semiconductor layer 20 are formed on the substrate 11, and then the transparent electrode 52 and the n-type electrode 53 are formed. Specifically, for example, ITO is formed into a film by any film forming method such as sputtering, CVD and vapor deposition, and then selectively etched to form a transparent electrode 52 having a desired shape. In the etching step, wet etching using hydrochloric acid or the like, dry etching using a reactive ion etching apparatus, or the like can be used. Next, for example, Au, Pt and Ti are formed in this order using any film forming method such as sputtering, CVD and evaporation, and then Ti / Pt / only in desired portions by the PR step and the etching step. An n-type electrode 53 is formed leaving the Au film. In the etching step, wet etching with an acid or the like, dry etching using a reactive ion etching apparatus or the like, lift-off by a PR method, or the like can be used.

Subsequently, the substrate 11 is ground and polished from the back surface side, and then the p-type electrode 51 is deposited. Finally, the element is cut out from the substrate 11 by cleavage or the like. At this time, the LED 2 shown in FIG. 6 is completed by cutting out so as to cross the dielectric multilayer film 61.

<3. Application example>
Application Example 1
FIGS. 7A and 7B show the semiconductor laser 1 according to the first embodiment mounted on a heat sink. Here, the structure of the semiconductor laser 1 is shown in a simplified manner. The semiconductor laser 1 shown in FIG. 7A is junction-up mounted on the heat sink 101 via the solder 102, and the bonding wire 104 is connected to the second electrode 33 via the solder 103. The semiconductor laser 1 shown in FIG. 7B is junction-down mounted on the heat sink 101 via the solder 102, and the bonding wire 104 is connected to the first electrode 31 via the solder 103. Further, in the case of junction-down mounting, since the laser beam is emitted from the substrate 11 side, the first electrode 31 is provided with the opening 31A, and the opening 31A serves as an emission window. As described above, in the semiconductor laser 1 according to the first embodiment, the ascend of the solder 102 in the junction-up mounting is different from that of the solder 103 in the junction-down mounting. It is possible to prevent by the exposed one or more dielectric multilayer films 41 and the one or more recesses 21A.

Application Example 2
FIGS. 8A and 8B show the LED 2 of the second embodiment mounted on a heat sink. In addition, the structure of LED2 is simplified and shown here. The LED 2 shown in FIG. 8A is junction-up mounted on the heat sink 101 via the solder 102, and the bonding wire 104 is connected to the second electrode 33 via the solder 103. The LED 2 shown in FIG. 8B is junction-down mounted on the heat sink 101 via the solder 102, and the bonding wire 104 is connected to the p-type electrode 51 via the solder 103. Further, in the case of junction-down mounting, the laser light is emitted from the side of the substrate 11, so the p-type electrode 51 is provided with the opening 51A, and the opening 31A serves as the emission window. Thus, in the LED 2 of the second embodiment, as described above, in the semiconductor laser 1 of the first embodiment, the rise of the solder 102 in the junction-up mounting is the junction-down mounting. It is possible to prevent the lowering of the solder 103 by the one or more dielectric multilayer films 61 and the one or more recesses 21A exposed on each side surface of the semiconductor layer 20.

Although the present technology has been described above with the first and second embodiments and application examples, the present technology is not limited to the above-described embodiments and the like, and various modifications may be made. For example, in the first and second embodiments, in the semiconductor laser 1 (or the LED 2), both of the dielectric multilayer film 41 (or the dielectric multilayer film 61) and the recess 21A are formed on the side surface of the semiconductor layer 20, respectively. For example, only the recess 21A or only the dielectric multilayer film 41 (or the dielectric multilayer film 61) may be provided.

In addition, the effect described in this specification is an illustration to the last, is not limited to this, and may have other effects.

The present technology can also be configured as follows.
(1)
A first semiconductor layer,
An active layer provided on the first semiconductor layer;
And a second semiconductor layer provided on the active layer and having an emission window for emitting light emitted from the active layer.
A nitride semiconductor device, wherein at least one recess or a first dielectric multilayer film is formed on a side surface of the first semiconductor layer or the second semiconductor layer.
(2)
The semiconductor device further includes an element formation substrate of the first semiconductor layer provided in contact with the first semiconductor layer,
The nitride semiconductor device according to (1), wherein at least one of the recess or the first dielectric multilayer film is formed on a side surface of the first semiconductor layer.
(3)
The nitride semiconductor device according to (2), wherein one or more of the first dielectric multilayer films are embedded in the first semiconductor layer.
(4)
A second dielectric provided at a position facing the one first dielectric multilayer film embedded in the first semiconductor layer with the first semiconductor layer, the active layer, and the second semiconductor layer in between. The nitride semiconductor device according to (3), further comprising a body multilayer film.
(5)
The nitride semiconductor device according to any one of (1) to (4), wherein a plurality of the first dielectric multilayer films are exposed on each side surface of the first semiconductor layer.
(6)
The nitride semiconductor device according to any one of (1) to (5), wherein a plurality of the recesses are formed on each side surface of the first semiconductor layer.
(7)
The nitride semiconductor device according to any one of (1) to (6), wherein the first semiconductor layer, the active layer, and the second semiconductor layer are made of a GaN-based compound semiconductor.
(8)
The element formation substrate according to any one of (2) to (7), wherein the element formation substrate is any of a gallium nitride (GaN) substrate, an indium gallium nitride (InGaN) substrate, a sapphire substrate and a silicon (Si) substrate. Nitride semiconductor devices.

This application claims priority based on Japanese Patent Application No. 2015-172749 filed on Sep. 2, 2015 in the Japanese Patent Office, and the entire contents of this application are referred to the present application by reference. In the

Various modifications, combinations, subcombinations, and modifications will occur to those skilled in the art depending on the design requirements and other factors, but they fall within the scope of the appended claims and their equivalents. Are understood to be

Claims

A first semiconductor layer,
An active layer provided on the first semiconductor layer;
And a second semiconductor layer provided on the active layer and having an emission window for emitting light emitted from the active layer.
A nitride semiconductor device, wherein at least one recess or a first dielectric multilayer film is formed on a side surface of the first semiconductor layer or the second semiconductor layer.
The semiconductor device further includes an element formation substrate of the first semiconductor layer provided in contact with the first semiconductor layer,
The nitride semiconductor device according to claim 1, wherein at least one of the recess or the first dielectric multilayer film is formed on a side surface of the first semiconductor layer.
The nitride semiconductor device according to claim 2, wherein one or more of the first dielectric multilayer films are embedded in the first semiconductor layer.
A second dielectric provided at a position facing the one first dielectric multilayer film embedded in the first semiconductor layer with the first semiconductor layer, the active layer, and the second semiconductor layer in between. The nitride semiconductor device according to claim 3, further comprising a body multilayer film.
The nitride semiconductor device according to claim 1, wherein a plurality of the first dielectric multilayer films are exposed on each side surface of the first semiconductor layer.
The nitride semiconductor device according to claim 1, wherein a plurality of the recesses are formed on each side surface of the first semiconductor layer.
The nitride semiconductor device according to claim 1, wherein the first semiconductor layer, the active layer, and the second semiconductor layer are made of a GaN-based compound semiconductor.
The nitride semiconductor device according to claim 2, wherein the device formation substrate is any one of a gallium nitride (GaN) substrate, an indium gallium nitride (InGaN) substrate, a sapphire substrate and a silicon (Si) substrate.