WO2017018222A1 - Piezoelectric film, method for producing same, bimorph element, piezoelectric element, and method for producing same - Google Patents

Piezoelectric film, method for producing same, bimorph element, piezoelectric element, and method for producing same Download PDF

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WO2017018222A1
WO2017018222A1 PCT/JP2016/070757 JP2016070757W WO2017018222A1 WO 2017018222 A1 WO2017018222 A1 WO 2017018222A1 JP 2016070757 W JP2016070757 W JP 2016070757W WO 2017018222 A1 WO2017018222 A1 WO 2017018222A1
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film
electrode
formula
equation
forming
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PCT/JP2016/070757
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French (fr)
Japanese (ja)
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健 木島
本多　祐二
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株式会社ユーテック
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Priority to TW105123257A priority patent/TWI728988B/en
Publication of WO2017018222A1 publication Critical patent/WO2017018222A1/en

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/87—Electrodes or interconnections, e.g. leads or terminals
    • H10N30/871—Single-layered electrodes of multilayer piezoelectric or electrostrictive devices, e.g. internal electrodes
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01G—COMPOUNDS CONTAINING METALS NOT COVERED BY SUBCLASSES C01D OR C01F
    • C01G25/00—Compounds of zirconium
    • C—CHEMISTRY; METALLURGY
    • C01—INORGANIC CHEMISTRY
    • C01G—COMPOUNDS CONTAINING METALS NOT COVERED BY SUBCLASSES C01D OR C01F
    • C01G33/00—Compounds of niobium
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/08—Oxides
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
    • H10N30/063—Forming interconnections, e.g. connection electrodes of multilayered piezoelectric or electrostrictive parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/06—Forming electrodes or interconnections, e.g. leads or terminals
    • H10N30/067—Forming single-layered electrodes of multilayered piezoelectric or electrostrictive parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H10N30/076—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by vapour phase deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/01—Manufacture or treatment
    • H10N30/07—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base
    • H10N30/074—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing
    • H10N30/077—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by liquid phase deposition
    • H10N30/078—Forming of piezoelectric or electrostrictive parts or bodies on an electrical element or another base by depositing piezoelectric or electrostrictive layers, e.g. aerosol or screen printing by liquid phase deposition by sol-gel deposition
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/50—Piezoelectric or electrostrictive devices having a stacked or multilayer structure
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/85—Piezoelectric or electrostrictive active materials
    • H10N30/853—Ceramic compositions
    • H10N30/8548—Lead based oxides
    • H10N30/8554—Lead zirconium titanate based
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00—Piezoelectric or electrostrictive devices
    • H10N30/80—Constructional details
    • H10N30/87—Electrodes or interconnections, e.g. leads or terminals
    • H10N30/872—Connection electrodes of multilayer piezoelectric or electrostrictive devices, e.g. external electrodes

Definitions

  • the present invention relates to a piezoelectric film and a manufacturing method thereof, a bimorph element, a piezoelectric element and a manufacturing method thereof.
  • PZT Pb (Zr, Ti) O 3
  • the polycrystalline PZT powder is fired, and this polycrystalline PZT powder is mixed with a resin to form a PZT sheet in which the mixture is formed into a sheet.
  • a bulk piezoelectric body can be manufactured.
  • the thickness of the single layer PZT sheet after baking is 20 ⁇ m or more (see, for example, Patent Document 1).
  • the reason why the PZT sheets having a bulk piezoelectric body of 20 ⁇ m or more are laminated as described above is that when the thickness is less than 20 ⁇ m, piezoelectric characteristics may not be obtained.
  • the polycrystalline PZT powder since the polycrystalline PZT powder has a large crystal grain size, it cannot be processed into a PZT sheet having a thickness of 10 ⁇ m or less.
  • the PZT of the bulk piezoelectric body since the PZT of the bulk piezoelectric body has a low Curie temperature of 200 ° C., the piezoelectric characteristics are easily broken at high temperatures. Therefore, there is a drawback that it is difficult to precisely process the bulk piezoelectric body because there is a limit to the temperature at which it can be heated.
  • a conventional PZT film-like piezoelectric body is manufactured by forming a PZT film having a thickness of 2 ⁇ m or less on a substrate by sputtering (see, for example, Patent Document 2).
  • the film-like piezoelectric body has a thickness of 2 ⁇ m or less because the film forming speed is low. Specifically, since it takes 2 hours or more to form a PZT film having a thickness of 1 ⁇ m by sputtering, it takes 4 hours or more to form a 2 ⁇ m PZT film. Therefore, manufacturing a thick film-like piezoelectric material such as a bulk piezoelectric material with a PZT film increases the cost, and is not practical for industrial use.
  • the PZT film is formed by sputtering to a thickness of 5 ⁇ m or more, the input voltage VDC of the sputtering apparatus is lowered, and it is difficult to produce a PZT film having a constant composition.
  • the reason is that as the film formation time becomes longer, the surface of the PZT target of the sputtering apparatus becomes metallized and the resistance value decreases, and the surface composition of the PZT target is not PZT. Therefore, it is difficult to produce a film-like piezoelectric body having a film thickness of 5 ⁇ m or more. Due to the above circumstances, the bulk piezoelectric film and the film piezoelectric body have different thicknesses. Therefore, the product manufactured by the bulk piezoelectric body and the product manufactured by the film piezoelectric body are separated depending on the application.
  • the piezoelectric film is characterized in that the electrode is made of a Pt film.
  • (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A piezoelectric film having a Curie temperature of 250 to 420 ° C.
  • a step of forming a film The method of manufacturing a piezoelectric film, wherein the DUTY ratio is a ratio of a period during which the high-frequency output is applied to the sputtering target during one period.
  • the specific resistance of the surface of the sputtering target when the high-frequency output is supplied to the sputtering target is 1 ⁇ 10 9 ⁇ ⁇ cm or more 1 ⁇ 10 12
  • the sputtering target when supplying the high-frequency output to the sputtering target is O in the ratio of the following formula 6. 2
  • a method for producing a piezoelectric film characterized by being placed in an atmosphere of gas and Ar gas. 0.1 ⁇ O 2 Gas / Ar gas ⁇ 0.3 Equation 6
  • the method for manufacturing a piezoelectric film wherein the sputtering target when supplying the high-frequency output to the sputtering target is placed in a pressure atmosphere of 0.1 Pa or more and 2 Pa or less.
  • First (Pb) having a thickness of 5 ⁇ m or more a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A membrane, The first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode formed on the membrane; The first electrode and the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a second (Pb) film having a thickness of 5 ⁇ m or more formed on the film.
  • a piezoelectric element having at least one of the following remanent polarization values: 0 ⁇ ⁇ ⁇ 1 Equation 1 1.00 ⁇ a + b ⁇ 1.35 Expression 11 0 ⁇ b ⁇ 0.08 Expression 12 1.00 ⁇ c + d + e ⁇ 1.1 Formula 13 0.4 ⁇ c ⁇ 0.7 Formula 14 0.3 ⁇ d ⁇ 0.6 Formula 15 0 ⁇ e ⁇ 0.1 Equation 16 [16] In the above [15], The first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ The XRD peak value of the film is higher than the XRD peak value of the first electrode, Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ The piezoelectric element, wherein the XRD peak value of the film is higher than the XRD peak value of the second electrode.
  • each film is a film formed by sputtering, For the first and second bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • Each of the films is a film formed by a sol-gel method.
  • a piezoelectric element having at least one of the following remanent polarization values: 0 ⁇ ⁇ ⁇ 1 Equation 1 1.00 ⁇ a + b ⁇ 1.35 Expression 11 0 ⁇ b ⁇ 0.08 Expression 12 1.00 ⁇ c + d + e ⁇ 1.1 Formula 13 0.4 ⁇ c ⁇ 0.7 Formula 14 0.3 ⁇ d ⁇ 0.6 Formula 15 0 ⁇ e ⁇ 0.1 Equation 16 [19] a first electrode; The first (Pb) film having a thickness of 5 ⁇ m or more formed on the first electrode.
  • a third (Pb) formed on the third electrode a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A membrane, Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A fourth electrode formed on the membrane; Comprising A second side surface of the second electrode and a second side surface of the fourth electrode are electrically connected by a seventh electrode; a, b, c, d, e, and ⁇ satisfy the above-mentioned formula 1 and formulas 11 to 16; [24] In the above [23], A fourth (Pb) formed on the fourth electrode.
  • An electrode film is formed on the substrate, and a sputtering method (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Forming a film (a); (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ For adhesion on membrane (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A step (b) of forming a film by a sol-gel method; Removing the substrate from the electrode film (c); By etching the electrode film, the (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Forming a first electrode, a second electrode, and a third electrode under the film (d); Comprising A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and ⁇ satisfy the following formula 1 and formulas 11 to 16.
  • a first electrode film is formed on a first substrate, and a first (Pb) film is formed on the first electrode film by a sputtering method.
  • a second electrode film is formed on the film, and the second electrode film is etched to obtain the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Forming a first electrode and a second electrode on the film (b);
  • Membrane for adhesion Pb on the first and second electrodes
  • a first electrode film is formed on a first substrate, and a first (Pb) film is formed on the first electrode film by a sputtering method.
  • a third electrode film is formed on the second substrate, and a third (Pb) film is formed on the third electrode film by a sputtering method.
  • a sixth electrode film is formed on the fourth substrate, and a sixth (Pb) film is formed on the sixth electrode film by a sputtering method.
  • a method for manufacturing a piezoelectric element comprising: [33] A step (a) of forming a first electrode on a substrate; On the first electrode, a first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Forming a film (b); The first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Forming a second electrode on the film (c); A second (Pb) is formed on the second electrode by sputtering.
  • the step (g) is a step of connecting the first side surface of the first electrode, the first side surface of the third electrode, and the first side surface of the fifth electrode by a sixth electrode.
  • C a specific C
  • B a specific B
  • C is formed above (or below) a specific B
  • C is formed
  • C is directly formed on (or below) B
  • the present invention is not limited to above (or below) B as long as the effect of the embodiment of the present invention is not inhibited.
  • C is formed via another (C is formed) is also included.
  • a film-like piezoelectric film having a film thickness of 5 ⁇ m or more or a method for manufacturing the film can be provided.
  • a bimorph element having a film-like piezoelectric film having a thickness of 5 ⁇ m or more can be provided.
  • FIG. 1 is a cross-sectional view schematically showing a sputtering apparatus according to one embodiment of the present invention.
  • FIG. 2 is a diagram illustrating the case of a DUTY ratio of 100 S / T%.
  • 3A to 3D are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 4A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention
  • FIG. 4B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
  • 5A and 5B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 6A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention
  • FIG. 6B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
  • 7A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention
  • FIG. 7B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
  • 8A to 8C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the invention.
  • 9A to 9C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 10A to 10C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 11A to 11C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 12A to 12D are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • FIG. 13A and 13B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 14A and 14B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 15A to 15C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 16A is an image obtained by observing a cross section of the sample of Example 1 with an FIB (Focused Ion Beam)
  • FIG. 16B is an image obtained by observing the sample of the Example 2 with a FIB.
  • FIG. 17 is an XRD chart of the PZT film of Example 1 and the PZT film of Example 2.
  • FIG. 18 is an image diagram of a reciprocal lattice map.
  • FIG. 19 is a diagram for explaining reciprocal lattice vectors and reciprocal lattice points on the crystal lattice plane (hkl).
  • FIG. 20 is a diagram for explaining the vector notation of the X-ray diffraction conditions.
  • 21A to 21C are diagrams for explaining reciprocal lattice mapping (method).
  • FIG. 22 is a diagram for explaining reciprocal lattice mapping (method).
  • FIG. 23 shows a reciprocal lattice simulation result of the PZT single crystal.
  • 24A and 24B show the results of reciprocal lattice map measurement of the samples of Example 1 (present invention 5 ⁇ m) and Example 2 (present invention 10 ⁇ m).
  • FIG. 25 (A) is a diagram showing strongly attractive hysteresis curves of Example 1 (present invention 5 ⁇ m), Example 2 (present invention 10 ⁇ m) and Example 3 (present invention 20 ⁇ m), and FIG. It is a figure which shows the piezoelectric butterfly curve of each of Examples 1-3.
  • FIG. 26A is a diagram showing a strong attractive hysteresis curve of Comparative Example 2 (K148), and
  • FIG. 26B is a diagram showing a piezoelectric butterfly curve of Comparative Example 2 (K148).
  • FIG. 27A is a diagram showing a strong attractive hysteresis curve of Comparative Example 3 (K129)
  • FIG. 27B is a diagram showing a piezoelectric butterfly curve of Comparative Example 3 (K129).
  • FIG. 28 is a diagram showing the results of d33 evaluation of the PZT film of Example 3 (20 ⁇ m of the present invention).
  • FIG. 29 is a diagram showing the results of measuring the temperature change of the relative permittivity and dielectric loss (tan ⁇ ) of the sample of Example 2 (the present invention 10 ⁇ m) while changing the frequency to 100 k, 500 k, and 1 MHz.
  • 30 is a cross-sectional view showing a sample of Example 4.
  • FIG. FIG. 31 is an XRD chart of the sample of Example 4.
  • FIG. 32 is an XRD chart of the sample of Example 4.
  • FIG. 33 is an image obtained by observing a cross section of the sample of Example 5 using FIB.
  • 38A is a FIB-SEM image of the sample of Example 3 (20 ⁇ m-PZT film), and FIG. 38B is an enlarged image of FIG. 38A.
  • 39A and 39B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 40A and 40B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 41A and 41B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 42A to 42C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • 43A and 43B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
  • FIG. 44 is a cross-sectional view illustrating the method for manufacturing the series-type bimorph element according to one embodiment of the present invention.
  • FIG. 45 is a cross-sectional view illustrating the method for manufacturing the parallel bimorph element according to one embodiment of the present invention.
  • FIG. 46 is a cross-sectional view for explaining the method for manufacturing the piezoelectric film of the sixth embodiment.
  • FIG. 47 is a cross-sectional view for explaining the method of manufacturing the piezoelectric film of Comparative Example 4.
  • FIG. 48 is a diagram for explaining a method of measuring the strain (stress) of the PZT film.
  • FIG. 49 is an optical micrograph of the surface of the PZT film 1105 of Comparative Example 4 shown in FIG.
  • FIG. 1 is a cross-sectional view schematically illustrating a sputtering apparatus according to one embodiment of the present invention.
  • the sputtering apparatus includes a chamber 11, and a holding unit 13 that holds the substrate 12 is disposed in the chamber 11.
  • a heater (not shown) for heating the substrate 12 to a predetermined temperature may be disposed in the holding unit 13.
  • the chamber 11, the substrate 12, and the holding unit 13 are grounded.
  • a target holding unit 15 that holds the sputtering target 14 is disposed in the chamber 11.
  • the sputtering target 14 held by the target holding unit 15 is positioned so as to face the substrate 12 held by the holding unit 13.
  • the sputtering target 14 has a specific resistance of 1 ⁇ 10 7 It is a sputtering target including an insulator of ⁇ ⁇ cm or more, and the insulator is preferably an oxide.
  • the insulator is of the general formula ABO 3 A is Al, Y, Li, Na, K, Rb, Pb, Cs, La, Sr, Cr, Ag, Ca, Pr, Nd, Ba, Bi, F and a lanthanum series element of the periodic table And at least one element selected from the group consisting of: B, Al, Ga, In, Nb, Sn, Ti, Zr, Ru, Rh, Pd, Re, Os, IrPt, U, CO, Fe , Ni, Mn, Cr, Cu, Mg, V, Nb, Ta, Mo, and a substance containing a perovskite substance containing at least one element selected from the group consisting of W, or bismuth oxide and a perovskite structure
  • the perovskite structure block includes Li, Na, K, Ca, Sr, Ba, Y, Bi, Pb, and a bismuth layered structure ferroelectric crystal having a structure in which blocks are alternately stacked.
  • the sputtering target 14 is (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ And a, b, c, d, e, and ⁇ satisfy the following Expression 1 and Expressions 11 to 16.
  • ⁇ includes a value larger than 0 in the above formula 1 is because it includes an oxygen deficient perovskite structure.
  • all the components of the sputtering target 14 may have an oxygen-deficient perovskite structure, but the sputtering target 14 may partially include an oxygen-deficient perovskite structure.
  • the sputtering apparatus has an output supply mechanism 16, which is a high-frequency power supply with a pulse function.
  • the output supply mechanism 16 is electrically connected to the matching unit 22, and the matching unit 22 is electrically connected to the target holding unit 15. That is, the output supply mechanism 16 outputs a high-frequency output (RF output) having a frequency of 10 kHz to 30 MHz to the sputtering target 14 via the matching unit 22 and the target holding unit 15 and a period (3 kHz) of 1/20 ms to 1/3 ms.
  • the frequency is 20 kHz or less) and is supplied in a pulse shape having a duty ratio of 25% or more and 90% or less.
  • the high-frequency output is supplied to the sputtering target 14 by the output supply mechanism 16 via the target holding unit 15, but the high-frequency output may be directly supplied to the sputtering target 14 by the output supply mechanism 16.
  • the DUTY ratio is a ratio of a period during which a high frequency output is applied to the target holding unit 15 during one cycle. For example, in the case of a DUTY ratio of 25%, a period of 25% of one cycle is a period during which a high frequency output is applied to the target holding unit 15 (a period when the high frequency output is on), and a period of 75% of one cycle is held by the target. This is a period during which no high-frequency output is applied to the unit 15 (high-frequency output off period).
  • a period of 1/80 ms of 25% of 1/20 ms becomes a period of high frequency output on.
  • FIG. 2 shows the case of a DUTY ratio of 100 S / T%, where one period of 100 S / T% is a high-frequency output on period, and the remaining period of 100 N / T% is one period. The high frequency output is off.
  • the pulse shape when the output supply mechanism 16 supplies the high-frequency output to the target holding unit 15 in a pulse shape has a period of 1/20 ms to 1/3 ms (frequency of 3 kHz to 20 kHz). ), A DUTY ratio of 25% or more and 90% or less is preferable. However, it is preferable that the pulse shape has a DUTY ratio of 25% or more and 90% or less in a period of 1/15 ms or more and 1/5 ms or less.
  • the sputtering apparatus has a voltage V that is a direct current component generated in the sputtering target 14 when a high frequency output is supplied by the output supply mechanism 16.
  • V a direct current component generated in the sputtering target 14 when a high frequency output is supplied by the output supply mechanism 16.
  • DC V to control -200V to -80V DC A control unit 23 is included. This V DC The control unit 23 DC It has a sensor and is electrically connected to the output supply mechanism 16.
  • the sputtering apparatus also includes a first gas introduction source 17 that introduces a rare gas into the chamber 11, and a vacuum exhaust mechanism 19 such as a vacuum pump that evacuates the chamber 11.
  • the sputtering apparatus has an O in the chamber. 2 It has the 2nd gas introduction source 18 which introduces gas.
  • the rare gas introduced into the chamber 11 by the first gas introduction source 17 is preferably Ar gas, and O introduced by the second gas introduction source 18 during film formation.
  • the sputtering apparatus may have a flow rate control unit (not shown) for controlling the ratio of the gas and the Ar gas introduced by the first gas introduction source 17 to satisfy the following formula 6. 0.1 ⁇ O 2 Gas / Ar gas ⁇ 0.3 Equation 6
  • the sputtering apparatus preferably includes a pressure control unit that controls the pressure in the chamber during film formation to be 0.1 Pa or more and 2 Pa or less.
  • the sputtering apparatus also includes a magnet 20 that applies a magnetic field to the sputtering target 14 and a rotating mechanism 21 that rotates the magnet 20 at a speed of 20 rpm to 120 rpm.
  • Various substrates can be used here, including those in which a thin film is formed on the substrate.
  • the following substrate is used as an example.
  • ZrO on Si substrate oriented in (100) 2 The film is formed by vapor deposition at a temperature of 550 ° C. or lower (preferably a temperature of 500 ° C.). This ZrO 2 The film is oriented (100). In this specification, the orientation to (100) and the orientation to (200) are substantially the same. After this, ZrO 2 A lower electrode is formed on the film.
  • the lower electrode is formed by an electrode film made of metal or oxide.
  • a Pt film or an Ir film is used as the electrode film made of metal.
  • an electrode film made of an oxide for example, Sr (Ti 1-x Ru x ) O 3 A film is used, and x satisfies the following formula 15. 0.01 ⁇ x ⁇ 0.4 Formula 15
  • ZrO 2 On the film, a Pt film by epitaxial growth is formed as a lower electrode by sputtering at a temperature of 550 ° C. or lower (preferably a temperature of 400 ° C.). This Pt film is oriented to (200).
  • the substrate as described above is used, but instead of the Si substrate, a single crystal substrate such as a Si single crystal or a sapphire single crystal, a single crystal substrate with a metal oxide film formed on the surface, and a polysilicon on the surface A substrate on which a film or a silicide film is formed may be used.
  • the substrate is held by the holding unit 13.
  • Ar gas is introduced into the chamber 11 by the first gas introduction source 17, and O 2 is introduced by the second gas introduction source 18. 2 Introduce gas.
  • O 2 It is good to control by a flow control part so that ratio of gas and Ar gas may satisfy the following formula 6.
  • the inside of the chamber 11 is evacuated by the evacuation mechanism 19 to reduce the pressure inside the chamber 11 to a predetermined pressure (for example, a pressure of 0.1 Pa or more and 2 Pa or less).
  • a predetermined pressure for example, a pressure of 0.1 Pa or more and 2 Pa or less.
  • the specific resistance is 1 ⁇ 10 1 on the substrate 12 via the matching unit 22 and the target holding unit 15 by the high-frequency output mechanism 16.
  • a high frequency output is supplied to the sputtering target 14 containing an insulator of ⁇ ⁇ cm or more.
  • This high-frequency output is in the form of a pulse having a DUTY ratio of 25% to 90% at a frequency of 10 kHz to 30 MHz and a period of 1/20 ms to 1/3 ms.
  • an insulating film is formed on the substrate 12.
  • a high frequency output is supplied to the sputtering target 14 to form an insulating film
  • a voltage V which is a direct current component generated in the sputtering target 14 when a high frequency output is supplied to the sputtering target 14.
  • DC V DC It is preferable to control to ⁇ 200 V or more and ⁇ 80 V or less by the control unit 23.
  • the specific resistance of the surface of the sputtering target 14 after supplying a high frequency output to the sputtering target 14 is 1 ⁇ 10 9 ⁇ ⁇ cm or more 1 ⁇ 10 12 It is preferable to control to ⁇ ⁇ cm or less.
  • a high frequency output of 10 kHz to 30 MHz is applied to a sputtering target including an insulator having a specific resistance of 1 ⁇ 10 7 ⁇ ⁇ cm or more, and a frequency of 1/20 ms or more and 1/3 ms or less is 25% or more and 90% or less.
  • DUTY ratio is supplied in a pulse form.
  • the sputtering target 14 is of the general formula ABO 3 It is conceivable that the surface resistance of the sputtering target 14 greatly fluctuates during film formation when the perovskite substance represented by the formula (1) or the bismuth layer structure ferroelectric crystal is included.
  • a, b, c, d, e, and ⁇ satisfy the following Equation 1 and Equations 11 to 16 (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a, b, c, d, e, and ⁇ satisfy the following formula 1 and formulas 11 to 16.
  • the film has a thickness of 5 ⁇ m or more, preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, and further preferably 20 ⁇ m or more.
  • the Curie temperature of the film is preferably 250 ° C. or higher and 420 ° C. or lower (preferably 300 ° C. or higher and 400 ° C. or lower).
  • the film may be formed on an electrode such as a Pt film, and this (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • an electrode such as a Pt film
  • the peak value of (002) of the XRD becomes higher than the peak value of (200) of the XRD of the electrode.
  • the film thickness is 5 ⁇ m or more.
  • the above-mentioned high frequency output is supplied to the sputtering target made of in the above cycle in the form of pulses with the above DUTY ratio (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the film formation rate when forming the film can be improved to 1 nm / sec or more and 2.5 nm / sec or less.
  • ZrO is interposed between the Si substrate and the Pt film.
  • the oxygen deficient perovskite structure can be classified by the following general formula. The following classification is based on the crystal structure that actually exists. Perovskite structure is ABO 3- ⁇ Or A n B n O 3n-1 It is represented by The left figure of each of FIGS. 34 to 37 is ABO. 3- ⁇ It is a schematic diagram which shows the various crystal structures containing the oxygen deficiency. Each of the right diagrams of FIGS.
  • FIG. 34 to 37 is a schematic diagram of an oxygen deficient structure on the ab plane, and the C ′ layer and the D ′ layer are mirror images of the C layer and the D layer on the ab plane, respectively. It is a schematic diagram showing a state where the phase is shifted.
  • FIG. 34 is a schematic diagram of an oxygen deficient structure on the ab plane, and the C ′ layer and the D ′ layer are mirror images of the C layer and the D layer on the ab plane, respectively. It is a schematic diagram showing a state where the phase is shifted.
  • FIG. 34 is a schematic diagram of an oxygen-
  • One of the derived structures of perovskite is an oxygen-deficient ordered perovskite structure.
  • BO 6 The octahedron is BO 5 Square pyramid and BO 4 It changes to a tetrahedron.
  • ABO with slight oxygen deficiency 3- ⁇ In this case, oxygen at random sites is deficient while maintaining the basic structure.
  • the amount of oxygen deficiency ⁇ increases, in many cases, oxygen deficiencies are regularly arranged.
  • the coordination structure varies greatly depending on the oxygen deficiency state.
  • a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment.
  • 2 A film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
  • a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, more preferably 20 ⁇ m or more) is formed on the Pt film 103 by sputtering.
  • a film 104 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the following Expression 1 and Expressions 11 to 16.
  • the polarization direction is the direction of an arrow 31 illustrated in FIG. That is, (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
  • the Pt film 103 and ZrO 2 By processing the film 102 by photolithography technology and etching technology, (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode 103a, a second electrode 103b, and a third electrode 103c are formed under the film 104.
  • the first to third electrodes 103a to 103c are upper electrodes. Thereafter, as shown in FIG. a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ The membrane 105 is cut.
  • the first electrode 103a (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a third stacked portion in which the films 105 are stacked is formed.
  • a fourth stacked portion and a fifth stacked portion are also formed.
  • FIG. 5A for bonding the first electrode 103a of the first stacked portion and the second stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Overlaying the film 105 and bonding the second electrode 103b of the second stacked portion and the third stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Overlaying the film 105 and bonding the third electrode 103c of the third stacked portion and the fourth stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the film 105 is overlaid.
  • the film 105 is attached, the (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the temperature of the heat treatment at this time is for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A temperature at which the film 105 crystallizes is good.
  • the electrodes 106 are formed on the side surfaces of the second electrode 103b and the fourth electrode 103d, and the first electrode 103a, the third electrode 103c, and the fifth electrode 103e are formed.
  • An electrode 107 is formed on the side surface of the substrate.
  • the electrode 106 is electrically connected to the second electrode 103b and the fourth electrode 103d, and the electrode 107 is electrically connected to the first electrode 103a, the third electrode 103c, and the fifth electrode 103e.
  • FIG. 6B are diagrams for describing a method of manufacturing a piezoelectric element according to an aspect of the present invention.
  • a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment.
  • 2 A film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
  • a first (Pb) film having a thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, and further preferably 20 ⁇ m or more) is formed on the Pt film 103 by sputtering.
  • a film 104 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the following Expression 1 and Expressions 11 to 16.
  • the polarization direction is the direction of an arrow 31 illustrated in FIG. That is, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
  • the film 104 is bonded onto the first to third electrodes 111a to 111c (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the film 112 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the film 112 is amorphous. a, b, c, d, e, and ⁇ may satisfy the above-described Expression 1 and Expressions 11 to 16.
  • the ZrO film is formed on the Si substrate 121 by the same method as in the first embodiment.
  • 2 A film 122 is formed and ZrO 2 A Pt film 123 as an electrode film is formed on the film 122.
  • a second (Pb) film having a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, further preferably 20 ⁇ m or more) is formed on the Pt film 123 by sputtering in the same manner as in the first embodiment.
  • a film 124 is formed.
  • the Pt film 123 and the ZrO 2 By processing the film 122 by a photolithography technique and an etching technique, the second (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode 123a, a second electrode 123b, and a third electrode 123c are formed under the film 124. Also, the Pt film 103 and ZrO 2 By processing the film 102 by the photolithography technique and the etching technique, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode 103a, a second electrode 103b, and a third electrode 103c are formed over the film 104.
  • the membrane 124 is cut.
  • a piezoelectric element can be manufactured by performing the process shown in FIG. In this embodiment, the same effect as that of the first embodiment can be obtained.
  • the polarization direction 31 of the film 104 is the second (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ This is the direction opposite to the polarization direction 32 of the film 124. Therefore, when a positive voltage is applied to one of the electrode 106 and the electrode 107 of the piezoelectric element after the step shown in FIG. 5B and a negative voltage is applied to the other, for example, one of the positive voltage and the negative voltage is applied.
  • a second (Pb) film having a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, further preferably 20 ⁇ m or more) is formed on the Pt film 123 by sputtering in the same manner as in the first embodiment.
  • a film 124 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the above-described Expression 1 and Expressions 11 to 16.
  • heat treatment is performed while applying a load between the Si substrate 101 and the Si substrate 121.
  • the Pt film 123 and the ZrO 2 By processing the film 122 by a photolithography technique and an etching technique, the second (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode 123a, a second electrode 123b, and a third electrode 123c are formed under the film 124. Then the second (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ The film 124 is bonded onto the first to third electrodes 123a to 123c (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A film 133 is formed by a sol-gel method and temporarily fired.
  • the film 133 is amorphous. a, b, c, d, e, and ⁇ may satisfy the above-described Expression 1 and Expressions 11 to 16. Thereafter, as shown in FIG. 10A, the ZrO layer is formed on the Si substrate 141.
  • ZrO on the Si substrate 151 2 A film 152 is formed and ZrO 2 A Pt film 153 as an electrode film is formed on the film 152.
  • the Pt film 153 is sputtered (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a film 154 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the above-described Expression 1 and Expressions 11 to 16.
  • heat treatment is performed while applying a load between the Si substrate 141 and the Si substrate 151.
  • the temperature of the heat treatment at this time is for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A temperature at which the film 133 crystallizes is good.
  • the Si substrate 141 and the ZrO 2 The film 142 is removed.
  • the Pt film 143 is processed by a photolithography technique and an etching technique, so that (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A first electrode 143a, a second electrode 143b, and a third electrode 143c are formed over the film 144. Thereafter, by repeating the steps of FIGS.
  • FIG. 12A is a view for explaining a method of manufacturing a piezoelectric element according to one embodiment of the present invention.
  • ZrO is formed on the Si substrate 161 by the same method as in the first embodiment.
  • 2 A film 162 is formed and ZrO 2 A Pt film 163 as an electrode film is formed on the film 162.
  • This Pt film 163 is the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ It becomes the first electrode for the film.
  • a first layer (Pb) having a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, more preferably 20 ⁇ m or more) is formed on the Pt film 163 by sputtering in the same manner as in the first embodiment.
  • a film 164 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the following Expression 1 and Expressions 11 to 16.
  • a Pt film 165 by epitaxial growth is formed on the film 164 by sputtering at a temperature of 550 ° C. or lower (preferably a temperature of 400 ° C.).
  • This Pt film 165 is the second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ This is the second electrode for the film. Thereafter, as shown in FIG.
  • a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, more preferably, more preferably by sputtering on the Pt film 165 in the same manner as in the first embodiment.
  • the second layer (Pb) a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a film 166 is formed. It is preferable that a, b, c, d, e, and ⁇ satisfy Expression 1 and Expressions 11 to 16.
  • a Pt film 167 is formed on the film 166 in the same manner as the Pt film 165 described above.
  • This Pt film 167 is the third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ It becomes the third electrode for the film.
  • the third layer (Pb) is formed on the Pt film 167 as shown in FIG.
  • the Pt film 169 is the fourth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the fourth electrode for the film is used, and the Pt film 171 is the fifth electrode.
  • the Si substrate 161 is made of ZrO. 2 Remove from film 162.
  • the laminated film is cut after removing the Si substrate 161.
  • the laminated film may be cut before removing the Si substrate 161, and then the Si substrate may be removed.
  • a photosensitive permanent resist film 172 is applied to the first side surface of the stacked portion.
  • the photosensitive permanent resist film 172 is exposed and developed to form permanent resist films 172a and 172b on the first side surface of the stacked portion.
  • the first side surface of the Pt film (fourth electrode) 169 in the stacked portion is covered with the permanent resist film 172a, and the first side surface of the Pt film (second electrode) 165 in the stacked portion is the permanent resist film.
  • the first side surfaces of the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171 in the stacked portion are exposed. Thereafter, as shown in FIG. 14B, the first side surface of the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171 in the stacked portion.
  • a Pt film (sixth electrode) 173 is formed on the permanent resist films 172a and 172b. Accordingly, the Pt film (sixth electrode) 173 is electrically connected to the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171. .
  • the stacked portion of FIG. 14B is disposed upside down, and a photosensitive permanent resist film 174 is applied to the second side surface of the stacked portion.
  • the photosensitive permanent resist film 174 is exposed and developed to form permanent resist films 174a, 174b, and 174c on the second side surface of the stacked portion.
  • the second side surface of the Pt film (first electrode) 163 in the stacked portion is covered with the permanent resist film 174a
  • the second side surface of the Pt film (third electrode) 167 in the stacked portion is the permanent resist film.
  • the second side surface of the Pt film (fifth electrode) 171 in the stacked portion is covered with a permanent resist film 174c
  • the Pt film (second electrode) 165 and the Pt film (fourth electrode) in the stacked portion are covered with 174b.
  • the second side surface of each electrode 169 is exposed. Thereafter, as shown in FIG.
  • the present invention is not limited to this, and the present invention can be modified as follows.
  • a stacked portion including the film 166 and the third electrode 167 can also be used.
  • the first side surface of the first electrode 163 and the first side surface of the third electrode 167 may be electrically connected by the sixth electrode 173.
  • a stacked portion including the film 168 and the fourth electrode 169 can also be used.
  • n-th layer (Pb) is formed on the fifth electrode 171 illustrated in FIG. a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the film and the (n + 3) th electrode may be repeatedly formed.
  • n is an integer of 5 or more.
  • the first electrode 163 the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Film 164, second electrode 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Film 166, third electrode 167, third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Film 168, fourth electrode 169, fourth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Membrane 170, fifth electrode 171, fifth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Membrane, 8th electrode, 6th layer (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ Membrane and 9th electrode, 7th layer (Pb a La b ) (Zr c Ti
  • the first side surface of the first electrode 163, the first side surface of the third electrode 167, the first side surface of the fifth electrode 171, and the first side surface of the ninth electrode are the sixth side surface.
  • the second side surface of the second electrode 165, the second side surface of the fourth electrode 169, the second side surface of the eighth electrode, and the second side surface of the tenth electrode are electrically connected by the electrode 167.
  • FIG. 39A a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment.
  • a film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
  • a first (Pb) film having a thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, and further preferably 20 ⁇ m or more) is formed on the Pt film 103 by sputtering.
  • a film 104 is formed.
  • a, b, c, d, e, and ⁇ may satisfy the following Expression 1 and Expressions 11 to 16.
  • the film 125 is amorphous. a, b, c, d, e, and ⁇ may satisfy the above-described Expression 1 and Expressions 11 to 16.
  • the polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
  • the ZrO film is formed on the Si substrate 101 as in FIG. 2
  • the film 102, the Pt film 103, the first (Pb) having a film thickness of 5 ⁇ m or more (preferably 10 ⁇ m or more, more preferably 15 ⁇ m or more, and further preferably 20 ⁇ m or more) a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • a film 104 is formed in order.
  • the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A Pt film 126 as an electrode film is formed on the film 104.
  • the polarization direction of the film 104 is the direction of the arrow 31.
  • the Si substrate 101 of FIG. 39B is placed in the reverse direction on the Pt film 126 of the Si substrate 101 of FIG. 40B.
  • the polarization direction of the film 104 (arrow 31) is the first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇
  • the direction of polarization of the film 104 (arrow 31) is reversed.
  • the upper Si substrate 101 is dissolved and removed by KOH wet etching. As a result, ZrO 2
  • the film 102 is exposed. In other words, the wet etching at this time is ZrO. 2 Etching is stopped at film 102.
  • FIG. 42A the upper Si substrate 101 is dissolved and removed by KOH wet etching.
  • the film 102 and the Pt film 103 are removed by dry etching. As a result, the upper first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ The film 104 is exposed. Next, as shown in FIG. 42C, the upper first (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ For adhesion on the membrane 104 (Pb a La b ) (Zr c Ti d Nb e ) O 3- ⁇ A film 127 is formed by a sol-gel method and temporarily fired.
  • FIG. 44 is a cross-sectional view illustrating the method for manufacturing the series-type bimorph element according to one embodiment of the present invention.
  • the steps shown in FIGS. 12A and 12B are performed, and then the Si substrate 161 is dissolved and removed by KOH wet etching in the same manner as the step shown in FIG.
  • a laminated film 37 is produced in which the Pt film 163, the PZT film 164, and the Pt film 165 are laminated in this order (see FIG. 44), and the PZT film 164 is polarized in the direction of the arrow 31.
  • ZrO 2 The film 162 may or may not be removed.
  • the laminated film 37 is attached to the upper and lower surfaces of the shim 35 made of metal foil by the adhesive layer 36.
  • a series type bimorph element can be moved by applying a DC voltage between the upper Pt film 163 and the lower Pt film 163. 44, the Pt film 165 on the shim 35 is read as the first electrode, the PZT film 164 on the Pt film 165 is read as the piezoelectric film, and the Pt film 163 on the PZT film 164 is changed to the second electrode.
  • FIG. 45 is a cross-sectional view illustrating the method for manufacturing the parallel bimorph element according to one embodiment of the present invention.
  • a laminated film 37 in which a Pt film 163, a PZT film 164, and a Pt film 165 are laminated in this order is produced by the same method as in the seventh embodiment (see FIG. 45), and this PZT film 164 is polarized in the direction of the arrow 31. is doing.
  • the laminated film 37 is attached to the upper and lower surfaces of the shim 35 made of metal foil by the adhesive layer 36.
  • the parallel bimorph element can be moved by applying a DC voltage between the upper Pt film 165 and the lower Pt film 163 and the shim 35.
  • the Pt film 163 on the shim 35 shown in FIG. 45 is read as the first electrode
  • the PZT film 164 on the Pt film 163 is read as the piezoelectric film
  • the Pt film 165 on the PZT film 164 is changed to the second electrode.
  • the Pt film 165 under the shim 35 is replaced with a third electrode
  • the PZT film 164 under the Pt film 165 is replaced with a piezoelectric film
  • the Pt film 163 under the PZT 165 is replaced with a fourth electrode. It may be replaced.
  • the first to eighth embodiments described above may be combined as appropriate.
  • Example 1 present invention 5 ⁇ m
  • Example 2 present invention 10 ⁇ m
  • a sample of Example 3 (20 ⁇ m of the present invention)
  • a sample of Comparative Example 1 comparativative Example 1 (conventional example) were prepared.
  • a ZrO 2 film was formed on a Si substrate by a vapor deposition method, and a Pt film formed by epitaxial growth as a lower electrode was formed on this ZrO 2 film by sputtering.
  • composition of the sputtering target and the composition of the sample when producing the samples of Examples 1, 2, 3 and Comparative Example 1 are as follows.
  • Example 1 (Invention 5 ⁇ m): Pb / Zr / Ti 130/58/42
  • Example 2 (Invention 10 ⁇ m): Pb / Zr / Ti 130/58/42
  • Example 1 (Invention 5 ⁇ m): Pb / Zr / Ti 109/55/45
  • Example 2 (Invention 10 ⁇ m): Pb / Zr / Ti 105/55/45
  • Example 3 (Invention 20 ⁇ m): Pb / Zr / Ti 102/55/45 Comparative example 1 (conventional example):
  • FIG. 16A is an image obtained by observing a cross section of the sample of Example 1 with an FIB (Focused Ion Beam), and FIG. 16B is an image obtained by observing the cross section of the sample of Example 2 with an FIB.
  • the thickness of the PZT film of Example 1 was 5.18 ⁇ m, and the thickness of the PZT film of Example 2 was 9.99 ⁇ m. These film thicknesses are Tilt correction values. The reason why this tilt correction is necessary is as follows. (1) When cutting with FIB is repeated, field of view shifts in the observed image. Since the cutting area is shifted from the center of the SEM image, correction is required. (2) The FIB cut surface is not perpendicular to the optical axis of observation.
  • FIG. 17 is a diagram showing the results of evaluating the crystallinity of the PZT film of Example 1 and the PZT film of Example 2 by XRD (X-Ray Diffraction).
  • the XRD (002) peak value of the PZT film is higher than the XRD (200) peak value of the Pt film. This is because the thickness of the PZT film is 5 ⁇ m or more.
  • Wide area reciprocal lattice mapping was performed on the samples of Examples 1, 2, 3 and Comparative Example 1. An image of the reciprocal lattice map is shown in FIG.
  • the XRD data of this example uses a fully automatic horizontal multipurpose X-ray diffractometer SmartLab manufactured by Rigaku Corporation, and wide area reciprocal lattice mapping is measured by attaching a hybrid multidimensional pixel detector HyPix-3000 to SmartLab. went.
  • FIG. 19 is a diagram for explaining reciprocal lattice vectors and reciprocal lattice points on the crystal lattice plane (hkl).
  • FIG. 20 is a diagram for explaining the vector notation of the X-ray diffraction conditions.
  • Direction: normal direction / reciprocal lattice mapping of (hkl) plane Measure the spread of reciprocal lattice points in reciprocal space.
  • Reciprocal lattice point Conditions that cause diffraction / tip of reciprocal lattice vector
  • Scattering vector: K k ⁇ k 0
  • Scattering vector K) (reciprocal lattice vector g hkl ) -Reciprocal lattice map measurement The scattering vector K is scanned and the two-dimensional distribution of reciprocal lattice points is measured.
  • a reciprocal lattice simulation is performed in advance based on the crystal structure information, and the measured value is compared.
  • the reciprocal lattice map is plotted with the following qx and qz equations.
  • Two planes were measured at 2 ⁇ of 10-120 °, ⁇ of 10-90 °, X of 0 °, 30 °, 60 ° and 90 °, and ⁇ of 0 ° and 45 °.
  • measurement is performed by fixing the substrate horizontally and irradiating X-rays (see FIG. 21A).
  • ⁇ -2 ⁇ measurement is performed while scanning the ⁇ axis (the rotation axis of the material) and the ⁇ axis (the turning operation axis). Further, the ⁇ axis (in-plane rotation axis) was measured at 0 ° and 45 ° at two points.
  • qzvs What is plotted in qx is reciprocal lattice mapping. By simultaneously scanning several steps of ⁇ axes, reciprocal lattice mapping and superimposing all over one surface, different components of the domain are measured, and the superiority or inferiority of the true orientation degree is known (See FIGS. 21B and 21C). Using Rigaku's software SmartLab Guidance, as shown in Fig.
  • FIG. 22 shows a reciprocal lattice simulation result of the PZT single crystal.
  • 24A and 24B show the results of reciprocal lattice map measurement of the samples of Example 1 (present invention 5 ⁇ m) and Example 2 (present invention 10 ⁇ m). As shown in these drawings, it is found that the PZT films of Examples 1 and 2 are excellent single crystal films, which completely coincides with the calculated reciprocal lattice point ( ⁇ point) of the PZT single crystal.
  • Example 1 the present invention 5 ⁇ m
  • Example 2 the present invention 10 ⁇ m
  • Example 3 the present invention 20 ⁇ m
  • a high frequency output of 13.56 MHz was applied to the sputtering target at a pulse frequency of 5 kHz (1 / Since a pulse with a 90% DUTY ratio was supplied at a cycle of 5 ms), a time during which no plasma was generated on the sputtering target was generated when the high-frequency output was in an off state, and as a result, the film thickness was thick with a short film formation A PZT film could be easily formed.
  • FIG. 25 (A) is a diagram showing strongly attractive hysteresis curves of Example 1 (present invention 5 ⁇ m), Example 2 (present invention 10 ⁇ m), and Example 3 (present invention 20 ⁇ m), and FIG. ) Shows the piezoelectric butterfly curves of Examples 1 to 3.
  • FIGS. 25A and 25B it was confirmed that ferroelectricity and piezoelectricity proportional to the thickness of the PZT film were obtained. Further, in the sample of Example 3 having a film thickness of 20 ⁇ m, a very large Vc of 87 V was obtained. Moreover, when the Curie temperature Tc of the PZT film
  • membrane of Example 3 was measured, it was Tc 390 degreeC.
  • FIG. 26A is a diagram showing a strong attractive hysteresis curve of Comparative Example 2 (K148), and FIG. 26B is a diagram showing a piezoelectric butterfly curve of Comparative Example 2 (K148).
  • FIG. 27A is a diagram showing a strongly attractive hysteresis curve of Comparative Example 3 (K129), and
  • FIG. 27B is a diagram showing a piezoelectric butterfly curve of Comparative Example 3 (K129).
  • Comparative Example 2 (K148) and Comparative Example 3 (K129) are bulk piezoelectric elements manufactured by Reed Techno Co., Ltd. (1-5 Yokoya, Oecho, Otsu City, Shiga Prefecture 520-2194, Ryukoku University REC202B).
  • the piezoelectric element has a disk shape with a diameter of 8 mm ⁇ thickness of about 0.5 mm (500 ⁇ m).
  • a piezoelectric element of Comparative Example 2 (K148) and Comparative Example 3 (K129) a hard PZT (K148) generally used and a soft PZT (K129) related to the displacement amount were compared.
  • the transition temperature (Tc), piezoelectric constant d33 (pC / N), and relative dielectric constant ⁇ r in the catalog values were as follows. Tc of K129: 145 ° C K129 d33: 720 ⁇ r of K129: 8100 K148 Tc: 280 ° C.
  • heat treatment such as reflow (generally around 280 ° C.), there was a common bulk problem that depolarization easily occurred and piezoelectricity was lost.
  • the coercive voltage Vc of the sample of the PZT single crystal film of Example 3 (the present invention 20 ⁇ m) is 87 V / 20 ⁇ m.
  • Tc is as high as 300 ° C. or higher, there is no fear of depolarization at all even when potential application such as reflow temperature or static electricity during processing occurs.
  • the laminated body by PZT bulk is formed by laminating the bulks of Comparative Examples 2 and 3 having a thickness of about 20 ⁇ m per layer, and the coercive voltage Vc per layer is at most about 25V.
  • the transition temperature Tc is often 200 ° C. or less.
  • Example 3 is pure PZT, if an additive element or the like is examined, the possibility of obtaining a value 5 to 10 times is very high.
  • FIG. 38B is an enlarged image of FIG. According to FIG. 38, it can be seen that there is no columnar structure of a normal polycrystalline PZT film, and it is a very good single crystal. However, only a part of the region that seems to be another orientation region was observed, but when considered as a layer of a normal PZT laminated bulk body, it is clear that it retains overwhelming piezoelectricity and is approximately 20 ⁇ m thick.
  • Residual polarization value (Pr) about 40 ⁇ C / cm 2
  • Coercive voltage (Vc) 44V
  • Coercive electric field (Ec) 44 kV / cm
  • the dielectric constant ( ⁇ r), remanent polarization value (Pr), coercive voltage (Vc), and coercive electric field (Ec) are as follows. It is as follows.
  • Tc Curie temperature
  • FIG. 29 is a diagram showing the results of measuring the temperature change of the relative permittivity and dielectric loss (tan ⁇ ) of the sample of Example 2 (the present invention 10 ⁇ m) while changing the frequency to 100 k, 500 k, and 1 MHz.
  • Example 4 is a cross-sectional view showing a sample of Example 4.
  • FIG. 3 The method for producing the sample of Example 4 is as follows.
  • a ZrO 2 film 202 is formed on the Si substrate 201 by vapor deposition, and a Pt film 203 is formed on the ZrO 2 film 202 by epitaxial growth by sputtering.
  • an SrRuO 3 film (SRO film) 204 is formed on the Pt film 203 under the sputtering conditions shown in Table 2 using the sputtering apparatus shown in FIG.
  • a PZT film 205 having a thickness of 1 ⁇ m is formed on the SRO film 204 under the sputtering conditions of Example 1 (5 ⁇ m of the present invention) shown in Table 1.
  • the film formation time of Example 1 (the present invention 5 ⁇ m) shown in Table 1 is set to 720 s.
  • an SrRuO 3 film (SRO film) 206 is formed on the PZT film 205.
  • the film formation conditions at this time are the same as the film formation conditions for the SRO film 204 described above.
  • a Pt film 207, an SRO film 208, and a PZT film 209 having a thickness of 1 ⁇ m are sequentially formed on the SRO film 206.
  • the film formation conditions for the Pt film 207 are the same as the film formation conditions for the Pt film 203
  • the film formation conditions for the SRO film 208 are the same as the film formation conditions for the SRO film 204
  • the film forming conditions are the same as those for the PZT film 205 described above.
  • FIGS. 31 and 32 are XRD patterns of the sample of Example 4.
  • the half value of the Pt (400) peak is higher in the case of the intermediate Pt electrode than in the first layer Pt electrode. Although the width was slightly wide and slightly broad, it was found that the intermediate Pt electrode was also epitaxially grown.
  • the second layer PZT has a PZT (004) peak in comparison with the first layer PZT. Although the half width was slightly wide and slightly broad, it was found that the epitaxial growth was performed including the intermediate Pt electrode.
  • Example 33 is an image obtained by observing a cross section of the sample of Example 5 using FIB.
  • the sample of Example 5 is the same as the cross-sectional structure shown in FIG.
  • the manufacturing method of Example 5 is as follows. A ZrO 2 film is formed on the Si substrate by vapor deposition, and a Pt film is formed on the ZrO 2 film by epitaxial growth by sputtering. Next, using the sputtering apparatus shown in FIG. 1, a PZT film having a thickness of 1 ⁇ m is formed on the Pt film under the sputtering conditions of Example 1 (5 ⁇ m of the present invention) shown in Table 1.
  • Example 1 the film formation time of Example 1 (the present invention 5 ⁇ m) shown in Table 1 is set to 720 s.
  • a Pt film and a PZT film having a thickness of 1 ⁇ m are sequentially formed on the PZT film.
  • the film formation conditions for the Pt film are the same as the film formation conditions for the Pt film
  • the film formation conditions for the PZT film are the same as the film formation conditions for the PZT film.
  • a sample of Example 5 similar to the cross-sectional structure shown in FIG. 12C can be manufactured.
  • FIG. 46 is a cross-sectional view for explaining the method for manufacturing the piezoelectric film of the sixth embodiment. As shown in FIG. 46, a ZrO 2 film 1102 having a film thickness of 15 nm was formed on the Si substrate 1101 by vapor deposition.
  • the curvature radius of the Si substrate 1101 having the ZrO 2 film 1102 was measured by a simple stress measurement method using XRD shown in FIG. Specifically, the curvature radius was obtained by measuring the rocking curve while scanning the Si substrate 1101 having the ZrO 2 film 1102 while ⁇ scanning, and the warpage of the Si substrate was evaluated. The degree of curvature of the single crystal substrate was evaluated as the radius of curvature from the amount of shift of the rocking curve peak position with respect to the amount of movement ( ⁇ X) of the sample (substrate of Example 6) using an XY stage. The result was 66.3 °.
  • a Pt film 1103 having a thickness of 100 nm was formed by epitaxial growth on the ZrO 2 film 1102 and an SrRuO 3 film 1104 having a thickness of 20 nm was formed on the Pt film 1103 by sputtering. Then, it formed using the sputtering apparatus shown in FIG. 1 the PZT film 1105 having a thickness of 4 ⁇ m onto a SrRuO 3 film 1104. Thereafter, the radius of curvature of the Si substrate 1101 having the PZT film 1105 was measured by a simple stress measurement method using XRD shown in FIG. The result was 44.1 °.
  • FIG. 47 is a cross-sectional view for explaining the method of manufacturing the piezoelectric film of Comparative Example 4. As shown in FIG. 47, a YSZ film 1106 having a thickness of 15 nm was formed on a Si substrate 1101 by an evaporation method.
  • the radius of curvature of the Si substrate 1101 having the YSZ film 1106 was measured by a simple stress measurement method using XRD shown in FIG. The result was 83.5 °.
  • the YSZ film 1106 is a film obtained by oxidizing an alloy obtained by adding 8% Y to Zr.
  • a 100-nm-thick Pt film 1103 was formed by epitaxial growth on the YSZ film 1106, and a 20-nm-thick SrRuO 3 film 1104 was formed on the Pt film 1103 by sputtering.
  • a PZT film 1105 having a thickness of 5 ⁇ m was formed on the SrRuO 3 film 1104 using the sputtering apparatus shown in FIG.
  • the radius of curvature of the Si substrate 1101 having the PZT film 1105 was measured by a simple stress measurement method using XRD shown in FIG. The result was 43.9 °.
  • FIG. 49 is an optical micrograph of the surface of the PZT film 1105 of Comparative Example 4 shown in FIG. From this photograph, it can be seen that the entire PZT film has cracks of several microns square. This crack was generated about 2 hours after the PZT film 1105 of Comparative Example 4 was formed. As described above, it was confirmed that the PZT film of the comparative example cannot be formed with a film thickness of 5 ⁇ m or more.

Abstract

The present invention addresses the problem of providing a film-like piezoelectric film having a film thickness of 5 µm or more. One embodiment of the present invention is a piezoelectric film that is a (PbaLab)(ZrcTidNbe)O3-δ film having a film thickness of 5 µm or more and in which a, b, c, d, e, and δ satisfy formulas 1 and 11-16 indicated below. The (PbaLab)(ZrcTidNbe)O3-δ film has a dielectric constant of 100-600 per µm of film thickness, and said piezoelectric film has least one of a coercive voltage of 3-15 V per µm of film thickness and a remanence value of 20-50 µC/cm2. Formula 1: 0 ≤ δ ≤ 1. Formula 11: 1.00 ≤ a + b ≤ 1.35. Formula 12: 0 ≤ b ≤ 0.8. Formula 13: 1.00 ≤ c + d + e ≤ 1.1. Formula 14: 0.4 ≤ c ≤ 0.7. Formula 15: 0.3 ≤ d ≤ 0.6. Formula 16: 0 ≤ e ≤ 0.1.

Description

圧電体膜及びその製造方法、バイモルフ素子、圧電体素子及びその製造方法Piezoelectric film and manufacturing method thereof, bimorph element, piezoelectric element and manufacturing method thereof
　本発明は、圧電体膜及びその製造方法、バイモルフ素子、圧電体素子及びその製造方法に関する。 The present invention relates to a piezoelectric film and a manufacturing method thereof, a bimorph element, a piezoelectric element and a manufacturing method thereof.
　従来のＰｂ（Ｚｒ，Ｔｉ）Ｏ３（以下、「ＰＺＴ」という。）のバルク状圧電体の製造方法について説明する。
　多結晶ＰＺＴ粉末を焼成し、この多結晶ＰＺＴ粉末を樹脂と混合し、その混合物をシート状にしたＰＺＴシートを形成する。このＰＺＴシートを積層し、焼き固めることで、バルク状圧電体を作製することができる。焼き固めた後の１層のＰＺＴシートの厚さは２０μｍ以上である（例えば特許文献１参照）。
　上記のようにバルク状圧電体が厚さ２０μｍ以上のＰＺＴシートを積層させるのは、２０μｍ未満の厚さにすると圧電特性が得られないことがあるからである。また、多結晶ＰＺＴ粉末の結晶粒径が大きいため、１０μｍ以下の厚さのＰＺＴシートに加工することもできない。また、バルク状圧電体のＰＺＴはキュリー温度が２００℃と低いため、高温になると圧電特性が壊れやすい。従って、加熱できる温度に制限があるため、バルク状圧電体を精密に加工するのが難しいという欠点がある。
　従来のＰＺＴの膜状圧電体は、基板上に２μｍ以下の厚さのＰＺＴ膜をスパッタリング法により成膜することで製造する（例えば特許文献２参照）。膜状圧電体が２μｍ以下の厚さであるのは成膜速度が遅いからである。具体的には、厚さ１μｍのＰＺＴ膜をスパッタリング法により成膜するには２時間以上の時間がかかるため、２μｍのＰＺＴ膜を成膜するには４時間以上の時間を要することになる。従って、バルク状圧電体のような厚膜の膜状圧電体をＰＺＴ膜で作製することはコストが高くなるため、産業上利用するにあたり現実的ではなかった。
　また、成膜時間を長時間かけてスパッタリング法により厚さ５μｍ以上のＰＺＴ膜を基板上に成膜すると、そのＰＺＴ膜が厚いために２μｍ以下の薄いＰＺＴ膜に比べて大きな歪（応力）が発生する。その歪によってＰＺＴ膜が割れたり、基板からＰＺＴ膜が剥がれることがある。従って、５μｍ以上の膜厚の膜状圧電体を作製することが困難である。
　また、スパッタリング法によるＰＺＴ膜の成膜を厚さ５μｍ以上まで続けると、スパッタリング装置の入力電圧ＶＤＣが下がってしまい、一定の組成のＰＺＴ膜を作製することが困難である。その理由は、成膜時間が長くなるとスパッタリング装置のＰＺＴターゲットの表面が金属化して抵抗値が下がるからであり、ＰＺＴターゲットの表面組成がＰＺＴではなくなるからである。従って、５μｍ以上の膜厚の膜状圧電体を作製することは困難である。
　上記の事情によりバルク状圧電体と膜状圧電体では厚さが大きく異なるため、バルク状圧電体によって作製される製品と膜状圧電体によって作製される製品は用途によって分けられていた。 A method for producing a conventional bulk piezoelectric body of Pb (Zr, Ti) O 3 (hereinafter referred to as “PZT”) will be described.
The polycrystalline PZT powder is fired, and this polycrystalline PZT powder is mixed with a resin to form a PZT sheet in which the mixture is formed into a sheet. By stacking and baking this PZT sheet, a bulk piezoelectric body can be manufactured. The thickness of the single layer PZT sheet after baking is 20 μm or more (see, for example, Patent Document 1).
The reason why the PZT sheets having a bulk piezoelectric body of 20 μm or more are laminated as described above is that when the thickness is less than 20 μm, piezoelectric characteristics may not be obtained. Further, since the polycrystalline PZT powder has a large crystal grain size, it cannot be processed into a PZT sheet having a thickness of 10 μm or less. In addition, since the PZT of the bulk piezoelectric body has a low Curie temperature of 200 ° C., the piezoelectric characteristics are easily broken at high temperatures. Therefore, there is a drawback that it is difficult to precisely process the bulk piezoelectric body because there is a limit to the temperature at which it can be heated.
A conventional PZT film-like piezoelectric body is manufactured by forming a PZT film having a thickness of 2 μm or less on a substrate by sputtering (see, for example, Patent Document 2). The film-like piezoelectric body has a thickness of 2 μm or less because the film forming speed is low. Specifically, since it takes 2 hours or more to form a PZT film having a thickness of 1 μm by sputtering, it takes 4 hours or more to form a 2 μm PZT film. Therefore, manufacturing a thick film-like piezoelectric material such as a bulk piezoelectric material with a PZT film increases the cost, and is not practical for industrial use.
Further, when a PZT film having a thickness of 5 μm or more is formed on a substrate by sputtering for a long time, a large strain (stress) is generated compared to a thin PZT film having a thickness of 2 μm or less because the PZT film is thick. appear. The strain may break the PZT film or peel the PZT film from the substrate. Therefore, it is difficult to produce a film-like piezoelectric body having a thickness of 5 μm or more.
Further, if the PZT film is formed by sputtering to a thickness of 5 μm or more, the input voltage VDC of the sputtering apparatus is lowered, and it is difficult to produce a PZT film having a constant composition. The reason is that as the film formation time becomes longer, the surface of the PZT target of the sputtering apparatus becomes metallized and the resistance value decreases, and the surface composition of the PZT target is not PZT. Therefore, it is difficult to produce a film-like piezoelectric body having a film thickness of 5 μm or more.
Due to the above circumstances, the bulk piezoelectric film and the film piezoelectric body have different thicknesses. Therefore, the product manufactured by the bulk piezoelectric body and the product manufactured by the film piezoelectric body are separated depending on the application.
特開２０１３−５１８４２０号公報JP2013-518420A
　本発明の一態様は、膜厚が５μｍ以上の膜状の圧電体膜またはその製造方法を提供することを課題とする。
　また、本発明の一態様は、膜厚が５μｍ以上の膜状の圧電体膜を有する圧電体素子またはその製造方法を提供することを課題とする。
　また、本発明の一態様は、膜状の圧電体膜を積層した圧電体素子またはその製造方法を提供することを課題とする。
　また、本発明の一態様は、膜厚が５μｍ以上の膜状の圧電体膜を有するバイモルフ素子を提供することを課題とする。 An object of one embodiment of the present invention is to provide a film-like piezoelectric film having a thickness of 5 μm or more or a method for manufacturing the film.
Another object of one embodiment of the present invention is to provide a piezoelectric element having a film-like piezoelectric film having a thickness of 5 μm or more, or a method for manufacturing the same.
Another object of one embodiment of the present invention is to provide a piezoelectric element in which film-shaped piezoelectric films are stacked or a method for manufacturing the piezoelectric element.
Another object of one embodiment of the present invention is to provide a bimorph element having a film-like piezoelectric film having a thickness of 5 μm or more.
　以下に、本発明の種々の態様について説明する。
［１］膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜であり、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体膜。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［２］上記［１］において、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は電極上に形成されており、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記電極のＸＲＤのピーク値より高いことを特徴とする圧電体膜。
［３］上記［２］において、
　前記電極はＰｔ膜からなることを特徴とする圧電体膜。
［４］上記［１］乃至［３］のいずれか一項において、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のキュリー温度は２５０℃以上４２０℃以下であることを特徴とする圧電体膜。
［５］シムの上面に配置された第１の電極と、
　前記第１の電極上に配置された上記［１］に記載の圧電体膜と、
　前記圧電体膜上に配置された第２の電極と、
　前記シムの下面に配置された第３の電極と、
　前記第３の電極下に配置された上記［１］に記載の圧電体膜と、
　前記圧電体膜下に配置された第４の電極と、
を具備することを特徴とするバイモルフ素子。
［６］基板上にスパッタリング法により膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する工程を有し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する際の成膜速度は１ｎｍ／ｓｅｃ以上２．５ｎｍ／ｓｅｃ以下であることを特徴とする圧電体膜の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［７］上記［６］において、
　前記工程は、スパッタリングターゲットに１０ｋＨｚ以上３０ＭＨｚ以下の高周波出力を、１／２０ｍｓ以上１／３ｍｓ以下の周期で２５％以上９０％以下のＤＵＴＹ比のパルス状に供給することで、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する工程であり、
　前記ＤＵＴＹ比は、１周期の間で前記スパッタリングターゲットに前記高周波出力が印加される期間の比率であることを特徴とする圧電体膜の製造方法。
［８］上記［７］において、
　前記スパッタリングターゲットに前記高周波出力を供給する際に２０ｒｐｍ以上１２０ｒｐｍ以下の速度で磁石を回転させることで前記スパッタリングターゲットに磁場を加えることを特徴とする圧電体膜の製造方法。
［９］上記［７］または［８］において、
　前記スパッタリングターゲットに前記高周波出力を供給している際に前記スパッタリングターゲットに発生する直流成分である電圧ＶＤＣを−２００Ｖ以上−８０Ｖ以下に制御することを特徴とする圧電体膜の製造方法。
［１０］上記［７］乃至［９］のいずれか一項において、
　前記スパッタリングターゲットに前記高周波出力を供給している際の前記スパッタリングターゲットの表面の比抵抗を１×１０９Ω・ｃｍ以上１×１０１２Ω・ｃｍ以下に制御することを特徴とする圧電体膜の製造方法。
［１１］上記［７］乃至［１０］のいずれか一項において、
　前記スパッタリングターゲットに前記高周波出力を供給する際の前記スパッタリングターゲットは、下記式６の比のＯ２ガス及びＡｒガスの雰囲気に置かれることを特徴とする圧電体膜の製造方法。
　０．１≦Ｏ２ガス／Ａｒガス≦０．３　・・・式６
［１２］上記［７］乃至［１１］のいずれか一項において、
　前記スパッタリングターゲットに前記高周波出力を供給する際の前記スパッタリングターゲットは、０．１Ｐａ以上２Ｐａ以下の圧力雰囲気に置かれることを特徴とする圧電体膜の製造方法。
［１３］上記［６］乃至［１２］のいずれか一項において、
　前記工程で成膜された前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記工程で成膜された前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体膜の製造方法。
［１４］上記［６］乃至［１３］のいずれか一項において、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、前記基板の上面に対して垂直で上方向であることを特徴とする圧電体膜の製造方法。
［１５］膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第１の電極と、
　前記第１の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜に貼り付けられた第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された膜厚が５μｍ以上の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上形成された第２の電極と、
　前記第２の電極及び前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜に貼り付けられた第３の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第３の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［１６］上記［１５］において、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第１の電極のＸＲＤのピーク値より高く、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第２の電極のＸＲＤのピーク値より高いことを特徴とする圧電体素子。
［１７］上記［１５］または［１６］において、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれはスパッタリング法により形成された膜であり、
　前記第１及び第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれはゾルゲル法により形成された膜であることを特徴とする圧電体素子。
［１８］第１の電極と、
　前記第１の電極上に形成された膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
　前記第２の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の上に形成された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［１９］第１の電極と、
　前記第１の電極上に形成された膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
　前記第２の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の上に形成された第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記第１乃至第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記第１乃至第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［２０］上記［１９］において、
　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第３の電極の上に形成された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第４の電極と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［２１］第１の電極と、
　前記第１の電極上に形成された第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
　前記第２の電極上に形成された第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
を具備し、
　前記第１の電極の第１の側面と前記第３の電極の第１の側面が第６の電極によって電気的に接続され、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［２２］上記［２１］において、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向の逆方向であることを特徴とする圧電体素子。
［２３］上記［２１］または［２２］において、
　前記第３の電極上に形成された第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第４の電極と、
を具備し、
　前記第２の電極の第２の側面と前記第４の電極の第２の側面が第７の電極によって電気的に接続され、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。
［２４］上記［２３］において、
　前記第４の電極上に形成された第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第５の電極と、
を具備し、
　前記第５の電極の第１の側面と前記第３の電極の第１の側面と前記第１の電極の第１の側面が前記第６の電極によって電気的に接続され、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。
［２５］上記［２１］乃至［２４］において、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第１の電極のＸＲＤのピーク値より高く、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第２の電極のＸＲＤのピーク値より高いことを特徴とする圧電体素子。
［２６］基板上に電極膜を形成し、前記電極膜上にスパッタリング法により（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程（ｂ）と、
　前記基板を前記電極膜から除去する工程（ｃ）と、
　前記電極膜をエッチング加工することで、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第１の電極、第２の電極及び第３の電極を形成する工程（ｄ）と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［２７］上記［２６］において、
　前記工程（ｄ）の後に、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を切断することで、前記第１の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第１の積層部と、前記第２の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第２の積層部と、前記第３の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第３の積層部を形成する工程と、
　前記第１の積層部の前記第１の電極と前記第２の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜とを重ね、かつ前記第２の積層部の前記第２の電極と前記第３の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜とを重ねる工程と、
　前記第１の積層部の前記第１の電極と前記第３の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜との間に荷重をかけつつ熱処理を施すことで、前記第１の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第１の電極それぞれと前記第２の積層部の前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付けるとともに、前記第２の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第２の電極それぞれと前記第３の積層部の前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
を具備することを特徴とする圧電体素子の製造方法。
［２８］上記［２６］または［２７］において、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚は５μｍ以上であることを特徴とする圧電体素子の製造方法。
［２９］第１の基板上に第１の電極膜を形成し、前記第１の電極膜上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極膜を形成し、前記第２の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第１の電極及び第２の電極を形成する工程（ｂ）と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第１及び第２の電極の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程（ｃ）と、
　第２の基板上に第３の電極膜を形成し、前記第３の電極膜上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程（ｅ）と、
　前記第１の基板及び前記第２の基板を除去する工程（ｆ）と、
　前記第１の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第３の電極及び第４の電極を形成する工程（ｇ）と、
　前記第３の電極膜をエッチング加工することで、前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極及び第６の電極を形成する工程（ｈ）と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［３０］第１の基板上に第１の電極膜を形成し、前記第１の電極膜上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極膜を形成し、前記第２の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第１の電極及び第２の電極を形成する工程（ｂ）と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第１及び第２の電極の上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｃ）と、
　第２の基板上に第３の電極膜を形成し、前記第３の電極膜上にスパッタリング法により第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程（ｅ）と、
　前記第２の基板を除去する工程（ｆ）と、
　前記第３の電極膜をエッチング加工することで、前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第３の電極及び第４の電極を形成する工程（ｇ）と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［３１］上記［３０］において、
　前記工程（ｇ）の後に、前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第３及び第４の電極の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程と、
　第３の基板上に第４の電極膜を形成し、前記第４の電極膜上にスパッタリング法により第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極膜を形成し、前記第５の電極膜をエッチング加工することで、前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極及び第６の電極を形成する工程と、
　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第５及び第６の電極の上にスパッタリング法により第５の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
　第４の基板上に第６の電極膜を形成し、前記第６の電極膜上にスパッタリング法により第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
　前記第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第５の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
　前記第４の基板及び前記第６の電極膜を除去する工程と、
　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
［３２］上記［３１］において、
　前記第３の基板を除去し、前記第４の電極膜をエッチング加工することで、前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第７の電極及び第８の電極を形成する工程と、
を具備することを特徴とする圧電体素子の製造方法。
［３３］基板上に第１の電極を形成する工程（ａ）と、
　前記第１の電極上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｂ）と、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極を形成する工程（ｃ）と、
　前記第２の電極上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第３の電極を形成する工程（ｅ）と、
　前記基板を前記第１の電極から除去する工程（ｆ）と、
　前記第１の電極の第１の側面と前記第３の電極の第１の側面を第６の電極によって接続する工程（ｇ）と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［３４］上記［３３］において、
　前記工程（ｅ）と前記工程（ｆ）との間に、
　前記第３の電極上にスパッタリング法により第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｈ）と、
　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第４の電極を形成する工程（ｉ）と、を有し、
　前記工程（ｆ）の後に、前記第２の電極の第２の側面と前記第４の電極の第２の側面を第７の電極によって接続する工程を有し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
［３５］上記［３４］において、
　前記工程（ｉ）と前記工程（ｆ）との間に、
　前記第４の電極上にスパッタリング法により第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極を形成する工程と、を有し、
　前記工程（ｇ）は、前記第１の電極の第１の側面と前記第３の電極の第１の側面と前記第５の電極の第１の側面を第６の電極によって接続する工程であり、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
［３６］上記［２９］乃至［３５］のいずれか一項において、
　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚は５μｍ以上であることを特徴とする圧電体素子の製造方法。
［３７］基板上にＺｒＯ２膜を形成する工程（ａ）と、
　前記ＺｒＯ２膜上にエピタキシャル成長によるＰｔ膜を形成する工程（ｂ）と、
　前記Ｐｔ膜上にスパッタリング法により膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｃ）と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体膜の製造方法。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［３８］上記［３７］において、
　前記工程（ｂ）と前記工程（ｃ）との間に、前記Ｐｔ膜上にＳｒＲｕＯ３膜を形成する工程を含むことを特徴とする圧電体膜の製造方法。
［３９］上記［３７］または［３８］において、
　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、前記基板の上面に対して垂直で上方向であることを特徴とする圧電体膜の製造方法。
［４０］ＺｒＯ２膜と、
　前記ＺｒＯ２膜上に形成されたエピタキシャル成長によるＰｔ膜と、
　前記Ｐｔ膜上に形成された膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
を具備し、
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体膜。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
［４１］上記［４０］において、
　前記Ｐｔ膜と前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜との間に形成されたＳｒＲｕＯ３膜を含むことを特徴とする圧電体膜。
　なお、上記の本発明の種々の態様において、特定のＢ（以下「Ｂ」という）の上（または下）に特定のＣ（以下「Ｃ」という）を形成する（Ｃが形成される）というとき、Ｂの上（または下）に直接Ｃを形成する（Ｃが形成される）場合に限定されず、Ｂの上（または下）に本発明の一態様の作用効果を阻害しない範囲で、他のものを介してＣを形成する（Ｃが形成される）場合も含むものとする。 Hereinafter, various aspects of the present invention will be described.
[1] Film thickness of 5 μm or more (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a relative dielectric constant per 1 μm thickness of 100 to 600,
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm 2 50 μC / cm 2 A piezoelectric film having at least one of the following remanent polarization values:
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[2] In the above [1],
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The membrane is formed on the electrode,
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The piezoelectric film, wherein the XRD peak value of the film is higher than the XRD peak value of the electrode.
[3] In the above [2],
The piezoelectric film is characterized in that the electrode is made of a Pt film.
[4] In any one of [1] to [3] above,
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A piezoelectric film having a Curie temperature of 250 to 420 ° C.
[5] a first electrode disposed on the upper surface of the shim;
The piezoelectric film according to the above [1] disposed on the first electrode;
A second electrode disposed on the piezoelectric film;
A third electrode disposed on the lower surface of the shim;
The piezoelectric film according to the above [1], which is disposed under the third electrode;
A fourth electrode disposed under the piezoelectric film;
The bimorph element characterized by comprising.
[6] A film thickness of 5 μm or more (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Having a step of forming a film,
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A method of manufacturing a piezoelectric film, wherein a film formation rate when forming a film is 1 nm / sec or more and 2.5 nm / sec or less.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[7] In the above [6],
In the step, a high frequency output of 10 kHz to 30 MHz is supplied to the sputtering target in a pulse form having a duty ratio of 25% to 90% with a period of 1/20 ms to 1/3 ms. a La b ) (Zr c Ti d Nb e ) O 3-δ A step of forming a film,
The method of manufacturing a piezoelectric film, wherein the DUTY ratio is a ratio of a period during which the high-frequency output is applied to the sputtering target during one period.
[8] In the above [7],
A method of manufacturing a piezoelectric film, wherein a magnetic field is applied to the sputtering target by rotating a magnet at a speed of 20 rpm to 120 rpm when supplying the high-frequency output to the sputtering target.
[9] In the above [7] or [8],
A voltage V that is a direct current component generated in the sputtering target when the high-frequency output is supplied to the sputtering target. DC Is controlled to -200V or more and -80V or less.
[10] In any one of the above [7] to [9],
The specific resistance of the surface of the sputtering target when the high-frequency output is supplied to the sputtering target is 1 × 10 9 Ω · cm or more 1 × 10 12 A method of manufacturing a piezoelectric film, characterized by being controlled to Ω · cm or less.
[11] In any one of [7] to [10] above,
The sputtering target when supplying the high-frequency output to the sputtering target is O in the ratio of the following formula 6. 2 A method for producing a piezoelectric film, characterized by being placed in an atmosphere of gas and Ar gas.
0.1 ≦ O 2 Gas / Ar gas ≦ 0.3 Equation 6
[12] In any one of [7] to [11] above,
The method for manufacturing a piezoelectric film, wherein the sputtering target when supplying the high-frequency output to the sputtering target is placed in a pressure atmosphere of 0.1 Pa or more and 2 Pa or less.
[13] In any one of [6] to [12] above,
The (Pb) film formed in the step a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a relative dielectric constant per 1 μm thickness of 100 to 600,
The (Pb) film formed in the step a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm 2 50 μC / cm 2 A method for producing a piezoelectric film, comprising at least one of the following remanent polarization values:
[14] In any one of the above [6] to [13],
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The method of manufacturing a piezoelectric film, wherein the polarization direction of the film is perpendicular to the upper surface of the substrate and is upward.
[15] First (Pb) having a thickness of 5 μm or more a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode formed on the membrane;
The first electrode and the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For the second bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
For the second bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second (Pb) film having a thickness of 5 μm or more formed on the film. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode formed on the film;
The second electrode and the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For the third adhesion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
For third bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The third (Pb formed on the film a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third electrode formed on the film;
Comprising
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each of the films has a relative dielectric constant per 1 μm thickness of 100 to 600,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm. 2 50 μC / cm 2 A piezoelectric element having at least one of the following remanent polarization values:
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[16] In the above [15],
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The XRD peak value of the film is higher than the XRD peak value of the first electrode,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The piezoelectric element, wherein the XRD peak value of the film is higher than the XRD peak value of the second electrode.
[17] In the above [15] or [16],
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each film is a film formed by sputtering,
For the first and second bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each of the films is a film formed by a sol-gel method.
[18] a first electrode;
The first (Pb) film having a thickness of 5 μm or more formed on the first electrode. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode formed on the membrane;
The second electrode and the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For bonding (Pb formed on the film) a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
For bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The second (Pb) having a thickness of 5 μm or more pasted on the film a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third electrode formed on the film;
Comprising
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each of the films has a relative dielectric constant per 1 μm thickness of 100 to 600,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm. 2 50 μC / cm 2 A piezoelectric element having at least one of the following remanent polarization values:
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[19] a first electrode;
The first (Pb) film having a thickness of 5 μm or more formed on the first electrode. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode formed on the membrane;
The second electrode and the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The second (Pb formed on the film a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third (Pb) film having a thickness of 5 μm or more pasted on the film. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third electrode formed on the film;
Comprising
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
The first to third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each of the films has a relative dielectric constant per 1 μm thickness of 100 to 600,
The first to third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm. 2 50 μC / cm 2 A piezoelectric element having at least one of the following remanent polarization values:
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[20] In the above [19],
Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For bonding (Pb) formed on the film and the third electrode a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
For bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A fourth (Pb) film having a thickness of 5 μm or more pasted on the film. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A fourth electrode formed on the membrane;
Comprising
a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16;
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[21] a first electrode;
The first (Pb) formed on the first electrode a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode formed on the membrane;
A second (Pb) formed on the second electrode. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third electrode formed on the film;
Comprising
A first side surface of the first electrode and a first side surface of the third electrode are electrically connected by a sixth electrode;
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each of the films has a relative dielectric constant per 1 μm thickness of 100 to 600,
The first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Each film has a coercive voltage per 1 μm thickness of 3 V or more and 15 V or less and 20 μC / cm. 2 50 μC / cm 2 A piezoelectric element having at least one of the following remanent polarization values:
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[22] In the above [21],
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film is the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A piezoelectric element having a direction opposite to a polarization direction of a film.
[23] In the above [21] or [22],
A third (Pb) formed on the third electrode. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A fourth electrode formed on the membrane;
Comprising
A second side surface of the second electrode and a second side surface of the fourth electrode are electrically connected by a seventh electrode;
a, b, c, d, e, and δ satisfy the above-mentioned formula 1 and formulas 11 to 16;
[24] In the above [23],
A fourth (Pb) formed on the fourth electrode. a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A fifth electrode formed on the film;
Comprising
A first side surface of the fifth electrode, a first side surface of the third electrode, and a first side surface of the first electrode are electrically connected by the sixth electrode;
a, b, c, d, e, and δ satisfy the above-mentioned formula 1 and formulas 11 to 16;
[25] In the above [21] to [24],
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The XRD peak value of the film is higher than the XRD peak value of the first electrode,
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The piezoelectric element, wherein the XRD peak value of the film is higher than the XRD peak value of the second electrode.
[26] An electrode film is formed on the substrate, and a sputtering method (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (a);
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For adhesion on membrane (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A step (b) of forming a film by a sol-gel method;
Removing the substrate from the electrode film (c);
By etching the electrode film, the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a first electrode, a second electrode, and a third electrode under the film (d);
Comprising
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[27] In the above [26],
After the step (d), the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ By cutting the film, the first electrode, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first laminated portion in which films are laminated, the second electrode, and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second laminated portion in which films are laminated, the third electrode, and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a third laminated portion in which films are laminated;
For bonding (Pb) of the first electrode of the first laminated portion and the second laminated portion a La b ) (Zr c Ti d Nb e ) O 3-δ And the second electrode of the second stacked portion and the adhesive layer (Pb) of the third stacked portion. a La b ) (Zr c Ti d Nb e ) O 3-δ A process of layering the film,
For bonding (Pb) of the first electrode of the first laminated part and the third laminated part a La b ) (Zr c Ti d Nb e ) O 3-δ By applying a heat treatment between the film and the film, the first laminated portion for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ (Pb) of each of the film, the first electrode, and the second stacked portion a La b ) (Zr c Ti d Nb e ) O 3-δ Affixing the film and bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ (Pb) of each of the film and the second electrode and the third stacked portion a La b ) (Zr c Ti d Nb e ) O 3-δ A step of applying a film;
A method for manufacturing a piezoelectric element, comprising:
[28] In the above [26] or [27],
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A method of manufacturing a piezoelectric element, wherein the film thickness is 5 μm or more.
[29] A first electrode film is formed on a first substrate, and a first (Pb) film is formed on the first electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (a);
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode film is formed on the film, and the second electrode film is etched to obtain the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a first electrode and a second electrode on the film (b);
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane for adhesion (Pb on the first and second electrodes) a La b ) (Zr c Ti d Nb e ) O 3-δ A step (c) of forming a film by a sol-gel method;
A third electrode film is formed on the second substrate, and a second (Pb) film is formed on the third electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (d);
For bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane and said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A step (e) of attaching a film;
Removing the first substrate and the second substrate (f);
Etching the first electrode film allows the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a third electrode and a fourth electrode under the film (g);
By etching the third electrode film, the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a fifth electrode and a sixth electrode on the film (h);
Comprising
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[30] A first electrode film is formed on a first substrate, and a first (Pb) film is formed on the first electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (a);
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second electrode film is formed on the film, and the second electrode film is etched to obtain the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a first electrode and a second electrode on the film (b);
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second (Pb) film is formed on the first and second electrodes by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (c);
A third electrode film is formed on the second substrate, and a third (Pb) film is formed on the third electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (d);
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane and said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A step (e) of attaching a film;
Removing the second substrate (f);
By etching the third electrode film, the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a third electrode and a fourth electrode under the film (g);
Comprising
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[31] In the above [30],
After the step (g), the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane for adhesion (Pb on the third and fourth electrodes) a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film by a sol-gel method;
A fourth electrode film is formed on the third substrate, and a fourth (Pb) film is formed on the fourth electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film;
The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ By forming a fifth electrode film on the film and etching the fifth electrode film, the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a fifth electrode and a sixth electrode on the film;
The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A fifth (Pb) film is formed on the fifth and sixth electrodes by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film;
A sixth electrode film is formed on the fourth substrate, and a sixth (Pb) film is formed on the sixth electrode film by a sputtering method. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film;
The sixth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane and said fifth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A step of applying a film;
Removing the fourth substrate and the sixth electrode film;
For bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane and the sixth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A step of applying a film;
Comprising
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
[32] In the above [31],
By removing the third substrate and etching the fourth electrode film, the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a seventh electrode and an eighth electrode under the film;
A method for manufacturing a piezoelectric element, comprising:
[33] A step (a) of forming a first electrode on a substrate;
On the first electrode, a first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (b);
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a second electrode on the film (c);
A second (Pb) is formed on the second electrode by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (d);
Said second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a third electrode on the film (e);
Removing the substrate from the first electrode (f);
Connecting the first side surface of the first electrode and the first side surface of the third electrode by a sixth electrode;
Comprising
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[34] In the above [33],
Between the step (e) and the step (f),
A third (Pb) is formed on the third electrode by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (h);
Said third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a fourth electrode on the film, (i),
After the step (f), a step of connecting the second side surface of the second electrode and the second side surface of the fourth electrode by a seventh electrode,
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
[35] In the above [34],
Between the step (i) and the step (f),
A fourth (Pb) layer is formed on the fourth electrode by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film;
The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a fifth electrode on the film,
The step (g) is a step of connecting the first side surface of the first electrode, the first side surface of the third electrode, and the first side surface of the fifth electrode by a sixth electrode. ,
A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
[36] In any one of the above [29] to [35],
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A method of manufacturing a piezoelectric element, wherein the film thickness is 5 μm or more.
[37] ZrO on substrate 2 Forming a film (a);
ZrO 2 A step (b) of forming a Pt film by epitaxial growth on the film;
A film thickness of 5 μm or more (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Forming a film (c);
Comprising
A method for producing a piezoelectric film, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[38] In the above [37],
Between the step (b) and the step (c), SrRuO is formed on the Pt film. 3 A method of manufacturing a piezoelectric film comprising a step of forming a film.
[39] In the above [37] or [38],
(Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The method of manufacturing a piezoelectric film, wherein the polarization direction of the film is perpendicular to the upper surface of the substrate and is upward.
[40] ZrO 2 A membrane,
ZrO 2 An epitaxially grown Pt film formed on the film;
The film thickness formed on the Pt film is 5 μm or more (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A membrane,
Comprising
a, b, c, d, e, and δ satisfy the following formulas 1 and 11 to 16, respectively.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
[41] In the above [40],
The Pt film and the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ SrRuO formed between films 3 A piezoelectric film comprising a film.
In the various aspects of the present invention described above, a specific C (hereinafter referred to as “C”) is formed above (or below) a specific B (hereinafter referred to as “B”) (C is formed). When C is directly formed on (or below) B (C is formed), the present invention is not limited to above (or below) B as long as the effect of the embodiment of the present invention is not inhibited. The case where C is formed via another (C is formed) is also included.
　本発明の一態様よれば、膜厚が５μｍ以上の膜状の圧電体膜またはその製造方法を提供することができる。
　また、本発明の一態様によれば、膜厚が５μｍ以上の膜状の圧電体膜を有する圧電体素子またはその製造方法を提供することができる。
　また、本発明の一態様によれば、膜状の圧電体膜を積層した圧電体素子またはその製造方法を提供することがでる。
　また、本発明の一態様によれば、膜厚が５μｍ以上の膜状の圧電体膜を有するバイモルフ素子を提供することができる。 According to one embodiment of the present invention, a film-like piezoelectric film having a film thickness of 5 μm or more or a method for manufacturing the film can be provided.
In addition, according to one embodiment of the present invention, it is possible to provide a piezoelectric element having a film-like piezoelectric film having a film thickness of 5 μm or more, or a manufacturing method thereof.
In addition, according to one embodiment of the present invention, it is possible to provide a piezoelectric element in which film-like piezoelectric films are stacked or a method for manufacturing the same.
Further, according to one embodiment of the present invention, a bimorph element having a film-like piezoelectric film having a thickness of 5 μm or more can be provided.
　図１は本発明の一態様に係るスパッタリング装置を模式的に示す断面図である。
　図２は、１００Ｓ／Ｔ％のＤＵＴＹ比の場合を説明する図である。
　図３（Ａ）~（Ｄ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４（Ａ）は本発明の一態様に係る圧電体素子の製造方法を説明する平面図、図４（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明する断面図である。
　図５（Ａ），（Ｂ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図６（Ａ）は本発明の一態様に係る圧電体素子の製造方法を説明する平面図、図６（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明する断面図である。
　図７（Ａ）は本発明の一態様に係る圧電体素子の製造方法を説明する平面図、図７（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明する断面図である。
　図８（Ａ）~（Ｃ）は、発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図９（Ａ）~（Ｃ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１０（Ａ）~（Ｃ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１１（Ａ）~（Ｃ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１２（Ａ）~（Ｄ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１３（Ａ），（Ｂ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１４（Ａ），（Ｂ）は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１５（Ａ）~（Ｃ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図１６（Ａ）は実施例１のサンプルをＦＩＢ（Ｆｏｃｕｓｅｄ　Ｉｏｎ　Ｂｅａｍ）で断面観察した像、図１６（Ｂ）は実施例２のサンプルをＦＩＢで断面観察した像である。
　図１７は実施例１のＰＺＴ膜及び実施例２のＰＺＴ膜のＸＲＤチャートである。
　図１８は、逆格子マップのイメージ図である。
　図１９は、結晶格子面（ｈｋｌ）の逆格子ベクトルと逆格子点を説明する図である。
　図２０は、Ｘ線回折条件のベクトル表記を説明する図である。
　図２１（Ａ）~（Ｃ）は逆格子マッピング（方法）を説明する図である。
　図２２は、逆格子マッピング（方法）を説明する図である。
　図２３は、ＰＺＴ単結晶の逆格子シミュレーション結果である。
　図２４（Ａ），（Ｂ）は、実施例１（本発明５μｍ）及び実施例２（本発明１０μｍ）それぞれのサンプルを逆格子マップ測定した結果である。
　図２５（Ａ）は実施例１（本発明５μｍ）、実施例２（本発明１０μｍ）及び実施例３（本発明２０μｍ）それぞれの強誘性ヒステリシス曲線を示す図、図２５（Ｂ）は実施例１~３それぞれの圧電バタフライ曲線を示す図である。
　図２６（Ａ）は比較例２（Ｋ１４８）の強誘性ヒステリシス曲線を示す図、図２６（Ｂ）は比較例２（Ｋ１４８）の圧電バタフライ曲線を示す図である。
　図２７（Ａ）は比較例３（Ｋ１２９）の強誘性ヒステリシス曲線を示す図、図２７（Ｂ）は比較例３（Ｋ１２９）の圧電バタフライ曲線を示す図である。
　図２８は、実施例３（本発明２０μｍ）のＰＺＴ膜のｄ３３評価を行った結果を示す図である。
　図２９は、実施例２（本発明１０μｍ）のサンプルの比誘電率と誘電損失（ｔａｎδ）の温度変化を周波数を１００ｋ，５００ｋ，１ＭＨｚと変化させて測定した結果を示す図である。
　図３０は、実施例４のサンプルを示す断面図である。
　図３１は、実施例４のサンプルのＸＲＤチャートである。
　図３２は、実施例４のサンプルのＸＲＤチャートである。
　図３３は、実施例５のサンプルをＦＩＢで断面観察した像である。
　図３４は、δ＝０．１２５、或はｎ＝８．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３５は、δ＝０．２５、或はｎ＝４．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３６は、δ＝０．５、或はｎ＝２．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３７は、δ＝１．０、或はｎ＝１．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３８（Ａ）は実施例３のサンプル（２０μｍ−ＰＺＴ膜）のＦＩＢ−ＳＥＭ像、図３８（Ｂ）は図３８（Ａ）の拡大像である。
　図３９（Ａ），（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４０（Ａ），（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４１（Ａ），（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４２（Ａ）~（Ｃ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４３（Ａ），（Ｂ）は本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図４４は、本発明の一態様に係るシリーズ型のバイモルフ素子の製造方法を説明するための断面図である。
　図４５は、本発明の一態様に係るパラレル型のバイモルフ素子の製造方法を説明するための断面図である。
　図４６は、実施例６の圧電体膜の製造方法を説明するための断面図である。
　図４７は、比較例４の圧電体膜の製造方法を説明するための断面図である。
　図４８は、ＰＺＴ膜の歪（応力）を測定する方法を説明するための図である。
　図４９は、図４８に示す比較例４のＰＺＴ膜１１０５の表面の光学顕微鏡写真である。 FIG. 1 is a cross-sectional view schematically showing a sputtering apparatus according to one embodiment of the present invention.
FIG. 2 is a diagram illustrating the case of a DUTY ratio of 100 S / T%.
3A to 3D are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
4A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention, and FIG. 4B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
5A and 5B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
6A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention, and FIG. 6B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
7A is a plan view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention, and FIG. 7B is a cross-sectional view illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention. is there.
8A to 8C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the invention.
9A to 9C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
10A to 10C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
11A to 11C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
12A to 12D are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
13A and 13B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
14A and 14B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
15A to 15C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
16A is an image obtained by observing a cross section of the sample of Example 1 with an FIB (Focused Ion Beam), and FIG. 16B is an image obtained by observing the sample of the Example 2 with a FIB.
FIG. 17 is an XRD chart of the PZT film of Example 1 and the PZT film of Example 2.
FIG. 18 is an image diagram of a reciprocal lattice map.
FIG. 19 is a diagram for explaining reciprocal lattice vectors and reciprocal lattice points on the crystal lattice plane (hkl).
FIG. 20 is a diagram for explaining the vector notation of the X-ray diffraction conditions.
21A to 21C are diagrams for explaining reciprocal lattice mapping (method).
FIG. 22 is a diagram for explaining reciprocal lattice mapping (method).
FIG. 23 shows a reciprocal lattice simulation result of the PZT single crystal.
24A and 24B show the results of reciprocal lattice map measurement of the samples of Example 1 (present invention 5 μm) and Example 2 (present invention 10 μm).
FIG. 25 (A) is a diagram showing strongly attractive hysteresis curves of Example 1 (present invention 5 μm), Example 2 (present invention 10 μm) and Example 3 (present invention 20 μm), and FIG. It is a figure which shows the piezoelectric butterfly curve of each of Examples 1-3.
FIG. 26A is a diagram showing a strong attractive hysteresis curve of Comparative Example 2 (K148), and FIG. 26B is a diagram showing a piezoelectric butterfly curve of Comparative Example 2 (K148).
FIG. 27A is a diagram showing a strong attractive hysteresis curve of Comparative Example 3 (K129), and FIG. 27B is a diagram showing a piezoelectric butterfly curve of Comparative Example 3 (K129).
FIG. 28 is a diagram showing the results of d33 evaluation of the PZT film of Example 3 (20 μm of the present invention).
FIG. 29 is a diagram showing the results of measuring the temperature change of the relative permittivity and dielectric loss (tan δ) of the sample of Example 2 (the present invention 10 μm) while changing the frequency to 100 k, 500 k, and 1 MHz.
30 is a cross-sectional view showing a sample of Example 4. FIG.
FIG. 31 is an XRD chart of the sample of Example 4.
FIG. 32 is an XRD chart of the sample of Example 4.
FIG. 33 is an image obtained by observing a cross section of the sample of Example 5 using FIB.
FIG. 34 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.125 or n = 8.0.
FIG. 35 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.25 or n = 4.0.
FIG. 36 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.5 or n = 2.0.
FIG. 37 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 1.0 or n = 1.0.
38A is a FIB-SEM image of the sample of Example 3 (20 μm-PZT film), and FIG. 38B is an enlarged image of FIG. 38A.
39A and 39B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
40A and 40B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
41A and 41B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
42A to 42C are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
43A and 43B are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
FIG. 44 is a cross-sectional view illustrating the method for manufacturing the series-type bimorph element according to one embodiment of the present invention.
FIG. 45 is a cross-sectional view illustrating the method for manufacturing the parallel bimorph element according to one embodiment of the present invention.
FIG. 46 is a cross-sectional view for explaining the method for manufacturing the piezoelectric film of the sixth embodiment.
FIG. 47 is a cross-sectional view for explaining the method of manufacturing the piezoelectric film of Comparative Example 4.
FIG. 48 is a diagram for explaining a method of measuring the strain (stress) of the PZT film.
FIG. 49 is an optical micrograph of the surface of the PZT film 1105 of Comparative Example 4 shown in FIG.
　以下では、本発明の実施形態及び実施例について図面を用いて詳細に説明する。ただし、本発明は以下の説明に限定されず、本発明の趣旨及びその範囲から逸脱することなくその形態及び詳細を様々に変更し得ることは、当業者であれば容易に理解される。従って、本発明は以下に示す実施形態の記載内容及び実施例に限定して解釈されるものではない。
　［第１の実施形態］
　図１は、本発明の一態様に係るスパッタリング装置を模式的に示す断面図である。このスパッタリング装置はチャンバー１１を有し、このチャンバー１１内には、基板１２を保持する保持部１３が配置されている。保持部１３には基板１２を所定の温度に加熱するヒーター（図示せず）が配置されているとよい。
　チャンバー１１、基板１２及び保持部１３は接地されている。チャンバー１１内にはスパッタリングターゲット１４を保持するターゲット保持部１５が配置されている。ターゲット保持部１５に保持されたスパッタリングターゲット１４は、保持部１３に保持された基板１２に対向するように位置する。
　スパッタリングターゲット１４は比抵抗が１×１０７Ω・ｃｍ以上の絶縁物を含むスパッタリングターゲットであり、絶縁物は酸化物であるとよい。詳細には、絶縁物は、一般式ＡＢＯ３で表され、Ａは、Ａｌ、Ｙ、Ｌｉ、Ｎａ、Ｋ、Ｒｂ、Ｐｂ、Ｃｓ、Ｌａ、Ｓｒ、Ｃｒ、Ａｇ、Ｃａ、Ｐｒ、Ｎｄ、Ｂａ、Ｂｉ、Ｆおよび周期表のランタン系列の元素からなる群から選択される少なくとも一つの元素を含んでなり、Ｂは、Ａｌ、Ｇａ、Ｉｎ、Ｎｂ、Ｓｎ、Ｔｉ、Ｚｒ、Ｒｕ、Ｒｈ、Ｐｄ、Ｒｅ、Ｏｓ、ＩｒＰｔ、Ｕ、ＣＯ、Ｆｅ、Ｎｉ、Ｍｎ、Ｃｒ、Ｃｕ、Ｍｇ、Ｖ、Ｎｂ、Ｔａ、ＭｏおよびＷからなる群から選択される少なくとも一つの元素を含んでなるペロブスカイト物質を含む物、または、酸化ビスマスと、ペロブスカイト型構造ブロックとが交互に積層された構造を有するビスマス層状構造強誘電体結晶を含む物であり、前記ペロブスカイト型構造ブロックは、Ｌｉ、Ｎａ、Ｋ、Ｃａ、Ｓｒ、Ｂａ、Ｙ、Ｂｉ、Ｐｂおよび希土類元素から選ばれる少なくとも１つの元素Ｌと、Ｔｉ、Ｚｒ、Ｈｆ、Ｖ、Ｎｂ、Ｔａ、Ｗ、Ｍｏ、Ｍｎ、Ｆｅ、ＳｉおよびＧｅから選ばれる少なくとも１つの元素Ｒと、酸素とによって構成されるとよい。
　但し、本実施形態ではスパッタリングターゲット１４を（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δとし、ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たす。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　上記式１においてδが０より大きい値を含むのは酸素欠損型ペロブスカイト構造を含むからである。但し、スパッタリングターゲット１４の成分がすべて酸素欠損型ペロブスカイト構造であってもよいが、スパッタリングターゲット１４が部分的に酸素欠損型ペロブスカイト構造を含んでいてもよい。なお、酸素欠損型ペロブスカイト構造の詳細は後述する。
　また、スパッタリング装置は出力供給機構１６を有し、この出力供給機構１６はパルス機能付高周波電源である。出力供給機構１６は整合器２２に電気的に接続されており、整合器２２はターゲット保持部１５に電気的に接続されている。つまり、出力供給機構１６は、整合器２２及びターゲット保持部１５を介してスパッタリングターゲット１４に周波数が１０ｋＨｚ以上３０ＭＨｚ以下の高周波出力（ＲＦ出力）を、１／２０ｍｓ以上１／３ｍｓ以下の周期（３ｋＨｚ以上２０ｋＨｚ以下の周波数）で２５％以上９０％以下のＤＵＴＹ比のパルス状に供給するものである。なお、本実施形態では、出力供給機構１６により高周波出力をターゲット保持部１５を介してスパッタリングターゲット１４に供給するが、出力供給機構１６により高周波出力をスパッタリングターゲット１４に直接供給してもよい。
　ＤＵＴＹ比は、１周期の間でターゲット保持部１５に高周波出力が印加される期間の比率である。例えば、２５％のＤＵＴＹ比の場合は、１周期の２５％の期間がターゲット保持部１５に高周波出力が印加される期間（高周波出力オンの期間）となり、１周期の７５％の期間がターゲット保持部１５に高周波出力が印加されない期間（高周波出力オフの期間）となる。詳細には、例えば１／２０ｍｓの周期（２０ｋＨｚの周波数）で２５％のＤＵＴＹ比の場合は、１／２０ｍｓ（１周期）の２５％の１／８０ｍｓの期間が高周波出力オンの期間となり、１／２０ｍｓ（１周期）の７５％の３／８０ｍｓの期間が高周波出力オフの期間となる。
　また、例えば図２は、１００Ｓ／Ｔ％のＤＵＴＹ比の場合を示しており、１周期の１００Ｓ／Ｔ％の期間が高周波出力オンの期間となり、１周期の残りの１００Ｎ／Ｔ％の期間が高周波出力オフの期間となる。
　また、本実施の形態では、出力供給機構１６によってターゲット保持部１５に高周波出力をパルス状に供給する際の当該パルス状を、１／２０ｍｓ以上１／３ｍｓ以下の周期（３ｋＨｚ以上２０ｋＨｚ以下の周波数）で２５％以上９０％以下のＤＵＴＹ比としているが、当該パルス状を１／１５ｍｓ以上１／５ｍｓ以下の周期で２５％以上９０％以下のＤＵＴＹ比とすることが好ましい。
　上記の範囲でパルススパッタリングすることにより、次々に生ずる新たなＲＦプラズマの発生の数だけ新たなスパッタリング現象が生じ、成膜速度が飛躍的に向上し、かつ、ＲＦプラズマ照射を完全に止めるプラズマＯＦＦの時間が生じるが、その際もマイグレーション現象を中心に結晶は成長し続ける。
　ＤＵＴＹ比を２５％以上とする理由は、２５％未満とすると結晶成長が完全に途切れてしまい、次の結晶成長が上手く繋がらないからである。ＤＵＴＹ比を９０％以下とする理由は、９０％超とすると殆ど連続波と同等の成膜速度に落ち込んでしまうからである。
　また、スパッタリング装置は、出力供給機構１６により高周波出力を供給している際にスパッタリングターゲット１４に発生する直流成分である電圧ＶＤＣを−２００Ｖ以上−８０Ｖ以下に制御するＶＤＣ制御部２３を有する。このＶＤＣ制御部２３は、ＶＤＣセンサを有し、出力供給機構１６に電気的に接続されている。
　また、出力供給機構１６により高周波出力を供給した後のスパッタリングターゲット１４の表面の比抵抗は、新品のスパッタリングターゲットの表面の比抵抗に対して変化することがあるが、１×１０９Ω・ｃｍ以上１×１０１２Ω・ｃｍ以下であることが好ましい。
　また、スパッタリング装置は、チャンバー１１内に希ガスを導入する第１のガス導入源１７と、チャンバー１１内を真空排気する真空ポンプ等の真空排気機構１９を有する。また、スパッタリング装置は、チャンバー内にＯ２ガスを導入する第２のガス導入源１８を有する。
　第１のガス導入源１７によってチャンバー１１内に導入する希ガスはＡｒガスであるとよく、成膜時における第２のガス導入源１８により導入されるＯ２ガスと第１のガス導入源１７により導入されるＡｒガスとの比が下記式６を満たすように制御する流量制御部（図示せず）をスパッタリング装置が有するとよい。
　０．１≦Ｏ２ガス／Ａｒガス≦０．３　・・・式６
　また、スパッタリング装置は、成膜時におけるチャンバー内の圧力が０．１Ｐａ以上２Ｐａ以下となるように制御する圧力制御部を有するとよい。
　また、スパッタリング装置は、スパッタリングターゲット１４に磁場を加える磁石２０と、この磁石２０を２０ｒｐｍ以上１２０ｒｐｍ以下の速度で回転させる回転機構２１を有する。
　次に、図１のスパッタリング装置を用いて基板上に絶縁膜を成膜する方法について説明する。ここでいう基板は、種々の基板を用いることができ、基板上に薄膜が成膜されたものも含むが、本実施形態では一例として以下の基板を使用する。
　（１００）に配向したＳｉ基板上にＺｒＯ２膜を５５０℃以下の温度（好ましくは５００℃の温度）で蒸着法により形成する。このＺｒＯ２膜は（１００）に配向する。なお、本明細書において（１００）に配向することと（２００）に配向することは実質的に同一である。この後、ＺｒＯ２膜上に下部電極を形成する。下部電極は、金属または酸化物からなる電極膜によって形成される。金属からなる電極膜としては例えばＰｔ膜またはＩｒ膜が用いられる。酸化物からなる電極膜としては例えばＳｒ（Ｔｉ１−ｘＲｕｘ）Ｏ３膜が用いられ、ｘは下記式１５を満たす。
　０．０１≦ｘ≦０．４　・・・式１５
　本実施形態では、ＺｒＯ２膜上に５５０℃以下の温度（好ましくは４００℃の温度）でスパッタリングによってエピタキシャル成長によるＰｔ膜を下部電極として形成する。このＰｔ膜は（２００）に配向する。
　本実施形態では、上記のような基板を用いるが、Ｓｉ基板に代えてＳｉ単結晶やサファイア単結晶などの単結晶基板、表面に金属酸化物膜が形成された単結晶基板、表面にポリシリコン膜またはシリサイド膜が形成された基板等を用いてもよい。
　次に、上記の基板を保持部１３に保持する。次いで、第１のガス導入源１７によってチャンバー１１内にＡｒガスを導入し、第２のガス導入源１８によってＯ２ガスを導入する。この際、Ｏ２ガスとＡｒガスとの比が下記式６を満たすように流量制御部によって制御するとよい。
　０．１≦Ｏ２ガス／Ａｒガス≦０．３　・・・式６
　また、真空排気機構１９によってチャンバー１１内を真空排気することで、チャンバー１１内を所定の圧力（例えば０．１Ｐａ以上２Ｐａ以下の圧力）まで減圧する。
　この後、基板１２上に、高周波出力機構１６によって整合器２２及びターゲット保持部１５を介して、比抵抗が１×１０７Ω・ｃｍ以上の絶縁物を含むスパッタリングターゲット１４に高周波出力を供給する。この高周波出力は、１０ｋＨｚ以上３０ＭＨｚ以下の周波数、１／２０ｍｓ以上１／３ｍｓ以下の周期で２５％以上９０％以下のＤＵＴＹ比のパルス状である。これにより、基板１２上に絶縁膜を成膜する。
　スパッタリングターゲット１４に高周波出力を供給して絶縁膜を成膜する際に、２０ｒｐｍ以上１２０ｒｐｍ以下の速度で磁石２０を回転機構２１により回転させることでスパッタリングターゲット１４に磁場を加えることが好ましい。
　また、スパッタリングターゲット１４に高周波出力を供給している際にスパッタリングターゲット１４に発生する直流成分である電圧ＶＤＣをＶＤＣ制御部２３によって−２００Ｖ以上−８０Ｖ以下に制御することが好ましい。
　また、スパッタリングターゲット１４に高周波出力を供給した後のスパッタリングターゲット１４の表面の比抵抗を１×１０９Ω・ｃｍ以上１×１０１２Ω・ｃｍ以下に制御することが好ましい。
　本実施形態によれば、比抵抗が１×１０７Ω・ｃｍ以上の絶縁物を含むスパッタリングターゲットに１０ｋＨｚ以上３０ＭＨｚ以下の高周波出力を、１／２０ｍｓ以上１／３ｍｓ以下の周期で２５％以上９０％以下のＤＵＴＹ比のパルス状に供給する。このようにパルス状に高周波出力を供給するため、絶縁物を含むスパッタリングターゲットに電荷が溜まっても、高周波出力を供給していない時（高周波出力がオフ状態の時）にその溜まった電荷を逃がすことができ、その結果、スパッタリングターゲットが破損することを抑制できる。そのため、スパッタリングターゲットに印加する電力量を多くすることができ、成膜レートを高くすることが可能となる。
　特に、スパッタリングターゲット１４が一般式ＡＢＯ３で表されるペロブスカイト物質を含む物、または、ビスマス層状構造強誘電体結晶を含む物である場合、成膜時にスパッタリングターゲット１４の表面抵抗が大きく変動することが考えられる。このため、上記のようにパルス状に高周波出力を供給してスパッタリングターゲット１４に電荷が溜まりにくくすることで、スパッタリングターゲット１４の表面抵抗の変動を抑制することが可能となる。
　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たす（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δからなるスパッタリングターゲット１４を用い、上記の成膜方法により基板上に成膜された圧電体膜は、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜であり、ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　上記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、１００以上６００以下（好ましくは１００以上４００以下）の膜厚１μｍ当たりの比誘電率εｒを有し、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有するとよい。また、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は５μｍ以上の膜厚を有し、好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上の膜厚を有するとよい。また、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のキュリー温度は２５０℃以上４２０℃以下（好ましくは３００℃以上４００℃以下）であるとよい。
　上記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は例えばＰｔ膜等の電極上に形成されていてもよく、この（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をＸＲＤ（Ｘ−Ｒａｙ　Ｄｉｆｆｒａｃｔｉｏｎ）で結晶性を評価すると、そのＸＲＤの（００２）のピーク値は、電極のＸＲＤの（２００）のピーク値より高くなる。これは、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚が５μｍ以上であるためである。
　また、本実施形態によれば、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δからなるスパッタリングターゲットに上記の高周波出力を、上記の周期で上記のＤＵＴＹ比のパルス状に供給することで、基板上に（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する際の成膜速度を１ｎｍ／ｓｅｃ以上２．５ｎｍ／ｓｅｃ以下に向上させることができる。
　また、本実施形態では、Ｓｉ基板とＰｔ膜との間にＺｒＯ２膜を形成することで、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の内部応力を低減することができる。そのため、その（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚を５μｍ以上としても、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜にクラックが入ることを抑制できる。
　なお、本実施形態では、Ｐｔ膜上に（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成しているが、Ｐｔ膜上にＳｒＲｕＯ３膜を形成し、このＳｒＲｕＯ３膜上に（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成してもよい。
　次に、酸素欠損型ペロブスカイト構造について図３４~図３７を参照しつつ詳細に説明する。
　酸素欠損型ペロブスカイト構造を一般式で表すと以下のように分類される。以下の分類は実際に存在している結晶構造を基にしている。
　ペロブスカイト構造はＡＢＯ３−δ、或はＡｎＢｎＯ３ｎ−１で表される。
　図３４~図３７それぞれの左図はＡＢＯ３−δの酸素欠損を含有した各種結晶構造を示す模式図である。図３４~図３７それぞれの右図は、ａ−ｂ面の酸素欠損構造の模式図であり、Ｃ’層、Ｄ’層はそれぞれ、Ｃ層、Ｄ層をａ−ｂ面で鏡映した状態、或は位相がずれた状態を示す模式図である。
　図３４は、δ＝０．１２５、或はｎ＝８．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３５は、δ＝０．２５、或はｎ＝４．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３６は、δ＝０．５、或はｎ＝２．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　図３７は、δ＝１．０、或はｎ＝１．０の場合の酸素欠損型ペロブスカイト構造の模式図である。
　ペロブスカイトの派生構造の一つに酸素欠損秩序型ペロブスカイト構造というものがある。Ｂサイト遷移金属が高価数で不安定な場合や、試料作製雰囲気の制御により、酸素が欠損する。酸素が欠損するとＢＯ６八面体は、ＢＯ５正方ピラミッドやＢＯ４四面体などに変化する。酸素がわずかに欠損したＡＢＯ３−δでは基本構造を保ったまま、ランダムなサイトの酸素が欠損するが、酸素欠損量δが大きくなると、多くの場合酸素欠損が規則的に配列する。
　酸素欠損状態の違いにより、配位構造は大きく異なる。ＢＯ６（Ｂ：Ｂサイトイオン、Ｏ：酸素イオン）八面体は、酸素欠損の無い八面体構造である。Ｂサイトイオンが５配位の場合は、ＢＯ５正方ピラミッド構造となり、４配位の場合は、ＢＯ４四面体構造、ＢＯ４平面（酸素が完全に欠損）の２つの構造を有する。
　なお、上記の酸素欠損型ペロブスカイト構造の説明は、本明細書に記載したペロブスカイト構造に関するすべての物質に適用される。
　［第２の実施形態］
　図３~図５は、本発明の一態様に係る圧電体素子の製造方法を説明するための図である。
　図３（Ａ）に示すように、第１の実施形態と同様の方法で、Ｓｉ基板１０１上にＺｒＯ２膜１０２を形成し、ＺｒＯ２膜１０２上に電極膜としてのＰｔ膜１０３を形成する。
　次いで、第１の実施形態と同様の方法で、Ｐｔ膜１０３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４、スパッタリング法により成膜されるため、その分極方向が図３（Ａ）に示す矢印３１の方向となる。即ち、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向は、Ｓｉ基板１０１の上面に対して垂直で上方向となる。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　次に、図３（Ｂ）に示すように、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５をゾルゲル法により形成し、仮焼成する。このときの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５はアモルファスである。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　この後、図３（Ｃ）に示すように、Ｓｉ基板１０１を上下逆にする。次いで、図３（Ｄ）に示すように、Ｓｉ基板１０１をＺｒＯ２膜１０２から除去する。Ｓｉ基板１０１を完全に除去しても、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の膜厚が５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）あれば、膜として自立することが可能である。
　次に、図４（Ａ），（Ｂ）に示すように、Ｐｔ膜１０３及びＺｒＯ２膜１０２をフォトリソグラフィー技術及びエッチング技術により加工することで、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４下に第１の電極１０３ａ、第２の電極１０３ｂ及び第３の電極１０３ｃを形成する。第１~第３の電極１０３ａ~１０３ｃは上部電極となる。
　この後、図４（Ａ）に示す（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４及び接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を切断する。これにより、第１の電極１０３ａ、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４及び接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を積層した第１の積層部と、第２の電極１０３ｂ、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４及び接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を積層した第２の積層部と、第３の電極１０３ｃ、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４及び接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を積層した第３の積層部を形成する。なお、図４（Ｂ）には示していないが、第４の積層部、第５の積層部も形成される。
　次に、図５（Ａ）に示すように、第１の積層部の第１の電極１０３ａと第２の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５とを重ね、かつ第２の積層部の第２の電極１０３ｂと第３の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５とを重ね、かつ第３の積層部の第３の電極１０３ｃと第４の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５とを重ねる。
　次いで、第１の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５と第４の積層部の第４の電極１０３ｄとの間に荷重をかけつつ熱処理を施す。これにより、第１の積層部の第１の電極１０３ａ及び（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４それぞれと第２の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を貼り付けるとともに、第２の積層部の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び第２の電極それぞれと第３の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を貼り付けるとともに、第３の積層部の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４及び第３の電極１０３ｃそれぞれと第４の積層部の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を貼り付けるとともに、第１~第４の積層部それぞれの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５を結晶化する（図５（Ａ）参照）。この際の熱処理の温度は接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０５が結晶化する温度であるとよい。
　次に、図５（Ｂ）に示すように、第２の電極１０３ｂ及び第４の電極１０３ｄの側面に電極１０６を形成し、第１の電極１０３ａ、第３の電極１０３ｃ及び第５の電極１０３ｅの側面に電極１０７を形成する。電極１０６は第２の電極１０３ｂ及び第４の電極１０３ｄに電気的に接続され、電極１０７は第１の電極１０３ａ、第３の電極１０３ｃ及び第５の電極１０３ｅに電気的に接続される。このようにして圧電体素子を作製することができる。
　本実施形態においても第１の実施形態と同様の効果を得ることができる。
　［第３の実施形態］
　図６~図８は、本発明の一態様に係る圧電体素子の製造方法を説明するための図である。
　図６（Ｂ）に示すように、第１の実施形態と同様の方法で、Ｓｉ基板１０１上にＺｒＯ２膜１０２を形成し、ＺｒＯ２膜１０２上に電極膜としてのＰｔ膜１０３を形成する。
　次いで、第１の実施形態と同様の方法で、Ｐｔ膜１０３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４は、スパッタリング法により成膜されるため、その分極方向が図６（Ｂ）に示す矢印３１の方向となる。即ち、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向は、Ｓｉ基板１０１の上面に対して垂直で上方向となる。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　次いで、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４上に電極膜としてのＰｔ膜を形成し、このＰｔ膜をエッチング加工することで、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４上に第１の電極１１１ａ、第２の電極１１１ｂ及び第３の電極１１１ｃを形成する（図６（Ａ），（Ｂ）参照）。
　次に、図７（Ａ），（Ｂ）に示すように、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４、第１~第３の電極１１１ａ~１１１ｃの上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１１２をゾルゲル法により形成し、仮焼成する。このときの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１１２はアモルファスである。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　この後、図８（Ａ）に示すように、第１の実施形態と同様の方法で、Ｓｉ基板１２１上にＺｒＯ２膜１２２を形成し、ＺｒＯ２膜１２２上に電極膜としてのＰｔ膜１２３を形成する。次いで、第１の実施形態と同様の方法で、Ｐｔ膜１２３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４を形成する。第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４は、スパッタリング法により成膜されるため、その分極方向が図８（Ａ）に示す矢印３２の方向となる。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次いで、Ｓｉ基板１０１とＳｉ基板１２１との間に荷重をかけつつ熱処理を施す。これにより、接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１１２と第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４を貼り付ける。この際の熱処理の温度は接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１１２が結晶化する温度であるとよい。
　次に、図８（Ｂ）に示すように、Ｓｉ基板１０１及びＳｉ基板１２１を除去する。次いで、図８（Ｃ）に示すように、Ｐｔ膜１２３及びＺｒＯ２膜１２２をフォトリソグラフィー技術及びエッチング技術により加工することで、第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４下に第１の電極１２３ａ、第２の電極１２３ｂ及び第３の電極１２３ｃを形成する。また、Ｐｔ膜１０３及びＺｒＯ２膜１０２をフォトリソグラフィー技術及びエッチング技術により加工することで、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４上に第１の電極１０３ａ、第２の電極１０３ｂ及び第３の電極１０３ｃを形成する。
　この後、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４、接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１１２及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４を切断する。次いで、図５（Ｂ）に示す工程を施すことで、圧電体素子を作製することができる。
　本実施形態においても第１の実施形態と同様の効果を得ることができる。
　また、本実施形態では、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向３１は第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４の分極方向３２の逆方向である。このため、図５（Ｂ）に示す工程後の圧電体素子の電極１０６及び電極１０７の一方にプラス電圧を印加し、他方にマイナス電圧を印加すると、例えばプラス電圧及びマイナス電圧の一方の電圧が第１の電極１０３ａ，１２３ａに印加され、他方の電圧が第１の電極１１１ａに印加されるので、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４と第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４とを同一方向に伸ばすことができる。
　［第４の実施形態］
　図９~図１１は、本発明の一態様に係る圧電体素子の製造方法を説明するための図である。
　図９（Ａ）に示すように、第３の実施形態における図６に示す工程までを行った後に、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４、第１の電極１１１ａ、第２の電極１１１ｂ及び第３の電極１１１ｃの上に、第１の実施形態と同様の方法で、スパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３２を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　次いで、第１の実施形態と同様の方法で、Ｓｉ基板１２１上にＺｒＯ２膜１２２を形成し、ＺｒＯ２膜１２２上に電極膜としてのＰｔ膜１２３を形成する。次いで、第１の実施形態と同様の方法で、Ｐｔ膜１２３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次いで、Ｓｉ基板１０１とＳｉ基板１２１との間に荷重をかけつつ熱処理を施す。これにより、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３２と第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４を貼り付ける。
　次に、図９（Ｂ）に示すように、Ｓｉ基板１２１を除去する。
　次いで、図９（Ｃ）に示すように、Ｐｔ膜１２３及びＺｒＯ２膜１２２をフォトリソグラフィー技術及びエッチング技術により加工することで、第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４下に第１の電極１２３ａ、第２の電極１２３ｂ及び第３の電極１２３ｃを形成する。
　次いで、第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２４、第１~第３の電極１２３ａ~１２３ｃの上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３３をゾルゲル法により形成し、仮焼成する。このときの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３３はアモルファスである。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　この後、図１０（Ａ）に示すように、Ｓｉ基板１４１上にＺｒＯ２膜１４２、Ｐｔ膜１４３、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１４４を順に形成し、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１４４上に第１の電極１４５ａ、第２の電極１４５ｂ及び第３の電極１４５ｃを形成する。次いで、第１~第３の電極１４５ａ~１４５ｃの上に、スパッタリング法により（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１４６を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次いで、Ｓｉ基板１５１上にＺｒＯ２膜１５２を形成し、ＺｒＯ２膜１５２上に電極膜としてのＰｔ膜１５３を形成する。次いで、Ｐｔ膜１５３上にスパッタリング法により（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１５４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次いで、Ｓｉ基板１４１とＳｉ基板１５１との間に荷重をかけつつ熱処理を施す。これにより、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１４６と（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１５４を貼り付ける。
　次に、図１０（Ｂ），（Ｃ）に示すように、Ｓｉ基板１５１、ＺｒＯ２膜１５２及びＰｔ膜１５３を除去する。
　この後、図１１（Ａ）に示すように、図９（Ｃ）に示す接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３３と図１０（Ｃ）に示す（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１５４を重ね合わせる。そして、図１１（Ｂ）に示すように、Ｓｉ基板１０１とＳｉ基板１４１との間に荷重をかけつつ熱処理を施す。これにより、接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３３と（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１５４を貼り付ける。この際の熱処理の温度は接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１３３が結晶化する温度であるとよい。
　次に、図１１（Ｃ）に示すように、Ｓｉ基板１４１及びＺｒＯ２膜１４２を除去する。次いで、Ｐｔ膜１４３をフォトリソグラフィー技術及びエッチング技術により加工することで、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１４４上に第１の電極１４３ａ、第２の電極１４３ｂ及び第３の電極１４３ｃを形成する。
　この後、図１１（Ａ）、（Ｂ）、（Ｃ）の工程を繰り返すことで、（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の積層数を増やすことができる。
　本実施形態においても第１の実施形態と同様の効果を得ることができる。
　［第５の実施形態］
　図１２~図１５は、本発明の一態様に係る圧電体素子の製造方法を説明するための図である。
　図１２（Ａ）に示すように、第１の実施形態と同様の方法で、Ｓｉ基板１６１上にＺｒＯ２膜１６２を形成し、ＺｒＯ２膜１６２上に電極膜としてのＰｔ膜１６３を形成する。このＰｔ膜１６３は１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜用の第１の電極となる。
　次いで、第１の実施形態と同様の方法で、Ｐｔ膜１６３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。なお、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４は、スパッタリング法により成膜されるため、その分極方向が図１２（Ａ）に示す矢印３１の方向となる。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　次に、図１２（Ｂ）に示すように、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４上に５５０℃以下の温度（好ましくは４００℃の温度）でスパッタリングによってエピタキシャル成長によるＰｔ膜１６５を形成する。このＰｔ膜１６５は２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜用の第２の電極となる。
　この後、図１２（Ｃ）に示すように、第１の実施形態と同様の方法で、Ｐｔ膜１６５上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすとよい。
　次に、図１２（Ｄ）に示すように、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６上にＰｔ膜１６７を上記のＰｔ膜１６５と同様の方法で形成する。このＰｔ膜１６７は３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜用の第３の電極となる。
　この後、図１２（Ｃ）に示す工程と図１２（Ｄ）に示す工程を繰り返すことで、図１３（Ａ）に示すように、Ｐｔ膜１６７上に３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６８、Ｐｔ膜１６９、４層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１７０、Ｐｔ膜１７１を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすとよい。Ｐｔ膜１６９は４層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜用の第４の電極となり、Ｐｔ膜１７１は第５の電極となる。次いで、Ｓｉ基板１６１をＺｒＯ２膜１６２から除去する。
　次に、ＺｒＯ２膜１６２、Ｐｔ膜１６３上に１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４、Ｐｔ膜１６５、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６、Ｐｔ膜１６７上に３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６８、Ｐｔ膜１６９、４層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１７０、Ｐｔ膜１７１を有する積層膜を必要な大きさに切断する（図示せず）。これにより、図１３（Ａ）に示す積層部が複数得られる。
　なお、本実施形態では、Ｓｉ基板１６１を除去した後に上記積層膜を切断しているが、Ｓｉ基板１６１を除去する前に上記積層膜を切断し、その後にＳｉ基板を除去してもよい。
　次に、図１３（Ｂ）に示すように、上記の積層部の第１の側面に感光性永久レジスト膜１７２を塗布する。次いで、図１４（Ａ）に示すように、感光性永久レジスト膜１７２を露光、現像することで、永久レジスト膜１７２ａ，１７２ｂを積層部の第１の側面に形成する。これにより、積層部のＰｔ膜（第４の電極）１６９の第１の側面は永久レジスト膜１７２ａによって覆われ、積層部のＰｔ膜（第２の電極）１６５の第１の側面は永久レジスト膜１７２ｂによって覆われ、積層部のＰｔ膜（第１の電極）１６３、Ｐｔ膜（第３の電極）１６７及びＰｔ膜（第５の電極）１７１それぞれの第１の側面は露出される。
　この後、図１４（Ｂ）に示すように、積層部のＰｔ膜（第１の電極）１６３，Ｐｔ膜（第３の電極）１６７，Ｐｔ膜（第５の電極）１７１の第１の側面及び永久レジスト膜１７２ａ，１７２ｂの上にＰｔ膜（第６の電極）１７３を形成する。これにより、Ｐｔ膜（第６の電極）１７３はＰｔ膜（第１の電極）１６３、Ｐｔ膜（第３の電極）１６７及びＰｔ膜（第５の電極）１７１それぞれに電気的に接続される。
　次に、図１５（Ａ）に示すように、図１４（Ｂ）の積層部を上下逆に配置し、この積層部の第２の側面に感光性永久レジスト膜１７４を塗布する。次いで、図１５（Ｂ）に示すように、感光性永久レジスト膜１７４を露光、現像することで、永久レジスト膜１７４ａ，１７４ｂ，１７４ｃを積層部の第２の側面に形成する。これにより、積層部のＰｔ膜（第１の電極）１６３の第２の側面は永久レジスト膜１７４ａによって覆われ、積層部のＰｔ膜（第３の電極）１６７の第２の側面は永久レジスト膜１７４ｂによって覆われ、積層部のＰｔ膜（第５の電極）１７１の第２の側面は永久レジスト膜１７４ｃによって覆われ、積層部のＰｔ膜（第２の電極）１６５及びＰｔ膜（第４の電極）１６９それぞれの第２の側面は露出される。
　この後、図１５（Ｃ）に示すように、積層部のＰｔ膜（第２の電極）１６５及びＰｔ膜（第４の電極）１６９それぞれの第１の側面及び永久レジスト膜１７４ａ，１７４ｂ，１７４ｃの上にＰｔ膜（第７の電極）１７５を形成する。これにより、Ｐｔ膜（第７の電極）１７５はＰｔ膜（第２の電極）１６５及びＰｔ膜（第４の電極）１６９それぞれに電気的に接続される。このようにして圧電体素子を作製することができる。
　本実施形態においても第１の実施形態と同様の効果を得ることができる。
　なお、本実施形態では、ＺｒＯ２膜１６２、第１の電極１６３、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４、第２の電極１６５、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６、第３の電極１６７、３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６８、第４の電極１６９、４層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１７０、第５の電極１７１を有する積層部を用いているが、これに限定されるものではなく、以下のように変更して実施することも可能である。
　少なくとも第１の電極１６３、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４、第２の電極１６５、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６、第３の電極１６７を有する積層部を用いることも可能である。その場合、第１の電極１６３の第１の側面と第３の電極１６７の第１の側面が第６の電極１７３によって電気的に接続されるとよい。
　また、第１の電極１６３、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４、第２の電極１６５、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６、第３の電極１６７、３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６８、第４の電極１６９を有する積層部を用いることも可能である。その場合、第１の電極１６３の第１の側面と第３の電極１６７の第１の側面が第６の電極１６７によって電気的に接続され、第２の電極１６５の第２の側面と第４の電極１６９の第２の側面が第７の電極１７５によって電気的に接続されるとよい。
　また、図１３（Ａ）に示す第５の電極１７１上に更にｎ層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び第（ｎ＋３）の電極を繰り返し形成してもよい。この場合、ｎは５以上の整数である。例えばｎが５，６，７の場合、第１の電極１６３、１層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６４、第２の電極１６５、２層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６６、第３の電極１６７、３層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１６８、第４の電極１６９、４層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１７０、第５の電極１７１、５層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、第８の電極、６層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び第９の電極、７層目（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び第１０の電極を有する積層部を用いることになる。その場合、第１の電極１６３の第１の側面と第３の電極１６７の第１の側面と第５の電極１７１の第１の側面と第９の電極の第１の側面とが第６の電極１６７によって電気的に接続され、第２の電極１６５の第２の側面と第４の電極１６９の第２の側面と第８の電極の第２の側面と第１０の電極の第２の側面とが第７の電極１７５によって電気的に接続されるとよい。
　［第６の実施形態］
　図３９~図４３は、本発明の一態様に係る圧電体素子の製造方法を説明するための断面図である。
　図３９（Ａ）に示すように、第１の実施形態と同様の方法で、Ｓｉ基板１０１上にＺｒＯ２膜１０２を形成し、ＺｒＯ２膜１０２上に電極膜としてのＰｔ膜１０３を形成する。
　次いで、第１の実施形態と同様の方法で、Ｐｔ膜１０３上にスパッタリング法により膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４を形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすとよい。
　０≦δ≦１　・・・式１
　１．００≦ａ＋ｂ≦１．３５　・・・式１１
　０≦ｂ≦０．０８　・・・式１２
　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
　０．４≦ｃ≦０．７　・・・式１４
　０．３≦ｄ≦０．６　・・・式１５
　０≦ｅ≦０．１　・・・式１６
　次に、図３９（Ｂ）に示すように、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２５をゾルゲル法により形成し、仮焼成する。このときの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２５はアモルファスである。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　なお、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４は、スパッタリング法により成膜されるため、その分極方向が図３９（Ｂ）に示す矢印３１の方向となる。即ち、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向は、Ｓｉ基板１０１の上面に対して垂直で上方向となる。
　図４０（Ａ）に示すように、図３９（Ａ）と同様に、Ｓｉ基板１０１上にＺｒＯ２膜１０２、Ｐｔ膜１０３、膜厚５μｍ以上（好ましくは１０μｍ以上、より好ましくは１５μｍ以上、さらに好ましくは２０μｍ以上）の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４を順に形成する。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次に、図４０（Ｂ）に示すように、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４上に電極膜としてのＰｔ膜１２６を形成する。なお、第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向は矢印３１の方向となる。
　次に、図４１（Ａ）に示すように、図４０（Ｂ）のＳｉ基板１０１のＰｔ膜１２６上に図３９（Ｂ）のＳｉ基板１０１を逆向きに載せる。これにより、図３９（Ｂ）のＳｉ基板１０１上の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２５を図４０（Ｂ）のＳｉ基板１０１上のＰｔ膜１２６と接触させる。
　この後、図４１（Ｂ）に示すように、下側のＳｉ基板１０１と上側のＳｉ基板１０１との間に荷重をかけつつ熱処理を施す。これにより、結晶化された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２５ａとＰｔ膜１２６を貼り付ける。なお、下側の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向（矢印３１）は、上側の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の分極方向（矢印３１）と逆になっている。
　次に、図４２（Ａ）に示すように、上側のＳｉ基板１０１をＫＯＨのウエットエッチングで溶解して除去する。これにより、ＺｒＯ２膜１０２が露出される。つまり、この際のウエットエッチングはＺｒＯ２膜１０２でエッチングが停止される。
　次に、図４２（Ｂ）に示すように、ＺｒＯ２膜１０２及びＰｔ膜１０３をドライエッチングで除去する。これにより、上側の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４が露出される。
　次に、図４２（Ｃ）に示すように、上側の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１０４の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２７をゾルゲル法により形成し、仮焼成する。このときの接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２７はアモルファスである。ａ、ｂ、ｃ、ｄ、ｅ及びδは上記の式１及び式１１~式１６を満たすとよい。
　次に、図４２（Ａ）に示す状態のＳｉ基板１０１を別途準備し、このＳｉ基板１０１のＺｒＯ２膜１０２上に図４２（Ｃ）のＳｉ基板１０１を逆向きに載せる。これにより、図４３（Ａ）に示すように、図４２（Ｃ）のＳｉ基板１０１上の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２７を図４２（Ａ）のＳｉ基板１０１上のＺｒＯ２膜１０２と接触させる。
　次いで、下側のＳｉ基板１０１と上側のＳｉ基板１０１との間に荷重をかけつつ熱処理を施す。これにより、結晶化された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜１２７ａとＺｒＯ２膜１０２を貼り付ける。
　次に、図４３（Ｂ）に示すように、図４２（Ａ）に示す工程と同様の方法で上側のＳｉ基板１０１をＫＯＨのウエットエッチングで除去する。次に、図４３（Ａ）の工程と図４３（Ｂ）の工程を必要なだけ繰り返す。
　この後、図１３~図１５に示す工程を用いて側面端子を形成する。このようにして圧電体素子を作製することができる。
　本実施形態においもて第３の実施形態と同様の効果を得ることができる。
　［第７の実施形態］
　図４４は、本発明の一態様に係るシリーズ型のバイモルフ素子の製造方法を説明するための断面図である。
　まず、図１２（Ａ），（Ｂ）に示す工程を行い、その後、図４２（Ａ）に示す工程と同様の方法で、Ｓｉ基板１６１をＫＯＨのウエットエッチングで溶解して除去する。これにより、Ｐｔ膜１６３、ＰＺＴ膜１６４、Ｐｔ膜１６５の順に積層された積層膜３７が作製され（図４４参照）、このＰＺＴ膜１６４は矢印３１の方向に分極している。なお、ＺｒＯ２膜１６２は除去してもよいし、除去しなくてもよい。
　次に、図４４に示すように、金属箔からなるシム３５の上面及び下面に接着層３６によって上記の積層膜３７を貼り付ける。そして、上側のＰｔ膜１６３と下側のＰｔ膜１６３との間に直流電圧を印加することで、シリーズ型のバイモルフ素子を動かすことができる。
　なお、図４４に示すシム３５の上のＰｔ膜１６５を第１の電極と読み替え、そのＰｔ膜１６５上のＰＺＴ膜１６４を圧電体膜と読み替え、そのＰＺＴ膜１６４上のＰｔ膜１６３を第２の電極と読み替え、シム３５の下のＰｔ膜１６５を第３の電極と読み替え、そのＰｔ膜１６５下のＰＺＴ膜１６４を圧電体膜と読み替え、そのＰＺＴ１６５下のＰｔ膜１６３を第４の電極と読み替えてもよい。
　［第８の実施形態］
　図４５は、本発明の一態様に係るパラレル型のバイモルフ素子の製造方法を説明するための断面図である。
　第７の実施形態と同様の方法で、Ｐｔ膜１６３、ＰＺＴ膜１６４、Ｐｔ膜１６５の順に積層された積層膜３７を作製し（図４５参照）、このＰＺＴ膜１６４は矢印３１の方向に分極している。
　次に、図４５に示すように、金属箔からなるシム３５の上面及び下面に接着層３６によって上記の積層膜３７を貼り付ける。そして、上側のＰｔ膜１６５及び下側のＰｔ膜１６３とシム３５との間に直流電圧を印加することで、パラレル型のバイモルフ素子を動かすことができる。
　なお、図４５に示すシム３５の上のＰｔ膜１６３を第１の電極と読み替え、そのＰｔ膜１６３上のＰＺＴ膜１６４を圧電体膜と読み替え、そのＰＺＴ膜１６４上のＰｔ膜１６５を第２の電極と読み替え、シム３５の下のＰｔ膜１６５を第３の電極と読み替え、そのＰｔ膜１６５下のＰＺＴ膜１６４を圧電体膜と読み替え、そのＰＺＴ１６５下のＰｔ膜１６３を第４の電極と読み替えてもよい。
　なお、上述した第１乃至第８実施形態を適宜組合せて実施してもよい。 Hereinafter, embodiments and examples of the present invention will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and it will be easily understood by those skilled in the art that modes and details can be variously changed without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments and examples below.
[First Embodiment]
FIG. 1 is a cross-sectional view schematically illustrating a sputtering apparatus according to one embodiment of the present invention. The sputtering apparatus includes a chamber 11, and a holding unit 13 that holds the substrate 12 is disposed in the chamber 11. A heater (not shown) for heating the substrate 12 to a predetermined temperature may be disposed in the holding unit 13.
The chamber 11, the substrate 12, and the holding unit 13 are grounded. A target holding unit 15 that holds the sputtering target 14 is disposed in the chamber 11. The sputtering target 14 held by the target holding unit 15 is positioned so as to face the substrate 12 held by the holding unit 13.
The sputtering target 14 has a specific resistance of 1 × 10 7 It is a sputtering target including an insulator of Ω · cm or more, and the insulator is preferably an oxide. Specifically, the insulator is of the general formula ABO 3 A is Al, Y, Li, Na, K, Rb, Pb, Cs, La, Sr, Cr, Ag, Ca, Pr, Nd, Ba, Bi, F and a lanthanum series element of the periodic table And at least one element selected from the group consisting of: B, Al, Ga, In, Nb, Sn, Ti, Zr, Ru, Rh, Pd, Re, Os, IrPt, U, CO, Fe , Ni, Mn, Cr, Cu, Mg, V, Nb, Ta, Mo, and a substance containing a perovskite substance containing at least one element selected from the group consisting of W, or bismuth oxide and a perovskite structure The perovskite structure block includes Li, Na, K, Ca, Sr, Ba, Y, Bi, Pb, and a bismuth layered structure ferroelectric crystal having a structure in which blocks are alternately stacked. And at least one element L selected from rare earth elements, at least one element R selected from Ti, Zr, Hf, V, Nb, Ta, W, Mo, Mn, Fe, Si and Ge, and oxygen It is good to be done.
However, in this embodiment, the sputtering target 14 is (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ And a, b, c, d, e, and δ satisfy the following Expression 1 and Expressions 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
The reason why δ includes a value larger than 0 in the above formula 1 is because it includes an oxygen deficient perovskite structure. However, all the components of the sputtering target 14 may have an oxygen-deficient perovskite structure, but the sputtering target 14 may partially include an oxygen-deficient perovskite structure. Details of the oxygen-deficient perovskite structure will be described later.
Further, the sputtering apparatus has an output supply mechanism 16, which is a high-frequency power supply with a pulse function. The output supply mechanism 16 is electrically connected to the matching unit 22, and the matching unit 22 is electrically connected to the target holding unit 15. That is, the output supply mechanism 16 outputs a high-frequency output (RF output) having a frequency of 10 kHz to 30 MHz to the sputtering target 14 via the matching unit 22 and the target holding unit 15 and a period (3 kHz) of 1/20 ms to 1/3 ms. The frequency is 20 kHz or less) and is supplied in a pulse shape having a duty ratio of 25% or more and 90% or less. In this embodiment, the high-frequency output is supplied to the sputtering target 14 by the output supply mechanism 16 via the target holding unit 15, but the high-frequency output may be directly supplied to the sputtering target 14 by the output supply mechanism 16.
The DUTY ratio is a ratio of a period during which a high frequency output is applied to the target holding unit 15 during one cycle. For example, in the case of a DUTY ratio of 25%, a period of 25% of one cycle is a period during which a high frequency output is applied to the target holding unit 15 (a period when the high frequency output is on), and a period of 75% of one cycle is held by the target. This is a period during which no high-frequency output is applied to the unit 15 (high-frequency output off period). Specifically, for example, in the case of a DUTY ratio of 25% with a period of 1/20 ms (frequency of 20 kHz), a period of 1/80 ms of 25% of 1/20 ms (one period) becomes a period of high frequency output on. A period of 3/80 ms, which is 75% of / 20 ms (one cycle), is a high-frequency output off period.
Further, for example, FIG. 2 shows the case of a DUTY ratio of 100 S / T%, where one period of 100 S / T% is a high-frequency output on period, and the remaining period of 100 N / T% is one period. The high frequency output is off.
In the present embodiment, the pulse shape when the output supply mechanism 16 supplies the high-frequency output to the target holding unit 15 in a pulse shape has a period of 1/20 ms to 1/3 ms (frequency of 3 kHz to 20 kHz). ), A DUTY ratio of 25% or more and 90% or less is preferable. However, it is preferable that the pulse shape has a DUTY ratio of 25% or more and 90% or less in a period of 1/15 ms or more and 1/5 ms or less.
By performing pulse sputtering in the above range, new sputtering phenomena occur as many as the number of new RF plasmas generated one after another, the film formation speed is dramatically improved, and plasma OFF that completely stops RF plasma irradiation is achieved. However, the crystal continues to grow around the migration phenomenon.
The reason for setting the DUTY ratio to 25% or more is that if it is less than 25%, the crystal growth is completely interrupted and the next crystal growth is not well connected. The reason why the DUTY ratio is set to 90% or less is that when it exceeds 90%, the film forming speed is almost equal to that of a continuous wave.
In addition, the sputtering apparatus has a voltage V that is a direct current component generated in the sputtering target 14 when a high frequency output is supplied by the output supply mechanism 16. DC V to control -200V to -80V DC A control unit 23 is included. This V DC The control unit 23 DC It has a sensor and is electrically connected to the output supply mechanism 16.
Further, the specific resistance of the surface of the sputtering target 14 after the high-frequency output is supplied by the output supply mechanism 16 may change with respect to the specific resistance of the surface of the new sputtering target, but 1 × 10. 9 Ω · cm or more 1 × 10 12 It is preferable that it is below Ω · cm.
The sputtering apparatus also includes a first gas introduction source 17 that introduces a rare gas into the chamber 11, and a vacuum exhaust mechanism 19 such as a vacuum pump that evacuates the chamber 11. In addition, the sputtering apparatus has an O in the chamber. 2 It has the 2nd gas introduction source 18 which introduces gas.
The rare gas introduced into the chamber 11 by the first gas introduction source 17 is preferably Ar gas, and O introduced by the second gas introduction source 18 during film formation. 2 The sputtering apparatus may have a flow rate control unit (not shown) for controlling the ratio of the gas and the Ar gas introduced by the first gas introduction source 17 to satisfy the following formula 6.
0.1 ≦ O 2 Gas / Ar gas ≦ 0.3 Equation 6
The sputtering apparatus preferably includes a pressure control unit that controls the pressure in the chamber during film formation to be 0.1 Pa or more and 2 Pa or less.
The sputtering apparatus also includes a magnet 20 that applies a magnetic field to the sputtering target 14 and a rotating mechanism 21 that rotates the magnet 20 at a speed of 20 rpm to 120 rpm.
Next, a method for forming an insulating film on a substrate using the sputtering apparatus of FIG. 1 will be described. Various substrates can be used here, including those in which a thin film is formed on the substrate. In this embodiment, the following substrate is used as an example.
ZrO on Si substrate oriented in (100) 2 The film is formed by vapor deposition at a temperature of 550 ° C. or lower (preferably a temperature of 500 ° C.). This ZrO 2 The film is oriented (100). In this specification, the orientation to (100) and the orientation to (200) are substantially the same. After this, ZrO 2 A lower electrode is formed on the film. The lower electrode is formed by an electrode film made of metal or oxide. For example, a Pt film or an Ir film is used as the electrode film made of metal. As an electrode film made of an oxide, for example, Sr (Ti 1-x Ru x ) O 3 A film is used, and x satisfies the following formula 15.
0.01 ≦ x ≦ 0.4 Formula 15
In this embodiment, ZrO 2 On the film, a Pt film by epitaxial growth is formed as a lower electrode by sputtering at a temperature of 550 ° C. or lower (preferably a temperature of 400 ° C.). This Pt film is oriented to (200).
In the present embodiment, the substrate as described above is used, but instead of the Si substrate, a single crystal substrate such as a Si single crystal or a sapphire single crystal, a single crystal substrate with a metal oxide film formed on the surface, and a polysilicon on the surface A substrate on which a film or a silicide film is formed may be used.
Next, the substrate is held by the holding unit 13. Next, Ar gas is introduced into the chamber 11 by the first gas introduction source 17, and O 2 is introduced by the second gas introduction source 18. 2 Introduce gas. At this time, O 2 It is good to control by a flow control part so that ratio of gas and Ar gas may satisfy the following formula 6.
0.1 ≦ O 2 Gas / Ar gas ≦ 0.3 Equation 6
Further, the inside of the chamber 11 is evacuated by the evacuation mechanism 19 to reduce the pressure inside the chamber 11 to a predetermined pressure (for example, a pressure of 0.1 Pa or more and 2 Pa or less).
Thereafter, the specific resistance is 1 × 10 1 on the substrate 12 via the matching unit 22 and the target holding unit 15 by the high-frequency output mechanism 16. 7 A high frequency output is supplied to the sputtering target 14 containing an insulator of Ω · cm or more. This high-frequency output is in the form of a pulse having a DUTY ratio of 25% to 90% at a frequency of 10 kHz to 30 MHz and a period of 1/20 ms to 1/3 ms. Thereby, an insulating film is formed on the substrate 12.
When a high frequency output is supplied to the sputtering target 14 to form an insulating film, it is preferable to apply a magnetic field to the sputtering target 14 by rotating the magnet 20 by the rotation mechanism 21 at a speed of 20 rpm to 120 rpm.
Further, a voltage V which is a direct current component generated in the sputtering target 14 when a high frequency output is supplied to the sputtering target 14. DC V DC It is preferable to control to −200 V or more and −80 V or less by the control unit 23.
Further, the specific resistance of the surface of the sputtering target 14 after supplying a high frequency output to the sputtering target 14 is 1 × 10 9 Ω · cm or more 1 × 10 12 It is preferable to control to Ω · cm or less.
According to this embodiment, a high frequency output of 10 kHz to 30 MHz is applied to a sputtering target including an insulator having a specific resistance of 1 × 10 7 Ω · cm or more, and a frequency of 1/20 ms or more and 1/3 ms or less is 25% or more and 90% or less. DUTY ratio is supplied in a pulse form. Since the high-frequency output is supplied in a pulse shape in this way, even if charges are accumulated in the sputtering target including the insulator, the accumulated charges are released when the high-frequency output is not supplied (when the high-frequency output is in the off state). As a result, the sputtering target can be prevented from being damaged. Therefore, the amount of power applied to the sputtering target can be increased, and the film formation rate can be increased.
In particular, the sputtering target 14 is of the general formula ABO 3 It is conceivable that the surface resistance of the sputtering target 14 greatly fluctuates during film formation when the perovskite substance represented by the formula (1) or the bismuth layer structure ferroelectric crystal is included. For this reason, it becomes possible to suppress fluctuations in the surface resistance of the sputtering target 14 by supplying high-frequency output in pulses as described above to make it difficult for charges to accumulate in the sputtering target 14.
a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16 (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A piezoelectric film formed on a substrate by the above-described film formation method using a sputtering target 14 made of a La b ) (Zr c Ti d Nb e ) O 3-δ It is preferable that a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Above (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a relative dielectric constant εr per 1 μm of film thickness of 100 or more and 600 or less (preferably 100 or more and 400 or less), and has a coercive voltage per 1 μm of film thickness of 3V or more and 15V or less and 20 μC / cm. 2 50 μC / cm 2 It is preferable to have at least one of the following remanent polarization values. Also, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film has a thickness of 5 μm or more, preferably 10 μm or more, more preferably 15 μm or more, and further preferably 20 μm or more. Also, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The Curie temperature of the film is preferably 250 ° C. or higher and 420 ° C. or lower (preferably 300 ° C. or higher and 400 ° C. or lower).
Above (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film may be formed on an electrode such as a Pt film, and this (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ When the crystallinity of the film is evaluated by XRD (X-Ray Diffraction), the peak value of (002) of the XRD becomes higher than the peak value of (200) of the XRD of the electrode. This is (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ This is because the film thickness is 5 μm or more.
Further, according to the present embodiment, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The above-mentioned high frequency output is supplied to the sputtering target made of in the above cycle in the form of pulses with the above DUTY ratio (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film formation rate when forming the film can be improved to 1 nm / sec or more and 2.5 nm / sec or less.
In the present embodiment, ZrO is interposed between the Si substrate and the Pt film. 2 By forming a film, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The internal stress of the film can be reduced. Therefore, its (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Even if the film thickness is 5 μm or more, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ It can suppress that a crack enters into a film.
In the present embodiment, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film is formed, but SrRuO is formed on the Pt film. 3 A film is formed and this SrRuO 3 On the membrane (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film may be formed.
Next, the oxygen-deficient perovskite structure will be described in detail with reference to FIGS.
The oxygen deficient perovskite structure can be classified by the following general formula. The following classification is based on the crystal structure that actually exists.
Perovskite structure is ABO 3-δ Or A n B n O 3n-1 It is represented by
The left figure of each of FIGS. 34 to 37 is ABO. 3-δ It is a schematic diagram which shows the various crystal structures containing the oxygen deficiency. Each of the right diagrams of FIGS. 34 to 37 is a schematic diagram of an oxygen deficient structure on the ab plane, and the C ′ layer and the D ′ layer are mirror images of the C layer and the D layer on the ab plane, respectively. It is a schematic diagram showing a state where the phase is shifted.
FIG. 34 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.125 or n = 8.0.
FIG. 35 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.25 or n = 4.0.
FIG. 36 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 0.5 or n = 2.0.
FIG. 37 is a schematic diagram of an oxygen-deficient perovskite structure when δ = 1.0 or n = 1.0.
One of the derived structures of perovskite is an oxygen-deficient ordered perovskite structure. When the B-site transition metal is expensive and unstable, or oxygen is lost due to control of the sample preparation atmosphere. When oxygen is deficient, BO 6 The octahedron is BO 5 Square pyramid and BO 4 It changes to a tetrahedron. ABO with slight oxygen deficiency 3-δ In this case, oxygen at random sites is deficient while maintaining the basic structure. However, when the amount of oxygen deficiency δ increases, in many cases, oxygen deficiencies are regularly arranged.
The coordination structure varies greatly depending on the oxygen deficiency state. BO 6 The (B: B site ion, O: oxygen ion) octahedron has an octahedral structure without oxygen deficiency. If the B site ion is pentacoordinate, 5 It becomes a square pyramid structure. 4 Tetrahedral structure, BO 4 It has two structures (planar (completely deficient in oxygen)).
The above description of the oxygen-deficient perovskite structure applies to all substances related to the perovskite structure described in this specification.
[Second Embodiment]
3 to 5 are diagrams for explaining a method of manufacturing a piezoelectric element according to an aspect of the present invention.
As shown in FIG. 3A, a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment. 2 A film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
Next, in the same manner as in the first embodiment, a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, more preferably 20 μm or more) is formed on the Pt film 103 by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 104 is formed. a, b, c, d, e, and δ may satisfy the following Expression 1 and Expressions 11 to 16. (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Since the film 104 is formed by a sputtering method, the polarization direction is the direction of an arrow 31 illustrated in FIG. That is, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Next, as shown in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ For adhesion on the membrane 104 (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 105 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 105 is amorphous. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Thereafter, as shown in FIG. 3C, the Si substrate 101 is turned upside down. Next, as shown in FIG. 3D, the Si substrate 101 is made of ZrO. 2 Remove from film 102. Even if the Si substrate 101 is completely removed, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ If the thickness of the film 104 is 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, and further preferably 20 μm or more), the film 104 can be independent.
Next, as shown in FIGS. 4A and 4B, the Pt film 103 and ZrO 2 By processing the film 102 by photolithography technology and etching technology, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 103a, a second electrode 103b, and a third electrode 103c are formed under the film 104. The first to third electrodes 103a to 103c are upper electrodes.
Thereafter, as shown in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The membrane 105 is cut. Thereby, the first electrode 103a, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The first stacked portion in which the film 105 is stacked, and the second electrode 103b (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A second stacked portion in which the film 105 is stacked, and a third electrode 103c, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 104 and adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A third stacked portion in which the films 105 are stacked is formed. Although not shown in FIG. 4B, a fourth stacked portion and a fifth stacked portion are also formed.
Next, as shown in FIG. 5A, for bonding the first electrode 103a of the first stacked portion and the second stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Overlaying the film 105 and bonding the second electrode 103b of the second stacked portion and the third stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Overlaying the film 105 and bonding the third electrode 103c of the third stacked portion and the fourth stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 105 is overlaid.
Next, for bonding the first laminated portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Heat treatment is performed while applying a load between the film 105 and the fourth electrode 103d of the fourth stacked portion. Thereby, the first electrodes 103a and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For bonding each film 104 and the second laminated portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ While the film 105 is pasted, the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For bonding the film and the second electrode to the third laminated portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ While the film 105 is attached, the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For bonding the film 104 and the third electrode 103c to the fourth stacked portion (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Affixing the film 105 and bonding each of the first to fourth laminated portions (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 105 is crystallized (see FIG. 5A). The temperature of the heat treatment at this time is for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A temperature at which the film 105 crystallizes is good.
Next, as illustrated in FIG. 5B, the electrodes 106 are formed on the side surfaces of the second electrode 103b and the fourth electrode 103d, and the first electrode 103a, the third electrode 103c, and the fifth electrode 103e are formed. An electrode 107 is formed on the side surface of the substrate. The electrode 106 is electrically connected to the second electrode 103b and the fourth electrode 103d, and the electrode 107 is electrically connected to the first electrode 103a, the third electrode 103c, and the fifth electrode 103e. In this way, a piezoelectric element can be manufactured.
In this embodiment, the same effect as that of the first embodiment can be obtained.
[Third Embodiment]
6 to 8 are diagrams for describing a method of manufacturing a piezoelectric element according to an aspect of the present invention.
As shown in FIG. 6B, a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment. 2 A film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
Next, in the same manner as in the first embodiment, a first (Pb) film having a thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, and further preferably 20 μm or more) is formed on the Pt film 103 by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 104 is formed. a, b, c, d, e, and δ may satisfy the following Expression 1 and Expressions 11 to 16. First (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Since the film 104 is formed by a sputtering method, the polarization direction is the direction of an arrow 31 illustrated in FIG. That is, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Then the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ By forming a Pt film as an electrode film on the film 104 and etching the Pt film, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 111a, a second electrode 111b, and a third electrode 111c are formed over the film 104 (see FIGS. 6A and 6B).
Next, as shown in FIGS. 7A and 7B, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 104 is bonded onto the first to third electrodes 111a to 111c (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 112 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 112 is amorphous. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Thereafter, as shown in FIG. 8A, the ZrO film is formed on the Si substrate 121 by the same method as in the first embodiment. 2 A film 122 is formed and ZrO 2 A Pt film 123 as an electrode film is formed on the film 122. Next, a second (Pb) film having a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, further preferably 20 μm or more) is formed on the Pt film 123 by sputtering in the same manner as in the first embodiment. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 124 is formed. Second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Since the film 124 is formed by a sputtering method, the polarization direction is the direction of the arrow 32 illustrated in FIG. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, heat treatment is performed while applying a load between the Si substrate 101 and the Si substrate 121. As a result, for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 112 and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 124 is attached. The temperature of the heat treatment at this time is for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The temperature may be a temperature at which the film 112 is crystallized.
Next, as shown in FIG. 8B, the Si substrate 101 and the Si substrate 121 are removed. Next, as shown in FIG. 8C, the Pt film 123 and the ZrO 2 By processing the film 122 by a photolithography technique and an etching technique, the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 123a, a second electrode 123b, and a third electrode 123c are formed under the film 124. Also, the Pt film 103 and ZrO 2 By processing the film 102 by the photolithography technique and the etching technique, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 103a, a second electrode 103b, and a third electrode 103c are formed over the film 104.
After this, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 104, for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 112 and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The membrane 124 is cut. Next, a piezoelectric element can be manufactured by performing the process shown in FIG.
In this embodiment, the same effect as that of the first embodiment can be obtained.
In the present embodiment, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction 31 of the film 104 is the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ This is the direction opposite to the polarization direction 32 of the film 124. Therefore, when a positive voltage is applied to one of the electrode 106 and the electrode 107 of the piezoelectric element after the step shown in FIG. 5B and a negative voltage is applied to the other, for example, one of the positive voltage and the negative voltage is applied. Since the other voltage is applied to the first electrode 111a while being applied to the first electrodes 103a and 123a, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 104 and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The membrane 124 can be stretched in the same direction.
[Fourth Embodiment]
9 to 11 are diagrams for describing a method of manufacturing a piezoelectric element according to an aspect of the present invention.
As shown in FIG. 9A, after the steps up to the step shown in FIG. 6 in the third embodiment are performed, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Over the film 104, the first electrode 111a, the second electrode 111b, and the third electrode 111c, a film thickness of 5 μm or more (preferably 10 μm or more, more preferably) by a sputtering method in the same manner as in the first embodiment. (Pb of 15 μm or more, more preferably 20 μm or more) a La b ) (Zr c Ti d Nb e ) O 3-δ A film 132 is formed. a, b, c, d, e, and δ may satisfy the following Expression 1 and Expressions 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Next, ZrO on the Si substrate 121 by the same method as in the first embodiment. 2 A film 122 is formed and ZrO 2 A Pt film 123 as an electrode film is formed on the film 122. Next, a second (Pb) film having a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, further preferably 20 μm or more) is formed on the Pt film 123 by sputtering in the same manner as in the first embodiment. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 124 is formed. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, heat treatment is performed while applying a load between the Si substrate 101 and the Si substrate 121. As a result, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 132 and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 124 is attached.
Next, as shown in FIG. 9B, the Si substrate 121 is removed.
Next, as shown in FIG. 9C, the Pt film 123 and the ZrO 2 By processing the film 122 by a photolithography technique and an etching technique, the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 123a, a second electrode 123b, and a third electrode 123c are formed under the film 124.
Then the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 124 is bonded onto the first to third electrodes 123a to 123c (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 133 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 133 is amorphous. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Thereafter, as shown in FIG. 10A, the ZrO layer is formed on the Si substrate 141. 2 Film 142, Pt film 143, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 144 is formed in order, and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 145a, a second electrode 145b, and a third electrode 145c are formed over the film 144. Next, on the first to third electrodes 145a to 145c, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 146 is formed. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, ZrO on the Si substrate 151 2 A film 152 is formed and ZrO 2 A Pt film 153 as an electrode film is formed on the film 152. Next, the Pt film 153 is sputtered (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 154 is formed. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, heat treatment is performed while applying a load between the Si substrate 141 and the Si substrate 151. As a result, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 146 and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 154 is attached.
Next, as shown in FIGS. 10B and 10C, the Si substrate 151, ZrO 2 The film 152 and the Pt film 153 are removed.
Thereafter, as shown in FIG. 11A, the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 133 and (Pb) shown in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ The film 154 is overlaid. Then, as shown in FIG. 11B, heat treatment is performed while applying a load between the Si substrate 101 and the Si substrate 141. As a result, for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 133 and (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 154 is attached. The temperature of the heat treatment at this time is for bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A temperature at which the film 133 crystallizes is good.
Next, as shown in FIG. 11C, the Si substrate 141 and the ZrO 2 The film 142 is removed. Next, the Pt film 143 is processed by a photolithography technique and an etching technique, so that (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A first electrode 143a, a second electrode 143b, and a third electrode 143c are formed over the film 144.
Thereafter, by repeating the steps of FIGS. 11A, 11B, and 11C, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The number of laminated layers can be increased.
In this embodiment, the same effect as that of the first embodiment can be obtained.
[Fifth Embodiment]
12 to 15 are views for explaining a method of manufacturing a piezoelectric element according to one embodiment of the present invention.
As shown in FIG. 12A, ZrO is formed on the Si substrate 161 by the same method as in the first embodiment. 2 A film 162 is formed and ZrO 2 A Pt film 163 as an electrode film is formed on the film 162. This Pt film 163 is the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ It becomes the first electrode for the film.
Next, a first layer (Pb) having a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, more preferably 20 μm or more) is formed on the Pt film 163 by sputtering in the same manner as in the first embodiment. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 164 is formed. a, b, c, d, e, and δ may satisfy the following Expression 1 and Expressions 11 to 16. The first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Since the film 164 is formed by a sputtering method, the polarization direction is the direction of the arrow 31 illustrated in FIG.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Next, as shown in FIG. 12B, the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A Pt film 165 by epitaxial growth is formed on the film 164 by sputtering at a temperature of 550 ° C. or lower (preferably a temperature of 400 ° C.). This Pt film 165 is the second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ This is the second electrode for the film.
Thereafter, as shown in FIG. 12C, a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, more preferably, more preferably by sputtering on the Pt film 165 in the same manner as in the first embodiment. Is the second layer (Pb) a La b ) (Zr c Ti d Nb e ) O 3-δ A film 166 is formed. It is preferable that a, b, c, d, e, and δ satisfy Expression 1 and Expressions 11 to 16.
Next, as shown in FIG. 12D, the second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A Pt film 167 is formed on the film 166 in the same manner as the Pt film 165 described above. This Pt film 167 is the third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ It becomes the third electrode for the film.
Thereafter, by repeating the process shown in FIG. 12C and the process shown in FIG. 12D, the third layer (Pb) is formed on the Pt film 167 as shown in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ Film 168, Pt film 169, 4th layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 170 and a Pt film 171 are formed. It is preferable that a, b, c, d, e, and δ satisfy Expression 1 and Expressions 11 to 16. The Pt film 169 is the fourth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The fourth electrode for the film is used, and the Pt film 171 is the fifth electrode. Next, the Si substrate 161 is made of ZrO. 2 Remove from film 162.
Next, ZrO 2 On the film 162 and the Pt film 163, the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 164, Pt film 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ On the film 166 and the Pt film 167, the third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 168, Pt film 169, 4th layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The laminated film having the film 170 and the Pt film 171 is cut to a required size (not shown). Thereby, a plurality of stacked portions shown in FIG.
In this embodiment, the laminated film is cut after removing the Si substrate 161. However, the laminated film may be cut before removing the Si substrate 161, and then the Si substrate may be removed.
Next, as shown in FIG. 13B, a photosensitive permanent resist film 172 is applied to the first side surface of the stacked portion. Next, as shown in FIG. 14A, the photosensitive permanent resist film 172 is exposed and developed to form permanent resist films 172a and 172b on the first side surface of the stacked portion. As a result, the first side surface of the Pt film (fourth electrode) 169 in the stacked portion is covered with the permanent resist film 172a, and the first side surface of the Pt film (second electrode) 165 in the stacked portion is the permanent resist film. The first side surfaces of the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171 in the stacked portion are exposed.
Thereafter, as shown in FIG. 14B, the first side surface of the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171 in the stacked portion. A Pt film (sixth electrode) 173 is formed on the permanent resist films 172a and 172b. Accordingly, the Pt film (sixth electrode) 173 is electrically connected to the Pt film (first electrode) 163, the Pt film (third electrode) 167, and the Pt film (fifth electrode) 171. .
Next, as shown in FIG. 15A, the stacked portion of FIG. 14B is disposed upside down, and a photosensitive permanent resist film 174 is applied to the second side surface of the stacked portion. Next, as shown in FIG. 15B, the photosensitive permanent resist film 174 is exposed and developed to form permanent resist films 174a, 174b, and 174c on the second side surface of the stacked portion. As a result, the second side surface of the Pt film (first electrode) 163 in the stacked portion is covered with the permanent resist film 174a, and the second side surface of the Pt film (third electrode) 167 in the stacked portion is the permanent resist film. The second side surface of the Pt film (fifth electrode) 171 in the stacked portion is covered with a permanent resist film 174c, and the Pt film (second electrode) 165 and the Pt film (fourth electrode) in the stacked portion are covered with 174b. The second side surface of each electrode 169 is exposed.
Thereafter, as shown in FIG. 15C, the first side surfaces of the Pt film (second electrode) 165 and the Pt film (fourth electrode) 169 and the permanent resist films 174a, 174b, 174c in the stacked portion. A Pt film (seventh electrode) 175 is formed thereon. As a result, the Pt film (seventh electrode) 175 is electrically connected to the Pt film (second electrode) 165 and the Pt film (fourth electrode) 169, respectively. In this way, a piezoelectric element can be manufactured.
In this embodiment, the same effect as that of the first embodiment can be obtained.
In this embodiment, ZrO 2 Film 162, first electrode 163, first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 164, second electrode 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 166, third electrode 167, third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 168, fourth electrode 169, fourth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Although the stacked portion including the film 170 and the fifth electrode 171 is used, the present invention is not limited to this, and the present invention can be modified as follows.
At least the first electrode 163, the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 164, second electrode 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A stacked portion including the film 166 and the third electrode 167 can also be used. In that case, the first side surface of the first electrode 163 and the first side surface of the third electrode 167 may be electrically connected by the sixth electrode 173.
In addition, the first electrode 163, the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 164, second electrode 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 166, third electrode 167, third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A stacked portion including the film 168 and the fourth electrode 169 can also be used. In that case, the first side surface of the first electrode 163 and the first side surface of the third electrode 167 are electrically connected by the sixth electrode 167, and the second side surface of the second electrode 165 and the fourth side surface The second side surface of the electrode 169 may be electrically connected by the seventh electrode 175.
Further, an n-th layer (Pb) is formed on the fifth electrode 171 illustrated in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ The film and the (n + 3) th electrode may be repeatedly formed. In this case, n is an integer of 5 or more. For example, when n is 5, 6, or 7, the first electrode 163, the first layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 164, second electrode 165, second layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 166, third electrode 167, third layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 168, fourth electrode 169, fourth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane 170, fifth electrode 171, fifth layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane, 8th electrode, 6th layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Membrane and 9th electrode, 7th layer (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A laminated portion having a film and a tenth electrode is used. In that case, the first side surface of the first electrode 163, the first side surface of the third electrode 167, the first side surface of the fifth electrode 171, and the first side surface of the ninth electrode are the sixth side surface. The second side surface of the second electrode 165, the second side surface of the fourth electrode 169, the second side surface of the eighth electrode, and the second side surface of the tenth electrode are electrically connected by the electrode 167. Are preferably electrically connected by the seventh electrode 175.
[Sixth Embodiment]
39 to 43 are cross-sectional views illustrating a method for manufacturing a piezoelectric element according to one embodiment of the present invention.
As shown in FIG. 39A, a ZrO film is formed on the Si substrate 101 by the same method as in the first embodiment. 2 A film 102 is formed and ZrO 2 A Pt film 103 as an electrode film is formed on the film 102.
Next, in the same manner as in the first embodiment, a first (Pb) film having a thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, and further preferably 20 μm or more) is formed on the Pt film 103 by sputtering. a La b ) (Zr c Ti d Nb e ) O 3-δ A film 104 is formed. a, b, c, d, e, and δ may satisfy the following Expression 1 and Expressions 11 to 16.
0 ≦ δ ≦ 1 Equation 1
1.00 ≦ a + b ≦ 1.35 Expression 11
0 ≦ b ≦ 0.08 Expression 12
1.00 ≦ c + d + e ≦ 1.1 Formula 13
0.4 ≦ c ≦ 0.7 Formula 14
0.3 ≦ d ≦ 0.6 Formula 15
0 ≦ e ≦ 0.1 Equation 16
Next, as shown in FIG. 39B, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For adhesion on the membrane 104 (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 125 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 125 is amorphous. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Since the film 104 is formed by a sputtering method, the polarization direction is the direction of an arrow 31 illustrated in FIG. That is, the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film 104 is perpendicular to the upper surface of the Si substrate 101 and is upward.
As shown in FIG. 40A, the ZrO film is formed on the Si substrate 101 as in FIG. 2 The film 102, the Pt film 103, the first (Pb) having a film thickness of 5 μm or more (preferably 10 μm or more, more preferably 15 μm or more, and further preferably 20 μm or more) a La b ) (Zr c Ti d Nb e ) O 3-δ A film 104 is formed in order. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, as shown in FIG. 40 (B), the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A Pt film 126 as an electrode film is formed on the film 104. The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film 104 is the direction of the arrow 31.
Next, as shown in FIG. 41A, the Si substrate 101 of FIG. 39B is placed in the reverse direction on the Pt film 126 of the Si substrate 101 of FIG. 40B. As a result, for bonding on the Si substrate 101 in FIG. a La b ) (Zr c Ti d Nb e ) O 3-δ The film 125 is brought into contact with the Pt film 126 on the Si substrate 101 of FIG.
Thereafter, as shown in FIG. 41B, heat treatment is performed while applying a load between the lower Si substrate 101 and the upper Si substrate 101. As a result, the crystallized adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 125a and a Pt film 126 are attached. The lower first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The polarization direction of the film 104 (arrow 31) is the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The direction of polarization of the film 104 (arrow 31) is reversed.
Next, as shown in FIG. 42A, the upper Si substrate 101 is dissolved and removed by KOH wet etching. As a result, ZrO 2 The film 102 is exposed. In other words, the wet etching at this time is ZrO. 2 Etching is stopped at film 102.
Next, as shown in FIG. 2 The film 102 and the Pt film 103 are removed by dry etching. As a result, the upper first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 104 is exposed.
Next, as shown in FIG. 42C, the upper first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ For adhesion on the membrane 104 (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ A film 127 is formed by a sol-gel method and temporarily fired. For bonding at this time (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ The film 127 is amorphous. a, b, c, d, e, and δ may satisfy the above-described Expression 1 and Expressions 11 to 16.
Next, the Si substrate 101 in the state shown in FIG. 2 The Si substrate 101 of FIG. 42C is placed on the film 102 in the reverse direction. As a result, as shown in FIG. 43A, for bonding (Pb on the Si substrate 101 in FIG. 42C). a La b ) (Zr c Ti d Nb e ) O 3-δ The film 127 is formed on the ZrO film on the Si substrate 101 in FIG. 2 Contact with membrane 102.
Next, heat treatment is performed while applying a load between the lower Si substrate 101 and the upper Si substrate 101. As a result, the crystallized adhesive (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ Film 127a and ZrO 2 A film 102 is attached.
Next, as shown in FIG. 43B, the upper Si substrate 101 is removed by KOH wet etching in the same manner as in the step shown in FIG. Next, the process of FIG. 43A and the process of FIG. 43B are repeated as necessary.
Thereafter, side terminals are formed using the steps shown in FIGS. In this way, a piezoelectric element can be manufactured.
In this embodiment, the same effects as those of the third embodiment can be obtained.
[Seventh Embodiment]
FIG. 44 is a cross-sectional view illustrating the method for manufacturing the series-type bimorph element according to one embodiment of the present invention.
First, the steps shown in FIGS. 12A and 12B are performed, and then the Si substrate 161 is dissolved and removed by KOH wet etching in the same manner as the step shown in FIG. As a result, a laminated film 37 is produced in which the Pt film 163, the PZT film 164, and the Pt film 165 are laminated in this order (see FIG. 44), and the PZT film 164 is polarized in the direction of the arrow 31. ZrO 2 The film 162 may or may not be removed.
Next, as shown in FIG. 44, the laminated film 37 is attached to the upper and lower surfaces of the shim 35 made of metal foil by the adhesive layer 36. A series type bimorph element can be moved by applying a DC voltage between the upper Pt film 163 and the lower Pt film 163.
44, the Pt film 165 on the shim 35 is read as the first electrode, the PZT film 164 on the Pt film 165 is read as the piezoelectric film, and the Pt film 163 on the PZT film 164 is changed to the second electrode. The Pt film 165 under the shim 35 is replaced with a third electrode, the PZT film 164 under the Pt film 165 is replaced with a piezoelectric film, and the Pt film 163 under the PZT 165 is replaced with a fourth electrode. It may be replaced.
[Eighth Embodiment]
FIG. 45 is a cross-sectional view illustrating the method for manufacturing the parallel bimorph element according to one embodiment of the present invention.
A laminated film 37 in which a Pt film 163, a PZT film 164, and a Pt film 165 are laminated in this order is produced by the same method as in the seventh embodiment (see FIG. 45), and this PZT film 164 is polarized in the direction of the arrow 31. is doing.
Next, as shown in FIG. 45, the laminated film 37 is attached to the upper and lower surfaces of the shim 35 made of metal foil by the adhesive layer 36. The parallel bimorph element can be moved by applying a DC voltage between the upper Pt film 165 and the lower Pt film 163 and the shim 35.
The Pt film 163 on the shim 35 shown in FIG. 45 is read as the first electrode, the PZT film 164 on the Pt film 163 is read as the piezoelectric film, and the Pt film 165 on the PZT film 164 is changed to the second electrode. The Pt film 165 under the shim 35 is replaced with a third electrode, the PZT film 164 under the Pt film 165 is replaced with a piezoelectric film, and the Pt film 163 under the PZT 165 is replaced with a fourth electrode. It may be replaced.
The first to eighth embodiments described above may be combined as appropriate.
　図１に示すスパッタリング装置を用い、表１に示すスパッタ条件で基板上にＰＺＴ膜を成膜することで、実施例１（本発明５μｍ）のサンプル、実施例２（本発明１０μｍ）のサンプル、実施例３（本発明２０μｍ）のサンプル及び比較例１（従来例）のサンプルを作製した。ここでの基板は、Ｓｉ基板上にＺｒＯ２膜を蒸着法により形成し、このＺｒＯ２膜上にスパッタリングによってエピタキシャル成長によるＰｔ膜を下部電極として形成したものを用いた。
Figure JPOXMLDOC01-appb-T000001
 　実施例１，２，３及び比較例１それぞれのサンプルを作製する際のスパッタリングターゲットの組成とサンプルの組成は以下のとおりである。
　＜スパッタリングターゲットの組成＞
　実施例１（本発明５μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１３０／５８／４２
　実施例２（本発明１０μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１３０／５８／４２
　実施例３（本発明２０μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１３０／５８／４２
　比較例１（従来例）：Ｐｂ／Ｚｒ／Ｔｉ＝１３０／５８／４２
　＜サンプルの組成＞
　実施例１（本発明５μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１０９／５５／４５
　実施例２（本発明１０μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１０５／５５／４５
　実施例３（本発明２０μｍ）：Ｐｂ／Ｚｒ／Ｔｉ＝１０２／５５／４５
　比較例１（従来例）：Ｐｂ／Ｚｒ／Ｔｉ＝９８／５５／４５
　成膜前のスパッタリングターゲットの表面抵抗値と、成膜後のスパッタリングターゲットの表面抵抗値を、強誘電体測定システムにあたる絶縁抵抗測定器（ＭＯＤＥＬ：ＡＤＣ５４５０（Ｕｌｔｒａ　Ｈｉｇｈ　Ｒｅｓｉｓｔａｎｃｅ　Ｍｅｔｅｒ））を使用し、プローブ間距離を５ｍｍとし、測定電圧を１０Ｖとして測定した。測定結果は以下のとおりである。
　＜成膜前のスパッタリングターゲットの表面抵抗値＞
　スパッタリングターゲットの中央部：２．０３×１０１１Ω・ｃｍ
　スパッタリングターゲットの中央部と外周部との間：２．１０×１０１１Ω・ｃｍ
　スパッタリングターゲットの外周部：５．３９×１０１０Ω・ｃｍ
　＜成膜後のスパッタリングターゲットの表面抵抗値＞
　スパッタリングターゲットの中央部：４．９５×１０１１Ω・ｃｍ
　スパッタリングターゲットの中央部と外周部との間：１．４５×１０１２Ω・ｃｍ
　スパッタリングターゲットの外周部：３．４９×１０１１Ω・ｃｍ
　図１６（Ａ）は、実施例１のサンプルをＦＩＢ（Ｆｏｃｕｓｅｄ　Ｉｏｎ　Ｂｅａｍ）で断面観察した像であり、図１６（Ｂ）は、実施例２のサンプルをＦＩＢで断面観察した像である。実施例１のＰＺＴ膜の膜厚は５．１８μｍであり、実施例２のＰＺＴ膜の膜厚は９．９９μｍであった。これらの膜厚はＴｉｌｔ補正値である。このＴｉｌｔ補正が必要な理由は以下のようである。（１）ＦＩＢで切削を繰り返すと観察像に視野ズレが生じる。ＳＥＭ像の中心から切削領域がずれていくため補正が必要となる。（２）ＦＩＢ切削面は観察の光軸に対して垂直にはならない。傾斜した面を見ているために、画像中で縦横スケールが異なり補正が必要である。以上の理由より、Ｔｉｌｔ角度を補正してそれを実測長さと補正が必要となる。
　図１７は、実施例１のＰＺＴ膜及び実施例２のＰＺＴ膜の結晶性をＸＲＤ（Ｘ−Ｒａｙ　Ｄｉｆｆｒａｃｔｉｏｎ）で評価した結果を示す図である。ＰＺＴ膜のＸＲＤの（００２）のピーク値は、Ｐｔ膜のＸＲＤの（２００）のピーク値より高くなる。これは、ＰＺＴ膜の膜厚が５μｍ以上であるためである。
　実施例１，２，３及び比較例１それぞれのサンプルに対して広域逆格子マッピングを行った。逆格子マップのイメージは図１８に示す。
　本実施例のＸＲＤデータは、リガク社製全自動水平型多目的Ｘ線回折装置ＳｍａｒｔＬａｂを用いており、且つ、広域逆格子マッピングはＳｍａｒｔＬａｂにハイブリッド型多次元ピクセル検出器ＨｙＰｉｘ−３０００を取り付けて測定を行った。
　図１９は、結晶格子面（ｈｋｌ）の逆格子ベクトルと逆格子点を説明する図である。図２０は、Ｘ線回折条件のベクトル表記を説明する図である。
・逆格子ベクトル（ｇｈｋｌ）
　大きさ：（ｈｋｌ）面のｄ値の逆数
　方向：（ｈｋｌ）面の法線方向
・逆格子マッピング
　逆格子点の逆空間上での広がりを測定する。
　逆格子点：逆格子ベクトルの先端
・回折を起こす条件
　散乱ベクトル：Ｋ＝ｋ−ｋ０
　（散乱ベクトルＫ）＝（逆格子ベクトルｇｈｋｌ）
・逆格子マップ測定
　散乱ベクトルＫを走査し、逆格子点の二次元分布を測定する。
　予め結晶構造情報を元に逆格子シミュレーションをしておき、実測値と比較する。逆格子マップは下記のｑｘとｑｚ式でプロットしたものである。
Figure JPOXMLDOC01-appb-M000002
 　２θを１０−１２０°、Ωを１０−９０°、Ｘを０°，３０°，６０°，９０°の４段階、Φを０°と４５°で２面測定した。Φ＝０°（／／Ｓｉ１１０）、Φ＝４５°（／／Ｓｉ１００）、各サンプルΦ＝０°，４５°の２通りを測定した。
　従来のθ−２θ測定の場合、基板を水平に固定して、Ｘ線を照射し測定を行う（図２１（Ａ）参照）。
　θ−２θ測定をω軸（資料の回転軸）、χ軸（煽り操作軸）を走査しながら測定する。またφ軸（面内回転軸）を０°と４５°２点で測定した。θ−２θ／ω軸走査測定後、ｑｚｖｓ．ｑｘプロットしたものが逆格子マッピングであり、同時に何段階かχ軸走査しながら、逆格子マッピングし全てを一面に重ねることで、ドメインの異なる成分を測定し、真の配向度の優劣を知る（図２１（Ｂ），（Ｃ）参照）。
　リガク社製ソフトＳｍａｒｔＬａｂ　Ｇｕｉｄａｎｃｅを用い、図２２のように、既知のＰＺＴ結晶構造情報を元に逆格子点の配置を予め、シミュレートしておき、実測値と重ね合わせることで、膜状態の解析を行った。
　図２３は、ＰＺＴ単結晶の逆格子シミュレーション結果である。
　図２４（Ａ），（Ｂ）は、実施例１（本発明５μｍ）及び実施例２（本発明１０μｍ）それぞれのサンプルを逆格子マップ測定した結果である。これらの図に示すとおり、ＰＺＴ単結晶の逆格子点計算値（×点）と完全に一致し、実施例１，２のＰＺＴ膜は良好な単結晶膜であることが分かる。
　表１に示すように、従来例では、パルスを用いずに高周波の連続波を用いたため、１８００Ｗ以上（１０Ｗ／ｃｍ２以上）に出力を上げると、アークが発生して、プラズマが異常放電してスパッタリング装置が止まってしまうため、１８００Ｗ以上に出力を上げることができなかった。これに対し、実施例１（本発明５μｍ）、実施例２（本発明１０μｍ）及び実施例３（本発明２０μｍ）では、スパッタリングターゲットに１３．５６ＭＨｚの高周波出力を、５ｋＨｚのパルス周波数（１／５ｍｓの周期）で９０％のＤＵＴＹ比のパルス状に供給したため、高周波出力がオフ状態の時にスパッタリングターゲット上にプラズマが立っていない時間ができ、その結果、短時間の成膜で膜厚が厚いＰＺＴ膜を容易に成膜することができた。
　図２５（Ａ）は、実施例１（本発明５μｍ）、実施例２（本発明１０μｍ）及び実施例３（本発明２０μｍ）それぞれの強誘性ヒステリシス曲線を示す図であり、図２５（Ｂ）は、実施例１~３それぞれの圧電バタフライ曲線を示す図である。
　図２５（Ａ），（Ｂ）に示すように、ＰＺＴ膜の膜厚に比例した強誘電性と圧電性が得られることが確認できた。また、膜厚が２０μｍの実施例３のサンプルでは、８７Ｖという非常に大きなＶｃが得られた。また、実施例３のＰＺＴ膜のキュリー温度Ｔｃを測定したところ、Ｔｃ＝３９０℃であった。
　図２６（Ａ）は、比較例２（Ｋ１４８）の強誘性ヒステリシス曲線を示す図であり、図２６（Ｂ）は比較例２（Ｋ１４８）の圧電バタフライ曲線を示す図である。
　図２７（Ａ）は、比較例３（Ｋ１２９）の強誘性ヒステリシス曲線を示す図であり、図２７（Ｂ）は比較例３（Ｋ１２９）の圧電バタフライ曲線を示す図である。
　比較例２（Ｋ１４８）及び比較例３（Ｋ１２９）は、リードテクノ株式会社（〒５２０−２１９４滋賀県大津市大江町横谷１番５　龍谷大学ＲＥＣ２０２Ｂ）製のバルクの圧電素子である。この圧電素子の形状は、直径φ８ｍｍ×厚さ約０．５ｍｍ（５００μｍ）の円盤状である。比較例２（Ｋ１４８）及び比較例３（Ｋ１２９）の圧電素子として、一般的に用いられるハード系ＰＺＴ（Ｋ１４８）と変位量に拘ったソフト系ＰＺＴ（Ｋ１２９）を比較した。
　先ずカタログ値の転移温度（Ｔｃ），圧電定数ｄ３３（ｐＣ／Ｎ），比誘電率εｒは、以下の様であった。
　Ｋ１２９のＴｃ：　１４５℃
　Ｋ１２９のｄ３３：　７２０
　Ｋ１２９のεｒ：　８１００
　Ｋ１４８のＴｃ：　２８０℃
　Ｋ１４８のｄ３３：　５３０
　Ｋ１４８のεｒ：　２４００
　一般的なＫ１４８と異なり、圧電変位に拘ったＫ１２９はＮｉやＮｂ等の元素が添加してあり、比誘電率が８０００以上と大きく、これに伴って圧電変位が大きく取れ、アクチュエータ用途に用いられるが、同時にＴｃ＝１４５℃と非常に低く、温度特性が悪い為、所要箇所が限られる。
　一般的バルクＫ１４８の場合、センサ用途に最適なバタフライ形状をしているが（図２６（Ｂ）参照）、バルクＫ１４８の抗電界Ｅｃ＝１１．４２ｋＶ／ｃｍを、本発明の実施例と比較する為、２０μｍ当たりに変換すると、抗電界Ｅｃ＝１１．４２ｋＶ／ｃｍは２２．８４Ｖ／２０μｍとなり、抗電圧Ｖｃ＝２２．８４Ｖと非常に低い。アクチュエータ用Ｋ１２９の場合は、抗電界Ｅｃ＝５．７ｋＶ／ｃｍは１１．４Ｖ／２０μｍとなり、抗電圧Ｖｃが１１．４Ｖと更に低く、且つＴｃ＝１４５℃とこちらも低い為、デバイス加工時のリフロー等の熱処理（一般に２８０℃前後）時に、簡単に減分極を起こし、圧電性を失ってしまうというバルク共通の課題が有った。
　これに対し、前述した実施例３（本発明２０μｍ）のＰＺＴ単結晶膜のサンプルは、抗電圧Ｖｃが８７Ｖ／２０μｍである。また、Ｔｃが３００℃以上と高い為、加工時のリフロー温度や静電気等の電位印加が起こっても、全く減分極する心配がない。
　ＰＺＴバルクによる積層体は、一層当たり２０μｍ程度の厚さの比較例２，３のバルクを積層して形成するが、一層当たりの抗電圧Ｖｃは高くても２５Ｖ程度である。また、大きな圧電性を引き出そうと、添加剤を多く含み、転移温度Ｔｃが２００℃以下となっていることが多い。その結果、積層体が出来上がった時には、脱分極していて、全く圧電動作できないことも多い。これに対し、実施例３（本発明２０μｍ）のサンプルは、抗電圧Ｖｃが８７Ｖ／２０μｍ、且つ、Ｔｃ＝３９０℃（実測値）であり、全く脱分極は生じない。
　次に、実施例３（本発明２０μｍ）のＰＺＴ膜のｄ３３評価を行った。詳細には、２ｍｍφの上部Ｐｔ上に３００ｇの荷重を数秒掛けて特性評価を行った。ｄ３３＝１２００ｐＣ／Ｎと非常に大きな値であった（図２８参照）。バルクの約２倍程度の大きさが容易に得られた。実施例３は純粋なＰＺＴであるため、添加元素等を検討すれば、５−１０倍の値が得られる可能性は非常に高い。
　実施例３のサンプル（２０μｍ−ＰＺＴ膜）のＦＩＢ−ＳＥＭの断面像は、図３８（Ａ），（Ｂ）に示すとおりである。図３８（Ｂ）は図３８（Ａ）の拡大像である。
　図３８によれば、通常の多結晶ＰＺＴ膜の柱状構造は全く存在せず、非常に良好な単一結晶であることが分かる。しかしながら、ごく一部、他配向領域と思われる領域が見受けられたが、通常のＰＺＴ積層バルク体の一層として考えると、圧倒的な圧電性を保持していることは明確であり、ほぼ２０μｍ厚さにおいても、単結晶膜と言って良い圧倒的な圧電厚膜が得られた。
　図２５（Ａ）に示す実施例２（本発明１０μｍ）の強誘性ヒステリシス曲線によれば、比誘電率（εｒ）、残留分極値（Ｐｒ）、抗電圧（Ｖｃ）及び抗電界（Ｅｃ）は以下のとおりである。また、実施例２のＰＺＴ膜のキュリー温度（Ｔｃ）を測定したところ、以下のとおりであった。
　比誘電率（εｒ）＝約２００＠１ｋＨｚ
　キュリー温度（Ｔｃ）＝４０８℃
　残留分極値（Ｐｒ）＝約４０μＣ／ｃｍ２
　抗電圧（Ｖｃ）＝４４Ｖ
　抗電界（Ｅｃ）＝４４ｋＶ／ｃｍ
　図２６（Ａ）に示す比較例２（Ｋ１４８）の強誘性ヒステリシス曲線によれば、比誘電率（εｒ）、残留分極値（Ｐｒ）、抗電圧（Ｖｃ）及び抗電界（Ｅｃ）は以下のとおりである。また、比較例２のＰＺＴバルクのキュリー温度（Ｔｃ）を測定したところ、以下のとおりであった。
　Ｔｃ＝２８０℃
　εｒ＝２４００
　Ｐｒ＝３７．９２μＣ／ｃｍ２
　Ｅｃ＝１１．４２ｋＶ／ｃｍ
　Ｖｃ＝５７１Ｖ＠０．５ｍｍ（１１．４２Ｖ＠１０μｍ）
　図２７（Ａ）に示す比較例３（Ｋ１２９）の強誘性ヒステリシス曲線によれば、比誘電率（εｒ）、残留分極値（Ｐｒ）、抗電圧（Ｖｃ）及び抗電界（Ｅｃ）は以下のとおりである。また、比較例３のＰＺＴバルクのキュリー温度（Ｔｃ）を測定したところ、以下のとおりであった。
　εｒ＝８１００
　Ｔｃ＝１４５℃
　Ｐｒ＝２９．７６μＣ／ｃｍ２
　Ｖｃ＝２７５Ｖ＠０．５ｍｍ（Ｖｃ＝５．５Ｖ＠１０μｍ）
　Ｅｃ＝５．７ｋＶ／ｃｍ
　図２９は、実施例２（本発明１０μｍ）のサンプルの比誘電率と誘電損失（ｔａｎδ）の温度変化を周波数を１００ｋ，５００ｋ，１ＭＨｚと変化させて測定した結果を示す図である。
　詳細には、インピーダンスアナライザー（アジレントテクノロジーズ社製，ＨＰ４１９２Ａ）を用いて、測定する１０μｍ−ＰＺＴサンプルキャパシタをホットプレート（株式会社ＭＳＡファクトリー社製，ＰＨ−２１０−６００型（５０−６００℃））上で加熱しながら、比誘電率と誘電損失（ｔａｎδ）の温度変化を、周波数を１００ｋ，５００ｋ，１ＭＨｚと変化させて測定した。転移温度：Ｔｃ＝３９０℃，誘電損失：ｔａｎδ＝約２−３％であった。
　図３０は、実施例４のサンプルを示す断面図である。この実施例４のサンプルの作製方法は以下のとおりである。
　Ｓｉ基板２０１上にＺｒＯ２膜２０２を蒸着法により形成し、ＺｒＯ２膜２０２上にスパッタリングによってエピタキシャル成長によるＰｔ膜２０３を形成する。次いで、Ｐｔ膜２０３上にＳｒＲｕＯ３膜（ＳＲＯ膜）２０４を、図１に示すスパッタリング装置を用いて表２に示すスパッタ条件で成膜する。この際のスパッタリングターゲットの組成はＳｒ／Ｒｕ＝１：１．１５である。
　次いで、図１に示すスパッタリング装置を用い、表１に示す実施例１（本発明５μｍ）のスパッタ条件でＳＲＯ膜２０４上に膜厚１μｍのＰＺＴ膜２０５を成膜する。但し、ここでのＰＺＴ膜２０５の膜厚は１μｍであるため、表１に示す実施例１（本発明５μｍ）の成膜時間を７２０ｓにする。
　次いで、ＰＺＴ膜２０５上にＳｒＲｕＯ３膜（ＳＲＯ膜）２０６を成膜する。この際の成膜条件は上記のＳＲＯ膜２０４の成膜条件と同様である。次いで、ＳＲＯ膜２０６上にＰｔ膜２０７、ＳＲＯ膜２０８、膜厚１μｍのＰＺＴ膜２０９を順に成膜する。この際、Ｐｔ膜２０７の成膜条件は上記のＰｔ膜２０３の成膜条件と同様であり、ＳＲＯ膜２０８の成膜条件は上記のＳＲＯ膜２０４の成膜条件と同様であり、ＰＺＴ膜２０９の成膜条件は上記のＰＺＴ膜２０５の成膜条件と同様である。このようにして図３０に示す実施例４のサンプルを作製することができる。
Figure JPOXMLDOC01-appb-T000003
 　上記の実施例４のサンプルの結晶性をＸＲＤで評価した結果は図３１及び図３２に示す。図３１及び図３２は、実施例４のサンプルのＸＲＤパターンである。
　図３１及び図３２のＸＲＤパターンによれば次のことが分かる。
　１層目Ｐｔ電極（Ｐｔ膜２０３）と中間Ｐｔ電極（Ｐｔ膜２０７）の結晶性を比較すると、１層目Ｐｔ電極と比較して、中間Ｐｔ電極の場合、Ｐｔ（４００）ピークの半価幅が若干広く、若干ブロードになってはいるが、中間Ｐｔ電極も、エピタキシャル成長していることが分かった。
　次に、１層目ＰＺＴ（ＰＺＴ膜２０５）と２層目ＰＺＴ（ＰＺＴ膜２０９）の結晶性を比較すると、１層目ＰＺＴと比較して２層目ＰＺＴの場合、ＰＺＴ（００４）ピークの半価幅が若干広く、若干ブロードになってはいるが中間Ｐｔ電極含め、エピタキシャル成長していることが同様に分かった。
　図３３は、実施例５のサンプルをＦＩＢで断面観察した像である。この実施例５のサンプルは、図１２（Ｃ）に示す断面構造と同様である。また、実施例５の作製方法は以下のとおりである。
　Ｓｉ基板上にＺｒＯ２膜を蒸着法により形成し、ＺｒＯ２膜上にスパッタリングによってエピタキシャル成長によるＰｔ膜を形成する。次いで、図１に示すスパッタリング装置を用い、表１に示す実施例１（本発明５μｍ）のスパッタ条件でＰｔ膜上に膜厚１μｍのＰＺＴ膜を成膜する。但し、ここでのＰＺＴ膜の膜厚は１μｍであるため、表１に示す実施例１（本発明５μｍ）の成膜時間を７２０ｓにする。
　次いで、ＰＺＴ膜上にＰｔ膜、膜厚１μｍのＰＺＴ膜を順に成膜する。この際、Ｐｔ膜の成膜条件は前記のＰｔ膜の成膜条件と同様であり、ＰＺＴ膜の成膜条件は前記のＰＺＴ膜の成膜条件と同様である。このようにして図１２（Ｃ）に示す断面構造と同様の実施例５のサンプルを作製することができる。
　次に、実施例６のＰＺＴ膜及び比較例４のＰＺＴ膜それぞれの歪（応力）を図４８に示す方法で測定した。その結果、膜厚５μｍの比較例４のＰＺＴ膜が大きな応力を有するために、そのＰＺＴ膜表面にクラックが入る理由を確認した。以下に詳細に説明する。
　図４６は、実施例６の圧電体膜の製造方法を説明するための断面図である。
　図４６に示すように、Ｓｉ基板１１０１上に膜厚１５ｎｍのＺｒＯ２膜１１０２を蒸着法により形成した。この後、このＺｒＯ２膜１１０２を有するＳｉ基仮１１０１の曲率半径を図４８に示すＸＲＤを用いた簡易応力測定法により測定した。詳細には、ＺｒＯ２膜１１０２を有するＳｉ基板１１０１をωスキャンしながらロッキングカーブを測定することにより曲率半径を求め、Ｓｉ基板の反りを評価した。ＸＹステージを用いてサンプル（実施例６の基板）の移動量（ΔＸ）に対するロッキングカーブピーク位置のシフト量から単結晶基板の反りの度合いを曲率半径として評価した。その結果は、６６．３°であった。
　次いで、ＺｒＯ２膜１１０２上にスパッタリングによってエピタキシャル成長による膜厚１００ｎｍのＰｔ膜１１０３を形成し、Ｐｔ膜１１０３上に膜厚２０ｎｍのＳｒＲｕＯ３膜１１０４をスパッタリングによって形成した。次いで、ＳｒＲｕＯ３膜１１０４上に膜厚４μｍのＰＺＴ膜１１０５を図１に示すスパッタリング装置を用いて形成した。この後、このＰＺＴ膜１１０５を有するＳｉ基板１１０１の曲率半径を図４８に示すＸＲＤを用いた簡易応力測定法により測定した。その結果は、４４．１°であった。両者の曲率半径の差（６６．３°−４４．１°）がＰＺＴ膜の内部応力を近似しており、その値は２２．２°となった。
　なお、ＰＺＴ膜１１０５の組成は、Ｚｒ／Ｔｉ＝０．５８／０．４２であって、Ｚｒを多く含むロンボヘドラル組成であった。
　図４７は、比較例４の圧電体膜の製造方法を説明するための断面図である。
　図４７に示すように、Ｓｉ基板１１０１上に膜厚１５ｎｍのＹＳＺ膜１１０６を蒸着法により形成した。この後、このＹＳＺ膜１１０６を有するＳｉ基板１１０１の曲率半径を図４８に示すＸＲＤを用いた簡易応力測定法により測定した。その結果は、８３．５°であった。なお、ＹＳＺ膜１１０６は、Ｚｒに８％Ｙを添加した合金を酸化した状態の膜である。
　次いで、ＹＳＺ膜１１０６上にスパッタリングによってエピタキシャル成長による膜厚１００ｎｍのＰｔ膜１１０３を形成し、Ｐｔ膜１１０３上に膜厚２０ｎｍのＳｒＲｕＯ３膜１１０４をスパッタリングによって形成した。次いで、ＳｒＲｕＯ３膜１１０４上に膜厚５μｍのＰＺＴ膜１１０５を図１に示すスパッタリング装置を用いて形成した。この後、このＰＺＴ膜１１０５を有するＳｉ基板１１０１の曲率半径を図４８に示すＸＲＤを用いた簡易応力測定法により測定した。その結果は、４３．９°であった。両者の曲率半径の差（８３．５°−４３．９°）がＰＺＴ膜の内部応力を近似しており、その値は３９．６°となった。
　なお、ＰＺＴ膜１１０５の組成は、Ｚｒ／Ｔｉ＝０．５２／０．４８であって、ＭＰＢ（モルフォトロピック）組成であった。
　上記のことから、図４６の実施例６のＰＺＴ膜の内部応力（曲率半径の差）を、図４７の比較例４のＰＺＴ膜の内部応力の約半分に低減できることが確認された。このように内部応力を低減できた理由は、Ｓｉ基板とＰｔ膜との間にＺｒＯ２膜を形成したためである。
　図４９は、図４８に示す比較例４のＰＺＴ膜１１０５の表面の光学顕微鏡写真である。この写真からＰＺＴ膜全体に数ミクロン□に全面クラックが発生していることが分かる。このクラックは比較例４のＰＺＴ膜１１０５を成膜して約２時間後に発生したものである。
　以上説明したように、比較例のＰＺＴ膜では５μｍ以上の膜厚で成膜することができないことが確認された。 By using the sputtering apparatus shown in FIG. 1 and forming a PZT film on the substrate under the sputtering conditions shown in Table 1, a sample of Example 1 (present invention 5 μm), a sample of Example 2 (present invention 10 μm), A sample of Example 3 (20 μm of the present invention) and a sample of Comparative Example 1 (conventional example) were prepared. As the substrate here, a ZrO 2 film was formed on a Si substrate by a vapor deposition method, and a Pt film formed by epitaxial growth as a lower electrode was formed on this ZrO 2 film by sputtering.
Figure JPOXMLDOC01-appb-T000001
 The composition of the sputtering target and the composition of the sample when producing the samples of Examples 1, 2, 3 and Comparative Example 1 are as follows.
<Composition of sputtering target>
Example 1 (Invention 5 μm): Pb / Zr / Ti = 130/58/42
Example 2 (Invention 10 μm): Pb / Zr / Ti = 130/58/42
Example 3 (Invention 20 μm): Pb / Zr / Ti = 130/58/42
Comparative example 1 (conventional example): Pb / Zr / Ti = 130/58/42
<Sample composition>
Example 1 (Invention 5 μm): Pb / Zr / Ti = 109/55/45
Example 2 (Invention 10 μm): Pb / Zr / Ti = 105/55/45
Example 3 (Invention 20 μm): Pb / Zr / Ti = 102/55/45
Comparative example 1 (conventional example): Pb / Zr / Ti = 98/55/45
The surface resistance value of the sputtering target before film formation and the surface resistance value of the sputtering target after film formation are measured by using an insulation resistance measuring instrument (MODEL: ADC5450 (Ultra High Resistance Meter)) corresponding to a ferroelectric measurement system. The distance was 5 mm, and the measurement voltage was 10 V. The measurement results are as follows.
<Surface resistance value of sputtering target before film formation>
Central part of sputtering target: 2.03 × 10 11 Ω · cm
Between the central portion and the outer peripheral portion of the sputtering target: 2.10 × 10 11 Ω · cm
Outer peripheral part of sputtering target: 5.39 × 10 10 Ω · cm
<Surface resistance value of sputtering target after film formation>
Central part of sputtering target: 4.95 × 10 11 Ω · cm
Between the central portion and the outer peripheral portion of the sputtering target: 1.45 × 10 12 Ω · cm
Outer peripheral part of sputtering target: 3.49 × 10 11 Ω · cm
FIG. 16A is an image obtained by observing a cross section of the sample of Example 1 with an FIB (Focused Ion Beam), and FIG. 16B is an image obtained by observing the cross section of the sample of Example 2 with an FIB. The thickness of the PZT film of Example 1 was 5.18 μm, and the thickness of the PZT film of Example 2 was 9.99 μm. These film thicknesses are Tilt correction values. The reason why this tilt correction is necessary is as follows. (1) When cutting with FIB is repeated, field of view shifts in the observed image. Since the cutting area is shifted from the center of the SEM image, correction is required. (2) The FIB cut surface is not perpendicular to the optical axis of observation. Since an inclined surface is seen, the vertical and horizontal scales differ in the image and correction is required. For the above reasons, it is necessary to correct the tilt angle and correct the measured length.
FIG. 17 is a diagram showing the results of evaluating the crystallinity of the PZT film of Example 1 and the PZT film of Example 2 by XRD (X-Ray Diffraction). The XRD (002) peak value of the PZT film is higher than the XRD (200) peak value of the Pt film. This is because the thickness of the PZT film is 5 μm or more.
Wide area reciprocal lattice mapping was performed on the samples of Examples 1, 2, 3 and Comparative Example 1. An image of the reciprocal lattice map is shown in FIG.
The XRD data of this example uses a fully automatic horizontal multipurpose X-ray diffractometer SmartLab manufactured by Rigaku Corporation, and wide area reciprocal lattice mapping is measured by attaching a hybrid multidimensional pixel detector HyPix-3000 to SmartLab. went.
FIG. 19 is a diagram for explaining reciprocal lattice vectors and reciprocal lattice points on the crystal lattice plane (hkl). FIG. 20 is a diagram for explaining the vector notation of the X-ray diffraction conditions.
・Reciprocal lattice vector (g hkl )
Size: reciprocal of d value of (hkl) plane Direction: normal direction / reciprocal lattice mapping of (hkl) plane Measure the spread of reciprocal lattice points in reciprocal space.
Reciprocal lattice point: Conditions that cause diffraction / tip of reciprocal lattice vector Scattering vector: K = k−k 0
(Scattering vector K) = (reciprocal lattice vector g hkl )
-Reciprocal lattice map measurement The scattering vector K is scanned and the two-dimensional distribution of reciprocal lattice points is measured.
A reciprocal lattice simulation is performed in advance based on the crystal structure information, and the measured value is compared. The reciprocal lattice map is plotted with the following qx and qz equations.
Figure JPOXMLDOC01-appb-M000002
 Two planes were measured at 2θ of 10-120 °, Ω of 10-90 °, X of 0 °, 30 °, 60 ° and 90 °, and Φ of 0 ° and 45 °. Φ = 0 ° (// Si110), Φ = 45 ° (// Si100), and each sample Φ = 0 ° and 45 ° were measured.
In the case of conventional θ-2θ measurement, measurement is performed by fixing the substrate horizontally and irradiating X-rays (see FIG. 21A).
θ-2θ measurement is performed while scanning the ω axis (the rotation axis of the material) and the χ axis (the turning operation axis). Further, the φ axis (in-plane rotation axis) was measured at 0 ° and 45 ° at two points. After θ-2θ / ω-axis scanning measurement, qzvs. What is plotted in qx is reciprocal lattice mapping. By simultaneously scanning several steps of χ axes, reciprocal lattice mapping and superimposing all over one surface, different components of the domain are measured, and the superiority or inferiority of the true orientation degree is known ( (See FIGS. 21B and 21C).
Using Rigaku's software SmartLab Guidance, as shown in Fig. 22, the arrangement of reciprocal lattice points is simulated in advance based on the known PZT crystal structure information and superimposed on the measured values to analyze the film state. Went.
FIG. 23 shows a reciprocal lattice simulation result of the PZT single crystal.
24A and 24B show the results of reciprocal lattice map measurement of the samples of Example 1 (present invention 5 μm) and Example 2 (present invention 10 μm). As shown in these drawings, it is found that the PZT films of Examples 1 and 2 are excellent single crystal films, which completely coincides with the calculated reciprocal lattice point (× point) of the PZT single crystal.
As shown in Table 1, in the conventional example, since a high-frequency continuous wave was used without using a pulse, when the output was increased to 1800 W or more (10 W / cm 2 or more), an arc was generated and the plasma was abnormally discharged. As a result, the output of the sputtering apparatus could not be increased to 1800 W or more. On the other hand, in Example 1 (the present invention 5 μm), Example 2 (the present invention 10 μm) and Example 3 (the present invention 20 μm), a high frequency output of 13.56 MHz was applied to the sputtering target at a pulse frequency of 5 kHz (1 / Since a pulse with a 90% DUTY ratio was supplied at a cycle of 5 ms), a time during which no plasma was generated on the sputtering target was generated when the high-frequency output was in an off state, and as a result, the film thickness was thick with a short film formation A PZT film could be easily formed.
FIG. 25 (A) is a diagram showing strongly attractive hysteresis curves of Example 1 (present invention 5 μm), Example 2 (present invention 10 μm), and Example 3 (present invention 20 μm), and FIG. ) Shows the piezoelectric butterfly curves of Examples 1 to 3. FIG.
As shown in FIGS. 25A and 25B, it was confirmed that ferroelectricity and piezoelectricity proportional to the thickness of the PZT film were obtained. Further, in the sample of Example 3 having a film thickness of 20 μm, a very large Vc of 87 V was obtained. Moreover, when the Curie temperature Tc of the PZT film | membrane of Example 3 was measured, it was Tc = 390 degreeC.
FIG. 26A is a diagram showing a strong attractive hysteresis curve of Comparative Example 2 (K148), and FIG. 26B is a diagram showing a piezoelectric butterfly curve of Comparative Example 2 (K148).
FIG. 27A is a diagram showing a strongly attractive hysteresis curve of Comparative Example 3 (K129), and FIG. 27B is a diagram showing a piezoelectric butterfly curve of Comparative Example 3 (K129).
Comparative Example 2 (K148) and Comparative Example 3 (K129) are bulk piezoelectric elements manufactured by Reed Techno Co., Ltd. (1-5 Yokoya, Oecho, Otsu City, Shiga Prefecture 520-2194, Ryukoku University REC202B). The piezoelectric element has a disk shape with a diameter of 8 mm × thickness of about 0.5 mm (500 μm). As a piezoelectric element of Comparative Example 2 (K148) and Comparative Example 3 (K129), a hard PZT (K148) generally used and a soft PZT (K129) related to the displacement amount were compared.
First, the transition temperature (Tc), piezoelectric constant d33 (pC / N), and relative dielectric constant εr in the catalog values were as follows.
Tc of K129: 145 ° C
K129 d33: 720
Εr of K129: 8100
K148 Tc: 280 ° C.
K148 d33: 530
Εr of K148: 2400
Unlike general K148, K129 related to piezoelectric displacement is added with elements such as Ni and Nb, and the relative dielectric constant is as large as 8000 or more, and accordingly, the piezoelectric displacement can be increased and used for actuator applications. However, at the same time, Tc = 145 ° C. is very low, and the temperature characteristics are poor, so the required location is limited.
The general bulk K148 has a butterfly shape that is optimal for sensor applications (see FIG. 26B), but the coercive electric field Ec = 11.42 kV / cm of the bulk K148 is compared with the example of the present invention. Therefore, when converted per 20 μm, the coercive electric field Ec = 11.42 kV / cm becomes 22.84 V / 20 μm, and the coercive voltage Vc = 28.84 V is very low. In the case of K129 for actuators, the coercive electric field Ec = 5.7 kV / cm is 11.4 V / 20 μm, the coercive voltage Vc is 11.4 V, and Tc = 145 ° C. is also low. During heat treatment such as reflow (generally around 280 ° C.), there was a common bulk problem that depolarization easily occurred and piezoelectricity was lost.
On the other hand, the coercive voltage Vc of the sample of the PZT single crystal film of Example 3 (the present invention 20 μm) is 87 V / 20 μm. Further, since Tc is as high as 300 ° C. or higher, there is no fear of depolarization at all even when potential application such as reflow temperature or static electricity during processing occurs.
The laminated body by PZT bulk is formed by laminating the bulks of Comparative Examples 2 and 3 having a thickness of about 20 μm per layer, and the coercive voltage Vc per layer is at most about 25V. Moreover, in order to draw out large piezoelectricity, it contains many additives and the transition temperature Tc is often 200 ° C. or less. As a result, when the laminate is completed, it is often depolarized and cannot be operated at all. On the other hand, the sample of Example 3 (20 μm of the present invention) has a coercive voltage Vc of 87 V / 20 μm and Tc = 390 ° C. (actual measurement value), and no depolarization occurs at all.
Next, d33 evaluation of the PZT film of Example 3 (the present invention 20 μm) was performed. Specifically, the characteristics were evaluated by applying a load of 300 g on the upper part Pt of 2 mmφ for several seconds. It was a very large value of d33 = 1200 pC / N (see FIG. 28). A size of about twice the bulk was easily obtained. Since Example 3 is pure PZT, if an additive element or the like is examined, the possibility of obtaining a value 5 to 10 times is very high.
The cross-sectional images of FIB-SEM of the sample of Example 3 (20 μm-PZT film) are as shown in FIGS. FIG. 38B is an enlarged image of FIG.
According to FIG. 38, it can be seen that there is no columnar structure of a normal polycrystalline PZT film, and it is a very good single crystal. However, only a part of the region that seems to be another orientation region was observed, but when considered as a layer of a normal PZT laminated bulk body, it is clear that it retains overwhelming piezoelectricity and is approximately 20 μm thick. In this case, an overwhelming piezoelectric thick film that can be called a single crystal film was obtained.
According to the strongly induced hysteresis curve of Example 2 (the present invention 10 μm) shown in FIG. 25A, the relative permittivity (εr), the remanent polarization value (Pr), the coercive voltage (Vc), and the coercive electric field (Ec). Is as follows. Moreover, when the Curie temperature (Tc) of the PZT film | membrane of Example 2 was measured, it was as follows.
Relative permittivity (εr) = about 200 @ 1 kHz
Curie temperature (Tc) = 408 ° C.
Residual polarization value (Pr) = about 40 μC / cm 2
Coercive voltage (Vc) = 44V
Coercive electric field (Ec) = 44 kV / cm
According to the strongly attractive hysteresis curve of Comparative Example 2 (K148) shown in FIG. 26A, the dielectric constant (εr), remanent polarization value (Pr), coercive voltage (Vc), and coercive electric field (Ec) are as follows. It is as follows. Moreover, when the Curie temperature (Tc) of the PZT bulk of the comparative example 2 was measured, it was as follows.
Tc = 280 ° C
εr = 2400
Pr = 37.92μC / cm 2
Ec = 11.42 kV / cm
Vc=571V@0.5mm (11.42V@10μm)
According to the strongly attractive hysteresis curve of Comparative Example 3 (K129) shown in FIG. 27A, the dielectric constant (εr), remanent polarization value (Pr), coercive voltage (Vc), and coercive electric field (Ec) are as follows. It is as follows. Moreover, when the Curie temperature (Tc) of the PZT bulk of the comparative example 3 was measured, it was as follows.
εr = 8100
Tc = 145 ° C
Pr = 29.76 μC / cm 2
Vc=275V@0.5mm (Vc=5.5V@10μm)
Ec = 5.7 kV / cm
FIG. 29 is a diagram showing the results of measuring the temperature change of the relative permittivity and dielectric loss (tan δ) of the sample of Example 2 (the present invention 10 μm) while changing the frequency to 100 k, 500 k, and 1 MHz.
Specifically, using an impedance analyzer (manufactured by Agilent Technologies, HP4192A), a 10 μm-PZT sample capacitor to be measured is on a hot plate (manufactured by MSA Factory Co., Ltd., PH-210-600 type (50-600 ° C.)). The temperature change of the relative dielectric constant and dielectric loss (tan δ) was measured while changing the frequency to 100 k, 500 k, and 1 MHz while heating at 650 nm. Transition temperature: Tc = 390 ° C., dielectric loss: tan δ = about 2-3%.
30 is a cross-sectional view showing a sample of Example 4. FIG. The method for producing the sample of Example 4 is as follows.
A ZrO 2 film 202 is formed on the Si substrate 201 by vapor deposition, and a Pt film 203 is formed on the ZrO 2 film 202 by epitaxial growth by sputtering. Next, an SrRuO 3 film (SRO film) 204 is formed on the Pt film 203 under the sputtering conditions shown in Table 2 using the sputtering apparatus shown in FIG. The composition of the sputtering target at this time is Sr / Ru = 1: 1.15.
Next, using the sputtering apparatus shown in FIG. 1, a PZT film 205 having a thickness of 1 μm is formed on the SRO film 204 under the sputtering conditions of Example 1 (5 μm of the present invention) shown in Table 1. However, since the film thickness of the PZT film 205 here is 1 μm, the film formation time of Example 1 (the present invention 5 μm) shown in Table 1 is set to 720 s.
Next, an SrRuO 3 film (SRO film) 206 is formed on the PZT film 205. The film formation conditions at this time are the same as the film formation conditions for the SRO film 204 described above. Next, a Pt film 207, an SRO film 208, and a PZT film 209 having a thickness of 1 μm are sequentially formed on the SRO film 206. At this time, the film formation conditions for the Pt film 207 are the same as the film formation conditions for the Pt film 203, the film formation conditions for the SRO film 208 are the same as the film formation conditions for the SRO film 204, and the PZT film 209. The film forming conditions are the same as those for the PZT film 205 described above. In this way, the sample of Example 4 shown in FIG. 30 can be manufactured.
Figure JPOXMLDOC01-appb-T000003
 The results of evaluating the crystallinity of the sample of Example 4 by XRD are shown in FIGS. 31 and 32 are XRD patterns of the sample of Example 4. FIG.
According to the XRD patterns of FIGS. 31 and 32, the following can be understood.
When the crystallinity of the first layer Pt electrode (Pt film 203) and the intermediate Pt electrode (Pt film 207) is compared, the half value of the Pt (400) peak is higher in the case of the intermediate Pt electrode than in the first layer Pt electrode. Although the width was slightly wide and slightly broad, it was found that the intermediate Pt electrode was also epitaxially grown.
Next, when the crystallinity of the first layer PZT (PZT film 205) and the second layer PZT (PZT film 209) is compared, the second layer PZT has a PZT (004) peak in comparison with the first layer PZT. Although the half width was slightly wide and slightly broad, it was found that the epitaxial growth was performed including the intermediate Pt electrode.
FIG. 33 is an image obtained by observing a cross section of the sample of Example 5 using FIB. The sample of Example 5 is the same as the cross-sectional structure shown in FIG. The manufacturing method of Example 5 is as follows.
A ZrO 2 film is formed on the Si substrate by vapor deposition, and a Pt film is formed on the ZrO 2 film by epitaxial growth by sputtering. Next, using the sputtering apparatus shown in FIG. 1, a PZT film having a thickness of 1 μm is formed on the Pt film under the sputtering conditions of Example 1 (5 μm of the present invention) shown in Table 1. However, since the film thickness of the PZT film here is 1 μm, the film formation time of Example 1 (the present invention 5 μm) shown in Table 1 is set to 720 s.
Next, a Pt film and a PZT film having a thickness of 1 μm are sequentially formed on the PZT film. At this time, the film formation conditions for the Pt film are the same as the film formation conditions for the Pt film, and the film formation conditions for the PZT film are the same as the film formation conditions for the PZT film. In this manner, a sample of Example 5 similar to the cross-sectional structure shown in FIG. 12C can be manufactured.
Next, the strains (stresses) of the PZT film of Example 6 and the PZT film of Comparative Example 4 were measured by the method shown in FIG. As a result, since the PZT film of Comparative Example 4 having a film thickness of 5 μm has a large stress, the reason for cracks on the surface of the PZT film was confirmed. This will be described in detail below.
FIG. 46 is a cross-sectional view for explaining the method for manufacturing the piezoelectric film of the sixth embodiment.
As shown in FIG. 46, a ZrO 2 film 1102 having a film thickness of 15 nm was formed on the Si substrate 1101 by vapor deposition. Thereafter, the curvature radius of the Si substrate 1101 having the ZrO 2 film 1102 was measured by a simple stress measurement method using XRD shown in FIG. Specifically, the curvature radius was obtained by measuring the rocking curve while scanning the Si substrate 1101 having the ZrO 2 film 1102 while ω scanning, and the warpage of the Si substrate was evaluated. The degree of curvature of the single crystal substrate was evaluated as the radius of curvature from the amount of shift of the rocking curve peak position with respect to the amount of movement (ΔX) of the sample (substrate of Example 6) using an XY stage. The result was 66.3 °.
Next, a Pt film 1103 having a thickness of 100 nm was formed by epitaxial growth on the ZrO 2 film 1102 and an SrRuO 3 film 1104 having a thickness of 20 nm was formed on the Pt film 1103 by sputtering. Then, it formed using the sputtering apparatus shown in FIG. 1 the PZT film 1105 having a thickness of 4μm onto a SrRuO 3 film 1104. Thereafter, the radius of curvature of the Si substrate 1101 having the PZT film 1105 was measured by a simple stress measurement method using XRD shown in FIG. The result was 44.1 °. The difference between the radii of curvature (66.3 ° -44.1 °) approximated the internal stress of the PZT film, and the value was 22.2 °.
The composition of the PZT film 1105 was Zr / Ti = 0.58 / 0.42, and was a rhombohedral composition containing a large amount of Zr.
FIG. 47 is a cross-sectional view for explaining the method of manufacturing the piezoelectric film of Comparative Example 4.
As shown in FIG. 47, a YSZ film 1106 having a thickness of 15 nm was formed on a Si substrate 1101 by an evaporation method. Thereafter, the radius of curvature of the Si substrate 1101 having the YSZ film 1106 was measured by a simple stress measurement method using XRD shown in FIG. The result was 83.5 °. The YSZ film 1106 is a film obtained by oxidizing an alloy obtained by adding 8% Y to Zr.
Next, a 100-nm-thick Pt film 1103 was formed by epitaxial growth on the YSZ film 1106, and a 20-nm-thick SrRuO 3 film 1104 was formed on the Pt film 1103 by sputtering. Next, a PZT film 1105 having a thickness of 5 μm was formed on the SrRuO 3 film 1104 using the sputtering apparatus shown in FIG. Thereafter, the radius of curvature of the Si substrate 1101 having the PZT film 1105 was measured by a simple stress measurement method using XRD shown in FIG. The result was 43.9 °. The difference in radius of curvature (83.5 ° -43.9 °) of both approximates the internal stress of the PZT film, and the value is 39.6 °.
Note that the composition of the PZT film 1105 was Zr / Ti = 0.52 / 0.48, which was an MPB (morphotropic) composition.
From the above, it was confirmed that the internal stress (difference in curvature radius) of the PZT film of Example 6 in FIG. 46 can be reduced to about half of the internal stress of the PZT film of Comparative Example 4 in FIG. The reason why the internal stress can be reduced in this manner is that a ZrO 2 film is formed between the Si substrate and the Pt film.
FIG. 49 is an optical micrograph of the surface of the PZT film 1105 of Comparative Example 4 shown in FIG. From this photograph, it can be seen that the entire PZT film has cracks of several microns square. This crack was generated about 2 hours after the PZT film 1105 of Comparative Example 4 was formed.
As described above, it was confirmed that the PZT film of the comparative example cannot be formed with a film thickness of 5 μm or more.
　１１　　チャンバー
　１２　　基板
　１３　　保持部
　１４　　スパッタリングターゲット
　１５　　ターゲット保持部
　１６　　出力供給機構
　１７　　第１のガス導入源
　１８　　第２のガス導入源
　１９　　真空排気機構
　２０　　磁石
　２１　　回転機構
　２２　　整合器
　２３　　ＶＤＣ制御部
　３１，３２　　矢印，分極方向
　３５　　シム
　３６　　接着層
　３７　　積層膜
１０１，１２１，１４１，１５１，１６１　　Ｓｉ基板
１０２，１２２，１４２，１５２，１６２　　ＺｒＯ２膜
１０３，１２３，１４３，１５３　　Ｐｔ膜
１０３ａ，１１１ａ，１２３ａ，１４３ａ，１４５ａ　第１の電極
１０３ｂ、１１１ｂ．１２３ｂ，１４３ｂ，１４５ｂ　第２の電極
１０３ｃ、１１１ｃ，１２３ｃ，１４３ｃ，１４５ｃ　第３の電極
１０３ｄ　第４の電極
１０３ｅ　第５の電極
１０４　　ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜，第１のＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１０５，１１２，１３３　　接着用ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１０６，１０７　　電極
１２４　　第２のＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１２５　　接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜
１２５ａ　結晶化された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜
１２６　　Ｐｔ膜
１２７　　接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜
１２７ａ　結晶化された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜
１３２，１４４，１５４　　ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１６３，１６５，１６７，１６９，１７１，１７３，１７５　　Ｐｔ膜
１６４　　１層目ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１６６　　２層目ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１６８　　３層目ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１７０　　４層目ＰｂａＺｒｂＴｉｃＮｂｄＬａｅＯ３膜
１７２，１７４　　感光性永久レジスト膜
１７２ａ，１７２ｂ，１７４ａ，１７４ｂ，１７４ｃ　永久レジスト膜 DESCRIPTION OF SYMBOLS 11 Chamber 12 Substrate 13 Holding part 14 Sputtering target 15 Target holding part 16 Output supply mechanism 17 1st gas introduction source 18 2nd gas introduction source 19 Vacuum exhaust mechanism 20 Magnet 21 Rotation mechanism 22 Matching device 23 V DC control part 31 , 32 arrow, polarization direction 35 shim 36 adhesive layer 37 laminated film 101, 121, 141, 151, 161 Si substrate 102, 122, 142, 152, 162 ZrO 2 film 103, 123, 143, 153 Pt film 103a, 111a, 123a, 143a, 145a The first electrodes 103b, 111b. 123b, 143b, 145b Second electrode 103c, 111c, 123c, 143c, 145c Third electrode 103d Fourth electrode 103e Fifth electrode 104 Pb a Zr b Ti c Nb d La e O 3 film, first Pb a Zr b Ti c Nb d La e O 3 film 105,112,133 adhesive Pb a Zr b Ti c Nb d La e O 3 film 106, 107 electrode 124 the second Pb a Zr b Ti c Nb d La e O 3 film 125 for bonding (Pb a La b ) (Zr c T i d N b e ) O 3-δ film 125a for crystallized bonding (Pb a La b ) (Zr c T i d N b e ) O 3− [delta] film 126 Pt film 127 adhesive (Pb a La b) (Zr c Ti d Nb e) O 3-δ film 127a crystallized adhesive (Pb a La b) (Z c Ti d Nb e) O 3 -δ film 132,144,154 Pb a Zr b Ti c Nb d La e O 3 film 163,165,167,169,171,173,175 Pt film 164 first layer Pb a Zr b Ti c Nb d La e O 3 film 166 2nd layer Pb a Zr b Ti c Nb d La e O 3 film 168 3rd layer Pb a Zr b Ti c Nb d La e O 3 film 1704 4th layer Pb a Zr b Ti c Nb d La e O 3 film 172, 174 photosensitive permanent resist film 172a, 172b, 174a, 174b, 174c permanent resist film

Claims (41)

  1. 　膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜であり、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体膜。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a film thickness of 5 μm or more,
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    The (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film has a relative dielectric constant per 1 μm thickness of 100 to 600,
    Wherein (Pb a La b) (Zr c Ti d Nb e) O 3-δ film, the coercive voltage and 20 [mu] C / cm 2 or more 50 .mu.C / cm 2 or less of residual polarization value of 15V per following thickness 1μm or 3V A piezoelectric film having at least one of them.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  2. 　請求項１において、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は電極上に形成されており、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記電極のＸＲＤのピーク値より高いことを特徴とする圧電体膜。     In claim 1,
    The (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is formed on the electrode,
    The piezoelectric film, wherein the XRD peak value of the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is higher than the XRD peak value of the electrode.
  3. 　請求項２において、
    　前記電極はＰｔ膜からなることを特徴とする圧電体膜。     In claim 2,
    The piezoelectric film is characterized in that the electrode is made of a Pt film.
  4. 　請求項１乃至３のいずれか一項において、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のキュリー温度は２５０℃以上４２０℃以下であることを特徴とする圧電体膜。     In any one of Claims 1 thru | or 3,
    The piezoelectric film, wherein the Curie temperature of the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is 250 ° C. or higher and 420 ° C. or lower.
  5. 　シムの上面に配置された第１の電極と、
    　前記第１の電極上に配置された請求項１に記載の圧電体膜と、
    　前記圧電体膜上に配置された第２の電極と、
    　前記シムの下面に配置された第３の電極と、
    　前記第３の電極下に配置された請求項１に記載の圧電体膜と、
    　前記圧電体膜下に配置された第４の電極と、
    を具備することを特徴とするバイモルフ素子。     A first electrode disposed on the upper surface of the shim;
    The piezoelectric film according to claim 1 disposed on the first electrode;
    A second electrode disposed on the piezoelectric film;
    A third electrode disposed on the lower surface of the shim;
    The piezoelectric film according to claim 1 disposed under the third electrode;
    A fourth electrode disposed under the piezoelectric film;
    The bimorph element characterized by comprising.
  6. 　基板上にスパッタリング法により膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する工程を有し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する際の成膜速度は１ｎｍ／ｓｅｃ以上２．５ｎｍ／ｓｅｃ以下であることを特徴とする圧電体膜の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     Forming a (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more on the substrate by a sputtering method;
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    A piezoelectric film characterized in that a film formation rate when forming the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is 1 nm / sec or more and 2.5 nm / sec or less. Manufacturing method.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  7. 　請求項６において、
    　前記工程は、スパッタリングターゲットに１０ｋＨｚ以上３０ＭＨｚ以下の高周波出力を、１／２０ｍｓ以上１／３ｍｓ以下の周期で２５％以上９０％以下のＤＵＴＹ比のパルス状に供給することで、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を成膜する工程であり、
    　前記ＤＵＴＹ比は、１周期の間で前記スパッタリングターゲットに前記高周波出力が印加される期間の比率であることを特徴とする圧電体膜の製造方法。     In claim 6,
    In the step, a high frequency output of 10 kHz or more and 30 MHz or less is supplied to the sputtering target in a pulse form having a duty ratio of 25% or more and 90% or less at a period of 1/20 ms or more and 1/3 ms or less, so that the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film forming step,
    The method of manufacturing a piezoelectric film, wherein the DUTY ratio is a ratio of a period during which the high-frequency output is applied to the sputtering target during one period.
  8. 　請求項７において、
    　前記スパッタリングターゲットに前記高周波出力を供給する際に２０ｒｐｍ以上１２０ｒｐｍ以下の速度で磁石を回転させることで前記スパッタリングターゲットに磁場を加えることを特徴とする圧電体膜の製造方法。     In claim 7,
    A method of manufacturing a piezoelectric film, wherein a magnetic field is applied to the sputtering target by rotating a magnet at a speed of 20 rpm to 120 rpm when supplying the high-frequency output to the sputtering target.
  9. 　請求項７または８において、
    　前記スパッタリングターゲットに前記高周波出力を供給している際に前記スパッタリングターゲットに発生する直流成分である電圧ＶＤＣを−２００Ｖ以上−８０Ｖ以下に制御することを特徴とする圧電体膜の製造方法。     In claim 7 or 8,
    A method of manufacturing a piezoelectric film, comprising: controlling a voltage VDC , which is a direct current component generated in the sputtering target when the high-frequency output is supplied to the sputtering target, to be −200 V or more and −80 V or less.
  10. 　請求項７乃至９のいずれか一項において、
    　前記スパッタリングターゲットに前記高周波出力を供給している際の前記スパッタリングターゲットの表面の比抵抗を１×１０９Ω・ｃｍ以上１×１０１２Ω・ｃｍ以下に制御することを特徴とする圧電体膜の製造方法。     In any one of Claims 7 thru | or 9,
    A piezoelectric film characterized by controlling a specific resistance of a surface of the sputtering target when the high-frequency output is supplied to the sputtering target to 1 × 10 9 Ω · cm to 1 × 10 12 Ω · cm. Manufacturing method.
  11. 　請求項７乃至１０のいずれか一項において、
    　前記スパッタリングターゲットに前記高周波出力を供給する際の前記スパッタリングターゲットは、下記式６の比のＯ２ガス及びＡｒガスの雰囲気に置かれることを特徴とする圧電体膜の製造方法。
    　０．１≦Ｏ２ガス／Ａｒガス≦０．３　・・・式６     In any one of Claims 7 thru | or 10,
    The method for manufacturing a piezoelectric film, wherein the sputtering target when supplying the high-frequency output to the sputtering target is placed in an atmosphere of O 2 gas and Ar gas having a ratio of the following formula 6.
    0.1 ≦ O 2 gas / Ar gas ≦ 0.3 Formula 6
  12. 　請求項７乃至１１のいずれか一項において、
    　前記スパッタリングターゲットに前記高周波出力を供給する際の前記スパッタリングターゲットは、０．１Ｐａ以上２Ｐａ以下の圧力雰囲気に置かれることを特徴とする圧電体膜の製造方法。     In any one of Claims 7 thru | or 11,
    The method for manufacturing a piezoelectric film, wherein the sputtering target when supplying the high-frequency output to the sputtering target is placed in a pressure atmosphere of 0.1 Pa or more and 2 Pa or less.
  13. 　請求項６乃至１２のいずれか一項において、
    　前記工程で成膜された前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記工程で成膜された前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜は、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体膜の製造方法。     In any one of Claims 6 thru | or 12,
    The (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film formed in the step has a relative dielectric constant per 1 μm of film thickness of 100 to 600,
    The (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film formed in the above step has a coercive voltage per 1 μm thickness of 3 V to 15 V and 20 μC / cm 2 to 50 μC / cm. A method of manufacturing a piezoelectric film, comprising at least one of remanent polarization values of 2 or less.
  14. 　請求項６乃至１３のいずれか一項において、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、前記基板の上面に対して垂直で上方向であることを特徴とする圧電体膜の製造方法。     In any one of Claims 6 thru | or 13,
    The method of manufacturing a piezoelectric film, wherein a polarization direction of the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is perpendicular to the upper surface of the substrate and is upward.
  15. 　膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第１の電極と、
    　前記第１の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜に貼り付けられた第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された膜厚が５μｍ以上の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
    　前記第２の電極及び前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜に貼り付けられた第３の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第３の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ形成された第３の電極と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more;
    A first electrode formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Second bonding (Pb a La b ) (Zr c Ti d ) affixed to the first electrode and the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film Nb e ) O 3-δ film;
    Said second adhesive (Pb a La b) (Zr c Ti d Nb e) O 3-δ film thickness formed on the 5μm or more second (Pb a La b) (Zr c Ti d Nb e ) O 3-δ film;
    A second electrode formed on the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Third bonding (Pb a La b ) (Zr c Ti d ) attached to the second electrode and the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film Nb e ) O 3-δ film;
    Third (Pb a La b ) (Zr c Ti d Nb e ) O 3− formed on the third bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film a δ film;
    A third electrode formed with the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ ;
    Comprising
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a relative dielectric constant per 1 μm thickness of 100 to 600,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a coercive voltage per film thickness of 3 V or more and 15 V or less, and 20 μC / cm 2 or more and 50 μC / cm or more. A piezoelectric element having at least one of remanent polarization values of 2 or less.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  16. 　請求項１５において、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第１の電極のＸＲＤのピーク値より高く、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第２の電極のＸＲＤのピーク値より高いことを特徴とする圧電体素子。     In claim 15,
    The peak value of XRD of the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is higher than the peak value of XRD of the first electrode,
    The XRD peak value of the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is higher than the XRD peak value of the second electrode. .
  17. 　請求項１５または１６において、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれはスパッタリング法により形成された膜であり、
    　前記第１及び第２の接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれはゾルゲル法により形成された膜であることを特徴とする圧電体素子。     In claim 15 or 16,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films is a film formed by a sputtering method,
    Each of the first and second bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films is a film formed by a sol-gel method.
  18. 　第１の電極と、
    　前記第１の電極上に形成された膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
    　前記第２の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の上に形成された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first electrode;
    A first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more formed on the first electrode;
    A second electrode formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Said second electrode and said first (Pb a La b) (Zr c Ti d Nb e) O 3-δ film adhesive formed on the (Pb a La b) (Zr c Ti d Nb e ) An O 3-δ film;
    For the adhesive (Pb a La b) (Zr c Ti d Nb e) O 3-δ film thickness pasted onto the membrane is 5μm or more second (Pb a La b) (Zr c Ti d Nb e ) An O 3-δ film;
    A third electrode formed on the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a relative dielectric constant per 1 μm thickness of 100 to 600,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a coercive voltage per film thickness of 3 V or more and 15 V or less, and 20 μC / cm 2 or more and 50 μC / cm or more. A piezoelectric element having at least one of remanent polarization values of 2 or less.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  19. 　第１の電極と、
    　前記第１の電極上に形成された膜厚が５μｍ以上の第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
    　前記第２の電極及び前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の上に形成された第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記第１乃至第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記第１乃至第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first electrode;
    A first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more formed on the first electrode;
    A second electrode formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Said second electrode and said first (Pb a La b) (Zr c Ti d Nb e) O 3-δ second (Pb a La b) formed on the film (Zr c Ti d Nb e ) an O 3-δ film;
    The second (Pb a La b) (Zr c Ti d Nb e) O 3-δ film thickness pasted on the membrane is not less than 5μm third (Pb a La b) (Zr c Ti d Nb e ) an O 3-δ film;
    A third electrode formed on the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    Each of the first to third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a relative dielectric constant per 1 μm thickness of 100 to 600,
    Each of the first to third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a coercive voltage per film thickness of 3 V or more and 15 V or less, and 20 μC / cm 2 or more and 50 μC / cm 2 or more. A piezoelectric element having at least one of remanent polarization values of 2 or less.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  20. 　請求項１９において、
    　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第３の電極の上に形成された接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に貼り付けられた膜厚が５μｍ以上の第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第４の電極と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     In claim 19,
    The third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the bonding (Pb a La b ) (Zr c Ti d Nb e ) formed on the third electrode ) An O 3-δ film;
    A fourth (Pb a La b ) (Zr c Ti d Nb e ) having a thickness of 5 μm or more attached on the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film. ) An O 3-δ film;
    A fourth electrode formed on the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16;
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  21. 　第１の電極と、
    　前記第１の電極上に形成された第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第２の電極と、
    　前記第２の電極上に形成された第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第３の電極と、
    を具備し、
    　前記第１の電極の第１の側面と前記第３の電極の第１の側面が第６の電極によって電気的に接続され、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たし、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、１００以上６００以下の膜厚１μｍ当たりの比誘電率を有し、
    　前記第１及び第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜それぞれは、３Ｖ以上１５Ｖ以下の膜厚１μｍ当たりの抗電圧及び２０μＣ／ｃｍ２以上５０μＣ／ｃｍ２以下の残留分極値の少なくとも一方を有することを特徴とする圧電体素子。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first electrode;
    A first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film formed on the first electrode;
    A second electrode formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    A second (Pb a La b) (Zr c Ti d Nb e) O 3-δ film formed on the second electrode,
    A third electrode formed on the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    A first side surface of the first electrode and a first side surface of the third electrode are electrically connected by a sixth electrode;
    a, b, c, d, e, and δ satisfy the following Equation 1 and Equations 11 to 16,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a relative dielectric constant per 1 μm thickness of 100 to 600,
    Each of the first and second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ films has a coercive voltage per film thickness of 3 V or more and 15 V or less, and 20 μC / cm 2 or more and 50 μC / cm or more. A piezoelectric element having at least one of remanent polarization values of 2 or less.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  22. 　請求項２１において、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向の逆方向であることを特徴とする圧電体素子。     In claim 21,
    The polarization direction of the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is the same as that of the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film. A piezoelectric element characterized by being in a direction opposite to the polarization direction.
  23. 　請求項２１または２２において、
    　前記第３の電極上に形成された第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第４の電極と、
    を具備し、
    　前記第２の電極の第２の側面と前記第４の電極の第２の側面が第７の電極によって電気的に接続され、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。     In claim 21 or 22,
    A third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film formed on the third electrode;
    A fourth electrode formed on the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    A second side surface of the second electrode and a second side surface of the fourth electrode are electrically connected by a seventh electrode;
    a, b, c, d, e, and δ satisfy the above-mentioned formula 1 and formulas 11 to 16;
  24. 　請求項２３において、
    　前記第４の電極上に形成された第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に形成された第５の電極と、
    を具備し、
    　前記第５の電極の第１の側面と前記第３の電極の第１の側面と前記第１の電極の第１の側面が前記第６の電極によって電気的に接続され、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子。     In claim 23,
    A fourth (Pb a La b) (Zr c Ti d Nb e) O 3-δ film formed on the fourth electrode,
    A fifth electrode formed on the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film;
    Comprising
    A first side surface of the fifth electrode, a first side surface of the third electrode, and a first side surface of the first electrode are electrically connected by the sixth electrode;
    a, b, c, d, e, and δ satisfy the above-mentioned formula 1 and formulas 11 to 16;
  25. 　請求項２１乃至２４において、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第１の電極のＸＲＤのピーク値より高く、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜のＸＲＤのピーク値は、前記第２の電極のＸＲＤのピーク値より高いことを特徴とする圧電体素子。     In claims 21 to 24,
    The peak value of XRD of the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is higher than the peak value of XRD of the first electrode,
    The XRD peak value of the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is higher than the XRD peak value of the second electrode. .
  26. 　基板上に電極膜を形成し、前記電極膜上にスパッタリング法により（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程（ｂ）と、
    　前記基板を前記電極膜から除去する工程（ｃ）と、
    　前記電極膜をエッチング加工することで、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第１の電極、第２の電極及び第３の電極を形成する工程（ｄ）と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     (A) forming an electrode film on the substrate, and forming a (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the electrode film by a sputtering method;
    Forming a (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film by a sol-gel method (B) and
    Removing the substrate from the electrode film (c);
    By etching the electrode film, the (Pb a La b) (Zr c Ti d Nb e) a first electrode under O 3-[delta] film, forming a second electrode and the third electrode (D) and
    Comprising
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  27. 　請求項２６において、
    　前記工程（ｄ）の後に、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を切断することで、前記第１の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第１の積層部と、前記第２の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第２の積層部と、前記第３の電極、前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を積層した第３の積層部を形成する工程と、
    　前記第１の積層部の前記第１の電極と前記第２の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜とを重ね、かつ前記第２の積層部の前記第２の電極と前記第３の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜とを重ねる工程と、
    　前記第１の積層部の前記第１の電極と前記第３の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜との間に荷重をかけつつ熱処理を施すことで、前記第１の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第１の電極それぞれと前記第２の積層部の前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付けるとともに、前記第２の積層部の前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜及び前記第２の電極それぞれと前記第３の積層部の前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
    を具備することを特徴とする圧電体素子の製造方法。     In claim 26,
    After the step (d), the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ By cutting the film, the first electrode, the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the bonding (Pb a La b ) (Zr c Ti d Nb e ) A first laminated portion in which an O 3-δ film is laminated, the second electrode, the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, and the bonding (Pb a La) b ) (Zr c Ti d Nb e ) O 3-δ film stacked second layer, the third electrode, (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and for the adhesive (Pb a La b) (Zr c Ti d Nb e) O 3-δ film third laminated to Forming a layer portion,
    The first for the adhesion of said first electrode and the second laminated portion of the laminated portion (Pb a La b) (Zr c Ti d Nb e) O 3-δ superimposed and film, and the second Stacking the second electrode of the stacked portion and the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film of the third stacked portion;
    While applying a load between the first laminated portion of the first electrode and the third for the adhesive of the laminate (Pb a La b) (Zr c Ti d Nb e) O 3-δ film By applying a heat treatment, the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the first electrode of the first stacked unit and the second stacked unit The (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is attached, and the second laminated portion (Pb a La b ) (Zr c Ti d Nb e ) O Attaching each of the 3-δ film and the second electrode to the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film of the third stacked portion;
    A method for manufacturing a piezoelectric element, comprising:
  28. 　請求項２６または２７において、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚は５μｍ以上であることを特徴とする圧電体素子の製造方法。     In claim 26 or 27,
    A method of manufacturing a piezoelectric element, wherein the film thickness of the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is 5 μm or more.
  29. 　第１の基板上に第１の電極膜を形成し、前記第１の電極膜上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極膜を形成し、前記第２の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第１の電極及び第２の電極を形成する工程（ｂ）と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第１及び第２の電極の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程（ｃ）と、
    　第２の基板上に第３の電極膜を形成し、前記第３の電極膜上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
    　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程（ｅ）と、
    　前記第１の基板及び前記第２の基板を除去する工程（ｆ）と、
    　前記第１の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第３の電極及び第４の電極を形成する工程（ｇ）と、
    　前記第３の電極膜をエッチング加工することで、前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極及び第６の電極を形成する工程（ｈ）と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first electrode film formed on the first substrate, forming a first first by sputtering on the electrode film of (Pb a La b) (Zr c Ti d Nb e) O 3-δ film Step (a) to perform,
    A second electrode film is formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, and the second electrode film is etched, whereby the first A step (b) of forming a first electrode and a second electrode on the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film of
    The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the first and second electrodes are bonded (Pb a La b ) (Zr c Ti d Nb e ) A step (c) of forming an O 3-δ film by a sol-gel method;
    A third electrode film is formed on the second substrate, and a second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is formed on the third electrode film by a sputtering method. Step (d), and
    A process of attaching the bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film (E) and
    Removing the first substrate and the second substrate (f);
    By etching the first electrode film, a third electrode and a fourth electrode are formed under the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film. Step (g);
    By etching the third electrode film, a fifth electrode and a sixth electrode are formed on the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film. Step (h);
    Comprising
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  30. 　第１の基板上に第１の電極膜を形成し、前記第１の電極膜上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ａ）と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極膜を形成し、前記第２の電極膜をエッチング加工することで、前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第１の電極及び第２の電極を形成する工程（ｂ）と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第１及び第２の電極の上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｃ）と、
    　第２の基板上に第３の電極膜を形成し、前記第３の電極膜上にスパッタリング法により第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程（ｅ）と、
    　前記第２の基板を除去する工程（ｆ）と、
    　前記第３の電極膜をエッチング加工することで、前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第３の電極及び第４の電極を形成する工程（ｇ）と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A first electrode film formed on the first substrate, forming a first first by sputtering on the electrode film of (Pb a La b) (Zr c Ti d Nb e) O 3-δ film Step (a) to perform,
    A second electrode film is formed on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, and the second electrode film is etched, whereby the first A step (b) of forming a first electrode and a second electrode on the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film of
    The first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, a second (Pb a La b ) (Zr c ) formed on the first and second electrodes by sputtering. A step (c) of forming a Ti d Nb e ) O 3-δ film;
    A third electrode film is formed on a second substrate, forming the third third by sputtering on the electrode film of (Pb a La b) (Zr c Ti d Nb e) O 3-δ film Step (d), and
    The second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film are attached. Step (e);
    Removing the second substrate (f);
    Etching the third electrode film forms the third electrode and the fourth electrode under the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film. Step (g);
    Comprising
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  31. 　請求項３０において、
    　前記工程（ｇ）の後に、前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第３及び第４の電極の上に接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜をゾルゲル法により形成する工程と、
    　第３の基板上に第４の電極膜を形成し、前記第４の電極膜上にスパッタリング法により第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
    　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極膜を形成し、前記第５の電極膜をエッチング加工することで、前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極及び第６の電極を形成する工程と、
    　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜、前記第５及び第６の電極の上にスパッタリング法により第５の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
    　第４の基板上に第６の電極膜を形成し、前記第６の電極膜上にスパッタリング法により第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
    　前記第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第５の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
    　前記第４の基板及び前記第６の電極膜を除去する工程と、
    　前記接着用（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と前記第６の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を貼り付ける工程と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。     In claim 30,
    After the step (g), the third (Pb a La b ) (Zr c T i d N b e ) O 3-δ film is bonded onto the third and fourth electrodes (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is formed by a sol-gel method;
    The third form the fourth electrode film on a substrate, forming the fourth on the electrode film by sputtering fourth (Pb a La b) (Zr c Ti d Nb e) O 3-δ film And a process of
    A fifth electrode film is formed on the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, and the fifth electrode film is etched to form the fourth electrode film. Forming a fifth electrode and a sixth electrode on the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film,
    The fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, the fifth (Pb a La b ) (Zr c ) by sputtering on the fifth and sixth electrodes. Forming a Ti d Nb e ) O 3-δ film;
    Fourth a sixth electrode film is formed on a substrate of, forming the sixth on the electrode film sputtering by the first 6 (Pb a La b) ( Zr c Ti d Nb e) O 3-δ film And a process of
    The sixth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the fifth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film are attached. Process,
    Removing the fourth substrate and the sixth electrode film;
    The bonding (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film and the sixth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film When,
    Comprising
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
  32. 　請求項３１において、
    　前記第３の基板を除去し、前記第４の電極膜をエッチング加工することで、前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜下に第７の電極及び第８の電極を形成する工程と、
    を具備することを特徴とする圧電体素子の製造方法。     In claim 31,
    The third substrate is removed, and the fourth electrode film is etched to form a seventh (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film under the seventh film. Forming an electrode and an eighth electrode;
    A method for manufacturing a piezoelectric element, comprising:
  33. 　基板上に第１の電極を形成する工程（ａ）と、
    　前記第１の電極上にスパッタリング法により第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｂ）と、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第２の電極を形成する工程（ｃ）と、
    　前記第２の電極上にスパッタリング法により第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｄ）と、
    　前記第２の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第３の電極を形成する工程（ｅ）と、
    　前記基板を前記第１の電極から除去する工程（ｆ）と、
    　前記第１の電極の第１の側面と前記第３の電極の第１の側面を第６の電極によって接続する工程（ｇ）と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     Forming a first electrode on the substrate (a);
    Forming a first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the first electrode by a sputtering method;
    Forming a second electrode on the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film (c);
    A step (d) of forming a second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the second electrode by a sputtering method;
    Forming a third electrode on the second (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film (e);
    Removing the substrate from the first electrode (f);
    Connecting the first side surface of the first electrode and the first side surface of the third electrode by a sixth electrode;
    Comprising
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  34. 　請求項３３において、
    　前記工程（ｅ）と前記工程（ｆ）との間に、
    　前記第３の電極上にスパッタリング法により第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｈ）と、
    　前記第３の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第４の電極を形成する工程（ｉ）と、を有し、
    　前記工程（ｆ）の後に、前記第２の電極の第２の側面と前記第４の電極の第２の側面を第７の電極によって接続する工程を有し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。     In claim 33,
    Between the step (e) and the step (f),
    Forming a third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the third electrode by a sputtering method;
    Forming a fourth electrode on the third (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film, (i),
    After the step (f), a step of connecting the second side surface of the second electrode and the second side surface of the fourth electrode by a seventh electrode,
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
  35. 　請求項３４において、
    　前記工程（ｉ）と前記工程（ｆ）との間に、
    　前記第４の電極上にスパッタリング法により第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程と、
    　前記第４の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜上に第５の電極を形成する工程と、を有し、
    　前記工程（ｇ）は、前記第１の電極の第１の側面と前記第３の電極の第１の側面と前記第５の電極の第１の側面を第６の電極によって接続する工程であり、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは前記の式１及び式１１~式１６を満たすことを特徴とする圧電体素子の製造方法。     In claim 34,
    Between the step (i) and the step (f),
    Forming a fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film on the fourth electrode by a sputtering method;
    Forming a fifth electrode on the fourth (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film,
    The step (g) is a step of connecting the first side surface of the first electrode, the first side surface of the third electrode, and the first side surface of the fifth electrode by a sixth electrode. ,
    A method of manufacturing a piezoelectric element, wherein a, b, c, d, e, and δ satisfy the above formulas 1 and 11 to 16.
  36. 　請求項２９乃至３５のいずれか一項において、
    　前記第１の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の膜厚は５μｍ以上であることを特徴とする圧電体素子の製造方法。     In any one of claims 29 to 35,
    A method of manufacturing a piezoelectric element, wherein the first (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film has a thickness of 5 μm or more.
  37. 　基板上にＺｒＯ２膜を形成する工程（ａ）と、
    　前記ＺｒＯ２膜上にエピタキシャル成長によるＰｔ膜を形成する工程（ｂ）と、
    　前記Ｐｔ膜上にスパッタリング法により膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜を形成する工程（ｃ）と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体膜の製造方法。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     Forming a ZrO 2 film on the substrate (a);
    A step (b) of forming a Pt film by epitaxial growth on the ZrO 2 film;
    (C) forming a (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more on the Pt film by a sputtering method;
    Comprising
    A method for producing a piezoelectric film, wherein a, b, c, d, e, and δ satisfy the following formula 1 and formulas 11 to 16.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  38. 　請求項３７において、
    　前記工程（ｂ）と前記工程（ｃ）との間に、前記Ｐｔ膜上にＳｒＲｕＯ３膜を形成する工程を含むことを特徴とする圧電体膜の製造方法。     In claim 37,
    A method of manufacturing a piezoelectric film, comprising a step of forming a SrRuO 3 film on the Pt film between the step (b) and the step (c).
  39. 　請求項３７または３８において、
    　前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜の分極方向は、前記基板の上面に対して垂直で上方向であることを特徴とする圧電体膜の製造方法。     In claim 37 or 38,
    The method of manufacturing a piezoelectric film, wherein a polarization direction of the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film is perpendicular to the upper surface of the substrate and is upward.
  40. 　ＺｒＯ２膜と、
    　前記ＺｒＯ２膜上に形成されたエピタキシャル成長によるＰｔ膜と、
    　前記Ｐｔ膜上に形成された膜厚が５μｍ以上の（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜と、
    を具備し、
    　ａ、ｂ、ｃ、ｄ、ｅ及びδは下記の式１及び式１１~式１６を満たすことを特徴とする圧電体膜。
    　０≦δ≦１　・・・式１
    　１．００≦ａ＋ｂ≦１．３５　・・・式１１
    　０≦ｂ≦０．０８　・・・式１２
    　１．００≦ｃ＋ｄ＋ｅ≦１．１　・・・式１３
    　０．４≦ｃ≦０．７　・・・式１４
    　０．３≦ｄ≦０．６　・・・式１５
    　０≦ｅ≦０．１　・・・式１６     A ZrO 2 film;
    An epitaxially grown Pt film formed on the ZrO 2 film;
    A (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film having a thickness of 5 μm or more formed on the Pt film;
    Comprising
    a, b, c, d, e, and δ satisfy the following formulas 1 and 11 to 16, respectively.
    0 ≦ δ ≦ 1 Equation 1
    1.00 ≦ a + b ≦ 1.35 Expression 11
    0 ≦ b ≦ 0.08 Expression 12
    1.00 ≦ c + d + e ≦ 1.1 Formula 13
    0.4 ≦ c ≦ 0.7 Formula 14
    0.3 ≦ d ≦ 0.6 Formula 15
    0 ≦ e ≦ 0.1 Equation 16
  41. 　請求項４０において、
    　前記Ｐｔ膜と前記（ＰｂａＬａｂ）（ＺｒｃＴｉｄＮｂｅ）Ｏ３−δ膜との間に形成されたＳｒＲｕＯ３膜を含むことを特徴とする圧電体膜。     In claim 40,
    A piezoelectric film comprising a SrRuO 3 film formed between the Pt film and the (Pb a La b ) (Zr c Ti d Nb e ) O 3-δ film.
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