WO2017016319A1

WO2017016319A1 - Dv/dt detection and protection apparatus and method

Info

Publication number: WO2017016319A1
Application number: PCT/CN2016/084951
Authority: WO
Inventors: 潘建斌; 金学成; 迟明
Original assignee: 英特格灵芯片(天津)有限公司
Priority date: 2015-07-28
Filing date: 2016-06-06
Publication date: 2017-02-02
Also published as: CN105024531A; CN105024531B; JP2017527131A

Abstract

A DV/DT detection and protection apparatus and method. The apparatus comprises: a DV/DT detection circuit for detecting the DV/DT voltage variation amount, the circuit comprising several high-voltage MOS tubes (MA1, MA2), resistors (R1, R2), clamp diodes (D1, D2) and parasitic capacitors (Cp1, Cp2), wherein input signals (IN1, IN2) access gate ends of the high-voltage MOS tubes (MA1, MA2), drain ends of the high-voltage MOS tubes (MA1, MA2) are connected to the resistors (R1, R2) and source ends thereof are connected to a common ground VSS, two ends of the resistors (R1, R2) are connected to the clamp diodes (D1, D2), and the parasitic capacitors (Cp1, Cp2) are connected between the drain ends and the source ends of the high-voltage MOS tubes (MA1, MA2); a DV/DT comparison circuit for determining a DV/DT level to which the voltage variation amount belongs according to the voltage variation amount and configuring a signal for controlling a working mode of an output drive adjustment circuit; and the output drive adjustment circuit for adjusting and outputting drive capabilities under different working modes according to a control signal, so as to guarantee that a power device works within a safe DV/DT range. The implementation method for the circuits is simple, and the circuits are high in reliability and integration, do not need an additional peripheral device, and are applicable to various applications, such as a bridge circuit and an intelligent power module.

Description

DV/DT detection and protection device and method

Technical field

The invention relates to a DV/DT detecting device, in particular to a DV/DT detecting and protecting device and method, and belongs to the technical field of intelligent power driving modules.

Background technique

With the continuous advancement of electronic power technology, high-voltage gate drive circuits and intelligent power modules (power drive modules that combine high-voltage gate drive circuits and power devices) are used in many fields such as motors, automation, and power systems. More and more important role.

The high voltage half-bridge topology is the most typical application scenario for high voltage gate drive circuits. A high-voltage gate drive circuit, a high-side power device (MOS or IGBT), and a low-side power device together form a half-bridge drive topology. As shown in FIG. 1, the gate driving circuit mainly includes a high side driving circuit and a low side driving circuit according to the operating power supply voltage, wherein the output HO of the high side driving circuit controls the switching of the high side MOSFET M1, and the output of the low side driving circuit. The LO controls the switch of the low side MOSFET M2. A bootstrap floating power supply consisting of a bootstrap diode Dbs and a bootstrap capacitor Cbs is used to supply power to the high side drive circuit. Therefore, the floating ground VS of the high side driving circuit changes with the switching state of the power device. As shown in FIG. 2, when HO changes from low to high, the LO output is low, the high side MOSFET M1 is turned on, and the output node VS of the half bridge drive system is switched from the ground potential to the power supply voltage at the DV/DT rate. In order to improve the efficiency of the half-bridge system and reduce the power consumption of the power device during the switching process, it is necessary to switch the power device at a faster speed. However, there are two bad mechanisms for VS to change at DV/DT rate. First, when VS changes at the rate of DV/DT, the parasitic capacitance Cds will flow through the displacement current (Id1), which will be in the gate drive circuit. The output impedance or the voltage drop across the capacitor Cgs, if the voltage drop exceeds the threshold of the MOSFET, it will cause the MOSFET to conduct falsely. Second, when the VS changes at the rate of DV/DT, the parasitic capacitance Cdb will also The displacement current (Id2) flows, and the voltage drop generated by the current on the parasitic resistance Rb is greater than the turn-on voltage of the parasitic transistor NPN, which also causes the NPN to be turned on, thereby triggering a large current. If the rate of change of VS DV/DT exceeds the defined range, the above two mechanisms will cause the low-side MOSFET M2 to be mis-conducted to cause the high-low side MOSFET to pass through or cause M2 to latch, thereby causing permanent damage to M2. How to make the power device work at a safer DV/DT switching rate. The prior art mainly adjusts the output driving capability of the gate driving circuit through peripheral discrete devices, thereby adjusting the DV/DT.

However, this method increases the cost of use, and is not conducive to the application of printed circuit board (PCB) layout, which is easy to increase various parasitic interference factors; in addition, this method is not suitable for fully integrated intelligent power modules, which cannot be effectively and conveniently Adjust the DV/DT to protect the power device.

Summary of the invention

The technical problem to be solved by the present invention is to overcome the deficiencies of the prior art, and to provide a DV/DT detection and protection device and method, which solves the prior art to adjust the output driving capability of the gate driving circuit by using a peripheral discrete device, and is not applicable to For fully integrated intelligent power modules, the DV/DT problem cannot be adjusted effectively and conveniently.

The present invention specifically adopts the following technical solutions to solve the above technical problems:

A DV/DT detection and protection device, comprising:

DV/DT detection circuit for detecting the voltage variation of DV/DT; the circuit comprises a plurality of high voltage MOS transistors, resistors, clamping diodes and parasitic capacitors, wherein the gate end of the high voltage MOS transistor is connected to an input signal, the high voltage MOS The drain end of the tube is connected to the resistor and the source is connected to the common ground; the two ends of the resistor are connected to the clamp diode; the parasitic capacitance is connected between the drain end and the source end of the high voltage MOS tube;

a DV/DT comparison circuit for determining a DV/DT level to which the voltage variation amount belongs according to the voltage variation amount, and configuring a signal for controlling an operation mode of the output drive adjustment circuit according to the DV/DT level;

The output drive adjustment circuit is configured to configure the operation mode and the output drive capability according to the control signal to ensure that the power device operates within a safe DV/DT range.

Further, as a preferred technical solution of the present invention, the DV/DT detecting circuit detects a voltage change of a displacement current of a parasitic capacitance caused by DV/DT on a resistance to obtain a voltage change amount.

Further, as a preferred technical solution of the present invention, the DV/DT comparison circuit includes a plurality of comparison levels and a window comparator connected thereto.

Further, as a preferred technical solution of the present invention, the window comparator configures a control signal output when the voltage change amount of the resistance in the DV/DT detecting circuit satisfies the comparison level.

Further, as a preferred technical solution of the present invention, the output drive adjustment circuit realizes adjustment of the driving capability by adjusting an impedance of the output drive tube or a power supply voltage.

The invention also provides a protection method based on the above DV/DT detection and protection device, comprising the steps of:

Detecting the amount of voltage change obtained by DV/DT;

Comparing the amount of voltage change obtained by detecting the DV/DT with a preset DV/DT level range, and determining the DV/DT level to which the voltage change amount belongs;

Compare the DV/DT level of the voltage change amount with the preset DV/DT safety level. When the DV/DT level value of the voltage change amount exceeds the DV/DT safety level, adjust the output drive capability to ensure the driven power device. Work in the safe DV/DT range.

Further, as a preferred technical solution of the present invention, the voltage variation amount of the DV/DT is proportional to the DV/DT level.

Further, as a preferred technical solution of the present invention, the DV/DT level range includes at least two level ranges.

Further, as a preferred technical solution of the present invention, when the DV/DT level value of the voltage change amount exceeds the DV/DT safety limit value, the output driving capability is gradually reduced.

Further, as a preferred technical solution of the present invention, the reduced output driving capability is realized by increasing the impedance of the output driving tube or lowering the power supply voltage.

The invention adopts the above technical solutions, and can produce the following technical effects:

(1) The DV/DT detection and protection device and method provided by the present invention automatically detects the DV/DT during the switching process of the power device, and when the DV/DT exceeds the set threshold, the drive circuit automatically adjusts the output drive capability. The power device operates in a reasonable and safe DV/DT range; the circuit implementation is simple, the reliability and integration are high, and no additional peripheral components are required, and is suitable for various applications such as a bridge circuit and an intelligent power module.

DRAWINGS

In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present invention, Those skilled in the art can also obtain other drawings based on these drawings without paying any creative work.

Figure 1 shows a prior art half bridge drive topology.

Figure 2 shows the MOSFET failure mechanism caused by DV/DT in the prior art.

3 is a schematic structural view of a DV/DT detecting and protecting device of the present invention.

4 is a schematic structural view of a DV/DT comparison circuit in the present invention.

5(a) is a normal level conversion process operation waveform of the DV/DT comparison circuit of the present invention; FIG. 5(b) is a DV/DT small process operation waveform of the DV/DT comparison circuit of the present invention; FIG. c) The DV/DT large process operation waveform of the DV/DT comparison circuit in the present invention.

Fig. 6 is a diagram showing the judgment of the DV/DT comparison circuit in the present invention.

Fig. 7 is a schematic view showing Embodiment 1 of the output drive adjustment circuit of the present invention.

Fig. 8 is a schematic view showing a second embodiment of the output drive adjustment circuit of the present invention.

detailed description

The embodiments of the present invention are described in detail below with reference to the accompanying drawings. It should be understood that the described embodiments are only a part of the embodiments of the invention, and not all of the embodiments. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative efforts are within the scope of the present invention.

The device for detecting and protecting DV/DT provided by the invention comprises a DV/DT detecting circuit, a DV/DT comparing circuit and an output driving adjusting circuit; wherein the DV/DT detecting circuit comprises a plurality of high voltage MOS tubes, resistors, clamping diodes and Parasitic capacitance. In this embodiment, as shown in FIG. 3, the DV/DT detecting circuit includes first and second high voltage MOS transistors, first and second resistors, first and second clamping diodes, and first and second parasitic Capacitor; the first high voltage MOS transistor MA1 has a gate terminal connected to the input signal IN1, a drain terminal connected to the first resistor R1, and the other end of the first resistor R1 is connected to the floating power source VB; the source terminal of the first high voltage MOS transistor MA1 is connected to the common source Ground VSS, the first resistor R1 is connected to the first clamp diode D1 at both ends; for the second high voltage MOS transistor MA2, the gate terminal is connected to the input signal IN2, the drain terminal is connected to the second resistor R2, and the other end of the second resistor R2 is connected. The floating power supply VB; the source terminal of the second high voltage MOS transistor MA2 is connected to the common ground VSS, and the two ends of the second resistor R2 are connected to the second clamping diode D2. The first parasitic capacitance Cpar1 is connected between the drain terminal and the source terminal of the first high voltage MOS transistor MA1, and the second parasitic capacitance Cpar2 is connected between the drain terminal and the source terminal of the second high voltage MOS transistor MA2. The high voltage level shifting function converts the inputs IN1 and IN2 of the low voltage domain into signals in the high voltage domain. The detection circuit is a voltage change obtained by detecting a displacement current of a parasitic capacitance caused by DV/DT on the resistance to obtain a voltage change amount.

The drain terminals of the first high voltage MOS transistor MA1 and the second high voltage MOS transistor MA2 detect the voltage change amount and send it to the DV/DT comparison circuit for comparison with the internal reference window, and output at least one control signal to configure the operation of the output drive adjustment circuit. Mode to adjust the output drive capability. The output drive adjustment circuit adjusts and outputs the drive capability in different operating modes according to the control signal to ensure that the power device operates within the safe DV/DT range.

In this embodiment, a specific implementation example of the DV/DT comparison circuit in the device is also given. As shown in FIG. 4, a comparison level Vref, window comparators Comp1 and Comp2, and inversion of the two comparators are included. The input terminals are connected to the comparison level Vref, the positive phase input terminals of the two window comparators are respectively connected to the output nodes A and B of the high voltage level conversion circuit, and the output CA and CB of the two window comparators are AND gates. The two inputs of Nor1 are connected, the output of Nor1 is connected to the S end of RS-Latch, and the R end of RS-Latch is connected to the reset signal UVLO. The working process is as follows. When the high-side MOSFET is turned on, the output node VS of the half-bridge circuit changes at the rate of DV/DT. Because the high-side driver circuit samples the bootstrap capacitor Cbs to provide a floating power supply, when the VS changes at the rate of DV/DT, the power supply VB of the high-side driver circuit also changes at the rate of DV/DT. At this time, due to the DV/DT change of VB, displacement currents are respectively generated on the first parasitic capacitance Cpar1 and the second parasitic capacitance Cpar2 of the first high voltage MOS transistor M1 and the second high voltage MOS transistor M2 in the high voltage level conversion circuit. . The current flows through the first resistor R1 and the second resistor R2 in the high voltage level shifting circuit to generate a voltage drop equal to the two resistors.

The first resistor R1 and the second resistor R2, the first high voltage MOS transistor MA1 and the second high voltage MOS transistor MA2 are all matched as much as possible. Therefore, if there is a voltage change of DV/DT on the floating power supply VB, the voltage drop generated on the two resistors should be substantially the same. The generated voltage drop is compared with the comparison level of the window comparator, respectively. If the voltage change on the two resistors satisfies the condition at the same time, the NOR gate outputs a high level, and the RS-Latch is set, and the output is active high. Gate_control signal. As shown in FIG. 5(a), when the high voltage level converter normally converts the signal, for example, the second high voltage MOS transistor M2 receives the signal, the first high voltage MOS transistor M1 is turned off, and only the second resistor R2 has a voltage change. The first resistor R1 does not, so the DV/DT comparison circuit outputs a low level Gate_control. If the power device switch has a small DV/DT on VB, as shown in Figure 5(b), the resulting displacement current is relatively small, and the voltage variations on the first resistor R1 and the second resistor R2 cannot be compared with the window comparator. The level Vref, DV/DT comparison circuit outputs a low level Gate_control. As shown in FIG. 5(c), when the DV/DT of the power device switch is relatively large on VB, the voltage change on the first resistor R1 and the second resistor R2 reaches the comparison level Vref of the window comparator, and DV/ at this time. The DT comparison circuit outputs a high level of Gate_control.

The DV/DT comparison circuit can also configure the control signal output when the voltage change amount across the first resistor R1 and the second resistor R2 exceeds the internal window comparison level of the DV/DT comparison circuit, and the output drive adjustment circuit responds to the event. And reduce the output drive capability, reducing the DV/DT to a safe range.

Both the DV/DT comparison circuit embodiment shown in Figures 4 and 5 contain only one window level, and the determined DV/DT level is relatively simple. Figure 6 is a schematic diagram of the DV/DT comparison circuit including a plurality of window comparison levels, which can be set according to the DV/DT level accuracy, thereby setting the DV/ according to the degree of voltage change on the resistor. The DT level is divided into multiple ranges, and a multi-bit Gate_control<n:1> signal is output.

For an output drive adjustment circuit in the device, the output drive adjustment circuit includes a first output drive tube for charging and a second output drive tube for discharging, and a drive coupled between the two output drive tubes An adjustment unit; the drive adjustment unit includes a plurality of sets of switch circuits, and the number of the switch circuits corresponds to the number of control signals. The present invention provides different embodiments, as shown in Figures 7 and 8, which are specific circuit configurations for the output drive adjustment circuit.

The output drive adjustment circuit of FIG. 7 includes a first output drive tube MP1 for charging and a second output drive tube MN1 for discharging, and a drive adjustment unit. As shown in FIG. 7, the drive adjustment unit is connected in series by two groups. The switch circuit is composed of a switch circuit composed of a resistor and a switch tube connected in parallel with the resistor; in FIG. 7, a switch circuit is composed of a switch tube MP2 and a resistor Rd1 connected in parallel thereto, the switch circuit receiving a signal from the Gate_control<1> . The other switching circuit is composed of a switching transistor MP3 and a resistor Rd2 connected in parallel thereto, the switching circuit receiving a signal from Gate_control<2>. For the first switching circuit, the first output driving transistor MP1, the switching transistor MP2, and the resistor Rd are used for the charging process of the circuit, and the second output driving transistor MN1 is used for the discharging process of the circuit. For the charging process of the circuit, it is controlled by the switching transistor MP2 to control the short circuit of the resistor Rd, and the output driving capability is adjusted by the resistor Rd. When the control signal Gate_control<1> outputted by the comparison circuit is low level, the switching transistor MP2 When turned on, the resistor Rd is short-circuited. When the Gate_control<1> of the comparison circuit output is at a high level, the resistor Rd is connected in series with the first output drive transistor MP1, and the driving capability is lowered. For the second switching circuit, the principle is the same as above.

The output drive adjustment circuit of FIG. 8 includes a first output drive transistor MP1 for charging and a second output drive transistor MN1 for discharging, and a drive adjustment unit. As shown in FIG. 8, the drive adjustment unit is connected in parallel by two groups. The switching circuit is composed. In Fig. 8, the first switching circuit is composed of a logic gate circuit NOR 1 and an output driving transistor MP2 controlled by a logic gate circuit NOR 1, which receives a signal from Gate_control<1>. The other switching circuit is composed of a logic gate circuit NOR 2 and an output driving transistor MP3 controlled by a logic gate circuit NOR 2, which receives a signal from Gate_control<2>. For the first switching circuit, the first output driving transistor MP1 and the output driving transistor MP2 and the logic gate circuit NOR 1 are used for the driving force adjustment of the circuit. As shown in the figure, the control signal Gate_control<1> outputted by the DV/DT comparison circuit is connected to the logic gate circuit NOR1; the output terminal of the logic gate circuit NOR 1 is connected to the gate of the output drive transistor MP2; DV/DT comparison circuit When the output control signal Gate_control<1> is low level, the output drive transistor MP2 is connected in parallel with the first output drive transistor MP1, and when the control signal Gate_control<1> outputted by the DV/DT comparison circuit is high level, only the first output drive is driven. The tube MP1 works and the driving capability is reduced. For the second switching circuit, the principle is the same as above.

Moreover, the output drive adjustment circuit can also adjust the output drive capability through the power supply voltage, or only adjust the output external sink current capability, but can also make relevant adjustments to the output pull-down current capability.

On the basis of the above device, the present invention also provides a DV/DT detection and protection method, and the method specifically includes:

Detecting the amount of DV/DT voltage change obtained;

Comparing the amount of DV/DT voltage change obtained by the detection with a preset DV/DT level range, and determining the DV/DT level to which the voltage change amount belongs;

Compare the DV/DT level of the voltage change amount with the preset DV/DT safety level. When the DV/DT level of the voltage change exceeds the DV/DT safety level, adjust the output drive capability to ensure that the driven power device works. In the safe DV/DT range.

Further, the voltage change amount may be obtained by comparing the voltage change value, and may be a voltage change value of detecting a displacement current of the parasitic capacitance in the DV/DT detection circuit caused by DV/DT on the resistance; and the voltage change amount and the DV The /DT level is proportional. The higher the voltage change, the higher the DV/DT level, and the lower the voltage change, the lower the DV/DT level.

For the method, the DV/DT level may include at least two level ranges, such as at least two levels including high and low. As shown in the determination chart of the degree of voltage change on the resistor shown in FIG. 6, the DV/DT level is set to a plurality of ranges from vth1 to vthn, and when the voltage change amount on the resistor falls within the corresponding range, a DV can be generated. /DT level, while getting the DV/DT level, the corresponding The signal of Gate_control is also generated accordingly, thereby obtaining Gate_control<1> to Gate_control<n> signal outputs. In Figure 6, the DV/DT security level is set. When the DV/DT level exceeds the DV/DT security level, the output drive capability is adjusted for protection.

Moreover, when the DV/DT level value of the voltage change amount exceeds the DV/DT safety limit value, it is preferable to reduce the DV/DT by gradually reducing the output drive capability, so that the operation mode of the output drive adjustment circuit is stronger. The output drive capability changes to a weaker output drive capability. The reduced output drive capability can be achieved by increasing the impedance of the output drive tube or lowering the supply voltage.

A person skilled in the art will further appreciate that the elements and algorithm steps of the various examples described in connection with the embodiments disclosed herein can be implemented in electronic hardware in which the components of the examples have been generally described in terms of function. And steps. Different methods are used to implement the described functionality for each particular application, but such implementation should not be considered to be beyond the scope of the embodiments of the invention. Specifically, the operation and the control part can be implemented by the logic hardware, which can be a logic integrated circuit manufactured by using an integrated circuit process, which is not limited in this embodiment.

The steps of a method or algorithm described in connection with the embodiments disclosed herein can be implemented in hardware, a software module executed by a processor, or a combination of both. The software module can be placed in random access memory (RAM), memory, read only memory (ROM), electrically programmable ROM, electrically erasable programmable ROM, registers, hard disk, removable disk, CD-ROM, or technical field. Any other form of storage medium known.

The specific embodiments of the present invention have been described in detail with reference to the preferred embodiments of the present invention. The scope of protection, which is within the spirit and principles of the present invention Any modifications, equivalent substitutions, improvements, etc., are intended to be included within the scope of the present invention.

Claims

A DV/DT detection and protection device, comprising:

DV/DT detection circuit for detecting the voltage variation of DV/DT; the circuit comprises a plurality of high voltage MOS transistors, resistors, clamping diodes and parasitic capacitors, wherein the gate end of the high voltage MOS transistor is connected to an input signal, the high voltage MOS The drain end of the tube is connected to the resistor and the source is connected to the common ground; the two ends of the resistor are connected to the clamp diode; the parasitic capacitance is connected between the drain end and the source end of the high voltage MOS tube;

a DV/DT comparison circuit for determining a DV/DT level to which the voltage variation amount belongs according to the voltage variation amount, and configuring a signal for controlling an operation mode of the output drive adjustment circuit according to the DV/DT level;

The output drive adjustment circuit is configured to configure the operation mode and the output drive capability according to the control signal to ensure that the power device operates within a safe DV/DT range.
The DV/DT detecting and protecting apparatus according to claim 1, wherein said DV/DT detecting circuit detects a voltage change of a displacement current of a parasitic capacitance caused by DV/DT on the resistance to obtain a voltage change amount.
The DV/DT detection and protection device of claim 1 wherein said DV/DT comparison circuit includes a plurality of comparison levels and a window comparator coupled thereto.
The DV/DT detecting and protecting apparatus according to claim 3, wherein said window comparator configures a control signal output when a voltage change amount of a resistor in the DV/DT detecting circuit satisfies a comparison level.
The DV/DT detection and protection device according to claim 1, wherein the output drive adjustment circuit adjusts the drive capability by adjusting an impedance of the output drive tube or a power supply voltage.
A method for protecting a DV/DT detection and protection device according to claim 1, comprising the steps of:

Detecting the amount of voltage change obtained by DV/DT;

Comparing the amount of DV/DT voltage change obtained by the detection with a preset DV/DT level range, and determining the DV/DT level to which the voltage change amount belongs;

Compare the DV/DT level of the voltage change amount with the preset DV/DT safety level. When the DV/DT level value of the voltage change amount exceeds the DV/DT safety level, adjust the output drive capability to ensure the driven power device. Work in the safe DV/DT range.
The DV/DT detection and protection method according to claim 6, wherein the voltage variation of the DV/DT is proportional to the DV/DT level.
The DV/DT detection and protection method according to claim 6, wherein the DV/DT level range includes at least two level ranges.
The DV/DT detection and protection method according to claim 6, wherein when the DV/DT level value of the voltage change amount exceeds the DV/DT safety limit value, the output drive capability is gradually reduced.
The DV/DT detection and protection method according to claim 9, wherein the reducing the output driving capability is achieved by increasing the impedance of the output driving tube or lowering the power supply voltage.