WO2017012155A1 - 一种电压补偿电路及基于电压补偿电路的电压补偿方法 - Google Patents

一种电压补偿电路及基于电压补偿电路的电压补偿方法 Download PDF

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Publication number
WO2017012155A1
WO2017012155A1 PCT/CN2015/086501 CN2015086501W WO2017012155A1 WO 2017012155 A1 WO2017012155 A1 WO 2017012155A1 CN 2015086501 W CN2015086501 W CN 2015086501W WO 2017012155 A1 WO2017012155 A1 WO 2017012155A1
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thin film
voltage
film transistor
resistor
power management
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PCT/CN2015/086501
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English (en)
French (fr)
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熊志
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深圳市华星光电技术有限公司
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Priority to US14/787,560 priority Critical patent/US9799300B2/en
Publication of WO2017012155A1 publication Critical patent/WO2017012155A1/zh

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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3696—Generation of voltages supplied to electrode drivers
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0421—Structural details of the set of electrodes
    • G09G2300/043—Compensation electrodes or other additional electrodes in matrix displays related to distortions or compensation signals, e.g. for modifying TFT threshold voltage in column driver
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/041—Temperature compensation
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0626—Adjustment of display parameters for control of overall brightness
    • G09G2320/0646—Modulation of illumination source brightness and image signal correlated to each other
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/06—Adjustment of display parameters
    • G09G2320/0666—Adjustment of display parameters for control of colour parameters, e.g. colour temperature
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management

Definitions

  • the present invention relates to the field of liquid crystal display technology, and in particular, to a voltage compensation circuit and a voltage compensation method based on a voltage compensation circuit.
  • each pixel is provided with a Thin Film Transistor (TFT), which can independently adjust the brightness of each pixel to improve the liquid crystal display. display effect.
  • TFT Thin Film Transistor
  • the On-Array (Gate On Array (GOA) technology is widely used in AM-LCD.
  • the GOA technology is a technology for fabricating the TFT scan drive circuit on the substrate. Using GOA technology, the panel frame can be reduced and the product can be lowered. cost.
  • the temperature of the TFT in the gate scan driving circuit of the TFT is easily changed with the ambient temperature.
  • the electron mobility of the TFT may drift with temperature, resulting in the gate of the TFT.
  • the scanning drive signal fluctuates, and there may be problems such as uneven gray scale of the liquid crystal display and poor display quality.
  • the prior art generally uses an external temperature sensor to monitor the temperature of the substrate to monitor the gate scan driving voltage of the TFT.
  • the temperature of the substrate detected by the temperature sensor does not match the actual temperature of the TFT in the GOA circuit in the substrate.
  • the substrate temperature detected by the external temperature sensor cannot accurately reflect the actual temperature of the TFT in the GOA circuit in the substrate, so that the over-compensation or under-compensation of the gate scan driving voltage of the TFT causes the liquid crystal display screen display effect to be poor.
  • the embodiment of the invention provides a voltage compensation circuit and a voltage compensation method based on the voltage compensation circuit, which can solve the problem that the screen display effect of the liquid crystal display is poor due to the substrate temperature change.
  • a voltage compensation circuit including a first thin film transistor circuit, a control circuit, and a scan driving chip, wherein:
  • the first thin film transistor circuit includes a first thin film transistor having a gate connected to the first gate driving signal;
  • the control circuit includes a power management chip, a first resistor R1, a second resistor R2, and a third resistor R3.
  • the output terminal Output1 of the power management chip is connected to the first end of the third resistor R3, and the third resistor
  • the second end of the R3 is connected to the first end of the first resistor R1, the second end of the third resistor R3 is connected to the feedback end of the power management chip, and the feedback end FB of the power management chip is connected to the second resistor.
  • the first end of the second resistor R2 is grounded, the second end of the first resistor R1 is connected to the input end VGH of the scan driving chip, and the output end of the scan driving chip is output 2 Describe the first gate drive signal;
  • a source of the first thin film transistor is connected to a first input terminal Input1 of the power management chip of the control circuit, and a second input terminal Input2 of the power management chip is connected to the first gate driving signal
  • the power management chip is configured to detect a voltage change duration of a driving voltage Vs of a source of the first thin film transistor when the gate of the first thin film transistor receives the current frame of the first gate driving signal, according to the voltage
  • the output terminal voltage Voutput1 of the current frame corresponding to the change duration adjusts the current frame or the next frame gate drive voltage of the second thin film transistor circuit connection for display in the active matrix liquid crystal display.
  • the second thin film transistor circuit includes a plurality of thin film transistors in different scan lines, and the plurality of thin film transistor connected gates in different scan lines The pole drive signals are different.
  • the voltage VFB of the feedback end of the power management chip is a fixed value.
  • the first input terminal Input1 of the power management chip detects a source driving voltage of the first thin film transistor .
  • a voltage compensation method is provided.
  • the voltage compensation method is applied to a voltage compensation circuit, where the voltage compensation circuit includes a first thin film transistor circuit, a control circuit, and a scan driver chip, wherein:
  • the first thin film transistor circuit includes a first thin film transistor having a gate connected to the first gate driving signal;
  • the control circuit includes a power management chip, a first resistor R1, a second resistor R2, and a third resistor R3.
  • the output terminal Output1 of the power management chip is connected to the first end of the third resistor R3, and the third resistor
  • the second end of the R3 is connected to the first end of the first resistor R1, the second end of the third resistor R3 is connected to the feedback end of the power management chip, and the feedback end FB of the power management chip is connected to the second resistor.
  • the first end of the second resistor R2 is grounded, the second end of the first resistor R1 is connected to the input end VGH of the scan driving chip, and the output end of the scan driving chip is output 2 Describe the first gate drive signal;
  • a source of the first thin film transistor is connected to a first input terminal Input1 of the power management chip of the control circuit, and a second input terminal Input2 of the power management chip is connected to the first gate driving signal
  • the power management chip is configured to detect a voltage change duration of a driving voltage Vs of a source of the first thin film transistor when the gate of the first thin film transistor receives the current frame of the first gate driving signal, according to the voltage
  • the output terminal voltage Voutput1 of the current frame corresponding to the change duration adjusts the current frame or the next frame gate drive voltage of the second thin film transistor circuit connection for display in the active matrix liquid crystal display.
  • the method includes:
  • the second input terminal Input2 of the power management chip detects that the gate driving voltage accessed during the current frame time of the first gate driving signal changes, detecting the first connection of the first input terminal Input1 of the power management chip
  • the voltage of the source driving voltage Vs of the thin film transistor changes, and the first gate driving signal is connected to the gate of the first thin film transistor;
  • the current frame output terminal voltage Voutput1 of the power management chip corresponding to the voltage change duration of the source driving voltage Vs of the first thin film transistor is searched from the corresponding relationship between the rising edge time and the output voltage of the power management chip;
  • the voltage change duration includes a rising edge duration or a falling edge duration.
  • the adjusting the gate of the second thin film transistor circuit according to the current frame output voltage Voutput1 of the power management chip includes:
  • the current frame of the gate driving signal of the second thin film transistor circuit or the size of the gate driving voltage of the next frame is adjusted according to the following formula:
  • VGH is the current frame of the gate driving signal of the second thin film transistor circuit or the gate driving voltage of the next frame is high level
  • VFB is the feedback terminal voltage of the power management chip
  • Voutput1 is the current frame output voltage of the power management chip
  • R1 is the resistance of the first resistor
  • R2 is the resistance of the second resistor
  • R3 is the resistance of the third resistor.
  • the voltage of the current frame output terminal Voutput1 of the power management chip is Adjusting the current frame of the gate driving signal of the second thin film transistor circuit or the size of the next frame gate driving voltage high level VGH includes:
  • the current frame of the gate driving signal of the second thin film transistor circuit or the size of the gate driving voltage of the next frame is adjusted according to the following formula:
  • VGH is the current frame of the gate driving signal of the second thin film transistor circuit or the gate driving voltage of the next frame is high level
  • VFB is the feedback terminal voltage of the power management chip
  • Voutput1 is the current frame output voltage of the power management chip
  • R1 is the resistance of the first resistor
  • R2 is the resistance of the second resistor
  • R3 is the resistance of the third resistor.
  • a voltage compensation circuit and a voltage compensation method based on a voltage compensation circuit are used when the second input terminal Input2 of the power management chip detects the current gate time of the first gate driving signal.
  • the pole driving voltage is high level VGH
  • detecting the voltage change duration of the source driving voltage Vs of the first thin film transistor connected to the first input terminal Input1 of the power management chip first The gate driving signal is connected to the gate of the first thin film transistor; and the power management chip corresponding to the voltage change duration of the source driving voltage Vs of the first thin film transistor is searched from the corresponding relationship between the rising edge time and the output voltage of the power management chip
  • the frame output terminal voltage Voutput1 adjusts the current frame of the gate driving signal of the second thin film transistor circuit or the size of the next frame gate driving voltage high level VGH according to the current frame output terminal voltage Voutput1 of the power management chip.
  • the second input terminal Input2 of the power management chip detects that the gate driving voltage accessed during the current frame time of the first gate driving signal changes, according to the detection
  • the voltage change duration of the source driving voltage Vs of the first thin film transistor connected to the first input terminal Input1 of the power management chip adjusts the current frame output voltage Voutput1 of the power management chip, thereby adjusting the gate driving signal of the second thin film transistor circuit.
  • the size of the current frame or the next frame gate driving voltage high level VGH can adjust the gate driving voltage high level VGH of the second thin film transistor circuit according to the temperature change of the TFT, and the temperature sensor in the prior art Comparing the substrate temperature to adjust the gate scan driving voltage of the TFT, compared with the embodiment of the present invention, the gate scanning driving voltage of the TFT can be adjusted in real time according to the temperature change of the TFT, and the screen display of the active matrix liquid crystal display is improved. effect.
  • FIG. 3 is a flowchart of a voltage compensation method according to an embodiment of the present invention.
  • FIG. 4 is a timing diagram of a gate driving signal and a driving voltage timing diagram of a source of a first thin film transistor according to an embodiment of the present invention.
  • the embodiment of the invention provides a voltage compensation circuit and a voltage compensation method based on the voltage compensation circuit, which can solve the problem that the screen display effect of the liquid crystal display is poor due to the substrate temperature change. The details are described below separately.
  • FIG. 1 is a voltage compensation circuit according to an embodiment of the present invention.
  • the voltage compensation circuit described in this embodiment includes a first thin film transistor circuit, a control circuit, and a scan driver chip, wherein:
  • the first thin film transistor circuit includes a first thin film transistor having a gate connected to the first gate driving signal;
  • the control circuit includes a power management chip, a first resistor R1, a second resistor R2 and a third resistor R3.
  • the output terminal Output1 of the power management chip is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is connected to the first end.
  • the first end of the resistor R1, the second end of the third resistor R3 is connected to the feedback end of the power management chip, the feedback end FB of the power management chip is connected to the first end of the second resistor R2, and the second end of the second resistor R2 is grounded.
  • the second end of the first resistor R1 is connected to the input terminal VGH of the scan driving chip, and the output terminal Output2 of the scan driving chip outputs the first gate driving signal;
  • the source of the first thin film transistor is connected to the first input terminal Input1 of the power management chip of the control circuit, the second input terminal Input2 of the power management chip is connected to the first gate driving signal, and the power management chip is used for detecting the gate of the first thin film transistor.
  • the second thin film transistor circuit is connected to the current frame of the gate drive signal or the next frame gate drive voltage is high level VGH.
  • the first thin film transistor may be any one of the first thin film transistor circuits, or may be a plurality of thin film transistors in the first thin film transistor circuit.
  • the first thin film transistor is used in FIG. Taking T00 as an example, the first thin film transistor is used for detecting the circuit, and the first gate driving signal G0 connected to the first thin film transistor is output by the scan driving chip, and when the first gate driving signal G0 outputs a high level VGH, The first thin film transistor is turned on, and when the first gate driving signal G0 outputs a low level VGL, the first thin film transistor is turned off.
  • the voltage VFB at the feedback end of the power management chip is a fixed value.
  • the power management chip according to the voltage VFB of the feedback end set by the program is a fixed value.
  • VFB is a fixed value
  • the size of the input terminal VGH of the scan driving chip is changed by changing the voltage level of the output terminal Output1 of the power management chip, thereby
  • the first gate drive signal G0 is adjusted to output a magnitude of a high level VGH.
  • the first input terminal Input1 of the power management chip detects the source driving voltage of the first thin film transistor.
  • the source of the first thin film transistor is connected to the first input terminal Input1 of the power management chip of the control circuit, and the first input terminal Input1 of the power management chip can detect the source driving voltage of the first thin film transistor, and can detect the first film.
  • the rising edge time when the source driving voltage of the transistor rises from the low level to the high level can also detect the falling edge time when the source driving voltage of the first thin film transistor falls from the high level to the low level.
  • the gate driving voltage of the first gate driving signal G0 input by the second input terminal Input2 of the power management chip changes, detecting that the gate of the first thin film transistor receives the first gate driving
  • the voltage of the driving voltage Vs of the source of the first thin film transistor changes in the current frame of the signal G0, and the voltage variation time of the driving voltage Vs of the source of the first thin film transistor is related to the temperature of the first thin film transistor, when the first film
  • the temperature of the transistor is increased, if the gate driving voltage of the first gate driving signal G0 does not change, the voltage of the driving voltage Vs of the source of the first thin film transistor becomes shorter.
  • the embodiment of the present invention can adjust the gate scan driving voltage of the thin film transistor to a high level VGH according to the temperature change of the thin film transistor. Improve the screen display effect of the active matrix liquid crystal display.
  • FIG. 2 is another voltage compensation circuit disclosed in an embodiment of the present invention.
  • the second thin film transistor circuit for display in the active matrix liquid crystal display includes a plurality of thin film transistors in different scanning lines, and a plurality of thin film transistor connections in different scanning lines.
  • the gate drive signals are different.
  • the voltage compensation circuit is configured to adjust the magnitude of the high level VGH of the gate driving signal connected to the second thin film transistor circuit.
  • the second thin film transistor circuit for display may include a plurality of thin film transistors, each of which may be connected to a gate driving signal, and each row of thin film transistors is used to control a row of pixels on the liquid crystal display controlled by the thin film transistor. Brightness and color.
  • the scan driving chip can output a plurality of gate driving signals, for example, G0, G1, G2, etc., wherein the gate driving signals connected to the second thin film transistor circuit, for example, G1 and G2, are used to control one line of the liquid crystal display.
  • the display effect of the gate driving signal connected to the first thin film transistor circuit, such as G0 is used to control the opening or closing of the first thin film transistor, and is not used for display of the liquid crystal display.
  • the first thin film transistor circuit and the second thin film transistor circuit are all fabricated on the substrate of the liquid crystal display, and the gate driving signal of the first thin film transistor circuit and any one of the thin film transistor circuits of the second thin film transistor circuit
  • the gate driving signals are the same, and may also be different from the gate driving signals of any one of the thin film transistors in the second thin film transistor circuit, and the gate driving voltage of the first thin film transistor circuit and the gate driving voltage of the second thin film transistor are both passed.
  • the scan driver chip performs control. When the scan driver chip monitors that the VGH voltage of the input terminal is VGH1 in one frame display screen, in the next frame display screen, the gate drive signal outputted by the output terminal of the scan driver chip is scanned. The voltage is VGH1.
  • the gate driving voltage of the first gate driving signal G0 input by the second input terminal Input2 of the power management chip changes, detecting that the gate of the first thin film transistor receives the first gate driving
  • the voltage of the driving voltage Vs of the source of the first thin film transistor changes in the current frame of the signal G0, and the voltage variation time of the driving voltage Vs of the source of the first thin film transistor is related to the temperature of the first thin film transistor, when the first film
  • the temperature of the transistor is increased, if the gate driving voltage of the first gate driving signal G0 does not change, the voltage of the driving voltage Vs of the source of the first thin film transistor becomes shorter.
  • Adjusting the second thin film transistor circuit connection for display in the active matrix liquid crystal display according to the voltage change duration of the driving voltage Vs of the source of the first thin film transistor Gate driving signal of the current frame or the next frame of the gate driving voltage VGH high The size, for example, in a frame duration Tv, if the first gate driving signal connected to the first thin film transistor is connected to the high level VGH for a time longer than the gate connected to the second row of the thin film transistor in the second thin film transistor circuit
  • the current frame gate drive voltage of the gate drive signal connected to the second row of thin film transistors can be adjusted to a high level VGH; if the first thin film transistor is connected
  • the first row of thin film transistors can be adjusted when a gate driving signal is connected to the high level VGH for a later time than when the gate driving signal connected to the first thin film transistor of the second thin film transistor circuit is connected to the high level VGH.
  • the gate drive voltage of the next frame of the connected gate drive signal is at a high level VGH.
  • the gate scan driving voltage of the thin film transistor can be adjusted in real time according to the temperature change of the thin film transistor, and the screen display effect of the active matrix liquid crystal display is improved.
  • FIG. 3 is a flowchart of a voltage compensation method according to an embodiment of the present invention. As shown in FIG. 3, the voltage compensation method described in the embodiment of the present invention includes the following steps:
  • the gate driving voltage that is accessed during the current frame time of the first gate driving signal G0 may be changed: the current gate time of the first gate driving signal G0 is accessed.
  • the gate driving voltage rises from the low level VGL to the high level VGH, or the gate driving voltage accessed during the current frame time of the first gate driving signal G0 falls from the high level VGH to the low level VGL.
  • the gate driving voltage of the first gate driving signal G0 is high level VGH, the first thin film transistor is turned on, and the gate of the first gate driving signal is accessed during the current frame time.
  • the driving voltage is the low level VGL, the first thin film transistor is turned off.
  • the voltage change duration of the source driving voltage Vs of the first thin film transistor is related to the temperature of the first thin film transistor.
  • the temperature of the first thin film transistor rises, if the gate driving voltage of the first gate driving signal G0 is high, When the flat VGH does not change, the voltage change duration of the driving voltage Vs of the source of the first thin film transistor becomes shorter; when the temperature of the first thin film transistor decreases, if the gate driving voltage of the first gate driving signal G0 is turned on When the high level VGH does not change, the voltage change duration of the driving voltage Vs of the source of the first thin film transistor becomes long.
  • the voltage change duration of the source driving voltage Vs of the first thin film transistor may include The length of the rising edge can also include the length of the falling edge.
  • detecting a voltage change duration of the source driving voltage Vs of the first thin film transistor can detect a rising edge duration of the source driving voltage Vs of the first thin film transistor, and can also detect a decrease in the source driving voltage Vs of the first thin film transistor. Along the time.
  • the correspondence between the rising edge time and the output terminal voltage of the power management chip can be set in advance.
  • the current frame output voltage Voutput1 of the power management chip increases, the current frame of the gate driving signal of the second thin film transistor circuit or the next frame gate driving voltage high level VGH decreases, when the power supply
  • the current frame output voltage Voutput1 of the management chip is decreased, the current frame of the gate driving signal of the second thin film transistor circuit or the next frame gate driving voltage high level VGH is increased, that is, the source of the first thin film transistor can be detected.
  • the voltage change duration of the driving voltage Vs adjusts the magnitude of the current frame of the gate driving signal of the second thin film transistor circuit or the gate driving voltage of the next frame of the high level VGH.
  • adjusting the current frame of the gate driving signal of the second thin film transistor circuit or the gate driving voltage high level VGH of the next thin film transistor circuit according to the current frame output voltage Voutput1 of the power management chip may include:
  • the current frame of the gate driving signal of the second thin film transistor circuit or the size of the gate driving voltage of the next frame is adjusted according to the following formula:
  • VGH is the current frame of the gate driving signal of the second thin film transistor circuit or the gate driving voltage of the next frame is high level
  • VFB is the feedback terminal voltage of the power management chip
  • Voutput1 is the current frame output voltage of the power management chip
  • R1 is the resistance of the first resistor
  • R2 is the resistance of the second resistor
  • R3 is the resistance of the third resistor.
  • the feedback terminal voltage VFB of the power management chip can be set to a fixed value.
  • R1, R2, R3 When both are set to a fixed value, if Voutput1 is increased, VGH is correspondingly reduced. If Voutput1 is decreased, VGH is correspondingly increased.
  • the size of VGH can be adjusted by adjusting the size of Voutput1.
  • the gate of the first thin film transistor is detected. a voltage change duration of the driving voltage Vs of the source of the first thin film transistor when receiving the current frame of the first gate driving signal G0, a voltage change duration of the driving voltage Vs of the source of the first thin film transistor, and a temperature of the first thin film transistor When the temperature of the first thin film transistor is raised, if the gate driving voltage of the first gate driving signal G0 is not changed, the voltage of the driving voltage Vs of the source of the first thin film transistor is increased. The change duration is shortened.
  • the source voltage of the first thin film transistor is driven.
  • the voltage change duration becomes longer, and the second film for display in the active matrix liquid crystal display can be adjusted according to the voltage change duration of the driving voltage Vs of the source of the first thin film transistor.
  • the current frame of the gate drive signal connected to the transistor circuit or the size of the gate drive voltage of the next frame of the high level VGH, for example, within a frame duration Tv, if the first gate drive signal of the first thin film transistor is connected The time for accessing the high level VGH is earlier than the time when the gate driving signal connected to the second thin film transistor of the second thin film transistor circuit is connected to the high level VGH, and the gate driving of the second line thin film transistor connection can be adjusted.
  • the current frame gate driving voltage of the signal is a high level VGH; if the first gate driving signal connected to the first thin film transistor is connected to the high level VGH, the time is longer than the first thin film transistor in the second thin film transistor circuit
  • the gate driving voltage of the next frame of the gate driving signal connected to the first row of thin film transistors can be adjusted to a high level VGH.
  • FIG. 4 is a timing diagram of a gate driving signal and a driving voltage timing diagram of a source of a first thin film transistor according to an embodiment of the present invention.
  • G0 in FIG. 4 is a first gate driving signal of the first thin film transistor circuit
  • G1 and G2 are gate driving signals of two rows of thin film transistors in the second thin film transistor circuit
  • G1 is the first The gate drive signal of the first row of thin film transistors in the second thin film transistor circuit
  • G2 is the gate drive signal of the second row of thin film transistors in the second thin film transistor circuit
  • Tv is the duration of one frame of the picture.
  • the high level of the gate drive signal G1 is VGH1 and the high level of the gate drive signal G2 of the second line thin film transistor in the second thin film transistor circuit is VGH1; if the rising edge time is t2, according to the rising edge duration Find the output voltage Voutput1-2 corresponding to the rising edge duration t2 in the corresponding relationship with the output voltage of the power management chip, and adjust the VGH according to the size of the output voltage Voutput1-2. Small, if the adjusted VGH size is VGH2, the scan driver chip adjusts the high level of the gate drive signal G1 of the first thin film transistor in the second thin film transistor circuit to VGH2 and the current frame duration according to the size of VGH1.
  • the high level of the gate drive signal G2 of the second row of thin film transistors in the second thin film transistor circuit is VGH2; if the rising edge duration is t3, the search is based on the correspondence between the rising edge duration and the output voltage of the power management chip.
  • the output voltage Voutput1-3 corresponding to the rising edge duration t3 adjusts the size of VGH according to the magnitude of the output voltage Voutput1-3. If the adjusted VGH size is VGH3, the scan driver chip adjusts within the current frame duration according to the size of VGH3.
  • the high level of the gate drive signal G1 of the first row of thin film transistors in the second thin film transistor circuit is VGH3 and the high level of the gate drive signal G2 of the second row of thin film transistors in the second thin film transistor circuit is VGH3.
  • the second thin film transistor circuit may further include other multi-line thin film transistors, and the scan driving chip may adjust the second thin film transistor circuit according to the size of the VGH.
  • the high-level VGH of the gate driving voltage of the other multi-line thin film transistor, the sweep driving chip further includes other output terminals for outputting the gate driving signals of the other thin film transistors in the second thin film transistor circuit,
  • the gate drive signals in all of the thin film transistor circuits are output by the scan drive chip.
  • the first gate driving signal G0 connected to the first thin film transistor is connected to the high level VGH for a period of time longer than the first row and the second row of thin film transistors in the second thin film transistor circuit.
  • the gate driving signal is connected to the high level VGH for a long time, the gate driving signals of the first row and the second row of thin film transistors are adjusted.
  • the current frame gate drive voltage is at a high level VGH. If the first gate driving signal G0 connected to the first thin film transistor is connected to the high level VGH, the gate driving signal connected to the first row and the second row of the thin film transistor in the second thin film transistor circuit is connected to the high level VGH. If the time is later, the magnitude of the gate drive voltage high level VGH of the next frame of the gate drive signal of the first row and the second row of thin film transistors is adjusted.
  • the gate scan driving voltage of the thin film transistor can be adjusted in real time according to the temperature change of the thin film transistor, and the screen display effect of the active matrix liquid crystal display is improved.

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Abstract

一种电压补偿电路及基于电压补偿电路的电压补偿方法，该电压补偿电路包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：控制电路的电源管理芯片的输出端Output1连接第三电阻R3的第一端，第三电阻R3的第二端连接第一电阻R1的第一端，第三电阻R3的第二端连接电源管理芯片的反馈端，电源管理芯片的反馈端FB连接第二电阻R2的第一端，第二电阻R2的第二端接地，第一电阻R1的第二端连接扫描驱动芯片的输入端VGH；第一薄膜晶体管的源极连接控制电路的电源管理芯片的第一输入端Input1，电源管理芯片的第二输入端Input2连接第一栅极驱动信号。可以提高有源矩阵液晶显示器的屏幕显示效果。

Description

一种电压补偿电路及基于电压补偿电路的电压补偿方法
本申请要求于2015年07月17日提交中国专利局、申请号为201510425554.0、发明名称为“一种电压补偿电路及基于电压补偿电路的电压补偿方法”的中国专利申请的优先权，上述在先申请的内容以引入的方式并入本文本中。
技术领域
本发明涉及液晶显示技术领域，具体涉及一种电压补偿电路及基于电压补偿电路的电压补偿方法。
背景技术
在有源矩阵液晶显示器(Active Matrix Liquid Crystal Display，AM-LCD)中，每个像素均设置一个薄膜晶体管(Thin Film Transistor，TFT)，可以对每个像素的亮度进行独立调节，从而提高液晶显示器显示效果。AM-LCD中普遍采用基板阵列行驱动(Gate On Array，GOA)技术，GOA技术是一种将TFT的栅极扫描驱动电路制作在基板上的技术，采用GOA技术，可以降低面板边框，降低产品成本。
由于采用GOA技术，TFT的栅极扫描驱动电路中的TFT温度容易随着环境温度发生变化，当TFT的温度发生变化时，TFT的电子迁移率随着温度变化会出现漂移，导致TFT的栅极扫描驱动信号出现波动，可能会出现液晶显示器灰度不均，显示质量较差等问题。为了解决上述问题，现有技术一般采用外接温度传感器，通过温度传感器监测基板温度来调节TFT的栅极扫描驱动电压，然而，由于温度传感器检测的基板温度与基板内GOA电路中TFT的实际温度不一致，外接的温度传感器检测的基板温度并不能准确的反应基板内GOA电路中TFT的实际温度，以使TFT的栅极扫描驱动电压的过补偿或欠补偿，导致液晶显示器的屏幕显示效果较差。
发明内容
本发明实施例提供一种电压补偿电路及基于电压补偿电路的电压补偿方法，可以解决由于基板温度变化导致液晶显示器的屏幕显示效果较差的问题。
本发明实施例第一方面，提供了一种电压补偿电路，，包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：
所述第一薄膜晶体管电路包括栅极连接第一栅极驱动信号的第一薄膜晶体管；
所述控制电路包括电源管理芯片、第一电阻R1，第二电阻R2和第三电阻R3，所述电源管理芯片的输出端Output1连接所述第三电阻R3的第一端，所述第三电阻R3的第二端连接所述第一电阻R1的第一端，所述第三电阻R3的第二端连接所述电源管理芯片的反馈端，所述电源管理芯片的反馈端FB连接第二电阻R2的第一端，所述第二电阻R2的第二端接地，所述第一电阻R1的第二端连接所述扫描驱动芯片的输入端VGH，所述扫描驱动芯片的输出端Output2输出所述第一栅极驱动信号；
所述第一薄膜晶体管的源极连接所述控制电路的所述电源管理芯片的第一输入端Input1，所述电源管理芯片的第二输入端Input2连接所述第一栅极驱动信号，所述电源管理芯片用于检测所述第一薄膜晶体管的栅极接收所述第一栅极驱动信号的当前帧时所述第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，根据所述电压变化时长对应的所述当前帧的输出端电压Voutput1调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的。
在本发明实施例第一方面的第一种可能的实现方式中，所述第二薄膜晶体管电路包括多个处于不同扫描行的薄膜晶体管，所述多个处于不同扫描行的薄膜晶体管连接的栅极驱动信号不同。
结合本发明实施例第一方面，在本发明实施例第一方面的第二种可能的实现方式中，所述电源管理芯片的反馈端的电压VFB为定值。
结合本发明实施例第一方面，在本发明实施例第一方面的第三种可能的实现方式中，所述电源管理芯片的第一输入端Input1检测所述第一薄膜晶体管的源极驱动电压。
本发明实施例第二方面，提供了一种电压补偿方法，所述电压补偿方法应用于电压补偿电路，所述电压补偿电路包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：
所述第一薄膜晶体管电路包括栅极连接第一栅极驱动信号的第一薄膜晶体管；
所述控制电路包括电源管理芯片、第一电阻R1，第二电阻R2和第三电阻R3，所述电源管理芯片的输出端Output1连接所述第三电阻R3的第一端，所述第三电阻R3的第二端连接所述第一电阻R1的第一端，所述第三电阻R3的第二端连接所述电源管理芯片的反馈端，所述电源管理芯片的反馈端FB连接第二电阻R2的第一端，所述第二电阻R2的第二端接地，所述第一电阻R1的第二端连接所述扫描驱动芯片的输入端VGH，所述扫描驱动芯片的输出端Output2输出所述第一栅极驱动信号；
所述第一薄膜晶体管的源极连接所述控制电路的所述电源管理芯片的第一输入端Input1，所述电源管理芯片的第二输入端Input2连接所述第一栅极驱动信号，所述电源管理芯片用于检测所述第一薄膜晶体管的栅极接收所述第一栅极驱动信号的当前帧时所述第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，根据所述电压变化时长对应的所述当前帧的输出端电压Voutput1调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的；
所述方法包括：
当电源管理芯片的第二输入端Input2检测到第一栅极驱动信号的当前帧时间内接入的栅极驱动电压发生变化时，检测所述电源管理芯片的第一输入端Input1连接的第一薄膜晶体管的源极驱动电压Vs的电压变化时长，所述第一栅极驱动信号连接所述第一薄膜晶体管的栅极；
从上升沿时间与电源管理芯片的输出端电压的对应关系中查找所述第一薄膜晶体管的源极驱动电压Vs的电压变化时长对应的电源管理芯片当前帧输出端电压Voutput1；
根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大 小。
在本发明实施例第二方面的第一种可能的实现方式中，所述电压变化时长包括上升沿时长或下降沿时长。
结合本发明实施例第二方面，在本发明实施例第二方面的第二种可能的实现方式中，所述根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小包括：
按照如下公式调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小：
(VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2；
其中，VGH为第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平，VFB为电源管理芯片的反馈端电压，Voutput1为电源管理芯片当前帧输出端电压，R1为第一电阻的阻值，R2为第二电阻的阻值，R3为第三电阻的阻值。
结合本发明实施例第二方面的第一种可能的实现方式，在本发明实施例第二方面的第三种可能的实现方式中，所述根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小包括：
按照如下公式调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小：
(VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2；
其中，VGH为第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平，VFB为电源管理芯片的反馈端电压，Voutput1为电源管理芯片当前帧输出端电压，R1为第一电阻的阻值，R2为第二电阻的阻值，R3为第三电阻的阻值。
可见，根据本发明实施例提供的一种电压补偿电路及基于电压补偿电路的电压补偿方法，当电源管理芯片的第二输入端Input2检测到第一栅极驱动信号的当前帧时间内接入栅极驱动电压高电平VGH时，检测电源管理芯片的第一输入端Input1连接的第一薄膜晶体管的源极驱动电压Vs的电压变化时长，第一 栅极驱动信号连接第一薄膜晶体管的栅极；从上升沿时间与电源管理芯片的输出端电压的对应关系中查找第一薄膜晶体管的源极驱动电压Vs的电压变化时长对应的电源管理芯片当前帧输出端电压Voutput1；根据电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小。本发明实施例中，当TFT的温度发生变化时，当电源管理芯片的第二输入端Input2检测到第一栅极驱动信号的当前帧时间内接入的栅极驱动电压发生变化时，根据检测电源管理芯片的第一输入端Input1连接的第一薄膜晶体管的源极驱动电压Vs的电压变化时长调整电源管理芯片当前帧输出端电压Voutput1大小，从而调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小，可以根据TFT的温度变化，调整第二薄膜晶体管电路的栅极驱动电压高电平VGH的大小，与现有技术中通过温度传感器监测基板温度来调节TFT的栅极扫描驱动电压相比，实施本发明实施例，可以根据TFT温度变化，实时调整TFT的栅极扫描驱动电压高电平VGH，提高有源矩阵液晶显示器的屏幕显示效果。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例公开的一种电压补偿电路；
图2是本发明实施例公开的另一种电压补偿电路；
图3是本发明实施例公开的一种电压补偿方法的流程图；
图4是本发明实施例公开的栅极驱动信号时序图和第一薄膜晶体管的源极的驱动电压时序图。
具体实施方式
下面将结合本发明实施方式中的附图，对本发明实施方式中的技术方案进行清楚、完整地描述。显然，所描述的实施方式是本发明的一部分实施方式， 而不是全部实施方式。基于本发明中的实施方式，本领域普通技术人员在没有做出创造性劳动的前提下所获得的所有其他实施方式，都应属于本发明保护的范围。
本发明实施例提供一种电压补偿电路及基于电压补偿电路的电压补偿方法，可以解决由于基板温度变化导致液晶显示器的屏幕显示效果较差的问题。以下分别进行详细说明。
请参阅图1，图1是本发明实施例公开的一种电压补偿电路。如图1所示，本实施例中所描述的电压补偿电路，包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：
第一薄膜晶体管电路包括栅极连接第一栅极驱动信号的第一薄膜晶体管；
控制电路包括电源管理芯片、第一电阻R1，第二电阻R2和第三电阻R3，电源管理芯片的输出端Output1连接第三电阻R3的第一端，第三电阻R3的第二端连接第一电阻R1的第一端，第三电阻R3的第二端连接电源管理芯片的反馈端，电源管理芯片的反馈端FB连接第二电阻R2的第一端，第二电阻R2的第二端接地，第一电阻R1的第二端连接扫描驱动芯片的输入端VGH，扫描驱动芯片的输出端Output2输出第一栅极驱动信号；
第一薄膜晶体管的源极连接控制电路的电源管理芯片的第一输入端Input1，电源管理芯片的第二输入端Input2连接第一栅极驱动信号，电源管理芯片用于检测第一薄膜晶体管的栅极接收第一栅极驱动信号的当前帧时第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，根据电压变化时长对应的当前帧的输出端电压Voutput1调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的。
本发明实施例中，第一薄膜晶体管可以为第一薄膜晶体管电路中的任意一个薄膜晶体管，也可以为第一薄膜晶体管电路中的多个薄膜晶体管，图1中为了方便说明，第一薄膜晶体管以T00为例，第一薄膜晶体管用于控制电路进行检测，第一薄膜晶体管连接的第一栅极驱动信号G0由扫描驱动芯片输出，当第一栅极驱动信号G0输出高电平VGH时，第一薄膜晶体管打开，当第一栅极驱动信号G0输出低电平VGL时，第一薄膜晶体管关闭。
可选的，电源管理芯片的反馈端的电压VFB为定值。
具体的，电源管理芯片根据程序设定的反馈端的电压VFB为定值，当VFB为定值时，通过改变电源管理芯片的输出端Output1的电压大小改变扫描驱动芯片的输入端VGH的大小，从而调节第一栅极驱动信号G0输出高电平VGH的大小。
可选的，电源管理芯片的第一输入端Input1检测第一薄膜晶体管的源极驱动电压。
具体的，第一薄膜晶体管的源极连接控制电路的电源管理芯片的第一输入端Input1，电源管理芯片的第一输入端Input1可以检测第一薄膜晶体管的源极驱动电压，可以检测第一薄膜晶体管的源极驱动电压从低电平上升到高电平时的上升沿时间，也可以检测第一薄膜晶体管的源极驱动电压从高电平下降到低电平时的下降沿时间。
本发明实施例中，当电源管理芯片的第二输入端Input2输入的第一栅极驱动信号G0接入的栅极驱动电压发生变化时，检测第一薄膜晶体管的栅极接收第一栅极驱动信号G0的当前帧时第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，第一薄膜晶体管的源极的驱动电压Vs的电压变化时长与第一薄膜晶体管的温度有关，当第一薄膜晶体管的温度升高时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变短，当第一薄膜晶体管的温度降低时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变长，可以根据第一薄膜晶体管的源极的驱动电压Vs的电压变化时长调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小，实施本发明实施例，可以根据薄膜晶体管的温度变化，实时调整薄膜晶体管的栅极扫描驱动电压高电平VGH，提高有源矩阵液晶显示器的屏幕显示效果。
请参阅图2，图2是本发明实施例公开的另一种电压补偿电路。如图2所示的电压补偿电路中，有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路包括多个处于不同扫描行的薄膜晶体管，多个处于不同扫描行的薄膜晶体管连接 的栅极驱动信号不同。
本发明实施例中，电压补偿电路用于调整第二薄膜晶体管电路连接的栅极驱动信号的高电平VGH的大小。用于显示的第二薄膜晶体管电路可以包括多行薄膜晶体管，每一行薄膜晶体管均可以连接一个栅极驱动信号，每一行薄膜晶体管用于控制该行薄膜晶体管控制的液晶显示屏上的一行像素点的亮度和颜色。扫描驱动芯片可以输出多个栅极驱动信号，例如：G0、G1、G2等等，其中，第二薄膜晶体管电路连接的栅极驱动信号中，例如G1、G2，用于控制液晶显示器中一行画面的显示效果，第一薄膜晶体管电路连接的栅极驱动信号，例如G0，用于控制第一薄膜晶体管的开启或关闭，不用于液晶显示器的显示。
本发明实施例中，第一薄膜晶体管电路和第二薄膜晶体管电路均制作在液晶显示器的基板上，第一薄膜晶体管电路的栅极驱动信号可以与第二薄膜晶体管电路中的任意一行薄膜晶体管的栅极驱动信号相同，也可以与第二薄膜晶体管电路中的任意一行薄膜晶体管的栅极驱动信号不相同，第一薄膜晶体管电路的栅极驱动电压和第二薄膜晶体管的栅极驱动电压均通过扫描驱动芯片进行控制，在一帧显示画面中，当扫描驱动芯片监测到输入端的VGH的电压为VGH1时，在下一帧显示画面中，扫描驱动芯片输出端输出的栅极驱动信号的高电平电压均为VGH1。
本发明实施例中，当电源管理芯片的第二输入端Input2输入的第一栅极驱动信号G0接入的栅极驱动电压发生变化时，检测第一薄膜晶体管的栅极接收第一栅极驱动信号G0的当前帧时第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，第一薄膜晶体管的源极的驱动电压Vs的电压变化时长与第一薄膜晶体管的温度有关，当第一薄膜晶体管的温度升高时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变短，当第一薄膜晶体管的温度降低时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变长，可以根据第一薄膜晶体管的源极的驱动电压Vs的电压变化时长调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH 的大小，举例来说，在一帧时长Tv内，若第一薄膜晶体管连接的第一栅极驱动信号接入高电平VGH的时间比第二薄膜晶体管电路中第二行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要早，则可以调整第二行薄膜晶体管连接的栅极驱动信号的当前帧栅极驱动电压高电平VGH的大小；若第一薄膜晶体管连接的第一栅极驱动信号接入高电平VGH的时间比第二薄膜晶体管电路中第一行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要迟，则可以调整第一行薄膜晶体管连接的栅极驱动信号的下一帧栅极驱动电压高电平VGH的大小。实施本发明实施例，可以根据薄膜晶体管的温度变化，实时调整薄膜晶体管的栅极扫描驱动电压高电平VGH，提高有源矩阵液晶显示器的屏幕显示效果。
请参阅图3，图3是本发明实施例公开的一种电压补偿方法的流程图，如图3所示，本发明实施例中所描述的电压补偿方法，包括如下步骤：
S301，当电源管理芯片的第二输入端Input2检测到第一栅极驱动信号的当前帧时间内接入的栅极驱动电压发生变化时，检测电源管理芯片的第一输入端Input1连接的第一薄膜晶体管的源极驱动电压Vs的电压变化时长，第一栅极驱动信号连接第一薄膜晶体管的栅极。
本发明实施例中，可同时参阅图1，第一栅极驱动信号G0的当前帧时间内接入的栅极驱动电压发生变化可以为：第一栅极驱动信号G0的当前帧时间内接入的栅极驱动电压从低电平VGL上升到高电平VGH，或者第一栅极驱动信号G0的当前帧时间内接入的栅极驱动电压从高电平VGH下降到低电平VGL。当第一栅极驱动信号G0的当前帧时间内接入的栅极驱动电压为高电平VGH时，第一薄膜晶体管开启，当第一栅极驱动信号的当前帧时间内接入的栅极驱动电压为低电平VGL时，第一薄膜晶体管关闭。第一薄膜晶体管的源极驱动电压Vs的电压变化时长与第一薄膜晶体管的温度有关，当第一薄膜晶体管的温度上升时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变短；当第一薄膜晶体管的温度降低时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变长。
可选的，第一薄膜晶体管的源极驱动电压Vs的电压变化时长可以包括上 升沿时长，也可以包括下降沿时长。
具体的，检测第一薄膜晶体管的源极驱动电压Vs的电压变化时长可以检测第一薄膜晶体管的源极驱动电压Vs的上升沿时长，也可以检测第一薄膜晶体管的源极驱动电压Vs的下降沿时长。
S302，从上升沿时间与电源管理芯片的输出端电压的对应关系中查找第一薄膜晶体管的源极驱动电压Vs的电压变化时长对应的电源管理芯片当前帧输出端电压Voutput1。
本发明实施例中，上升沿时间与电源管理芯片的输出端电压的对应关系可以预先进行设定。
S303，根据电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小。
本发明实施例中，当电源管理芯片当前帧输出端电压Voutput1增大时，第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH减小，当电源管理芯片当前帧输出端电压Voutput1减小时，第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH增大，即可以通过检测第一薄膜晶体管的源极驱动电压Vs的电压变化时长调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小。
可选的，根据电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小，可以包括：
按照如下公式调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小：
(VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2；
其中，VGH为第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平，VFB为电源管理芯片的反馈端电压，Voutput1为电源管理芯片当前帧输出端电压，R1为第一电阻的阻值，R2为第二电阻的阻值，R3为第三电阻的阻值。
本发明实施例中，电源管理芯片的反馈端电压VFB可以设定为定值，对于公式(VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2来说，当R1，R2，R3均设定为定值时，若Voutput1增大，则VGH相应的减小，若Voutput1减小，则VGH相应的增大，可以通过调整Voutput1的大小来调整VGH的大小。
本发明实施例中，可同时参阅图2，当电源管理芯片的第二输入端Input2输入的第一栅极驱动信号G0接入的栅极驱动电压发生变化时，检测第一薄膜晶体管的栅极接收第一栅极驱动信号G0的当前帧时第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，第一薄膜晶体管的源极的驱动电压Vs的电压变化时长与第一薄膜晶体管的温度有关，当第一薄膜晶体管的温度升高时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变短，当第一薄膜晶体管的温度降低时，若第一栅极驱动信号G0接入的栅极驱动电压高电平VGH不发生变化，则第一薄膜晶体管的源极的驱动电压Vs的电压变化时长变长，可以根据第一薄膜晶体管的源极的驱动电压Vs的电压变化时长调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小，举例来说，在一帧时长Tv内，若第一薄膜晶体管连接的第一栅极驱动信号接入高电平VGH的时间比第二薄膜晶体管电路中第二行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要早，则可以调整第二行薄膜晶体管连接的栅极驱动信号的当前帧栅极驱动电压高电平VGH的大小；若第一薄膜晶体管连接的第一栅极驱动信号接入高电平VGH的时间比第二薄膜晶体管电路中第一行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要迟，则可以调整第一行薄膜晶体管连接的栅极驱动信号的下一帧栅极驱动电压高电平VGH的大小。
具体的，如图4所示，图4是本发明实施例公开的栅极驱动信号时序图和第一薄膜晶体管的源极的驱动电压时序图。其中，图4中的G0为第一薄膜晶体管电路的第一栅极驱动信号，G1和G2为第二薄膜晶体管电路中的两行薄膜晶体管的栅极驱动信号，为了方便阐述，令G1为第二薄膜晶体管电路中的第一行薄膜晶体管的栅极驱动信号，G2为第二薄膜晶体管电路中的第二行薄膜晶体管的栅极驱动信号，Tv为一帧画面的时长。结合图2和图4，在一帧时长Tv内， 当电源管理芯片的第二输入端Input2输入的第一栅极驱动信号G0接入的栅极驱动电压从低电平变为高电平时，检测到第一薄膜晶体管的源极的驱动电压Vs0从低电平变为高电平的上升沿时长，若上升沿时长为t1，则根据上升沿时长与电源管理芯片的输出端电压的对应关系中查找上升沿时长t1对应的输出端电压Voutput1-1，根据输出端电压Voutput1-1的大小调整VGH的大小，若调整后的VGH大小为VGH1，扫描驱动芯片根据VGH1的大小，在当前帧时长内调整第二薄膜晶体管电路中的第一行薄膜晶体管的栅极驱动信号G1的高电平为VGH1和第二薄膜晶体管电路中的第二行薄膜晶体管的栅极驱动信号G2的高电平为VGH1；若上升沿时长为t2，则根据上升沿时长与电源管理芯片的输出端电压的对应关系中查找上升沿时长t2对应的输出端电压Voutput1-2，根据输出端电压Voutput1-2的大小调整VGH的大小，若调整后的VGH大小为VGH2，扫描驱动芯片根据VGH1的大小，在当前帧时长内调整第二薄膜晶体管电路中的第一行薄膜晶体管的栅极驱动信号G1的高电平为VGH2和第二薄膜晶体管电路中的第二行薄膜晶体管的栅极驱动信号G2的高电平为VGH2；若上升沿时长为t3，则根据上升沿时长与电源管理芯片的输出端电压的对应关系中查找上升沿时长t3对应的输出端电压Voutput1-3，根据输出端电压Voutput1-3的大小调整VGH的大小，若调整后的VGH大小为VGH3，扫描驱动芯片根据VGH3的大小，在当前帧时长内调整第二薄膜晶体管电路中的第一行薄膜晶体管的栅极驱动信号G1的高电平为VGH3和第二薄膜晶体管电路中的第二行薄膜晶体管的栅极驱动信号G2的高电平为VGH3。
显然，图2中仅仅显示了第二薄膜晶体管电路中的两行薄膜晶体管，第二薄膜晶体管电路还可以包括其他的多行薄膜晶体管，扫描驱动芯片可以根据VGH的大小调整第二薄膜晶体管电路中其他的多行薄膜晶体管的栅极驱动电压的高电平VGH的大小，扫频驱动芯片还包括其他的输出端，用于输出第二薄膜晶体管电路中的其他行薄膜晶体管的栅极驱动信号，所有的薄膜晶体管电路中的栅极驱动信号都由扫描驱动芯片输出。图4中，在一帧时长Tv内，由于第一薄膜晶体管连接的第一栅极驱动信号G0接入高电平VGH的时间比第二薄膜晶体管电路中第一行和第二行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要早，则调整第一行和第二行薄膜晶体管连接的栅极驱动信号的 当前帧栅极驱动电压高电平VGH的大小。若第一薄膜晶体管连接的第一栅极驱动信号G0接入高电平VGH的时间比第二薄膜晶体管电路中第一行和第二行薄膜晶体管连接的栅极驱动信号接入高电平VGH的时间要迟，则调整第一行和第二行薄膜晶体管连接的栅极驱动信号的下一帧栅极驱动电压高电平VGH的大小。
实施本发明实施例，可以根据薄膜晶体管的温度变化，实时调整薄膜晶体管的栅极扫描驱动电压高电平VGH，提高有源矩阵液晶显示器的屏幕显示效果。
以上对本发明实施例所提供的一种电压补偿电路及基于电压补偿电路的电压补偿方法进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (8)

  1. 一种电压补偿电路，其特征在于，包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：
    所述第一薄膜晶体管电路包括栅极连接第一栅极驱动信号的第一薄膜晶体管；
    所述控制电路包括电源管理芯片、第一电阻R1，第二电阻R2和第三电阻R3，所述电源管理芯片的输出端Output1连接所述第三电阻R3的第一端，所述第三电阻R3的第二端连接所述第一电阻R1的第一端，所述第三电阻R3的第二端连接所述电源管理芯片的反馈端，所述电源管理芯片的反馈端FB连接第二电阻R2的第一端，所述第二电阻R2的第二端接地，所述第一电阻R1的第二端连接所述扫描驱动芯片的输入端VGH，所述扫描驱动芯片的输出端Output2输出所述第一栅极驱动信号；
    所述第一薄膜晶体管的源极连接所述控制电路的所述电源管理芯片的第一输入端Input1，所述电源管理芯片的第二输入端Input2连接所述第一栅极驱动信号，所述电源管理芯片用于检测所述第一薄膜晶体管的栅极接收所述第一栅极驱动信号的当前帧时所述第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，根据所述电压变化时长对应的所述当前帧的输出端电压Voutput1调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的。
  2. 根据权利要求1所述的电压补偿电路，其特征在于，所述第二薄膜晶体管电路包括多个处于不同扫描行的薄膜晶体管，所述多个处于不同扫描行的薄膜晶体管连接的栅极驱动信号不同。
  3. 根据权利要求1所述的电压补偿电路，其特征在于，所述电源管理芯片的反馈端的电压VFB为定值。
  4. 根据权利要求1所述的电压补偿电路，其特征在于，所述电源管理芯片 的第一输入端Input1检测所述第一薄膜晶体管的源极驱动电压。
  5. 一种电压补偿方法，其特征在于，所述电压补偿方法应用于电压补偿电路，所述电压补偿电路包括第一薄膜晶体管电路、控制电路和扫描驱动芯片，其中：
    所述第一薄膜晶体管电路包括栅极连接第一栅极驱动信号的第一薄膜晶体管；
    所述控制电路包括电源管理芯片、第一电阻R1，第二电阻R2和第三电阻R3，所述电源管理芯片的输出端Output1连接所述第三电阻R3的第一端，所述第三电阻R3的第二端连接所述第一电阻R1的第一端，所述第三电阻R3的第二端连接所述电源管理芯片的反馈端，所述电源管理芯片的反馈端FB连接第二电阻R2的第一端，所述第二电阻R2的第二端接地，所述第一电阻R1的第二端连接所述扫描驱动芯片的输入端VGH，所述扫描驱动芯片的输出端Output2输出所述第一栅极驱动信号；
    所述第一薄膜晶体管的源极连接所述控制电路的所述电源管理芯片的第一输入端Input1，所述电源管理芯片的第二输入端Input2连接所述第一栅极驱动信号，所述电源管理芯片用于检测所述第一薄膜晶体管的栅极接收所述第一栅极驱动信号的当前帧时所述第一薄膜晶体管的源极的驱动电压Vs的电压变化时长，根据所述电压变化时长对应的所述当前帧的输出端电压Voutput1调整有源矩阵液晶显示器中用于显示的第二薄膜晶体管电路连接的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的；
    所述方法包括：
    当电源管理芯片的第二输入端Input2检测到第一栅极驱动信号的当前帧时间内接入的栅极驱动电压发生变化时，检测所述电源管理芯片的第一输入端Input1连接的第一薄膜晶体管的源极驱动电压Vs的电压变化时长，所述第一栅极驱动信号连接所述第一薄膜晶体管的栅极；
    从上升沿时间与电源管理芯片的输出端电压的对应关系中查找所述第一薄膜晶体管的源极驱动电压Vs的电压变化时长对应的电源管理芯片当前帧输出端电压Voutput1；
    根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小。
  6. 根据权利要求5所述的方法，其特征在于，所述电压变化时长包括上升沿时长或下降沿时长。
  7. 根据权利要求5所述的方法，其特征在于，所述根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小包括：
    按照如下公式调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小：
    (VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2；
    其中，VGH为第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平，VFB为电源管理芯片的反馈端电压，Voutput1为电源管理芯片当前帧输出端电压，R1为第一电阻的阻值，R2为第二电阻的阻值，R3为第三电阻的阻值。
  8. 根据权利要求6所述的方法，其特征在于，所述根据所述电源管理芯片当前帧输出端电压Voutput1大小调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小包括：
    按照如下公式调整第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平VGH的大小：
    (VGH-VFB)/R1+(Voutput1-VFB)/R3＝VFB/R2；
    其中，VGH为第二薄膜晶体管电路的栅极驱动信号的当前帧或下一帧栅极驱动电压高电平，VFB为电源管理芯片的反馈端电压，Voutput1为电源管理芯片当前帧输出端电压，R1为第一电阻的阻值，R2为第二电阻的阻值，R3为第三电阻的阻值。
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