WO2016206231A1 - 快速扫频方法、装置和终端、存储介质 - Google Patents

快速扫频方法、装置和终端、存储介质 Download PDF

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Publication number
WO2016206231A1
WO2016206231A1 PCT/CN2015/091454 CN2015091454W WO2016206231A1 WO 2016206231 A1 WO2016206231 A1 WO 2016206231A1 CN 2015091454 W CN2015091454 W CN 2015091454W WO 2016206231 A1 WO2016206231 A1 WO 2016206231A1
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frequency
frequency point
signal
synchronization code
points
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PCT/CN2015/091454
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English (en)
French (fr)
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刘中伟
程健
邱宁
甘前超
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深圳市中兴微电子技术有限公司
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Publication of WO2016206231A1 publication Critical patent/WO2016206231A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04W—WIRELESS COMMUNICATION NETWORKS
    • H04W48/00—Access restriction; Network selection; Access point selection
    • H04W48/16—Discovering, processing access restriction or access information

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  • the present invention relates to frequency scanning technology in the field of mobile communications, and in particular, to a fast frequency sweeping method, apparatus and terminal, and computer storage medium.
  • the frequency sweeping process is that the terminal UE searches for the frequency of the signal in several frequency bands according to the frequency band indication provided by the operator, and selects the frequency point with the strongest signal to stay.
  • the frequency sweep time at the time of booting affects the user experience of using the mobile phone. The long-time boot process is unbearable.
  • the ideal frequency band is only assigned to one system, and there is a large power difference between each frequency point, so that the target frequency point and the adjacent frequency point can be distinguished only by the power difference.
  • the actual situation is that, because the frequency band resources are limited, one frequency band is not necessarily fully allocated to one system, but there may be frequencies of other standards. Therefore, in order to identify the non-standard frequency points, frequency point confirmation needs to be performed based on the synchronization code correlation in the frequency sweeping process, but the frequency point confirmation process is a time-consuming process.
  • the frequency sweep since the frequency sweep is not synchronized, it must be fully correlated within the slot length of 2560 to confirm whether there is a primary scrambling code (Primary SCH, PSCH).
  • Primary SCH Primary SCH
  • PSCH primary synchronization signal
  • the usual power ratio of PSCH in WCDMA is only -15dB, and obtaining a satisfactory correlation peak requires the accumulation of longer time slots.
  • the protocol specifies that the channel grid is 200 kHz, that is, the center point of the WCDMA signal may be located at any frequency of 200 kHz in the frequency band. The more the frequency band, the PSCH correlation needs to be performed. The more false frequencies are excluded.
  • PSS primary synchronization signal
  • the embodiments of the present invention provide a fast frequency sweeping method, device, and terminal, and a computer storage medium, to at least solve the problem that the frequency sweep time is too long in the related art.
  • the embodiment of the invention provides a fast frequency sweeping method, the method comprising:
  • the center frequency point is an N+1th frequency point of the 2N+1 frequency points;
  • the selecting 2N+1 consecutive frequency points satisfying the preset condition including:
  • the frequency offset compensation processing is performed on the other 2N frequency points, including:
  • a frequency offset compensation calculation is performed based on the received signal and the width of a grid corresponding to the communication mode of the signal.
  • the synchronizing code correlation processing is performed on the signal of the 2N+1 channel, including:
  • the embodiment of the invention further provides a fast frequency sweeping device, the device comprising: a frequency offset compensation module and a synchronization code correlation module; wherein
  • the frequency offset compensation module is configured to select 2N+1 consecutive frequency points satisfying a preset condition, wherein the N is a positive integer; and the center frequency point of the 2N+1 frequency points is used as the receiving frequency point. Performing signal reception; the center frequency point is the N+1th frequency point of the 2N+1 frequency points; performing frequency offset compensation processing on the other 2N frequency points except the center frequency point;
  • the synchronization code correlation module is configured to perform synchronization code correlation processing on the 2N+1 way signal synchronization based on the center frequency point and the 2N frequency points of the frequency offset compensation process.
  • the frequency offset compensation module includes:
  • the frequency point selection module is configured to select 2N+1 closely adjacent frequency points that meet the preset condition
  • the signal receiving module is configured to perform signal reception by using a center frequency point of the 2N+1 frequency points as a receiving frequency point;
  • the processing module is configured to perform frequency offset compensation processing on the other 2N frequency points except the center frequency point.
  • the frequency selection module includes:
  • the effective frequency determining unit is configured to scan the specified frequency band by a preset step to obtain an effective frequency point; the power value corresponding to the effective frequency point is greater than a preset power threshold;
  • a candidate frequency point determining unit configured to perform a synchronization code correlation on the effective frequency point, from which a candidate frequency point corresponding to a communication mode of the signal is determined;
  • Selecting a unit configured to sequentially select 2N+1 frequencies adjacent to each other from the candidate frequency points point.
  • the processing module includes 2N processors.
  • Each processor is configured to perform a frequency offset compensation calculation based on the received signal and a width of a grid corresponding to a communication mode of the signal.
  • the synchronization code correlation module includes: 2N+1 synchronization code correlators, where
  • a synchronization code correlator configured to perform synchronization code correlation calculation on the signal according to the central frequency point, wherein the calculation process is performed according to the received signal and a local synchronization code signal generated by the baseband of the terminal;
  • the other 2N synchronization code correlators are configured to perform synchronization code correlation calculation on the 2N channels according to the 2N frequency points of the frequency offset compensation processing, where the calculation process is performed according to the frequency offset compensation
  • the received signal and the local synchronization code signal generated by the baseband of the terminal are performed.
  • the embodiment of the invention further provides a terminal, where the terminal comprises: the device described above.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the foregoing method.
  • the fast frequency sweeping method, device, terminal, and computer storage medium provided by the embodiments of the present invention select 2N+1 frequency points that are in close proximity to each other, and the N is a positive integer; and the 2N+1 frequency is used.
  • the center frequency point in the point is used as the receiving frequency point for signal reception; the center frequency point is the N+1th frequency point of the 2N+1 frequency points; and the other 2N except the center frequency point
  • Frequency-frequency synchronization performs frequency offset compensation processing; based on the center frequency point and the 2N frequency points processed by the frequency offset compensation, synchronous signal correlation processing is performed on the 2N+1-channel signals. It can be seen that, in the embodiment of the present invention, the synchronization code correlation confirmation of multiple frequency points can be synchronously performed. Compared with the serial processing in the prior art, the embodiment of the present invention can effectively reduce the time associated with the synchronization code, thereby reducing the frequency sweep time. Improve the user experience.
  • FIG. 1 is a schematic flowchart of a method for implementing the method according to an embodiment of the present invention
  • FIG. 2 is a schematic structural view 1 of a device according to an embodiment of the present invention.
  • FIG. 3 is a schematic structural diagram of a frequency offset compensation module according to an embodiment of the present invention.
  • FIG. 4 is a schematic structural diagram of a frequency point selection module according to an embodiment of the present invention.
  • FIG. 5 is a schematic structural diagram of a synchronization code correlation module according to an embodiment of the present invention.
  • FIG. 6 is a schematic diagram of a SCH channel in WCDMA according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of a synchronization code signal in LTE according to an embodiment of the present invention.
  • FIG. 8 is a schematic diagram of a frequency sweeping process according to an embodiment of the present invention.
  • FIG. 9 is a schematic diagram of characteristics of a synchronization code according to an embodiment of the present invention.
  • FIG. 10 is a schematic structural diagram of an apparatus according to scenario 2 of the embodiment of the present invention.
  • 2N+1 neighboring frequency points satisfying a preset condition are selected, and the N is a positive integer; the center frequency point of the 2N+1 frequency points is used as a receiving frequency point for performing signals.
  • Receiving; the center frequency point is the N+1th frequency point of the 2N+1 frequency points; performing frequency offset compensation processing on the other 2N frequency points except the center frequency point;
  • the center frequency point and the 2N frequency points processed by the frequency offset compensation are synchronously coded for the 2N+1 way signal.
  • FIG. 1 is a schematic flowchart of an implementation of a method according to an embodiment of the present invention, as shown in FIG.
  • Step 101 Select 2N+1 neighboring frequency points that meet the preset condition, and the N is positive. Integer
  • Step 102 Perform signal reception by using a center frequency point of the 2N+1 frequency points as a receiving frequency point; the center frequency point is an N+1th frequency point of the 2N+1 frequency points;
  • Step 103 Perform frequency offset compensation processing on other 2N frequency points except the center frequency point.
  • Step 104 Synchronize code correlation processing on the 2N+1 way signal based on the center frequency point and the 2N frequency points of the frequency offset compensation process.
  • the selecting 2N+1 consecutive frequency points satisfying the preset condition including:
  • the specified frequency band is scanned according to the preset step size to obtain an effective frequency point; the power value corresponding to the effective frequency point is greater than a preset power threshold, that is, a frequency point with a strong signal is retained, and a frequency point with a weak signal is used. Filtered;
  • the communication modes may include: WCDMA and LTE.
  • the frequency offset compensation processing is performed on the other 2N frequency points, including:
  • a frequency offset compensation calculation is performed based on the received signal and the width of a grid corresponding to the communication mode of the signal.
  • the calculation process can refer to the following formula:
  • the Data out represents a frequency offset compensation processing result
  • the R in . represents the received signal, which can also be understood as an input signal
  • the ⁇ represents a width of a grid corresponding to the communication mode.
  • the synchronizing code correlation processing is performed on the signal of the 2N+1 channel, including:
  • Performing synchronization code correlation calculation on one of the signals based on the center frequency point, and the calculation is performed The process is performed according to the received signal and the local synchronization code signal generated by the baseband of the terminal; the calculation process can refer to the following formula:
  • the synchronization code correlation confirmation of multiple frequency points can be synchronously performed.
  • the embodiment of the present invention can effectively reduce the time associated with the synchronization code, thereby reducing the frequency sweep time. Improve the user experience.
  • the embodiment of the present invention further provides a fast frequency sweeping device.
  • the device includes: a frequency offset compensation module 201 and a synchronization code correlation module 202;
  • the frequency offset compensation module 201 is configured to select 2N+1 frequency points that meet the preset condition, and the N is a positive integer; the center frequency point of the 2N+1 frequency points is used as the receiving frequency. The signal is received by the point; the center frequency point is the N+1th frequency point of the 2N+1 frequency points; and the frequency offset compensation processing is performed on the other 2N frequency points except the center frequency point;
  • the synchronization code correlation module 202 is configured to perform synchronization code correlation processing on the 2N+1 way signal synchronization based on the center frequency point and the 2N frequency points of the frequency offset compensation process.
  • the frequency offset compensation module 201 and the synchronization code correlation module 202 can pass through a central processing unit (CPU), a digital signal processor (DSP), or a programmable logic array (Field). -Programmable Gate Array, FPGA) implementation.
  • CPU central processing unit
  • DSP digital signal processor
  • Field programmable logic array
  • FPGA programmable Gate Array
  • the frequency offset compensation module 201 includes:
  • the frequency point selection module 2011 is configured to select 2N+1 closely adjacent frequency points that meet preset conditions;
  • the signal receiving module 2012 is configured to use the center frequency point of the 2N+1 frequency points as a connection Receiving signal at the frequency receiving point;
  • the processing module 2013 is configured to perform frequency offset compensation processing on the other 2N frequency points except the center frequency point.
  • the frequency point selection module 2011 includes:
  • the effective frequency determining unit 20111 is configured to scan the specified frequency band according to a preset step size to obtain an effective frequency point; the power value corresponding to the effective frequency point is greater than a preset power threshold, that is, a frequency point with a strong reserved signal Filter out the frequency of the signal that is too weak;
  • the candidate frequency point determining unit 20112 is configured to perform synchronization code correlation on the effective frequency point, and determine a candidate frequency point corresponding to the communication mode of the signal, that is, filter out a frequency point of a communication mode that is not the signal ;
  • the selecting unit 20113 is configured to sequentially select 2N+1 frequency points adjacent to each other from the candidate frequency points.
  • the communication modes include: WCDMA and LTE.
  • the processing module 2013 includes 2N processors.
  • Each processor is configured to perform a frequency offset compensation calculation based on the received signal and a width of a grid corresponding to a communication mode of the signal.
  • the calculation process can refer to the following formula:
  • the Data out represents a frequency offset compensation processing result
  • the R in . represents the received signal, which can also be understood as an input signal
  • the ⁇ represents a width of a grid corresponding to the communication mode.
  • the synchronization code correlation module 202 includes: 2N+1 synchronization code correlators 2021, as shown in FIG. 5, where
  • a synchronization code correlator 2021 is configured to perform synchronization code correlation calculation on the signal according to the central frequency point, and the calculation process is performed according to the received signal and a local synchronization code signal generated by the baseband of the terminal; Refer to the following formula:
  • the other 2N synchronization code correlators 2021 are configured to perform synchronization code correlation calculation on the 2N channels according to the 2N frequency points of the frequency offset compensation processing, where the calculation process is performed according to the frequency offset.
  • the compensated received signal and the local sync code signal generated by the baseband of the terminal are performed.
  • the calculation process can refer to the following formula:
  • the embodiment of the invention further provides a terminal, where the terminal comprises: the device described above.
  • Mobile terminals typically use a synchronization channel SCH to search for active cells and neighboring cells.
  • the SCH includes two subchannels, PSCH (Primary SCH) and SSCH (Secondary SCH).
  • the PSCH and SSCH contain 256 chips, which are always transmitted at the first 256 chip of each slot, as shown in FIG. 6.
  • the slot is the same for each slot, and for the SSCH, one of the 16 sets of 256 chips is selected according to the needs of each slot, and the specific selection manner is related to the scrambling code group.
  • the PSCH synchronization code correlation can be used here.
  • the synchronization signal includes a primary synchronization signal PSS (Primary synchronization signal) and a secondary synchronization signal SSS (Secondary synchronization signal).
  • PSS Primary synchronization signal
  • SSS Secondary synchronization signal
  • the WCDMA frequency band signal bandwidth is 5 MHz according to the protocol 25.101, the channel grid is 200 kHz, and the frequency center interval is necessarily an integer multiple of 200 kHz.
  • the Mobile Communication System (UMTS) allocates several frequency bands for WCDMA.
  • the minimum bandwidth is 10MHz (BAND VI), the effective frequency is 25, the maximum frequency bandwidth is 75MHz (BAND III), and the effective frequency is 350.
  • the frequency sweep first performs a coarse sweep in the frequency band with a certain step size Fr.
  • the RSSI power of each coarse sweep frequency point is calculated, and the power sweep of the coarse sweep frequency points F0-F7 is performed.
  • the frequency band with lower power is filtered out, and several frequency points F1, F4, F5, and F6 with stronger power are selected for fine cleaning.
  • the possible candidate frequency points are traversed within a certain range around the candidate coarse sweep frequency points, and the synchronization code correlation is sequentially performed for each fine sweep frequency point.
  • the input frequency point and the real frequency point do not coincide, that is, at least one integer multiple of the grid is separated, at this time, there is no correlation peak, that is, the frequency point is not the W frequency point, and is excluded from the upper frequency point. See the frequency point confirmation method of the sync code below.
  • the ideal frequency band is only assigned to one system, and there is a large power difference between each frequency point, so that the target frequency point and the adjacent frequency point can be distinguished only by the power difference.
  • the respective synchronization codes are transmitted. Therefore, whether the WCDMA or LTE frequency points can be confirmed by the detection of the synchronization code is expressed by the following formula.
  • R in . is an input signal, which can also be expressed as the sum of PSC+OCNS+noise, where PSC is the synchronization code signal sent by the base station, OCNS is the other code channel signal of the same scrambling code, and Noise is the interference noise.
  • PSC is the synchronization code signal sent by the base station
  • OCNS is the other code channel signal of the same scrambling code
  • Noise is the interference noise.
  • the PSC is the PSCH
  • the PSCH has good correlation characteristics. Only when it is correlated with the PSCH signal can the explicit correlation peak be obtained, and when it is related to other signals or is not aligned with the PSCH signal, the correlation cannot be obtained. Peak.
  • the UE terminal After receiving the input signal including the PSCH, the UE terminal also generates a PSCH signal locally, and performs sliding correlation with the input signal in one radio frame. If the input signal contains the PSCH signal, the position of the PSCH signal is compared. A large correlation peak, otherwise there is no correlation peak, and accordingly, it can be determined whether the input signal contains a PSCH synchronization signal.
  • the important center frequency offset caused by the phase rotation of the input signal can be expressed as follows:
  • the simulation shows that the synchronization code correlation is performed after the F2-centered input signal is compensated for -Fr*N, and has no effect on the synchronization code correlation characteristics compared with the synchronization code correlation directly with the Fa-centered input signal.
  • the PSCH correlation process can be changed from serial to parallel, thereby greatly speeding up the correlation of the sync code in the swept frequency, as shown in the parallel sync code correlation device shown in FIG.
  • the synchronization code correlation time can be reduced to 1/3 of the original; if the parallel branch is 5, the synchronization code correlation time can be reduced to 1/5 of the original. Since the synchronization code correlation confirmation time occupies most of the sweep time, it is equivalent to greatly reducing the execution time of the sweep and improving the user experience.
  • FIG. 10 is a schematic diagram of a corresponding device structure, and the digital-to-analog converter ADC1001 and the decision feedback equalizer DFE1002 are scanned.
  • a common module in the frequency process which is not described in detail herein; the frequency offset compensation module 1003 and the PSC correlator 1004 are main functional modules of the embodiment of the present invention, which are respectively used to perform the operations of step 3 and step 4 below. Proceed as follows:
  • Step 1 Rough sweep (obtain effective frequency point), specific:
  • step1 scans on a specified frequency band, for each coarse sweep frequency point, the power calculation module estimates the energy of the received data, and retains M frequency points according to energy (power) from large to small; For unreserved frequency points, the signal is considered to be too weak (the power value corresponding to the frequency point is less than the preset power threshold), and these frequency points may not be processed later, in order to shorten the search time.
  • Step 2 Fine sweep (obtain effective frequency), specific:
  • the real frequency points are within the range of these coarse sweep frequency points, and the frequency points located in these ranges are used as the candidate frequency points for the fine sweep, and the synchronization code correlation processing is required.
  • a candidate frequency point corresponding to the communication mode of the signal is determined therefrom.
  • Steps 1 and 2 are prior art and will not be described in detail herein.
  • Step 3 Frequency offset compensation on the baseband, specific:
  • Selecting candidate frequency points determined by 2N+1 fine sweeps in close proximity to each other, N may take 1 or 2, and use the 2N+1 frequency point centers as receiving frequency points for signal reception;
  • N is mainly determined by hardware conditions. If three synchronization code correlators are set in the terminal, N is 1; if 5 synchronization code correlators are set in the terminal, N is 2.
  • the PSC correlator 1004 performs synchronization code correlation confirmation, as shown in FIG.
  • the frequency offset compensation module 1003 needs to compensate the frequency offset, and has:
  • Step 4 Parallel synchronization code related confirmation, specific:
  • Step 5 Perform real frequency verification based on the correlation value of the synchronization code. Specifically:
  • the frequency point with a larger correlation value is selected through the relevant threshold and used as the real frequency point.
  • the synchronization code correlation confirmation of multiple frequency points can be synchronously performed.
  • the embodiment of the present invention can effectively reduce the time associated with the synchronization code, thereby reducing the frequency sweep time. Improve the user experience.
  • the embodiment of the invention further provides a computer storage medium, wherein the computer storage medium stores computer executable instructions, and the computer executable instructions are used to execute the foregoing fast frequency sweeping method.
  • embodiments of the present invention can be provided as a method, system, or computer program product. Accordingly, the present invention can take the form of a hardware embodiment, a software embodiment, or a combination of software and hardware. Moreover, the invention can take the form of a computer program product embodied on one or more computer-usable storage media (including but not limited to disk storage and optical storage, etc.) including computer usable program code.
  • the computer program instructions can also be stored in a computer readable memory that can direct a computer or other programmable data processing device to operate in a particular manner, such that the computer is readable and stored
  • the instructions in the reservoir produce an article of manufacture comprising an instruction device that implements the functions specified in one or more blocks of the flow or in a flow or block diagram of the flowchart.
  • These computer program instructions can also be loaded onto a computer or other programmable data processing device such that a series of operational steps are performed on a computer or other programmable device to produce computer-implemented processing for execution on a computer or other programmable device.
  • the instructions provide steps for implementing the functions specified in one or more of the flow or in a block or blocks of a flow diagram.
  • 2N+1 mutually adjacent frequency points satisfying a preset condition are selected; and a center frequency point of 2N+1 frequency points is used as a receiving frequency point for signal reception; the center frequency point is The N+1th frequency point of the 2N+1 frequency points; performing frequency offset compensation processing on the other 2N frequency points except the center frequency point; based on the center frequency point and the frequency offset
  • the 2N frequency points of the compensation process are synchronously coded for the 2N+1 way signals.
  • the synchronization code correlation confirmation of multiple frequency points can be realized synchronously.
  • the embodiment of the invention can effectively reduce the time associated with the synchronization code, thereby achieving the purpose of reducing the frequency sweep time and improving the user experience.

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  • Engineering & Computer Science (AREA)
  • Computer Security & Cryptography (AREA)
  • Computer Networks & Wireless Communication (AREA)
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  • Mobile Radio Communication Systems (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)

Abstract

本发明公开了一种快速扫频方法，包括：选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。本发明还同时公开了实现所述方法的装置、终端和计算机存储介质。

Description

快速扫频方法、装置和终端、存储介质 技术领域
本发明涉及移动通信领域中的频率扫描技术，尤其涉及一种快速扫频方法、装置和终端、计算机存储介质。
背景技术
对于数字通信系统来说，包括第二代移动通信技术(2G)的全球移动通信系统(GSM)，第三代移动通信技术(3G)的宽带码分多址(WCDMA)、时分同步码分多址(TD-SCDMA)，第四代移动通信技术(4G)的长期演进(LTE)，一般会分配若干频段。扫频过程就是终端UE根据运营商提供的频段指示，在若干频段上对信号频点进行搜索，并选择信号最强的频点进行驻留，开机时候的扫频时间影响用户对手机使用的体验，耗时过长的开机过程是难以忍受的。
理想的频段是仅分配给一种制式，且各个频点之间，存在较大的功率差，因而仅仅依靠功率差即可以将目标频点和相邻频点区分开来。但实际的情况是，由于频带资源是有限的，一个频段上，并不一定完全分配给一种制式，而是还可能存在其它制式的频点。因此，为了识别出非本制式频点，在扫频过程中需要基于同步码相关进行频点确认，但是，所述频点确认过程是一个耗时较长的过程。
以WCDMA为例，由于扫频的时候并未同步，因此必须在2560的时隙长度内全相关以确认是否存在主扰码(Primary SCH，PSCH)。同时，PSCH在WCDMA中通常的功率占比仅-15dB，得到满意的相关峰值需要较长时隙的累加。协议规定信道栅格为200kHz，即WCDMA信号的中心点可能位于频段中任意一个200kHz的频点上，频段越多，需要通过PSCH相关进行 排除的虚假频点越多。同样，对于LTE系统，频段越多，需要进行主同步信号(Primary synchronization signal，PSS)相关确认的频点越多。
发明内容
为解决现有存在的技术问题，本发明实施例提供一种快速扫频方法、装置和终端、计算机存储介质，以至少解决相关技术中扫频时间过长的问题。
本发明实施例提供了一种快速扫频方法，该方法包括：
选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；
以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；
对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
本发明实施例中，所述选取相互紧邻的2N+1个满足预设条件的频点，包括：
按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限；
对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点；
从所述候选频点中顺次选取相互紧邻的2N+1个频点。
本发明实施例中，所述对其他2N个频点进行频偏补偿处理，包括：
依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。
本发明实施例中，所述对2N+1路所述信号同步进行同步码相关处理，包括：
基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过程依据接收的所述信号以及终端基带产生的本地同步码信号进行；同时，
基于所述经频偏补偿处理的2N个频点，对2N路所述信号进行同步码相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行。
本发明实施例还提供了一种快速扫频装置，该装置包括：频偏补偿模块和同步码相关模块；其中，
所述频偏补偿模块，配置为选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
所述同步码相关模块，配置为基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
本发明实施例中，所述频偏补偿模块包括：
频点选取模块，配置为选取相互紧邻的2N+1个满足预设条件的频点；
信号接收模块，配置为以所述2N+1个频点中的中心频点作为接收频点进行信号接收；
处理模块，配置为对除所述中心频点外的其他2N个频点同步进行频偏补偿处理。
本发明实施例中，所述频点选取模块包括：
有效频点确定单元，配置为按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限；
候选频点确定单元，配置为对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点；
选取单元，配置为从所述候选频点中顺次选取相互紧邻的2N+1个频 点。
本发明实施例中，所述处理模块包括2N个处理器，
每个处理器，配置为依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。
本发明实施例中，所述同步码相关模块包括：2N+1个同步码相关器，其中，
一个同步码相关器，配置为基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过程依据接收的所述信号以及终端基带产生的本地同步码信号进行；同时，
所述其他2N个同步码相关器，配置为基于所述经频偏补偿处理的2N个频点，对2N路所述信号进行同步码相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行。
本发明实施例还提供了一种终端，所述终端包括：上文所述的装置。
本发明实施例还提供了一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，所述计算机可执行指令用于执行前述的方法。
本发明实施例提供的快速扫频方法、装置和终端、计算机存储介质，选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。可见，本发明实施例可实现同步进行多个频点的同步码相关确认，与现有技术中的串行处理，本发明实施例可有效减少同步码相关的时间，从而达到减少扫频时间，提升用户体验的目的。
附图说明
在附图(其不一定是按比例绘制的)中，相似的附图标记可在不同的视图中描述相似的部件。具有不同字母后缀的相似附图标记可表示相似部件的不同示例。附图以示例而非限制的方式大体示出了本文中所讨论的各个实施例。
图1为本发明实施例所述方法实现流程示意图；
图2为本发明实施例所述装置结构示意图一；
图3为本发明实施例所述频偏补偿模块的结构示意图；
图4为本发明实施例所述频点选取模块的结构示意图；
图5为本发明实施例所述同步码相关模块的结构示意图；
图6为本发明实施例所述WCDMA中的SCH信道示意图；
图7为本发明实施例所述LTE中的同步码信号示意图；
图8为本发明实施例所述扫频流程示意图；
图9为本发明实施例所述同步码特性示意图；
图10为本发明实施例场景二所述装置的结构示意图。
具体实施方式
本发明的实施例中，选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
下面结合附图及具体实施例对本发明作进一步详细说明。
图1为本发明实施例所述方法的实现流程示意图，如图1所示，包括：
步骤101：选取相互紧邻的2N+1个满足预设条件的频点，所述N为正 整数；
步骤102：以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；
步骤103：对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
步骤104：基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
本发明实施例中，所述选取相互紧邻的2N+1个满足预设条件的频点，包括：
按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限，即：保留信号较强的频点，将信号太弱的频点过滤掉；
对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点，即：将非所述信号的通信模式的频点滤除；
从所述候选频点中顺次选取相互紧邻的2N+1个频点。
这里，所述通信模式可包括：WCDMA和LTE。
本发明实施例中，所述对其他2N个频点进行频偏补偿处理，包括：
依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。所述计算过程可参照如下公式：
Dataout＝Rin.*e-jω；
其中，所述Dataout表示频偏补偿处理结果；所述Rin.表示接收的所述信号，也可理解为输入信号；所述ω表示通信模式相对应的一个栅格的宽度。
本发明实施例中，所述对2N+1路所述信号同步进行同步码相关处理，包括：
基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过 程依据接收的所述信号以及终端基带产生的本地同步码信号进行；计算过程可参照如下公式：
Corr＝Rin.*conj(PSC)；
同时，基于所述经频偏补偿处理的2N个频点对2N路所述信号进行同步码相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行；计算过程可参照如下公式：
Corr＝Dataout*conj(PSC)。
可见，本发明实施例可实现同步进行多个频点的同步码相关确认，与现有技术中的串行处理，本发明实施例可有效减少同步码相关的时间，从而达到减少扫频时间，提升用户体验的目的。
本发明实施例还提供了一种快速扫频装置，如图2所示，该装置包括：频偏补偿模块201和同步码相关模块202；其中，
所述频偏补偿模块201，配置为选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
所述同步码相关模块202，配置为基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
在实际应用过程中，所述频偏补偿模块201和同步码相关模块202可通过中央处理器(Central Processing Unit，CPU)、数字信号处理器(Digital Signal Processor，DSP)或可编程逻辑阵列(Field－Programmable Gate Array，FPGA)实现。
一个实施例中，如图3所示，所述频偏补偿模块201包括：
频点选取模块2011，配置为选取相互紧邻的2N+1个满足预设条件的频点；
信号接收模块2012，配置为以所述2N+1个频点中的中心频点作为接 收频点进行信号接收；
处理模块2013，配置为对除所述中心频点外的其他2N个频点同步进行频偏补偿处理。
一个实施例中，如图4所示，所述频点选取模块2011包括：
有效频点确定单元20111，配置为按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限即：保留信号较强的频点，将信号太弱的频点过滤掉；
候选频点确定单元20112，配置为对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点，即：将非所述信号的通信模式的频点滤除；
选取单元20113，配置为从所述候选频点中顺次选取相互紧邻的2N+1个频点。
这里，所述通信模式包括：WCDMA和LTE。
本发明实施例中，所述处理模块2013包括2N个处理器，
每个处理器，配置为依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。所述计算过程可参照如下公式：
Dataout＝Rin.*e-jω；
其中，所述Dataout表示频偏补偿处理结果；所述Rin.表示接收的所述信号，也可理解为输入信号；所述ω表示通信模式相对应的一个栅格的宽度。
本发明实施例中，所述同步码相关模块202包括：2N+1个同步码相关器2021，如图5所示，其中，
一个同步码相关器2021，配置为基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过程依据接收的所述信号以及终端基带产生的本地同步码信号进行；计算过程可参照如下公式：
Corr＝Rin.*conj(PSC)；
同时，所述其他2N个同步码相关器2021，配置为基于所述经频偏补偿处理的2N个频点对2N路所述信号进行同步码相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行。计算过程可参照如下公式：
Corr＝Dataout*conj(PSC)。
本发明实施例还提供了一种终端，所述终端包括：上文所述的装置。
为了便于理解本发明，下面对扫频相关的技术进行简单描述。
一、同步码
手机终端通常使用同步信道SCH(synchronization channel)来搜索激活小区和相邻小区。
在WCDMA中，SCH包含两个子信道，PSCH(Primary SCH)和SSCH(Secondary SCH)，PSCH和SSCH包含256码片，总在每个时隙的头256chip进行发送，如图6所示。对于PSCH，是每个时隙Slot相同的，而对于SSCH，在每个时隙根据需要从16个256码片的集合中选取一个，具体的选取方式和扰码组有关。对于扫频过程来说，由于只需要确认有无WCDMA频点，因此，这里仅使用PSCH同步码相关就可以了。
在LTE中，同步信号包括主同步信号PSS(Primary synchronization signal)和辅同步信号SSS(Secondary synchronization signal)。对于LTE系统，一个无线帧(10ms长度)包含10个子帧(1ms长度)，每个子帧又包含2个时隙，每个时隙的长度为0.5ms，因此，一个无线帧总共包含20个0.5ms的时隙。对于FDD，PSS总是位于第0和第10时隙的最后一个OFDM符号上，SSS则位于第0和第10时隙的PSS前面一个OFDM符号上，如图7所示。对于扫频过程来说，由于只需要确认有无LTE频点，因此，这里仅使用PSS同步码相关就可以了。
二、扫频过程
对于数字通信系统来说，包括2G的GSM，3G的WCDMA、TD-SCDMA，4G的LTE，一般会分配若干频段。以WCDMA制式为例，WCDMA按照协议25.101规定频点信号带宽为5MHz，信道栅格为200kHz，频点中心的间隔必然是200kHz的整数倍。移动通信系统(UMTS)为WCDMA分配了若干频段，最小的频带宽度为10MHz(BAND VI)，有效频点25个，最大的频段宽度为75MHz(BAND III)，有效频点350个。
仍以WCDMA为例，假定在频段上有3个频点Fa、Fb、Fc，其中，Fa并非W频点，如图8所示。扫频首先会在该频段内以一定步长Fr进行粗扫，图8(a)所示，计算每个粗扫频点的RSSI功率，并对粗扫频点F0-F7进行功率排序。如图8(b)所示，过滤掉功率较低的频段，选择功率较强的几个频点F1、F4、F5、F6用于精扫。在精扫中，在候选粗扫频点周围一定范围内对可能的候选频点进行遍历，依次对每个精扫频点进行同步码相关。当输入频点和真实频点不重合，即至少间隔一个栅格的整数倍时，此时，没有相关峰值，即可以认为这个频点不是W频点，排除在上报频点之外，原理详见下文同步码的频点确认方法。
三、基于同步码的频点确认
理想的频段是仅分配给一种制式，且各个频点之间，存在较大的功率差，因而仅仅依靠功率差即可以将目标频点和相邻频点区分开来。
但实际的情况是，由于频带资源是有限的，一个频段上，并不一定完全分配给一种制式，而是还可能存在其它制式的频点，这意味着频段上找到的强功率频点也可能并非本制式的信号，将错误的频点上报将引起对假频点的小区搜索，导致小区搜索流程延长甚至失败，因而扫频有必要识别出非本制式频点并加以排除。
对于WCDMA或LTE基站来说，都会发送各自的同步码，因此，可以通过同步码的检测来确认是否为WCDMA或LTE频点，使用公式表示如下。
Corr＝Rin.*conj(PSC)＝(PSC+OCNS+Noise)*conj(PSC)，
Rin.为输入信号，又可以表示为PSC+OCNS+noise之和，其中，PSC为基站发送的同步码信号，OCNS为同扰码的其它码道信号，Noise为干扰噪声。对于WCDMA，PSC即为PSCH，PSCH有良好的相关特性，只有当和PSCH信号对齐相关时，才能得到明显的相关峰值，而当和其它信号相关或和PSCH信号不对齐相关时，都不能得到相关峰值。
在接收到含PSCH的输入信号后，UE终端会在本地也产生一个PSCH信号，并与输入信号在一个无线帧内进行滑动相关，如果输入信号含有PSCH信号，则会在PSCH信号的位置得到较大的相关峰值，否则没有相关峰，据此，可以判断出输入信号中是否含有PSCH同步信号。
当输入频点和真实频点不重合，即至少间隔一个栅格的整数倍时，此时，没有相关峰值。如图9所示，假定真实频点为Fa，其频带宽度从F0-F3。此时，输入信号中心频点为F2，其频带宽度从F1-F4，那么，输入信号带宽中损失了从F0-F1的信号，且包含了从F3-F4的频带干扰，但这都不是最重要的，重要的中心频点偏移对输入信号造成的相位旋转，可以用公式表示如下：
Corr＝Rin.*conj(PSC)＝(PSC+OCNS+Noise)*ejω*conj(PSC)。
可见，相关过程中多出了个ejω分量，这改变了输入同步码的信号特性，使得和本地生成的同步码相关，不再能得到相关峰值，从而可以判断出真实频点。
下面结合具体应用场景对本发明实施例进行详细描述。
场景一
仍以图9例进行说明，对于输入信号中心频点F2和真实频点Fa间隔Fr*N的频点来说，它们之间的大部分频带是重叠的。假设是WCDMA，输入信号中心频点和真实频点间隔一个栅格，即200kHz，那么以F2为中心 的输入信号和以Fa为中心的输入信号比较，有4.8MHz的带宽是重叠的，因此，它们之间的能量差异实际上不超过4％。如果是间隔两个栅格，即400kHz，那么，也有4.6MHz的带宽是重叠的，它们之间的能量差异不超过8％。这意味着能量损失足够小，损失的带宽基本上不会影响相关特性。只要将因为中心频点偏离造成的信号旋转进行补偿，例如，对以F2为中心的输入信号补偿-Fr*N，那么，和直接在真实频点Fa上的接收信号相关特性相同，其能量损失基本可以忽略，用公式表示如下：
Corr＝Rin.*conj(PSC)＝(PSC+OCNS+Noise)*ejω*e-jω*conj(PSC)；
仿真说明，对以F2为中心的输入信号补偿-Fr*N后做同步码相关，和直接在以Fa为中心的输入信号做同步码相关相比，对同步码相关特性没有什么影响。
由此，对于同步码相关，通过RF接收到以F2为中心的输入信号后，我们可以通过频偏补偿复原出其邻频信号。如果是使用并行的同步码相关器，那么，就可以将PSCH相关过程由串行改为并行，从而大大加快扫频中同步码相关的速度，如图10所示的并行同步码相关装置。
经测试发现，如果并行支路为3，则可以将同步码相关时间减小为原来的1/3；如果并行支路为5，则可以将同步码相关时间减小为原来的1/5。由于同步码相关确认时间占据了扫频时间的绝大部分，这也相当于大幅缩减了扫频的执行时间，改善了用户体验。
场景二
本场景以用于WCDMA系统的扫频模块为实施例，描述了并行同步码相关的具体实施方法，图10为对应的装置结构示意图，所述数模转换器ADC1001和判决反馈均衡器DFE1002为扫频过程中通用模块，此处不再详述；所述频偏补偿模块1003和PSC相关器1004为本发明实施例主要功能模块，分别用于执行下述步骤三以及步骤四的操作，具体实施步骤如下：
步骤一：粗扫(获得有效频点)，具体的：
以预设步长，如：step1在指定频段上进行扫描，对于每一个粗扫频点，由功率计算模块估计接收数据的能量，并按照能量(功率)由大到小保留M个频点；对于未保留的频点，则认为信号太弱(频点对应的功率值小于预设的功率门限)，可以不对这些频点进行后续处理，以期达到缩短搜网时间的目的。
步骤二：精扫(获得有效频点)，具体的：
对粗扫确定的M个频点，认为真实的频点就在这些粗扫频点的范围内，对位于这些范围内的频点，作为精扫的候选频点，需要进行同步码相关处理，以从中确定与所述信号的通信模式对应的候选频点。
步骤一、二为现有技术，此处不再详述。
步骤三：基带上的频偏补偿，具体的：
选择相互紧邻的2N+1个精扫确定的候选频点，N可取1或2，并以这2N+1个频点中心作为接收频点进行信号接收；
这里，N的取值主要由硬件条件决定，如果终端中对应设置3个同步码相关器，则N取值为1；如果终端中对应设置5个同步码相关器，则N取值为2。
对于中心频点，由于不存在频率偏差，可直接传递给下一模块，即PSC相关器1004进行同步码相关确认，如图10所示。
但对于中心频点的相邻频点，由于是利用中心频点输入信号构造，彼此相差一个栅格宽度，因此需要通过频偏补偿模块1003对频偏进行补偿，有：
Dataout＝Rin.*e-jω。
步骤四：并行的同步码相关确认，具体的：
对多路(2N+1路)接收信号，使用2N+1个同步码相关器同步进行同 步码相关处理，以加快同步码相关过程。
步骤五：根据同步码相关值进行真实频点确认，具体的：
同步码相关结束后，通过相关门限选择具有较大相关值的频点，并作为真实频点。
可见，本发明实施例可实现同步进行多个频点的同步码相关确认，与现有技术中的串行处理，本发明实施例可有效减少同步码相关的时间，从而达到减少扫频时间，提升用户体验的目的。
本发明实施例还提供了一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，所述计算机可执行指令用于执行前述的快速扫频方法。
本领域内的技术人员应明白，本发明的实施例可提供为方法、系统、或计算机程序产品。因此，本发明可采用硬件实施例、软件实施例、或结合软件和硬件方面的实施例的形式。而且，本发明可采用在一个或多个其中包含有计算机可用程序代码的计算机可用存储介质(包括但不限于磁盘存储器和光学存储器等)上实施的计算机程序产品的形式。
本发明是参照根据本发明实施例的方法、设备(系统)、和计算机程序产品的流程图和/或方框图来描述的。应理解可由计算机程序指令实现流程图和/或方框图中的每一流程和/或方框、以及流程图和/或方框图中的流程和/或方框的结合。可提供这些计算机程序指令到通用计算机、专用计算机、嵌入式处理机或其他可编程数据处理设备的处理器以产生一个机器，使得通过计算机或其他可编程数据处理设备的处理器执行的指令产生用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的装置。
这些计算机程序指令也可存储在能引导计算机或其他可编程数据处理设备以特定方式工作的计算机可读存储器中，使得存储在该计算机可读存 储器中的指令产生包括指令装置的制造品，该指令装置实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能。
这些计算机程序指令也可装载到计算机或其他可编程数据处理设备上，使得在计算机或其他可编程设备上执行一系列操作步骤以产生计算机实现的处理，从而在计算机或其他可编程设备上执行的指令提供用于实现在流程图一个流程或多个流程和/或方框图一个方框或多个方框中指定的功能的步骤。
以上所述，仅为本发明的较佳实施例而已，并非用于限定本发明的保护范围。
工业实用性
在本发明实施例中，选取相互紧邻的2N+1个满足预设条件的频点；以2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。可实现同步进行多个频点的同步码相关确认，与现有技术中的串行处理，本发明实施例可有效减少同步码相关的时间，从而达到减少扫频时间，提升用户体验的目的。

Claims (11)

  1. 一种快速扫频方法，该方法包括：
    选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；
    以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；
    对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
    基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
  2. 根据权利要求1所述的方法，其中，所述选取相互紧邻的2N+1个满足预设条件的频点，包括：
    按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限；
    对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点；
    从所述候选频点中顺次选取相互紧邻的2N+1个频点。
  3. 根据权利要求1所述的方法，其中，所述对其他2N个频点进行频偏补偿处理，包括：
    依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。
  4. 根据权利要求3所述的方法，其中，所述对2N+1路所述信号同步进行同步码相关处理，包括：
    基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过程依据接收的所述信号以及终端基带产生的本地同步码信号进行；同时，
    基于所述经频偏补偿处理的2N个频点，对2N路所述信号进行同步码 相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行。
  5. 一种快速扫频装置，该装置包括：频偏补偿模块和同步码相关模块；其中，
    所述频偏补偿模块，配置为选取相互紧邻的2N+1个满足预设条件的频点，所述N为正整数；以所述2N+1个频点中的中心频点作为接收频点进行信号接收；所述中心频点为所述2N+1个频点中的第N+1个频点；对除所述中心频点外的其他2N个频点同步进行频偏补偿处理；
    所述同步码相关模块，配置为基于所述中心频点以及所述经频偏补偿处理的2N个频点，对2N+1路所述信号同步进行同步码相关处理。
  6. 根据权利要求1所述的装置，其中，所述频偏补偿模块包括：
    频点选取模块，配置为选取相互紧邻的2N+1个满足预设条件的频点；
    信号接收模块，配置为以所述2N+1个频点中的中心频点作为接收频点进行信号接收；
    处理模块，配置为对除所述中心频点外的其他2N个频点同步进行频偏补偿处理。
  7. 根据权利要求6所述的装置，其中，所述频点选取模块包括：
    有效频点确定单元，配置为按预设的步长对指定频段进行扫描，得到有效频点；所述有效频点对应的功率值大于预设的功率门限；
    候选频点确定单元，配置为对于所述有效频点进行同步码相关，从中确定与所述信号的通信模式对应的候选频点；
    选取单元，配置为从所述候选频点中顺次选取相互紧邻的2N+1个频点。
  8. 根据权利要求6所述的装置，其中，所述处理模块包括2N个处理器，
    每个处理器，配置为依据接收的所述信号以及与所述信号的通信模式相对应的一个栅格的宽度进行频偏补偿计算。
  9. 根据权利要求6所述的装置，其中，所述同步码相关模块包括：2N+1个同步码相关器，其中，
    一个同步码相关器，配置为基于所述中心频点对一路所述信号进行同步码相关计算，所述计算过程依据接收的所述信号以及终端基带产生的本地同步码信号进行；同时，
    所述其他2N个同步码相关器，配置为基于所述经频偏补偿处理的2N个频点，对2N路所述信号进行同步码相关计算，所述计算过程依据所述经过频偏补偿的接收信号以及终端基带产生的本地同步码信号进行。
  10. 一种终端，所述终端包括：权利要求5-9中任一项所述的装置。
  11. 一种计算机存储介质，所述计算机存储介质中存储有计算机可执行指令，所述计算机可执行指令用于执行权利要求1至4任一项所述的方法。
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