WO2016199838A1 - SUBSTRAT β-Ga2O3, STRUCTURE STRATIFIÉE DE SEMICONDUCTEUR, ET ÉLÉMENT SEMICONDUCTEUR - Google Patents

SUBSTRAT β-Ga2O3, STRUCTURE STRATIFIÉE DE SEMICONDUCTEUR, ET ÉLÉMENT SEMICONDUCTEUR Download PDF

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WO2016199838A1
WO2016199838A1 PCT/JP2016/067178 JP2016067178W WO2016199838A1 WO 2016199838 A1 WO2016199838 A1 WO 2016199838A1 JP 2016067178 W JP2016067178 W JP 2016067178W WO 2016199838 A1 WO2016199838 A1 WO 2016199838A1
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main surface
substrate
width
center
crystal
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PCT/JP2016/067178
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English (en)
Japanese (ja)
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佳弘 山下
飯塚　和幸
嘉克 森島
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株式会社タムラ製作所
株式会社光波
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02414—Oxide semiconducting materials not being Group 12/16 materials, e.g. ternary compounds
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10—Inorganic compounds or compositions
    • C30B29/16—Oxides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/02433—Crystal orientation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02538—Group 13/15 materials
    • H01L21/0254—Nitrides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02579—P-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/26—Materials of the light emitting region
    • H01L33/30—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table
    • H01L33/32—Materials of the light emitting region containing only elements of Group III and Group V of the Periodic Table containing nitrogen

Definitions

  • the present invention relates to a ⁇ -Ga 2 O 3 substrate, a semiconductor multilayer structure, and a semiconductor element.
  • Non-Patent Document 1 a ⁇ -Ga 2 O 3 substrate in which the half-value width of the rocking curve of the X-ray diffraction of the ( ⁇ 201) plane as the main surface is about 17 seconds is known (see, for example, Non-Patent Document 1).
  • the half width of the X-ray rocking curve is an index of crystal orientation. The smaller the half width, the better the crystal orientation in the X-ray irradiation region on the substrate.
  • the X-ray rocking curve is measured at the center point of the main surface, and the half width of the X-ray rocking curve at the center point of the main surface is treated as the half width of the X-ray rocking curve of the substrate.
  • An object of the present invention is to provide a ⁇ -Ga 2 O 3 substrate excellent in crystal orientation in a wider region including the center point as well as the center point of the main surface, and a semiconductor laminate including the ⁇ -Ga 2 O 3 substrate
  • the object is to provide a structure and a semiconductor element.
  • one embodiment of the present invention provides a ⁇ -Ga 2 O 3 substrate according to [1] and [2]. Moreover, in order to achieve the above object, another aspect of the present invention provides a semiconductor laminated structure according to [3]. Moreover, in order to achieve the above object, another aspect of the present invention provides the semiconductor element of [4].
  • [1] A rectangular region having a ( ⁇ 201) plane or a (101) plane as a main surface and having a width of 2.3 mm in the [010] direction and a width of 10 mm in the direction perpendicular to the [010] direction at the center of the main surface
  • the half width of the X-ray rocking curve of the main surface obtained by irradiating X-rays from the direction in which the orthogonal projection onto the main surface is the [010] direction is 100 arcsec or less
  • a direction in which the orthogonal projection direction on the main surface is the [010] direction in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction at the center
  • the present invention not only the central point of the main surface but also a ⁇ -Ga 2 O 3 substrate having excellent crystal orientation in a wider region including the central point, and a semiconductor laminate including the ⁇ -Ga 2 O 3 substrate A structure and a semiconductor element can be provided.
  • FIG. 1 is a vertical cross-sectional view of the semiconductor multilayer structure according to the first embodiment.
  • FIG. 2 is a vertical sectional view of the EFG crystal manufacturing apparatus according to the first embodiment.
  • FIG. 3 is a perspective view showing a state during the growth of the ⁇ -Ga 2 O 3 single crystal according to the first embodiment.
  • FIG. 4 is a perspective view showing a state of growing a ⁇ -Ga 2 O 3 single crystal for cutting out a seed crystal.
  • FIG. 5 is a vertical cross-sectional view of an LED element according to the second embodiment.
  • FIG. 6A is a schematic diagram showing an X-ray irradiation region for measuring the first XRC half width.
  • FIG. 6B is a schematic diagram showing an X-ray irradiation region for measuring the second XRC half width.
  • Figure 7 is a graph showing the relationship between the ⁇ -Ga 2 O 3 and the first XRC FWHM at the center of the main surface of the substrate, the yield of the LED device manufactured by using a ⁇ -Ga 2 O 3 substrate .
  • Figure 8 is a leak at the time of applying the second XRC FWHM of ⁇ -Ga 2 O 3 center of the main surface of the substrate, a 2V voltage of the LED device manufactured by using a ⁇ -Ga 2 O 3 substrate It is a graph which shows the relationship with an electric current.
  • FIG. 9A is a graph showing the offset angle distribution on the principal surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 9B is a graph showing the offset angle distribution in the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 10A is a graph showing the offset angle distribution on the principal surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 10B is a graph showing the offset angle distribution in the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 11A is a graph showing the offset angle distribution on the main surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 11B is a graph showing the offset angle distribution in the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 12A is a graph showing the distribution of the second XRC half width on the main surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 12B is a graph showing a second XRC half-width distribution in the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 13A is a graph showing the distribution of the second XRC half width on the main surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 13B is a graph showing a second XRC half width distribution on the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 14A is a graph showing a second XRC half-value width distribution on the main surface of the ⁇ -Ga 2 O 3 substrate.
  • FIG. 14B is a graph showing a second XRC half width distribution on the main surface of the nitride semiconductor layer on the ⁇ -Ga 2 O 3 substrate.
  • FIG. 15 is a graph showing the relationship between the first XRC half width at the center of the main surface of the ⁇ -Ga 2 O 3 substrate and the first XRC half width at the center of the main surface of the nitride semiconductor layer.
  • FIG. 1 is a vertical sectional view of a semiconductor multilayer structure 1 according to the first embodiment.
  • the ⁇ -Ga 2 O 3 substrate 2 is made of ⁇ -Ga 2 O 3 crystal.
  • the ⁇ -Ga 2 O 3 substrate 2 may contain conductive impurities such as Si and Sn.
  • the thickness of the ⁇ -Ga 2 O 3 substrate 2 is 700 ⁇ m, for example.
  • the ⁇ -Ga 2 O 3 substrate 2 is a circular substrate having a diameter of 2 inches, for example.
  • the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is a ( ⁇ 201) plane or a (101) plane. Both the ( ⁇ 201) plane and the (101) plane are parallel to the [010] direction. In the ( ⁇ 201) plane, the [102] direction is orthogonal to the [010] direction, and in the (101) plane, the [10-1] direction is orthogonal to the [010] direction.
  • a rectangular region having a width of 2.3 mm in the [010] direction and a width of 10 mm in the direction perpendicular to the [010] direction is formed on the main surface 2a.
  • the full width at half maximum of the X-ray rocking curve of the main surface 2a obtained by irradiating X-rays from the direction in which the projection direction is the [010] direction is 100 arcsec or less.
  • the direction of the orthogonal projection on the main surface 2a is [rectangular region of the width of 2.3 mm in the [010] direction of the ⁇ -Ga 2 O 3 substrate 2 and the width of 10 mm perpendicular to the [010] direction
  • the half width of the X-ray rocking curve obtained by irradiating X-rays from the direction that is the [010] direction is referred to as a first XRC half width. That is, the first XRC half width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is 100 arcsec or less.
  • the leakage characteristics of the semiconductor element manufactured using the semiconductor multilayer structure 1 can be improved, and the yield can be improved.
  • the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is formed in a rectangular region having a width of 0.5 mm in the [010] direction and a width of 0.15 mm in the direction perpendicular to the [010] direction.
  • the full width at half maximum of the X-ray rocking curve of the main surface 2a obtained by irradiating X-rays from the direction in which the upward orthogonal projection direction is the [010] direction is 50 arcsec or less.
  • the half width of the X-ray rocking curve obtained by irradiating X-rays from the direction in which [10] is the [010] direction is referred to as a second XRC half width. That is, the second XRC half width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is 50 arcsec or less.
  • the leakage characteristics of the semiconductor element manufactured using the semiconductor multilayer structure 1 can be improved.
  • the distribution of the offset angle in the [010] direction of the main surface 2a on the line segment that passes through the center of the main surface 2a and is perpendicular to the [010] direction in the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 The difference between the maximum value and the minimum value is preferably 0.16 ° or less.
  • the buffer layer 3 may contain a conductivity type impurity such as Si.
  • the thickness of the buffer layer 3 is, for example, 1 to 96 nm.
  • the buffer layer 3 is formed, for example, by growing AlN on the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 at a growth temperature of 450 to 530 ° C.
  • the thickness of the nitride semiconductor layer 4 is, for example, 5 ⁇ m.
  • the nitride semiconductor layer 4 may contain a conductivity type impurity such as Si.
  • the crystal is formed by epitaxial growth.
  • the main surface 4a of the nitride semiconductor layer 4 is a (0001) plane.
  • FIG. 2 is a vertical cross-sectional view of an EFG (Edge Film Fed Growth) crystal manufacturing apparatus 10 according to the first embodiment.
  • EFG Electronic Film Fed Growth
  • the EFG crystal manufacturing apparatus 10 includes a crucible 11 for receiving a Ga 2 O 3 melt 30 installed in a quartz tube 18, a die 12 having a slit 12 a installed in the crucible 11, and an opening of the die 12.
  • a lid 13 that closes the opening of the crucible 11 so that the upper surface including 12b is exposed; a seed crystal holder 14 that holds the seed crystal 31; and a shaft 15 that supports the seed crystal holder 14 so as to be movable up and down.
  • the EFG crystal manufacturing apparatus 10 further includes an after heater 20 made of Ir or the like provided so as to surround a region where the ⁇ -Ga 2 O 3 single crystal 32 on the crucible 11 is grown, and a lid on the after heater 20.
  • the reflector 21 made of Ir or the like is provided. The after heater 20 and the reflecting plate 21 can be freely attached and detached from the EFG crystal manufacturing apparatus 10.
  • the crucible 11 contains a Ga 2 O 3 melt 30 obtained by dissolving a Ga 2 O 3 raw material.
  • the crucible 11 is made of a material having high heat resistance such as Ir that can accommodate the Ga 2 O 3 melt 30.
  • the die 12 has a slit 12a for raising the Ga 2 O 3 melt 30 in the crucible 11 by capillary action. Similar to the crucible 11, the die 12 is made of a material having high heat resistance such as Ir.
  • the lid 13 prevents the high-temperature Ga 2 O 3 melt 30 from evaporating from the crucible 11 and prevents the evaporated material from adhering to members outside the crucible 11.
  • the high-frequency coil 19 is helically disposed around the quartz tube 18 and induction-heats the crucible 11 and the after-heater 20 with a high-frequency current supplied from a power source (not shown). Thereby, Ga 2 O 3 melt 30 was dissolved Ga 2 O 3 raw material in the crucible is obtained.
  • the heat insulating material 17 is provided around the crucible 11 with a predetermined interval.
  • the heat insulating material 17 has a heat retaining property and can suppress a rapid temperature change of the induction heated crucible 11 or the like.
  • the after heater 20 generates heat by induction heating, and the reflection plate 21 reflects the heat generated from the after heater 20 and the crucible 11 downward.
  • the after heater 20 can reduce the temperature gradient in the radial direction (horizontal direction) of the hot zone, and the reflector 21 can reduce the temperature gradient in the crystal growth direction of the hot zone. It has been confirmed.
  • the crystal orientation of the ⁇ -Ga 2 O 3 single crystal 32 can be improved in a wide range. Therefore, the ⁇ -Ga 2 O 3 substrate 2 in which the first XRC half-width of the main surface 2a is 100 arcsec or less and the second XRC half-width of the main surface 2a is 50 arcsec or less is ⁇ -Ga 2. In order to obtain from the O 3 single crystal 32, it is important to use the after heater 20 and the reflection plate 21.
  • FIG. 3 is a perspective view showing a state during the growth of the ⁇ -Ga 2 O 3 single crystal 32 according to the first embodiment.
  • illustration of members around the ⁇ -Ga 2 O 3 single crystal 32 is omitted.
  • the Ga 2 O 3 melt 30 in the crucible 11 is raised to the opening 12b of the die 12 through the slit 12a of the die 12, and the seed crystal 31 is 12 is brought into contact with the Ga 2 O 3 melt 30 in the opening 12b.
  • the seed crystal 31 brought into contact with the Ga 2 O 3 melt 30 is pulled up in the vertical direction to grow a ⁇ -Ga 2 O 3 single crystal 32.
  • the seed crystal 31 is a ⁇ -Ga 2 O 3 single crystal containing no or almost no twin plane.
  • the seed crystal 31 has substantially the same width and thickness as the ⁇ -Ga 2 O 3 single crystal 32 to be grown. Therefore, the ⁇ -Ga 2 O 3 single crystal 32 can be grown without expanding the shoulder in the width direction W and the thickness direction T.
  • the growth of the ⁇ -Ga 2 O 3 single crystal 32 does not include a step of expanding the shoulder in the width direction W, twinning of the ⁇ -Ga 2 O 3 single crystal 32 can be suppressed.
  • the shoulder expansion in the thickness direction T unlike the shoulder expansion in the width direction W, is less likely to cause twinning. Therefore, the growth of the ⁇ -Ga 2 O 3 single crystal 32 involves a process of expanding the shoulder in the thickness direction T.
  • the shoulder expansion in the thickness direction T is not performed, almost the entire ⁇ -Ga 2 O 3 single crystal 32 becomes a plate-like region from which the substrate can be cut, thereby reducing the substrate manufacturing cost.
  • the seed crystal 31 having a large thickness is used to secure the thickness of the ⁇ -Ga 2 O 3 single crystal 32, and the shoulder is expanded in the thickness direction T. It is preferable not to perform.
  • the orientation of the crystal may be deteriorated or dislocations may be increased depending on the angle of shoulder expansion, but the ⁇ -Ga 2 O 3 single crystal 32 Since the growth does not include at least a step of expanding the shoulder in the width direction W, it is possible to suppress deterioration in crystal orientation and increase in dislocation due to the expansion of the shoulder.
  • the orientation of the surface 33 of the seed crystal 31 facing the horizontal direction coincides with the orientation of the main surface 34 of the ⁇ -Ga 2 O 3 single crystal 32. Therefore, for example, when the ⁇ -Ga 2 O 3 substrate 2 in which the plane orientation of the main surface 4 is ( ⁇ 201) is cut from the ⁇ -Ga 2 O 3 single crystal 32, the plane orientation of the surface 33 of the seed crystal 31 The ⁇ -Ga 2 O 3 single crystal 32 is grown in a state where is ( ⁇ 201).
  • FIG. 4 is a perspective view showing how a ⁇ -Ga 2 O 3 single crystal 36 for cutting out the seed crystal 31 is grown.
  • the seed crystal 31 is cut out from a region that does not include or hardly includes the twin plane of the ⁇ -Ga 2 O 3 single crystal 36. For this reason, the width of the ⁇ -Ga 2 O 3 single crystal 36 (the size in the width direction W) is larger than the width of the seed crystal 31.
  • the thickness of the ⁇ -Ga 2 O 3 single crystal 36 (the size in the thickness direction T) may be smaller than the thickness of the seed crystal 31, but in this case, the ⁇ -Ga 2 O 3 single crystal 36
  • the seed crystal 31 is not directly cut out from the ⁇ -Ga 2 O 3 single crystal 36, but is seeded from the ⁇ -Ga 2 O 3 single crystal grown from the ⁇ -Ga 2 O 3 single crystal 36 with the shoulder expanded in the thickness direction T. Cut out 31.
  • an EFG crystal manufacturing apparatus 100 having substantially the same structure as the EFG crystal manufacturing apparatus 10 used for the growth of the ⁇ -Ga 2 O 3 single crystal 32 can be used.
  • the width or width and thickness of the ⁇ -Ga 2 O 3 single crystal 36 is different from that of the ⁇ -Ga 2 O 3 single crystal 32
  • the width or width and thickness of the die 112 of the EFG crystal manufacturing apparatus 100 is , Different from the die 12 of the EFG crystal manufacturing apparatus 10.
  • the size of the opening 112b of the die 112 is usually equal to the size of the opening 12b of the die 12, but may not be equal.
  • the seed crystal 35 is a square columnar ⁇ -Ga 2 O 3 single crystal having a smaller width than the ⁇ -Ga 2 O 3 single crystal 36 to be grown.
  • the Ga 2 O 3 melt 30 in the crucible 11 is raised to the opening 112 b of the die 112 through the slit of the die 112, and the horizontal direction of the seed crystal 35 is increased.
  • the seed crystal 35 is brought into contact with the Ga 2 O 3 melt 30 in the opening 112 b of the die 112 in a state where the position of is shifted from the center in the width direction W of the die 112 in the width direction W.
  • the seed crystal 35 is brought into contact with the Ga 2 O 3 melt 30 covering the upper surface of the die 112 in a state where the horizontal position of the seed crystal 35 is on the end in the width direction W of the die 112.
  • the seed crystal 35 brought into contact with the Ga 2 O 3 melt 30 is pulled up in the vertical direction to grow a ⁇ -Ga 2 O 3 single crystal 36.
  • the ⁇ -Ga 2 O 3 single crystal has a strong cleaving property in the (100) plane, and a twin crystal having the (100) plane as a twin plane (symmetric plane) in the process of crystal growth shoulder expansion. Prone to occur. Therefore, ⁇ -Ga 2 O 3 in order to cut out as much as possible crystal containing no large twin monocrystalline 36, (100) plane direction such as to be parallel to the growth direction of the ⁇ -Ga 2 O 3 single crystal 36, For example, it is preferable to grow the ⁇ -Ga 2 O 3 single crystal 36 in the b-axis direction or the c-axis direction.
  • ⁇ -Ga 2 O 3 single crystal has a property of easily growing in the b-axis direction, it is more preferable to grow ⁇ -Ga 2 O 3 single crystal 36 in the b-axis direction.
  • twin planes are likely to occur in a region close to the seed crystal, and the twin planes are separated from the seed crystal. Is unlikely to occur.
  • the method for growing the ⁇ -Ga 2 O 3 single crystal 36 of the present embodiment utilizes such twining properties of the ⁇ -Ga 2 O 3 single crystal.
  • the ⁇ -Ga 2 O 3 single crystal 36 is grown with the horizontal position of the seed crystal 35 shifted from the center of the die 112 in the width direction W in the width direction W, the seed crystal Compared with the case where the ⁇ -Ga 2 O 3 single crystal 36 is grown in a state where the horizontal position of 35 is in the center of the width direction W of the die 112, the region where the distance from the seed crystal 35 is larger is ⁇ -Ga. It occurs in 2 O 3 single crystal 36. Since such a region is unlikely to have twin planes, a wide seed crystal 31 can be cut out.
  • annealing for the purpose of relaxing thermal strain and improving electrical characteristics during the growth of the single crystal is performed.
  • This annealing is performed, for example, by maintaining a temperature of 1400 to 1600 ° C. for 6 to 10 hours in an inert atmosphere such as nitrogen.
  • the ⁇ -Ga 2 O 3 single crystal 32 is fixed to a carbon-based stage via a thermal wax.
  • a ⁇ -Ga 2 O 3 single crystal 32 fixed on the stage is set in a cutting machine, and cutting is performed.
  • the blade particle size is preferably about # 200 to # 600 (specified by JISB4131), and the cutting speed is preferably about 6 to 10 mm per minute.
  • the ⁇ -Ga 2 O 3 single crystal 32 is removed from the carbon stage by applying heat.
  • the edge of the ⁇ -Ga 2 O 3 single crystal 32 is processed into a circle using an ultrasonic machine or a wire electric discharge machine. Further, an orientation flat may be formed on the edge of the ⁇ -Ga 2 O 3 single crystal 32 processed into a circular shape.
  • the ⁇ -Ga 2 O 3 single crystal 32 processed into a circular shape is sliced to a thickness of about 1 mm by a multi-wire saw, and the ⁇ -Ga 2 O 3 substrate 2 is obtained.
  • slicing can be performed with a desired offset angle.
  • the wire saw is preferably a fixed abrasive type.
  • the slicing speed is preferably about 0.125 to 0.3 mm per minute.
  • the ⁇ -Ga 2 O 3 substrate 2 is subjected to annealing for the purpose of relaxing the processing strain and improving the electrical characteristics and the transparency.
  • Annealing is performed in an oxygen atmosphere when the temperature is raised, and the annealing is performed while switching to an inert atmosphere such as a nitrogen atmosphere while the temperature is maintained after the temperature is raised.
  • the holding temperature is preferably 1400 to 1600 ° C.
  • the edge of the ⁇ -Ga 2 O 3 substrate 2 is chamfered (beveled) at a desired angle.
  • the ⁇ -Ga 2 O 3 substrate 2 is ground to a desired thickness using a diamond grinding wheel.
  • the grain size of the grindstone is preferably about # 800 to 1000 (specified by JISB4131).
  • the ⁇ -Ga 2 O 3 single crystal substrate is polished to a desired thickness using a polishing surface plate and diamond slurry.
  • the polishing surface plate is preferably made of a metal or glass material.
  • the particle size of the diamond slurry is preferably about 0.5 ⁇ m.
  • the ⁇ -Ga 2 O 3 substrate 2 is polished until flatness at the atomic level is obtained.
  • the polishing cloth is preferably made of nylon, silk fiber, urethane or the like. It is preferable to use colloidal silica for the slurry.
  • the average roughness of the main surface of the ⁇ -Ga 2 O 3 substrate 2 after the CMP process is about Ra 0.05 to 0.1 nm.
  • the ⁇ -Ga 2 O 3 substrate 2 is dry-etched using a chlorine-based gas or the like.
  • polishing damage generated on the surface of the ⁇ -Ga 2 O 3 substrate 2 by CMP can be removed, and the crystal orientation of the main surface 2a can be improved in a wide range. Therefore, the ⁇ -Ga 2 O 3 substrate 2 in which the first XRC half-width of the main surface 2a is 100 arcsec or less and the second XRC half-width of the main surface 2a is 50 arcsec or less is ⁇ -Ga 2. In order to obtain from the O 3 single crystal 32, it is important to perform this dry etching after the CMP process.
  • FIG. 5 is a vertical cross-sectional view of the LED element 40 according to the second embodiment.
  • the LED element 40 includes a ⁇ -Ga 2 O 3 substrate 41, a buffer layer 42 on the ⁇ -Ga 2 O 3 substrate 41, an n-type cladding layer 43 on the buffer layer 42, and light emission on the n-type cladding layer 43.
  • the side surface of the multilayer structure including the buffer layer 42, the n-type cladding layer 43, the light emitting layer 44, the p-type cladding layer 45, and the contact layer 46 is covered with an insulating film 49.
  • the ⁇ -Ga 2 O 3 substrate 41, the buffer layer 42, and the n-type cladding layer 43 are the ⁇ -Ga 2 O 3 substrate 2 and the buffer layer that constitute the semiconductor multilayer structure 1 of the first embodiment. 3 and the nitride semiconductor layer 4.
  • the thicknesses of the ⁇ -Ga 2 O 3 substrate 41, the buffer layer 42, and the n-type cladding layer 43 are, for example, 700 ⁇ m, 5 nm, and 5 ⁇ m, respectively.
  • the light emitting layer 44 is composed of, for example, a three-layer multiple quantum well structure and a GaN crystal film having a thickness of 10 nm thereon.
  • Each multiple quantum well structure includes a GaN crystal film having a thickness of 8 nm and an InGaN crystal film having a thickness of 2 nm.
  • the light emitting layer 44 is formed, for example, by epitaxially growing each crystal film on the n-type cladding layer 43 at a growth temperature of 750 ° C.
  • the p-type cladding layer 45 is, for example, a GaN crystal film having a thickness of 150 nm and containing Mg having a concentration of 5.0 ⁇ 10 19 / cm 3 .
  • the p-type cladding layer 45 is formed, for example, by epitaxially growing a GaN crystal containing Mg on the light emitting layer 44 at a growth temperature of 1000 ° C.
  • the contact layer 46 is, for example, a GaN crystal film having a thickness of 10 nm and containing Mg having a concentration of 1.5 ⁇ 10 20 / cm 3 .
  • the contact layer 46 is formed, for example, by epitaxially growing a GaN crystal containing Mg at a growth temperature of 1000 ° C. on the p-type cladding layer 45.
  • TMG trimethylgallium
  • TMI trimethylindium
  • Si MtSiH 3 monomethylsilane
  • Cp 2 Mg biscyclopentadienyl magnesium
  • NH 3 ammonia
  • the insulating film 49 is made of an insulating material made of SiO 2 or the like, and is formed by sputtering, for example.
  • the p-side electrode 47 and the n-side electrode 48 are electrodes that are in ohmic contact with the contact layer 46 and the ⁇ -Ga 2 O 3 substrate 41, respectively, and are formed by vapor deposition, for example.
  • the LED element 40 includes a buffer layer 42, an n-type cladding layer 43, a light-emitting layer 44, a p-type cladding layer 45, a contact layer 46, a p-side electrode 47, and an n-type electrode on a ⁇ -Ga 2 O 3 substrate 41 in a wafer state.
  • the side electrodes 48 are formed, they are obtained by dicing them into, for example, 1 mm square chips.
  • the LED element 40 is, for example, an LED chip that extracts light from the ⁇ -Ga 2 O 3 substrate 41 side, and is mounted on a can-type stem using Ag paste.
  • the LED element 40 is manufactured using the semiconductor multilayer structure 1 including the ⁇ -Ga 2 O 3 substrate 2 according to the first embodiment, the LED element 40 has excellent leakage characteristics.
  • a semiconductor element having excellent leakage characteristics can be manufactured using the semiconductor multilayer structure 1 including such a ⁇ -Ga 2 O 3 substrate 2.
  • a ⁇ -Ga 2 O 3 substrate 2 whose main surface 2a is the ( ⁇ 201) plane, a buffer layer 3 made of AlN, and a nitride semiconductor layer 4 made of GaN. Evaluation was performed using the LED element 40 in which the shape of the p-side electrode 47 was a square of 1 mm square.
  • the XRC half-value width of the ⁇ -Ga 2 O 3 substrate 2 in this example is the half-value width of the X-ray rocking curve by diffraction on the ( ⁇ 402) plane.
  • the full width at half maximum of the X-ray rocking curve by diffraction on a plane parallel to the ( ⁇ 201) plane such as the ( ⁇ 402) plane, the ( ⁇ 603) plane, or the ( ⁇ 804) plane is ( ⁇ 201).
  • a plane parallel to the ( ⁇ 201) plane such as the ( ⁇ 402) plane, the ( ⁇ 603) plane, or the ( ⁇ 804) plane is ( ⁇ 201).
  • X-ray by diffraction on any plane parallel to the ( ⁇ 201) plane A rocking curve may be measured.
  • FIG. 6A is a schematic diagram showing an X-ray irradiation region 51 for measuring the first XRC half width in the above embodiment.
  • FIG. 6B is a schematic diagram showing an X-ray irradiation region 52 for measuring the second XRC half width in the embodiment.
  • the X-ray irradiation region 51 has a width of 2.3 mm in the [010] direction and a width of 10 mm in the [102] direction that is perpendicular to the [010] direction at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2. This is a rectangular area.
  • the X-ray irradiation region 52 is a rectangular region having a width of 0.5 mm in the [010] direction of the ⁇ -Ga 2 O 3 substrate 2 and a width of 0.15 mm in the [102] direction that is perpendicular to the [010] direction. is there.
  • FIG. 6B the plurality of X-ray irradiation regions 52 are arranged along the [102] direction on the line segment that passes through the center of the main surface 2a and is perpendicular to the [010] direction in the main surface 2a.
  • FIG. 2 schematically shows a measurement region when measuring an X-ray rocking curve at each position. When measuring the X-ray rocking curve at the center of the main surface 2a, the measurement is performed in one X-ray irradiation region 52 at the center of the main surface 2a.
  • the X-rays are emitted from the direction in which the orthogonal projection direction onto the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is the [010] direction.
  • the yield of the LED elements 40 is 1 ⁇ 10 ⁇ 6 when a voltage of 2V is applied among about 900 LED elements 40 cut out from one ⁇ -Ga 2 O 3 substrate 2. It is the ratio of non-defective products that are A or less.
  • the leakage current of the LED element 40 is effective. Can be suppressed.
  • FIG. 9A, FIG. 10A, and FIG. 11A are graphs showing the offset angle distribution on the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2.
  • FIG. 9B, FIG. 10B, and FIG. 11B are graphs showing the offset angle distribution on the principal surface 4a of the nitride semiconductor layer 4 on the ⁇ -Ga 2 O 3 substrate 2.
  • the first XRC half-width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 9A and 9B is 28.1 arcsec. Further, the first XRC half width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 10A and 10B is 95.4 arcsec. Further, the first XRC half-width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 11A and 11B is 286.2 arcsec.
  • FIG. 9A, FIG. 10A, and FIG. 11A are horizontal segments that pass through the center of the main surface 2a perpendicular to the [010] direction in the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 (hereinafter referred to as the first (Referred to as a line segment) on the center of the main surface 2a.
  • 9B, FIG. 10B, and FIG. 11B are line segments in the main surface 4a of the nitride semiconductor layer 4 that are located directly above the first line segment (hereinafter referred to as second line segments). This is the position where the center of the main surface 4a is the origin.
  • 9A, FIG. 10A, and FIG. 11A are offset angles of the main surface 2a in the [010] direction at each position on the first line segment.
  • 9B, FIG. 10B, and FIG. 11B are offset angles of the principal surface 4a in the [010] direction of the ⁇ -Ga 2 O 3 substrate 2 at each position on the second line segment.
  • the offset angle of the main surface 2a or the main surface 4a is set to the first line segment or the first line segment from the direction in which the orthogonal projection direction on the main surface 2a is the [010] direction, respectively. It is obtained from the peak position of the X-ray rocking curve of the main surface 2a or the main surface 4a obtained by irradiating the X-ray irradiation region 52 arranged on the second line segment with X-rays.
  • FIG. 12A, FIG. 13A, and FIG. 14A are graphs showing the distribution of the second XRC half width of the main surface 2a in the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2.
  • FIG. 12B, FIG. 13B, and FIG. 14B are graphs showing the distribution of the second XRC half width of the main surface 4a in the main surface 4a of the nitride semiconductor layer 4 on the ⁇ -Ga 2 O 3 substrate 2.
  • FIG. 12B, FIG. 13B, and FIG. 14B are graphs showing the distribution of the second XRC half width of the main surface 4a in the main surface 4a of the nitride semiconductor layer 4 on the ⁇ -Ga 2 O 3 substrate 2.
  • the first XRC half-width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 12A and 12B is 28.1 arcsec. Further, the first XRC half width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 13A and 13B is 95.4 arcsec. Further, the first XRC half width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 according to FIGS. 14A and 14B is 286.2 arcsec.
  • FIG. 12A, 13A, and 14A are positions on the first line segment in the main surface 2a with the center of the main surface 2a as the origin.
  • the horizontal axis of FIG. 12B, FIG. 13B, and FIG. 14B is a position on the second line segment in the main surface 4a with the center of the main surface 4a as the origin.
  • the vertical axis represents the second XRC half-value width of the main surface 2a at each position on the first line segment.
  • the vertical axis of FIGS. 12B, 13B, and 14B represents the second XRC half-value width of the main surface 4a at each position on the second line segment.
  • the second XRC half width of the main surface 2a or the main surface 4a is, as shown in FIG. 6B, from the direction in which the orthogonal projection direction on the main surface 2a is the [010] direction. This is obtained from the half width of the X-ray rocking curve of the main surface 2a or the main surface 4a obtained by irradiating the X-ray irradiation region 52 arranged on the line segment or the second line segment with X-rays.
  • the yield of the LED elements 40 is good and the first XRC half-value width of the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is 100 arcsec or less.
  • the crystal orientation at the center of the main surface 4a of the nitride semiconductor layer 4 is also good.
  • the offset angle distribution of the principal surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is in the [010] direction at each position on the first line segment as shown in FIGS. 9A, 10A, and 11A. This is a distribution of offset angles of the main surface 2a.
  • the straight line in FIG. 16 is an approximate straight line of plot data. According to this approximate straight line, the yield of the LED elements 40 is improved and the main surface 2a at the center of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is improved.
  • the first XRC half width is 100 arcsec or less
  • the difference between the maximum value and the minimum value of the offset angle distribution of the main surface 2a of the ⁇ -Ga 2 O 3 substrate 2 is about 0.16 or less.
  • substrate 2 is the main surface 2a is (-201) plane, the principal surface 2a is (101) is a plane ⁇ -Ga 2 O 3 Similar results are obtained when the substrate 2 is evaluated.
  • an LED element is given as an example of a semiconductor element including the semiconductor multilayer structure of the first embodiment.
  • the semiconductor element is not limited to this, and a transistor Other elements such as may be used.
  • a ⁇ -Ga 2 O 3 substrate excellent in crystal orientation in a wider region including the center point as well as the center point of the main surface, and a semiconductor laminated structure and a semiconductor element including the ⁇ -Ga 2 O 3 substrate provide.

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Abstract

L'invention concerne un substrat β-Ga2O3 offrant une excellente orientation cristalline non seulement en un point central d'une surface principale, mais également dans une région plus large comprenant le point central, et une structure stratifiée de semiconducteur ainsi qu'un élément semiconducteur comprenant ledit substrat β-Ga2O3. L'invention concerne un substrat β-Ga2O3 2 conçu de la manière suivante : une surface (-201) ou une surface (101) est considérée comme étant une surface principale 2a; au centre de la surface principale 2a, une région rectangulaire présentant une largeur de 2,3 mm dans la direction [010] et une largeur de 10 mm dans une direction perpendiculaire à la direction [010] est délimitée en tant que région 51, et la largeur de demi-valeur de la courbe de réflexion des rayons X de la surface principale 2a, obtenue par irradiation de la région 51 avec des rayons X depuis une direction dans laquelle la direction de projection orthogonale sur la surface principale 2a est une direction [010], est égale ou inférieure à 100 arcsec; et au centre de la surface principale 2a, une région rectangulaire présentant une largeur de 0,5 mm dans la direction [010] et une largeur de 0,15 mm dans une direction perpendiculaire à la direction [010] est délimitée en tant que région 52, et la largeur de demi-valeur de la courbe de réflexion des rayons X de la surface principale 2a, obtenue par irradiation de la région 52 avec des rayons X depuis une direction dans laquelle la direction de projection orthogonale sur la surface principale 2a est une direction [010], est égale ou inférieure à 50 arcsec.
PCT/JP2016/067178 2015-06-09 2016-06-09 SUBSTRAT β-Ga2O3, STRUCTURE STRATIFIÉE DE SEMICONDUCTEUR, ET ÉLÉMENT SEMICONDUCTEUR WO2016199838A1 (fr)

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