WO2016192143A1 - Oled像素驱动电路与oled显示面板 - Google Patents

Oled像素驱动电路与oled显示面板 Download PDF

Info

Publication number
WO2016192143A1
WO2016192143A1 PCT/CN2015/082032 CN2015082032W WO2016192143A1 WO 2016192143 A1 WO2016192143 A1 WO 2016192143A1 CN 2015082032 W CN2015082032 W CN 2015082032W WO 2016192143 A1 WO2016192143 A1 WO 2016192143A1
Authority
WO
WIPO (PCT)
Prior art keywords
thin film
film transistor
electrically connected
control signal
sub
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2015/082032
Other languages
English (en)
French (fr)
Inventor
付舰航
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
TCL China Star Optoelectronics Technology Co Ltd
Original Assignee
Shenzhen China Star Optoelectronics Technology Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen China Star Optoelectronics Technology Co Ltd filed Critical Shenzhen China Star Optoelectronics Technology Co Ltd
Priority to US14/771,206 priority Critical patent/US20160358544A1/en
Publication of WO2016192143A1 publication Critical patent/WO2016192143A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Images

Classifications

    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0861—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0202—Addressing of scan or signal lines
    • G09G2310/0218—Addressing of scan or signal lines with collection of electrodes in groups for n-dimensional addressing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0262—The addressing of the pixel, in a display other than an active matrix LCD, involving the control of two or more scan electrodes or two or more data electrodes, e.g. pixel voltage dependent on signals of two data electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an OLED pixel driving circuit and an OLED display panel.
  • OLED Organic Light Emitting Display
  • OLED Organic Light Emitting Display
  • OLEDs are driven by a direct current, and include an anode, a hole injection layer provided on the anode, a hole transport layer disposed on the hole injection layer, and a light-emitting layer disposed on the hole transport layer.
  • Electrons and holes are injected from the cathode and the anode to the electron transport layer and the hole transport layer, respectively, and electrons and holes migrate to the light-emitting layer through the electron transport layer and the hole transport layer, respectively, and meet in the light-emitting layer to form excitons.
  • the luminescent molecules are excited, and the latter emits visible light through radiation relaxation.
  • the existing OLED pixel driving circuit is usually a structure of 2T1C, that is, two thin film transistors plus one capacitor, which converts a voltage into a current.
  • the existing OLED pixel driving circuit of the 2T1C structure includes a first thin film transistor T10, a second thin film transistor T20, and a capacitor C10.
  • the gate of the first thin film transistor T10 is electrically connected to the scan line Gate
  • the drain is electrically connected to the data line Data
  • the source is electrically connected to the gate of the second thin film transistor T20 and one end of the capacitor C10
  • the drain of the second thin film transistor T20 is electrically connected to the cathode of the organic light emitting diode D10, and the source is grounded
  • the anode of the organic light emitting diode D10 is electrically connected to the DC voltage terminal Vdd
  • the cathode is electrically connected to the second thin film transistor.
  • the drain of the T20 is electrically connected to the source of the first thin film transistor T10 and the other end is grounded.
  • the gate voltage of the second thin film transistor T20 can continue to maintain the data signal voltage, so that the second thin film transistor T20 is in an on state, current
  • the organic light-emitting diode D10 is driven to drive the organic light-emitting diode D10 to emit light.
  • the OLED pixel driving circuit of the above 2T1C structure allows all of the pixels to remain in a light-emitting state when the OLED display panel is displayed.
  • the use time of the OLED display panel increases, holes and electrons accumulate at the interface between the respective transmission layer and the light-emitting layer, and a built-in electric field is formed inside the organic light-emitting diode, causing the threshold voltage of the organic light-emitting diode to increase and decrease. Its brightness is bright and affects the life of the OLED display panel.
  • Another object of the present invention is to provide an OLED display panel, which can conveniently control the illumination time of the OLED in each pixel, shorten the illumination time of the OLED in each pixel, and prolong the life of the OLED display panel.
  • the present invention first provides an OLED pixel driving circuit including a first thin film transistor, a second thin film transistor, a third thin film transistor, an organic light emitting diode, and a capacitor;
  • the gate of the first thin film transistor is electrically connected to the scan line, the drain is electrically connected to the data line, and the source is electrically connected to the gate of the second thin film transistor and one end of the capacitor;
  • the gate of the second thin film transistor is electrically connected to the source of the first thin film transistor and one end of the capacitor, and the drain is electrically connected to the cathode of the organic light emitting diode, and the source is grounded;
  • the gate of the third thin film transistor is electrically connected to the control signal line for transmitting the control signal, the drain is electrically connected to the DC voltage terminal, and the source is electrically connected to the anode of the organic light emitting diode;
  • the anode of the organic light emitting diode is electrically connected to the source of the third thin film transistor, and the cathode is electrically connected to the drain of the second thin film transistor;
  • One end of the capacitor is electrically connected to the source of the first thin film transistor and the gate of the second thin film transistor, and the other end is grounded;
  • the control signal alternately provides high and low levels to control the conduction or disconnection of the source and drain of the third thin film transistor.
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the control signal is a pulse signal.
  • the control signal is provided by an external timing controller.
  • the present invention further provides an OLED display panel comprising a plurality of pixels arranged in an array, each pixel further comprising a plurality of sub-pixels, each of which is provided with an OLED pixel driving circuit;
  • the sub-pixels in the same row are electrically connected to the scan lines corresponding to the sub-pixels, and the sub-pixels in the same column are electrically connected to the data lines corresponding to the sub-pixels;
  • the OLED pixel driving circuit of each sub-pixel includes a first thin film transistor, a second thin film transistor, a third thin film transistor, an organic light emitting diode, and a capacitor; a gate of the first thin film transistor is electrically connected to the scan The drain is electrically connected to the data line, the source is electrically connected to the gate of the second thin film transistor and one end of the capacitor; the gate of the second thin film transistor is electrically connected to the source of the first thin film transistor and One end of the capacitor is electrically connected to the cathode of the organic light emitting diode, and the source is grounded; the gate of the third thin film transistor is electrically connected to the first control signal line for transmitting the first control signal or the second is transmitted a second control signal line of the control signal, the drain is electrically connected to the DC voltage end, the source is electrically connected to the anode of the organic light emitting diode; and the anode of the organic light emitting diode is electrically connected to the third thin film transistor The cathode is
  • the gates of the third thin film transistors are electrically connected to the first control signal lines in the plurality of sub-pixels of one pixel, and the gates of the third thin film transistors are in the plurality of sub-pixels of the other pixel. Electrically connecting the second control signal line;
  • the first control signal and the second control signal alternately provide high and low levels, and the first control signal and the second control signal have opposite potentials.
  • Each of the pixels includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel.
  • the first control signal and the second control signal are pulse signals that are mutually inverted.
  • the pulse periods of the first control signal and the second control signal are display times of two adjacent frames of images.
  • the first control signal and the second control signal are both provided by an external timing controller.
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the present invention further provides an OLED display panel comprising a plurality of pixels arranged in an array, each pixel further comprising a plurality of sub-pixels, each of which is provided with an OLED pixel driving circuit;
  • the sub-pixels in the same row are electrically connected to the scan lines corresponding to the sub-pixels, and the sub-pixels in the same column are electrically connected to the data lines corresponding to the sub-pixels;
  • the OLED pixel driving circuit of each sub-pixel includes a first thin film transistor, a second thin film transistor, a third thin film transistor, an organic light emitting diode, and a capacitor; the first thin film crystal
  • the gate of the tube is electrically connected to the scan line, the drain is electrically connected to the data line, the source is electrically connected to the gate of the second thin film transistor and one end of the capacitor; and the gate of the second thin film transistor is electrically connected
  • the drain of the first thin film transistor is electrically connected to the cathode of the organic light emitting diode, and the source is grounded; the gate of the third thin film transistor is electrically connected to the first control signal.
  • the drain is electrically connected to the DC voltage end
  • the source is electrically connected to the anode of the organic light emitting diode
  • the organic light emitting diode is The anode is electrically connected to the source of the third thin film transistor, and the cathode is electrically connected to the drain of the second thin film transistor; one end of the capacitor is electrically connected to the source of the first thin film transistor and the gate of the second thin film transistor The other end is grounded;
  • the gates of the third thin film transistors are electrically connected to the first control signal lines in the plurality of sub-pixels of one pixel, and the gates of the third thin film transistors are in the plurality of sub-pixels of the other pixel. Electrically connecting the second control signal line;
  • the first control signal and the second control signal alternately provide high and low levels, and the first control signal and the second control signal have opposite potentials;
  • each of the pixels includes a red sub-pixel, a green sub-pixel, and a blue sub-pixel;
  • the first control signal and the second control signal are mutually inverted pulse signals
  • the first thin film transistor, the second thin film transistor, and the third thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the invention provides an OLED pixel driving circuit, which is provided with a third thin film transistor between a DC voltage terminal and an organic light emitting diode, and controls a source and a drain of the third thin film transistor through a control signal.
  • the conduction or disconnection can conveniently control the illumination time of the OLED.
  • the present invention provides an OLED display panel in which a third thin film transistor between a DC voltage terminal and an organic light emitting diode is disposed in an OLED pixel driving circuit of each sub-pixel, and a first control signal having an opposite potential is used.
  • the second control signal respectively controls the state in which each adjacent two pixels alternately is in one illumination and the other does not emit light during the display process, and can conveniently control the illumination time of the OLED in each pixel, and display the time on the OLED display panel. Under the premise of constant, the illumination time of the OLED in each pixel is shortened, and the life of the OLED display panel is prolonged.
  • FIG. 1 is a circuit diagram of a conventional OLED pixel driving circuit
  • FIG. 2 is a circuit diagram of an OLED pixel driving circuit of the present invention
  • FIG. 3 is a schematic structural view of an OLED display panel of the present invention.
  • FIG. 4 is a circuit diagram of an OLED pixel driving circuit of each sub-pixel in the OLED display panel of the present invention.
  • Fig. 5 is a waveform diagram of signals used in the OLED display panel of the present invention.
  • the present invention first provides an OLED pixel driving circuit, including a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, an organic light emitting diode D, and a capacitor C.
  • the gate of the first thin film transistor T1 is electrically connected to the scan line Gate, the drain is electrically connected to the data line Data, and the source is electrically connected to the gate of the second thin film transistor T2 and one end of the capacitor C;
  • the gate of the second thin film transistor T2 is electrically connected to the source of the first thin film transistor T1 and one end of the capacitor C, and the drain is electrically connected to the cathode of the organic light emitting diode D, and the source is grounded;
  • the gate of the third thin film transistor T3 is electrically connected to the control signal line of the transmission control signal P, the drain is electrically connected to the DC voltage terminal Vdd, and the source is electrically connected to the anode of the organic light emitting diode D;
  • the anode of the organic light-emitting diode D is electrically connected to the source of the third thin film transistor T3, and the cathode is electrically connected to the drain of the second thin film transistor T2;
  • One end of the capacitor C is electrically connected to the source of the first thin film transistor T1 and the gate of the second thin film transistor T2, and the other end is grounded.
  • the control signal P alternately provides high and low levels.
  • the scan line Gate provides a scan pulse signal to the gate of the first thin film transistor T1, the first thin film transistor T1 is turned on, and the data signal passes through the first thin film transistor T1 to enter the gate of the second thin film transistor T2 and the capacitor C, and Stored in the capacitor C, so that the second thin film transistor T2 is kept in an on state, when the control signal P is supplied with a high level, the gate of the third thin film transistor T3 is controlled by a high level, correspondingly, the third film
  • the source and the drain of the transistor T3 are turned on, and a current path is formed between the DC voltage terminal Vdd, the third thin film transistor T3, the organic light emitting diode D, and the second thin film transistor T2, and the current flows through the organic light emitting diode D.
  • the first The gate of the three thin film transistor T3 is controlled by the low level. Accordingly, the source and the drain of the third thin film transistor T3 are disconnected, and only the second thin film transistor T2 remains in the on state, but due to the third thin film transistor The source and the drain are disconnected, and the DC voltage terminal Vdd, the third thin film transistor T3, the organic light emitting diode D, and the second thin film transistor T2 form an open circuit, and the organic light emitting diode D stops emitting light because no current flows. It is easy to control the luminescence time of the OLED.
  • the first thin film transistor T1, the second thin film transistor T2, and the third thin film transistor T3 are low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
  • the control signal P can be a pulse signal provided by an external timing controller.
  • the present invention further provides an OLED display panel.
  • the OLED display panel includes a plurality of pixels arranged in an array, each pixel including a plurality of sub-pixels.
  • FIG. 3 only shows that each pixel includes a red sub-pixel R and a green sub-pixel G.
  • blue sub-pixel B of course, each pixel may also include four sub-pixels of red, green, blue, and blue, four sub-pixels of red, green, blue, and yellow, or four sub-pixels of red, green, blue, and blank.
  • an OLED pixel driving circuit is disposed in each sub-pixel.
  • the sub-pixels in the same row are electrically connected to the scan lines Gate corresponding to the sub-pixels, and the sub-pixels in the same column are electrically connected to the data lines Data corresponding to the sub-pixels.
  • the OLED pixel driving circuit of each sub-pixel includes a first thin film transistor T1, a second thin film transistor T2, a third thin film transistor T3, an organic light emitting diode D, and a capacitor C; a gate of the first thin film transistor T1 The gate is electrically connected to the scan line Gate, the drain is electrically connected to the data line Data, the source is electrically connected to the gate of the second thin film transistor T2 and one end of the capacitor C; and the gate of the second thin film transistor T2 is electrically connected Connected to the source of the first thin film transistor T1 and one end of the capacitor C, the drain is electrically connected to the cathode of the organic light emitting diode D, and the source is grounded; the gate of the third thin film transistor T3 is electrically connected to a first control signal line for transmitting the first control signal P1 or a second control signal line for transmitting the second control signal P2, the drain is electrically connected to the DC voltage terminal Vdd, and the source is electrically connected to the organic light emitting di
  • the gates of the third thin film transistors T3 in the plurality of sub-pixels of one pixel are electrically connected to the first control signal line, and the gates of the third thin film transistor T3 in the plurality of sub-pixels of the other pixel
  • the pole is electrically connected to the second control signal line.
  • the first control signal P1 and the second control signal P2 alternately provide high and low levels, and The first control signal P1 is opposite to the potential of the second control signal P2.
  • the first control signal P1 and the second control signal P2 are mutually inverted pulse signals, and are set.
  • the pulse periods of the first control signal P1 and the second control signal P2 are display times of two adjacent frames of images.
  • n be a positive integer.
  • the scan line Gate provides the scan pulse signals Gate1, Gate2, Gate3, etc. row by row, and the scan pulse signal is guided line by line.
  • the data signal enters the gate of the second thin film transistor T2 and the capacitor C through the first thin film transistor T1, and is stored in the capacitor C, so that the second thin film transistor T2 is kept.
  • the first control signal P1 always provides a high level
  • the second control signal P2 always provides a low level, correspondingly, for each adjacent two a pixel in which the gate of the third thin film transistor T3 is controlled by the first control signal P1 to turn on the source and the drain, and the third thin film transistor T3, the organic light emitting diode D, and the second film.
  • the transistor T2 forms a path, forms a current and flows through the organic light-emitting diode D, and the pixel emits light; and the gate of the third thin film transistor T3 in the plurality of sub-pixels of the other pixel is controlled by the second control signal P2 to turn off the source
  • the drain at this time, only the second thin film transistor T2 is turned on, but since the source and the drain of the third thin film transistor T3 are disconnected, the third thin film transistor T3, the organic light emitting diode D, and the second thin film transistor T2 are further turned off.
  • the pixel does not emit light.
  • the scan line Gate provides the scan pulse signals Gate1, Gate2, Gate3, and the like one by one row by row, and the scan pulse signal turns on the first thin film transistor T1 in each row of sub-pixels row by row.
  • the data signal passes through the first thin film transistor T1 to enter the gate of the second thin film transistor T2 and the capacitor C, and is stored in the capacitor C, so that the second thin film transistor T2 remains in an on state, in the image of the n+1th frame
  • the first control signal P1 becomes always providing a low level
  • the second control signal P2 becomes always providing a high level, originally in the display time of the nth frame image
  • the source and the drain The disconnected third thin film transistor T3 becomes conductive
  • the third thin film transistor T3 that is originally turned on by the source and the drain in the display time of the image of the nth frame becomes off, and thus the image of the image in the nth frame is originally turned off.
  • the pixels that emit light during the time change to not emit light during the display time of the n+1th frame image, and the pixels that do not emit light during the display time of the nth frame image change during the display time of the n+1th frame image.
  • the first control signal P1 and the second control signal P2 respectively control that each adjacent two pixels alternately be in one state of illumination and the other does not emit light during the display process, and only half of the pixels in each frame are illuminated.
  • the illumination time of the OLED in each pixel is shortened by half, and the life of the OLED display panel can be prolonged.
  • the OLED pixel driving circuit of the present invention has a DC voltage terminal and organic light emission.
  • a third thin film transistor is disposed between the diodes, and the conduction or disconnection of the source and the drain of the third thin film transistor is controlled by a control signal, so that the illumination time of the OLED can be conveniently controlled.
  • a third thin film transistor between the DC voltage terminal and the organic light emitting diode is disposed in the OLED pixel driving circuit of each sub-pixel, and the first control signal and the second control are opposite in potential
  • the signal is used to control the state in which each adjacent two pixels are continuously illuminated and the other is not illuminated during the display process, and the illumination time of the OLED in each pixel can be conveniently controlled, and the display time of the OLED display panel is unchanged. Under the premise, the illumination time of the OLED in each pixel is shortened, and the life of the OLED display panel is prolonged.

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Electroluminescent Light Sources (AREA)
  • Control Of El Displays (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)

Abstract

一种OLED像素驱动电路与OLED显示面板。OLED像素驱动电路在直流电压端（Vdd）与有机发光二级管（D）之间设置第三薄膜晶体管（T3），并通过控制信号（P）来控制第三薄膜晶体管（T3）源极与漏极的导通或断开，能够方便地控制有机发光二级管（D）的发光时间。OLED显示面板，在每一像素的OLED像素驱动电路内设置位于直流电压端（Vdd）与有机发光二级管（D）之间的第三薄膜晶体管（T3），并通过电位相反的第一控制信号（P1）与第二控制信号（P2）来分别控制相邻的两个像素在显示过程中交替处于一个发光、另一个不发光的状态，能够方便地对各个像素中有机发光二级管（D）的发光时间进行控制，缩短各个像素中有机发光二级管（D）的发光时间，延长OLED显示面板的寿命。

Description

OLED像素驱动电路与OLED显示面板 技术领域
本发明涉及显示技术领域，尤其涉及一种OLED像素驱动电路与OLED显示面板。
背景技术
有机发光二极管(Organic Light Emitting Display，OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
目前，大部分OLED都采用直流驱动，其包括：阳极、设于阳极上的空穴注入层、设于空穴注入层上的空穴传输层、设于空穴传输层上的发光层、设于发光层上的电子传输层、设于电子传输层上的电子注入层、及设于电子注入层上的阴极。电子和空穴分别从阴极和阳极注入到电子传输层和空穴传输层，电子和空穴分别经过电子传输层和空穴传输层迁移到发光层，并在发光层中相遇，形成激子并使发光分子激发，后者经过辐射弛豫而发出可见光。
当有电流流过有OLED时，OLED发光，且发光亮度由流过OLED自身的电流决定。大部分已有的集成电路(Integrated Circuit，IC)都只传输电压信号，故OLED的像素驱动电路需要完成将电压信号转变为电流信号的任务。现有的OLED像素驱动电路通常为2T1C即两个薄膜晶体管加一个电容的结构，将电压变换为电流。
如图1所示，现有的2T1C结构的OLED像素驱动电路，包括一第一薄膜晶体管T10、一第二薄膜晶体管T20、及一电容C10。具体地，所述第一薄膜晶体管T10的栅极电性连接扫描线Gate，漏极电性连接数据线Data，源极与第二薄膜晶体管T20的栅极、及电容C10的一端电性连接；所述第二薄膜晶体管T20的漏极电性连接有机发光二级管D10的阴极，源极接地；有机发光二级管D10的阳极电性连接直流电压端Vdd，阴极电性连接第二薄膜晶体管T20的漏极；电容C的一端电性连接第一薄膜晶体管T10的源极，另一端接地。当OLED显示面板进行显示时，对应于各行像素的扫描线依次逐行提供扫描脉冲信号，第一薄膜晶体管T10在扫描信号的控制下导通，数据信号经过第一薄膜晶体管T10进入到第二薄膜晶体管T20的栅 极及电容C10，然后第一薄膜晶体管T10断开，由于电容C10的存储作用，第二薄膜晶体管T20的栅极电压仍可继续保持数据信号电压，使得第二薄膜晶体管T20处于导通状态，电流进入有机发光二级管D10，驱动有机发光二级管D10发光。
然而，上述2T1C结构的OLED像素驱动电路使得当OLED显示面板进行显示时，所有的像素都持续保持发光状态。随着OLED显示面板使用时间的增加，会有空穴和电子累积在各自传输层和发光层的界面，在有机发光二级管内部形成内建电场，导致有机发光二极管的阈值电压增大，降低其发光亮度，并影响到OLED显示面板的寿命。
发明内容
本发明的目的在于提供一种OLED像素驱动电路，能够方便地控制OLED的发光时间。
本发明的另一目的在于提供一种OLED显示面板，能够方便地对各个像素中OLED的发光时间进行控制，缩短各个像素中OLED的发光时间，延长OLED显示面板的寿命。
为实现上述目的，本发明首先提供一种OLED像素驱动电路，包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；
所述第一薄膜晶体管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；
所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；
所述第三薄膜晶体管的栅极电性连接于传输控制信号的控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；
所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二薄膜晶体管的漏极；
所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
所述控制信号交替提供高、低电平，控制第三薄膜晶体管源极与漏极的导通或断开。
所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述控制信号为一脉冲信号。
所述控制信号由外部时序控制器提供。
本发明还提供一种OLED显示面板，包括多个呈阵列式排布的像素，每一像素又包括数个子像素，每个子像素内均设置OLED像素驱动电路；
位于同一行的子像素均电性连接于对应该行子像素的扫描线，位于同一列的子像素均电性连接于对应该列子像素的数据线；
每一子像素的OLED像素驱动电路，均包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；所述第一薄膜晶体管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；所述第三薄膜晶体管的栅极电性连接于传输第一控制信号的第一控制信号线或传输第二控制信号的第二控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二薄膜晶体管的漏极；所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第一控制信号线，另一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第二控制信号线；
所述第一控制信号与第二控制信号均交替提供高、低电平，且所述第一控制信号与第二控制信号的电位相反。
所述每一像素包括红色子像素、绿色子像素、与蓝色子像素。
所述第一控制信号与第二控制信号为相互反相的脉冲信号。
所述第一控制信号与第二控制信号的脉冲周期均为相邻两帧图像的显示时间。
所述第一控制信号与第二控制信号均由外部时序控制器提供。
所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
本发明还提供一种OLED显示面板，包括多个呈阵列式排布的像素，每一像素又包括数个子像素，每个子像素内均设置OLED像素驱动电路；
位于同一行的子像素均电性连接于对应该行子像素的扫描线，位于同一列的子像素均电性连接于对应该列子像素的数据线；
每一子像素的OLED像素驱动电路均包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；所述第一薄膜晶体 管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；所述第三薄膜晶体管的栅极电性连接于传输第一控制信号的第一控制信号线或传输第二控制信号的第二控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二薄膜晶体管的漏极；所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第一控制信号线，另一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第二控制信号线；
所述第一控制信号与第二控制信号均交替提供高、低电平，且所述第一控制信号与第二控制信号的电位相反；
其中，所述每一像素包括红色子像素、绿色子像素、与蓝色子像素；
其中，所述第一控制信号与第二控制信号为相互反相的脉冲信号；
其中，所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
本发明的有益效果：本发明提供的一种OLED像素驱动电路，在直流电压端与有机发光二级管之间设置第三薄膜晶体管，并通过控制信号来控制第三薄膜晶体管源极与漏极的导通或断开，能够方便地控制OLED的发光时间。本发明提供的一种OLED显示面板，在每一子像素的OLED像素驱动电路内设置位于直流电压端与有机发光二级管之间的第三薄膜晶体管，并通过电位相反的第一控制信号与第二控制信号来分别控制每相邻的两个像素在显示过程中交替处于一个发光、另一个不发光的状态，能够方便地对各个像素中OLED的发光时间进行控制，在OLED显示面板显示时间不变的前提下，缩短各个像素中OLED的发光时间，延长OLED显示面板的寿命。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的OLED像素驱动电路的电路图；
图2为本发明的OLED像素驱动电路的电路图；
图3为本发明的OLED显示面板的结构示意图；
图4为本发明的OLED显示面板内每一个子像素的OLED像素驱动电路图；
图5为本发明的OLED显示面板所使用的信号的波形图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图1，本发明首先提供一种OLED像素驱动电路，包括第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、有机发光二级管D、及电容C。
所述第一薄膜晶体管T1的栅极电性连接于扫描线Gate，漏极电性连接于数据线Data，源极电性连接于第二薄膜晶体管T2的栅极及电容C的一端；
所述第二薄膜晶体管T2的栅极电性连接于第一薄膜晶体管T1的源极及电容C的一端，漏极电性连接于有机发光二级管D的阴极，源极接地；
所述第三薄膜晶体管T3的栅极电性连接于传输控制信号P的控制信号线，漏极电性连接于直流电压端Vdd，源极电性连接于有机发光二级管D的阳极；
所述有机发光二级管D的阳极电性连接于第三薄膜晶体管T3的源极，阴极电性连接于第二薄膜晶体管T2的漏极；
所述电容C的一端电性连接于第一薄膜晶体管T1的源极及第二薄膜晶体管T2的栅极，另一端接地。
所述控制信号P交替提供高、低电平。所述扫描线Gate提供扫描脉冲信号至第一薄膜晶体管T1的栅极，第一薄膜晶体管T1导通，数据信号经过第一薄膜晶体管T1进入到第二薄膜晶体管T2的栅极及电容C，并存储于电容C中，使得第二薄膜晶体管T2保持导通状态，当所述控制信号P提供高电平时，所述第三薄膜晶体管T3的栅极受高电平控制，相应的，第三薄膜晶体管T3的源极与漏极导通，直流电压端Vdd、第三薄膜晶体管T3、有机发光二级管D、与第二薄膜晶体管T2之间形成电流通路，电流流过有机发光二级管D使其发光；当所述控制信号P提供低电平时，所述第 三薄膜晶体管T3的栅极受低电平控制，相应的，第三薄膜晶体管T3的源极与漏极断开，仅管第二薄膜晶体管T2依然保持导通状态，但由于第三薄膜晶体管的源极与漏极断开，进而直流电压端Vdd、第三薄膜晶体管T3、有机发光二极管D、与第二薄膜晶体管T2形成断路，有机发光二级管D因没有电流流过而停止发光，从而能够方便地控制OLED的发光时间。
具体地，所述第一薄膜晶体管T1、第二薄膜晶体管T2、与第三薄膜晶体管T3均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述控制信号P可为一脉冲信号，由外部时序控制器提供。
请参阅图3至图5，本发明还提供一种OLED显示面板。如图3所示，该OLED显示面板包括多个呈阵列式排布的像素，每一像素又包括数个子像素，图3仅示意出了每一像素包括红色子像素R、绿色子像素G、与蓝色子像素B，当然，每一像素也可包括红、绿、蓝、青四个子像素，红、绿、蓝、黄四个子像素，或红、绿、蓝、空白四个子像素。其中，每个子像素内均设置OLED像素驱动电路。
结合图3与图4，位于同一行的子像素均电性连接于对应该行子像素的扫描线Gate，位于同一列的子像素均电性连接于对应该列子像素的数据线Data。
每一子像素的OLED像素驱动电路，均包括第一薄膜晶体管T1、第二薄膜晶体管T2、第三薄膜晶体管T3、有机发光二级管D、及电容C；所述第一薄膜晶体管T1的栅极电性连接于扫描线Gate，漏极电性连接于数据线Data，源极电性连接于第二薄膜晶体管T2的栅极及电容C的一端；所述第二薄膜晶体管T2的栅极电性连接于第一薄膜晶体管T1的源极及电容C的一端，漏极电性连接于有机发光二级管D的阴极，源极接地；所述第三薄膜晶体管T3的栅极电性连接于传输第一控制信号P1的第一控制信号线或传输第二控制信号P2的第二控制信号线，漏极电性连接于直流电压端Vdd，源极电性连接于有机发光二级管D的阳极；所述有机发光二级管D的阳极电性连接于第三薄膜晶体管T3的源极，阴极电性连接于第二薄膜晶体管T2的漏极；所述电容C的一端电性连接于第一薄膜晶体管T1的源极及第二薄膜晶体管T2的栅极，另一端接地。
对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管T3的栅极均电性连接第一控制信号线，另一个像素的数个子像素内第三薄膜晶体管T3的栅极均电性连接第二控制信号线。
所述第一控制信号P1与第二控制信号P2均交替提供高、低电平，且 所述第一控制信号P1与第二控制信号P2的电位相反，优选的，如图5所示，所述第一控制信号P1与第二控制信号P2为相互反相的脉冲信号，并设定所述第一控制信号P1与第二控制信号P2的脉冲周期均为相邻两帧图像的显示时间。
结合图3、图4与图5，设n为正整数，在第n帧图像的显示时间内，扫描线Gate逐行提供扫描脉冲信号Gate1、Gate2、Gate3等，所述扫描脉冲信号逐行导通每一行子像素内的第一薄膜晶体管T1，数据信号经过第一薄膜晶体管T1进入到第二薄膜晶体管T2的栅极及电容C，并存储于电容C中，使得第二薄膜晶体管T2保持导通状态，在该n帧图像的显示时间内，所述第一控制信号P1始终提供高电平，而所述第二控制信号P2始终提供低电平，相应的，对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管T3的栅极受第一控制信号P1的控制导通源极与漏极，所述第三薄膜晶体管T3、有机发光二极管D、第二薄膜晶体管T2形成通路，形成电流并流过有机发光二级管D，则该像素发光；而另一个像素的数个子像素内第三薄膜晶体管T3的栅极受第二控制信号P2的控制断开源极与漏极，此时仅管第二薄膜晶体管T2导通，但由于第三薄膜晶体管T3的源极与漏极断开，进而所述第三薄膜晶体管T3、有机发光二极管D、第二薄膜晶体管T2形成断路，没有电流流过有机发光二级管D，则该像素不发光。
在第n+1帧图像的显示时间内，扫描线Gate再一次逐行提供扫描脉冲信号Gate1、Gate2、Gate3等，所述扫描脉冲信号逐行导通每一行子像素内的第一薄膜晶体管T1，数据信号经过第一薄膜晶体管T1进入到第二薄膜晶体管T2的栅极及电容C，并存储于电容C中，使得第二薄膜晶体管T2保持导通状态，在该第n+1帧图像的显示时间内，所述第一控制信号P1变为始终提供低电平，而所述第二控制信号P2变为始终提供高电平，原本在第n帧图像的显示时间内源极与漏极断开的第三薄膜晶体管T3变为导通，原本在第n帧图像的显示时间内源极与漏极导通的第三薄膜晶体管T3变为断开，进而原本在第n帧图像的显示时间内发光的像素在该第n+1帧图像的显示时间内转变为不发光，而原本在第n帧图像的显示时间内不发光的像素在该第n+1帧图像的显示时间内转变为发光，实现了通过电位相反的第一控制信号P1与第二控制信号P2来分别控制每相邻的两个像素在显示过程中交替处于一个发光、另一个不发光的状态，每一帧画面内均只有一半的像素发光，在OLED显示面板显示时间不变的前提下，各个像素中OLED的发光时间缩短一半，能够延长OLED显示面板的寿命。
综上所述，本发明的OLED像素驱动电路，在直流电压端与有机发光 二级管之间设置第三薄膜晶体管，并通过控制信号来控制第三薄膜晶体管源极与漏极的导通或断开，能够方便地控制OLED的发光时间。本发明的OLED显示面板，在每一子像素的OLED像素驱动电路内设置位于直流电压端与有机发光二级管之间的第三薄膜晶体管，并通过电位相反的第一控制信号与第二控制信号来分别控制每相邻的两个像素在显示过程中持续处于一个发光、另一个不发光的状态，能够方便地对各个像素中OLED的发光时间进行控制，在OLED显示面板显示时间不变的前提下，缩短各个像素中OLED的发光时间，延长OLED显示面板的寿命。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (13)

  1. 一种OLED像素驱动电路，包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；
    所述第一薄膜晶体管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；
    所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；
    所述第三薄膜晶体管的栅极电性连接于传输控制信号的控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；
    所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二薄膜晶体管的漏极；
    所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
    所述控制信号交替提供高、低电平，控制第三薄膜晶体管源极与漏极的导通或断开。
  2. 如权利要求1所述的OLED像素驱动电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  3. 如权利要求1所述的OLED像素驱动电路，其中，所述控制信号为一脉冲信号。
  4. 如权利要求3所述的OLED像素驱动电路，其中，所述控制信号由外部时序控制器提供。
  5. 一种OLED显示面板，包括多个呈阵列式排布的像素，每一像素又包括数个子像素，每个子像素内均设置OLED像素驱动电路；
    位于同一行的子像素均电性连接于对应该行子像素的扫描线，位于同一列的子像素均电性连接于对应该列子像素的数据线；
    每一子像素的OLED像素驱动电路均包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；所述第一薄膜晶体管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；所述第三薄膜晶体管的栅极电性连接于传输第一控制 信号的第一控制信号线或传输第二控制信号的第二控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二薄膜晶体管的漏极；所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
    对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第一控制信号线，另一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第二控制信号线；
    所述第一控制信号与第二控制信号均交替提供高、低电平，且所述第一控制信号与第二控制信号的电位相反。
  6. 如权利要求5所述的OLED显示面板，其中，所述每一像素包括红色子像素、绿色子像素、与蓝色子像素。
  7. 如权利要求5所述的OLED显示面板，其中，所述第一控制信号与第二控制信号为相互反相的脉冲信号。
  8. 如权利要求7所述的OLED显示面板，其中，所述第一控制信号与第二控制信号的脉冲周期均为相邻两帧图像的显示时间。
  9. 如权利要求8所述的OLED显示面板，其中，所述第一控制信号与第二控制信号均由外部时序控制器提供。
  10. 如权利要求5所述的OLED显示面板，其中，所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  11. 一种OLED显示面板，包括多个呈阵列式排布的像素，每一像素又包括数个子像素，每个子像素内均设置OLED像素驱动电路；
    位于同一行的子像素均电性连接于对应该行子像素的扫描线，位于同一列的子像素均电性连接于对应该列子像素的数据线；
    每一子像素的OLED像素驱动电路均包括第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、有机发光二级管、及电容；所述第一薄膜晶体管的栅极电性连接于扫描线，漏极电性连接于数据线，源极电性连接于第二薄膜晶体管的栅极及电容的一端；所述第二薄膜晶体管的栅极电性连接于第一薄膜晶体管的源极及电容的一端，漏极电性连接于有机发光二级管的阴极，源极接地；所述第三薄膜晶体管的栅极电性连接于传输第一控制信号的第一控制信号线或传输第二控制信号的第二控制信号线，漏极电性连接于直流电压端，源极电性连接于有机发光二级管的阳极；所述有机发光二级管的阳极电性连接于第三薄膜晶体管的源极，阴极电性连接于第二 薄膜晶体管的漏极；所述电容的一端电性连接于第一薄膜晶体管的源极及第二薄膜晶体管的栅极，另一端接地；
    对于每相邻的两个像素，其中一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第一控制信号线，另一个像素的数个子像素内第三薄膜晶体管的栅极均电性连接第二控制信号线；
    所述第一控制信号与第二控制信号均交替提供高、低电平，且所述第一控制信号与第二控制信号的电位相反；
    其中，所述每一像素包括红色子像素、绿色子像素、与蓝色子像素；
    其中，所述第一控制信号与第二控制信号为相互反相的脉冲信号；
    其中，所述第一薄膜晶体管、第二薄膜晶体管、与第三薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  12. 如权利要求11所述的OLED显示面板，其中，所述第一控制信号与第二控制信号的脉冲周期均为相邻两帧图像的显示时间。
  13. 如权利要求12所述的OLED显示面板，其中，所述第一控制信号与第二控制信号均由外部时序控制器提供。
PCT/CN2015/082032 2015-06-03 2015-06-23 Oled像素驱动电路与oled显示面板 Ceased WO2016192143A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/771,206 US20160358544A1 (en) 2015-06-03 2015-06-23 Oled pixel driving circuit and oled display panel

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201510299466.0A CN104882096A (zh) 2015-06-03 2015-06-03 Oled像素驱动电路与oled显示面板
CN201510299466.0 2015-06-03

Publications (1)

Publication Number Publication Date
WO2016192143A1 true WO2016192143A1 (zh) 2016-12-08

Family

ID=53949569

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/082032 Ceased WO2016192143A1 (zh) 2015-06-03 2015-06-23 Oled像素驱动电路与oled显示面板

Country Status (3)

Country Link
US (1) US20160358544A1 (zh)
CN (1) CN104882096A (zh)
WO (1) WO2016192143A1 (zh)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107863070A (zh) * 2017-12-22 2018-03-30 重庆秉为科技有限公司 一种有源oled像素驱动电路

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107871752B (zh) * 2017-10-17 2019-11-15 深圳市华星光电技术有限公司 微型led显示面板及微型led显示器
US11604283B2 (en) 2020-02-03 2023-03-14 Analog Devices International Unlimited Company Light source system
US11444432B2 (en) 2020-02-03 2022-09-13 Analog Devices International Unlimited Company Laser driver pulse shaping control
US11600966B2 (en) 2020-02-03 2023-03-07 Analog Devices International Unlimited Company Light source system
US12212118B2 (en) 2020-02-03 2025-01-28 Analog Devices International Unlimited Company Light source system
CN111210765B (zh) 2020-02-14 2022-02-11 华南理工大学 像素电路、像素电路的驱动方法和显示面板
CN111640401B (zh) * 2020-04-29 2023-02-24 维沃移动通信有限公司 信息的显示方法及电子设备
CN113724647B (zh) * 2021-09-09 2022-08-05 武汉华星光电半导体显示技术有限公司 显示面板及显示装置
US20240268149A1 (en) * 2022-03-22 2024-08-08 Boe Technology Group Co., Ltd. Light emitting substrate, display panel, display apparatus, and display method
CN120526716A (zh) * 2025-07-23 2025-08-22 深圳通锐微电子技术有限公司 Oled显示屏及其像素驱动电路、驱动方法和驱动系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1790728A (zh) * 2004-09-22 2006-06-21 三星Sdi株式会社 有机发光显示器及其驱动方法
CN1941050A (zh) * 2005-09-30 2007-04-04 三星电子株式会社 显示设备及其驱动方法
CN103927988A (zh) * 2014-04-03 2014-07-16 深圳市华星光电技术有限公司 一种oled显示器的阵列基板
CN103985354A (zh) * 2014-05-15 2014-08-13 深圳市华星光电技术有限公司 一种阵列基板及显示面板

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1790728A (zh) * 2004-09-22 2006-06-21 三星Sdi株式会社 有机发光显示器及其驱动方法
CN1941050A (zh) * 2005-09-30 2007-04-04 三星电子株式会社 显示设备及其驱动方法
CN103927988A (zh) * 2014-04-03 2014-07-16 深圳市华星光电技术有限公司 一种oled显示器的阵列基板
CN103985354A (zh) * 2014-05-15 2014-08-13 深圳市华星光电技术有限公司 一种阵列基板及显示面板

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107863070A (zh) * 2017-12-22 2018-03-30 重庆秉为科技有限公司 一种有源oled像素驱动电路

Also Published As

Publication number Publication date
CN104882096A (zh) 2015-09-02
US20160358544A1 (en) 2016-12-08

Similar Documents

Publication Publication Date Title
WO2016192143A1 (zh) Oled像素驱动电路与oled显示面板
CN107591425B (zh) Amoled显示面板以及显示装置
US7365714B2 (en) Data driving apparatus and method of driving organic electro luminescence display panel
WO2016123855A1 (zh) Amoled像素驱动电路及像素驱动方法
JP4909041B2 (ja) 電界発光表示装置とその駆動方法
CN105185300B (zh) Amoled像素驱动电路及像素驱动方法
CN110223636A (zh) 像素驱动电路及其驱动方法、显示装置
WO2016145693A1 (zh) Amoled像素驱动电路及像素驱动方法
TW201803108A (zh) 像素、使用其之有機發光顯示裝置以及驅動有機發光顯示裝置的方法
WO2019148559A1 (zh) Oled显示装置
WO2016119304A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2018045667A1 (zh) Amoled像素驱动电路及驱动方法
WO2016145692A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2017117983A1 (zh) 像素补偿电路及amoled显示装置
WO2019095451A1 (zh) Amoled像素驱动电路及其驱动方法
WO2016123854A1 (zh) Amoled像素驱动电路及像素驱动方法
KR102120075B1 (ko) 유기발광표시장치
WO2017177501A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2016165529A1 (zh) 像素电路及其驱动方法、显示装置
WO2017107290A1 (zh) Oled显示装置及源极驱动器
WO2018149008A1 (zh) Amoled像素驱动电路及amoled像素驱动方法
WO2016197409A1 (zh) 用于amoled分区驱动的控制电路及控制方法
WO2016119305A1 (zh) Amoled像素驱动电路及像素驱动方法
WO2017156828A1 (zh) Amoled像素驱动电路及像素驱动方法
CN108597445A (zh) 显示装置、用于显示装置的驱动方法和电子设备

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14771206

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15893799

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15893799

Country of ref document: EP

Kind code of ref document: A1