WO2016181464A1 - ストレージシステム、及び、記憶制御方法 - Google Patents
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- WO2016181464A1 WO2016181464A1 PCT/JP2015/063507 JP2015063507W WO2016181464A1 WO 2016181464 A1 WO2016181464 A1 WO 2016181464A1 JP 2015063507 W JP2015063507 W JP 2015063507W WO 2016181464 A1 WO2016181464 A1 WO 2016181464A1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/0644—Management of space entities, e.g. partitions, extents, pools
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/0604—Improving or facilitating administration, e.g. storage management
- G06F3/0607—Improving or facilitating administration, e.g. storage management by facilitating the process of upgrading existing storage systems, e.g. for improving compatibility between host and storage device
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/0223—User address space allocation, e.g. contiguous or non contiguous base addressing
- G06F12/023—Free address space management
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0659—Command handling arrangements, e.g. command buffers, queues, command scheduling
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0655—Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
- G06F3/0661—Format or protocol conversion arrangements
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/067—Distributed or networked storage systems, e.g. storage area networks [SAN], network attached storage [NAS]
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0683—Plurality of storage devices
- G06F3/0689—Disk arrays, e.g. RAID, JBOD
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- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
Definitions
- the present invention generally relates to storage control, for example, a storage system and a storage control method.
- a SAS adapter that mutually converts the PCIe (PCI-Express) protocol and the SAS (Serial Attached SCSI) protocol is known (Patent Document 1).
- the SAS adapter exists between the processor and a storage drive (for example, HDD (Hard Disk Drive)), converts the data transferred from the storage drive based on the SAS protocol to the PCIe protocol, and transfers the data to the processor.
- the processor divides the data transferred from the SAS adapter into units of a predetermined size and writes the data to a memory (for example, a DRAM (Dynamic Random Access Memory)).
- the processor manages the memory area by dividing it into partitions of a predetermined size, and writes data in units of the partitions. Therefore, when existing data exists in a part of the memory partition where the new data is stored, the processor once reads data for the partition size (including existing data) from the partition and updates the read data. (For example, new data is added or overwritten on the read data), and the updated data (data corresponding to the partition size) needs to be written to the partition. This process is called “read-modify-write”. This process takes more time than a process that simply writes data to the partition. This causes a decrease in the throughput of the storage system. Similar problems can exist not only in PCIe and SAS. Accordingly, an object of the present invention is to improve the throughput of the storage system.
- a storage system includes a processor, a memory accessed in units of a predetermined size partition, a storage drive, and an interface device that mediates data communication between the processor and the storage drive.
- the storage drive is based on an offset value that is a value related to the size between the storage area in the memory of the transfer data to be transferred to the interface device and the predetermined position of the partition in the memory to which at least a part of the storage area belongs,
- the size of the transfer data is determined, and the transfer data of the determined size is transferred to the interface device.
- the interface device divides the transfer data into packets and transfers them to the processor.
- the processor stores the packet transferred from the interface device in the memory in units of partitions.
- the throughput of the storage system can be improved.
- the structural example of a storage system is shown.
- An example of data storage in the memory is shown.
- It is a sequence chart which shows the process example which notifies the size of a cache line to a drive.
- It is a flowchart which shows the process example of a drive.
- An example of processing in which data read from a drive is stored in a memory is shown.
- the structural example of a command management list is shown.
- the structural example of SGL (Scatter Gather List) is shown.
- the example of a structure of an executing command management list and an SGL cache is shown. It is a flowchart which shows the example of a process of a SAS adapter.
- xxx table information may be described using the expression “xxx table”, but the information may be expressed in any data structure. That is, in order to show that the information does not depend on the data structure, the “xxx table” can be called “xxx information”.
- the configuration of each table is an example, and one table may be divided into two or more tables, or all or part of the two or more tables may be a single table. Good.
- an ID is used as element identification information, but other types of identification information may be used instead of or in addition to the ID.
- an I / O (Input / Output) request is a write request or a read request, and may be referred to as an access request.
- Embodiment 1 is an example in which the drive 3 determines the size of transfer data in consideration of the status of the partition of the memory 5 in which the transfer data is stored.
- FIG. 1 shows a configuration example of the storage system 1 according to the first embodiment.
- the storage system 1 is accessed from the host computer 9 via the network 24 (or cable).
- An example of the network 24 is FC-SAN (FibreChannel Storage Area Network).
- the storage system 1 may include a processor 2, a memory 5, an HBA (Host Bus Adapter) 12, a SAS adapter 4, a SAS expander 11, and a drive 3.
- the processor 2, the memory 5, the HBA 12, and the SAS adapter 4 may be connected by an internal bus 21 capable of bidirectional communication. Each element connected to the internal bus 21 may be communicable by the PCIe protocol.
- the HBA 12 may be connected to the network 24.
- the HBA 12 may have a function of mutually converting the FC protocol related to the network 24 and the PCIe protocol related to the internal bus 21.
- the processor 2 controls data exchange between the host computer 9 and the drive 3.
- the processor 2 receives a read request from the host computer 9 via the HBA 12, the processor 2 reads data corresponding to the read request from the drive 3 and returns it to the host computer 9.
- the processor 2 may temporarily store (cache) the data read from the drive 3 in the memory 5.
- the memory 5 may be a storage device having higher I / O performance than the drive 3. Examples of the memory 3 are DRAM (Dynamic Random Access Memory), MRAM (Magnetic Resistive Random Access Memory), or FeRAM (Ferroelectric Random Access Memory).
- the drive 3 has a non-volatile storage medium and holds data in the storage medium. When the drive 3 receives the read command, the drive 3 reads data corresponding to the read command from the storage medium and returns it.
- the drive 3 may be controlled by the SAS protocol. Examples of the drive 3 are HDD, SSD (Solid State Drive), and flash device.
- the drive 3 may be a logical drive constituted by one or more physical drives.
- the drive 3 may be a logical storage volume.
- the drive 3 may be a RAID (Redundant Arrays of Inexpensive Disks) group composed of a plurality of drives.
- the process of the drive 3 in an Example may be performed by the controller with which the drive 3 is provided.
- the drive 3 may include a memory inside.
- SAS adapter 4 is an example of an interface device.
- the drive 3 is connected to the SAS adapter 4 via a cable 28 (or network) capable of bidirectional communication.
- a plurality of drives 3 may be connected to the SAS adapter 4 via the SAS expander 11.
- the SAS adapter 4 and the drive 3 may be communicable by the SAS protocol.
- the processor 2 is connected to the SAS adapter 4 via the internal bus 21 as described above.
- the SAS adapter 4 and the processor 2 may be communicable by the PCIe protocol.
- the SAS adapter 4 may have a function of mutually converting the PCIe protocol and the SAS protocol. Note that the processing of the SAS adapter 4 in the embodiment may be executed by an LSI included in the SAS adapter 4.
- the SAS adapter 4 may include a memory inside.
- the SAS adapter 4 may convert the read command issued from the processor 2 based on the PCIe protocol into the SAS protocol and transfer it to the drive 3.
- the SAS adapter 4 may convert the read data transferred from the drive 3 based on the SAS protocol into the PCIe protocol and transfer it to the processor 2.
- the processor 2 may store the transferred read data in the memory 5.
- FIG. 2 shows an example of data write processing to the memory 5.
- the drive 3 can be accessed in units of sectors.
- a case will be described in which 520 bytes obtained by adding 8-byte DIF (Data Integrity Field) data to 512-byte user data is one sector.
- DIF data are CRC (Cyclic Redundancy Check) for detecting user data errors and address information for preventing user data from being mixed.
- CRC Cyclic Redundancy Check
- the area of the memory 5 is managed by being divided into sections of a predetermined size.
- This predetermined size partition is referred to as a cache line 200.
- the processor 2 accesses in units of the cache line 200.
- the size of one cache line 200 is a power of 2 (for example, 64 bytes, 128 bytes). In this embodiment, a case where the size of one cache line 200 is 64 bytes will be described.
- the first sector data 210a is written in the memory 5 to the 1st to 8th cache lines 200 and 8 bytes (212a) of the 9th cache line 200a (the hatched line in FIG. 2). portion).
- the second sector data 210b includes the remaining 56 bytes of the ninth-stage cache line 200a, the 16th-stage cache line 200b and the 16th byte (212b) of the 18th-stage cache line 200b. And is written to.
- the processor 2 When writing data to the remaining 56 bytes in the ninth-stage cache line 200a, the processor 2 reads all the data stored in the ninth-stage cache line 200a, and among the read data, It is necessary to perform a process of replacing the second half 57 bytes of the second sector data with the data of 56 bytes from the top of the second sector data 210b and overwriting the replaced data in the ninth stage cache line 200a. . That is, in this case, the processor 2 needs to perform so-called read-modify-write in units of the cache line 200.
- the cache line 200 in which data is stored only partially is generated.
- the processor 2 needs to perform read / modify / write. Since the read-modify-write causes a decrease in the throughput of the storage system 1, it is desirable that the number of read-modify-write is as small as possible.
- the storage system 1 according to the present embodiment improves the throughput by reducing the number of occurrences of this read-modify-write in the memory 5.
- FIG. 3 is a sequence chart showing a processing example for notifying the drive 3 of the size of the cache line 200.
- the cache line size setting command 41 is a command for notifying the drive 3 of the size of the cache line 200.
- the cache line size setting command 41 may include an operation code 411 and a cache line size 412.
- the operation code 411 is a code for identifying that the command is a “cache line size setting command”.
- the cache line size 412 is a value indicating the size of the cache line 200.
- the cache line size setting command 41 shown in FIG. 3 indicates that the cache line size 412 is “40h (64 bytes)”.
- the processor 2 transmits the cache line size setting information to the SAS adapter 4 (step S11).
- the cache line size setting information may include the size of the cache line 200.
- the SAS adapter 4 Upon receiving the cache line size setting information from the processor 3, the SAS adapter 4 transmits a cache line size setting command 41 corresponding to the information to the drive 3 (step S12).
- the drive 3 can know the size of the cache line 200 of the memory 5.
- the process shown in FIG. 3 may be included in the initialization process executed when the storage system 1 is started. Alternatively, this process may be included in a predetermined process that is executed when the drive 3 is added to the storage system 1.
- the cache line size setting information transmitted from the processor 2 to the SAS adapter 4 may not include the size of the cache line 200.
- FIG. 4 is a sequence chart showing a processing example for requesting read data from the drive 3.
- the read command 42 is a command for instructing the drive 3 to transfer read data.
- the read command 42 may include an operation code 421, a drive number 422, an LBA 423, a data length 424, and an offset value 425.
- the operation code 421 is a code for identifying that the command is a “read command”.
- the drive number 422 is the number of the drive 3 to be read.
- LBA 423 is the head address of the sector of the read data.
- the sector number 424 is the number of sectors of read data. That is, sector data corresponding to 424 sectors from the LBA 423 is read data.
- the offset value 425 is a partition in the memory 5 to which a storage area (for example, a buffer area) of transfer data transferred from the drive 3 and at least a part of the storage area (for example, a head part of the buffer area) belongs This is a value related to the size between a predetermined position (for example, the boundary of the cache line 200) (for example, the cache line 200).
- the offset value 425 may be a value indicating how much the head address of the buffer area secured in the memory 5 is deviated from the boundary (head address) of the cache line 200.
- the example of the offset value 425 “08h (8 bytes)” illustrated in FIG. 4 indicates that the head address of the buffer area is shifted by 8 bytes from the boundary (head address) of the cache line 200.
- the start address of the buffer area indicates “cache line size (64 bytes) ⁇ Nth stage (N is a positive integer) +8 bytes”.
- the processor 2 secures a buffer area for storing read data in the memory 5 (step S21). Then, the processor 2 transmits read command information to the SAS adapter 4 (step S22). When the SAS adapter 4 receives read command information from the processor 2, the SAS adapter 4 transmits a read command 42 corresponding to the information to the drive 3 (step S23). This read command 42 is transmitted to the drive 3 corresponding to the drive number 422. The drive 3 that has received this read command 42 performs the processing shown in FIG.
- FIG. 5 is a flowchart showing an example of processing in which the drive 3 transfers read data to the SAS adapter 4.
- the drive 3 When the drive 3 receives the read command 42 from the SAS adapter 4, the drive 3 reads data for 424 sectors from the LBA 423 based on the read command 42 and stores it in a predetermined buffer memory in the drive 3.
- the drive 3 may transmit a connection request to the SAS adapter 4 at a timing when it is in a transfer waiting state (for example, when a predetermined amount or more of data is stored in the buffer memory). Thereby, a connection for transmitting the SAS frame is formed between the drive 3 and the SAS adapter 4.
- the drive 3 may perform data transmission processing as follows.
- the drive 3 determines whether or not the amount of data waiting to be transferred (for example, the amount of data already stored in the buffer memory) is smaller than the maximum length that the SAS frame can take (hereinafter referred to as “maximum SAS frame length”) (Ste S300).
- maximum SAS frame length is 1024 bytes.
- step S300 When the amount of data waiting for transfer is smaller than the maximum SAS frame length (step S300: YES), the drive 3 transfers all the data waiting for transfer to the SAS adapter 4 (step S301), and ends the process.
- step S300 If the amount of data waiting for transfer is greater than or equal to the maximum SAS frame length (step S300: NO), the drive 3 performs the following process (step S302). That is, the drive 3 determines whether or not an alignment deviation has occurred (step S302). For example, the drive 3 calculates the total value of the offset value 425 and the amount of data transferred so far. Then, the drive 3 calculates the remainder when the total value is divided by the cache line size 412. The drive 3 may determine that no misalignment has occurred when the remainder is “0”, and may determine that misalignment has occurred when the remainder is “other than 0”.
- step S302 If no misalignment has occurred (step S302: NO), the drive 3 extracts data corresponding to the maximum SAS frame length from the buffer memory, and generates a SAS frame storing the extracted data. Then, the drive 3 transmits the generated SAS frame to the SAS adapter 4 (step S303), and returns to step S300.
- step S302 When the misalignment has occurred (step S302: YES), the drive 3 stores data corresponding to a value obtained by subtracting the misalignment (ie, the remainder calculated above) from the maximum SAS frame length from the buffer memory. Extraction is performed, and a SAS frame storing the extracted data is generated. Then, the drive 3 transfers the generated SAS frame to the SAS adapter 4 (step S304), and returns to step S300.
- a value obtained by subtracting the misalignment ie, the remainder calculated above
- FIG. 6 shows a typical example of processing in which data read from the drive 3 is stored in the memory 3.
- the processor 2 secures a buffer area for storing read data in the memory 5. It is assumed that the head of the secured buffer area is shifted from the boundary of the cache line 200 by 8 bytes. Therefore, the processor 2 transmits read information including the offset value “8 bytes” to the SAS adapter 4. Upon receiving this read information, the SAS adapter 4 transmits a read command 42 in which “8 bytes” is set in the offset value 425 to the drive 3.
- the drive 3 extracts data from the buffer memory based on the processing shown in FIG. 5, and generates a SAS frame. Since the offset value 425 of the read command 42 is “8 bytes” (that is, an alignment error has occurred), the drive 3 subtracts 8 bytes from the maximum SAS frame length (1024 bytes). Are extracted from the buffer memory, and the first SAS frame is generated. Then, the drive 3 transfers the generated first SAS frame to the SAS adapter 4.
- the SAS adapter 4 that has received the first SAS frame divides the data (1016 bytes) of the SAS frame into packets that match the size (64 bytes) of the cache line 200 of the memory 5.
- the SAS adapter 4 divides the remaining 960 bytes of data into three packets of 256 bytes per packet. Then, the SAS adapter 4 passes each packet to the processor 2.
- the processor 2 reads, modifies, and writes a packet including 56 bytes to the first-stage cache line 200 in the buffer area, and writes each 256-byte packet to the second to sixteenth-stage cache lines 200 in the buffer area. .
- the drive 3 extracts data (1024 bytes) corresponding to the maximum SAS frame length from the buffer memory, and generates a second SAS frame. This is because the data of the second SAS frame can be written from the beginning of the cache line 200 of the memory 5 (that is, no offset occurs). Then, the drive 3 transmits the generated second SAS frame to the SAS adapter 4.
- the SAS adapter 4 that has received the second SAS frame divides the data (1024 bytes) in the SAS frame into four packets of 256 bytes per packet. Then, the SAS adapter 4 passes each packet to the processor 2. The processor 2 writes each packet to the 17th to 32nd cache lines in the buffer area.
- the drive 3 extracts the remaining data (560 bytes) from the buffer memory and generates a third SAS frame. Then, the drive 3 transfers the generated third SAS frame to the SAS adapter 4.
- the SAS adapter 4 converts the SAS frame data (560 bytes) into two packets of 256 bytes per packet and one packet including the remaining 48 bytes of data. To divide. Then, the SAS adapter 4 passes each packet to the processor 2. The processor 2 writes each 256-byte packet to the cache line 200 in the 33rd to 40th stages of the buffer area, and reads, modifies, and writes the packet containing 48-byte data to the 41st stage cache line in the buffer area. Write.
- the number of times that the read-modify-write occurs for the cache line 200 of the memory 5 is two.
- the drive 3 transmits the second to fifth SAS frames of 1024 bytes to the SAS adapter 4. Finally, the drive 3 transfers the 648-byte sixth SAS frame to the SAS adapter 4. Having received these SAS frames, the SAS adapter 4 passes the divided packets to the processor 2 as described above. That is, the first packet size of the first SAS frame is 16 bytes, the last packet size of the sixth SAS frame is 8 bytes, and the other packet sizes are 256 bytes. Therefore, the number of times that the read-modify-write occurs for the cache line of the memory 5 is twice as described above.
- the drive transmits the maximum SAS frame length to the SAS adapter 4 without considering the above, the following processing is performed.
- the drive sets the first and second SAS frames to 1024 bytes and the third SAS frame to 552 bytes.
- the SAS adapter that has received the first SAS frame is divided into packets and passed to the processor 2 as described above.
- the processor 2 needs to perform read-modify-write when storing the first and last packets in the cache line 200.
- the processor 2 needs to perform read-modify-write when storing the first and last packets in the cache line 200. That is, the number of times that read-modify-write occurs for the cache line 200 of the memory 5 is six.
- the drive sets the 1st to 5th SAS frames to 1024 bytes and the 6th SAS frame to 600 bytes. In this case, the number of times that the read-modify-write occurs for the cache line of the memory 5 is 12.
- the number of read-modify-writes that has conventionally occurred 18 times can be reduced to 4 times according to the present embodiment.
- the drive 3 considers the deviation from the boundary of the cache line 200 in the memory 5 and adjusts the size of the first SAS frame, so that the read / modify / write occurs in the memory 5. Can be reduced. Therefore, according to the present embodiment, the throughput of the memory 5 can be improved.
- Example 2 is an example in which the SAS adapter 4 specifies the write destination in the memory 5 of the data of the SAS frame transferred from the drive 3 at a higher speed. Note that the description of the same contents as in the first embodiment is omitted.
- FIG. 7 shows a configuration example of the command management list 51.
- the command management list 51 is a list for managing commands transmitted from the SAS adapter 4 to the drive 3.
- the command management list 51 may be generated by software operating on the processor 2 and stored in the memory 5.
- the command management list 51 may be referred to from the SAS adapter 4.
- the command management list 51 may have a drive number 511, a tag number 512, a command 513, an LBA 514, a sector number 515, and an SGL address 516 as field values.
- the drive number 511 is a number for identifying the drive 3.
- the tag number 512 is a number for identifying each command when a plurality of commands are transmitted to one drive 3.
- the command 513 indicates the type of command transmitted to the drive 3. Examples of the command 513 are “read command” and “write command”.
- the LBA 514 is the head address of the sector targeted by the command 513.
- the sector number 515 is the number of sectors targeted by the command 513.
- the SGL address 516 is an address at which the SGL is stored (corresponding to a pointer to the SGL). Details of the SGL will be described later (see FIG. 8).
- the record of the drive number 511 “0” and the tag number 512 “0” in the command management list 51 shown in FIG. 7 is transferred from the LBA 514 “12340000h” to “1024 sectors” ( “Read command” (513) targeting the area of 515) is issued, and the SGL having information relating to the storage location of the read data is stored at the address “100000h” (516) on the memory 5.
- FIG. 8 shows a configuration example of the SGL 52.
- the address on the memory 5 is stored in the SGL 52.
- the SGL 52 may be generated by software operating on the processor 2 and stored in the memory 5.
- the SGL 52 may be referred to from the SAS adapter 4.
- the SGL address 516 of the record in the command management list 51 indicates the storage location of the SGL 52 corresponding to the record.
- the SGL 52 may have a size 521 and a memory address 522 as field values.
- the size 521 is the size of the area on the memory 5.
- the memory address 522 is a storage destination / storage source address on the memory 5.
- the SGL 52 illustrated in FIG. 8 is an area where the storage destination of “66560 bytes” (521) from the top of the read data is the memory address 522 “12340000h”, and the next “66560 bytes”. "Is stored in the memory address 522" 2340000h "area.
- the SGL 52 shown in FIG. 8 is an area where the storage source for “66560 bytes” (521) from the top of the write data is the memory address 522 “12340000h”, and the next “66560 bytes”. "Is stored in the memory address 522" 2340000h "area.
- FIG. 9 shows a configuration example of the in-execution command management list 45 and the SGL cache 46.
- the SAS adapter 4 may hold some of the plurality of SGLs 52 stored on the memory 5 as an SGL cache 46 in a predetermined internal memory.
- the SGL cache 46 has a size 461 and a memory address 462 as field values.
- the size 461 and the memory address 462 are the same as the size 521 and the memory address 522 of FIG.
- the SAS adapter 4 may store information on commands that have been transmitted to the drive 3 and that have not been completed, as an executing command management list 45 in a predetermined internal memory.
- the in-execution command management list 45 has a drive number 451, a tag number 452, an SGL address 453, and an SGL cache flag 454 as field values.
- the drive number 451, tag number 452, and SGL address 453 are the same as the drive number 511, tag number 512, and SGL address 516 of FIG.
- the SGL cache ID 454 is an identifier of the SGL cache 46 held in the SAS adapter 4. If the SGL cache 46 is not held, the SGL cache ID 454 may be “NULL”.
- the record of the drive number 451 “0” and the tag number 452 “1” in the command list 45 being executed shown in FIG. 9 has the tag number 452 “1” transmitted to the drive 3 with this drive number 451 “0”. Indicates that the command is incomplete. Further, it is indicated that the SGL cache 46 corresponding to this command is held as the SGL cache ID 454 “0” in the SGL adapter 4.
- FIG. 10 is a flowchart showing a processing example of the SAS adapter 4 that has received a connection request from the drive 3.
- the SAS adapter 4 When the SAS adapter 4 receives the connection request from the drive 3, the SAS adapter 4 extracts the drive number from the connection request (step S700).
- the SAS adapter 4 searches the in-execution command management list 45 for a record (incomplete command) that matches the extracted drive number. When a plurality of records are found, the SAS adapter 4 selects the oldest registered record (oldest incomplete command) (step S701).
- the SAS adapter 4 refers to the SGL cache ID 454 included in the selected record, and determines whether or not the SGL cache 46 is held (step S702). If the SGL cache 46 is held (step S702: YES), the SAS adapter 4 ends this process.
- step S702 If the SGL cache 46 is not held (step S702: NO), the SAS adapter 4 acquires the SGL 52 corresponding to the selected record from the memory 5 and holds it internally as the SGL cache 46 (step S703). Then, the SAS adapter 4 ends this process.
- the SGL 52 corresponding to the oldest incomplete command is held in the SAS adapter 4 as the SGL cache 46.
- FIG. 11 is a sequence chart showing an example of processing in which data read from the drive 3 is stored in the memory 5 via the SAS adapter 4.
- the drive 3 when the drive 3 receives the read command 42 (step S33), it reads data from the storage medium and stores it in the buffer memory in the drive 3.
- the drive 3 transmits a connection request to the SAS adapter 4 at the timing when the SAS frame is waiting to be transferred (step S34).
- This connection request may include the drive number of this drive 3.
- the SAS adapter 4 When the SAS adapter 4 receives the connection request, the SAS adapter 4 returns an acceptance response to the connection request to the drive 3 (step S35). Thereby, a connection is formed between the drive 3 and the SAS adapter 4.
- the SAS adapter 4 may perform the following processing with the reception of this connection request as a trigger. That is, as shown in FIG. 10, the SAS adapter 4 retrieves the oldest incomplete command that matches the drive number included in this connection request from the command management list 45 being executed, and finds the oldest found The SGL 52 corresponding to the incomplete command is held inside as the SGL cache 46 (steps S36, S37, S38).
- the SAS adapter 4 can know from the SGL cache 46 the storage destination of data transferred from the drive 3 in the memory 4 thereafter. Further, by holding the SGL cache 46 corresponding to the oldest incomplete command, a high cache hit rate can be realized with a small number of SGL caches 46. Therefore, the data can be stored in the memory 5 at a higher speed than when the SGL 52 is acquired from the memory 5 at the timing when the data is received. That is, the throughput of the storage system 1 can be improved.
- Example 3 is a modification of Example 2. Differences from the second embodiment will be described. Note that the description of the same contents as in the first or second embodiment is omitted.
- FIG. 12 is a flowchart illustrating a processing example in which the drive 3 transmits a connection request to the SAS adapter 4.
- the drive 3 identifies the tag number of the SAS frame waiting for transfer at the timing when the SAS frame is waiting for transfer (step S711). Then, the drive 3 generates a connection request including the identified tag number and the drive number of the drive 3, and transmits it to the SAS adapter 4 (step S712).
- the tag number included in the connection request is an example of hint information for notifying the SAS adapter 4 of data to be transferred thereafter.
- FIG. 13 is a flowchart showing a processing example of the SAS adapter 4 that has received a connection request from the drive 3.
- the SAS adapter 4 When the SAS adapter 4 receives the connection request from the drive 3, the SAS adapter 4 extracts the drive number and the tag number from the connection request (step S720).
- the SAS adapter 4 searches the in-execution command management list 45 for a record (incomplete command) that matches the extracted drive number and tag number (step S721).
- the SAS adapter 4 refers to the SGL cache ID 454 included in the record found by the search, and determines whether or not the SGL cache 46 is held (step S722).
- step S722 If the SGL cache 46 is held (step S722: YES), the SAS adapter 4 ends this process.
- step S722 If the SGL cache 46 is not held (step S722: NO), the SAS adapter 4 acquires the SGL 52 corresponding to the found record from the memory 5 and holds it internally as the SGL cache 46 (step S723). Then, the SAS adapter 4 ends this process.
- FIG. 14 is a sequence chart showing a processing example in which data read from the drive 3 is stored in the memory 5 via the SAS adapter 4.
- the drive 3 when the drive 3 receives the read command 42 (step S43), it reads data from the storage medium and stores it in the buffer memory in the drive 3.
- the drive 3 transmits a connection request to the SAS adapter 4 at the timing when the SAS frame is waiting to be transferred (step S44).
- the connection request may include the drive number of the drive 3 and the tag number related to the SAS frame that can be transferred.
- the SAS adapter 4 performs the following processing with the receipt of this connection request as a trigger. That is, as shown in FIG. 13, the SAS adapter 4 searches the in-execution command management list 45 for an incomplete command that matches the drive number and tag number included in this connection request, and finds the incomplete command found. Is stored as the SGL cache 46 (steps S46, S47, S48).
- the SAS adapter 4 can know from the SGL cache 46 the storage destination of data transferred from the drive 3 to the memory 4 thereafter. Therefore, the data can be stored in the memory 5 at a higher speed than when the SGL 52 is acquired from the memory 5 at the timing when the data is received. That is, the throughput of the memory 5 can be improved.
- Example 1 may be combined with the content of Example 2 or 3.
- the protocol between the SAS adapter and the storage drive may be other than the SAS protocol.
- the protocol between the SAS adapter and the processor may be other than the PCIe protocol.
- a processor Memory accessed in units of memory partitions of a predetermined size;
- a storage drive An interface device that mediates data communication between the processor and the storage drive;
- the storage drive is Based on an offset value that is a value relating to a size between a storage area in the memory of transfer data to be transferred to the interface device and a predetermined position of a partition in the memory to which at least a part of the storage area belongs, Determine the size of the transfer data, Transfer the transfer data of the determined size to the interface device, The interface device divides the transfer data into packets and transfers them to the processor;
- the storage system wherein the processor stores a packet transferred from the interface device in the memory in units of the partition.
- Example 2 The storage system according to expression 1, wherein the offset value is a value relating to a size between a head of a storage area in the memory of the transfer data and a head of a partition in the memory to which the head of the storage area belongs.
- Example 3 The storage system according to expression 1 or 2, wherein the offset value is included in a read command issued from the interface device to the storage drive.
- Example 4 The storage system according to any one of Expressions 1 to 3, wherein the size of the transfer data is a size obtained by subtracting the offset value from a maximum size that the transfer data can take.
- the storage drive calculates an offset value for the next transfer data based on the amount of transfer data that has been transferred to the interface device, and determines the size of the next transfer data based on the calculated offset value The storage system according to any one of 1 to 4.
- the storage drive is If the amount of data waiting to be transferred to the interface device is less than the maximum size that the transfer data can take, transfer all the data waiting for transfer to the interface device, If the amount of data waiting to be transferred to the interface device is greater than or equal to the maximum size that the transfer data can take, determine whether the offset value is “0”; When the offset value is “0”, a portion of the maximum size that can be taken by the transfer data among the data waiting for transfer is transferred to the interface device, If the offset value is not “0”, any one of Expressions 1 to 5 in which the amount of size obtained by subtracting the offset value from the maximum size that the transfer data can take is transferred to the interface device.
- Expression 7 Data communication between the interface device and the processor is based on the PCI-Express specification, Data communication between the interface device and the storage drive is based on a SAS (Serial Attached SCSI) specification, The storage system according to any one of Expressions 1 to 6, wherein a maximum size that the transfer data can take is a value determined based on a SAS specification.
- SAS Serial Attached SCSI
- Example 8 A processor; Memory, A storage drive; An interface device that mediates data communication between the processor and the storage drive; The memory stores command management information for associating a read command issued by the interface device to the storage drive and a storage area in the memory of data read by the read command, The interface device holds in-execution command management information generated by extracting information related to incomplete read commands out of read commands issued to the storage drive from the command management information, The interface device specifies a storage area in the memory of the transfer data based on the command management information being executed. (Expression 9) The storage system according to expression 8, wherein the interface device generates the command management information being executed at a timing when a connection request for transferring the transfer data is received from the storage drive.
- the interface device extracts, from the command management information, information related to an incomplete read command out of read commands issued to the storage drive that is the transmission source of the connection request, and executes the command management information being executed
- the storage system according to expression 8 or 9, which generates (Expression 11)
- the interface device extracts the information related to the oldest uncompleted read command and generates the in-execution command management information when there are a plurality of uncompleted read commands. Storage system.
- the read command includes distinction information for distinguishing the read command from other read commands
- the command management information further associates the read command with the distinction information
- the storage drive sends a connection request including the distinction information of the read command related to the transfer data to the interface device,
- the storage system according to expression 8 or 9, wherein the interface device extracts information related to an incomplete read command associated with the distinction information and generates the command management information being executed.
- Storage drive Get the read data from the storage area, A memory that is accessed in units of a predetermined-size partition, and relates to the size between the storage area of the read data in the memory and the predetermined position of the partition in the memory to which at least a part of the storage position belongs Determine the size of the transfer data based on the offset value, Transfer the transfer data of the determined size to the interface device, The interface device is Upon receipt of the transfer data from the storage drive, the transfer data is divided into packets and transferred to the processor, When the processor receives the packet from the interface device, the processor stores the packet in the memory in units of the partition.
- An interface device that mediates data communication between the processor and the storage drive is Command management information stored in a memory, the command management information associating a read command issued to the storage drive by the interface device and a storage area in the memory of data read by the read command From the read command issued to the storage drive, information on incomplete read commands is extracted to generate in-execution command management information, and the generated in-execution command management information is retained, A storage control method for specifying a storage area of the transfer data in the memory based on the command management information being executed.
- Storage system 2 Processor 3: Drive 4: SAS adapter 5: Memory
Abstract
Description
記憶ドライブは、インタフェースデバイスへ転送する転送データのメモリにおける格納領域と、その格納領域の少なくとも一部が属するメモリにおける区画の所定位置と、の間の大きさに関する値であるオフセット値に基づいて、転送データのサイズを決定し、その決定したサイズの転送データをインタフェースデバイスへ転送する。
インタフェースデバイスは、転送データをパケットに分割してプロセッサへ転送する。
プロセッサは、インタフェースデバイスから転送されたパケットを、区画の単位でメモリに格納する。
(表現1)
プロセッサと、
所定サイズのメモリ区画の単位でアクセスされるメモリと、
記憶ドライブと、
前記プロセッサと前記記憶ドライブの間のデータ通信を仲介するインタフェースデバイスと
を備え、
前記記憶ドライブは、
前記インタフェースデバイスへ転送する転送データの前記メモリにおける格納領域と、その格納領域の少なくとも一部が属する前記メモリにおける区画の所定位置と、の間の大きさに関する値であるオフセット値に基づいて、前記転送データのサイズを決定し、
その決定したサイズの転送データを前記インタフェースデバイスへ転送し、
前記インタフェースデバイスは、前記転送データをパケットに分割して前記プロセッサへ転送し、
前記プロセッサは、前記インタフェースデバイスから転送されたパケットを、前記区画の単位で前記メモリに格納する
ストレージシステム。
(表現2)
前記オフセット値は、前記転送データの前記メモリにおける格納領域の先頭と、その格納領域の先頭が属する前記メモリにおける区画の先頭と、の間の大きさに関する値である
表現1に記載のストレージシステム。
(表現3)
前記オフセット値は、前記インタフェースデバイスから前記記憶ドライブへ発行されるリードコマンドに含まれる
表現1又は2に記載のストレージシステム。
(表現4)
前記転送データのサイズは、前記転送データの取り得る最大サイズから前記オフセット値を減算したサイズである
表現1乃至3の何れか一つに記載のストレージシステム。
(表現5)
前記記憶ドライブは、前記インタフェースデバイスへ転送済みの転送データの量に基づいて、次の転送データに関するオフセット値を算出し、その算出したオフセット値に基づいて、次の転送データのサイズを決定する
表現1乃至4の何れか一つに記載のストレージシステム。
(表現6)
前記記憶ドライブは、
前記インタフェースデバイスへ転送待ちのデータの量が前記転送データの取り得る最大サイズ未満の場合、その転送待ちのデータを全て前記インタフェースデバイスへ転送し、
前記インタフェースデバイスへ転送待ちのデータの量が前記転送データの取り得る最大サイズ以上の場合、前記オフセット値が「0」か否かを判定し、
前記オフセット値が「0」である場合、その転送待ちのデータの内、前記転送データの取り得る最大サイズの分を、前記インタフェースデバイスへ転送し、
前記オフセット値が「0」でない場合、その転送待ちのデータの内、前記転送データの取り得る最大サイズから前記オフセット値を減算したサイズの分を、前記インタフェースデバイスへ転送する
表現1乃至5の何れか一つに記載のストレージシステム。
(表現7)
前記インタフェースデバイスと前記プロセッサとの間のデータ通信は、PCI-Expressの仕様に基づいており、
前記インタフェースデバイスと前記記憶ドライブとの間のデータ通信は、SAS(Serial Attached SCSI)の仕様に基づいており、
前記転送データの取り得る最大サイズは、SASの仕様に基づいて決まる値である
表現1乃至6の何れか一つに記載のストレージシステム。
(表現8)
プロセッサと、
メモリと、
記憶ドライブと、
前記プロセッサと前記記憶ドライブの間のデータ通信を仲介するインタフェースデバイスと
を備え、
前記メモリには、前記インタフェースデバイスが前記記憶ドライブに対して発行したリードコマンドと、当該リードコマンドによってリードされるデータのメモリ内における格納領域と、を対応付けるコマンド管理情報が格納されており、
前記インタフェースデバイスは、前記コマンド管理情報から、前記記憶ドライブに対して発行したリードコマンドの内の未完了のリードコマンドに関する情報が抽出されて生成された、実行中コマンド管理情報を保持し、
前記インタフェースデバイスは、前記実行中コマンド管理情報に基づいて、前記転送データの前記メモリ内における格納領域を特定する
ストレージシステム。
(表現9)
前記インタフェースデバイスは、前記記憶ドライブから前記転送データの転送のためのコネクション要求を受領したタイミングで、前記実行中コマンド管理情報を生成する
表現8に記載のストレージシステム。
(表現10)
前記インタフェースデバイスは、前記コネクション要求の送信元の記憶ドライブに対して発行したリードコマンドの内の未完了のリードコマンドに関連する情報を、前記コマンド管理情報から抽出して、前記実行中コマンド管理情報を生成する
表現8又は9に記載のストレージシステム。
(表現11)
前記インタフェースデバイスは、前記未完了のリードコマンドが複数存在する場合、最古に発行された未完了のリードコマンドに関連する情報を抽出して、前記実行中コマンド管理情報を生成する
表現10に記載のストレージシステム。
(表現12)
前記リードコマンドには、当該リードコマンドと他のリードコマンドを区別するための区別情報が含まれており、
前記コマンド管理情報は、前記リードコマンドと前記区別情報とを更に対応付け、
前記記憶ドライブは、前記転送データに係るリードコマンドの前記区別情報を含むコネクション要求を、前記インタフェースデバイスへ送信し、
前記インタフェースデバイスは、前記区別情報に対応付けられている未完了のリードコマンドに関連する情報を抽出して、前記実行中コマンド管理情報を生成する
表現8又は9に記載のストレージシステム。
(表現13)
記憶ドライブは、
記憶領域からリードデータを取得し、
所定サイズの区画の単位でアクセスされるメモリであって、当該メモリにおける前記リードデータの格納領域と、その格納位置の少なくとも一部が属する前記メモリにおける区画の所定位置と、の間の大きさに関する値であるオフセット値に基づいて、転送データのサイズを決定し、
前記決定したサイズの転送データをインタフェースデバイスへ転送し、
前記インタフェースデバイスは、
前記記憶ドライブから前記転送データを受領すると、当該転送データをパケットに分割してプロセッサへ転送し、
前記プロセッサは、前記インタフェースデバイスから前記パケットを受領すると、当該パケットを、前記区画の単位で前記メモリに格納する
記憶制御方法。
(表現14)
プロセッサと記憶ドライブの間のデータ通信を仲介するインタフェースデバイスは、
メモリに格納されているコマンド管理情報であって、前記インタフェースデバイスが前記記憶ドライブに対して発行したリードコマンドと、当該リードコマンドによってリードされるデータのメモリ内における格納領域と、を対応付けるコマンド管理情報から、前記記憶ドライブに対して発行したリードコマンドの内の未完了のリードコマンドに関する情報を抽出して実行中コマンド管理情報を生成し、その生成した実行中コマンド管理情報を保持し、
前記実行中コマンド管理情報に基づいて、前記転送データの前記メモリ内における格納領域を特定する
記憶制御方法。
Claims (13)
- プロセッサと、
所定サイズの区画の単位でアクセスされるメモリと、
記憶ドライブと、
前記プロセッサと前記記憶ドライブの間のデータ通信を仲介するインタフェースデバイスと
を備え、
前記記憶ドライブは、
前記インタフェースデバイスへ転送する転送データの前記メモリにおける格納領域と、その格納領域の少なくとも一部が属する前記メモリにおける区画の所定位置と、の間の大きさに関する値であるオフセット値に基づいて、前記転送データのサイズを決定し、
その決定したサイズの転送データを前記インタフェースデバイスへ転送し、
前記インタフェースデバイスは、前記転送データをパケットに分割して前記プロセッサへ転送し、
前記プロセッサは、前記インタフェースデバイスから転送されたパケットを、前記区画の単位で前記メモリに格納する
ストレージシステム。 - 前記オフセット値は、前記転送データの前記メモリにおける格納領域の先頭と、その格納領域の先頭が属する前記メモリにおける区画の先頭と、の間の大きさに関する値である
請求項1に記載のストレージシステム。 - 前記オフセット値は、前記インタフェースデバイスから前記記憶ドライブへ発行されるリードコマンドに含まれる
請求項1に記載のストレージシステム。 - 前記転送データのサイズは、前記転送データの取り得る最大サイズから前記オフセット値を減算したサイズである
請求項2に記載のストレージシステム。 - 前記記憶ドライブは、前記インタフェースデバイスへ転送済みの転送データの量に基づいて、次の転送データに関するオフセット値を算出し、その算出したオフセット値に基づいて、次の転送データのサイズを決定する
請求項2に記載のストレージシステム。 - 前記記憶ドライブは、
前記インタフェースデバイスへ転送待ちのデータの量が前記転送データの取り得る最大サイズ未満の場合、その転送待ちのデータを全て前記インタフェースデバイスへ転送し、
前記インタフェースデバイスへ転送待ちのデータの量が前記転送データの取り得る最大サイズ以上の場合、前記オフセット値が「0」か否かを判定し、
前記オフセット値が「0」である場合、その転送待ちのデータの内、前記転送データの取り得る最大サイズの分を、前記インタフェースデバイスへ転送し、
前記オフセット値が「0」でない場合、その転送待ちのデータの内、前記転送データの取り得る最大サイズから前記オフセット値を減算したサイズの分を、前記インタフェースデバイスへ転送する
請求項4に記載のストレージシステム。 - 前記インタフェースデバイスと前記プロセッサとの間のデータ通信は、PCI-Expressの仕様に基づいており、
前記インタフェースデバイスと前記記憶ドライブとの間のデータ通信は、SAS(Serial Attached SCSI)の仕様に基づいており、
前記転送データの取り得る最大サイズは、SASの仕様に基づいて決まる値である
請求項4に記載のストレージシステム。 - 前記メモリには、前記インタフェースデバイスが前記記憶ドライブに対して発行したリードコマンドと、当該リードコマンドによってリードされるデータのメモリ内における格納領域と、を対応付けるコマンド管理情報が格納されており、
前記インタフェースデバイスは、前記コマンド管理情報から、前記記憶ドライブに対して発行したリードコマンドの内の未完了のリードコマンドに関する情報が抽出されて生成された、実行中コマンド管理情報を保持し、
前記インタフェースデバイスは、前記実行中コマンド管理情報に基づいて、前記転送データの前記メモリ内における格納領域を特定する
請求項1に記載のストレージシステム。 - 前記インタフェースデバイスは、前記記憶ドライブから前記転送データの転送のためのコネクション要求を受領したタイミングで、前記実行中コマンド管理情報を生成する
請求項8に記載のストレージシステム。 - 前記インタフェースデバイスは、前記コネクション要求の送信元の記憶ドライブに対して発行したリードコマンドの内の未完了のリードコマンドに関連する情報を、前記コマンド管理情報から抽出して、前記実行中コマンド管理情報を生成する
請求項9に記載のストレージシステム。 - 前記インタフェースデバイスは、前記未完了のリードコマンドが複数存在する場合、最古に発行された未完了のリードコマンドに関連する情報を抽出して、前記実行中コマンド管理情報を生成する
請求項10に記載のストレージシステム。 - 前記リードコマンドには、当該リードコマンドと他のリードコマンドを区別するための区別情報が含まれており、
前記コマンド管理情報は、前記リードコマンドと前記区別情報とを更に対応付け、
前記記憶ドライブは、前記転送データに係るリードコマンドの前記区別情報を含むコネクション要求を、前記インタフェースデバイスへ送信し、
前記インタフェースデバイスは、前記区別情報に対応付けられている未完了のリードコマンドに関連する情報を抽出して、前記実行中コマンド管理情報を生成する
請求項10に記載のストレージシステム。 - 記憶ドライブは、
記憶領域からリードデータを取得し、
所定サイズの区画の単位でアクセスされるメモリであって、当該メモリにおける前記リードデータの格納領域と、その格納位置の少なくとも一部が属する前記メモリにおける区画の所定位置と、の間の大きさに関する値であるオフセット値に基づいて、転送データのサイズを決定し、
前記決定したサイズの転送データをインタフェースデバイスへ転送し、
前記インタフェースデバイスは、
前記記憶ドライブから前記転送データを受領すると、当該転送データをパケットに分割してプロセッサへ転送し、
前記プロセッサは、前記インタフェースデバイスから前記パケットを受領すると、当該パケットを、前記区画の単位で前記メモリに格納する
記憶制御方法。
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JP2021131732A (ja) * | 2020-02-19 | 2021-09-09 | 株式会社日立製作所 | データ転送システム |
US20230359375A1 (en) * | 2022-05-05 | 2023-11-09 | Seagate Technology Llc | External storage of internal drive management data |
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TWI702499B (zh) * | 2018-08-20 | 2020-08-21 | 慧榮科技股份有限公司 | 儲存裝置及快取區定址方法 |
US11416435B2 (en) * | 2019-09-03 | 2022-08-16 | Pensando Systems Inc. | Flexible datapath offload chaining |
CN112783462A (zh) * | 2021-01-19 | 2021-05-11 | 昆山联滔电子有限公司 | 一种数据传输的控制方法及装置 |
CN116628670B (zh) * | 2023-05-18 | 2024-03-22 | 荣耀终端有限公司 | 权限设置方法和电子设备 |
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JP2005275538A (ja) * | 2004-03-23 | 2005-10-06 | Fujitsu Ltd | ダイレクトメモリアクセス制御装置および方法 |
JP2007206766A (ja) * | 2006-01-31 | 2007-08-16 | Fujitsu Ltd | データストレージシステム、データストレージ制御装置及びその障害箇所診断方法。 |
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JP2005275538A (ja) * | 2004-03-23 | 2005-10-06 | Fujitsu Ltd | ダイレクトメモリアクセス制御装置および方法 |
JP2007206766A (ja) * | 2006-01-31 | 2007-08-16 | Fujitsu Ltd | データストレージシステム、データストレージ制御装置及びその障害箇所診断方法。 |
US20080235484A1 (en) * | 2007-03-22 | 2008-09-25 | Uri Tal | Method and System for Host Memory Alignment |
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JP2021131732A (ja) * | 2020-02-19 | 2021-09-09 | 株式会社日立製作所 | データ転送システム |
JP6997235B2 (ja) | 2020-02-19 | 2022-01-17 | 株式会社日立製作所 | データ転送システム |
US20230359375A1 (en) * | 2022-05-05 | 2023-11-09 | Seagate Technology Llc | External storage of internal drive management data |
US11954341B2 (en) * | 2022-05-05 | 2024-04-09 | Seagate Technology Llc | External storage of internal drive management data |
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US20180052632A1 (en) | 2018-02-22 |
JPWO2016181464A1 (ja) | 2017-12-07 |
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