WO2016177065A1 - 一种时延测量方法和装置 - Google Patents

一种时延测量方法和装置 Download PDF

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Publication number
WO2016177065A1
WO2016177065A1 PCT/CN2016/075530 CN2016075530W WO2016177065A1 WO 2016177065 A1 WO2016177065 A1 WO 2016177065A1 CN 2016075530 W CN2016075530 W CN 2016075530W WO 2016177065 A1 WO2016177065 A1 WO 2016177065A1
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Prior art keywords
delay
terminal device
value
port
compensation value
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PCT/CN2016/075530
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English (en)
French (fr)
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刘银恩
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中兴通讯股份有限公司
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Publication of WO2016177065A1 publication Critical patent/WO2016177065A1/zh

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L43/00—Arrangements for monitoring or testing data switching networks
    • H04L43/08—Monitoring or testing based on specific metrics, e.g. QoS, energy consumption or environmental parameters
    • H04L43/0852—Delays
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L47/00—Traffic control in data switching networks
    • H04L47/10—Flow control; Congestion control
    • H04L47/28—Flow control; Congestion control in relation to timing considerations
    • H04L47/283—Flow control; Congestion control in relation to timing considerations in response to processing delays, e.g. caused by jitter or round trip time [RTT]

Definitions

  • This document relates to, but is not limited to, the field of network communication technology, and more particularly to a method and device for measuring delay.
  • connection-oriented packet switching network technology Transport Profile for MPLS, referred to as MPLS-TP
  • MPLS-TP Transmission Profile for MPLS
  • IP Internet Protocol
  • MPLS Multi-Protocol Label Switching
  • Operation, Administration, and Maintenance are the core issues that reflect the performance of MPLS-TP.
  • the Delay Measurement (DM) function is used for MPLS-TP. Link performance is monitored.
  • the DM includes a unidirectional DM and a bidirectional DM.
  • the unidirectional DM requires the local maintenance endpoint (MEP) and the peer MEP to maintain a high synchronization of the clock. Otherwise, a large error is generated.
  • the DM measures the link performance of MPLS-TP. Specifically, the local MEP sends a Delay Measurement Message (DMM) to the peer MEP, and receives a Delay Measurement Relay (DMR) message returned by the peer MEP.
  • DDM Delay Measurement Message
  • DMR Delay Measurement Relay
  • the local MEP and the peer MEP usually use the hardware microcode to timestamp the DMM packet and the DMR packet.
  • the DMR packet received by the local MEP carries the timestamp (TxTimeStampf) of the DMM packet and the receiving DMM.
  • the timestamp of the packet (RxTimeStampf) sends the timestamp of the DMR packet (TxTimeStampb) and the timestamp of the received DMR packet (RxTimeStampb).
  • the RxTimeStampb is the local MEP that receives the DMR packet and then plays the DMR packet.
  • the timestamp of the bidirectional link between the local MEP and the peer MEP is calculated based on the timestamp.
  • the terminal device needs to time stamp the DMM message and the DMR message through the hardware microcode, and the microcode time stamp exists in the chip. Processing delays with ports, resulting in actually measured bidirectional chains There is a certain error in the path delay value.
  • the embodiment of the invention provides a method and a device for measuring a delay, which can improve the accuracy of the measured bidirectional link delay value.
  • An embodiment of the present invention provides a method for measuring a time delay, including:
  • the first terminal device calculates a delay measurement value by initiating a first two-way delay measurement DM to the second terminal device, where the delay measurement value is a chip of the first terminal device to a chip of the second terminal device Two-way delay value;
  • the first terminal device calculates a first delay compensation value by initiating a second bidirectional DM to the port of the first terminal device, where the first delay compensation value is a chip of the first terminal device to the The delay value between the ports of the first terminal device;
  • the first terminal device calculates a bidirectional link delay value between the first terminal device and the second terminal device according to the delay measurement value and the first delay compensation value.
  • an intra-ring is configured between the chip and the port of the first terminal device, where the first terminal device calculates a first time delay compensation by initiating a second bidirectional DM to the port of the first terminal device.
  • the first terminal device initiates a second bidirectional DM to the port of the first terminal device by using the inner ring of the port, and obtains a sending timestamp and a receiving timestamp of the DMM packet of the delay measurement message;
  • the chip11recv is a receiving timestamp of the DMM packet
  • the chip11send is a sending timestamp of the DMM packet.
  • the delay value between the chip of the second terminal device and the port of the second terminal device is the same as the first delay compensation value; the first terminal device is configured according to the time delay.
  • the value of the two-way link delay between the first terminal device and the second terminal device is calculated by the value and the first delay compensation value, including:
  • the Delay 1 is the delay measurement value, and the t 1 is the first delay compensation value.
  • the method further includes:
  • the first terminal device calculates a bidirectional link delay value between the first terminal device and the second terminal device according to the delay measurement value and the first delay compensation value, including:
  • the first terminal device calculates a bidirectional link delay value between the port of the first terminal device and the port of the second terminal device, including:
  • the delay 1 is the delay measurement value
  • the t 1 is the first delay compensation value
  • the t 2 is the second delay compensation value.
  • the first delay compensation value is an average value of measured values obtained by performing multiple measurements on a delay value between a chip of the first terminal device and a port of the first terminal device, where and / or,
  • the second delay compensation value is an average value of the measured values obtained by performing multiple measurements on the delay value between the chip of the second terminal device and the port of the second terminal device.
  • Embodiments of the present invention also provide a computer readable storage medium storing computer executable instructions for performing any of the methods described above.
  • the present invention provides a time delay measuring device, which is disposed in a first terminal device, and the device includes:
  • a time delay measurement module configured to measure a delay measurement value by initiating a first two-way delay measurement DM to the second terminal device, where the delay measurement value is a chip of the first terminal device to the second terminal device The two-way delay value between the chips;
  • a compensation measurement module configured to calculate a first delay compensation value by initiating a second bidirectional DM to the port of the first terminal device, where the first delay compensation value is a chip of the first terminal device to the The delay value between the ports of the first terminal device;
  • a delay correction module configured to calculate the first terminal device to the second terminal according to the delay measurement value measured by the delay measurement module and the first delay compensation value measured by the compensation measurement module The bidirectional link delay value between devices.
  • an intra-ring is configured between the chip and the port of the first terminal device, where the compensation measurement module includes: an acquiring unit, configured to initiate, by using the inner ring of the port, a port of the first terminal device The second bidirectional DM obtains a transmission timestamp and a receiving timestamp of the DMM packet of the delay measurement message;
  • the chip11recv is a receiving timestamp of the DMM
  • the chip11send is a sending timestamp of the DMM packet.
  • the delay value between the chip of the second terminal device and the port of the second terminal device is the same as the first delay compensation value;
  • the Delay 1 is the delay measurement value, and the t 1 is the first delay compensation value.
  • the time delay measuring device further includes: a receiving module, configured to: before the time delay correction module calculates a bidirectional link delay value between the first terminal device and the second terminal device, Receiving, by the second terminal device, a second delay compensation value, where the second delay compensation value is a delay value between a chip of the second terminal device and a port of the second terminal device;
  • the time delay correction module is configured to implement the first terminal device according to the time delay measurement value measured by the time delay measurement module and the first time delay compensation value measured by the compensation measurement module.
  • a two-way link delay value between the second terminal device a first delay compensation value calculated by the compensation measurement module and the receiving module according to the delay measurement value calculated by the delay measurement module
  • the second delay compensation value is used to calculate a bidirectional link delay value between the port of the first terminal device and the port of the second terminal device.
  • the delay correction module is set to:
  • the delay 1 is the delay measurement value
  • the t 1 is the first delay compensation value
  • the t 2 is the second delay compensation value.
  • the first delay compensation value is an average value of measured values obtained by performing multiple measurements on a delay value between a chip of the first terminal device and a port of the first terminal device, where and / or,
  • the second delay compensation value is an average value of the measured values obtained by performing multiple measurements on the delay value between the chip of the second terminal device and the port of the second terminal device.
  • the first terminal device calculates a delay measurement value between the two terminal device chips by initiating a first bidirectional DM to the second terminal device, and The port of the terminal device initiates the second bidirectional DM, and calculates a first delay compensation value between the chip and the port of the first terminal device, so as to correct the delay measurement value by using the first delay compensation value to obtain the first
  • the bidirectional link delay value between the terminal device and the second terminal device improves the accuracy of the measured bidirectional link delay value.
  • Figure 1 is a schematic diagram of a DMR message defined in the standard Y.1731;
  • FIG. 2 is a flowchart of a method for measuring a time delay according to an embodiment of the present invention
  • FIG. 3 is a schematic diagram of an application scenario of a time delay measurement method provided by the embodiment shown in FIG. 2;
  • FIG. 4 is a schematic diagram of another application scenario of the time delay measurement method provided by the embodiment shown in FIG. 2;
  • FIG. 5 is a schematic diagram of still another application scenario of the time delay measurement method provided by the embodiment shown in FIG. 2;
  • FIG. 6 is a flowchart of another method for measuring a time delay according to an embodiment of the present invention.
  • FIG. 7 is a schematic structural diagram of a time delay measuring apparatus according to an embodiment of the present invention.
  • FIG. 8 is a schematic structural diagram of another delay measuring apparatus according to an embodiment of the present invention.
  • GACH+Y.1731 Packet Data Unit PDU
  • GACH+Y.1731 adopts the Y.1731OAM standard which has been maturely applied in Ethernet.
  • the Y.1731 PDU is encapsulated by the MPLS-TP protocol and becomes the official draft of the Internet Engineering Task Force (IETF) (draft-bhh-mpls-tp-oam-y1731).
  • IETF Internet Engineering Task Force
  • the principle of obtaining the link delay between the terminal devices through the DM is that the local MEP periodically sends the DM packet to the peer MEP and receives the DM report from the peer MEP. Text, thus completing the measurement of the delay value.
  • the DM packet includes the DMM packet and the DMR packet.
  • the local MEP or the pair The hardware microcode of the MEP is time stamped.
  • the timestamps included in the DMR packet are RxTimeStampb, TxTimeStampf, TxTimeStampb, and RxTimeStampf, as shown in Figure 1, which is the standard Y.
  • Figure 1 A schematic diagram of the DMR packet defined in the .1731.
  • the local MEP can calculate the link delay value between the local MEP and the peer MEP according to the timestamp.
  • the MEL is the level of the Maintenance Entity Group (MEG), which is: MEG level;
  • Version is the version number of the OAM protocol
  • OpCode is used to identify the type of OAM PDU
  • the TLV is an offset value indicating the total number of bytes in the OAM PDU carrying the TLV.
  • the technical solution of the present invention is described in detail below by using a specific embodiment.
  • the first terminal device as an initiator that measures the link delay value
  • the first terminal device is used as an example.
  • the delay value of the link between the first terminal device and the second terminal device, that is, the peer MEP is measured.
  • the following specific embodiments of the present invention may be combined with each other, and the same or similar concepts or processes may not be described in some embodiments.
  • FIG. 2 is a flowchart of a method for measuring a time delay according to an embodiment of the present invention.
  • the delay measurement method provided in this embodiment is applicable to the case of measuring a link delay value between terminal devices in an MPLS-TP network, and the method may be performed by a delay measurement device, which uses hardware and software.
  • the device can be integrated in the processor of the first terminal device for use by the processor.
  • the method in this embodiment may include:
  • the first terminal device calculates a delay measurement value by initiating a first two-way DM to the second terminal device, where the delay measurement value is a two-way delay value between the chip of the first terminal device and the chip of the second terminal device. .
  • FIG. 3 is a schematic diagram of an application scenario of a time delay measurement method provided by the embodiment shown in FIG. 2 .
  • the first terminal device sends the first two-way DM to the second terminal device
  • the calculation of the delay measurement value includes: the first terminal device sends the DMM packet to the second terminal device, where the second terminal device receives the When the DMM packet is sent, the DMR packet is sent to the first terminal device.
  • the DMM packet is sent with the timestamp of the DMM packet.
  • the second terminal device when the second terminal device receives the DMM message, the receiving time stamp of the DMM message is marked as chip2recv by the microcode, and the second terminal device responds to the DMM message by sending the DMR message, and is also marked by the microcode.
  • DMR message The sending timestamp is recorded as chip2send, and the DMR message carries the chip1send and chip2recv of the DMM message, so that when the first terminal device receives the DMR message, the receiving timestamp of the DMR message is marked by the microcode, and is recorded as chip1recv.
  • the first terminal device can calculate the delay measurement value of the bidirectional DM by using the timestamp, that is, the delay measurement value of the link between the first terminal device and the second terminal device, and the delay measurement value Delay1 for:
  • Delay1 (chip1recv–chip1send)–(chip2send–chip2recv) (1)
  • FIG. 4 another application scenario of the delay measurement method provided by the embodiment shown in FIG. 2 is that the first terminal device initiates the first bidirectional DM to obtain the first terminal.
  • the actual delay value of the link is Delay:
  • Port1recv is the time when port 1 receives DMR packets
  • port1send is the time to send DMM packets from port port1
  • port2send is the time to send DMR packets from port port2
  • port2recv is the time when port port2 receives DMM packets.
  • the terminal device since the terminal device time stamps the DMM message or the DMR message through the microcode, it is executed in the chip of the terminal device. That is, the delay measurement value measured by the formula (1) is actually a delay value between the chip of the first terminal device and the chip of the second terminal device, and the delay value of the link between the two terminal devices The value of the delay between the port port 1 of the first terminal device and the port port 2 of the second terminal device.
  • the delay value of the link between the terminal devices is measured by the related art, the packet needs to be determined from the chip to the port. The time, which results in a certain error through the time stamping of the microcode, is that an accurate link delay value cannot be obtained.
  • the first terminal device calculates a first delay compensation value by initiating a second bidirectional DM to the port of the first terminal device, where the first delay compensation value is a chip of the first terminal device to a port of the first terminal device. The delay value between.
  • the error between the two-way link delay value between the first terminal device and the second terminal device port and the delay value between the first terminal device and the second terminal device chip includes: chip1 packets from the chip to a first terminal of the time between the ports and packets port1 t 1 from time t between the chip to the second terminal device chip2 port port2 2, therefore, is calculated by the analysis results obtained in S110
  • the delay measurement value Delay1 is:
  • Delay1 ((port1recv+t 1 )–(port1send-t 1 ))–((port2send-t 2 )–(port2recv+t 2 )),
  • the delay measurement value calculated by the formula (1) is the link delay value plus twice the internal processing time of the DM packet, so as long as the packet is obtained from the first chip1 chip time between the terminal device T to port port1 packets t 2, can be calculated from the time between the second terminal device chip chip2 port2 port to the first port 1 and the terminal device to the second terminal port1
  • the actual bidirectional link delay value between ports port2 of the device, that is, the delay measurement value Delay1 is corrected by t 1 and t 2 , so that the accuracy of the measurement delay value can be improved.
  • FIG. 5 is a schematic diagram of still another application scenario of the delay measurement method provided by the embodiment shown in FIG. 2 .
  • the first terminal device by setting an intra-ring ring between the chip chip1 and the port port1 of the first terminal device, the first terminal device sends a second bidirectional DM to its port port1.
  • the first terminal device issues a DMM.
  • the transmission time stamp of the DMM message is marked by the microcode, which is recorded as chip1 1send.
  • the receiving timestamp of the DMM packet is recorded as chip1 1recv, so that the first terminal device can calculate the chip between the chip chip1 and the port port1 of the first terminal device according to the sending timestamp and the receiving timestamp of the DMM packet.
  • the first terminal device calculates a bidirectional link delay value between the first terminal device and the second terminal device according to the delay measurement value and the first delay compensation value.
  • the embodiment shown in FIG. 2 is a possible implementation manner of the present invention. It can be considered that the second terminal device and the first terminal device are identical, that is, the delay value between the chip chip2 and the port port2 of the second terminal device.
  • the first delay compensation value t 1 is the same as the first delay compensation value t 1 . Therefore, the port port 1 to the second terminal of the first terminal device can be calculated according to the first delay compensation value t 1 obtained in the delay measurement values Delay 1 and S 120 obtained in S110.
  • the first terminal device in this embodiment is the initiator of the first bidirectional DM, that is, the measurer of the bidirectional link delay value, after acquiring the delay measurement value between the second terminal device and the second terminal device, The second DM is initiated to obtain the first delay compensation value between the chip and the port of the first terminal device, so that the delay measurement value is corrected by using the first delay compensation value, so that the two-way accuracy is high. Link delay value.
  • the first terminal device calculates a delay measurement value between the two terminal device chips by initiating a first bidirectional DM to the second terminal device, and by using the first terminal device
  • the port initiates the second bidirectional DM, and calculates a first delay compensation value between the chip and the port of the first terminal device, so as to correct the delay measurement value by using the first delay compensation value to obtain the first terminal device.
  • the link delay value between the second terminal device and the second terminal device; the method provided in this embodiment improves the accuracy of the measured bidirectional link delay value.
  • FIG. 6 is a flowchart of another method for measuring a time delay according to an embodiment of the present invention.
  • the method provided in this embodiment further includes: S121.
  • the first terminal device receives a second delay compensation value sent by the second terminal device, where the second delay compensation value is a delay value between a chip of the second terminal device and a port of the second terminal device.
  • the manner in which the second terminal device obtains the second delay compensation value is the same as the manner in which the first terminal device obtains the first delay compensation value, by setting a port inner ring between the chip and the port of the terminal device. And initiate a bidirectional DM from the chip to the port to obtain the delay compensation value, so it will not be described here.
  • the S130 in this embodiment may be replaced by: the first terminal device calculates the port of the first terminal device to the second terminal device according to the delay measurement value, the first delay compensation value, and the second delay compensation value.
  • the first delay compensation value in each of the foregoing embodiments of the present invention may be an average of the measured values obtained by performing multiple measurements on the delay value between the chip chip1 and the port port1 of the first terminal device.
  • the second delay compensation value may also be an average value of the measured values obtained by performing multiple measurements on the delay value between the chip chip 2 and the port port 2 of the second terminal device.
  • FIG. 2 and FIG. 6 of the present invention performs time delay measurement by the first terminal device in the application scenario shown in FIG. 3 to FIG. 5, and in the specific implementation, the same may be used.
  • the second terminal device in the application scenario shown in FIG. 5 performs the delay measurement, where the second terminal device initiates the bidirectional DM to the first terminal device, and initiates the bidirectional DM through the inner ring of the port to obtain the second DM.
  • the second delay compensation value is the same as the above embodiment, and therefore will not be described here.
  • Embodiments of the present invention also provide a computer readable storage medium storing computer executable instructions for performing any of the methods described above.
  • FIG. 7 is a schematic structural diagram of a time delay measuring apparatus according to an embodiment of the present invention.
  • the delay measuring apparatus provided in this embodiment is applicable to the case of measuring the link delay value between the terminal devices in the MPLS-TP network, and the delay measuring device is implemented by combining hardware and software, and can be set in the figure. 3 to the first terminal device of the application scenario shown in FIG. 5.
  • the time delay measuring device of this embodiment includes a delay measuring module 11, a compensation measuring module 12, and a delay correcting module 13.
  • the delay measurement module 11 is configured to measure a delay measurement value by initiating a first bidirectional DM to the second terminal device, where the delay measurement value is between the chip of the first terminal device and the chip of the second terminal device. Two-way delay value.
  • the measurement method and formula of the delay measurement value in this embodiment are the same as the specific manner in the embodiment shown in FIG. 2, and can be calculated by the formula (1), and therefore will not be described again, and the delay measurement module is adopted. 11 There is a certain error between the calculated delay measurement value and the bidirectional link delay value between the first terminal device and the second terminal device port.
  • the compensation measurement module 12 is configured to calculate a first delay compensation value by initiating a second bidirectional DM to the port of the first terminal device, where the first delay compensation value is a chip of the first terminal device to a port of the first terminal device The value of the delay between.
  • the delay correction module 13 is configured to calculate the two-way between the first terminal device and the second terminal device according to the time delay measurement value measured by the delay measurement module 11 and the first delay compensation value measured by the compensation measurement module 12 Link delay value.
  • the second terminal device and the first terminal device in the embodiment are identical, that is, the delay value between the chip and the port of the second terminal device is the same as that measured by the compensation measurement module 12.
  • the first terminal device in this embodiment is configured as the initiator of the first bidirectional DM
  • the delay measurement device provided in this embodiment is configured to obtain the delay measurement value between the second terminal device and the second terminal device. Re-initiating the second DM to obtain the first delay compensation value between the chip and the port of the first terminal device, so as to correct the delay measurement value by using the first delay compensation value, and obtaining a chain with higher accuracy Road delay value.
  • FIG. 8 is a schematic structural diagram of another delay measuring apparatus according to an embodiment of the present invention.
  • the port inner ring is also disposed between the chip and the port of the first terminal device
  • the delay measuring device provided by the embodiment of the present invention is used to perform the time delay measuring method provided by the embodiment shown in FIG. 1 of the present invention, and has a corresponding functional module, and the implementation principle and the technical effect thereof are similar, and details are not described herein again.
  • the apparatus provided in this embodiment further includes The receiving module 16 is configured to receive the second delay compensation value sent by the second terminal device before the delay correction module 13 calculates the bidirectional link delay value between the second terminal devices of the first terminal device, and the second time
  • the delay compensation value is a delay value between the chip of the second terminal device and the port of the second terminal device; correspondingly, the delay correction module 13 is configured to implement the delay measured by the delay measurement module 11 in the following manner.
  • the two-time delay compensation value is used to calculate a bidirectional link delay value between the port of the first terminal device and the port of the second terminal device.
  • the delay measurement device provided by the embodiment of the present invention is used to perform the time delay measurement method provided by the embodiment shown in FIG. 6 of the present invention, and has a corresponding function module, and the implementation principle and the technical effect thereof are similar, and details are not described herein again.
  • first delay compensation value in each of the foregoing embodiments of the present invention may be an average value of the measured values obtained by performing multiple measurements on the delay value between the chip and the port of the first terminal device.
  • second delay compensation value may also be an average value of the measured values obtained by performing multiple measurements on the chip-to-port delay value of the second terminal device.
  • the delay measurement value measured by the delay measurement module 11 is corrected by the average value of the delay value between the chip and the port of the terminal device, so that the accuracy of the finally calculated link delay value can be further improved.
  • the time delay measuring apparatus shown in FIG. 7 and FIG. 8 of the present invention may also be disposed in the second terminal device that executes the application scenario shown in FIG. 3 to FIG. 5, and is correspondingly executed by the second terminal device.
  • the time delay measurement is specifically performed by the second terminal device to the first terminal device, and the second time delay compensation value is obtained by the second inner DM of the port, and the specific implementation manner is the same as the foregoing embodiment. Therefore, it will not be repeated here.
  • each module/unit in the above embodiment may be implemented in the form of hardware, for example, by an integrated circuit to implement its corresponding function. It can also be implemented in the form of a software function module, for example, by a processor executing a program/instruction in the memory and memory to implement its corresponding function.
  • the invention is not limited to any specific form of combination of hardware and software.

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Abstract

一种时延测量方法和装置，包括：第一终端设备通过向第二终端设备发起第一双向DM，计算时延测量值，时延测量值为第一终端设备的芯片到第二终端设备的芯片之间的双向时延值；第一终端设备通过向第一终端设备的端口发起第二双向DM，计算第一时延补偿值，第一时延补偿值为第一终端设备的芯片到第一终端设备的端口之间的时延值；第一终端设备根据时延测量值和第一时延补偿值计算第一终端设备到第二终端设备之间的双向链路时延值。

Description

一种时延测量方法和装置 技术领域
本文涉及但不限于网络通信技术领域，尤指一种时延测量方法和装置。
背景技术
随着网络通信的发展，目前通常使用具有高效多业务适配能力和灵活标签转发机制的面向连接的分组交换网络技术(Transport Profile for MPLS，简称为：MPLS-TP)，来满足分组业务的高效传输需求，并且可以兼容网络协议(Internet Protocol，简称为：IP)或多协议标签交换(Multi-Protocol Label Switching，简称为：MPLS)。
操作(Operation)、管理(Administration)和维护(Maintenance)(简称为：OAM)作为反映MPLS-TP性能的核心问题，通常通过时延测量(Delay Measurement，简称为：DM)功能对MPLS-TP的链路性能进行监控。DM包括单向DM和双向DM，由于单向DM要求本端维护端点(Maintenance End Point，简称为：MEP)和对端MEP的时钟保持高度同步，否则会造成较大的误差，因此通常采用双向DM测量MPLS-TP的链路性能。具体地，本端MEP向对端MEP发送时延测量消息(Delay Measurement Message，简称DMM报文)，并接收对端MEP返回的时延测量应答消息(Delay Measurement Relay，简称为：DMR报文)，本端MEP和对端MEP通常使用硬件微码对上述DMM报文和DMR报文打时间戳，本端MEP接收的DMR报文中携带有发送DMM报文的时间戳(TxTimeStampf)、接收DMM报文的时间戳(RxTimeStampf)发送DMR报文的时间戳(TxTimeStampb)和接收DMR报文的时间戳(RxTimeStampb)；其中，RxTimeStampb是本端MEP接收到DMR报文后，在DMR报文上打的时间戳，本端MEP可以根据上述时间戳计算出本端MEP和对端MEP之间的双向链路时延值。
然而，相关技术在通过双向DM计算终端设备之间链路时延值的过程中，由于终端设备需要通过硬件微码对DMM报文和DMR报文打时间戳，而微码打时间戳存在芯片与端口之间处理延迟，从而导致实际测得的双向链 路时延值存在一定的误差。
发明内容
以下是对本文详细描述的主题的概述。本概述并非是为了限制权利要求的保护范围。
本发明实施例提供了一种时延测量方法和装置，能够提高测得的双向链路时延值的精度。
本发明实施例提供一种时延测量方法，包括：
第一终端设备通过向第二终端设备发起第一双向时延测量DM，计算时延测量值，所述时延测量值为所述第一终端设备的芯片到所述第二终端设备的芯片之间的双向时延值；
所述第一终端设备通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，所述第一时延补偿值为所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值；
所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值。
可选的，所述第一终端设备的芯片和端口之间设置有端口内环，所述第一终端设备通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，包括：
所述第一终端设备通过所述端口内环向所述第一终端设备的端口发起第二双向DM，获取时延测量消息DMM报文的发送时间戳和接收时间戳；
所述第一终端设备按照公式t1＝(chip11recv-chip11send)/2计算所述第一时延补偿值t1；
其中，所述chip11recv为所述DMM报文的接收时间戳，所述chip11send为所述DMM报文的发送时间戳。
可选的，所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值与所述第一时延补偿值相同；所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值，包括：
所述第一终端设备按照公式Delay＝Delay1-2×2t1计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值Delay；
其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值。
可选的，所述第一终端设备计算所述第一终端设备到所述第二终端设备之间的双向链路时延值之前，还包括：
所述第一终端设备接收所述第二终端设备发送的第二时延补偿值，所述第二时延补偿值为所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值；
所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值，包括：
所述第一终端设备根据所述时延测量值、所述第一时延补偿值和所述第二时延补偿值，计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值。
可选的，所述第一终端设备计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值包括：
按照公式Delay＝Delay1-2(t1+t2)计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值Delay；
其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值，所述t2为所述第二时延补偿值。
可选的，所述第一时延补偿值为对所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值，和/或，
所述第二时延补偿值为对所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值。
本发明实施例还提出了一种计算机可读存储介质，存储有计算机可执行指令，计算机可执行指令用于执行上述描述的任意一个方法。
第二方面，本发明提供一种时延测量装置，所述时延测量装置设置于第一终端设备中，所述装置包括：
时延测量模块，设置为通过向第二终端设备发起第一双向时延测量DM，测量时延测量值，所述时延测量值为所述第一终端设备的芯片到所述第二终端设备的芯片之间的双向时延值；
补偿测量模块，设置为通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，所述第一时延补偿值为所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值；
时延纠正模块，设置为根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值。
可选的，所述第一终端设备的芯片和端口之间设置有端口内环，所述补偿测量模块包括：获取单元，设置为通过所述端口内环向所述第一终端设备的端口发起第二双向DM，获取时延测量消息DMM报文的发送时间戳和接收时间戳；
计算单元，设置为按照公式t1＝(chip11recv-chip11send)/2计算所述第一时延补偿值t1；
其中，所述chip11recv为所述DMM的接收时间戳，所述chip11send为所述DMM报文的发送时间戳。
可选的，所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值与所述第一时延补偿值相同；所述时延纠正模块是设置为采用以下方式实现根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值：按照公式Delay＝Delay1-2×2t1计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值Delay；
其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值。
可选的，所述时延测量装置还包括：接收模块，设置为在所述时延纠正模块计算所述第一终端设备到所述第二终端设备之间的双向链路时延值之前，接收所述第二终端设备发送的第二时延补偿值，所述第二时延补偿值为所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值；
所述时延纠正模块是设置为采用以下方式实现根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值：根据所述时延测量模块计算的时延测量值，所述补偿测量模块计算的第一时延补偿值和所述接收模块接收的第二时延补偿值，计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值。
可选的，时延纠正模块是设置为：
按照公式Delay＝Delay1-2(t1+t2)计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值，
其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值，所述t2为所述第二时延补偿值。
可选的，所述第一时延补偿值为对所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值，和/或，
所述第二时延补偿值为对所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值。
本发明实施例提供的时延测量方法和装置，第一终端设备通过向第二终端设备发起第一双向DM，计算出该两个终端设备芯片之间的时延测量值，并且通过向第一终端设备的端口发起第二双向DM，计算第一终端设备的芯片到端口之间的第一时延补偿值，从而通过该第一时延补偿值对时延测量值进行修正，以获取第一终端设备与第二终端设备之间的双向链路时延值；本发明实施例提高了测得的双向链路时延值的精度。
在阅读并理解了附图和详细描述后，可以明白其他方面。
附图概述
图1为标准Y.1731中定义的DMR报文的示意图；
图2为本发明实施例提供的一种时延测量方法的流程图；
图3为图2所示实施例提供的时延测量方法的一种应用场景示意图；
图4为图2所示实施例提供的时延测量方法的另一种应用场景示意图；
图5为图2所示实施例提供的时延测量方法的又一种应用场景示意图；
图6为本发明实施例提供的另一种时延测量方法的流程图；
图7为本发明实施例提供的一种时延测量装置的结构示意图；
图8为本发明实施例提供的另一种时延测量装置的结构示意图。
本发明的实施方式
下文中将结合附图对本发明的实施例进行详细说明。需要说明的是，在不冲突的情况下，本申请中的实施例及实施例中的特征可以相互任意组合。
在附图的流程图示出的步骤可以在诸如一组计算机可执行指令的计算机系统中执行。并且，虽然在流程图中示出了逻辑顺序，但是在某些情况下，可以以不同于此处的顺序来执行所示出或描述的步骤。
目前网络通信中广泛应用的OAM的测试规范是GACH+Y.1731分组数据单元(Packet Data Unit，简称为：PDU)，GACH+Y.1731采用了在以太网已经成熟应用的Y.1731OAM标准，用MPLS-TP协议来封装Y.1731PDU，成为国际互联网工程任务组(The Internet Engineering Task Force，简称为：IETF)的正式草案(draft-bhh-mpls-tp-oam-y1731)。在MPLS-TP OAM中，通过DM获取终端设备间链路时延值的原理是，在一定的诊断间隔内，本端MEP定期发送DM报文到对端MEP，并且从对端MEP接收DM报文，从而完成时延值的测量。本发明以下每一个实施例具体为对双向DM测量时延值进行的改进，DM报文包括DMM报文和DMR报文，DMM报文和DMR报文在发送和接收时，由本端MEP或对端MEP的硬件微码对其打时间戳，在本端MEP接收到DMR报文时，该DMR报文中包括的时间戳有RxTimeStampb、TxTimeStampf、TxTimeStampb和RxTimeStampf，如图1所示，为标准Y.1731中定义的DMR报文的示意图，此时，本端MEP可以根据上述时间戳计算得到本端MEP和对端MEP之间的链路时延值，具体计算公式为：时延值＝(RxTimeStampb-TxTimeStampf)-(TxTimeStampb-RxTimeStampf)；以下对图1所示DMR报文中的内容做以说明：
1、MEL为维护实体组(Maintenance Entity Group，简称为：MEG)的等级，即为：MEG level；
2、Version为OAM协议的版本号；
3、OpCode用于标识OAM PDU的类型；
4、Flags表示不同OAM PDU的作用不同；
5、TLV为偏移值，表示OAM PDU中携带TLV的总字节数。
下面通过具体的实施例对本发明的技术方案进行详细说明，本发明以下每一个实施例具体以第一终端设备为测量链路时延值的发起端为例予以示出，通过该第一终端设备作为本端MEP发起双向DM，测量该第一终端设备与第二终端设备、即对端MEP间链路的时延值。本发明提供以下几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
图2为本发明实施例提供的一种时延测量方法的流程图。本实施例提供的时延测量方法适用于在MPLS-TP网络中测量终端设备之间链路时延值的情况中，该方法可以由时延测量装置执行，该时延测量装置通过硬件和软件结合的方式来实现，该装置可以集成在第一终端设备的处理器中，供处理器调用使用。如图2所示，本实施例的方法可以包括：
S110，第一终端设备通过向第二终端设备发起第一双向DM，计算时延测量值，该时延测量值为第一终端设备的芯片到第二终端设备的芯片之间的双向时延值。
如图3所述，为图2所示实施例提供的时延测量方法的一种应用场景示意图。在本实施例中，第一终端设备通过向第二终端设备发起第一双向DM，计算时延测量值包括，第一终端设备向第二终端设备发送DMM报文，当第二终端设备接收到DMM报文时，产生一个DMR报文并将该DMR报文返回给第一终端设备，在具体实现中，第一终端设备发送DMM报文时，通过微码打上DMM报文的发送时间戳，记为chip1send，第二终端设备接收DMM报文时，通过微码打上DMM报文的接收时间戳，记为chip2recv，第二终端设备通过发送DMR报文来回应DMM报文，同样通过微码打上DMR报文的 发送时间戳，记为chip2send，并且该DMR报文中携带上述DMM报文的chip1send和chip2recv，从而第一终端设备接收DMR报文时，通过微码打上DMR报文的接收时间戳，记为chip1recv，此时，第一终端设备可以通过上述时间戳计算出双向DM的时延测量值，也就是第一终端设备与第二终端设备之间链路的时延测量值，该时延测量值Delay1为：
Delay1＝(chip1recv–chip1send)–(chip2send–chip2recv)          (1)
需要说明的是，如图4所示，为图2所示实施例提供的时延测量方法的另一种应用场景示意图，第一终端设备通过发起第一双向DM的目的是希望获取第一终端设备的端口port1到第二终端设备的端口port2之间的链路时延值，该链路的实际时延值Delay为：
Delay＝(port1recv–port1send)–(port2send–port2recv)           (2)
其中，port1recv为端口port1接收到DMR报文的时间，port1send为从端口port1发出DMM报文的时间，port2send为从端口port2发出DMR报文的时间，port2recv为端口port2接收到DMM报文的时间。
通过上述(1)式和(2)式，结合图3和图4可以看出，由于终端设备通过微码对DMM报文或DMR报文打时间戳，是在终端设备的芯片中执行的，即通过(1)式测得的时延测量值实际上是第一终端设备的芯片到第二终端设备的芯片之间的时延值，而该两个终端设备之间链路的时延值是第一终端设备的端口port1到第二终端设备的端口port2之间的时延值，通过相关技术的方式测量终端设备间链路的时延值时，由于报文从芯片到端口需要一定的时间，从而导致通过微码打时间戳存在一定的误差，即无法获得准确的链路时延值。
本发明实施例提出了以下解决方案，即执行完步骤S110后继续执行后续的S120～S130，具体步骤如下说明。
S120，第一终端设备通过向第一终端设备的端口发起第二双向DM，计算第一时延补偿值，该第一时延补偿值为第一终端设备的芯片到第一终端设备的端口之间的时延值。
如图3和图4所示，第一终端设备和第二终端设备端口之间的双向链路 时延值，与第一终端设备和第二终端设备芯片之间的时延值的误差包括：报文从第一终端设备的芯片chip1到端口port1之间的时间t1和报文从第二终端设备的芯片chip2到端口port2之间的时间t2，因此，分析得出通过S110计算得到的时延测量值Delay1为：
Delay1＝((port1recv+t1)–(port1send-t1))–((port2send-t2)–(port2recv+t2))，
计算后得到Delay1＝Delay+2(t1+t2)                 (3)
从(3)式中可以看出，通过(1)式计算得到的时延测量值，是链路时延值加上2倍DM报文内部处理耗时，因此，只要获取报文从第一终端设备的芯片chip1到端口port1之间的时间t1和报文从第二终端设备的芯片chip2到端口port2之间的时间t2，就可以计算出第一终端设备的端口port1到第二终端设备的端口port2之间的实际双向链路时延值，即通过t1和t2对时延测量值Delay1进行修正，就可以提高测量时延值的精度。
如图5所示，为图2所示实施例提供的时延测量方法的又一种应用场景示意图。在本实施例中，通过在第一终端设备的芯片chip1和端口port1之间设置端口内环，由第一终端设备向其端口port1发送第二双向DM，可选地，第一终端设备发出DMM报文时，通过微码打上DMM报文的发送时间戳，记为chip1 1send，该DMM报文从芯片chip1到达端口port1后，不出port1，直接通过端口内环由芯片chip1接收，并且通过微码打上DMM报文的接收时间戳，记为chip1 1recv，从而第一终端设备根据上述DMM报文的发送时间戳和接收时间戳可以计算得出第一终端设备的芯片chip1到端口port1之间的时延值t1为：t1＝(chip1 1recv-chip1 1send)/2，记为第一时延补偿值，用于第一终端设备后续计算双向链路时延值。
S130，第一终端设备根据时延测量值和第一时延补偿值计算第一终端设备到第二终端设备之间的双向链路时延值。
图2所示实施例为本发明的一种可能的实现方式，可以认为第二终端设备和第一终端设备是完全相同的，即第二终端设备的芯片chip2到端口port2之间的时延值与上述第一时延补偿值t1相同，因此，根据S110中得到的时延测量值Delay1和S120中得到的第一时延补偿值t1可以计算出第一终端设备的端口port1到第二终端设备的端口port2之间的双向链路时延值，该双向链 路时延值Delay包括：Delay＝Delay1-2×2t1。
需要说明的是，本实施例中的第一终端设备作为第一双向DM的发起者，即是双向链路时延值的测量者，在获取与第二终端设备间的时延测量值后，再次发起第二DM以获取第一终端设备的芯片与端口之间的第一时延补偿值，从而通过该第一时延补偿值对时延测量值进行修正，可以获取准确度较高的双向链路时延值。
本实施例所提供的时延测量方法，第一终端设备通过向第二终端设备发起第一双向DM，计算出该两个终端设备芯片之间的时延测量值，并且通过向第一终端设备的端口发起第二双向DM，计算第一终端设备的芯片到端口之间的第一时延补偿值，从而通过该第一时延补偿值对时延测量值进行修正，以获取第一终端设备与第二终端设备之间的链路时延值；本实施例提供的方法提高了测得的双向链路时延值的精度。
可选地，图6为本发明实施例提供的另一种时延测量方法的流程图。在本发明的另一种可能的实现方式中，为了进一步提高计算链路时延值的准确性，在上述图2所示实施例的基础上，本实施例提供的方法在S130之前还包括：S121，第一终端设备接收第二终端设备发送的第二时延补偿值，该第二时延补偿值为第二终端设备的芯片到第二终端设备的端口之间的时延值。需要说明的是，第二终端设备获取第二时延补偿值的方式与第一终端设备获取第一时延补偿值的方式相同，都是通过在终端设备的芯片与端口之间设置端口内环，并发起从芯片到端口的双向DM以获取时延补偿值，故在此不再赘述。
相应地，本实施例中的S130可以替换为：第一终端设备根据时延测量值、第一时延补偿值和第二时延补偿值，计算该第一终端设备的端口到第二终端设备的端口之间的双向链路时延值；同样通过上述(3)式对时延测量值进行修正，该双向链路时延值Delay具体为：Delay＝Delay1-2×(t1+t2)。
需要说明的是，本发明上述每一个实施例中的第一时延补偿值可以为对第一终端设备的芯片chip1到端口port1之间的时延值进行多次测量所得到的测量值的平均值，类似地，第二时延补偿值同样可以为对第二终端设备的芯片chip2到端口port2之间的时延值进行多次测量所得到的测量值的平均值。 通过终端设备的芯片到端口之间时延值的平均值对S110中得到的时延测量值进行修正，可以进一步提高最终计算出的链路时延值的准确性。
还需要说明的是，本发明上述图2和图6所示实施例，均由图3到图5所示应用场景中的第一终端设备执行时延测量，在具体实现中，同样可以由图3到图5所示应用场景中的第二终端设备执行时延测量，具体则由第二终端设备向第一终端设备发起双向DM，并通过其自身的端口内环后发起双向DM来获取第二时延补偿值，具体实现方式与上述实施例相同，故在此不再赘述。
本发明实施例还提出了一种计算机可读存储介质，存储有计算机可执行指令，计算机可执行指令用于执行上述描述的任意一个方法。
图7为本发明实施例提供的一种时延测量装置的结构示意图。本实施例提供的时延测量装置适用于在MPLS-TP网络中测量终端设备之间链路时延值的情况中，该时延测量装置通过硬件和软件结合的方式来实现，可以设置于图3到图5所示应用场景的第一终端设备中。如图7所示，本实施例的时延测量装置包括：时延测量模块11、补偿测量模块12和时延纠正模块13。
其中，时延测量模块11，设置为通过向第二终端设备发起第一双向DM，测量时延测量值，该时延测量值为第一终端设备的芯片到第二终端设备的芯片之间的双向时延值。
本实施例中时延测量值的测量方式和公式与上述图2所示实施例中具体方式相同，可以通过(1)式计算得出，故在此不再赘述，并且通过该时延测量模块11计算出的时延测量值与第一终端设备和第二终端设备端口之间的双向链路时延值存在一定的误差。
补偿测量模块12，设置为通过向第一终端设备的端口发起第二双向DM，计算第一时延补偿值，该第一时延补偿值为第一终端设备的芯片到第一终端设备的端口之间的时延值。
时延纠正模块13，设置为根据时延测量模块11测得的时延测量值和补偿测量模块12测得的第一时延补偿值，计算第一终端设备到第二终端设备之间的双向链路时延值。
可选地，可以认为本实施例中的第二终端设备和第一终端设备是完全相 同的，即第二终端设备的芯片到端口之间的时延值与上述补偿测量模块12测得的第一时延补偿值相同；则本实施例中时延纠正模块13是设置为采用以下方式实现根据时延测量模块11测得的时延测量值和补偿测量模块12测得的第一时延补偿值，计算第一终端设备到第二终端设备之间的双向链路时延值：按照公式Delay＝Delay1-2×2t1计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值Delay，其中，所述Delay1为时延测量模块11测得时延测量值，t1为补偿测量模块12测得的第一时延补偿值。
需要说明的是，本实施例中的第一终端设备作为第一双向DM的发起者，设置有本实施例提供的时延测量装置，在获取与第二终端设备间的时延测量值后，再次发起第二DM以获取第一终端设备的芯片与端口之间的第一时延补偿值，从而通过该第一时延补偿值对时延测量值进行修正，可以获取准确度较高的链路时延值。
图8为本发明实施例提供的另一种时延测量装置的结构示意图。本实施例同样可以参照上述图5所示应用场景，在上述图7所示实施例的基础上，第一终端设备的芯片和端口之间同样设置有端口内环，补偿测量模块12可以包括：获取单元14，设置为通过端口内环向第一终端设备的端口发起第二双向DM，获取DMM报文的发送时间戳和接收时间戳；计算单元15，设置为按照公式t1＝(chip1 1recv-chip1 1send)/2计算第一时延补偿值t1，其中，chip1 1recv为DMM的接收时间戳，chip1 1send为DMM报文的发送时间戳。
本发明实施例提供的时延测量装置用于执行本发明图1所示实施例提供的时延测量方法，具备相应的功能模块，其实现原理和技术效果类似，此处不再赘述。
可选地，在本发明的另一种可能的实现方式中，为了进一步提高计算链路时延值的准确性，在上述图8所示实施例的基础上，本实施例提供的装置还包括：接收模块16，设置为在时延纠正模块13计算第一终端设备第二终端设备之间的双向链路时延值之前，接收第二终端设备发送的第二时延补偿值，第二时延补偿值为第二终端设备的芯片到第二终端设备的端口之间的时延值；相应地，时延纠正模块13是设置为采用以下方式实现根据时延测量模块11测得的时延测量值和补偿测量模块12测得的第一时延补偿值，计算第 一终端设备到第二终端设备之间的双向链路时延值：根据时延测量模块11计算的时延测量值，补偿测量模块12计算的第一时延补偿值和接收模块16接收的第二时延补偿值，计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值。
时延纠正模块13是设置为按照公式Delay＝Delay1-2(t1+t2)计算第一终端设备的端口到第二终端设备的端口之间的双向链路时延值，其中，Delay1为时延测量值，t1为第一时延补偿值，t2为第二时延补偿值。
本发明实施例提供的时延测量装置用于执行本发明图6所示实施例提供的时延测量方法，具备相应的功能模块，其实现原理和技术效果类似，此处不再赘述。
需要说明的是，本发明上述每一个实施例中的第一时延补偿值可以为对第一终端设备的芯片到端口之间的时延值进行多次测量所得到的测量值的平均值，类似地，第二时延补偿值同样可以为对第二终端设备的芯片到端口之间的时延值进行多次测量所得到的测量值的平均值。通过终端设备的芯片到端口之间时延值的平均值对时延测量模块11测得的时延测量值进行修正，可以进一步提高最终计算出的链路时延值的准确性。
还需要说明的是，本发明上述图7和图8所示时延测量装置，同样可以设置于执行图3到图5所示应用场景的第二终端设备中，相应地由第二终端设备执行时延测量，具体则由第二终端设备向第一终端设备发起双向DM，并通过其自身的端口内环后发起双向DM来获取第二时延补偿值，具体实现方式与上述实施例相同，故在此不再赘述。
本领域普通技术人员可以理解上述方法中的全部或部分步骤可通过程序来指令相关硬件(例如处理器)完成，所述程序可以存储于计算机可读存储介质中，如只读存储器、磁盘或光盘等。可选地，上述实施例的全部或部分步骤也可以使用一个或多个集成电路来实现。相应地，上述实施例中的各模块/单元可以采用硬件的形式实现，例如通过集成电路来实现其相应功能， 也可以采用软件功能模块的形式实现，例如通过处理器执行存储与存储器中的程序/指令来实现其相应功能。本发明不限于任何特定形式的硬件和软件的结合。
虽然本发明所揭露的实施方式如上，但所述的内容仅为便于理解本发明而采用的实施方式，并非用以限定本发明。任何本发明所属领域内的技术人员，在不脱离本发明所揭露的精神和范围的前提下，可以在实施的形式及细节上进行任何的修改与变化，但本发明的专利保护范围，仍须以所附的权利要求书所界定的范围为准。
工业实用性
上述技术方案提高了测得的链路时延值的精度。

Claims (13)

  1. 一种时延测量方法，包括：
    第一终端设备通过向第二终端设备发起第一双向时延测量DM，计算时延测量值，所述时延测量值为所述第一终端设备的芯片到所述第二终端设备的芯片之间的双向时延值；
    所述第一终端设备通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，所述第一时延补偿值为所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值；
    所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值。
  2. 根据权利要求1所述的时延测量方法，其中，所述第一终端设备的芯片和端口之间设置有端口内环，所述第一终端设备通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，包括：
    所述第一终端设备通过所述端口内环向所述第一终端设备的端口发起第二双向DM，获取时延测量消息DMM报文的发送时间戳和接收时间戳；
    所述第一终端设备按照公式t1＝(chip11recv-chip11send)/2计算所述第一时延补偿值t1，
    其中，所述chip11recv为所述DMM报文的接收时间戳，所述chip11send为所述DMM报文的发送时间戳。
  3. 根据权利要求1所述的时延测量方法，其中，所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值与所述第一时延补偿值相同；所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值，包括：
    所述第一终端设备按照公式Delay＝Delay1-2×2t1计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值Delay；
    其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值。
  4. 根据权利要求1所述的时延测量方法，所述第一终端设备计算所述第一终端设备到所述第二终端设备之间的双向链路时延值之前，还包括：
    所述第一终端设备接收所述第二终端设备发送的第二时延补偿值，所述第二时延补偿值为所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值；
    所述第一终端设备根据所述时延测量值和所述第一时延补偿值计算所述第一终端设备到所述第二终端设备之间的双向链路时延值，包括：
    所述第一终端设备根据所述时延测量值、所述第一时延补偿值和所述第二时延补偿值，计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值。
  5. 根据权利要求4所述的时延测量方法，其中，第一终端设备根据所述时延测量值、所述第一时延补偿值和所述第二时延补偿值，计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值包括：
    所述第一终端设备按照公式Delay＝Delay1-2(t1+t2)计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值；
    其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值，所述t2为所述第二时延补偿值。
  6. 根据权利要求4所述的时延测量方法，其中，所述第一时延补偿值为对所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值，和/或，
    所述第二时延补偿值为对所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值。
  7. 一种时延测量装置，所述时延测量装置设置于第一终端设备中，所述装置包括：
    时延测量模块，设置为通过向第二终端设备发起第一双向时延测量DM，测量时延测量值，所述时延测量值为所述第一终端设备的芯片到所述第二终端设备的芯片之间的双向时延值；
    补偿测量模块，设置为通过向所述第一终端设备的端口发起第二双向DM，计算第一时延补偿值，所述第一时延补偿值为所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值；
    时延纠正模块，设置为根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值。
  8. 根据权利要求7所述的时延测量装置，其中，所述第一终端设备的芯片和端口之间设置有端口内环，所述补偿测量模块包括：获取单元，设置为通过所述端口内环向所述第一终端设备的端口发起第二双向DM，获取时延测量消息DMM报文的发送时间戳和接收时间戳；
    计算单元，设置为按照公式t1＝(chip11recv-chip11send)/2计算所述第一时延补偿值t1；
    其中，所述chip11recv为所述DMM的接收时间戳，所述chip11send为所述DMM报文的发送时间戳。
  9. 根据权利要求7所述的时延测量装置，其中，所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值与所述第一时延补偿值相同；所述时延纠正模块是设置为采用以下方式实现根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值：
    按照公式Delay＝Delay1-2×2t1计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值Delay；
    其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值。
  10. 根据权利要求7所述的时延测量装置，所述装置还包括：接收模块，设置为在所述时延纠正模块计算所述第一终端设备到所述第二终端设备之间的链路时延值之前，接收所述第二终端设备发送的第二时延补偿值，所述第二时延补偿值为所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值；
    所述时延纠正模块是设置为采用以下方式实现根据所述时延测量模块测得的时延测量值和所述补偿测量模块测得的第一时延补偿值，计算所述第一终端设备到所述第二终端设备之间的双向链路时延值：根据所述时延测量模块计算的时延测量值，所述补偿测量模块计算的第一时延补偿值和所述接收 模块接收的第二时延补偿值，计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值。
  11. 根据权利要求10所述的时延测量装置，其中，所述时延纠正模块是设置为：
    按照公式Delay＝Delay1-2(t1+t2)计算所述第一终端设备的端口到所述第二终端设备的端口之间的双向链路时延值Delay；
    其中，所述Delay1为所述时延测量值，所述t1为所述第一时延补偿值，所述t2为所述第二时延补偿值。
  12. 根据权利要求10所述的时延测量装置，其中，所述第一时延补偿值为对所述第一终端设备的芯片到所述第一终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值，和/或，
    所述第二时延补偿值为对所述第二终端设备的芯片到所述第二终端设备的端口之间的时延值进行多次测量所得到的测量值的平均值。
  13. 一种计算机可读存储介质，存储有计算机可执行指令，计算机可执行指令用于执行权利要求1～6任意一项所述的方法。
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