WO2016165311A1 - 电容感应系统及其信号调整方法、电容触摸屏终端 - Google Patents
电容感应系统及其信号调整方法、电容触摸屏终端 Download PDFInfo
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/044—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means by capacitive means
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
- G06F3/04166—Details of scanning methods, e.g. sampling time, grouping of sub areas or time sharing with display driving
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- the invention belongs to the field of capacitive sensing technology, and in particular relates to an array capacitive sensing system, a signal adjusting method thereof and a capacitive touch screen terminal.
- the structure of the existing capacitive sensing system is as shown in FIG. 1.
- the principle is that the carrier signal V generated by the carrier signal generator is formed into a driving signal array F through an inverter and a multiplexer, and is driven by the driving signal array F.
- Capacitor array C ie, C 0 , C 1 , C N , etc. in Figure 1
- the central processing unit calculates the capacitance value of the capacitor array through inverse matrix operation. (electrostatic capacity).
- the sensing signal corresponding to the capacitor array C is defined as S(s 0 ⁇ s N ), and the capacitance of each capacitor in the capacitor array C is C (c 0 ⁇ c N ), and the carrier signal is F (f 0 ⁇ f N ).
- the sensing signal S When the value of
- the first technical problem to be solved by the present invention is to provide a method for adjusting a capacitance sensing signal, which aims to effectively reduce the voltage corresponding to the sensing signal and ensure that the converted digital capacitance sensing signal is not distorted.
- the present invention is implemented in such a manner that a method of adjusting a capacitance sensing signal includes the following steps:
- the driving signal adjusting step multiplying the positive voltage value in the driving signal array by the first factor, multiplying the negative voltage value in the driving signal array by the second factor, to obtain an adjusted driving signal array;
- Capacitor array driving step driving the capacitor array according to the adjusted driving signal array to obtain the adjusted capacitance sensing signal
- Electrostatic capacity calculation step calculating the electrostatic capacitance of the capacitor array according to the adjusted capacitance sensing signal.
- a driving signal generator configured to multiply the carrier signal by a first factor, and multiply the inverted carrier signal by a second factor to obtain an array of driving signals
- An array of capacitors coupled to the drive signal generator for generating an analog capacitive sensing signal driven by the array of drive signals
- An analog-to-digital converter coupled to the capacitor array for converting the analog capacitive sensing signal into a digital capacitive sensing signal
- a central processing unit coupled to the analog to digital converter for calculating an electrostatic capacitance of the capacitor array according to the digital capacitance sensing signal.
- a third technical problem to be solved by the present invention is to provide a capacitive touch screen terminal comprising the capacitive sensing system as described above.
- the capacitive sensing system provided by the present invention multiplies the positive voltage and the negative voltage by different adjustment factors before sending the drive signal array, and the amplitude of the digital capacitance sensing signal is reduced compared with the original mode. It can effectively reduce the dynamic range of the induced voltage and ensure that the analog-to-digital converted data is not distorted.
- FIG. 1 is a schematic structural diagram of a capacitance sensing system provided by the prior art.
- FIG. 2 is a schematic structural diagram of a capacitance sensing system according to Embodiment 1 of the present invention.
- FIG. 3 is a flowchart of a method for adjusting a capacitance sensing signal according to Embodiment 2 of the present invention.
- FIG. 4 is a flowchart of an adjustment factor generation step according to Embodiment 2 of the present invention.
- FIG. 2 shows the structural principle of the capacitive sensing system according to the first embodiment of the present invention. For the convenience of description, only parts related to the embodiment of the present invention are shown.
- Each of the devices may be implemented by a software unit, a hardware unit, or a combination of hardware and software.
- This capacitive sensing system can be built into a capacitive touch screen terminal.
- the capacitance sensing system includes a carrier signal generator 1, an inverter 2, a first multiplier 3, a second multiplier 4, a multiplexer 5, a capacitance array C 0 -C N , and an analog to digital conversion. 6.
- the carrier signal generator 1 is connected to the input terminal of the inverter 2, the carrier signal generator 1 is also connected to the first input terminal of the first multiplier 3, and the output terminal of the inverter 2 Connected to the first input of the second multiplier 4, the second input of the first multiplier 3 and the second input of the second multiplier 4 are both connected to the central processing unit 7, and the central processing unit 7 is also multiplexed
- the multiplexer 5 is connected, and the output of the first multiplier 3 and the output of the second multiplier 4 are connected to the multiplexer 5, and the multiplexer 5 has a plurality of drive signal outputs, and each drive signal output end of the capacitor array and a first end of the C 0 -C N is correspondingly connected, the second capacitor C 0 -C array terminal N are connected to the input of the analog to digital converter 6, is connected to the output terminal of the AD converter 6 To the central processing unit 7.
- the carrier signal generator 1 is configured to generate a carrier signal, represented by a positive voltage value, the carrier signal is multiplied by the first factor q in the first multiplier 3, and the carrier signal is output to the inverter 2 for inversion processing.
- the inverted carrier signal is multiplied by the second factor p in the second multiplier 4, represented by a negative voltage value.
- the carrier signal is adjusted by the first multiplier 3 and the second multiplier 4 and output to the multiplexer 5.
- the multiplexer 5 switches and gates between the carrier signal and the inverted carrier signal to generate a plurality of An array of driving signals (f 0 to f N ) of a positive voltage value and a negative voltage value, and an array of capacitors C 0 -C N is driven by an array of driving signals (f 0 to f N ) to generate an analog capacitive sensing signal (S 0 to S N ), the analog capacitance sensing signals (S 0 to S N ) are converted into a digital format by the analog-to-digital converter 6.
- the central processing unit 7 When detecting that the digital capacitance sensing signal is saturated, the central processing unit 7 detects the number of positive voltage values and negative voltage values in the driving signal array, and generates a first factor q and a corresponding to the positive voltage according to the detection result. The second factor p corresponding to the negative voltage. In this way, a feedback loop is formed to constantly adjust the dynamic range of the digital capacitive sensing signal voltage to ensure that the data is not distorted.
- the central processing unit 7 first detects the number Q of positive voltage values and the number P of negative voltage values in the array of driving signals when the digital capacitance sensing signal is saturated, and then determines between P and Q. The size relationship, and then the first factor q and the second factor p are generated according to the judgment result. Specifically, when it is determined that P>Q, the second factor p takes a value greater than 0, less than 1 and not equal to Q/P; when it is determined that P ⁇ Q, the first factor q takes greater than 0, less than 1 and not Equal to the value of P/Q, the second factor p takes 1.
- the third step is to calculate S':
- the capacitive sensing system provided by the embodiment of the present invention multiplies the positive voltage and the negative voltage by different adjustment factors before sending the array of driving signals, and the amplitude of the digital capacitive sensing signal is reduced compared with the original mode. Small, it can effectively reduce the dynamic range of the induced voltage, ensuring that the analog-to-digital converted data is not distorted.
- Embodiment 2 of the present invention further provides an adjustment method of an array type capacitive sensing signal. It should be understood that the adjustment method can be applied to the structure of the capacitive sensing system shown in FIG. 2, and can also be applied to other forms of system structures. Referring to FIG. 3, the adjustment method includes the following steps:
- the adjustment factor generating step is: detecting the number of positive voltage values and negative voltage values in the driving signal array, and generating a first factor corresponding to the positive voltage and a second factor corresponding to the negative voltage according to the detection result.
- this step specifically includes a positive/negative voltage number detecting step S311: detecting the number Q of positive voltage values and the number of negative voltage values in the array of driving signals when the capacitive sensing signal is saturated; S312: determining a size relationship between P and Q; generating step S313: generating, according to the determination result, a first factor q corresponding to the positive voltage and a second factor p corresponding to the negative voltage, wherein the first factor and the second factor The generation is as described above and will not be described here.
- the driving signal adjusting step multiplying the positive voltage value in the driving signal array by the first factor, multiplying the negative voltage value in the driving signal array by the second factor, and obtaining an adjusted driving signal array.
- the capacitor array driving step driving the capacitor array according to the adjusted driving signal array, and obtaining the adjusted capacitance sensing signal.
- the electrostatic capacity calculation step calculating the electrostatic capacitance of the capacitor array according to the adjusted capacitance sensing signal.
- the method for adjusting the capacitance sensing signal multiplies the positive voltage and the negative voltage in the original driving signal array by different adjustment factors, and the amplitude of the capacitance sensing signal is reduced compared with the original method. It can effectively reduce the dynamic range of the induced voltage and ensure that the data after analog-to-digital conversion is not distorted.
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Abstract
本发明适用于电容感应技术领域,提供了一种电容感应系统及其信号调整方法、电容触摸屏终端。所述调整方法包括下述步骤:将驱动信号数组中的正性电压值与第一因子相乘,将驱动信号数组中的负性电压值与第二因子相乘,得到调整后的驱动信号数组;根据调整后的驱动信号数组驱动电容数组,得到调整后的电容感应信号;根据调整后的电容感应信号计算电容数组的静电容量。本发明中,电容感应系统在送出驱动信号数组之前,将其中的正性电压和负性电压分别乘上不同的调整因子,与原有方式相比,数字电容感应信号的振幅得到减小,可有效缩小感应电压的动态范围,确保模数转换后的数据不会失真。
Description
本发明属于电容感应技术领域,尤其涉及一种数组式电容感应系统及其信号调整方法、电容触摸屏终端。
现有的电容感应系统的结构如图1所示,其原理是将载波信号发生器产生的载波信号V经过反相器与多路复用器形成驱动信号数组F,由该驱动信号数组F驱动电容数组C(即图1中的C0、C1、CN等),经过模数转换器,得到数字电容感应信号,最后由中央处理单元通过反矩阵运算,可计算出电容数组的电容值(静电容量)。
定义电容数组C对应的感应信号为S(s0~sN),电容数组C中各电容器的静电容量为C(c0~cN),载波信号为F(f0~fN),则有:
S=F*C
S*F-1=F*C*F-1
S*F-1=C
当|∑F|的值越大时,感应信号S也会跟着变大,若超过后续模数转换器可解析的电压范围,转换后的数字电容感应信号会产生饱和现象,造成误判,导致中央处理单元运算错误。
发明内容
本发明所要解决的第一个技术问题在于提供一种电容感应信号的调整方法,旨在有效降低感应信号所对应的电压,确保转换后的数字电容感应信号不会失真。
本发明是这样实现的,一种电容感应信号的调整方法,所述调整方法包括下述步骤:
驱动信号调整步骤:将驱动信号数组中的正性电压值与第一因子相乘,将驱动信号数组中的负性电压值与第二因子相乘,得到调整后的驱动信号数组;
电容数组驱动步骤:根据所述调整后的驱动信号数组驱动电容数组,得到调整后的电容感应信号;
静电容量运算步骤:根据所述调整后的电容感应信号计算电容数组的静电容量。
本发明所要解决的第二个技术问题在于提供一种电容感应系统,包括:
驱动信号发生器,用于通过载波信号与第一因子相乘,反相后的载波信号与第二因子相乘,得到驱动信号数组;
电容数组,与所述驱动信号发生器连接,用于在所述驱动信号数组的驱动下产生模拟电容感应信号;
模数转换器,与所述电容数组连接,用于将所述模拟电容感应信号转换成数字电容感应信号;
中央处理单元,与所述模数转换器连接,用于根据所述数字电容感应信号计算所述电容数组的静电容量。
本发明所要解决的第三个技术问题在于提供一种电容触摸屏终端,其包括如上所述的电容感应系统。
本发明所提供的电容感应系统在送出驱动信号数组之前,将其中的正性电压和负性电压分别乘上不同的调整因子,与原有方式相比,数字电容感应信号的振幅得到减小,可有效缩小感应电压的动态范围,确保模数转换后的数据不会失真。
图1是现有技术提供的电容感应系统的结构原理图。
图2是本发明实施例一提供的电容感应系统的结构原理图。
图3是本发明实施例二提供的电容感应信号的调整方法的流程图。
图4是本发明实施例二提供的调整因子生成步骤的流程图。
为了使本发明的目的、技术方案及优点更加清楚明白,以下结合附图及实施例,对本发明进行进一步详细说明。应当理解,此处所描述的具体实施例仅仅用以解释本发明,并不用于限定本发明。
图2示出了本发明实施例一提供的电容感应系统的结构原理,为了便于描述,仅示出了与本发明实施例相关的部分。其中各器件可以是通过软件单元、硬件单元或软硬件结合的单元来实现。此电容感应系统可内置于电容触摸屏终端中。
参照图2,该电容感应系统包括载波信号发生器1、反相器2、第一乘法器3、第二乘法器4、多路复用器5、电容数组C0-CN、模数转换器6、中央处理单元7。各器件之间的连接关系如下:载波信号发生器1与反相器2的输入端连接,载波信号发生器1还与第一乘法器3的第一输入端连接,反相器2的输出端与第二乘法器4的第一输入端连接,第一乘法器3的第二输入端和第二乘法器4的第二输入端均与中央处理单元7连接,中央处理单元7还与多路复用器5连接,第一乘法器3的输出端和第二乘法器4的输出端均连接多路复用器5,多路复用器5具有多个驱动信号输出端,各驱动信号输出端与电容数组C0-CN的第一端一一对应连接,电容数组C0-CN的第二端均连接至模数转换器6的输入端,模数转换器6的输出端连接至中央处理单元7。
载波信号发生器1用于产生载波信号,以正性电压值表示,该载波信号在
第一乘法器3中与第一因子q相乘,同时该载波信号输出至反相器2作反相处理,以负性电压值表示,经反相后的载波信号在第二乘法器4中与第二因子p相乘。载波信号经第一乘法器3、第二乘法器4调整后输出至多路复用器5,多路复用器5在载波信号和反相后的载波信号之间切换、选通,生成包含多个正性电压值和负性电压值的驱动信号数组(f0~fN),电容数组C0-CN在驱动信号数组(f0~fN)的驱动下产生模拟电容感应信号(S0~SN),模拟电容感应信号(S0~SN)经模数转换器6转换为数字格式。
中央处理单元7在检测到数字电容感应信号饱和时,检测驱动信号数组中具有正性电压值和负性电压值的个数,并根据检测结果生成与正性电压对应的第一因子q和与负性电压对应的第二因子p。以此形成反馈回路,不断调整数字电容感应信号电压的动态范围,确保数据不失真。
作为本发明的一个实施例,中央处理单元7首先在数字电容感应信号饱和时,检测驱动信号数组中正性电压值的个数Q和负性电压值的个数P,然后判断P、Q之间的大小关系,再根据判断结果生成第一因子q和第二因子p。具体为,在判断出P>Q时,第二因子p取大于0、小于1且不等于Q/P的值;在判断出P<Q时,第一因子q取大于0、小于1且不等于P/Q的值,第二因子p取1。
下文通过一实施例来论证本发明的可行性。
第一步,计算F内正性电压、负性电压的个数得:
P=6,Q=3
P>Q,则有:
第二步,p设定为0.45,q设定为1,待入F得:
第三步,计算S′得:
S′<S………故得证。
本发明实施例所提供的电容感应系统在送出驱动信号数组之前,将其中的正性电压和负性电压分别乘上不同的调整因子,与原有方式相比,数字电容感应信号的振幅得到减小,可有效缩小感应电压的动态范围,确保模数转换后的数据不会失真。
本发明实施例二还提供了一种数组式电容感应信号的调整方法,应当理解,此调整方法可应用于图2所示的电容感应系统结构,还可用于其他形式的系统结构。请参照图3,该调整方法包括下述步骤:
S31,调整因子生成步骤:检测驱动信号数组中正性电压值和负性电压值的个数,并根据检测结果生成与正性电压对应的第一因子和与负性电压对应的第二因子。
进一步参照图4,此步骤具体包括正负性电压个数检测步骤S311:在电容感应信号饱和时,检测驱动信号数组中正性电压值的个数Q和负性电压值的个数P;判断步骤S312:判断P、Q之间的大小关系;生成步骤S313:根据判断结果生成与正性电压对应的第一因子q和与负性电压对应的第二因子p,其中第一因子和第二因子的生成如上文所述,此处不再赘述。
S32,驱动信号调整步骤:将驱动信号数组中的正性电压值与第一因子相乘,将驱动信号数组中的负性电压值与第二因子相乘,得到调整后的驱动信号数组。
S33,电容数组驱动步骤:根据调整后的驱动信号数组驱动电容数组,得到调整后的电容感应信号。
S34,静电容量运算步骤:根据调整后的电容感应信号计算电容数组的静电容量。
本发明实施例所提供的电容感应信号的调整方法将原有的驱动信号数组中正性电压和负性电压分别乘上不同的调整因子,与原有方式相比,电容感应信号的振幅得到减小,可有效缩小感应电压的动态范围,确保模数转换后的数据不会失真。
以上所述仅为本发明的较佳实施例而已,并不用以限制本发明,凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等,均应包含在本发明的保护范围之内。
Claims (9)
- 一种电容感应信号的调整方法,其特征在于,所述调整方法包括下述步骤:驱动信号调整步骤:将驱动信号数组中的正性电压值与第一因子相乘,将驱动信号数组中的负性电压值与第二因子相乘,得到调整后的驱动信号数组;电容数组驱动步骤:根据所述调整后的驱动信号数组驱动电容数组,得到调整后的电容感应信号;静电容量运算步骤:根据所述调整后的电容感应信号计算电容数组的静电容量。
- 如权利要求1所述的调整方法,其特征在于,在所述驱动信号调整步骤之前,还包括调整因子生成步骤,所述调整因子生成步骤具体包括下述步骤:正负性电压个数检测步骤:在电容感应信号饱和时,检测驱动信号数组中正性电压值的个数Q和负性电压值的个数P;判断步骤:判断P、Q之间的大小关系;生成步骤:根据判断结果生成与正性电压对应的第一因子q和与负性电压对应的第二因子p。
- 如权利要求2所述的调整方法,其特征在于,所述生成步骤具体为:若P>Q,则第二因子p取大于0、小于1且不等于Q/P的值,第一因子q取1;若P<Q,则第一因子q取大于0、小于1且不等于P/Q的值,第二因子p取1。
- 一种电容感应系统,其特征在于,包括:驱动信号发生器,用于通过载波信号与第一因子相乘,反相后的载波信号与第二因子相乘,得到驱动信号数组;电容数组,与所述驱动信号发生器连接,用于在所述驱动信号数组的驱动下产生模拟电容感应信号;模数转换器,与所述电容数组连接,用于将所述模拟电容感应信号转换成数字电容感应信号;中央处理单元,与所述模数转换器连接,用于根据所述数字电容感应信号计算所述电容数组的静电容量。
- 如权利要求4所述的电容感应系统,其特征在于,所述驱动信号发生器包括:载波信号发生器,用于产生载波信号,以正性电压值表示;反相器,其输入端与所述载波信号发生器连接,用于对所述载波信号进行反相处理,以负性电压值表示;第一乘法器,其第一输入端与所述载波信号发生器连接,第二输入端接收第一因子q,用于将所述正性电压值与所述第一因子q相乘,q大于0且小于1;第二乘法器,其第一输入端与所述反相器的输出端连接,第二输入端接收第二因子p,用于将所述负性电压值与第二因子p相乘,p大于0且小于1;多路复用器,其同时连接所述第一乘法器的输出端和第二乘法器的输出端,用于在所述正性电压值和所述负性电压值之间切换,生成驱动信号数组。
- 如权利要求5所述的电容感应系统,其特征在于,所述中央处理单元与所述多路复用器、所述第一乘法器的第二输入端和所述第二乘法器的第二输入端连接,还用于在检测到所述数字电容感应信号饱和时,检测所述驱动信号数组中正性电压值和负性电压值的个数,并根据检测结果生成新的第一因子和第二因子。
- 如权利要求6所述的电容感应系统,其特征在于,所述中央处理单元用于在所述数字电容感应信号饱和时,检测所述驱动信号数组中正性电压值的个数Q和负性电压值的个数P;判断P、Q之间的大小关系;根据判断结果生成与正性电压对应的第一因子q和与负性电压对应的第二 因子p。
- 如权利要求7所述的电容感应系统,其特征在于,所述中央处理单元在判断出P>Q时,第二因子p取大于0、小于1且不等于Q/P的值;在判断出P<Q时,第一因子q取大于0、小于1且不等于P/Q的值,第二因子p取1。
- 一种电容触摸屏终端,其特征在于,包括如权利要求4~8任一项所述的电容感应系统。
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