WO2016158906A1 - Solar cell and method for manufacturing solar cell - Google Patents

Solar cell and method for manufacturing solar cell Download PDF

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Publication number
WO2016158906A1
WO2016158906A1 PCT/JP2016/060029 JP2016060029W WO2016158906A1 WO 2016158906 A1 WO2016158906 A1 WO 2016158906A1 JP 2016060029 W JP2016060029 W JP 2016060029W WO 2016158906 A1 WO2016158906 A1 WO 2016158906A1
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solar cell
layer
type semiconductor
semiconductor layer
manufacturing
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PCT/JP2016/060029
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French (fr)
Japanese (ja)
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小椋 厚志
ヒュンジュ リー
知京 豊裕
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国立研究開発法人物質・材料研究機構
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Publication of WO2016158906A1 publication Critical patent/WO2016158906A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier
    • H01L31/068Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by at least one potential-jump barrier or surface barrier the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells

Definitions

  • the present invention relates to a solar cell including a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, and a method for manufacturing the solar cell.
  • Solar cells are widely desired to be used from the viewpoint of effectively using sunlight as an energy source.
  • a solar cell is a semiconductor element that converts light energy of sunlight into electrical energy. When sunlight is incident on the solar cell, electron-hole pairs are generated in the solar cell. Electron / hole pairs generated by the light energy of sunlight are separated by an electric field in the vicinity of the junction surface between the p-type semiconductor layer and the n-type semiconductor layer, and electrons and holes are captured by different electrodes. An electromotive force is generated between the two electrodes.
  • a passivation layer is generally provided on the surface of the semiconductor layer or between the semiconductor layer and the electrode.
  • the interface state density at the interface between the semiconductor layer and the passivation layer is suppressed to about 5 ⁇ 10 11 / cm 2 eV, the interface recombination rate of charge is suppressed to about 300 cm / s, and charge loss is reduced. It can be kept low.
  • This passivation layer is required to have optical characteristics for efficiently taking incident light into the solar cell. Moreover, the physical property which suppresses the spiking of the electrode installed adjacent is also requested
  • the aluminum oxide layer of the passivation layer is laminated by, for example, atomic layer deposition (ALD: Atomic Layer Deposition), and trimethylaluminum gas having high toxicity and flammability is used. For example, it takes about 20 to 40 minutes to stack an aluminum oxide layer of 20 nm.
  • ALD Atomic Layer Deposition
  • trimethylaluminum gas having high toxicity and flammability is used. For example, it takes about 20 to 40 minutes to stack an aluminum oxide layer of 20 nm.
  • the silicon nitride layer of the passivation layer is laminated by, for example, chemical vapor deposition (CVD: Chemical Vapor Deposition) using plasma, and silane gas having high toxicity and flammability and ammonia gas are used. For example, it takes about 10 to 30 minutes to stack a silicon nitride layer of 50 nm.
  • CVD Chemical Vapor Deposition
  • the lamination of the aluminum oxide layer and the silicon nitride layer needs to be performed independently by separate apparatuses in order to avoid an explosion or contamination due to gas mixing, and the configuration of the manufacturing apparatus becomes complicated.
  • the present invention has been made in consideration of the above problems, and provides a solar cell including a passivation layer that suppresses charge loss at the interface between the p-type semiconductor layer and the passivation layer.
  • the present invention provides a method for manufacturing a solar cell, which enables stacking with a simple device configuration in which this passivation layer can be continuously performed using the same manufacturing apparatus in a shorter time than that using a safe gas.
  • the solar cell of the present invention is a solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, wherein the passivation layer is formed on the p-type semiconductor layer.
  • it has at least a layer in which an aluminum oxide layer and an aluminum nitride layer are stacked in this order.
  • the solar cell includes a silicon oxide layer between the p-type semiconductor layer and the aluminum oxide layer.
  • the aluminum oxide layer has a thickness of 1 nm to 20 nm.
  • the silicon oxide layer has a thickness of 0.5 nm to 2 nm.
  • the aluminum nitride layer has a thickness of 50 nm to 100 nm.
  • the solar cell is characterized in that the maximum interface recombination rate of charges at the interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
  • an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 ⁇ 10 11 / cm 2 eV or less.
  • the p-type semiconductor layer and the n-type semiconductor layer have a crystallinity of single crystal, polycrystal, or amorphous.
  • a part or all of the p-type semiconductor layer and the n-type semiconductor layer are silicon.
  • the method for manufacturing a solar cell according to the present invention is a method for manufacturing a solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, wherein the passivation layer includes: It includes at least a step of stacking and forming an aluminum oxide layer and an aluminum nitride layer in this order on the p-type semiconductor layer.
  • the aluminum oxide layer is formed by any one of a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof.
  • the thickness is 1 nm to 20 nm.
  • a silicon oxide layer is formed between the p-type semiconductor layer and the aluminum oxide layer.
  • the thickness of the silicon oxide layer is 0.5 nm to 2 nm.
  • the aluminum nitride layer is formed by any one of a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof.
  • the thickness is 50 nm to 100 nm.
  • At least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method, and a partial pressure ratio is 10 as a reaction atmosphere for forming the aluminum oxide layer. % To 50% oxygen gas.
  • At least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method, and a partial pressure ratio is 10 as a reaction atmosphere for forming the aluminum nitride layer. % To 70% nitrogen gas.
  • the formation of the aluminum oxide layer and the formation of the aluminum nitride layer are continuously performed in the same hermetic container.
  • the aluminum oxide layer and the aluminum nitride layer are formed by a reactive sputtering method, and the reaction atmosphere includes a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50%.
  • the solar cell is heated after the passivation layer is formed.
  • a maximum interface recombination rate of charges at an interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
  • an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 ⁇ 10 11 / cm 2 eV or less.
  • the solar cell of the present invention there is at least a passivation layer in which an aluminum oxide layer and an aluminum nitride layer are laminated in this order with respect to the p-type semiconductor layer, so that charges at the interface between the p-type semiconductor layer and the passivation layer can be obtained. Loss can be kept low.
  • the manufacturing method of the present invention at least a step of stacking and forming an aluminum oxide layer and an aluminum nitride layer in this order on the p-type semiconductor layer is provided, so that a safe gas can be used and shorter than before. In time, it is possible to manufacture solar cells with a simple device configuration that can be continuously performed by the same manufacturing apparatus.
  • FIG. 1 is an explanatory view showing a cross section of a solar cell 10 according to an embodiment of the present invention.
  • the upper side of FIG. 1 is the front surface, and the lower side is the back surface.
  • the solar cell 10 includes a p-type semiconductor layer 12, an n-type semiconductor layer 14, a passivation layer 16, a silicon nitride layer 22, a front electrode 24, and a back electrode 26.
  • the p-type semiconductor layer 12 is a crystalline semiconductor layer containing charges mainly including holes.
  • boron (B) which is a p-type impurity is included.
  • the p-type impurity is not limited to boron (B).
  • As the p-type semiconductor layer 12 single crystal silicon is used.
  • the thickness of the p-type semiconductor layer 12 is, for example, 0.1 mm to 0.2 mm, and the electric resistivity is 10 ⁇ ⁇ cm to 20 ⁇ ⁇ cm.
  • the n-type semiconductor layer 14 is a crystalline semiconductor layer containing charges mainly composed of electrons.
  • phosphorus (P) which is an n-type impurity is included.
  • the n-type impurity is not limited to phosphorus (P).
  • crystalline silicon is used as the n-type semiconductor layer 14.
  • the thickness of the n-type semiconductor layer 14 is, for example, 0.1 ⁇ m to 0.8 ⁇ m, and the surface resistivity is 80 to 120 ⁇ / sq. Further, the n-type semiconductor layer 14 is formed on the surface of the p-type semiconductor layer 12.
  • the passivation layer 16 includes an aluminum oxide layer 18 and an aluminum nitride layer 20.
  • the passivation layer 16 is formed on the back surface of the p-type semiconductor layer 12.
  • the aluminum oxide layer 18 is a layer having a thickness of 1 nm to 20 nm.
  • the aluminum oxide layer 18 is formed on the back surface of the p-type semiconductor layer 12.
  • the aluminum nitride layer 20 is a layer having a thickness of 50 nm to 100 nm.
  • the aluminum nitride layer 20 is formed on the back surface of the aluminum oxide layer 18.
  • the back surface through-hole 28 is formed in the passivation layer 16 from the back surface to the front surface.
  • the back surface through hole 28 is a hole through which the p-type semiconductor layer 12 is electrically connected to the back surface electrode 26.
  • the silicon nitride layer 22 is a layer having a thickness of 50 nm to 100 nm and has a light transmitting property.
  • the silicon nitride layer 22 is formed on the surface of the n-type semiconductor layer 14. Further, the surface through hole 30 is formed in the silicon nitride layer 22 from the front surface to the back surface.
  • the surface through hole 30 is a hole through which the n-type semiconductor layer 14 is electrically connected to the surface electrode 24.
  • the surface electrode 24 is an electrode formed of metal, and for example, silver is used as the metal.
  • the thickness of the surface electrode 24 is, for example, 5 ⁇ m to 20 ⁇ m.
  • the surface electrode 24 is formed on the surface side of the silicon nitride layer 22.
  • the surface electrode 24 is electrically connected to the n-type semiconductor layer 14 through the surface through hole 30.
  • the back electrode 26 is an electrode formed of metal, and for example, aluminum is used as the metal.
  • the thickness of the back electrode 26 is, for example, 2 ⁇ m to 30 ⁇ m.
  • the back electrode 26 is formed on the back side of the aluminum nitride layer 20.
  • a back surface protrusion 32 is formed for electrical connection with the p-type semiconductor layer 12 through the back surface through hole 28.
  • FIG. 2 is an explanatory diagram of the procedure of the method for manufacturing the solar cell 10 of the present embodiment.
  • step S1 a silicon wafer containing p-type impurities is prepared.
  • the silicon wafer is preliminarily processed (step S2). Specifically, the silicon wafer is immersed in dilute hydrofluoric acid, and the natural oxide film formed on the surface of the silicon wafer is removed. Next, the surface of the silicon wafer is textured by reactive ion etching or anisotropic wet etching. Thereafter, n-type impurities are diffused into the silicon wafer in the depth direction from the surface of the silicon wafer by a thermal diffusion method, whereby the n-type semiconductor layer 14 is formed.
  • the surface of the silicon wafer is textured, and a laminated body in which the n-type semiconductor layer 14 is formed on the surface side of the silicon wafer and the p-type semiconductor layer 12 is formed on the back surface side is obtained.
  • the aluminum oxide layer 18 is laminated on the back surface of the p-type semiconductor layer 12 by reactive sputtering (step S3).
  • an aluminum target is first placed inside an airtight container.
  • the p-type semiconductor layer 12 is placed at a position facing the aluminum target side.
  • a reaction gas composed of argon gas and oxygen gas having a partial pressure ratio of 10% to 50% is filled as 3 mTorr as a reaction atmosphere.
  • an alternating electromagnetic field of 300 W is applied between the aluminum target and the laminate for 0.5 to 11 minutes.
  • an aluminum oxide layer 18 having a thickness of 1 nm to 20 nm is stacked on the back surface of the p-type semiconductor layer 12 (step S3).
  • the aluminum nitride layer 20 is laminated on the back surface of the aluminum oxide layer 18 by reactive sputtering (step S4). Specifically, the reaction gas is once exhausted from the airtight container. Next, the hermetic container is filled with 3 mTorr using a reaction gas composed of argon gas and nitrogen gas having a partial pressure ratio of 10% to 70% as a reaction atmosphere. Further, an alternating electromagnetic field of 300 W is applied between the aluminum target and the laminate for 5 to 10 minutes. As a result, an aluminum nitride layer 20 having a thickness of 50 nm to 100 nm is laminated on the back surface of the aluminum oxide layer 18 (step S4).
  • the silicon nitride layer 22 is deposited on the surface of the n-type semiconductor layer 14 by chemical vapor deposition (step S5).
  • the n-type semiconductor layer 14 of the stacked body is remounted in another gastight container different from the gastight container so as to be in contact with the gas atmosphere.
  • monosilane (SiH 4 ) gas and ammonia (NH 3 ) gas diluted with H 2 gas or He gas to a partial pressure ratio of 1% to 50% are used as raw material gases from 1 Torr to atmospheric pressure. Filled.
  • the laminate is heated at about 350 ° C. for 5 to 10 minutes.
  • the silicon nitride layer 22 having a thickness of 50 nm to 100 nm is stacked on the surface of the n-type semiconductor layer 14 (step S5).
  • an electrode is formed on the laminate (step S6).
  • a pulsed DPSS (Diode-pumped solid state) laser with an output of 8 W and a wavelength of 266 nm is irradiated to form the back surface through hole 28.
  • the back electrode 26 is formed on the back surface of the aluminum nitride layer 20 by screen printing.
  • a surface through hole 30 and a surface electrode 24 are formed on the surface of the silicon nitride layer 22 by a fire-through method. Specifically, an electrode material containing silver that corrodes silicon nitride is printed at a predetermined location where the electrode is formed and heated at 200 ° C. to 800 ° C. for 1 minute to 60 minutes, whereby the surface electrode 24 is formed. It is formed on the surface of silicon nitride layer 22.
  • the front electrode 24 may be formed first.
  • step S7 the laminate on which the front electrode 24 and the back electrode 26 are formed is heated in a nitrogen gas atmosphere at 200 ° C. to 800 ° C. for 1 minute to 60 minutes (step S7).
  • the front surface electrode 24, the back surface electrode 26, the aluminum oxide layer 18, the aluminum nitride layer 20, and the silicon nitride layer 22 are annealed. Density is lowered.
  • the solar cell 10 is obtained by the above manufacturing process.
  • Electron / hole pairs are generated in the n-type semiconductor layer 14 and the p-type semiconductor layer 12 by the light energy of sunlight. Since the surface of the n-type semiconductor layer 14 is textured, the incident sunlight is repeatedly reflected in the n-type semiconductor layer 14 and the p-type semiconductor layer 12. As a result, electron / hole pairs are effectively generated. Electron / hole pairs generated by sunlight are separated by an electric field in the vicinity of the junction surface between the p-type semiconductor layer 12 and the n-type semiconductor layer 14, electrons are moved to the front electrode 24, and the positive holes are transferred to the back electrode. The electromotive force is generated between the front electrode 24 and the back electrode 26.
  • the aluminum nitride layer 20 of the passivation layer 16 prevents the back electrode 26 from being scratched called spiking.
  • the passivation layer 16 provides an electric field passivation effect. Specifically, the electron is moved away from the interface between the passivation layer 16 and the p-type semiconductor layer 12 by the high-density negative fixed charge electric field of the passivation layer 16, and the electrons are separated from the dangling bonds, defects, and interface states at the interface. The rate of loss due to the position is kept low, and the charge loss is kept low.
  • FIG. 3 is a diagram showing the relationship between the thickness of the aluminum nitride layer stacked on the silicon substrate and the fixed charge density of the aluminum nitride layer.
  • the horizontal axis represents the thickness of the aluminum nitride layer (Thickness of AlN x ), and the vertical axis represents the fixed charge density (Q eff ) of the aluminum nitride layer.
  • a white circle plot ( ⁇ ) represents a fixed charge density when measured by sweeping from reverse bias to forward bias in CV measurement.
  • the black circle plot ( ⁇ ) is the fixed charge density when measured by sweeping from forward bias to reverse bias.
  • the sum of the charge density of the fixed charge of the aluminum oxide layer 18 and the charge density of the fixed charge of the aluminum nitride layer 20 on the back surface of the aluminum oxide layer 18 has a negative value.
  • the fixed charge density of the aluminum oxide layer 18 is ⁇ 3.0 ⁇ 10 12 / cm 2 to ⁇ 5.0 ⁇ 10 12 / cm 2 .
  • the fixed charge density of the aluminum nitride layer 20 is 3.0 ⁇ 10 12 / cm 2 or less, the sum of the charge densities becomes a negative value. From FIG.
  • the fixed charge density is 2.0 ⁇ 10 12 / cm 2 or less. That is, if the thickness of the aluminum nitride layer is 50 nm or more, the passivation layer 16 exhibits an electric field passivation effect.
  • FIG. 4 is a diagram showing the relationship between the thickness of the aluminum oxide layer 18 and the maximum interface recombination rate in the solar cell 10 according to the embodiment of the present invention.
  • the horizontal axis represents the thickness (Thickness ⁇ of AlOx) of the aluminum oxide layer 18, and the horizontal axis represents the maximum interface recombination velocity (Smax) at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18.
  • Smax maximum interface recombination velocity
  • the maximum interface recombination rate is constant at 38 cm / s or less, and both are lower than the maximum interface recombination rate of the prior art, about 300 cm / s. This tendency does not change even when the thickness of the aluminum oxide layer 18 is 5 nm or less.
  • the thickness of the aluminum oxide layer 18 is desirably 1 nm or more. Therefore, if the thickness of the aluminum oxide layer 18 is 1 nm to 20 nm, the maximum interface recombination rate is 38 cm / s or less, and charge loss at the interface between the p-type semiconductor layer 12 and the passivation layer 16 can be kept low. .
  • FIG. 5 is a diagram showing the relationship between the partial pressure ratio of nitrogen gas and the interface state density when forming the aluminum nitride layer 20 in the solar cell 10 according to the embodiment of the present invention.
  • the horizontal axis shows the partial pressure ratio of nitrogen gas
  • the vertical axis shows the relationship of the interface state density (D it ) at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18.
  • the partial pressure ratio of the nitrogen gas is changed.
  • the interface state density at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18 is an index of a chemical passivation effect that reduces the density of dangling bonds, defects, and interface states at the interface. It can be kept low.
  • the partial pressure ratio of nitrogen gas was 10% or more, the interface state density was 4 ⁇ 10 11 / cm 2 eV or less.
  • the interface state density at the interface between the p-type semiconductor layer and the aluminum oxide layer is about 5 ⁇ 10 11 / cm 2 eV.
  • the partial pressure ratio of nitrogen gas is 10% to 70%, the interface state density is suppressed to 4 ⁇ 10 11 / cm 2 eV or less, and the chemical passivation effect is about the same or higher than that of the prior art.
  • FIG. 6 is an explanatory diagram showing a cross section of a solar cell 50 according to a modification of the embodiment of the present invention.
  • the solar cell 50 includes a p-type semiconductor layer 52, an n-type semiconductor layer 54, a passivation layer 56, a silicon nitride layer 62, a front electrode 64 and a back electrode 66.
  • the p-type semiconductor layer 52 is basically the same as the p-type semiconductor layer 12 in the solar cell 10, and the same description is omitted.
  • the n-type semiconductor layer 54 is the n-type semiconductor layer 14
  • the passivation layer 56 is the passivation layer 16
  • the silicon nitride layer 62 is the silicon nitride layer 22
  • the surface electrode 64 is the back electrode 26
  • the back electrode 66 is Similar to the surface electrode 24.
  • the p-type semiconductor layer 52 has a thickness of 0.1 ⁇ m to 0.8 ⁇ m, and the n-type semiconductor layer 54 has a thickness of 0.1 mm to 0.2 mm.
  • a p-type semiconductor layer 52 is formed on the surface of the n-type semiconductor layer 54.
  • the passivation layer 56 includes an aluminum oxide layer 58 and an aluminum nitride layer 60.
  • the passivation layer 56 is formed on the surface of the p-type semiconductor layer 52.
  • the aluminum oxide layer 58 is formed on the surface of the p-type semiconductor layer 52.
  • the aluminum nitride layer 60 is formed on the surface of the aluminum oxide layer 58.
  • front surface through holes 70 are formed from the front surface to the back surface.
  • the surface through hole 70 is a hole through which the p-type semiconductor layer 52 is electrically connected to the surface electrode 64.
  • the silicon nitride layer 62 is formed on the back surface of the n-type semiconductor layer 54. Further, a back surface through hole 68 is formed in the silicon nitride layer 62 from the back surface to the front surface. The back surface through hole 68 is a hole through which the n-type semiconductor layer 54 is electrically connected to the back surface electrode 66.
  • the surface electrode 64 is formed on the surface side of the aluminum nitride layer 60. On the back side of the surface electrode 64, a surface protrusion 72 is formed for electrical connection with the p-type semiconductor layer 52 through the surface through hole 70.
  • the back electrode 66 is formed on the back side of the silicon nitride layer 62.
  • the back electrode 66 is electrically connected to the n-type semiconductor layer 54 through the back surface through hole 68.
  • the manufacturing method of the solar cell 50 is the same as the manufacturing method of the solar cell 10.
  • FIG. 7 is a diagram showing the relationship between the wavelength of light incident on the solar cell and the reflectance.
  • the horizontal axis indicates the wavelength (Wavelength) of light, and the vertical axis indicates the reflectance (Reflectance).
  • the solid line represents the reflectance of the stacked body in which the p-type semiconductor layer, the aluminum oxide layer, and the aluminum nitride layer are formed in order from the bottom with respect to the surface of the n-type silicon layer.
  • the thickness of the aluminum oxide layer of the laminate is 20 nm, and the thickness of the aluminum nitride layer is 70 nm.
  • the dotted line is the reflectivity of the polished silicon crystal surface.
  • the reflectance of light by the laminate is 0.1% to 51.0% when the wavelength of light is between 400 nm and 1050 nm.
  • the reflectance of the polished silicon crystal surface is 32.5% to 50.6% when the wavelength of light is between 400 nm and 1050 nm.
  • the reflectivity is almost 50%, but the difference in reflectivity opens up to about 680 nm from the long wavelength side, and at 683 nm, the reflectivity of the laminate is 0.1%.
  • the reflectance of the polished silicon crystal surface is 35.4%. On the longer wavelength side, the difference is greatly widened.
  • the wavelength of light is around 1050 nm
  • the reflectance of the laminate is 19.5%
  • the reflectance of the polished silicon crystal surface is 37.4. %.
  • the reflectance is significantly lower than the polished silicon crystal when the wavelength of light is between 400 nm and 1050 nm.
  • the aluminum oxide layer and the aluminum nitride layer included in the passivation layer can incorporate light having a wavelength capable of effectively generating power into the stacked body as incident light in silicon-based solar power generation.
  • the solar cell 10 is a solar cell 10 including a p-type semiconductor layer 12, an n-type semiconductor layer 14, and a passivation layer 16 stacked on the p-type semiconductor layer 12, and the passivation layer 16 includes the p-type semiconductor layer 12. At least a layer in which an aluminum oxide layer 18 and an aluminum nitride layer 20 are stacked in this order on the type semiconductor layer 12 is provided.
  • the thickness of the aluminum oxide layer 18 is 1 nm to 20 nm.
  • the thickness of the aluminum nitride layer 20 is 50 nm to 100 nm.
  • the maximum interface recombination rate of charges at the interface between the p-type semiconductor layer 12 and the passivation layer 16 is 38 cm / s or less.
  • the interface state density at the interface between the p-type semiconductor layer 12 and the passivation layer 16 is 4 ⁇ 10 11 / cm 2 eV or less.
  • the p-type semiconductor layer 12 and the n-type semiconductor layer 14 have single crystallinity.
  • the p-type semiconductor layer 12 and the n-type semiconductor layer 14 are all silicon.
  • the manufacturing method of the solar cell 10 is a manufacturing method of the solar cell 10 including the p-type semiconductor layer 12, the n-type semiconductor layer 14, and the passivation layer 16 stacked on the p-type semiconductor layer 12.
  • the layer 16 includes at least a step of forming the aluminum oxide layer 18 and the aluminum nitride layer 20 in this order on the p-type semiconductor layer 12.
  • At least one of the aluminum oxide layer 18 or the aluminum nitride layer 20 is formed by a reactive sputtering method, and a rare gas as a reaction atmosphere for forming the aluminum oxide layer 18 has a partial pressure ratio of 10% to 50%. Oxygen gas.
  • At least one of the aluminum oxide layer 18 or the aluminum nitride layer 20 is formed by a reactive sputtering method, and a rare gas as a reaction atmosphere for forming the aluminum nitride layer 20 has a partial pressure ratio of 10% to 70%. Nitrogen gas.
  • the formation of the aluminum oxide layer 18 and the formation of the aluminum nitride layer 20 are continuously performed in the same hermetic container.
  • the aluminum oxide layer 18 and the aluminum nitride layer 20 are formed by a reactive sputtering method, and an aluminum target is used in a reaction atmosphere containing a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50% as a reaction atmosphere.
  • the passivation layer 16 After the passivation layer 16 is formed, it is heated.
  • the p-type semiconductor layer 12 and the n-type semiconductor layer 14 are formed of a single crystal, but are not limited thereto.
  • the p-type semiconductor layer 12 and the n-type semiconductor layer 14 may be formed of either polycrystalline or amorphous crystallinity.
  • the p-type semiconductor layer 12 and the n-type semiconductor layer 14 are all formed of silicon, but a part thereof is formed of silicon and the other part is formed of another semiconductor material. May be.
  • step S3 an oxygen gas having a partial pressure ratio of 0% to 15% may be added as an atmospheric gas to form a silicon oxide layer of 0.5 nm to 2 nm.
  • step S3 or S7 an oxidizing species such as H 2 O or O 3 (ozone) is introduced as an atmospheric gas, or before step S3, the back surface of the p-type semiconductor layer 12 becomes an oxidizing species.
  • a silicon oxide layer with a thickness of 0.5 nm to 2 nm may be formed by exposure.
  • the aluminum oxide layer 18, the aluminum nitride layer 20, and the silicon nitride layer 22 are formed by a reactive sputtering method, but are not limited thereto.
  • a reactive sputtering method it may be formed by a CVD method, an ALD method, a plasma CVD method, a sputtering method, or a combination of these methods including a reactive sputtering method.
  • the formation of the aluminum oxide layer 18 and the formation of the aluminum nitride layer 20 are continuously performed in the same hermetic container, but may be performed in different hermetic containers.
  • SYMBOLS 10 DESCRIPTION OF SYMBOLS 10, 50 ... Solar cell 12, 52 ... p-type semiconductor layer 14, 54 ... n-type semiconductor layer 16, 56 ... Passivation layer 18, 58 ... Aluminum oxide layer 20, 60 ... Aluminum nitride layer 22, 62 ... Silicon nitride layer 24 , 64... Surface electrodes 26 and 66... Back surface electrodes 28 and 68... Back surface through-holes 30 and 70.

Abstract

[Problem] To provide: a solar cell comprising a passivation layer, wherein the charge loss at the interface between a p-type semiconductor layer and the passivation layer is suppressed low; and a method for manufacturing a solar cell. [Solution] A solar cell (10) which is provided with: a p-type semiconductor layer (12); an n-type semiconductor layer (14); and a passivation layer (16) that is laminated on the p-type semiconductor layer (12). The passivation layer (16) comprises at least an aluminum oxide layer (18) and an aluminum nitride layer (20), which are sequentially laminated on the p-type semiconductor layer (12) in this order.

Description

太陽電池及び太陽電池の製造方法Solar cell and method for manufacturing solar cell
 本発明は、p型半導体層と、n型半導体層と、前記p型半導体層に積層されたパッシベーション層とを備える太陽電池及び太陽電池の製造方法に関する。 The present invention relates to a solar cell including a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, and a method for manufacturing the solar cell.
 太陽電池は、太陽光をエネルギー源として有効活用するという観点から、その活用が広く望まれている。太陽電池は、太陽光の光エネルギーを電気エネルギーに変換する半導体素子である。太陽電池に太陽光が入射されると、太陽電池の中に電子・正孔対が生じる。この太陽光の光エネルギーによって生じた電子・正孔対が、p型半導体層とn型半導体層との接合面の近傍の電界によって分離されて、電子、正孔が異なる電極で捕獲されて、二つの電極間に起電力が生じる。 Solar cells are widely desired to be used from the viewpoint of effectively using sunlight as an energy source. A solar cell is a semiconductor element that converts light energy of sunlight into electrical energy. When sunlight is incident on the solar cell, electron-hole pairs are generated in the solar cell. Electron / hole pairs generated by the light energy of sunlight are separated by an electric field in the vicinity of the junction surface between the p-type semiconductor layer and the n-type semiconductor layer, and electrons and holes are captured by different electrodes. An electromotive force is generated between the two electrodes.
 しかしながら、前記電子及び正孔の多くは、前記半導体層と電極等との界面に生じる未結合手、欠陥、界面準位等における再結合によって失われてしまうため、電荷損失が生じる。この電荷損失が太陽電池の発電効率の向上を阻害する要因として知られている。 However, most of the electrons and holes are lost due to recombination at the dangling bonds, defects, interface states, and the like generated at the interface between the semiconductor layer and the electrode, resulting in charge loss. This charge loss is known as a factor that hinders the improvement in power generation efficiency of solar cells.
 この電荷損失を低く抑えるために、一般には、半導体層の表面や、半導体層と電極との間に、パッシベーション層が設けられる。パッシベーション層が設けられることにより、半導体層とパッシベーション層との界面の界面準位密度は5×1011/cmeV程度、電荷の界面再結合速度は300cm/s程度に抑えられ、電荷損失が低く抑えられる。 In order to keep this charge loss low, a passivation layer is generally provided on the surface of the semiconductor layer or between the semiconductor layer and the electrode. By providing the passivation layer, the interface state density at the interface between the semiconductor layer and the passivation layer is suppressed to about 5 × 10 11 / cm 2 eV, the interface recombination rate of charge is suppressed to about 300 cm / s, and charge loss is reduced. It can be kept low.
 このパッシベーション層には、入射光を効率的に太陽電池内に取り込むための光学特性が要求される。また、隣接して設置される電極のスパイキングを抑える物性も要求される。また、酸化アルミニウム層を10nm以上厚くすると、酸化アルミニウム層中に気泡が生じる等の問題が生じる。この光学特性、物性、及び酸化アルミニウム層の厚さの制限を満たすためにパッシベーション層として、酸化アルミニウム層の上に窒化シリコン層が積層されたものが多く使われてきた(特許文献1)。 This passivation layer is required to have optical characteristics for efficiently taking incident light into the solar cell. Moreover, the physical property which suppresses the spiking of the electrode installed adjacent is also requested | required. Further, when the aluminum oxide layer is made thicker by 10 nm or more, there arises a problem that bubbles are generated in the aluminum oxide layer. In order to satisfy the restrictions on the optical characteristics, physical properties, and thickness of the aluminum oxide layer, a passivation layer in which a silicon nitride layer is laminated on an aluminum oxide layer has been often used (Patent Document 1).
特表2012-530361号公報Special table 2012-530361 gazette
 しかしながら、特許文献1に開示された太陽電池では、窒化シリコン層の正の固定電荷により、酸化アルミニウム層の負の固定電荷が持つ電界パッシベーション効果が弱められる。この結果、p型半導体層及びパッシベーション層との界面における界面再結合速度が速くなり、電荷損失が十分に抑えられない。また、前記パッシベーション層を積層するためには、危険な原料ガスを用い、積層に長時間を要し、製造装置の構成が複雑になる、という問題があった。 However, in the solar cell disclosed in Patent Document 1, the electric field passivation effect of the negative fixed charge of the aluminum oxide layer is weakened by the positive fixed charge of the silicon nitride layer. As a result, the interface recombination speed at the interface between the p-type semiconductor layer and the passivation layer is increased, and the charge loss cannot be sufficiently suppressed. Moreover, in order to laminate | stack the said passivation layer, there existed a problem that a dangerous raw material gas was used, lamination | stacking took a long time, and the structure of a manufacturing apparatus became complicated.
 具体的には、パッシベーション層のうち酸化アルミニウム層は、例えば原子層堆積(ALD:Atomic Layer Deposition)により積層されるが、毒性と引火性の高いトリメチルアルミニウムガスが用いられる。そして、例えば20nmの酸化アルミニウム層を積層するためには約20分~40分を要する。 Specifically, the aluminum oxide layer of the passivation layer is laminated by, for example, atomic layer deposition (ALD: Atomic Layer Deposition), and trimethylaluminum gas having high toxicity and flammability is used. For example, it takes about 20 to 40 minutes to stack an aluminum oxide layer of 20 nm.
 また、パッシベーション層のうち窒化シリコン層は、例えばプラズマを援用する化学気相成長(CVD:Chemical Vapor Deposition)により積層されるが、毒性と引火性の高いシランガスと、アンモニアガスとが用いられる。そして、例えば50nmの窒化シリコン層を積層するためには約10分~30分を要する。 In addition, the silicon nitride layer of the passivation layer is laminated by, for example, chemical vapor deposition (CVD: Chemical Vapor Deposition) using plasma, and silane gas having high toxicity and flammability and ammonia gas are used. For example, it takes about 10 to 30 minutes to stack a silicon nitride layer of 50 nm.
 また、前記酸化アルミニウム層の積層と前記窒化シリコン層の積層は、ガスの混合による爆発や汚染等を避けるため、それぞれ別の装置で独立に行う必要があり、製造装置の構成が複雑になる。 Further, the lamination of the aluminum oxide layer and the silicon nitride layer needs to be performed independently by separate apparatuses in order to avoid an explosion or contamination due to gas mixing, and the configuration of the manufacturing apparatus becomes complicated.
 本発明は、上記の課題を考慮してなされたものであって、p型半導体層及びパッシベーション層との界面における電荷損失を低く抑えるパッシベーション層を備える太陽電池を提供する。また、このパッシベーション層を、安全なガスを使い、従来よりも短時間で、同一の製造装置で連続して行える単純な装置構成での積層を可能とする、太陽電池の製造方法を提供する。 The present invention has been made in consideration of the above problems, and provides a solar cell including a passivation layer that suppresses charge loss at the interface between the p-type semiconductor layer and the passivation layer. In addition, the present invention provides a method for manufacturing a solar cell, which enables stacking with a simple device configuration in which this passivation layer can be continuously performed using the same manufacturing apparatus in a shorter time than that using a safe gas.
 本発明の太陽電池は、p型半導体層と、n型半導体層と、前記p型半導体層に積層されたパッシベーション層とを備える太陽電池であって、前記パッシベーション層は、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層された層を少なくとも有することを特徴とする。 The solar cell of the present invention is a solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, wherein the passivation layer is formed on the p-type semiconductor layer. On the other hand, it has at least a layer in which an aluminum oxide layer and an aluminum nitride layer are stacked in this order.
 前記太陽電池において、前記p型半導体層と、前記酸化アルミニウム層との間に、酸化シリコン層を有することを特徴とする。 The solar cell includes a silicon oxide layer between the p-type semiconductor layer and the aluminum oxide layer.
 前記太陽電池において、前記酸化アルミニウム層の厚さが1nm~20nmであることを特徴とする。 In the solar cell, the aluminum oxide layer has a thickness of 1 nm to 20 nm.
 前記太陽電池において、前記酸化シリコン層の厚さが0.5nm~2nmであることを特徴とする。 In the solar cell, the silicon oxide layer has a thickness of 0.5 nm to 2 nm.
 前記太陽電池において、前記窒化アルミニウム層の厚さが50nm~100nmであることを特徴とする。 In the solar cell, the aluminum nitride layer has a thickness of 50 nm to 100 nm.
 前記太陽電池において、前記p型半導体層と前記パッシベーション層との界面における電荷の最大界面再結合速度が38cm/s以下であることを特徴とする。 The solar cell is characterized in that the maximum interface recombination rate of charges at the interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
 前記太陽電池において、前記p型半導体層と前記パッシベーション層との界面における界面準位密度が4×1011/cmeV以下であることを特徴とする。 In the solar cell, an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 × 10 11 / cm 2 eV or less.
 前記太陽電池において、前記p型半導体層と前記n型半導体層とが、単結晶、多結晶、非晶質のいずれかの結晶性を有することを特徴とする。 In the solar cell, the p-type semiconductor layer and the n-type semiconductor layer have a crystallinity of single crystal, polycrystal, or amorphous.
 前記太陽電池において、前記p型半導体層と前記n型半導体層の一部又はすべてがシリコンであることを特徴とする。 In the solar cell, a part or all of the p-type semiconductor layer and the n-type semiconductor layer are silicon.
 本発明の太陽電池の製造方法は、p型半導体層と、n型半導体層と、前記p型半導体層に積層されたパッシベーション層とを備える太陽電池の製造方法であって、前記パッシベーション層は、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層して形成するステップを少なくとも備えることを特徴とする。 The method for manufacturing a solar cell according to the present invention is a method for manufacturing a solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer, wherein the passivation layer includes: It includes at least a step of stacking and forming an aluminum oxide layer and an aluminum nitride layer in this order on the p-type semiconductor layer.
 前記太陽電池の製造方法において、前記酸化アルミニウム層は、CVD法、ALD法、プラズマCVD法、スパッタリング法、反応性スパッタリング法のいずれかの又はこれらの組合せの方法で形成され、前記酸化アルミニウム層の厚さが1nm~20nmであることを特徴とする。 In the solar cell manufacturing method, the aluminum oxide layer is formed by any one of a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof. The thickness is 1 nm to 20 nm.
 前記太陽電池の製造方法において、前記p型半導体層と前記酸化アルミニウム層との間に、酸化シリコン層が形成されることを特徴とする。 In the method for manufacturing a solar cell, a silicon oxide layer is formed between the p-type semiconductor layer and the aluminum oxide layer.
 前記太陽電池の製造方法において、前記酸化シリコン層の厚さが0.5nm~2nmであることを特徴とする。 In the method for manufacturing a solar cell, the thickness of the silicon oxide layer is 0.5 nm to 2 nm.
 前記太陽電池の製造方法において、前記窒化アルミニウム層は、CVD法、ALD法、プラズマCVD法、スパッタリング法、反応性スパッタリング法のいずれかの又はこれらの組合せの方法で形成され、前記窒化アルミニウム層の厚さが50nm~100nmであることを特徴とする。 In the method for manufacturing a solar cell, the aluminum nitride layer is formed by any one of a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof. The thickness is 50 nm to 100 nm.
 前記太陽電池の製造方法において、前記酸化アルミニウム層又は前記窒化アルミニウム層の少なくとも一方は、反応性スパッタリング法で形成され、前記酸化アルミニウム層を形成するための反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスと、を少なくとも含むことを特徴とする。 In the method for manufacturing a solar cell, at least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method, and a partial pressure ratio is 10 as a reaction atmosphere for forming the aluminum oxide layer. % To 50% oxygen gas.
 前記太陽電池の製造方法において、前記酸化アルミニウム層又は前記窒化アルミニウム層の少なくとも一方は、反応性スパッタリング法で形成され、前記窒化アルミニウム層を形成するための反応雰囲気として希ガスと、分圧比が10%~70%の窒素ガスと、を少なくとも含むことを特徴とする。 In the method for manufacturing a solar cell, at least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method, and a partial pressure ratio is 10 as a reaction atmosphere for forming the aluminum nitride layer. % To 70% nitrogen gas.
 前記太陽電池の製造方法において、前記酸化アルミニウム層の形成と前記窒化アルミニウム層の形成とが同一の気密容器で連続して行われることを特徴とする。 In the method for manufacturing a solar cell, the formation of the aluminum oxide layer and the formation of the aluminum nitride layer are continuously performed in the same hermetic container.
 前記太陽電池の製造方法において、前記酸化アルミニウム層及び前記窒化アルミニウム層が反応性スパッタリング法により形成され、反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスとを含む反応雰囲気において、アルミニウムターゲットを用いて、前記酸化アルミニウム層を形成するステップと、前記酸化アルミニウム層が形成された後に、前記反応雰囲気から、希ガスと、分圧比が10%~70%の窒素ガスとを含む反応雰囲気に切り替えられ、前記アルミニウムターゲットを用いて、前記窒化アルミニウム層を形成するステップと、を有することを特徴とする。 In the solar cell manufacturing method, the aluminum oxide layer and the aluminum nitride layer are formed by a reactive sputtering method, and the reaction atmosphere includes a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50%. A step of forming the aluminum oxide layer using an aluminum target; and after the aluminum oxide layer is formed, the reaction atmosphere includes a rare gas and a nitrogen gas having a partial pressure ratio of 10% to 70%. And switching to a reaction atmosphere, and forming the aluminum nitride layer using the aluminum target.
 前記太陽電池の製造方法において、前記パッシベーション層が生成された後に、加熱されることを特徴とする。 In the method for manufacturing a solar cell, the solar cell is heated after the passivation layer is formed.
 前記太陽電池の製造方法において、前記p型半導体層と前記パッシベーション層との界面における電荷の最大界面再結合速度が38cm/s以下であることを特徴とする。 In the method for manufacturing a solar cell, a maximum interface recombination rate of charges at an interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
 前記太陽電池の製造方法において、前記p型半導体層と前記パッシベーション層との界面における界面準位密度が4×1011/cmeV以下であることを特徴とする。 In the method for manufacturing a solar cell, an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 × 10 11 / cm 2 eV or less.
 本発明の太陽電池によれば、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層されたパッシベーション層を少なくとも有することで、前記p型半導体層とパッシベーション層との界面における電荷損失を低く抑えられる。また、本発明の製造方法によれば、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層して形成するステップを少なくとも備えることで、安全なガスを使い、従来よりも短時間で、同一の製造装置で連続して行える単純な装置構成による、太陽電池の製造が可能になる。 According to the solar cell of the present invention, there is at least a passivation layer in which an aluminum oxide layer and an aluminum nitride layer are laminated in this order with respect to the p-type semiconductor layer, so that charges at the interface between the p-type semiconductor layer and the passivation layer can be obtained. Loss can be kept low. In addition, according to the manufacturing method of the present invention, at least a step of stacking and forming an aluminum oxide layer and an aluminum nitride layer in this order on the p-type semiconductor layer is provided, so that a safe gas can be used and shorter than before. In time, it is possible to manufacture solar cells with a simple device configuration that can be continuously performed by the same manufacturing apparatus.
本発明の実施形態に係る太陽電池の説明図である。It is explanatory drawing of the solar cell which concerns on embodiment of this invention. 本発明の実施形態に係る太陽電池の製造方法の手順の説明図である。It is explanatory drawing of the procedure of the manufacturing method of the solar cell which concerns on embodiment of this invention. シリコン基板上に積層した窒化アルミニウム層の厚さと、窒化アルミニウム層の固定電荷密度との関係を示す図である。It is a figure which shows the relationship between the thickness of the aluminum nitride layer laminated | stacked on the silicon substrate, and the fixed charge density of the aluminum nitride layer. 本発明の実施形態に係る太陽電池における、酸化アルミニウム層の厚さと、最大界面再結合速度の関係を示す図である。It is a figure which shows the relationship between the thickness of an aluminum oxide layer, and the largest interface recombination speed in the solar cell which concerns on embodiment of this invention. 発明の実施形態に係る太陽電池における、窒化アルミニウム層を形成する場合における窒素ガスの分圧比と、界面準位密度との関係を示す図である。It is a figure which shows the relationship between the partial pressure ratio of nitrogen gas in the case of forming the aluminum nitride layer, and an interface state density in the solar cell which concerns on embodiment of invention. 本発明の実施形態の変形例に係る太陽電池の断面を示す説明図である。It is explanatory drawing which shows the cross section of the solar cell which concerns on the modification of embodiment of this invention. 太陽電池に入射する光の波長と反射率との関係を示す図である。It is a figure which shows the relationship between the wavelength of the light which injects into a solar cell, and a reflectance.
 <本実施形態の太陽電池10の構成>
 以下、本発明の実施形態について、図面を用いて説明する。図1は、本発明の実施形態に係る太陽電池10の断面を示す説明図である。図1の上方を表面とし、下方を裏面としている。
<Configuration of Solar Cell 10 of the Present Embodiment>
Hereinafter, embodiments of the present invention will be described with reference to the drawings. FIG. 1 is an explanatory view showing a cross section of a solar cell 10 according to an embodiment of the present invention. The upper side of FIG. 1 is the front surface, and the lower side is the back surface.
 太陽電池10は、p型半導体層12、n型半導体層14、パッシベーション層16、窒化シリコン層22、表面電極24及び裏面電極26を備える。 The solar cell 10 includes a p-type semiconductor layer 12, an n-type semiconductor layer 14, a passivation layer 16, a silicon nitride layer 22, a front electrode 24, and a back electrode 26.
 p型半導体層12は、正孔を主とする電荷を含む結晶質半導体層である。添加物としてp型の不純物であるホウ素(B)が含まれる。なお、p型の不純物であれば、ホウ素(B)に限定されない。p型半導体層12としては、単結晶シリコンが用いられる。また、p型半導体層12の厚さは、例えば、0.1mm~0.2mm、電気抵抗率は10Ω・cm~20Ω・cmである。 The p-type semiconductor layer 12 is a crystalline semiconductor layer containing charges mainly including holes. As an additive, boron (B) which is a p-type impurity is included. Note that the p-type impurity is not limited to boron (B). As the p-type semiconductor layer 12, single crystal silicon is used. The thickness of the p-type semiconductor layer 12 is, for example, 0.1 mm to 0.2 mm, and the electric resistivity is 10 Ω · cm to 20 Ω · cm.
 n型半導体層14は、電子を主とする電荷を含む結晶質半導体層である。添加物としてn型の不純物であるリン(P)が含まれる。なお、n型の不純物であれば、リン(P)に限定されない。n型半導体層14としては、結晶質シリコンが用いられる。また、n型半導体層14の厚さは、例えば、0.1μm~0.8μm、表面抵抗率が80~120Ω/sqである。さらに、n型半導体層14は、p型半導体層12の表面に形成される。 The n-type semiconductor layer 14 is a crystalline semiconductor layer containing charges mainly composed of electrons. As an additive, phosphorus (P) which is an n-type impurity is included. Note that the n-type impurity is not limited to phosphorus (P). As the n-type semiconductor layer 14, crystalline silicon is used. The thickness of the n-type semiconductor layer 14 is, for example, 0.1 μm to 0.8 μm, and the surface resistivity is 80 to 120 Ω / sq. Further, the n-type semiconductor layer 14 is formed on the surface of the p-type semiconductor layer 12.
 パッシベーション層16は、酸化アルミニウム層18と窒化アルミニウム層20とを備える。パッシベーション層16は、p型半導体層12の裏面に形成される。 The passivation layer 16 includes an aluminum oxide layer 18 and an aluminum nitride layer 20. The passivation layer 16 is formed on the back surface of the p-type semiconductor layer 12.
 酸化アルミニウム層18は、厚さが1nm~20nmの層である。酸化アルミニウム層18は、p型半導体層12の裏面に形成される。 The aluminum oxide layer 18 is a layer having a thickness of 1 nm to 20 nm. The aluminum oxide layer 18 is formed on the back surface of the p-type semiconductor layer 12.
 窒化アルミニウム層20は、厚さが50nm~100nmの層である。窒化アルミニウム層20は、酸化アルミニウム層18の裏面に形成される。 The aluminum nitride layer 20 is a layer having a thickness of 50 nm to 100 nm. The aluminum nitride layer 20 is formed on the back surface of the aluminum oxide layer 18.
 パッシベーション層16には、裏面から表面方向に裏面貫通孔28が形成されている。裏面貫通孔28は、p型半導体層12が裏面電極26と導通するための孔である。 The back surface through-hole 28 is formed in the passivation layer 16 from the back surface to the front surface. The back surface through hole 28 is a hole through which the p-type semiconductor layer 12 is electrically connected to the back surface electrode 26.
 窒化シリコン層22は、厚さが50nm~100nmの層であって、透光性を有する。窒化シリコン層22は、n型半導体層14の表面に形成される。また、窒化シリコン層22には、表面から裏面方向に表面貫通孔30が形成されている。表面貫通孔30は、n型半導体層14が表面電極24と導通するための孔である。 The silicon nitride layer 22 is a layer having a thickness of 50 nm to 100 nm and has a light transmitting property. The silicon nitride layer 22 is formed on the surface of the n-type semiconductor layer 14. Further, the surface through hole 30 is formed in the silicon nitride layer 22 from the front surface to the back surface. The surface through hole 30 is a hole through which the n-type semiconductor layer 14 is electrically connected to the surface electrode 24.
 表面電極24は、金属で形成された電極であり、金属として例えば、銀が用いられる。表面電極24の厚さは、例えば、5μm~20μmである。表面電極24は、窒化シリコン層22の表面側に形成される。表面電極24は、表面貫通孔30を介してn型半導体層14と導通する。 The surface electrode 24 is an electrode formed of metal, and for example, silver is used as the metal. The thickness of the surface electrode 24 is, for example, 5 μm to 20 μm. The surface electrode 24 is formed on the surface side of the silicon nitride layer 22. The surface electrode 24 is electrically connected to the n-type semiconductor layer 14 through the surface through hole 30.
 裏面電極26は、金属で形成された電極であり、金属として例えば、アルミニウムが用いられる。裏面電極26の厚さは、例えば、2μm~30μmである。裏面電極26は、窒化アルミニウム層20の裏面側に形成される。裏面電極26の表面側には、裏面貫通孔28を介してp型半導体層12と導通するための裏面突部32が形成されている。 The back electrode 26 is an electrode formed of metal, and for example, aluminum is used as the metal. The thickness of the back electrode 26 is, for example, 2 μm to 30 μm. The back electrode 26 is formed on the back side of the aluminum nitride layer 20. On the front surface side of the back electrode 26, a back surface protrusion 32 is formed for electrical connection with the p-type semiconductor layer 12 through the back surface through hole 28.
 <本実施形態の太陽電池10の製造方法>
 次に、太陽電池10の製造方法について図2を用いて説明する。図2は、本実施形態の太陽電池10の製造方法の手順の説明図である。
<The manufacturing method of the solar cell 10 of this embodiment>
Next, the manufacturing method of the solar cell 10 is demonstrated using FIG. FIG. 2 is an explanatory diagram of the procedure of the method for manufacturing the solar cell 10 of the present embodiment.
 まず、p型の不純物を含むシリコンウエハが用意される(ステップS1)。 First, a silicon wafer containing p-type impurities is prepared (step S1).
 前記シリコンウエハの予備加工が行われる(ステップS2)。具体的には、前記シリコンウエハが希フッ化水素酸に浸漬されて、前記シリコンウエハの表面に形成された自然酸化膜が除去される。次に、前記シリコンウエハの表面が反応性イオンエッチング又は異方性ウェットエッチングにてテクスチャリングされる。その後、前記シリコンウエハに、n型の不純物が、熱拡散法により、前記シリコンウエハの表面から深さ方向に拡散され、n型半導体層14が形成される。これら予備加工により、前記シリコンウエハの表面がテクスチャリングされ、前記シリコンウエハの表面側にn型半導体層14が形成され、裏面側にp型半導体層12が形成された積層体が得られる。 The silicon wafer is preliminarily processed (step S2). Specifically, the silicon wafer is immersed in dilute hydrofluoric acid, and the natural oxide film formed on the surface of the silicon wafer is removed. Next, the surface of the silicon wafer is textured by reactive ion etching or anisotropic wet etching. Thereafter, n-type impurities are diffused into the silicon wafer in the depth direction from the surface of the silicon wafer by a thermal diffusion method, whereby the n-type semiconductor layer 14 is formed. By these preliminary processes, the surface of the silicon wafer is textured, and a laminated body in which the n-type semiconductor layer 14 is formed on the surface side of the silicon wafer and the p-type semiconductor layer 12 is formed on the back surface side is obtained.
 次に、p型半導体層12の裏面に、酸化アルミニウム層18が反応性スパッタリングで積層される(ステップS3)。具体的には、気密容器の内部に、まず、アルミニウムターゲットが載置される。次に、p型半導体層12が前記アルミニウムターゲット側と対向する位置に載置される。さらに、アルゴンガスと、分圧比が10%~50%の酸素ガスとからなる反応ガスが反応雰囲気として、3ミリTorrで充填される。次に、前記アルミニウムターゲットと前記積層体の間に300Wの交番電磁界が0.5分~11分間、印加される。この結果、p型半導体層12の裏面に、厚さが1nm~20nmの酸化アルミニウム層18が積層される(ステップS3)。 Next, the aluminum oxide layer 18 is laminated on the back surface of the p-type semiconductor layer 12 by reactive sputtering (step S3). Specifically, an aluminum target is first placed inside an airtight container. Next, the p-type semiconductor layer 12 is placed at a position facing the aluminum target side. Further, a reaction gas composed of argon gas and oxygen gas having a partial pressure ratio of 10% to 50% is filled as 3 mTorr as a reaction atmosphere. Next, an alternating electromagnetic field of 300 W is applied between the aluminum target and the laminate for 0.5 to 11 minutes. As a result, an aluminum oxide layer 18 having a thickness of 1 nm to 20 nm is stacked on the back surface of the p-type semiconductor layer 12 (step S3).
 次に、酸化アルミニウム層18の裏面に、窒化アルミニウム層20が反応性スパッタリングで積層される(ステップS4)。具体的には、前記反応ガスが気密容器から一旦排気される。次に、前記気密容器に、アルゴンガスと、分圧比が10%~70%の窒素ガスとからなる反応ガスを反応雰囲気として、3ミリTorrで充填される。さらに、前記アルミニウムターゲットと前記積層体の間に300Wの交番電磁界が5分~10分間、印加される。この結果、前記酸化アルミニウム層18の裏面に、厚さが50nm~100nmの窒化アルミニウム層20が積層される(ステップS4)。 Next, the aluminum nitride layer 20 is laminated on the back surface of the aluminum oxide layer 18 by reactive sputtering (step S4). Specifically, the reaction gas is once exhausted from the airtight container. Next, the hermetic container is filled with 3 mTorr using a reaction gas composed of argon gas and nitrogen gas having a partial pressure ratio of 10% to 70% as a reaction atmosphere. Further, an alternating electromagnetic field of 300 W is applied between the aluminum target and the laminate for 5 to 10 minutes. As a result, an aluminum nitride layer 20 having a thickness of 50 nm to 100 nm is laminated on the back surface of the aluminum oxide layer 18 (step S4).
 次に、n型半導体層14の表面に、窒化シリコン層22が化学気相成長により積層される(ステップS5)。具体的には、前記気密容器とは別の他の気密容器の内部に、前記積層体のn型半導体層14がガス雰囲気と接するように、再載置される。次に、前記気密容器に、Hガス又はHeガスで分圧比1%~50%に希釈されたモノシラン(SiH)ガス及びアンモニア(NH)ガスを、原料ガスとして、1Torrから大気圧で充填される。この状態で、前記積層体が約350℃で5分~10分間、加熱される。この結果、n型半導体層14の表面に、厚さが50nm~100nmの窒化シリコン層22が積層される(ステップS5)。 Next, the silicon nitride layer 22 is deposited on the surface of the n-type semiconductor layer 14 by chemical vapor deposition (step S5). Specifically, the n-type semiconductor layer 14 of the stacked body is remounted in another gastight container different from the gastight container so as to be in contact with the gas atmosphere. Next, in the airtight container, monosilane (SiH 4 ) gas and ammonia (NH 3 ) gas diluted with H 2 gas or He gas to a partial pressure ratio of 1% to 50% are used as raw material gases from 1 Torr to atmospheric pressure. Filled. In this state, the laminate is heated at about 350 ° C. for 5 to 10 minutes. As a result, the silicon nitride layer 22 having a thickness of 50 nm to 100 nm is stacked on the surface of the n-type semiconductor layer 14 (step S5).
 次に、前記積層体に電極が形成される(ステップS6)。パッシベーション層16の裏面側から、出力8W、波長266nmのパルス型DPSS(Diode-pumped solid-state)レーザーが照射され、裏面貫通孔28が形成される。その後、裏面電極26が、スクリーン印刷により窒化アルミニウム層20の裏面に形成される。また、窒化シリコン層22の表面には、ファイアースルー法により、表面貫通孔30及び、表面電極24が形成される。具体的には、窒化シリコンを侵食する銀を含む電極材料が、電極が形成される所定箇所に印刷され、200℃~800℃で1分~60分に加熱されることにより、表面電極24が窒化シリコン層22の表面に形成される。表面電極24、裏面電極26の形成は、先に表面電極24が形成されても良い。 Next, an electrode is formed on the laminate (step S6). From the back surface side of the passivation layer 16, a pulsed DPSS (Diode-pumped solid state) laser with an output of 8 W and a wavelength of 266 nm is irradiated to form the back surface through hole 28. Thereafter, the back electrode 26 is formed on the back surface of the aluminum nitride layer 20 by screen printing. Further, a surface through hole 30 and a surface electrode 24 are formed on the surface of the silicon nitride layer 22 by a fire-through method. Specifically, an electrode material containing silver that corrodes silicon nitride is printed at a predetermined location where the electrode is formed and heated at 200 ° C. to 800 ° C. for 1 minute to 60 minutes, whereby the surface electrode 24 is formed. It is formed on the surface of silicon nitride layer 22. For the formation of the front electrode 24 and the back electrode 26, the front electrode 24 may be formed first.
 次に、表面電極24と、裏面電極26とが形成された積層体が窒素ガス雰囲気中にて200℃~800℃で1分~60分間、加熱される(ステップS7)。この加熱により、表面電極24、裏面電極26、酸化アルミニウム層18、窒化アルミニウム層20、窒化シリコン層22が焼きなまされ、それぞれの層の中や界面の未結合手、欠陥、界面準位の密度が下げられる。なお、ステップ6における加熱処理をステップ7において行ってもよい。 Next, the laminate on which the front electrode 24 and the back electrode 26 are formed is heated in a nitrogen gas atmosphere at 200 ° C. to 800 ° C. for 1 minute to 60 minutes (step S7). By this heating, the front surface electrode 24, the back surface electrode 26, the aluminum oxide layer 18, the aluminum nitride layer 20, and the silicon nitride layer 22 are annealed. Density is lowered. In addition, you may perform the heat processing in step 6 in step 7.
 以上の製造工程により、太陽電池10が得られる。 The solar cell 10 is obtained by the above manufacturing process.
 <本実施形態の太陽電池10の動作>
 次に、本発明の実施形態に係る太陽電池10の動作について説明する。
<Operation of Solar Cell 10 of the Present Embodiment>
Next, operation | movement of the solar cell 10 which concerns on embodiment of this invention is demonstrated.
 太陽光が、窒化シリコン層22、n型半導体層14を介してp型半導体層12へと入射される。太陽光の光エネルギーによって、n型半導体層14、p型半導体層12の中に電子・正孔対が生じる。n型半導体層14の表面はテクスチャリングされているので、入射した太陽光が、n型半導体層14とp型半導体層12との中で反射を繰り返す。その結果、電子・正孔対が効果的に発生する。太陽光によって生じた電子・正孔対は、p型半導体層12とn型半導体層14との接合面の近傍の電界によって分離されて、電子が表面電極24に移動され、正孔が裏面電極26に移動され、表面電極24と裏面電極26との間に起電力が生じる。 Sunlight is incident on the p-type semiconductor layer 12 through the silicon nitride layer 22 and the n-type semiconductor layer 14. Electron / hole pairs are generated in the n-type semiconductor layer 14 and the p-type semiconductor layer 12 by the light energy of sunlight. Since the surface of the n-type semiconductor layer 14 is textured, the incident sunlight is repeatedly reflected in the n-type semiconductor layer 14 and the p-type semiconductor layer 12. As a result, electron / hole pairs are effectively generated. Electron / hole pairs generated by sunlight are separated by an electric field in the vicinity of the junction surface between the p-type semiconductor layer 12 and the n-type semiconductor layer 14, electrons are moved to the front electrode 24, and the positive holes are transferred to the back electrode. The electromotive force is generated between the front electrode 24 and the back electrode 26.
 パッシベーション層16の窒化アルミニウム層20により、裏面電極26にスパイキングと呼ばれる傷の発生が防止される。 The aluminum nitride layer 20 of the passivation layer 16 prevents the back electrode 26 from being scratched called spiking.
 また、パッシベーション層16によって、電界パッシベーション効果が得られる。具体的には、パッシベーション層16の高密度の負の固定電荷の電界によって、電子がパッシベーション層16とp型半導体層12との界面から遠ざけられ、電子が界面の未結合手、欠陥、界面準位によって失われてしまう速度を低く抑え、電荷損失が低く抑えられる。 Also, the passivation layer 16 provides an electric field passivation effect. Specifically, the electron is moved away from the interface between the passivation layer 16 and the p-type semiconductor layer 12 by the high-density negative fixed charge electric field of the passivation layer 16, and the electrons are separated from the dangling bonds, defects, and interface states at the interface. The rate of loss due to the position is kept low, and the charge loss is kept low.
 図3は、シリコン基板上に積層した窒化アルミニウム層の厚さと、窒化アルミニウム層の固定電荷密度との関係を示す図である。横軸は窒化アルミニウム層の厚さ(Thickness of AlNx)を示し、縦軸は窒化アルミニウム層の固定電荷密度(Qeff)を示す。白丸のプロット(○)はCV計測にあたって逆バイアスから順バイアスに掃引されて計測された場合の固定電荷密度である。黒丸のプロット(●)は順バイアスから逆バイアスに掃引されて計測された場合の固定電荷密度である。 FIG. 3 is a diagram showing the relationship between the thickness of the aluminum nitride layer stacked on the silicon substrate and the fixed charge density of the aluminum nitride layer. The horizontal axis represents the thickness of the aluminum nitride layer (Thickness of AlN x ), and the vertical axis represents the fixed charge density (Q eff ) of the aluminum nitride layer. A white circle plot (◯) represents a fixed charge density when measured by sweeping from reverse bias to forward bias in CV measurement. The black circle plot (●) is the fixed charge density when measured by sweeping from forward bias to reverse bias.
 パッシベーション層16が電界パッシベーション効果を発揮するためには、酸化アルミニウム層18の固定電荷の電荷密度と、酸化アルミニウム層18の裏面の窒化アルミニウム層20の固定電荷の電荷密度の総和が負の値を持たなければならない。ここで、酸化アルミニウム層18の固定電荷密度は-3.0×1012/cm~-5.0×1012/cmである。このため、窒化アルミニウム層20の固定電荷密度が3.0×1012/cm以下であれば、前記電荷密度の総和が負の値となる。図3より、窒化アルミニウム層の厚みが50nm以上であれば、固定電荷密度が2.0×1012/cm以下となる。つまり、窒化アルミニウム層の厚みが50nm以上であれば、パッシベーション層16が電界パッシベーション効果を発揮する。 In order for the passivation layer 16 to exhibit the electric field passivation effect, the sum of the charge density of the fixed charge of the aluminum oxide layer 18 and the charge density of the fixed charge of the aluminum nitride layer 20 on the back surface of the aluminum oxide layer 18 has a negative value. Must have. Here, the fixed charge density of the aluminum oxide layer 18 is −3.0 × 10 12 / cm 2 to −5.0 × 10 12 / cm 2 . For this reason, if the fixed charge density of the aluminum nitride layer 20 is 3.0 × 10 12 / cm 2 or less, the sum of the charge densities becomes a negative value. From FIG. 3, when the thickness of the aluminum nitride layer is 50 nm or more, the fixed charge density is 2.0 × 10 12 / cm 2 or less. That is, if the thickness of the aluminum nitride layer is 50 nm or more, the passivation layer 16 exhibits an electric field passivation effect.
 図4は、本発明の実施形態に係る太陽電池10における、酸化アルミニウム層18の厚さと、最大界面再結合速度の関係を示す図である。横軸は酸化アルミニウム層18の厚さ(Thickness of AlOx)を示し、横軸はp型半導体層12と酸化アルミニウム層18との界面における最大界面再結合速度(Smax)を示す。窒化アルミニウム層20の厚さが70nmである場合において、酸化アルミニウム層18の厚さを変化させたものである。 FIG. 4 is a diagram showing the relationship between the thickness of the aluminum oxide layer 18 and the maximum interface recombination rate in the solar cell 10 according to the embodiment of the present invention. The horizontal axis represents the thickness (Thickness 層 of AlOx) of the aluminum oxide layer 18, and the horizontal axis represents the maximum interface recombination velocity (Smax) at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18. When the thickness of the aluminum nitride layer 20 is 70 nm, the thickness of the aluminum oxide layer 18 is changed.
 酸化アルミニウム層18の厚さは5nm~20nmにおいて、最大界面再結合速度は、38cm/s以下で一定しており、いずれも従来技術の最大界面再結合速度である300cm/s程度よりも遅い。この傾向は酸化アルミニウム層18の厚さが5nm以下でも変わらない。また、信頼性の観点から、酸化アルミニウム層18の厚さは、1nm以上が望ましい。従って、酸化アルミニウム層18の厚さが、1nm~20nmであれば、最大界面再結合速度が38cm/s以下になり、p型半導体層12とパッシベーション層16との界面における電荷損失が低く抑えられる。 When the thickness of the aluminum oxide layer 18 is 5 nm to 20 nm, the maximum interface recombination rate is constant at 38 cm / s or less, and both are lower than the maximum interface recombination rate of the prior art, about 300 cm / s. This tendency does not change even when the thickness of the aluminum oxide layer 18 is 5 nm or less. From the viewpoint of reliability, the thickness of the aluminum oxide layer 18 is desirably 1 nm or more. Therefore, if the thickness of the aluminum oxide layer 18 is 1 nm to 20 nm, the maximum interface recombination rate is 38 cm / s or less, and charge loss at the interface between the p-type semiconductor layer 12 and the passivation layer 16 can be kept low. .
 図5は、本発明の実施形態に係る太陽電池10における、窒化アルミニウム層20を形成する場合における窒素ガスの分圧比と、界面準位密度との関係を示す図である。横軸は窒素ガスの分圧比を示し、縦軸はp型半導体層12と酸化アルミニウム層18との界面における界面準位密度(Dit)の関係を示す図である。酸化アルミニウム層18の厚さを5nm、窒化アルミニウム層20の厚さを70nmとして形成する場合において、窒素ガスの分圧比を変化させたものである。 FIG. 5 is a diagram showing the relationship between the partial pressure ratio of nitrogen gas and the interface state density when forming the aluminum nitride layer 20 in the solar cell 10 according to the embodiment of the present invention. The horizontal axis shows the partial pressure ratio of nitrogen gas, and the vertical axis shows the relationship of the interface state density (D it ) at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18. In the case of forming the aluminum oxide layer 18 with a thickness of 5 nm and the aluminum nitride layer 20 with a thickness of 70 nm, the partial pressure ratio of the nitrogen gas is changed.
 p型半導体層12と酸化アルミニウム層18との界面における界面準位密度は、この界面の未結合手、欠陥、界面準位の密度を下げる化学的パッシベーション効果の指標であり、小さいほど電荷損失が低く抑えられる。窒素ガスの分圧比が10%以上であれば、界面準位密度が4×1011/cmeV以下であった。パッシベーション層に水素終端された窒化シリコン層を備える従来技術では、p型半導体層と酸化アルミニウム層との界面における界面準位密度は5×1011/cmeV程度である。経済的な理由から、窒素ガスの分圧比を70%より高くすることは現実的ではない。窒素ガスの分圧比が10%~70%であれば、界面準位密度は4×1011/cmeV以下に抑えられ、化学的パッシベーション効果は従来技術と比べて同程度以上である。 The interface state density at the interface between the p-type semiconductor layer 12 and the aluminum oxide layer 18 is an index of a chemical passivation effect that reduces the density of dangling bonds, defects, and interface states at the interface. It can be kept low. When the partial pressure ratio of nitrogen gas was 10% or more, the interface state density was 4 × 10 11 / cm 2 eV or less. In the conventional technique including a silicon nitride layer terminated with hydrogen in the passivation layer, the interface state density at the interface between the p-type semiconductor layer and the aluminum oxide layer is about 5 × 10 11 / cm 2 eV. For economic reasons, it is not practical to make the partial pressure ratio of nitrogen gas higher than 70%. When the partial pressure ratio of nitrogen gas is 10% to 70%, the interface state density is suppressed to 4 × 10 11 / cm 2 eV or less, and the chemical passivation effect is about the same or higher than that of the prior art.
 次に、本発明の実施形態の変形例について図面を用いて説明する。図6は、本発明の実施形態の変形例に係る太陽電池50の断面を示す説明図である。 Next, a modification of the embodiment of the present invention will be described with reference to the drawings. FIG. 6 is an explanatory diagram showing a cross section of a solar cell 50 according to a modification of the embodiment of the present invention.
 太陽電池50は、p型半導体層52、n型半導体層54、パッシベーション層56、窒化シリコン層62、表面電極64及び裏面電極66を備える。 The solar cell 50 includes a p-type semiconductor layer 52, an n-type semiconductor layer 54, a passivation layer 56, a silicon nitride layer 62, a front electrode 64 and a back electrode 66.
 なお、太陽電池50において、p型半導体層52は、太陽電池10におけるp型半導体層12と基本的には同様であり、同様な説明については省略する。また、以下、n型半導体層54はn型半導体層14と、パッシベーション層56はパッシベーション層16と、窒化シリコン層62は窒化シリコン層22と、表面電極64は裏面電極26と、裏面電極66は表面電極24と同様である。 In the solar cell 50, the p-type semiconductor layer 52 is basically the same as the p-type semiconductor layer 12 in the solar cell 10, and the same description is omitted. Hereinafter, the n-type semiconductor layer 54 is the n-type semiconductor layer 14, the passivation layer 56 is the passivation layer 16, the silicon nitride layer 62 is the silicon nitride layer 22, the surface electrode 64 is the back electrode 26, and the back electrode 66 is Similar to the surface electrode 24.
 太陽電池50では、p型半導体層52の厚さは0.1μm~0.8μmであり、n型半導体層54の厚さは0.1mm~0.2mmである。また、n型半導体層54の表面にp型半導体層52が形成されている。 In the solar cell 50, the p-type semiconductor layer 52 has a thickness of 0.1 μm to 0.8 μm, and the n-type semiconductor layer 54 has a thickness of 0.1 mm to 0.2 mm. A p-type semiconductor layer 52 is formed on the surface of the n-type semiconductor layer 54.
 パッシベーション層56は、酸化アルミニウム層58と窒化アルミニウム層60とを備える。パッシベーション層56は、p型半導体層52の表面に形成されている。 The passivation layer 56 includes an aluminum oxide layer 58 and an aluminum nitride layer 60. The passivation layer 56 is formed on the surface of the p-type semiconductor layer 52.
 酸化アルミニウム層58は、p型半導体層52の表面に形成されている。窒化アルミニウム層60は、酸化アルミニウム層58の表面に形成されている。 The aluminum oxide layer 58 is formed on the surface of the p-type semiconductor layer 52. The aluminum nitride layer 60 is formed on the surface of the aluminum oxide layer 58.
 パッシベーション層56には、表面から裏面方向に表面貫通孔70が形成されている。表面貫通孔70は、p型半導体層52が表面電極64と導通するための孔である。 In the passivation layer 56, front surface through holes 70 are formed from the front surface to the back surface. The surface through hole 70 is a hole through which the p-type semiconductor layer 52 is electrically connected to the surface electrode 64.
 窒化シリコン層62は、n型半導体層54の裏面に形成される。また、窒化シリコン層62には、裏面から表面方向に裏面貫通孔68が形成されている。裏面貫通孔68は、n型半導体層54が裏面電極66と導通するための孔である。 The silicon nitride layer 62 is formed on the back surface of the n-type semiconductor layer 54. Further, a back surface through hole 68 is formed in the silicon nitride layer 62 from the back surface to the front surface. The back surface through hole 68 is a hole through which the n-type semiconductor layer 54 is electrically connected to the back surface electrode 66.
 表面電極64は、窒化アルミニウム層60の表面側に形成される。表面電極64の裏面側には、表面貫通孔70を介してp型半導体層52と導通するための表面突部72が形成されている。 The surface electrode 64 is formed on the surface side of the aluminum nitride layer 60. On the back side of the surface electrode 64, a surface protrusion 72 is formed for electrical connection with the p-type semiconductor layer 52 through the surface through hole 70.
 裏面電極66は、窒化シリコン層62の裏面側に形成される。裏面電極66は、裏面貫通孔68を介してn型半導体層54と導通する。 The back electrode 66 is formed on the back side of the silicon nitride layer 62. The back electrode 66 is electrically connected to the n-type semiconductor layer 54 through the back surface through hole 68.
 太陽電池50の製造方法は、太陽電池10の製造方法と同様である。 The manufacturing method of the solar cell 50 is the same as the manufacturing method of the solar cell 10.
 図7は、太陽電池に入射する光の波長と反射率との関係を示す図である。横軸は光の波長(Wavelength)を示し、縦軸は反射率(Reflectance)を示す。実線は、n型シリコン層の表面に対して、下から順番にp型半導体層、酸化アルミニウム層、窒化アルミニウム層が形成された積層体の反射率である。積層体の酸化アルミニウム層の厚さは20nmであり、窒化アルミニウム層の厚さは70nmである。点線は、研磨したシリコン結晶表面の反射率である。 FIG. 7 is a diagram showing the relationship between the wavelength of light incident on the solar cell and the reflectance. The horizontal axis indicates the wavelength (Wavelength) of light, and the vertical axis indicates the reflectance (Reflectance). The solid line represents the reflectance of the stacked body in which the p-type semiconductor layer, the aluminum oxide layer, and the aluminum nitride layer are formed in order from the bottom with respect to the surface of the n-type silicon layer. The thickness of the aluminum oxide layer of the laminate is 20 nm, and the thickness of the aluminum nitride layer is 70 nm. The dotted line is the reflectivity of the polished silicon crystal surface.
 積層体による光の反射率は、光の波長が400nm~1050nmの間では0.1%~51.0%である。一方、研磨したシリコン結晶表面の反射率は、光の波長が400nm~1050nmの間では32.5%~50.6%である。光の波長が400nm付近ではほぼ50%で同様の反射率だが、そこから長波長側に680nm程度まで反射率の差が大きく開き、683nmでは積層体の反射率が0.1%であるのに対して、研磨したシリコン結晶表面の反射率は35.4%である。それより長波長側でも差は大きく開いており、光の波長が1050nm付近では、積層体の反射率が19・5%であるのに対して、研磨したシリコン結晶表面の反射率は37.4%である。 The reflectance of light by the laminate is 0.1% to 51.0% when the wavelength of light is between 400 nm and 1050 nm. On the other hand, the reflectance of the polished silicon crystal surface is 32.5% to 50.6% when the wavelength of light is between 400 nm and 1050 nm. When the wavelength of light is around 400 nm, the reflectivity is almost 50%, but the difference in reflectivity opens up to about 680 nm from the long wavelength side, and at 683 nm, the reflectivity of the laminate is 0.1%. On the other hand, the reflectance of the polished silicon crystal surface is 35.4%. On the longer wavelength side, the difference is greatly widened. When the wavelength of light is around 1050 nm, the reflectance of the laminate is 19.5%, whereas the reflectance of the polished silicon crystal surface is 37.4. %.
 このように、前記積層体では、光の波長が400nm~1050nmの間では、反射率は、研磨されたシリコン結晶と比較して大幅に低い。これは、パッシベーション層が備える酸化アルミニウム層と窒化アルミニウム層とがシリコン系の太陽光発電において、効果的に発電できる波長の光を入射光として積層体内に取り込めることを示している。 Thus, in the laminate, the reflectance is significantly lower than the polished silicon crystal when the wavelength of light is between 400 nm and 1050 nm. This indicates that the aluminum oxide layer and the aluminum nitride layer included in the passivation layer can incorporate light having a wavelength capable of effectively generating power into the stacked body as incident light in silicon-based solar power generation.
 太陽電池10は、p型半導体層12と、n型半導体層14と、前記p型半導体層12に積層されたパッシベーション層16とを備える太陽電池10であって、前記パッシベーション層16は、前記p型半導体層12に対して酸化アルミニウム層18、窒化アルミニウム層20の順に積層された層を少なくとも有する。 The solar cell 10 is a solar cell 10 including a p-type semiconductor layer 12, an n-type semiconductor layer 14, and a passivation layer 16 stacked on the p-type semiconductor layer 12, and the passivation layer 16 includes the p-type semiconductor layer 12. At least a layer in which an aluminum oxide layer 18 and an aluminum nitride layer 20 are stacked in this order on the type semiconductor layer 12 is provided.
 前記酸化アルミニウム層18の厚さが1nm~20nmである。 The thickness of the aluminum oxide layer 18 is 1 nm to 20 nm.
 前記窒化アルミニウム層20の厚さが50nm~100nmである。 The thickness of the aluminum nitride layer 20 is 50 nm to 100 nm.
 前記p型半導体層12と前記パッシベーション層16との界面における電荷の最大界面再結合速度が38cm/s以下である。 The maximum interface recombination rate of charges at the interface between the p-type semiconductor layer 12 and the passivation layer 16 is 38 cm / s or less.
 前記p型半導体層12と前記パッシベーション層16との界面における界面準位密度が4×1011/cmeV以下である。 The interface state density at the interface between the p-type semiconductor layer 12 and the passivation layer 16 is 4 × 10 11 / cm 2 eV or less.
 前記p型半導体層12と前記n型半導体層14とが、単結晶の結晶性を有する。 The p-type semiconductor layer 12 and the n-type semiconductor layer 14 have single crystallinity.
 前記p型半導体層12と前記n型半導体層14のすべてがシリコンである。 The p-type semiconductor layer 12 and the n-type semiconductor layer 14 are all silicon.
 太陽電池10の製造方法は、p型半導体層12と、n型半導体層14と、前記p型半導体層12に積層されたパッシベーション層16とを備える太陽電池10の製造方法であって、前記パッシベーション層16は、前記p型半導体層12に対して酸化アルミニウム層18、窒化アルミニウム層20の順に積層して形成するステップを少なくとも備える。 The manufacturing method of the solar cell 10 is a manufacturing method of the solar cell 10 including the p-type semiconductor layer 12, the n-type semiconductor layer 14, and the passivation layer 16 stacked on the p-type semiconductor layer 12. The layer 16 includes at least a step of forming the aluminum oxide layer 18 and the aluminum nitride layer 20 in this order on the p-type semiconductor layer 12.
 前記酸化アルミニウム層18又は前記窒化アルミニウム層20の少なくとも一方は、反応性スパッタリング法で形成され、前記酸化アルミニウム層18を形成するための反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスと、を少なくとも含む。 At least one of the aluminum oxide layer 18 or the aluminum nitride layer 20 is formed by a reactive sputtering method, and a rare gas as a reaction atmosphere for forming the aluminum oxide layer 18 has a partial pressure ratio of 10% to 50%. Oxygen gas.
 前記酸化アルミニウム層18又は前記窒化アルミニウム層20の少なくとも一方は、反応性スパッタリング法で形成され、前記窒化アルミニウム層20を形成するための反応雰囲気として希ガスと、分圧比が10%~70%の窒素ガスと、を少なくとも含む。 At least one of the aluminum oxide layer 18 or the aluminum nitride layer 20 is formed by a reactive sputtering method, and a rare gas as a reaction atmosphere for forming the aluminum nitride layer 20 has a partial pressure ratio of 10% to 70%. Nitrogen gas.
 前記酸化アルミニウム層18の形成と前記窒化アルミニウム層20の形成とが同一の気密容器で連続して行われる。 The formation of the aluminum oxide layer 18 and the formation of the aluminum nitride layer 20 are continuously performed in the same hermetic container.
 前記酸化アルミニウム層18及び前記窒化アルミニウム層20が反応性スパッタリング法により形成され、反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスとを含む反応雰囲気において、アルミニウムターゲットを用いて、前記酸化アルミニウム層18を形成するステップと、前記酸化アルミニウム層18が形成された後に、前記反応雰囲気から、希ガスと、分圧比が10%~70%の窒素ガスとを含む反応雰囲気に切り替えられ、前記アルミニウムターゲットを用いて、前記窒化アルミニウム層20を形成するステップと、を有する。 The aluminum oxide layer 18 and the aluminum nitride layer 20 are formed by a reactive sputtering method, and an aluminum target is used in a reaction atmosphere containing a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50% as a reaction atmosphere. A step of forming the aluminum oxide layer 18, and after the aluminum oxide layer 18 is formed, the reaction atmosphere is switched to a reaction atmosphere containing a rare gas and a nitrogen gas having a partial pressure ratio of 10% to 70%. And forming the aluminum nitride layer 20 using the aluminum target.
 前記パッシベーション層16が生成された後に、加熱される。 After the passivation layer 16 is formed, it is heated.
 なお、本発明は、上述の実施形態に限らず、本発明の要旨を逸脱することなく、種々の構成を取り得ることはもちろんである。 It should be noted that the present invention is not limited to the above-described embodiment, and various configurations can be taken without departing from the spirit of the present invention.
 また、上記実施形態では、p型半導体層12とn型半導体層14とは、単結晶で形成されているがこれに限定されるものではない。例えば、経済性を考慮して、p型半導体層12とn型半導体層14は、多結晶、非晶質のいずれかの結晶性で形成されても良い。 In the above embodiment, the p-type semiconductor layer 12 and the n-type semiconductor layer 14 are formed of a single crystal, but are not limited thereto. For example, in consideration of economy, the p-type semiconductor layer 12 and the n-type semiconductor layer 14 may be formed of either polycrystalline or amorphous crystallinity.
 また、上記実施形態では、p型半導体層12と前記n型半導体層14とは、すべてがシリコンで形成されているが、一部がシリコンで形成され、その他の部分を他の半導体材料で形成されてもよい。 In the above embodiment, the p-type semiconductor layer 12 and the n-type semiconductor layer 14 are all formed of silicon, but a part thereof is formed of silicon and the other part is formed of another semiconductor material. May be.
 上記実施形態では、太陽電池10では、p型半導体層12と酸化アルミニウム層18との間の層の有無については言及されていないが、酸化シリコン層が形成されても良い。かかる場合には、ステップS3において、雰囲気ガスとして、分圧比が0%~15%の酸素ガスを加えて、0.5nm~2nmの酸化シリコン層が形成されてもよい。また、ステップS3又はS7において、雰囲気ガスとして、HOやO(オゾン)などの酸化種が導入されることによって、又はステップS3の前に、p型半導体層12の裏面が酸化種に被曝されることによって、0.5nm~2nmの酸化シリコン層が形成されてもよい。 In the above embodiment, in the solar cell 10, the presence or absence of a layer between the p-type semiconductor layer 12 and the aluminum oxide layer 18 is not mentioned, but a silicon oxide layer may be formed. In such a case, in step S3, an oxygen gas having a partial pressure ratio of 0% to 15% may be added as an atmospheric gas to form a silicon oxide layer of 0.5 nm to 2 nm. Further, in step S3 or S7, an oxidizing species such as H 2 O or O 3 (ozone) is introduced as an atmospheric gas, or before step S3, the back surface of the p-type semiconductor layer 12 becomes an oxidizing species. A silicon oxide layer with a thickness of 0.5 nm to 2 nm may be formed by exposure.
 上記実施形態では、酸化アルミニウム層18、窒化アルミニウム層20及び窒化シリコン層22は、反応性スパッタリング法で形成されているが、これに限定されるものではない。例えば、CVD法、ALD法、プラズマCVD法、スパッタリング法で形成され、また、反応性スパッタリング法を含めて、これらの組合せの方法で形成されてもよい。 In the above embodiment, the aluminum oxide layer 18, the aluminum nitride layer 20, and the silicon nitride layer 22 are formed by a reactive sputtering method, but are not limited thereto. For example, it may be formed by a CVD method, an ALD method, a plasma CVD method, a sputtering method, or a combination of these methods including a reactive sputtering method.
 また、上記実施形態では、前記酸化アルミニウム層18の形成と前記窒化アルミニウム層20の形成とが同一の気密容器で連続して行われているが、別の気密容器で行われてもよい。 In the above embodiment, the formation of the aluminum oxide layer 18 and the formation of the aluminum nitride layer 20 are continuously performed in the same hermetic container, but may be performed in different hermetic containers.
10、50…太陽電池
12、52…p型半導体層
14、54…n型半導体層
16、56…パッシベーション層
18、58…酸化アルミニウム層
20、60…窒化アルミニウム層
22、62…窒化シリコン層
24、64…表面電極
26、66…裏面電極
28、68…裏面貫通孔
30、70…表面貫通孔
32…裏面突部
72…表面突部
DESCRIPTION OF SYMBOLS 10, 50 ... Solar cell 12, 52 ... p- type semiconductor layer 14, 54 ... n- type semiconductor layer 16, 56 ... Passivation layer 18, 58 ... Aluminum oxide layer 20, 60 ... Aluminum nitride layer 22, 62 ... Silicon nitride layer 24 , 64... Surface electrodes 26 and 66... Back surface electrodes 28 and 68... Back surface through- holes 30 and 70.

Claims (21)

  1.  p型半導体層と、n型半導体層と、前記p型半導体層に積層されたパッシベーション層とを備える太陽電池であって、
     前記パッシベーション層は、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層された層を少なくとも有することを特徴とする太陽電池。
    A solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer,
    The said passivation layer has at least the layer laminated | stacked in order of the aluminum oxide layer and the aluminum nitride layer with respect to the said p-type semiconductor layer, The solar cell characterized by the above-mentioned.
  2.  請求項1記載の太陽電池において、
     前記p型半導体層と、前記酸化アルミニウム層との間に、酸化シリコン層を有することを特徴とする太陽電池。
    The solar cell according to claim 1,
    A solar cell comprising a silicon oxide layer between the p-type semiconductor layer and the aluminum oxide layer.
  3.  請求項1又は2記載の太陽電池において、
     前記酸化アルミニウム層の厚さが1nm~20nmであることを特徴とする太陽電池。
    The solar cell according to claim 1 or 2,
    A solar cell, wherein the aluminum oxide layer has a thickness of 1 nm to 20 nm.
  4.  請求項2記載の太陽電池において、
     前記酸化シリコン層の厚さが0.5nm~2nmであることを特徴とする太陽電池。
    The solar cell according to claim 2,
    A solar cell, wherein the silicon oxide layer has a thickness of 0.5 nm to 2 nm.
  5.  請求項1~4のいずれか1項に記載の太陽電池において、
     前記窒化アルミニウム層の厚さが50nm~100nmであることを特徴とする太陽電池。
    The solar cell according to any one of claims 1 to 4,
    A solar cell, wherein the aluminum nitride layer has a thickness of 50 nm to 100 nm.
  6.  請求項1~5のいずれか1項に記載の太陽電池において、
     前記p型半導体層と前記パッシベーション層との界面における電荷の最大界面再結合速度が38cm/s以下であることを特徴とする太陽電池。
    The solar cell according to any one of claims 1 to 5,
    A solar cell, wherein a maximum interface recombination velocity of charges at an interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
  7.  請求項1~6のいずれか1項に記載の太陽電池において、
     前記p型半導体層と前記パッシベーション層との界面における界面準位密度が4×1011/cmeV以下であることを特徴とする太陽電池。
    The solar cell according to any one of claims 1 to 6,
    A solar cell, wherein an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 × 10 11 / cm 2 eV or less.
  8.  請求項1~7のいずれか1項に記載の太陽電池において、
     前記p型半導体層と前記n型半導体層とが、単結晶、多結晶、非晶質のいずれかの結晶性を有することを特徴とする太陽電池。
    The solar cell according to any one of claims 1 to 7,
    The solar cell, wherein the p-type semiconductor layer and the n-type semiconductor layer have a crystallinity of single crystal, polycrystal, or amorphous.
  9.  請求項1~8のいずれか1項に記載の太陽電池において、
     前記p型半導体層と前記n型半導体層の一部又はすべてがシリコンであることを特徴とする太陽電池。
    The solar cell according to any one of claims 1 to 8,
    Part or all of the p-type semiconductor layer and the n-type semiconductor layer is silicon.
  10.  p型半導体層と、n型半導体層と、前記p型半導体層に積層されたパッシベーション層とを備える太陽電池の製造方法であって、
     前記パッシベーション層は、前記p型半導体層に対して酸化アルミニウム層、窒化アルミニウム層の順に積層して形成するステップ
     を少なくとも備えることを特徴とする太陽電池の製造方法。
    A method for manufacturing a solar cell comprising a p-type semiconductor layer, an n-type semiconductor layer, and a passivation layer stacked on the p-type semiconductor layer,
    The passivation layer comprises at least a step of forming an aluminum oxide layer and an aluminum nitride layer in this order on the p-type semiconductor layer.
  11.  請求項10記載の太陽電池の製造方法において、
     前記酸化アルミニウム層は、CVD法、ALD法、プラズマCVD法、スパッタリング法、反応性スパッタリング法のいずれかの又はこれらの組合せの方法で形成され、
     前記酸化アルミニウム層の厚さが1nm~20nmであることを特徴とする太陽電池の製造方法。
    In the manufacturing method of the solar cell of Claim 10,
    The aluminum oxide layer is formed by a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof,
    A method for producing a solar cell, wherein the aluminum oxide layer has a thickness of 1 nm to 20 nm.
  12.  請求項10又は11記載の太陽電池の製造方法において、
     前記p型半導体層と前記酸化アルミニウム層との間に、酸化シリコン層が形成されることを特徴とする太陽電池の製造方法。
    In the manufacturing method of the solar cell of Claim 10 or 11,
    A method for manufacturing a solar cell, wherein a silicon oxide layer is formed between the p-type semiconductor layer and the aluminum oxide layer.
  13.  請求項12記載の太陽電池の製造方法において、
     前記酸化シリコン層の厚さが0.5nm~2nmであることを特徴とする太陽電池の製造方法。
    In the manufacturing method of the solar cell of Claim 12,
    A method for producing a solar cell, wherein the silicon oxide layer has a thickness of 0.5 nm to 2 nm.
  14.  請求項10~13のいずれか1項に記載の太陽電池の製造方法において、
     前記窒化アルミニウム層は、CVD法、ALD法、プラズマCVD法、スパッタリング法、反応性スパッタリング法のいずれかの又はこれらの組合せの方法で形成され、
     前記窒化アルミニウム層の厚さが50nm~100nmであることを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 13,
    The aluminum nitride layer is formed by a CVD method, an ALD method, a plasma CVD method, a sputtering method, a reactive sputtering method, or a combination thereof,
    A method for producing a solar cell, wherein the aluminum nitride layer has a thickness of 50 nm to 100 nm.
  15.  請求項10~14のいずれか1項に記載の太陽電池の製造方法において、
     前記酸化アルミニウム層又は前記窒化アルミニウム層の少なくとも一方は、反応性スパッタリング法で形成され、前記酸化アルミニウム層を形成するための反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスと、を少なくとも含むことを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 14,
    At least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method. As a reaction atmosphere for forming the aluminum oxide layer, a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50% are used. A method for producing a solar cell, comprising:
  16.  請求項10~15のいずれか1項に記載の太陽電池の製造方法において、
     前記酸化アルミニウム層又は前記窒化アルミニウム層の少なくとも一方は、反応性スパッタリング法で形成され、前記窒化アルミニウム層を形成するための反応雰囲気として希ガスと、分圧比が10%~70%の窒素ガスと、を少なくとも含むことを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 15,
    At least one of the aluminum oxide layer or the aluminum nitride layer is formed by a reactive sputtering method, and a noble gas as a reaction atmosphere for forming the aluminum nitride layer and a nitrogen gas having a partial pressure ratio of 10% to 70% A method for producing a solar cell, comprising:
  17.  請求項10~14のいずれか1項に記載の太陽電池の製造方法において、
     前記酸化アルミニウム層の形成と前記窒化アルミニウム層の形成とが同一の気密容器で連続して行われることを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 14,
    The method for producing a solar cell, wherein the formation of the aluminum oxide layer and the formation of the aluminum nitride layer are continuously performed in the same hermetic container.
  18.  請求項10~17のいずれか1項に記載の太陽電池の製造方法において、
     前記酸化アルミニウム層及び前記窒化アルミニウム層が反応性スパッタリング法により形成され、反応雰囲気として希ガスと、分圧比が10%~50%の酸素ガスとを含む反応雰囲気において、アルミニウムターゲットを用いて、前記酸化アルミニウム層を形成するステップと、
     前記酸化アルミニウム層が形成された後に、前記反応雰囲気から、希ガスと、分圧比が10%~70%の窒素ガスとを含む反応雰囲気に切り替えられ、前記アルミニウムターゲットを用いて、前記窒化アルミニウム層を形成するステップと、
     を有することを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 17,
    The aluminum oxide layer and the aluminum nitride layer are formed by a reactive sputtering method, and the reaction atmosphere includes a rare gas and an oxygen gas having a partial pressure ratio of 10% to 50% using an aluminum target. Forming an aluminum oxide layer;
    After the aluminum oxide layer is formed, the reaction atmosphere is switched to a reaction atmosphere containing a rare gas and a nitrogen gas having a partial pressure ratio of 10% to 70%, and the aluminum nitride layer is formed using the aluminum target. Forming a step;
    A method for producing a solar cell, comprising:
  19.  請求項10~18のいずれか1項に記載の太陽電池の製造方法において、
     前記パッシベーション層が生成された後に、加熱されることを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 18,
    A method of manufacturing a solar cell, wherein the solar cell is heated after the passivation layer is formed.
  20.  請求項10~19のいずれか1項に記載の太陽電池の製造方法において、
     前記p型半導体層と前記パッシベーション層との界面における電荷の最大界面再結合速度が38cm/s以下であることを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 19,
    The method for manufacturing a solar cell, wherein a maximum interface recombination rate of charges at an interface between the p-type semiconductor layer and the passivation layer is 38 cm / s or less.
  21.  請求項10~20のいずれか1項に記載の太陽電池の製造方法において、
     前記p型半導体層と前記パッシベーション層との界面における界面準位密度が4×1011/cmeV以下であることを特徴とする太陽電池の製造方法。
    The method for manufacturing a solar cell according to any one of claims 10 to 20,
    A method for manufacturing a solar cell, wherein an interface state density at an interface between the p-type semiconductor layer and the passivation layer is 4 × 10 11 / cm 2 eV or less.
PCT/JP2016/060029 2015-03-31 2016-03-29 Solar cell and method for manufacturing solar cell WO2016158906A1 (en)

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