WO2016155648A1 - 一种逐波限流方法、装置和逆变电路 - Google Patents

一种逐波限流方法、装置和逆变电路 Download PDF

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WO2016155648A1
WO2016155648A1 PCT/CN2016/078102 CN2016078102W WO2016155648A1 WO 2016155648 A1 WO2016155648 A1 WO 2016155648A1 CN 2016078102 W CN2016078102 W CN 2016078102W WO 2016155648 A1 WO2016155648 A1 WO 2016155648A1
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current
inverter
wave
timing
energy storage
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PCT/CN2016/078102
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French (fr)
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倪同
刘中伟
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力博特公司
倪同
刘中伟
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels

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  • the present invention relates to the field of power electronics, and in particular, to a wave-by-wave current limiting method, apparatus, and inverter circuit.
  • Inverters are a critical part of power electronics applications such as uninterruptible power supplies, new energy generation, active power filtering, and motor drives.
  • the commonly used three-level inverters are shown in Figure 1 and Figure 2.
  • Figure 1 shows the T-type three-level inverter.
  • Figure 2 shows the I-type three-level inverter.
  • the switch Q1 and the switch Q2 are The main pipe, switch tube Q3 and switch tube Q4 are auxiliary tubes, capacitor C1 is the filter capacitor, capacitor C2 is the positive bus capacitor, capacitor C3 is the negative bus capacitor, and inductor L1 is the energy storage inductor.
  • the T-type three-level inverter shown in FIG. 1 and the I-type three-level inverter shown in FIG. 2 can adopt the control timing shown in FIG. 3, in the positive half cycle of the output voltage, that is, the first period and In the second period, the switching tube Q1 and the switching tube Q3 are complementary to the high frequency chopping, the switching tube Q4 is always open, and the switching tube Q2 is normally off; in the negative half cycle of the output voltage, that is, the third period and the IV period, the switching tube Q2 and the switch
  • the tube Q4 is complementary to the high frequency chopping, the switching tube Q3 is always open, and the switching tube Q1 is normally broken.
  • each of the switching tubes in the inverter is sealed.
  • the switch Q1, the inductor L1, the capacitor C1 the load is connected in parallel with the capacitor C1 back to the N line; when the current on the inductor L1 is greater than or equal to the current of the wave-by-wave limit, each switch in the inverter
  • the tubes are all sealed, so the current returns from the inductor L1, the capacitor C1, the N line, the capacitor C3, and the body diode of the switch Q2 to the inductor L1. It can be seen that the energy stored by the inductor L1 is stored in the capacitor C3, which causes the voltage of the negative bus BUS- to rise, which is the key cause of the busbar high voltage failure.
  • the duty cycle of the high-frequency chopping switch Q1 is 84.6%, so the demagnetization
  • the inverter T-type three-level inverter or the I-type three-level inverter is sealed by the existing wave-by-wave current limiting method, since all the switching tubes are sealed, this It may cause high voltage failure of the busbar and may also affect the ability of the inverter to supply power to the load.
  • the embodiment of the invention provides a wave-by-wave current limiting method, device and an inverter circuit, which are used to solve the problem that when the inverter is sealed by the existing wave-by-wave current limiting method, since all the switching tubes are sealed, this Possible This can cause busbar high voltage failures and can also affect the ability of the inverter to power the load.
  • a wave-by-wave current limiting method provided by an embodiment of the present invention includes:
  • the first wave timing is the energy storage during the operation of the inverter
  • a determining module configured to determine a current on the energy storage inductor in the inverter that is greater than or equal to a current at the first current limit point, and less than a current at the second current limit point;
  • a current limiting module configured to block a main tube in the inverter, and send a wave to the auxiliary pipe in the inverter according to a first wave timing; the first wave timing is working for the inverter The timing of the drive signal of the auxiliary pipe in the inverter when the current on the storage inductor is less than the current at the first current limit.
  • the inverter circuit provided by the embodiment of the invention includes a current limiting device and an inverter
  • the current limiting device is configured to: when determining that the current in the energy storage inductor of the inverter is greater than or equal to the current of the first current limiting point and less than the current of the second current limiting point, the main wave in the inverter is sealed And transmitting a wave to the auxiliary pipe in the inverter according to the first wave timing; the first wave timing is that the current on the energy storage inductor is smaller than the first current limit during operation of the inverter The timing of the drive signal of the auxiliary pipe in the inverter when the current of the point is;
  • the inverter is configured to convert direct current into an alternating current output under the control of the current limiting device.
  • the wave-by-wave current limiting method, device and inverter circuit provided by the embodiments of the present invention are in the inverter When the current on the energy storage inductor is greater than or equal to the current of the first current limit point and less than the current of the second current limit point, the main wave in the inverter is sealed and directed to the inverter according to the first wave timing.
  • the auxiliary wave is generated; the first wave timing is a driving of the auxiliary pipe in the inverter when the current on the energy storage inductor is less than the current of the first current limit point during operation of the inverter.
  • the timing of the signal that is, the normal wave to the auxiliary pipe in the inverter, therefore, the inverter can achieve zero-level freewheeling, thereby avoiding the busbar high voltage failure and avoiding the increase of the inverter to supply the load. ability.
  • FIG. 1 is a schematic structural view of a T-type three-level inverter in the prior art
  • FIG. 2 is a schematic structural view of a first-type three-level inverter circuit in the prior art
  • FIG. 3 is a schematic diagram of an output voltage of a T-type three-level inverter or an I-type three-level inverter, a current on a storage inductor, and a drive signal of the switch;
  • FIG. 4 is a flowchart of a wave-by-wave current limiting method according to an embodiment of the present invention.
  • FIG. 5 is a second flowchart of a wave-by-wave current limiting method according to an embodiment of the present disclosure
  • FIG. 6 is a third flowchart of a wave-by-wave current limiting method according to an embodiment of the present invention.
  • FIG. 7 is a schematic diagram of current limiting by a wave-by-wave current limiting method according to an embodiment of the present invention and a current on a storage inductor when current limiting current is used, and a timing diagram of driving signals of the switching tube in the inverter;
  • FIG. 8 is a structural diagram of a wave-by-wave current limiting device according to an embodiment of the present invention.
  • FIG. 9 is a structural diagram of an inverter circuit according to an embodiment of the present invention.
  • FIG. 10 is a schematic block diagram of an inverter circuit according to an embodiment of the present invention when the current limiting device is located outside the control system of the inverter.
  • the wave-by-wave current limiting method, device and inverter circuit provided by the embodiments of the present invention, because the current on the energy storage inductor in the inverter is greater than or equal to the current of the first current limiting point and less than the current of the second current limiting point
  • the inverter can realize zero-level freewheeling, thereby avoiding the high voltage fault of the bus and avoiding the inverter. The ability to power the load.
  • a wave-by-wave current limiting method provided by the embodiment of the present invention, as shown in FIG. 4, includes:
  • S401 Determine a current that is greater than or equal to a current at a first current limit point of the energy storage inductor in the inverter, and is smaller than a current of the second current limit point;
  • the main wave in the inverter is sealed and sent to the auxiliary pipe in the inverter according to the first wave timing; the first wave timing is as described in the operation of the inverter.
  • the inverter The supervisor in the middle, that is, the switching tube Q1 and the switching tube Q2 are sealed, and the auxiliary tubes in the inverter, that is, the switching tube Q3 and the switching tube Q4, are normally waved, and the current is from the inductor L1, the capacitor C1, the N line, and the switching tube Q3.
  • the body diode and the switch tube Q4 return to the inductor L1 for freewheeling.
  • the freewheeling current is zero level freewheeling, that is, the left potential point of the inductor L1 is a neutral point, and the inductor current does not flow through the negative bus capacitor. That is, capacitor C3. Since the inductor current will not flow Capacitor C3, therefore, the voltage of the negative bus BUS- will not rise, and will not cause high voltage failure of the bus.
  • the demagnetization time of the energy storage inductor when the main wave in the inverter is sealed and the auxiliary pipe in the inverter is normally waved (308.75*) T) less than the current wave-by-wave current limiting method, the demagnetization time (669.75*T) of the energy storage inductor when each switch tube in the inverter is sealed, and therefore, the method provided by the embodiment of the present invention is adopted.
  • the wave current limiting method the falling amplitude of the current on the energy storage inductor when the main wave in the inverter is sealed and sent to the auxiliary pipe in the inverter is smaller than the current wave-by-wave current limiting method.
  • the method is to reduce the current drop of the energy storage inductor when each switch tube in the inverter is sealed.
  • the wave-by-wave current limiting method shown in FIG. 4 can realize zero-level freewheeling when current limiting (the main wave in the inverter is sealed and the auxiliary pipe in the inverter is normally waved), which guarantees The ability of the inverter to power the load.
  • the current at the first current limit can be set according to the load carried by the inverter. It is assumed that the air switch connected to a certain load of the inverter has a current greater than or equal to A, and the air switch can be tripped after a certain period of time t1.
  • the current limit point in the prior art is B, and the first current limit point is Current can be set Less than B.
  • the current on the energy storage inductor in the inverter is greater than or equal to B, and the inverter starts current limiting. If current is limited, the current is limited.
  • the wave-by-wave current limiting method provided by the embodiment of the present invention, as shown in FIG. 5, further includes after S402:
  • S502 Send a wave to the main controller in the inverter according to the second wave timing; the second wave timing is that the current on the energy storage inductor is less than the first current limit point during the operation of the inverter The current is the timing of the drive signal of the main controller in the inverter.
  • the wave-by-wave current limiting method provided by the embodiment of the present invention is as shown in FIG. 6, and further includes:
  • S602 Sealing the main tube in the inverter, and sealing the auxiliary tube in the inverter, thereby further protecting the power device in the inverter.
  • FIG. 7 is a schematic diagram of current limiting by a wave-by-wave current limiting method according to an embodiment of the present invention and a current on a storage inductor when current limiting current is used, and a timing diagram of driving signals of the switching transistor in the inverter.
  • Figure 7 shows an example in which the inverter operates in the positive half cycle of the output voltage, and assumes that the prior art is employed.
  • the current at the current limit point is equal to the current at the first current limit point. It can be seen from FIG. 7 that when the current on the energy storage inductor is greater than or equal to the current of the first current limit point, the amplitude of the current drop on the energy storage inductor is limited by the wave-by-wave current limiting method provided by the embodiment of the present invention.
  • the switching tube Q1 and the switching tube The Q2 is sealed (t0 to t1 and t4 to t6), and the wave-by-wave current limiting method provided by the embodiment of the present invention continuously sends waves to the switch Q4 and the switch Q3 (t0 to t1) And from time t4 to time t6), when the current limiting current is used, both the switching tube Q4 and the switching tube Q3 are sealed (t0 to t1 and t4 to t6).
  • the current on the energy storage inductor increases to the current at the second current limit point, and the switching transistor Q1, the switching transistor Q2, the switching transistor Q3, and the switching transistor Q4 are all sealed.
  • the time period from time t3 to time t4 is a time period within the positive half cycle of the inverter output voltage.
  • the current on the energy storage inductor after the current limiting by the wave-by-wave current limiting method provided by the embodiment of the present invention is again increased to the current of the first current limiting point.
  • the current of the first current limit point and the current of the second current limit point are both smaller than the maximum current value that the switch tube in the inverter can withstand.
  • the above-mentioned inverters may be T-type three-level inverters, I-type three-level inverters, full-bridge inverters, and other multi-level inverters.
  • the embodiment of the present invention further provides a wave-by-wave current limiting device. Since the principle of solving the problem is similar to the foregoing wave-by-wave current limiting method, the implementation of the device can be implemented by referring to the foregoing method, and repeating I won't go into details here.
  • the wave-by-wave current limiting device provided by the embodiment of the present invention, as shown in FIG. 8, includes:
  • the determining module 81 is configured to determine that the current on the energy storage inductor in the inverter is greater than or equal to the current of the first current limit point, and is smaller than the current of the second current limit point;
  • the current limiting module 82 is configured to: seal the main tube in the inverter, and send a wave to the auxiliary pipe in the inverter according to the first wave timing; the first wave timing is the inverter The timing of the driving signal of the auxiliary pipe in the inverter when the current on the energy storage inductor is smaller than the current of the first current limiting point during operation.
  • the determining module 81 is further configured to: determine that the current on the energy storage inductor is greater than or equal to the current of the second current limiting point;
  • the current limiting module 82 is further configured to block the main tube in the inverter and seal the auxiliary tube in the inverter.
  • the determining module 81 is further configured to: after the current limiting module encapsulates the main control in the inverter, and sends a wave to the auxiliary pipe in the inverter according to the first wave timing, determining the energy storage.
  • the current on the inductor is less than the current at the first current limit;
  • the current limiting module 82 is further configured to send a wave to the main controller in the inverter according to a second wave timing; the second wave timing is a current on the energy storage inductor during operation of the inverter The timing of the drive signal of the main pipe in the inverter when the current is less than the current of the first current limit point.
  • the magnitude of the current of the first current limiting point is set according to the load carried by the inverter.
  • the inverter circuit provided by the embodiment of the present invention, as shown in FIG. 9, includes a current limiting device 91 and an inverter 92;
  • the current limiting device 91 is configured to: when determining that the current in the energy storage inductor of the inverter is greater than or equal to the current of the first current limiting point and less than the current of the second current limiting point, the main wave in the inverter is sealed, And transmitting a wave to the auxiliary pipe in the inverter according to the first wave timing; the first wave timing is that the inverter works The timing of the driving signal of the auxiliary pipe in the inverter when the current on the energy storage inductor is less than the current of the first current limiting point;
  • the inverter 92 is configured to convert the direct current into an alternating current output under the control of the current limiting device.
  • the current limiting device 91 is further configured to: when determining that the current on the energy storage inductor is greater than or equal to the current of the second current limiting point, sealing the main conductor in the inverter, and the inverter The auxiliary tube in the wave is sealed.
  • the current limiting device 91 is further configured to determine the energy storage inductance after the main wave is sealed in the inverter and is sent to the auxiliary pipe in the inverter according to the first wave timing.
  • the second wave timing is applied to the main pipe in the inverter; the second wave timing is the energy storage inductance during the operation of the inverter The timing of the drive signal of the main pipe in the inverter when the current on the current is less than the current at the first current limit point.
  • the magnitude of the current of the first current limiting point is adjustable and can be set according to the load carried by the inverter.
  • the current limiting device can be implemented by software inside the control system of the inverter or outside the control system of the inverter.
  • the current limiting device can be implemented by a microcontroller or by a programmable device (such as CPLD, FPGA, DSP) implementation.
  • the current limiting device When the current limiting device is located outside the control system of the inverter, the principle block diagram of the inverter circuit provided by the embodiment of the present invention is shown in FIG. 10, and the current limiting device generates the control system of the inverter according to the current on the energy storage inductor.
  • the driving signals of the respective switching tubes in the inverter are processed, and the driving signals of the processed switching tubes are outputted from the driving boards of the main circuit of the switching tubes in the resin inverter to drive the respective switching tubes.
  • the embodiments of the present invention can be implemented by hardware, or can be implemented by means of software plus necessary general hardware platform.
  • the technical solution of the embodiment of the present invention may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a USB flash drive, a mobile hard disk, etc.).
  • a number of instructions are included to cause a computer device (which may be a personal computer, server, or network device, etc.) to perform the methods described in various embodiments of the present invention.
  • modules in the apparatus in the embodiments may be distributed in the apparatus of the embodiment according to the description of the embodiments, or the corresponding changes may be located in one or more apparatuses different from the embodiment.
  • the modules of the above embodiments may be combined into one module, or may be further split into multiple sub-modules.

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Abstract

一种逐波限流方法、装置及逆变电路，用以解决采用现有的逐波限流方法对逆变器进行封波时，由于各个开关管全部封波，这可能会导致母线高压故障，还可能影响逆变器为负载供电的能力的问题。该方法包括：确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流(S401)；将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波，所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序(S402)；并确定所述储能电感上电流大于等于第二限流点的电流(S601)；将所述逆变器中的主管封波，并将所述逆变器中的辅管封波(S602)。

Description

一种逐波限流方法、装置和逆变电路
本申请要求于2015年3月31日提交中国专利局、申请号为201510150032.4、发明名称为“一种逐波限流方法、装置和逆变电路”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电力电子技术领域，尤其涉及一种逐波限流方法、装置和逆变电路。
背景技术
不间断电源、新能源发电、有源电力滤波、电机驱动等电力电子应用领域，逆变器都是十分关键的部分。目前常用的三电平逆变器如图1和图2所示，图1为T型三电平逆变器，图2为I型三电平逆变器，开关管Q1和开关管Q2为主管，开关管Q3和开关管Q4为辅管，电容C1为滤波电容，电容C2为中正母线电容，电容C3为负母线电容，电感L1为储能电感。
图1所示的T型三电平逆变器和图2所示的I型三电平逆变器均可采用图3所示的控制时序，在输出电压的正半周，即第I时段和第II时段，开关管Q1和开关管Q3互补高频斩波，开关管Q4常通，开关管Q2常断；在输出电压的负半周，即第III时段和第IV时段，开关管Q2和开关管Q4互补高频斩波，开关管Q3常通，开关管Q1常断。
目前的逆变器控制中，在逆变器的限流信号触发后，逆变器中的各个开关管均封波。以T型三电平逆变器为例，在输出电压的正半周，在限流前，电流 从正母线BUS+、开关管Q1、电感L1、电容C1(负载与电容C1并联)回到N线；当电感L1上的电流大于等于逐波限流点的电流时，逆变器中的各个开关管均封波，因此，电流从电感L1、电容C1、N线、电容C3、开关管Q2的体二极管，回到电感L1。由此可见，电感L1储存的能量存入了电容C3，这会使得负母线BUS-的电压升高，这就是导致母线高压故障关键诱因。
另外，在封波后，由于电感承受的去磁电压为VL_1＝-Vbus-Vo＝-705V(假设母线电压Vbus为380V，输出电压Vo峰值＝230*1.414＝325V)，此时，电感L1承受的电压接近两倍的母线电压，远大于等于正常工作模式下去磁电压-Vbus+Vo＝55，在正常工作模式下时高频斩波的开关管Q1的占空比为84.6％，所以去磁时间为T*(1-84.6％)＝0.144*T，因此，去磁的伏秒值V*S＝-55*0.144*T＝7.92*T，其中T为开关管的开关周期。而在限流后，开关管Q1的占空比一定低于84.6％，甚至低至5％，所以去磁的伏秒值为V*S＝705*T*(1-5％)＝705*0.95*T＝669.75*T。这会导致输出电感L1上的电流的迅速下降，甚至降到零，出现很大的电流跌落，电感L1上的电流有很大的电流纹波，同时输出电压也急速下降。因此，逆变器输出的电压和电流的平均值都会很小，这会极大的影响逆变器为负载供电的能力。
综上所述，在采用现有的逐波限流的方法对逆变T型三电平逆变器或者I型三电平逆变器进行封波时，由于各个开关管全部封波，这可能会导致母线高压故障，还可能影响逆变器为负载供电的能力。
发明内容
本发明实施例提供了一种逐波限流方法、装置及逆变电路，用以解决采用现有的逐波限流方法对逆变器进行封波时，由于各个开关管全部封波，这可能 会导致母线高压故障，还可能影响逆变器为负载供电的能力的问题。
基于上述问题，本发明实施例提供的一种逐波限流方法，包括：
确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
本发明实施例提供的一种逐波限流装置，包括：
确定模块，用于确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
限流模块，用于将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
本发明实施例提供的逆变电路，包括限流装置和逆变器；
所述限流装置用于，在确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流时，将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序；
所述逆变器，用于在所述限流装置的控制下将直流电转换为交流电输出。
本发明实施例的有益效果包括：
本发明实施例提供的逐波限流方法、装置及逆变电路，由于在逆变器中的 储能电感上的电流大于等于第一限流点的电流、且小于第二限流点的电流时，将逆变器中的主管封波，并按照第一发波时序向该逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序，也就是说，向该逆变器中的辅管正常发波，因此，逆变器可以实现零电平续流，从而避免母线高压故障，并避免提高逆变器为负载供电的能力。
附图说明
图1为现有技术中的T型三电平逆变器的结构示意图；
图2为现有技术中的I型三电平逆变电路的结构示意图；
图3为T型三电平逆变器或者I型三电平逆变器的输出电压、储能电感上的电流以及开关管的驱动信号的示意图；
图4为本发明实施例提供的逐波限流方法的流程图之一；
图5为本发明实施例提供的逐波限流方法的流程图之二；
图6为本发明实施例提供的逐波限流方法的流程图之三；
图7为采用本发明实施例提供的逐波限流方法限流和采用现有技术限流时储能电感上的电流的示意图，以及逆变器中的开关管的驱动信号的时序图；
图8为本发明实施例提供的逐波限流装置的结构图；
图9为本发明实施例提供的逆变电路结构图；
图10为限流装置位于逆变器的控制系统以外时，本发明实施例提供的逆变电路的原理框图。
具体实施方式
本发明实施例提供的逐波限流方法、装置及逆变电路，由于在逆变器中的储能电感上的电流大于等于第一限流点的电流、且小于第二限流点的电流时，将逆变器中的主管封波，并向该逆变器中的辅管正常发波，因此，逆变器可以实现零电平续流，从而避免母线高压故障，并避免提高逆变器为负载供电的能力。
下面结合说明书附图，对本发明实施例提供的一种逐波限流方法、装置及逆变电路的具体实施方式进行说明。
本发明实施例提供的一种逐波限流方法，如图4所示，包括：
S401、确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
S402、将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
显然第一限流点的电流小于第二限流点的电流。
以T型三电平逆变器为例，当逆变器中的储能电感，电感L1上的电流小于第一限流点的电流时，若正母线电压BUS+、开关管Q1、电感L1、电容C1，N线构成回路，此时，如果逆变器中的储能电感上的电流增大，直至大于等于第一限流点的电流、且小于第二限流点的电流，逆变器中的主管，即开关管Q1和开关管Q2封波，逆变器中的辅管，即开关管Q3和开关管Q4正常发波，电流从电感L1、电容C1、N线、开关管Q3的体二极管和开关管Q4，回到电感L1进行续流，此时的续流为零电平续流，即电感L1的左边电位点是中性点，并且电感电流不会流过负母线电容，即电容C3。由于电感电流不会流过 电容C3，因此，负母线BUS-的电压不会升高，不会导致母线高压故障。
并且，由于零电平续流，因此，电感承受的去磁电压为VL_1＝-Vo＝-325V(假设输出电压Vo峰值＝230*1.414＝325V)，即输出的最高电压，电感L1在正常工作模式下去磁电压-Vbus+Vo＝55，在正常工作模式下时高频斩波的开关管Q1的占空比为大约84.6％，所以去磁时间为T*(1-84.6％)＝0.144*T，因此，去磁的伏秒值V*S＝-55*0.144*T＝7.92*T，其中T为开关管的开关周期。而在逆变器中的主管封波后，零电平续流时，开关管Q1的占空比一定低于84.6％，假设低至5％，此时去磁的伏秒值为V*S＝325*T*(1-5％)＝325*0.95*T＝308.75*T。
因此，采用本发明实施例提供的逐波限流方法后，将逆变器中的主管封波、并向该逆变器中的辅管正常发波时储能电感的去磁时间(308.75*T)，小于采用现有的逐波限流的方法，将逆变器中各个开关管均封波时储能电感的去磁时间(669.75*T)，因此，采用本发明实施例提供的逐波限流方法后，将逆变器中的主管封波、并向该逆变器中的辅管正常发波时储能电感上的电流的跌落幅度，小于采用现有的逐波限流的方法，将逆变器中各个开关管均封波时储能电感的电流的跌落幅度。
图4所示的逐波限流方法在限流(将逆变器中的主管封波，并向逆变器中的辅管正常发波)时，可以实现零电平续流，这保证了逆变器为负载供电的能力。
第一限流点的电流可以根据逆变器所带的负载来设置。假设逆变器所带的某一路负载连接的空气开关在电流大于等于A，且持续一定时长t1后，空气开关才能跳开，采用现有技术时的限流点为B，第一限流点的电流可以设置的 小于B。在逆变器所带的一路负载发生短路时，采用现有技术限流时，逆变器中的储能电感上的电流大于等于B后，逆变器开始限流，如果限流后，电流持续大于等于B一段时间t2(由于限流点的电流B较大，因此，逆变器长时间工作在限流状态时，损耗较大，逆变器在限流状态下的持续时间就要减小)后，为了保护逆变器中的功率器件，逆变器会停止工作，如果t2小于t1，那么发生短路的负载所连接的空气开关不会跳开；如果采用本发明实施例提供的逐波限流方法限流时，第一限流点的电流小于B，因此，逆变器可以在限流状态下多工作一会，这样更有利于发生短路的负载所连接的空气开关跳开，从而使得故障切除，逆变器可以工作更长的时间。
进一步地，本发明实施例提供的逐波限流方法，如图5所示，在S402之后还包括：
S501、确定所述逆变器中的储能电感上的电流小于第一限流点的电流；
S502、按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
进一步地，本发明实施例提供的逐波限流方法如图6所示，还包括：
S601、确定逆变器中的储能电感上电流大于等于第二限流点的电流；
S602、将所述逆变器中的主管封波，并将所述逆变器中的辅管封波，从而进一步保护逆变器中的功率器件。
图7为采用本发明实施例提供的逐波限流方法限流和采用现有技术限流时储能电感上的电流的示意图，以及逆变器中的开关管的驱动信号的时序图。图7以逆变器工作在输出电压的正半周期为例进行说明，并假设采用现有技术 时的限流点的电流与第一限流点的电流相等。从图7中可以看出，当储能电感上的电流大于等于第一限流点的电流时，采用本发明实施例提供的逐波限流方法限流时储能电感上的电流跌落的幅度(即t0时刻至t1时刻储能电感上的电流跌落的幅度)，小于采用现有技术限流时储能电感上的电流跌落的幅度。并且，当储能电感上的电流大于等于第一限流点的电流时，无论是采用本发明实施例提供的逐波限流方法限流还是采用现有技术限流，开关管Q1和开关管Q2均封波(t0时刻到t1时刻和t4时刻到t6时刻)，采用本发明实施例提供的逐波限流方法限流时持续向开关管Q4和开关管Q3发波(t0时刻到t1时刻和t4时刻到t6时刻)，采用现有技术限流时将开关管Q4和开关管Q3均封波(t0时刻到t1时刻和t4时刻到t6时刻)。在t5时刻，储能电感上的电流增大至第二限流点的电流，开关管Q1、开关管Q2、开关管Q3和开关管Q4均封波。t3时刻到t4时刻之间的时间段为逆变器输出电压的正半周期内的一个时间段。在t2时刻，采用本发明实施例提供的逐波限流方法限流后的储能电感上的电流再次增大到第一限流点的电流。
上述第一限流点的电流和第二限流点的电流均小于逆变器中的开关管可耐受的最大电流值。
上述的逆变器可以为T型三电平逆变器、I型三电平逆变器、全桥逆变器以及其他的多电平逆变器。
基于同一发明构思，本发明实施例还提供了一种逐波限流装置，由于该装置所解决问题的原理与前述逐波限流方法相似，因此该装置实施可以参见前述方法的实施，重复之处不再赘述。
本发明实施例提供的逐波限流装置，如图8所示，包括：
确定模块81，用于确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
限流模块82，用于将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
进一步地，确定模块81还用于，确定所述储能电感上电流大于等于第二限流点的电流；
限流模块82还用于，将所述逆变器中的主管封波，并将所述逆变器中的辅管封波。
进一步地，确定模块81还用于，在所述限流模块将逆变器中的主管封波，并按照第一发波时序向逆变器中的辅管发波后，确定所述储能电感上的电流小于第一限流点的电流；
限流模块82还用于，按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
其中，所述第一限流点的电流的大小是根据所述逆变器所带的负载设置的。
本发明实施例提供的逆变电路，如图9所示，包括限流装置91和逆变器92；
限流装置91用于，在确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流时，将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过 程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序；
逆变器92，用于在所述限流装置的控制下将直流电转换为交流电输出。
进一步地，限流装置91还用于，在确定所述储能电感上电流大于等于第二限流点的电流时，将所述逆变器中的主管封波，并将所述逆变器中的辅管封波。
进一步地，限流装置91还用于，在将逆变器中的主管封波，并按照第一发波时序向逆变器中的辅管发波后，在确定所述储能电感上的电流小于第一限流点的电流时，按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
其中，所述第一限流点的电流的大小是可调的，可以根据所述逆变器所带的负载设置的。
限流装置可以在逆变器的控制系统内部有软件来实现，也可以位于逆变器的控制系统以外，限流装置可以有微控制器实现，也可以由可编程器件(如CPLD、FPGA、DSP)实现。
当限流装置位于逆变器的控制系统以外时，本发明实施例提供的逆变电路的原理框图如图10所示，限流装置根据储能电感上的电流对逆变器的控制系统产生的逆变器中的各个开关管的驱动信号进行处理，并将处理后的各个开关管的驱动信号出树脂逆变器中的开关管主电路的驱动板以驱动各个开关管。
通过以上的实施方式的描述，本领域的技术人员可以清楚地了解到本发明实施例可以通过硬件实现，也可以借助软件加必要的通用硬件平台的方式来实 现。基于这样的理解，本发明实施例的技术方案可以以软件产品的形式体现出来，该软件产品可以存储在一个非易失性存储介质(可以是CD-ROM，U盘，移动硬盘等)中，包括若干指令用以使得一台计算机设备(可以是个人计算机，服务器，或者网络设备等)执行本发明各个实施例所述的方法。
本领域技术人员可以理解附图只是一个优选实施例的示意图，附图中的模块或流程并不一定是实施本发明所必须的。
本领域技术人员可以理解实施例中的装置中的模块可以按照实施例描述进行分布于实施例的装置中，也可以进行相应变化位于不同于本实施例的一个或多个装置中。上述实施例的模块可以合并为一个模块，也可以进一步拆分成多个子模块。
上述本发明实施例序号仅仅为了描述，不代表实施例的优劣。
显然，本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样，倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内，则本发明也意图包含这些改动和变型在内。

Claims (10)

  1. 一种逐波限流方法，其特征在于，包括：
    确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
    将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
  2. 如权利要求1所述的方法，其特征在于，所述方法还包括：
    确定所述储能电感上电流大于等于第二限流点的电流；
    将所述逆变器中的主管封波，并将所述逆变器中的辅管封波。
  3. 如权利要求1所述的方法，其特征在于，在将逆变器中的主管封波，并按照第一发波时序向逆变器中的辅管发波后，所述方法还包括：
    确定所述储能电感上的电流小于第一限流点的电流；
    按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
  4. 如权利要求1～3任一所述的方法，其特征在于，所述第一限流点的电流的大小是可调的。
  5. 一种逐波限流装置，其特征在于，包括：
    确定模块，用于确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流；
    限流模块，用于将逆变器中的主管封波，并按照第一发波时序向所述逆变 器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序。
  6. 如权利要求5所述的装置，其特征在于，所述确定模块还用于，确定所述储能电感上电流大于等于第二限流点的电流；
    所述限流模块还用于，将所述逆变器中的主管封波，并将所述逆变器中的辅管封波。
  7. 如权利要求5所述的装置，其特征在于，所述确定模块还用于，在所述限流模块将逆变器中的主管封波，并按照第一发波时序向逆变器中的辅管发波后，确定所述储能电感上的电流小于第一限流点的电流；
    所述限流模块还用于，按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
  8. 一种逆变电路，其特征在于，包括逆变器和限流装置；
    所述限流装置用于，在确定逆变器中的储能电感上电流大于等于第一限流点的电流，且小于第二限流点的电流时，将逆变器中的主管封波，并按照第一发波时序向所述逆变器中的辅管发波；所述第一发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的辅管的驱动信号的时序；
    所述逆变器，用于在所述限流装置的控制下将直流电转换为交流电输出。
  9. 如权利要求8所述的逆变电路，其特征在于，所述限流装置还用于：
    在确定所述储能电感上电流大于等于第二限流点的电流时，将所述逆变器中的主管封波，并将所述逆变器中的辅管封波。
  10. 如权利要求8所述的逆变电路，其特征在于，所述限流装置还用于：
    在将逆变器中的主管封波，并按照第一发波时序向逆变器中的辅管发波后，在确定所述储能电感上的电流小于第一限流点的电流时，按照第二发波时序向所述逆变器中的主管发波；所述第二发波时序为所述逆变器工作过程中所述储能电感上的电流小于第一限流点的电流时所述逆变器中的主管的驱动信号的时序。
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