WO2016138807A1 - High-precision frequency calibration circuit used for gm-c filter - Google Patents
High-precision frequency calibration circuit used for gm-c filter Download PDFInfo
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- WO2016138807A1 WO2016138807A1 PCT/CN2016/072564 CN2016072564W WO2016138807A1 WO 2016138807 A1 WO2016138807 A1 WO 2016138807A1 CN 2016072564 W CN2016072564 W CN 2016072564W WO 2016138807 A1 WO2016138807 A1 WO 2016138807A1
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- transconductance amplifier
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03H—IMPEDANCE NETWORKS, e.g. RESONANT CIRCUITS; RESONATORS
- H03H17/00—Networks using digital techniques
- H03H17/02—Frequency selective networks
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- the present invention relates to a frequency calibration circuit for a Gm-C filter.
- the low-IF receiver architecture is a good choice from the perspective of design complexity and performance.
- Low-IF filters are often used as the key circuits for wireless RF transceivers and sensor interfaces.
- On-chip to reduce system size, reduce cost and improve system performance.
- the frequency characteristics of the filter may vary greatly. For example, a 20% process deviation of the resistor capacitor during the tape process will cause a 30% to 50% deviation in the center frequency and bandwidth of the filter, which will seriously deteriorate the overall performance of the system.
- the solution is to add a frequency calibration circuit to the integrated analog filter to adaptively adjust the parameters of the device so that the frequency characteristics of the filter meet the needs of the system. Therefore, the frequency calibration circuit is an indispensable module in the integrated analog filter.
- the frequency calibration circuits of different types of integrated analog filters are different.
- the frequency characteristics of active RC filters are determined by their time constant RC.
- resistors and capacitors are in the form of arrays, and different control codes are output through digital logic control circuits. Adding a resistor-capacitor array changes the frequency characteristics of the filter.
- the frequency detecting circuit can be implemented by using an integrator or an oscillator.
- the integrator-based detecting circuit is mainly composed of an error amplifier, a comparator and a charging unit because the analog signal needs to be processed, but the power consumption of the amplifier and the comparator is large. complex structure.
- the loop oscillator-based detection circuit requires only a few inverters and resistors and capacitors, which is low in power consumption and simple in structure compared to the previously mentioned structure. Therefore, in most low-power applications, active RC filters use calibration circuits based on loop oscillators and digital circuits. Unlike the active RC filter, the Gm-C filter is limited by the bandwidth of the op amp because the OTA operates in an open-loop state, and can operate in a higher frequency range than the active RC filter. At the same time, Gm-C filters have ultra-low power consumption characteristics, so Gm-C filters are often used in mainstream low-power design circuits.
- the frequency characteristic of the Gm-C filter is determined by the time constant Gm/C, where Gm is the transconductance value of the operational transconductance amplifier, which is generally determined by the tail current source and can be changed by adjusting the control voltage of the tail current source.
- Gm is the transconductance value of the operational transconductance amplifier, which is generally determined by the tail current source and can be changed by adjusting the control voltage of the tail current source.
- the traditional phase-locked loop-based Gm-C filter frequency calibration circuit is shown in Figure 2. It mainly includes four modules: phase detector, charge pump, loop filter and voltage controlled oscillator. The oscillator is constructed by using the same transconductance amplifier as the filter. When the control loop formed by the phase discriminator, the charge pump, the loop filter and the voltage controlled oscillator is locked, the oscillation frequency of the voltage controlled oscillator VCO is The phase discrimination discriminator input reference clock frequency is the same.
- the voltage controlled oscillator matches the transconductance amplifier and capacitor in the filter, the frequency characteristic of the filter can be determined by determining the input reference clock frequency of the phase detector. But each module in this calibration circuit consumes a lot of power, while voltage control The oscillator also has problems with limiting and stability.
- the reference frequency of the external clock can precisely adjust the transconductance value of the main transconductance amplifier. Since the transconductance amplifier in the variable gain amplifier is controlled by the main transconductance amplifier, the gain adjustment of the variable gain amplifier can be achieved by the master-slave control structure.
- the object of the present invention is to solve the defects of the conventional Gm-C filter frequency calibration circuit, and the present invention proposes a Gm-C filter frequency calibration circuit with low power consumption and high calibration precision, which can be adjusted by adjusting the bias current. At the same time, the frequency tuning and calibration of the Gm-C filter is realized, which effectively reduces the power consumption and area of the circuit.
- a high-precision frequency calibration circuit for a Gm-C filter comprising first to eighth switching transistors, first to fourth reference current sources, a first reference voltage source, and a second reference voltage source
- One end of the first switching transistor is connected to the negative pole of the first reference current source, the anode of the first reference current source is connected to the power source; the other end of the first switching transistor is connected to the non-inverting input end of the first operational amplifier; The anode of the second reference current source is grounded, and the other end of the second switching transistor is connected to the inverting input terminal of the first operational amplifier; one end of the third switching transistor is connected to the non-inverting input terminal of the first operational amplifier, The other end is connected to the positive pole of the first reference voltage source, the negative pole of the first reference voltage source is grounded; the fourth switch transistor is connected to the inverting input end of the first operational amplifier, and the other end is connected to the positive pole of the first reference voltage source; The positive plate of the capacitor is connected to the non-inverting input end of the first operational amplifier, and the negative plate of the first capacitor is connected to the inverting output end of the first operational amplifier; the positive plate of the second capacitor is connected to the inverting input end of the first operational amplifier
- the invention has the advantages that a Gm-C filter frequency calibration circuit with low power consumption and high calibration precision is provided, and the main transconductance amplifier in the master-slave structure control calibration circuit and the slave transconductance in the Gm-C filter are provided.
- the amplifiers are matched and controlled by the same bias voltage.
- the error of the frequency characteristic of the Gm-C filter is mainly affected by the transconductance value of the transconductance amplifier, the process variation of the capacitor, and the temperature. It is considered that the frequency characteristic of the Gm-C filter is mainly determined by its time constant Gm/C.
- the transconductance value Gm of the transconductance amplifier is converted into a variable proportional to the capacitance C, thereby eliminating the influence of the process deviation of the capacitor on the time constant Gm/C, which can be realized. Very high calibration accuracy.
- the present invention Compared with the conventional calibration circuit, the present invention has no stability problem, and has the characteristics of simple structure, low power consumption and good robustness.
- Most of the current mainstream filter calibration circuits use an oscillating circuit, a digital logic control unit, and a capacitor array to perform calibration.
- the calibration circuit of the present invention can achieve accurate filter frequency calibration without using digital circuits and a large number of capacitor arrays. Thereby greatly reducing the area of the chip.
- the tuning of the filter can be achieved by adjusting the magnitude of the bias current in the calibration circuit, thereby eliminating the need to redesign the tuning circuit of the filter.
- the Gm-C filter frequency calibration circuit of the present invention is more suitable for a low-cost, low-power Gm-C filter.
- FIG. 1 is a structural diagram of a frequency calibration circuit of a Gm-C filter of the present invention, which is composed of four modules: a clock generation circuit, a sample and hold circuit, a main transconductance amplifier and an error amplifier.
- Figure 2 shows the structure of a conventional phase-locked loop-based Gm-C filter frequency calibration circuit.
- Figure 3 shows the amplitude-frequency characteristic curve of the Gm-C low-pass filter before and after calibration with different process angles using the frequency calibration circuit of the present invention:
- M0 is an ideal amplitude-frequency characteristic curve with a bandwidth of 300.6 KHz
- the amplitude-frequency characteristic curves under the SS and FF process angles before calibration are respectively 215.5KHz and 449.3KHz, the frequency error is nearly 40%
- M3 and M4 are the amplitude-frequency characteristic curves after calibration at the SS and FF process angles. For 290.6 kHz and 307.9 kHz, the frequency error is reduced to less than 5%.
- the Gm-C filter frequency calibration circuit is composed of a clock generation circuit, a sample and hold circuit, a main transconductance amplifier, and an error amplification
- the four modules are composed, and the capacitance in the Gm-C filter calibration circuit is exactly the same as the capacitance in the filter body circuit.
- the master-slave structure controls the slave transconductance amplifier in the Gm-C filter so that its transconductance value is in direct proportional relationship with the capacitance in the filter calibration circuit because of the capacitance in the calibration circuit and the capacitance in the filter body circuit. It is exactly the same, so the transconductance value of the transconductance amplifier in the filter main circuit and the capacitance are in a precise proportional relationship.
- the time constant Gm/C of the filter is independent of the capacitance, and is only related to the bias current and charging time in the calibration circuit, thereby eliminating the influence of the process variation of the capacitor on the filter frequency characteristic, because the current in the calibration circuit is It is mirrored by the reference current mirror, so it has high calibration accuracy.
- the tuning of the filter can be achieved by adjusting the bias current and the frequency calibration of the filter can be done while tuning.
- a high-precision frequency calibration circuit for a Gm-C filter includes first to eighth switching transistors S1 to S8, first to fourth reference current sources IDC1 to IDC4, and a first reference voltage.
- the specific connection relationship is as follows: one end of the first switching transistor S1 is connected to the negative pole of the first reference current source IDC1, the anode of the first reference current source IDC1 is connected to the power source; and the other end of the first switching transistor S1 is connected to the non-inverting input of the first operational amplifier OTA1.
- One end of the second switching transistor S2 is connected to the anode of the second reference current source IDC2, the cathode of the second reference current source IDC2 is grounded; the other end of the second switching transistor S2 is connected to the inverting input terminal of the first operational amplifier OTA1;
- One end of the three-switch transistor S3 is connected to the non-inverting input end of the first operational amplifier OTA1, the other end is connected to the positive pole of the first reference voltage source Vcom1, the negative pole of the first reference voltage source Vcom1 is grounded, and the other end of the fourth switching transistor S4 is connected to the first operation.
- the inverting input terminal of the amplifier OTA1 is connected to the positive terminal of the first reference voltage source Vcom1; the positive plate of the first capacitor C1 is connected to the non-inverting input terminal of the first operational amplifier OTA1, and the negative plate of the first capacitor C1 is connected to the first operational amplifier
- the non-inverting output terminal of the amplifier OTA1; one end of the fifth switching transistor S5 is connected to the inverting output end of the first operational amplifier OTA1, the other end is connected to the positive pole of the second reference voltage source Vcom2, and the negative terminal of the second reference voltage source Vcom2 is grounded;
- One end of the switching transistor S6 is connected to the non-inverting output terminal of the first operational amplifier OTA1, and the other end is connected to the positive terminal of the second reference voltage source Vcom2;
- one end of the seventh switching transistor S7 is connected to the inverting output end of the first operational amplifier OTA1, and the other end is connected a positive electrode of the third capacitor C3;
- one end of the eighth switching transistor S8 is connected to the non-inverting output terminal of the first operational amplifier OTA1, and the other end is connected to the negative electrode of the third capacitor C3;
- the non-inverting input terminal of the main transconductance amplifier Gm is connected to the third capacitor
- the positive plate of C3 has an invert
- the working principle of the circuit is analyzed as follows: First, it is assumed that the capacitance values in the capacitors C1, C2, C3 and Gm-C are both C.
- the switches S1 and S2 are closed, S3, S4, S5, S6 , S7, S8 are disconnected, in a charging cycle ⁇ t, the charging current i a of the first reference current source IDC1 and the second reference current source IDC2 charges the capacitor C1 and the capacitor C2, after the charging is finished, the capacitors C1 and C2
- the voltage difference at the end is In the holding phase, the switches S7 and S8 are closed, and the switches S1, S2, S3, S4, S5, and S6 are turned off.
- the output of the first operational amplifier charges the capacitor C3 by extracting/sinking the current, and after the end of the holding phase,
- the positive plate of capacitor C3 is connected to the non-inverting input of the main transconductance amplifier, and the negative plate is connected to the inverting input of the main transconductance amplifier, so the voltage difference at the input of the main transconductance amplifier is
- the input common mode level is the output common mode level of the first operational amplifier.
- the inverting output of the main transconductance amplifier is connected to the inverting input of the error amplifier
- the non-inverting output of the main transconductance amplifier is connected to the non-inverting input of the error amplifier
- the current source of the third reference current source IDC3 and the fourth reference current source IDC4 i b sinks/extracts current from the output of the main transconductance amplifier. Since the input voltage and output current of the main transconductance amplifier are constant, the transconductance value of the main transconductance amplifier
- the output of the error amplifier OTA2 produces a control voltage for the transconductance amplifier, which is connected to the voltage control port of the main transconductance amplifier Gm and the voltage control port of the transconductance amplifier from the external Gm-C filter. Controlling the transconductance from the transconductance amplifier to the transconductance value of the main transconductance amplifier by controlling the transconductance amplifier in the Gm-C filter by the master-slave structure Because the frequency characteristics of the Gm-C filter (including bandwidth, center frequency, etc.) f is determined by the time constant Gm/C, and the capacitance in the Gm-C filter and the capacitor in the frequency calibration circuit use the same type of capacitance and capacitance.
- the values are the same, assuming that the capacitance value deviates from the design value ⁇ C due to factors such as process deviation, and the transconductance value from the transconductance amplifier at this time
- the capacitance value in the Gm-C filter is C+ ⁇ C, and the time constant Gm/C of the filter is This value is only related to i a , i b and charging time ⁇ t, thus eliminating the influence of the deviation of the capacitance value on the filter frequency characteristic due to factors such as process deviation.
- the bias current in the calibration circuit is mirrored by the reference current mirror. Come over, the error is very small.
- FIG. 1 is a structural diagram of a frequency calibration circuit of a Gm-C filter of the present invention, which is composed of four modules: a clock generation circuit, a sample and hold circuit, a main transconductance amplifier and an error amplifier.
- Figure 2 shows the structure of a conventional phase-locked loop-based Gm-C filter frequency calibration circuit.
- Figure 3 shows the amplitude-frequency characteristic curve of the Gm-C low-pass filter before and after calibration with different process angles using the frequency calibration circuit of the present invention:
- M0 is an ideal amplitude-frequency characteristic curve with a bandwidth of 300.6 KHz
- the amplitude-frequency characteristic curves under the SS and FF process angles before calibration are respectively 215.5KHz and 449.3KHz, the frequency error is nearly 40%
- M3 and M4 are the amplitude-frequency characteristic curves after calibration at the SS and FF process angles.
- the calibration circuit of the present invention implements the function of filter frequency calibration.
- the present invention Compared with the phase-locked loop-based Gm-C filter frequency calibration circuit shown in FIG. 2, the present invention has no stability problem, and has the characteristics of simple structure, low power consumption and good robustness.
- Most of the current mainstream filter calibration circuits use an oscillating circuit, a digital logic control unit, and a capacitor array to perform calibration.
- the calibration circuit of the present invention can achieve accurate filter frequency calibration without using digital circuits and a large number of capacitor arrays. Thereby greatly reducing the area of the chip.
- the tuning of the filter can be achieved by adjusting the magnitude of the bias current in the calibration circuit, thereby eliminating the need to redesign the tuning circuit of the filter.
- the Gm-C filter frequency calibration circuit of the present invention is more suitable for a low-cost, low-power Gm-C filter.
Abstract
Provided is a Gm-C filter frequency-calibration circuit having low power consumption and high calibration precision; the frequency calibration circuit comprises four modules: a clock generation circuit, a sample-and-hold circuit, a master transconductance amplifier (Gm), and an error amplifier (OTA2). The master transconductance amplifier (Gm) in the master-slave structure control calibration circuit matches the slave transconductance amplifier in the Gm-C filter, and is controlled by the same bias voltage. The error of the frequency characteristics of the Gm-C filter is influenced primarily by such factors as the transconductance value of the transconductance amplifier, the process variation of the capacitance, and temperature; the consideration of the frequency characteristics of the Gm-C filter is determined primarily by the time constant Gm/C thereof; by means of converting the transconductance value Gm of the transconductance amplifier into a variable having an accurate directly proportional relationship with the capacitance C, the influence of the process variation of the capacitance on the time constant Gm/C is eliminated, allowing for very high calibration accuracy; the invention has the features of a simple structure, low power consumption, and a small chip area, and is also highly stable.
Description
本发明涉及一种用于Gm-C滤波器的频率校准电路。The present invention relates to a frequency calibration circuit for a Gm-C filter.
在无线接收机架构中，从设计复杂度和性能方面综合考虑，低中频接收机架构是一个相当不错的选择，低中频滤波器作为无线射频收发机、传感器接口的关键电路也常常被选择集成在芯片上，以减小系统尺寸、降低成本并提高系统性能。但由于制造容差、工艺变化等工艺因素以及器件老化等影响，滤波器的频率特性会因此产生较大的变化。举例来说，在流片过程中电阻电容20％的工艺偏差将会造成滤波器中心频率和带宽30％～50％的偏差，从而严重恶化系统的整体性能。解决方法就是在集成模拟滤波器中加入频率校准电路，自适应地调整器件的参数，从而使滤波器的频率特性满足系统的需要。因此，频率校准电路是集成模拟滤波器中必不可少的模块。In the wireless receiver architecture, the low-IF receiver architecture is a good choice from the perspective of design complexity and performance. Low-IF filters are often used as the key circuits for wireless RF transceivers and sensor interfaces. On-chip to reduce system size, reduce cost and improve system performance. However, due to process factors such as manufacturing tolerances, process variations, and aging of the device, the frequency characteristics of the filter may vary greatly. For example, a 20% process deviation of the resistor capacitor during the tape process will cause a 30% to 50% deviation in the center frequency and bandwidth of the filter, which will seriously deteriorate the overall performance of the system. The solution is to add a frequency calibration circuit to the integrated analog filter to adaptively adjust the parameters of the device so that the frequency characteristics of the filter meet the needs of the system. Therefore, the frequency calibration circuit is an indispensable module in the integrated analog filter.
不同类型的集成模拟滤波器的频率校准电路各不相同，有源RC滤波器的频率特性由其时间常数RC所决定，通常电阻和电容采用阵列的形式，通过数字逻辑控制电路输出不同的控制码给电阻电容阵列即可改变滤波器的频率特性。频率检测电路可以采用积分器或者振荡器来实现，基于积分器的检测电路由于需要对模拟信号进行处理，主要由误差放大器、比较器和充电单元组成，但放大器和比较器等电路功耗大，结构复杂。而基于环路振荡器的检测电路只需要几个反相器和电阻电容既可以实现，相对于前面所提到的结构功耗低而且结构简单。因此在大多数的低功耗应用场合，有源RC滤波器多采用基于环路振荡器和数字电路的校准电路。不同于有源RC滤波器，Gm-C滤波器因为OTA工作在开环状态，受到运放的带宽限制较小，相比于有源RC滤波器可以在较高的频率范围内工作。同时Gm-C滤波器具有超低功耗的特点，因此在主流的低功耗设计电路中多采用Gm-C滤波器。Gm-C滤波器的频率特性由时间常数Gm/C决定，其中Gm是运算跨导放大器的跨导值，一般由尾电流源决定，可以通过调节尾电流源的控制电压来改变。传统的基于锁相环的Gm-C滤波器频率校准电路如图2所示，主要包括鉴相鉴频器、电荷泵、环路滤波器和压控振荡器四个模块。利用与滤波器所用相同的跨导放大器构成振荡器，当鉴相鉴频器、电荷泵、环路滤波器和压控振荡器构成的控制环路锁定后，压控振荡器VCO的振荡频率和鉴相鉴频器输入参考时钟频率相同。因为压控振荡器与滤波器中的跨导放大器和电容相匹配，所以可以通过确定鉴相鉴频器的输入参考时钟频率来确定滤波器的频率特性。但是这种校准电路中的每个模块都要消耗大量的功耗，同时压控
振荡器还存在限幅和稳定性等问题。The frequency calibration circuits of different types of integrated analog filters are different. The frequency characteristics of active RC filters are determined by their time constant RC. Usually, resistors and capacitors are in the form of arrays, and different control codes are output through digital logic control circuits. Adding a resistor-capacitor array changes the frequency characteristics of the filter. The frequency detecting circuit can be implemented by using an integrator or an oscillator. The integrator-based detecting circuit is mainly composed of an error amplifier, a comparator and a charging unit because the analog signal needs to be processed, but the power consumption of the amplifier and the comparator is large. complex structure. The loop oscillator-based detection circuit requires only a few inverters and resistors and capacitors, which is low in power consumption and simple in structure compared to the previously mentioned structure. Therefore, in most low-power applications, active RC filters use calibration circuits based on loop oscillators and digital circuits. Unlike the active RC filter, the Gm-C filter is limited by the bandwidth of the op amp because the OTA operates in an open-loop state, and can operate in a higher frequency range than the active RC filter. At the same time, Gm-C filters have ultra-low power consumption characteristics, so Gm-C filters are often used in mainstream low-power design circuits. The frequency characteristic of the Gm-C filter is determined by the time constant Gm/C, where Gm is the transconductance value of the operational transconductance amplifier, which is generally determined by the tail current source and can be changed by adjusting the control voltage of the tail current source. The traditional phase-locked loop-based Gm-C filter frequency calibration circuit is shown in Figure 2. It mainly includes four modules: phase detector, charge pump, loop filter and voltage controlled oscillator. The oscillator is constructed by using the same transconductance amplifier as the filter. When the control loop formed by the phase discriminator, the charge pump, the loop filter and the voltage controlled oscillator is locked, the oscillation frequency of the voltage controlled oscillator VCO is The phase discrimination discriminator input reference clock frequency is the same. Because the voltage controlled oscillator matches the transconductance amplifier and capacitor in the filter, the frequency characteristic of the filter can be determined by determining the input reference clock frequency of the phase detector. But each module in this calibration circuit consumes a lot of power, while voltage control
The oscillator also has problems with limiting and stability.
跨导放大器的主从控制思想最早出现在可变增益放大器的设计中，因为可变增益放大器要实现精确的增益调节，所以对跨导放大器的跨导值精度要求很高。通常跨导放大器的跨导值与多个器件参数线性相关，如果对跨导放大器的跨导值进行直接调节的话，很难实现高精度。所以目前常用的做法是采用跨导放大器的主从控制结构，通过将主跨导放大器的跨导值转化为另一个参量的线性相关，比如偏置电压或者时钟频率，通过基准提供的精确电压值或者外部时钟的参考频率即可精确调节主跨导放大器的跨导值。由于可变增益放大器中的从跨导放大器受到主跨导放大器控制，通过主从控制的结构即可实现可变增益放大器精确的增益调节。The idea of master-slave control of transconductance amplifiers first appeared in the design of variable gain amplifiers. Because of the precise gain adjustment of variable gain amplifiers, the transconductance accuracy of transconductance amplifiers is very high. Usually the transconductance value of a transconductance amplifier is linearly related to multiple device parameters. If the transconductance value of the transconductance amplifier is directly adjusted, it is difficult to achieve high precision. Therefore, the current common practice is to use the master-slave control structure of the transconductance amplifier to convert the transconductance value of the main transconductance amplifier into a linear correlation of another parameter, such as the bias voltage or the clock frequency, and the accurate voltage value provided by the reference. Or the reference frequency of the external clock can precisely adjust the transconductance value of the main transconductance amplifier. Since the transconductance amplifier in the variable gain amplifier is controlled by the main transconductance amplifier, the gain adjustment of the variable gain amplifier can be achieved by the master-slave control structure.
考虑到传统的Gm-C滤波器频率校准电路结构复杂且功耗较大，因此，我们需要一种新的Gm-C滤波器频率校准电路来解决上述问题。Considering that the traditional Gm-C filter frequency calibration circuit is complicated in structure and consumes a lot of power, we need a new Gm-C filter frequency calibration circuit to solve the above problem.
发明内容Summary of the invention
本发明目的：针对传统Gm-C滤波器频率校准电路的缺陷，本发明提出了一种低功耗、高校准精度的Gm-C滤波器频率校准电路，通过对偏置电流的调节，即可同时实现Gm-C滤波器的频率调谐和校准，有效地减少了电路的功耗和面积。The object of the present invention is to solve the defects of the conventional Gm-C filter frequency calibration circuit, and the present invention proposes a Gm-C filter frequency calibration circuit with low power consumption and high calibration precision, which can be adjusted by adjusting the bias current. At the same time, the frequency tuning and calibration of the Gm-C filter is realized, which effectively reduces the power consumption and area of the circuit.
本发明技术方案：一种用于Gm-C滤波器的高精度频率校准电路，包括第一至第八开关晶体管、第一至第四参考电流源、第一参考电压源、第二参考电压源、第一运算放大器、误差放大器、主跨导放大器、第一至第三电容；The technical solution of the present invention: a high-precision frequency calibration circuit for a Gm-C filter, comprising first to eighth switching transistors, first to fourth reference current sources, a first reference voltage source, and a second reference voltage source First operational amplifier, error amplifier, main transconductance amplifier, first to third capacitance;
第一开关晶体管的一端接第一参考电流源的负极，第一参考电流源的正极接电源；第一开关晶体管的另一端接第一运算放大器的同相输入端；第二开关晶体管的一端接第二参考电流源的正极，第二参考电流源的负极接地；第二开关晶体管的另一端接第一运算放大器的反相输入端；第三开关晶体管的一端接第一运算放大器的同相输入端，另一端接第一参考电压源的正极，第一参考电压源的负极接地；第四开关晶体管的一端接第一运算放大器的反相输入端，另一端接第一参考电压源的正极；第一电容的正极板接第一运算放大器的同相输入端，第一电容的负极板接第一运算放大器的反相输出端；第二电容的正极板接第一运算放大器的反相输入端，第二电容的负极板接第一运算放大器的同相输出端；第五开关晶体管的一端接第一运算放大器的反相输出端，另一端接第二参考电压源的正极，第二参考电压源的负极接地；第六开关晶体管的一端接第一运算放大器的同相输出端，另一端接第二参考电压源的正极；第七开关晶体管的一端接第一运算放大器的反相输出端，另一端接第三电容的正极板；第八开关晶体管的一端接第一运算放大器的同相输出端，另一端接第三电容的负极板；主跨
导放大器的同相输入端接第三电容的正极板，反相输入端接第三电容的负极板；主跨导放大器的反相输出端接第三参考电流源的负极，第三参考电流源的正极接电源，主跨导放大器的同相输出端接第四参考电流源的正极，第四参考电流源的负极接地；误差放大器的同相输入端接主跨导放大器的同相输出端，误差放大器的反相输入端接主跨导放大器的反相输出端；误差放大器的输出端产生跨导放大器的控制电压，连接主跨导放大器的电压控制端口和外部Gm-C滤波器中从跨导放大器的电压控制端口。One end of the first switching transistor is connected to the negative pole of the first reference current source, the anode of the first reference current source is connected to the power source; the other end of the first switching transistor is connected to the non-inverting input end of the first operational amplifier; The anode of the second reference current source is grounded, and the other end of the second switching transistor is connected to the inverting input terminal of the first operational amplifier; one end of the third switching transistor is connected to the non-inverting input terminal of the first operational amplifier, The other end is connected to the positive pole of the first reference voltage source, the negative pole of the first reference voltage source is grounded; the fourth switch transistor is connected to the inverting input end of the first operational amplifier, and the other end is connected to the positive pole of the first reference voltage source; The positive plate of the capacitor is connected to the non-inverting input end of the first operational amplifier, and the negative plate of the first capacitor is connected to the inverting output end of the first operational amplifier; the positive plate of the second capacitor is connected to the inverting input end of the first operational amplifier, and the second The negative plate of the capacitor is connected to the non-inverting output of the first operational amplifier; one end of the fifth switching transistor is connected to the inverted output end of the first operational amplifier, One end is connected to the positive pole of the second reference voltage source, and the negative pole of the second reference voltage source is grounded; one end of the sixth switching transistor is connected to the non-inverting output end of the first operational amplifier, and the other end is connected to the positive pole of the second reference voltage source; the seventh switching transistor One end is connected to the inverting output end of the first operational amplifier, and the other end is connected to the positive plate of the third capacitor; one end of the eighth switching transistor is connected to the non-inverting output end of the first operational amplifier, and the other end is connected to the negative plate of the third capacitor; Cross
The non-inverting input terminal of the lead amplifier is connected to the positive plate of the third capacitor, and the inverting input terminal is connected to the negative plate of the third capacitor; the inverting output end of the main transconductance amplifier is connected to the negative pole of the third reference current source, and the third reference current source is The positive pole is connected to the power source, the non-inverting output terminal of the main transconductance amplifier is connected to the anode of the fourth reference current source, and the cathode of the fourth reference current source is grounded; the non-inverting input terminal of the error amplifier is connected to the non-inverting output terminal of the main transconductance amplifier, and the inverse of the error amplifier The phase input is connected to the inverting output of the main transconductance amplifier; the output of the error amplifier produces a control voltage of the transconductance amplifier, which is connected to the voltage control port of the main transconductance amplifier and the voltage from the transconductance amplifier in the external Gm-C filter Control port.
本发明的有益效果：提供了一种低功耗和高校准精度的Gm-C滤波器频率校准电路，主从结构控制校准电路中的主跨导放大器与Gm-C滤波器中的从跨导放大器相匹配，由相同的偏置电压控制。Gm-C滤波器的频率特性的误差主要受跨导放大器的跨导值、电容的工艺偏差以及温度等因素的影响，考虑到Gm-C滤波器的频率特性主要由其时间常数Gm/C决定，通过电容充电电路和采样保持电路，将跨导放大器的跨导值Gm转化成一个与电容C成精确正比关系的变量，从而消除了电容的工艺偏差对时间常数Gm/C的影响，可以实现很高的校准精度。The invention has the advantages that a Gm-C filter frequency calibration circuit with low power consumption and high calibration precision is provided, and the main transconductance amplifier in the master-slave structure control calibration circuit and the slave transconductance in the Gm-C filter are provided. The amplifiers are matched and controlled by the same bias voltage. The error of the frequency characteristic of the Gm-C filter is mainly affected by the transconductance value of the transconductance amplifier, the process variation of the capacitor, and the temperature. It is considered that the frequency characteristic of the Gm-C filter is mainly determined by its time constant Gm/C. Through the capacitor charging circuit and the sample-and-hold circuit, the transconductance value Gm of the transconductance amplifier is converted into a variable proportional to the capacitance C, thereby eliminating the influence of the process deviation of the capacitor on the time constant Gm/C, which can be realized. Very high calibration accuracy.
相比于传统的校准电路，本发明不存在稳定性的问题，同时具有结构简单、功耗低和鲁棒性好的特点。目前主流的滤波器校准电路大多数采用振荡电路、数字逻辑控制单元和电容阵列来完成校准，而本发明中的校准电路没有采用数字电路和大量的电容阵列也可以实现精确的滤波器频率校准，从而大大减小了芯片的面积。同时在校准电路中通过调节偏置电流的大小即可实现滤波器的调谐，从而不需要重新设计滤波器的调谐电路。相比于传统的Gm-C滤波器校准电路，本发明中的Gm-C滤波器频率校准电路更加适用于低成本、低功耗的Gm-C滤波器中。Compared with the conventional calibration circuit, the present invention has no stability problem, and has the characteristics of simple structure, low power consumption and good robustness. Most of the current mainstream filter calibration circuits use an oscillating circuit, a digital logic control unit, and a capacitor array to perform calibration. However, the calibration circuit of the present invention can achieve accurate filter frequency calibration without using digital circuits and a large number of capacitor arrays. Thereby greatly reducing the area of the chip. At the same time, the tuning of the filter can be achieved by adjusting the magnitude of the bias current in the calibration circuit, thereby eliminating the need to redesign the tuning circuit of the filter. Compared with the conventional Gm-C filter calibration circuit, the Gm-C filter frequency calibration circuit of the present invention is more suitable for a low-cost, low-power Gm-C filter.
图1所示为本发明的Gm-C滤波器频率校准电路结构图，由时钟产生电路、采样保持电路、主跨导放大器和误差放大器四个模块组成。1 is a structural diagram of a frequency calibration circuit of a Gm-C filter of the present invention, which is composed of four modules: a clock generation circuit, a sample and hold circuit, a main transconductance amplifier and an error amplifier.
图2所示为传统的基于锁相环的Gm-C滤波器频率校准电路结构图。Figure 2 shows the structure of a conventional phase-locked loop-based Gm-C filter frequency calibration circuit.
图3所示为采用本发明的频率校准电路后Gm-C低通滤波器在不同工艺角下校准前后的幅频特性曲线:M0为理想的幅频特性曲线，带宽为300.6KHz,M1和M2分别为校准前SS和FF工艺角下的幅频特性曲线，带宽分别为215.5KHz和449.3KHz,频率误差近40％，M3和M4为SS和FF工艺角下校准后的幅频特性曲线，带宽为290.6KHz和307.9KHz,频率误差缩减到了5％以内。Figure 3 shows the amplitude-frequency characteristic curve of the Gm-C low-pass filter before and after calibration with different process angles using the frequency calibration circuit of the present invention: M0 is an ideal amplitude-frequency characteristic curve with a bandwidth of 300.6 KHz, M1 and M2. The amplitude-frequency characteristic curves under the SS and FF process angles before calibration are respectively 215.5KHz and 449.3KHz, the frequency error is nearly 40%, and M3 and M4 are the amplitude-frequency characteristic curves after calibration at the SS and FF process angles. For 290.6 kHz and 307.9 kHz, the frequency error is reduced to less than 5%.
该Gm-C滤波器频率校准电路由时钟产生电路、采样保持电路、主跨导放大器和误差放大
器四个模块组成，并且Gm-C滤波器校准电路中的电容和滤波器主体电路中的电容完全相同。通过主从结构控制Gm-C滤波器中的从跨导放大器，使其跨导值与滤波器校准电路中的电容成精确的正比关系，因为校准电路中的电容和滤波器主体电路中的电容完全相同，所以滤波器主体电路中跨导放大器的跨导值和电容成精确的正比关系。使得滤波器的时间常数Gm/C与电容无关，只与校准电路中的偏置电流和充电时间有关，从而消除了电容的工艺偏差对滤波器频率特性的影响，因为校准电路中的电流都是通过基准电流镜镜像过来的，所以具有很高的校准精度。通过调节偏置电流可以实现滤波器的调谐，并且在调谐的同时可以完成滤波器的频率校准。The Gm-C filter frequency calibration circuit is composed of a clock generation circuit, a sample and hold circuit, a main transconductance amplifier, and an error amplification
The four modules are composed, and the capacitance in the Gm-C filter calibration circuit is exactly the same as the capacitance in the filter body circuit. The master-slave structure controls the slave transconductance amplifier in the Gm-C filter so that its transconductance value is in direct proportional relationship with the capacitance in the filter calibration circuit because of the capacitance in the calibration circuit and the capacitance in the filter body circuit. It is exactly the same, so the transconductance value of the transconductance amplifier in the filter main circuit and the capacitance are in a precise proportional relationship. The time constant Gm/C of the filter is independent of the capacitance, and is only related to the bias current and charging time in the calibration circuit, thereby eliminating the influence of the process variation of the capacitor on the filter frequency characteristic, because the current in the calibration circuit is It is mirrored by the reference current mirror, so it has high calibration accuracy. The tuning of the filter can be achieved by adjusting the bias current and the frequency calibration of the filter can be done while tuning.
如图1所示，一种用于Gm-C滤波器的高精度频率校准电路，包括第一至第八开关晶体管S1～S8、第一至第四参考电流源IDC1～IDC4、第一参考电压源Vcom1、第二参考电压源Vcom2、第一运算放大器OTA1、误差放大器OTA2、主跨导放大器Gm、第一至第三电容C1～C3。As shown in FIG. 1, a high-precision frequency calibration circuit for a Gm-C filter includes first to eighth switching transistors S1 to S8, first to fourth reference current sources IDC1 to IDC4, and a first reference voltage. The source Vcom1, the second reference voltage source Vcom2, the first operational amplifier OTA1, the error amplifier OTA2, the main transconductance amplifier Gm, and the first to third capacitors C1 to C3.
具体连接关系如下：第一开关晶体管S1的一端接第一参考电流源IDC1的负极，第一参考电流源IDC1的正极接电源；第一开关晶体管S1的另一端接第一运算放大器OTA1的同相输入端；第二开关晶体管S2的一端接第二参考电流源IDC2的正极，第二参考电流源IDC2的负极接地；第二开关晶体管S2的另一端接第一运算放大器OTA1的反相输入端；第三开关晶体管S3的一端接第一运算放大器OTA1的同相输入端，另一端接第一参考电压源Vcom1的正极，第一参考电压源Vcom1的负极接地；第四开关晶体管S4的一端接第一运算放大器OTA1的反相输入端，另一端接第一参考电压源Vcom1的正极；第一电容C1的正极板接第一运算放大器OTA1的同相输入端，第一电容C1的负极板接第一运算放大器OTA1的反相输出端；第二电容C2的正极板接第一运算放大器OTA1的反相输入端，第二电容C2的负极板接第一运算放大器OTA1的同相输出端；第五开关晶体管S5的一端接第一运算放大器OTA1的反相输出端，另一端接第二参考电压源Vcom2的正极，第二参考电压源Vcom2的负极接地；第六开关晶体管S6的一端接第一运算放大器OTA1的同相输出端，另一端接第二参考电压源Vcom2的正极；第七开关晶体管S7的一端接第一运算放大器OTA1的反相输出端，另一端接第三电容C3的正极板；第八开关晶体管S8的一端接第一运算放大器OTA1的同相输出端，另一端接第三电容C3的负极板；主跨导放大器Gm的同相输入端接第三电容C3的正极板，反相输入端接第三电容C3的负极板；主跨导放大器Gm的反相输出端接第三参考电流源IDC3的负极，第三参考电流源IDC3的正极接电源，主跨导放大器Gm的同相输出端接第四参考电流源IDC4的正极，第四参考电流源IDC4的负极接地；误差放大器OTA2的同相输入端接主跨导放大器Gm的同相输出端，误差放大器OTA2的反相输入端接主跨导放大器Gm的反相输出端；误差放大器OTA2的输出端产
生跨导放大器的控制电压，连接主跨导放大器Gm的电压控制端口和外部Gm-C滤波器中从跨导放大器的电压控制端口。The specific connection relationship is as follows: one end of the first switching transistor S1 is connected to the negative pole of the first reference current source IDC1, the anode of the first reference current source IDC1 is connected to the power source; and the other end of the first switching transistor S1 is connected to the non-inverting input of the first operational amplifier OTA1. One end of the second switching transistor S2 is connected to the anode of the second reference current source IDC2, the cathode of the second reference current source IDC2 is grounded; the other end of the second switching transistor S2 is connected to the inverting input terminal of the first operational amplifier OTA1; One end of the three-switch transistor S3 is connected to the non-inverting input end of the first operational amplifier OTA1, the other end is connected to the positive pole of the first reference voltage source Vcom1, the negative pole of the first reference voltage source Vcom1 is grounded, and the other end of the fourth switching transistor S4 is connected to the first operation. The inverting input terminal of the amplifier OTA1 is connected to the positive terminal of the first reference voltage source Vcom1; the positive plate of the first capacitor C1 is connected to the non-inverting input terminal of the first operational amplifier OTA1, and the negative plate of the first capacitor C1 is connected to the first operational amplifier The inverting output of the OTA1; the positive plate of the second capacitor C2 is connected to the inverting input terminal of the first operational amplifier OTA1, and the negative plate of the second capacitor C2 is connected to the first operation. The non-inverting output terminal of the amplifier OTA1; one end of the fifth switching transistor S5 is connected to the inverting output end of the first operational amplifier OTA1, the other end is connected to the positive pole of the second reference voltage source Vcom2, and the negative terminal of the second reference voltage source Vcom2 is grounded; One end of the switching transistor S6 is connected to the non-inverting output terminal of the first operational amplifier OTA1, and the other end is connected to the positive terminal of the second reference voltage source Vcom2; one end of the seventh switching transistor S7 is connected to the inverting output end of the first operational amplifier OTA1, and the other end is connected a positive electrode of the third capacitor C3; one end of the eighth switching transistor S8 is connected to the non-inverting output terminal of the first operational amplifier OTA1, and the other end is connected to the negative electrode of the third capacitor C3; the non-inverting input terminal of the main transconductance amplifier Gm is connected to the third capacitor The positive plate of C3 has an inverting input terminal connected to the negative plate of the third capacitor C3; the inverted output end of the main transconductance amplifier Gm is connected to the negative pole of the third reference current source IDC3, and the positive terminal of the third reference current source IDC3 is connected to the power supply, The non-inverting output terminal of the transconductance amplifier Gm is connected to the anode of the fourth reference current source IDC4, and the cathode of the fourth reference current source IDC4 is grounded; the non-inverting input terminal of the error amplifier OTA2 is connected to the main transconductance Gm-inverting output terminal of the device, the inverting input terminal of the inverted output of the error amplifier OTA2 master transconductance amplifier Gm; an output terminal of the error amplifier OTA2 yield
The control voltage of the transconductance amplifier is connected to the voltage control port of the main transconductance amplifier Gm and the voltage control port of the external Gm-C filter from the transconductance amplifier.
该电路的工作原理分析如下：首先假设电容C1、C2、C3和Gm-C滤波器中的电容值均为C，在电容的充电阶段内，开关S1、S2闭合，S3、S4、S5、S6、S7、S8断开，在一个充电周期Δt内，第一参考电流源IDC1和第二参考电流源IDC2的充电电流ia对电容C1和电容C2进行充电，充电结束后，电容C1和C2两端的电压差为
在保持阶段，开关S7、S8闭合，开关S1、S2、S3、S4、S5、S6断开，此时第一运算放大器的输出端通过抽取/灌入电流对电容C3充电，保持阶段结束后，电容C3正负极板的电压分别为U+＝Vcm+ΔU和U-＝Vcm-ΔU(其中Vcm为运算放大器的输出共模电平，
)，电容C3两端的电压差将维持在
在电荷泄放阶段，开关S3、S4、S5、S6闭合，开关S1、S2、S7、S8断开，在放电阶段结束后，电容C1和C2两端的电荷被完全泄放到地。在放电阶段结束后马上进入电容的充电阶段，然后依次循环，从而保证电容C3两端电压保持不变。电容C3的正极板接主跨导放大器的同相输入端，负极板接主跨导放大器的反相输入端，所以主跨导放大器输入端的电压差为
输入共模电平为第一运算放大器的输出共模电平。主跨导放大器的反相输出端接误差放大器的反相输入端，主跨导放大器的同相输出端接误差放大器的同相输入端，第三参考电流源IDC3和第四参考电流源IDC4的电流源ib从主跨导放大器的输出端灌入/抽取电流，由于主跨导放大器的输入电压和输出电流恒定，所以主跨导放大器的跨导值 
The working principle of the circuit is analyzed as follows: First, it is assumed that the capacitance values in the capacitors C1, C2, C3 and Gm-C are both C. During the charging phase of the capacitor, the switches S1 and S2 are closed, S3, S4, S5, S6 , S7, S8 are disconnected, in a charging cycle Δt, the charging current i a of the first reference current source IDC1 and the second reference current source IDC2 charges the capacitor C1 and the capacitor C2, after the charging is finished, the capacitors C1 and C2 The voltage difference at the end is In the holding phase, the switches S7 and S8 are closed, and the switches S1, S2, S3, S4, S5, and S6 are turned off. At this time, the output of the first operational amplifier charges the capacitor C3 by extracting/sinking the current, and after the end of the holding phase, The voltage of the positive and negative plates of capacitor C3 is U + = V cm + ΔU and U - = V cm - ΔU (where Vcm is the output common mode level of the operational amplifier, ), the voltage difference across capacitor C3 will remain at In the charge bleed phase, switches S3, S4, S5, S6 are closed and switches S1, S2, S7, S8 are open. After the discharge phase is over, the charges across capacitors C1 and C2 are completely vented to ground. Immediately after the end of the discharge phase, the capacitor enters the charging phase and then cycles in sequence to ensure that the voltage across capacitor C3 remains constant. The positive plate of capacitor C3 is connected to the non-inverting input of the main transconductance amplifier, and the negative plate is connected to the inverting input of the main transconductance amplifier, so the voltage difference at the input of the main transconductance amplifier is The input common mode level is the output common mode level of the first operational amplifier. The inverting output of the main transconductance amplifier is connected to the inverting input of the error amplifier, the non-inverting output of the main transconductance amplifier is connected to the non-inverting input of the error amplifier, the current source of the third reference current source IDC3 and the fourth reference current source IDC4 i b sinks/extracts current from the output of the main transconductance amplifier. Since the input voltage and output current of the main transconductance amplifier are constant, the transconductance value of the main transconductance amplifier
误差放大器OTA2的输出端产生跨导放大器的控制电压，连接主跨导放大器Gm的电压控制端口和外部Gm-C滤波器中从跨导放大器的电压控制端口。通过主从结构控制Gm-C滤波器中的从跨导放大器，使从跨导放大器的跨导值跟随主跨导放大器的跨导值
因为Gm-C滤波器的频率特性(包括带宽、中心频率等)f由时间常数Gm/C决定，同时Gm-C滤波器中的电容与频率校准电路中的电容采用同一种类型的电容且电容值相同，假设因为工艺偏差等因素使电容值偏离了设计值ΔC，此时从跨导放大器的跨导值
Gm-C滤波器中的电容值为C+ΔC，则滤波器的时间常数Gm/C为
这个值只与ia、ib和充电时间Δt有关，从而消除了由于工艺偏差等因素造成电容值的偏差对滤波器频率特性的影响，校准电路
中的偏置电流都是通过基准电流镜镜像过来的，其误差很小，通过这个频率校准电路，我们可以固定充电电流ia和充电时间Δt，通过调节电流ib实现Gm-C滤波器带宽和中心频率的调谐，最终实现了在完成Gm-C滤波器频率校准的同时实现带宽和中心频率的可调。The output of the error amplifier OTA2 produces a control voltage for the transconductance amplifier, which is connected to the voltage control port of the main transconductance amplifier Gm and the voltage control port of the transconductance amplifier from the external Gm-C filter. Controlling the transconductance from the transconductance amplifier to the transconductance value of the main transconductance amplifier by controlling the transconductance amplifier in the Gm-C filter by the master-slave structure Because the frequency characteristics of the Gm-C filter (including bandwidth, center frequency, etc.) f is determined by the time constant Gm/C, and the capacitance in the Gm-C filter and the capacitor in the frequency calibration circuit use the same type of capacitance and capacitance. The values are the same, assuming that the capacitance value deviates from the design value ΔC due to factors such as process deviation, and the transconductance value from the transconductance amplifier at this time The capacitance value in the Gm-C filter is C+ΔC, and the time constant Gm/C of the filter is This value is only related to i a , i b and charging time Δt, thus eliminating the influence of the deviation of the capacitance value on the filter frequency characteristic due to factors such as process deviation. The bias current in the calibration circuit is mirrored by the reference current mirror. Come over, the error is very small. Through this frequency calibration circuit, we can fix the charging current i a and the charging time Δt, and adjust the current i b to realize the tuning of the Gm-C filter bandwidth and the center frequency, and finally realize the Gm. -C filter frequency calibration while adjusting the bandwidth and center frequency.
下面结合附图进一步阐述本发明的特点和有益效果：The features and benefits of the present invention are further illustrated below in conjunction with the accompanying drawings:
图1所示为本发明的Gm-C滤波器频率校准电路结构图，由时钟产生电路、采样保持电路、主跨导放大器和误差放大器四个模块组成。1 is a structural diagram of a frequency calibration circuit of a Gm-C filter of the present invention, which is composed of four modules: a clock generation circuit, a sample and hold circuit, a main transconductance amplifier and an error amplifier.
图2所示为传统的基于锁相环的Gm-C滤波器频率校准电路结构图。Figure 2 shows the structure of a conventional phase-locked loop-based Gm-C filter frequency calibration circuit.
图3所示为采用本发明的频率校准电路后Gm-C低通滤波器在不同工艺角下校准前后的幅频特性曲线:M0为理想的幅频特性曲线，带宽为300.6KHz,M1和M2分别为校准前SS和FF工艺角下的幅频特性曲线，带宽分别为215.5KHz和449.3KHz,频率误差近40％，M3和M4为SS和FF工艺角下校准后的幅频特性曲线，带宽为290.6KHz和307.9KHz,频率误差缩减到了5％以内。可见本发明的校准电路实现了滤波器频率校准的功能。Figure 3 shows the amplitude-frequency characteristic curve of the Gm-C low-pass filter before and after calibration with different process angles using the frequency calibration circuit of the present invention: M0 is an ideal amplitude-frequency characteristic curve with a bandwidth of 300.6 KHz, M1 and M2. The amplitude-frequency characteristic curves under the SS and FF process angles before calibration are respectively 215.5KHz and 449.3KHz, the frequency error is nearly 40%, and M3 and M4 are the amplitude-frequency characteristic curves after calibration at the SS and FF process angles. For 290.6 kHz and 307.9 kHz, the frequency error is reduced to less than 5%. It can be seen that the calibration circuit of the present invention implements the function of filter frequency calibration.
相比于图2所示的基于锁相环的Gm-C滤波器频率校准电路，本发明不存在稳定性的问题，同时具有结构简单、功耗低和鲁棒性好的特点。目前主流的滤波器校准电路大多数采用振荡电路、数字逻辑控制单元和电容阵列来完成校准，而本发明中的校准电路没有采用数字电路和大量的电容阵列也可以实现精确的滤波器频率校准，从而大大减小了芯片的面积。同时在校准电路中通过调节偏置电流的大小即可实现滤波器的调谐，从而不需要重新设计滤波器的调谐电路。相比于传统的Gm-C滤波器校准电路，本发明中的Gm-C滤波器频率校准电路更加适用于低成本、低功耗的Gm-C滤波器中。Compared with the phase-locked loop-based Gm-C filter frequency calibration circuit shown in FIG. 2, the present invention has no stability problem, and has the characteristics of simple structure, low power consumption and good robustness. Most of the current mainstream filter calibration circuits use an oscillating circuit, a digital logic control unit, and a capacitor array to perform calibration. However, the calibration circuit of the present invention can achieve accurate filter frequency calibration without using digital circuits and a large number of capacitor arrays. Thereby greatly reducing the area of the chip. At the same time, the tuning of the filter can be achieved by adjusting the magnitude of the bias current in the calibration circuit, thereby eliminating the need to redesign the tuning circuit of the filter. Compared with the conventional Gm-C filter calibration circuit, the Gm-C filter frequency calibration circuit of the present invention is more suitable for a low-cost, low-power Gm-C filter.
以上所述仅为本发明的较佳实施方式，本发明的保护范围并不以上述实施方式为限，但凡本领域普通技术人员根据本发明所揭示内容所作的等效修饰或变化，皆应纳入权利要求书中记载的保护范围内。
The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited to the above embodiments, but equivalent modifications or variations made by those skilled in the art according to the disclosure of the present invention should be incorporated. Within the scope of protection stated in the claims.
Claims (1)
- 一种用于Gm-C滤波器的高精度频率校准电路，其特征在于：包括第一至第八开关晶体管(S1～S8)、第一至第四参考电流源(IDC1～IDC4)、第一参考电压源(Vcom1)、第二参考电压源(Vcom2)、第一运算放大器(OTA1)、误差放大器(OTA2)、主跨导放大器(Gm)、第一至第三电容(C1～C3)；A high-precision frequency calibration circuit for a Gm-C filter, comprising: first to eighth switching transistors (S1 to S8), first to fourth reference current sources (IDC1 to IDC4), first Reference voltage source (Vcom1), second reference voltage source (Vcom2), first operational amplifier (OTA1), error amplifier (OTA2), main transconductance amplifier (Gm), first to third capacitors (C1 to C3);第一开关晶体管(S1)的一端接第一参考电流源(IDC1)的负极，第一参考电流源(IDC1)的正极接电源；第一开关晶体管(S1)的另一端接第一运算放大器(OTA1)的同相输入端；第二开关晶体管(S2)的一端接第二参考电流源(IDC2)的正极，第二参考电流源(IDC2)的负极接地；第二开关晶体管(S2)的另一端接第一运算放大器(OTA1)的反相输入端；第三开关晶体管(S3)的一端接第一运算放大器(OTA1)的同相输入端，另一端接第一参考电压源(Vcom1)的正极，第一参考电压源(Vcom1)的负极接地；第四开关晶体管(S4)的一端接第一运算放大器(OTA1)的反相输入端，另一端接第一参考电压源(Vcom1)的正极；第一电容(C1)的正极板接第一运算放大器(OTA1)的同相输入端，第一电容(C1)的负极板接第一运算放大器(OTA1)的反相输出端；第二电容(C2)的正极板接第一运算放大器(OTA1)的反相输入端，第二电容(C2)的负极板接第一运算放大器(OTA1)的同相输出端；第五开关晶体管(S5)的一端接第一运算放大器(OTA1)的反相输出端，另一端接第二参考电压源(Vcom2)的正极，第二参考电压源(Vcom2)的负极接地；第六开关晶体管(S6)的一端接第一运算放大器(OTA1)的同相输出端，另一端接第二参考电压源(Vcom2)的正极；第七开关晶体管(S7)的一端接第一运算放大器(OTA1)的反相输出端，另一端接第三电容(C3)的正极板；第八开关晶体管(S8)的一端接第一运算放大器(OTA1)的同相输出端，另一端接第三电容(C3)的负极板；主跨导放大器(Gm)的同相输入端接第三电容(C3)的正极板，反相输入端接第三电容(C3)的负极板；主跨导放大器(Gm)的反相输出端接第三参考电流源(IDC3)的负极，第三参考电流源(IDC3)的正极接电源，主跨导放大器(Gm)的同相输出端接第四参考电流源(IDC4)的正极，第四参考电流源(IDC4)的负极接地；误差放大器(OTA2)的同相输入端接主跨导放大器(Gm)的同相输出端，误差放大器(OTA2)的反相输入端接主跨导放大器(Gm)的反相输出端；误差放大器(OTA2)的输出端产生跨导放大器的控制电压，连接主跨导放大器(Gm)的电压控制端口和外部Gm-C滤波器中从跨导放大器的电压控制端口。 One end of the first switching transistor (S1) is connected to the anode of the first reference current source (IDC1), the anode of the first reference current source (IDC1) is connected to the power source; and the other end of the first switching transistor (S1) is connected to the first operational amplifier ( The non-inverting input terminal of OTA1); one end of the second switching transistor (S2) is connected to the anode of the second reference current source (IDC2), the cathode of the second reference current source (IDC2) is grounded; and the other end of the second switching transistor (S2) Connected to the inverting input terminal of the first operational amplifier (OTA1); one end of the third switching transistor (S3) is connected to the non-inverting input terminal of the first operational amplifier (OTA1), and the other end is connected to the positive pole of the first reference voltage source (Vcom1). The negative pole of the first reference voltage source (Vcom1) is grounded; one end of the fourth switching transistor (S4) is connected to the inverting input terminal of the first operational amplifier (OTA1), and the other end is connected to the anode of the first reference voltage source (Vcom1); The positive plate of a capacitor (C1) is connected to the non-inverting input terminal of the first operational amplifier (OTA1), and the negative plate of the first capacitor (C1) is connected to the inverting output terminal of the first operational amplifier (OTA1); the second capacitor (C2) The positive plate is connected to the inverting input of the first operational amplifier (OTA1), and the second capacitor (C2) is negative. The plate is connected to the non-inverting output of the first operational amplifier (OTA1); one end of the fifth switching transistor (S5) is connected to the inverting output of the first operational amplifier (OTA1), and the other end is connected to the second reference voltage source (Vcom2). The positive pole, the negative pole of the second reference voltage source (Vcom2) is grounded; the sixth switching transistor (S6) has one end connected to the non-inverting output end of the first operational amplifier (OTA1), and the other end connected to the positive pole of the second reference voltage source (Vcom2); One end of the seventh switching transistor (S7) is connected to the inverting output terminal of the first operational amplifier (OTA1), the other end is connected to the positive electrode plate of the third capacitor (C3); and the other end of the eighth switching transistor (S8) is connected to the first operational amplifier The non-inverting output of (OTA1) is connected to the negative plate of the third capacitor (C3); the non-inverting input of the main transconductance amplifier (Gm) is connected to the positive plate of the third capacitor (C3), and the inverting input terminal is connected to the third. The negative plate of the capacitor (C3); the inverting output of the main transconductance amplifier (Gm) is connected to the negative terminal of the third reference current source (IDC3), the positive terminal of the third reference current source (IDC3) is connected to the power supply, and the main transconductance amplifier ( The non-inverting output of Gm) is connected to the positive pole of the fourth reference current source (IDC4), and the fourth reference current source (IDC4) Polarized to ground; the non-inverting input of the error amplifier (OTA2) is connected to the non-inverting output of the main transconductance amplifier (Gm), and the inverting input of the error amplifier (OTA2) is connected to the inverting output of the main transconductance amplifier (Gm); The output of the amplifier (OTA2) produces a control voltage for the transconductance amplifier, which is connected to the voltage control port of the main transconductance amplifier (Gm) and the voltage control port of the transconductance amplifier from the external Gm-C filter.
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| CN110365313A (en) * | 2019-07-12 | 2019-10-22 | 华北电力大学（保定） | A kind of adjustable fractional order passive capacitive based on field programmable gate array |
| US11632105B2 (en) | 2021-03-31 | 2023-04-18 | Analog Devices International Unlimited Company | Fast overcurrent detection in battery management system |
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| CN104660216B (en) * | 2015-03-02 | 2017-05-10 | 东南大学 | High-precision frequency calibration circuit for Gm-C filter |
| US9673782B1 (en) * | 2016-08-16 | 2017-06-06 | Qualcomm Inc. | Center frequency and Q tuning of biquad filter by amplitude-limited oscillation-based calibration |
| CN112230711B (en) * | 2020-09-25 | 2023-03-14 | 紫光展锐(重庆)科技有限公司 | Calibration device, method and computer readable storage medium |
| CN114779868B (en) * | 2022-06-22 | 2022-10-14 | 成都信息工程大学 | Low-noise voltage-stabilized power supply circuit suitable for high-speed digital circuit |
| CN115390616B (en) * | 2022-10-25 | 2023-01-03 | 太景科技(南京)有限公司 | Biasing device |
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| CN104660216A (en) * | 2015-03-02 | 2015-05-27 | 东南大学 | High-precision frequency calibration circuit for Gm-C filter |
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| JP2002223148A (en) * | 2001-01-25 | 2002-08-09 | Mitsubishi Materials Corp | Gm-C FILTER CIRCUIT |
| CN102006095A (en) * | 2010-10-21 | 2011-04-06 | 华东师范大学 | Automatic frequency calibration channel selection filter for multi-frequency multi-mode wireless transceiver |
| US8373502B1 (en) * | 2011-09-20 | 2013-02-12 | Hong Kong Applied Science and Technology Research Institute Company Limited | Gm-C filter tuning circuit based on relaxation oscillator |
| CN103905037A (en) * | 2014-03-10 | 2014-07-02 | 东南大学 | Principal and subordinate structure frequency calibration circuit used for Gm-C filter |
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| CN110365313A (en) * | 2019-07-12 | 2019-10-22 | 华北电力大学（保定） | A kind of adjustable fractional order passive capacitive based on field programmable gate array |
| CN110365313B (en) * | 2019-07-12 | 2023-05-02 | 华北电力大学（保定） | Adjustable fractional order passive capacitor based on field programmable gate array |
| US11632105B2 (en) | 2021-03-31 | 2023-04-18 | Analog Devices International Unlimited Company | Fast overcurrent detection in battery management system |
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| CN104660216B (en) | 2017-05-10 |
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