WO2016132714A1 - Electric power transmitting device and electric power transmitting system - Google Patents

Electric power transmitting device and electric power transmitting system Download PDF

Info

Publication number
WO2016132714A1
WO2016132714A1 PCT/JP2016/000713 JP2016000713W WO2016132714A1 WO 2016132714 A1 WO2016132714 A1 WO 2016132714A1 JP 2016000713 W JP2016000713 W JP 2016000713W WO 2016132714 A1 WO2016132714 A1 WO 2016132714A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
power transmission
unit
rectangular wave
transmission device
Prior art date
Application number
PCT/JP2016/000713
Other languages
French (fr)
Japanese (ja)
Inventor
俊太郎 岡田
幸平 池川
中村 剛
Original Assignee
株式会社デンソー
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 株式会社デンソー filed Critical 株式会社デンソー
Publication of WO2016132714A1 publication Critical patent/WO2016132714A1/en

Links

Images

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of dc power input into dc power output
    • H02M3/22Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac

Definitions

  • the present disclosure relates to a power transmission device that transmits power to a power receiving side by a radio signal generated by a power transmission unit including a coil and a capacitor, and a power transmission system including the power transmission device.
  • an LC parallel circuit is configured between output terminals of an H bridge circuit composed of four FETs (QMP1, QMP2, QMN1, QMN2), and the frequency of a power source supplied to the LC parallel circuit is set to L, A configuration is disclosed in which power is automatically transmitted to the secondary side in accordance with the resonance frequency determined by C.
  • the present disclosure includes a power transmission device capable of transmitting power to the power receiving side with higher efficiency by adding a function of adjusting the operating frequency of the power source to the resonance frequency in a configuration with small switching loss, and the power transmission device.
  • An object of the present invention is to provide a power transmission system.
  • a power transmission device includes a coil and a capacitor, and is connected between a power transmission unit that generates a radio signal and transmits power to a power reception side, and a power source and a ground.
  • a switching element unit that has at least one series circuit of two switching elements and supplies a driving current to a power transmission unit; and a driving circuit that outputs a driving signal to each switching element based on an input rectangular wave signal;
  • the current information output unit that detects the current flowing through the power transmission unit and outputs information corresponding to the current (hereinafter referred to as current information), and the timing at which the current flowing through the power transmission unit reaches zero by referring to the current information
  • a rectangular wave signal generation unit that generates a rectangular wave signal whose signal level changes with reference to the signal and outputs the rectangular wave signal to the drive circuit.
  • the switching element unit supplies a drive current to the power transmission unit.
  • the drive circuit outputs a drive signal to the switching element based on the input rectangular wave signal.
  • the current information output unit detects a current flowing through the power transmission unit and outputs information corresponding to the current.
  • the rectangular wave signal generation unit generates a rectangular wave signal whose signal level changes with reference to the current information so that the current flowing through the power transmission unit reaches zero, and outputs the rectangular wave signal to the drive circuit.
  • the phase gap of the both-ends voltage of a power transmission part and the current which flows into a power transmission part can be controlled, and the frequency of a rectangular wave signal is the resonance frequency which is the frequency where the imaginary part of the input impedance of a power transmission part becomes zero. Adjusted automatically. Therefore, it is possible to suppress a decrease in efficiency and power due to variations in the inductance of the coil and the capacitance of the capacitor. Moreover, if the output of the drive circuit is switched before the current flowing through the power transmission unit reaches zero, it can be operated at a frequency higher than the resonance frequency, and if the output of the drive circuit is switched after the current reaches zero, It is possible to operate at a frequency lower than the resonance frequency.
  • the power transmission system includes a power transmission device according to the first aspect, a power reception unit that receives power transmitted by a wireless signal from a power transmission unit of the power transmission device, A power receiving device having a load connected in parallel to the power receiving unit. Therefore, a power transmission system can be configured by a power transmission device and a device that receives power transmitted by the device.
  • the figure which is 1st Embodiment and shows the structure of an electric power transmission system The figure which shows the variation of the structural example of a primary side current information detection part.
  • Operation timing chart of drive signal generator The figure which is 2nd Embodiment and shows the detailed structure of a drive signal generation part.
  • Operation timing chart of drive signal generator Operation timing chart of pulse width limiter The figure which is 3rd Embodiment and shows the structure of an electric power transmission system Diagram showing delay time set between each signal in operation simulation Diagram showing operating frequency simulation results Diagram showing transmission power simulation results Diagram showing simulation results of transmission efficiency
  • the figure which is 4th Embodiment and shows the structure of an electric power transmission system Operation timing chart of start signal generator The figure which is 5th Embodiment and shows the structure of an electric power transmission system
  • a series circuit of two power switches (SW, switching elements) 1 and 2 is connected between a power source VIN and the ground, and a power switch section (switching element section) 3 is configured.
  • the power switches 1 and 2 are, for example, N-channel MOSFETs.
  • Control signals VGH and VGL are supplied to the conduction control terminals (for example, gates) of the power switches 1 and 2 from the driver 4 (drive circuit).
  • a power transmission unit 19 including a capacitor 5, a resistor 6 and a coil 7 and a series circuit of a primary side current information output unit 8 are connected.
  • the resistor 5 indicates the sum of the resistance element and the resistance included in the wiring.
  • the primary side current information output unit 8 detects information on the current flowing through the series circuit and outputs the detected information to the drive signal generation unit 9 (rectangular wave signal generation unit).
  • the drive signal generation unit 9 generates a rectangular wave signal OSC based on the input information and outputs it to the driver 4.
  • the driver 4 generates control signals VGH and VGL so as to exclusively and alternately turn on and off the power switches 1 and 2 based on the rectangular wave signal OSC.
  • the above constitutes the primary side power transmission device 10 (primary side circuit).
  • a power reception unit 20 which is a series circuit of a coil 12, a resistor 13, and a capacitor 14, is connected to the input terminal side of the full-wave rectifier 11 (load).
  • the resistor 13 is the sum of the resistance of the resistance element and the wiring, like the resistor 6. Whether or not a resistance element is added is arbitrary and may not be added.
  • the full-wave rectifier 11 is configured by bridge-connecting four diodes 15a to 15d.
  • a smoothing capacitor 16 load
  • a load 17 indicated by a current source symbol are connected in parallel.
  • the power receiving device 18 secondary side circuit
  • the power receiving device 18 is configured by removing the load 17. Then, power is transmitted from the primary-side power transmission device 10 to the secondary-side power reception device 18 by a magnetic resonance method, and these constitute a power transmission system.
  • the primary-side current information output unit 8 detects the primary-side current I flowing through the power transmission unit 19 by energizing, for example, a resistance element R, a capacitor C, an inductance (coil) L, and the like.
  • the resistance element R When the resistance element R is used, the phase difference of the terminal voltage V with respect to the primary current I is 0 °.
  • the capacitor C When the capacitor C is used, the phase difference is delayed by 90 °, and when the inductance L is used, the phase difference is advanced by 90 °.
  • a parallel circuit or a series circuit of the resistance element R and the inductance L may be used. In this case, the phase of the terminal voltage V advances with respect to the primary side current I, and the phase difference can be adjusted arbitrarily.
  • the drive signal generator 9 includes a comparator 21 (L, H), a delay circuit 22 (L, H), a NOT gate 23 (L, H), an AND gate 24 (L, H), and an SR.
  • the flip-flop 25 is used.
  • the input signal IN from the primary side current information output unit 8 is given to the non-inverting input terminal of the comparator 21L and the inverting input terminal of the comparator 21H.
  • the inverting input terminal of the comparator 21L is given a threshold value VTL set at a level slightly lower than the zero cross point of the voltage waveform of the input signal IN, and the non-inverting input terminal of the comparator 21H.
  • a threshold value VTH set to a level slightly higher than the zero cross point of the voltage waveform of the input signal IN is given.
  • the output terminal of the comparator 21L is connected to one input terminal of the AND gate 24L and the input terminal of the delay circuit 22L.
  • the output terminal of the delay circuit 22L is connected to the other input terminal of the AND gate 24L via the NOT gate 23L.
  • the output terminal of the AND gate 24L is connected to the set terminal S of the SR flip-flop 25.
  • the configuration on the comparator 21H side is symmetric with the above, and the output terminal of the AND gate 24H is connected to the reset terminal R of the SR flip-flop 25.
  • a rectangular wave signal OSC is output from the output terminal Q of the SR flip-flop 25.
  • the delay circuit 22L, the NOT gate 23L, and the AND gate 24L constitute a set signal output unit 26, and the delay circuit 22H, the NOT gate 23H, and the AND gate 24H constitute a reset signal output unit 27.
  • the output signal of the comparator 21H changes to a high level when the level of the input signal IN falls below the threshold value VTH. Then, the output signal of the AND gate 24H becomes high level for the delay time of the delay circuit 24H by the same operation as that of the comparator 21L. This becomes a RESET signal to the SR flip-flop 25 (see FIG. 4C), and the rectangular wave signal OSC falls (see FIG. 4D).
  • the comparator 21L outputs the SET signal at a timing immediately before the input signal IN reaches the zero cross point from the negative level, and the comparator 21H side at the timing immediately before the input signal IN reaches the zero cross point from the positive level. RESET signal is output.
  • the rectangular wave signal OSC is output so that the binary level changes at a timing immediately before the input signal IN reaches the zero cross point.
  • the power switch unit 3 including the series circuit of the two power switches 1 and 2 connected between the power source VIN and the ground can transmit the radio signal to the secondary side.
  • a drive current is supplied to the power transmission unit 19 that transmits power.
  • the driver 4 outputs a drive signal to the power switches 1 and 2 based on the input rectangular wave signal.
  • the primary side current information output unit 8 detects a current flowing through the power transmission unit 19 and outputs information corresponding to the current. Then, the drive signal generation unit 9 refers to the current information, generates a rectangular wave signal whose signal level changes based on the timing when the current flowing through the power transmission unit 19 reaches zero, and outputs the rectangular wave signal to the driver 4.
  • the phase shift of the both-ends voltage of the power transmission part 19 and the electric current which flows into the power transmission part 19 can be suppressed, and the frequency of the said rectangular wave signal is a frequency from which the imaginary part of the input impedance of the power transmission part 19 becomes zero. It is automatically adjusted to a certain resonance frequency. Therefore, it is possible to suppress a reduction in efficiency and power due to variations in the inductance of the coil 7 and the capacitance of the capacitor 5. Further, if the output of the driver 4 is switched before the current flowing through the power transmission unit 19 reaches zero, the driver 4 can be operated at a frequency higher than the resonance frequency, and the output of the driver 4 can be switched after the current reaches zero. For example, it is possible to operate at a frequency lower than the resonance frequency.
  • the drive signal generation unit 9 operates by detecting the timing immediately before the voltage signal output from the primary side current information output unit 8 becomes zero.
  • the primary-side current information output unit 8 includes the coil L, or includes a series circuit or a parallel circuit of the resistance element R and the coil L, the primary-side current information output unit 8 has a leading phase with respect to the primary-side current I.
  • a voltage signal can be output as current information.
  • the number of components can be reduced if the coil L is shared with the coil 7 constituting the power transmission unit 19.
  • the primary side current information output unit 8 is configured to include the capacitor C, it can be output as voltage signal current information having a phase lag behind the primary side current I. In this case as well, the number of components can be reduced if the capacitor C is shared with the capacitor 5 constituting the power transmission unit 19.
  • the drive signal generation unit 31 (rectangular wave signal generation unit) of the second embodiment uses one comparator 21, and the input signal IN is applied to the non-inverting input terminal and the inverting input terminal is provided. 0V (ground level) is given as a threshold value.
  • the output signal of the comparator 21 is input to the pulse width limiter 33 directly and via the NOT gate 32.
  • a series circuit of a resistance element 34 (L, H) and an N channel MOSFET 35 (L, H) is connected between the power source and the ground, and the N channel MOSFET 35 (L, H). Are connected in parallel with capacitors 36 (L, H).
  • the output terminal of the comparator 21 is connected to the gate of the N-channel MOSFET 35L, and the output terminal of the NOT gate 32 is connected to the gate of the N-channel MOSFET 35H.
  • the input terminal of the NOT gate 37 (L, H) is connected to the drain of the N-channel MOSFET 35 (L, H).
  • the NOT gate 37 (L, H) replaces the comparator 21 (L, H) in the drive signal generation unit 9.
  • the configuration after the output terminal of the NOT gate 37 (L, H) is the drive signal generation unit 9. Is the same.
  • the set signal output unit 26 according to the first embodiment added with the pulse width limiting unit 33 and the NOT gate 37L constitutes the set signal output unit 26A
  • the reset signal output unit 27 includes the pulse width limiting unit 33 and the NOT gate.
  • the sum of the gates 32 and 37L constitutes the reset signal output unit 27A.
  • FIG. 6 is a diagram corresponding to FIG. 4.
  • the comparator 21 compares the input signal IN with the threshold value 0 V, so that the SET signal is output when the input signal IN reaches zero from the negative level. Then, the RESET signal is output at the timing when the input signal IN reaches zero from the positive level. As a result, the rectangular wave signal OSC is output so that the binary level changes at the timing when the input signal IN reaches zero.
  • the drive signal generation unit 31 operates as follows by providing the pulse width limiting unit 33. As shown in FIG. 7, (a) when the output signal of the comparator 21 changes to high level (time t1), the FET 35L is turned on and the input terminal of the NOT gate 37L immediately changes to low level. Accordingly, (b) the output signal IN_SET of the NOT gate 37L immediately changes to high level (time t2), so that (d) the SET signal is generated and (f) the rectangular wave signal OSC rises (time t3).
  • the output signal of the NOT gate 32 changes to a low level to turn off the FET 35H, but the capacitor 36H cannot be fully charged through the resistance element 34H during that time, so the input terminal of the NOT gate 37H is at a high level. do not become. Therefore, the signal IN_RESET maintains a high level.
  • the FET 35H When the output signal of the comparator 21 rises after the momentary low level change (time t5), the FET 35H is continuously turned off, so that the capacitor 36H is charged via the resistance element 34H and the input terminal of the NOT gate 37H. Becomes high level. Therefore, the signal IN_RESET changes to a low level at a timing delayed from the time point t5.
  • the drive signal generation unit 31 operates by detecting the timing when the voltage signal output from the primary side current information output unit 8 becomes zero. In this case, if the primary-side current information output unit 8 includes the resistance element R, a voltage signal having the same phase as the primary-side current I can be output as current information.
  • the drive signal generation unit 31 includes the pulse width limiting unit 33 that limits the level of the rectangular wave signal so that the level of the rectangular wave signal does not change when the interval of timing when the current amplitude reaches zero is less than the lower limit time. For example, even if the output signal of the comparator 21 changes to a low level for a moment due to the influence of noise, it can be canceled so that the influence is not exerted.
  • the primary-side current information output unit 8 is configured by a resistance element R_OSC
  • the drive signal generation unit 42 is configured by only the comparator 21 of the third embodiment. It is a thing. Each element constant shown in the figure was given to this power transmission device 41, and a simulation was performed on the operating frequency, transmission power, and transmission efficiency.
  • the voltage of the power source VIN is 10V
  • the constants of the power transmission unit 19 and the secondary circuit are equal
  • the capacitance is 3.28 nF
  • the resistance value is 0.62 ⁇
  • the inductance is 1.93 ⁇ H
  • the resistance value of the resistance element R_OSC is 0.1 ⁇
  • the coil coupling coefficient between the primary side and the secondary side is 0.9
  • the terminal voltage of the smoothing capacitor 16 is 25 V
  • the signal propagation delay time of the comparator 21 is 10 ns.
  • the delay times p1 to p4 of the edge changes of the control signals VGH and VGL output from the driver 4 with respect to the change of the rectangular wave signal OSC are all set to 10 ns.
  • the operating frequency of the power transmission device 41 shown in FIG. 10 is the resonance frequency (2 MHz at 0% fluctuation). It is changing following the change. Further, as shown in FIG. 11, the transmission power is substantially constant at about 3.3 W with respect to fluctuations in the element values of L and C, and the transmission efficiency is constant at about 80% as shown in FIG. Yes.
  • the drive signal generator 42 can be configured simply by the comparator 21.
  • a power transmission device 51 according to the fourth embodiment is obtained by adding an activation signal generation unit 52 (initial drive signal output unit) to the power transmission device 41 according to the third embodiment.
  • the oscillation operation of the power transmission unit 19 is started by the signal output from the activation signal generation unit 52.
  • the activation signal generation unit 52 includes a delay circuit 53, a NOT gate 54, AND gates 55 and 56, and an OR gate 57.
  • the activation signal CNT is input from the outside to one of the input terminal of the delay circuit 53 and the input terminals of the AND gates 55 and 56.
  • the output terminal of the delay circuit 53 is connected to the other input terminal of the AND gate 55 via a NOT gate 54.
  • the output terminal of the AND gate 55 is connected to one input terminal of the OR gate 57, and the other input terminal of the OR gate 57 is connected to the output terminal of the drive signal generation unit 42 (comparator 21).
  • the output terminal of the OR gate 57 is connected to the other input terminal of the AND gate 56, and the output terminal of the AND gate 56 is connected to the input terminal of the driver 4.
  • the delay circuit 53, the NOT gate 54, and the AND gate 55 constitute a pulse signal generation unit 58.
  • the driver 4 turns on the power switch 1 to energize the power transmission unit 19. Then, a damped vibration is generated in the power transmission unit 19 and a current starts to flow through the resistance element R_OSC of the primary side current information output unit 8 ((d), time point s4). Then, (e) the drive signal generation unit 42 detects the first zero cross point of the primary side current and raises the rectangular wave signal OSC.
  • the signal TRG becomes a low level, but since the rectangular wave signal OSC is output as the signal DRV_IN through the OR gate 57 and the AND gate 56, the vibration of the power transmission unit 19 is continued without being attenuated. .
  • the activation signal generation unit 52 outputs the initial drive signal DRV_IN for starting the operation of the drive signal generation unit 42 as a pulse signal.
  • the pulse generator 58 that generates the signal TRG at the timing when the activation signal CNT is input, the rectangular wave signal OSC generated by the drive signal generator 42, and the OR that outputs the OR signal of the signal TRG A gate 57 and an AND gate 56 that outputs the OR signal to the driver 4 when the activation signal CNT is input are provided.
  • the oscillation operation of the power transmission unit 19 can be started and power can be transmitted.
  • the power transmission device 61 of the fifth embodiment is obtained by replacing the activation signal generation unit 52 of the fourth embodiment with an activation signal generation unit 62 (initial drive signal output unit).
  • the oscillation operation of the power transmission unit 19 is started by a signal output from the activation signal generation unit 62.
  • the activation signal generation unit 62 includes an oscillator 63 and a PWM selection unit 64 (signal selection unit).
  • One of the input terminals of the PWM selector 64 is connected to the output terminal of the oscillator 63, and the other input terminal is connected to the output terminal of the drive signal generator 42.
  • the oscillator 63 outputs a rectangular wave oscillation signal EXT-OSC.
  • the frequency of the oscillation signal EXT-OSC is set around a standard resonance frequency of 2.0 MHz.
  • a selection signal SEL input from the outside is input to the input selection terminal of the PWM selection unit 64.
  • the output terminal of the PWM selection unit 64 is connected to the input terminal of the driver 4.
  • the PWM selection unit 64 selects the oscillation signal EXT-OSC when the selection signal SEL is at a low level, the oscillation signal EXT-OSC is output to the driver 4 as the signal DRV_IN.
  • a current starts to flow through the resistance element R_OSC of the primary side current information output unit 8, and the drive signal generation unit 42 detects the first zero cross point of the primary side current and raises the rectangular wave signal OSC.
  • the PWM selection unit 64 selects the rectangular wave signal OSC side, so that the rectangular wave signal OSC is output as the signal DRV_IN and the driving frequency of the driver 4 is automatically resonated thereafter. Adjusted to frequency.
  • the oscillator 63 that outputs the rectangular wave oscillation signal EXT-OSC, the oscillation signal EXT-OSC, and the rectangular wave signal generated by the rectangular wave signal generation unit 42 are obtained.
  • a PWM selection unit 64 that selects and outputs the selected signal to the driver 4.
  • the PWM selection unit 64 selects the oscillation signal EXT-OSC at the time of startup, and the switching element unit 3 transmits the power transmission unit.
  • An electric current was generated in 19. Therefore, the same effect as the fourth embodiment can be obtained.
  • the pulse width limiter 33 may be provided in the drive signal generator 9 of the first embodiment.
  • a resistance element may be arranged as the load of the power receiving device 18.
  • the switching element is not limited to the MOSFET, but may be a bipolar transistor or IGBT.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

This electric power transmitting device is provided with: a power transmitting unit (19) which includes a coil (7) and a capacitor (5) and which generates a wireless signal to transmit electric power to a power-receiving side; a switching element unit (3) which includes at least one series circuit comprising two switching elements (1, 2) connected between a power source and ground, and which supplies a drive current to the power transmitting unit; a drive circuit (4) which outputs drive signals to each switching element on the basis of an input rectangular wave signal; a current information output unit (8) which detects a current flowing through the power transmitting unit, and outputs current information; and a rectangular wave signal generating unit (9, 31, 42) which, with reference to the current information, generates a rectangular wave signal, the signal level of which changes on the basis of the timing with which the current flowing through the power transmitting unit reaches zero, and which outputs said rectangular wave signal to the drive circuit.

Description

電力伝送装置及び電力伝送システムPower transmission device and power transmission system 関連出願の相互参照Cross-reference of related applications
 本出願は、2015年2月16日に出願された日本出願番号2015-27614号に基づくもので、ここにその記載内容を援用する。 This application is based on Japanese Application No. 2015-27614 filed on Feb. 16, 2015, the contents of which are incorporated herein by reference.
 本開示は、コイル及びコンデンサを有してなる送電部が発生させる無線信号により受電側に電力を伝送する電力伝送装置,及びその電力伝送装置を備えてなる電力伝送システムに関する。 The present disclosure relates to a power transmission device that transmits power to a power receiving side by a radio signal generated by a power transmission unit including a coil and a capacitor, and a power transmission system including the power transmission device.
 特許文献1には、4つのFET(QMP1,QMP2,QMN1,QMN2)で構成されるHブリッジ回路の出力端子間にLC並列回路を構成し、そのLC並列回路に供給する電源の周波数をL、Cで決まる共鳴周波数に自動的に一致させて2次側に電力を送信する構成が開示されている。 In Patent Document 1, an LC parallel circuit is configured between output terminals of an H bridge circuit composed of four FETs (QMP1, QMP2, QMN1, QMN2), and the frequency of a power source supplied to the LC parallel circuit is set to L, A configuration is disclosed in which power is automatically transmitted to the secondary side in accordance with the resonance frequency determined by C.
米国特許第7558080号明細書US Pat. No. 7,580,080
 しかしながら、特許文献1の構成では、大きな電流が流れる4つのFETのドレイン-ソース間電圧がほぼ正弦波状に変化するため、これらのスイッチング損失が大きくなり効率が低下するという問題がある。 However, in the configuration of Patent Document 1, since the drain-source voltages of the four FETs through which a large current flows change in a substantially sine wave shape, there is a problem in that these switching losses increase and efficiency decreases.
 本開示は、スイッチング損失が小さい構成にて電源の動作周波数を共鳴周波数に調整する機能を追加することで、より高い効率で受電側に電力を送信できる電力送信装置,及びその電力伝送装置を備えてなる電力伝送システムを提供することを目的とする。
本開示の第一の態様によれば、電力伝送装置は、コイル及びコンデンサを有し、無線信号を発生させて受電側に電力を伝送する送電部と、電源とグランドとの間に接続される2つのスイッチング素子の直列回路を少なくとも1つ以上有し、送電部に駆動電流を供給するスイッチング素子部と、入力される矩形波信号に基づいて、スイッチング素子にそれぞれ駆動信号を出力する駆動回路と、送電部に流れる電流を検出し、電流に相当する情報(以下、電流情報と称す)を出力する電流情報出力部と、電流情報を参照することで、送電部に流れる電流がゼロに達するタイミングを基準として信号レベルが変化する矩形波信号を生成し、駆動回路に出力する矩形波信号生成部とを備える。
The present disclosure includes a power transmission device capable of transmitting power to the power receiving side with higher efficiency by adding a function of adjusting the operating frequency of the power source to the resonance frequency in a configuration with small switching loss, and the power transmission device. An object of the present invention is to provide a power transmission system.
According to the first aspect of the present disclosure, a power transmission device includes a coil and a capacitor, and is connected between a power transmission unit that generates a radio signal and transmits power to a power reception side, and a power source and a ground. A switching element unit that has at least one series circuit of two switching elements and supplies a driving current to a power transmission unit; and a driving circuit that outputs a driving signal to each switching element based on an input rectangular wave signal; The current information output unit that detects the current flowing through the power transmission unit and outputs information corresponding to the current (hereinafter referred to as current information), and the timing at which the current flowing through the power transmission unit reaches zero by referring to the current information And a rectangular wave signal generation unit that generates a rectangular wave signal whose signal level changes with reference to the signal and outputs the rectangular wave signal to the drive circuit.
 電力伝送装置によれば、スイッチング素子部は、送電部に駆動電流を供給する。駆動回路は、入力される矩形波信号に基づいてスイッチング素子に駆動信号を出力する。電流情報出力部は、送電部に流れる電流を検出し、その電流に相当する情報を出力する。そして、矩形波信号生成部は、その電流情報を参照することで、送電部に流れる電流がゼロに達するタイミングを基準として信号レベルが変化する矩形波信号を生成し、駆動回路に出力する。 According to the power transmission device, the switching element unit supplies a drive current to the power transmission unit. The drive circuit outputs a drive signal to the switching element based on the input rectangular wave signal. The current information output unit detects a current flowing through the power transmission unit and outputs information corresponding to the current. Then, the rectangular wave signal generation unit generates a rectangular wave signal whose signal level changes with reference to the current information so that the current flowing through the power transmission unit reaches zero, and outputs the rectangular wave signal to the drive circuit.
 このように構成すれば、送電部の両端電圧と送電部に流れる電流の位相ズレを抑制でき、矩形波信号の周波数は、送電部の入力インピーダンスの虚部がゼロとなる周波数である共鳴周波数に自動的に調整される。したがって、コイルのインダクタンスやコンデンサの容量のバラつきによる効率や電力の低下を抑制可能となる。また、送電部に流れる電流がゼロに達する前に駆動回路の出力を切替えれば、共鳴周波数より高い周波数で動作させることができ、電流がゼロに達した後に駆動回路の出力を切替えれば、共鳴周波数より低い周波数で動作させることが可能である。 If comprised in this way, the phase gap of the both-ends voltage of a power transmission part and the current which flows into a power transmission part can be controlled, and the frequency of a rectangular wave signal is the resonance frequency which is the frequency where the imaginary part of the input impedance of a power transmission part becomes zero. Adjusted automatically. Therefore, it is possible to suppress a decrease in efficiency and power due to variations in the inductance of the coil and the capacitance of the capacitor. Moreover, if the output of the drive circuit is switched before the current flowing through the power transmission unit reaches zero, it can be operated at a frequency higher than the resonance frequency, and if the output of the drive circuit is switched after the current reaches zero, It is possible to operate at a frequency lower than the resonance frequency.
 本開示の第二の態様によれば、電力伝送システムは、第一の態様にかかる電力伝送装置と、その電力伝送装置の送電部より無線信号で送信された電力を受電する受電部と、この受電部に並列に接続される負荷とを有する受電装置とを備える。したがって、電力伝送装置と、当該装置により送信された電力を受電する装置とによって電力伝送システムを構成できる。 According to the second aspect of the present disclosure, the power transmission system includes a power transmission device according to the first aspect, a power reception unit that receives power transmitted by a wireless signal from a power transmission unit of the power transmission device, A power receiving device having a load connected in parallel to the power receiving unit. Therefore, a power transmission system can be configured by a power transmission device and a device that receives power transmitted by the device.
 本開示についての上記目的およびその他の目的、特徴や利点は、添付の図面を参照しながら下記の詳細な記述により、より明確になる。
第1実施形態であり、電力伝送システムの構成を示す図 1次側電流情報検出部の構成例のバリエーションを示す図 駆動信号生成部の詳細構成を示す図 駆動信号生成部の動作タイミングチャート 第2実施形態であり、駆動信号生成部の詳細構成を示す図 駆動信号生成部の動作タイミングチャート パルス幅制限部の動作タイミングチャート 第3実施形態であり、電力伝送システムの構成を示す図 動作シミュレーションにおいて、各信号間に設定した遅延時間を示す図 動作周波数のシミュレーション結果を示す図 伝送電力のシミュレーション結果を示す図 伝送効率のシミュレーション結果を示す図 第4実施形態であり、電力伝送システムの構成を示す図 起動信号生成部の動作タイミングチャート 第5実施形態であり、電力伝送システムの構成を示す図
The above and other objects, features, and advantages of the present disclosure will become more apparent from the following detailed description with reference to the accompanying drawings.
The figure which is 1st Embodiment and shows the structure of an electric power transmission system The figure which shows the variation of the structural example of a primary side current information detection part. The figure which shows the detailed structure of a drive signal production | generation part. Operation timing chart of drive signal generator The figure which is 2nd Embodiment and shows the detailed structure of a drive signal generation part. Operation timing chart of drive signal generator Operation timing chart of pulse width limiter The figure which is 3rd Embodiment and shows the structure of an electric power transmission system Diagram showing delay time set between each signal in operation simulation Diagram showing operating frequency simulation results Diagram showing transmission power simulation results Diagram showing simulation results of transmission efficiency The figure which is 4th Embodiment and shows the structure of an electric power transmission system Operation timing chart of start signal generator The figure which is 5th Embodiment and shows the structure of an electric power transmission system
  (第1実施形態)
 図1に示すように、電源VINとグランドとの間には、2つのパワースイッチ(SW,スイッチング素子)1及び2の直列回路が接続されており、パワースイッチ部(スイッチング素子部)3が構成されている。パワースイッチ1,2は、例えばNチャネルMOSFETなどである。パワースイッチ1,2の導通制御端子(例えば、ゲート)には、ドライバ4(駆動回路)より制御信号VGH,VGLが与えられる。
(First embodiment)
As shown in FIG. 1, a series circuit of two power switches (SW, switching elements) 1 and 2 is connected between a power source VIN and the ground, and a power switch section (switching element section) 3 is configured. Has been. The power switches 1 and 2 are, for example, N-channel MOSFETs. Control signals VGH and VGL are supplied to the conduction control terminals (for example, gates) of the power switches 1 and 2 from the driver 4 (drive circuit).
 パワースイッチ1及び2の共通接続点とグランドとの間には、コンデンサ5,抵抗6及びコイル7からなる送電部19並びに1次側電流情報出力部8の直列回路が接続されている。尚、抵抗5は抵抗素子によるものと、配線に含まれる抵抗分との和を示している。1次側電流情報出力部8は、上記の直列回路に流れる電流の情報を検出して駆動信号生成部9(矩形波信号生成部)に出力する。駆動信号生成部9は、入力される情報に基づいて矩形波信号OSCを生成し、ドライバ4に出力する。ドライバ4は、矩形波信号OSCに基づいてパワースイッチ1及び2を排他的に且つ交互にオンオフするように制御信号VGH,VGLを生成する。以上が1次側の電力伝送装置10(1次側回路)を構成している。 Between the common connection point of the power switches 1 and 2 and the ground, a power transmission unit 19 including a capacitor 5, a resistor 6 and a coil 7 and a series circuit of a primary side current information output unit 8 are connected. The resistor 5 indicates the sum of the resistance element and the resistance included in the wiring. The primary side current information output unit 8 detects information on the current flowing through the series circuit and outputs the detected information to the drive signal generation unit 9 (rectangular wave signal generation unit). The drive signal generation unit 9 generates a rectangular wave signal OSC based on the input information and outputs it to the driver 4. The driver 4 generates control signals VGH and VGL so as to exclusively and alternately turn on and off the power switches 1 and 2 based on the rectangular wave signal OSC. The above constitutes the primary side power transmission device 10 (primary side circuit).
 2次側には、全波整流器11(負荷)の入力端子側に、コイル12,抵抗13及びコンデンサ14の直列回路である受電部20が接続されている。抵抗13は、抵抗6と同じく抵抗素子と配線の抵抗分の和である。尚、抵抗素子を加えるか否かは任意で、加えないこともある。全波整流器11は、4つのダイオード15a~15dをブリッジ接続して構成されている。 On the secondary side, a power reception unit 20, which is a series circuit of a coil 12, a resistor 13, and a capacitor 14, is connected to the input terminal side of the full-wave rectifier 11 (load). The resistor 13 is the sum of the resistance of the resistance element and the wiring, like the resistor 6. Whether or not a resistance element is added is arbitrary and may not be added. The full-wave rectifier 11 is configured by bridge-connecting four diodes 15a to 15d.
 全波整流器11の出力端子間には、平滑コンデンサ16(負荷)及び電流源のシンボルで示す負荷17が並列に接続されている。以上の2次側の構成において、負荷17を除いたものが受電装置18(2次側回路)を構成している。そして、1次側の電力伝送装置10から2次側の受電装置18には、磁界共鳴方式により電力が伝送され、これらが電力伝送システムを構成している。 Between the output terminals of the full-wave rectifier 11, a smoothing capacitor 16 (load) and a load 17 indicated by a current source symbol are connected in parallel. In the secondary side configuration described above, the power receiving device 18 (secondary side circuit) is configured by removing the load 17. Then, power is transmitted from the primary-side power transmission device 10 to the secondary-side power reception device 18 by a magnetic resonance method, and these constitute a power transmission system.
 図2に示すように、1次側電流情報出力部8は、送電部19に流れる1次側電流Iを、例えば抵抗素子R,コンデンサC,インダクタンス(コイル)L等に通電して検出する構成とする。抵抗素子Rを用いた場合、その端子電圧Vの1次側電流Iに対する位相差は0°になる。また、コンデンサCを用いた場合上記位相差は90°遅れとなり、インダクタンスLを用いた場合上記位相差は90°進みとなる。更に、抵抗素子R及びインダクタンスLの並列回路又は直列回路を用いても良い。この場合、端子電圧Vの位相は1次側電流Iに対して進み、その位相差は任意に調整可能である。 As shown in FIG. 2, the primary-side current information output unit 8 detects the primary-side current I flowing through the power transmission unit 19 by energizing, for example, a resistance element R, a capacitor C, an inductance (coil) L, and the like. And When the resistance element R is used, the phase difference of the terminal voltage V with respect to the primary current I is 0 °. When the capacitor C is used, the phase difference is delayed by 90 °, and when the inductance L is used, the phase difference is advanced by 90 °. Furthermore, a parallel circuit or a series circuit of the resistance element R and the inductance L may be used. In this case, the phase of the terminal voltage V advances with respect to the primary side current I, and the phase difference can be adjusted arbitrarily.
 尚、コンデンサCを用いた90°遅れ位相となる場合でも、振幅極性が逆方向に変化するゼロクロスタイミングを検出すれば、その後に到来する1次側電流Iのゼロクロスタイミングを捉えることができる。 Even in the case of a 90 ° delayed phase using the capacitor C, if the zero cross timing at which the amplitude polarity changes in the reverse direction is detected, the zero cross timing of the incoming primary current I can be captured.
 図3に示すように、駆動信号生成部9は、コンパレータ21(L,H),遅延回路22(L,H),NOTゲート23(L,H),ANDゲート24(L,H)及びSRフリップフロップ25で構成されている。コンパレータ21Lの非反転入力端子及びコンパレータ21Hの反転入力端子には、1次側電流情報出力部8からの入力信号INが与えられる。コンパレータ21Lの反転入力端子には、図4(a)に示すように、入力信号INの電圧波形のゼロクロス点より僅かに低いレベルに設定された閾値VTLが与えられ、コンパレータ21Hの非反転入力端子には、同じく図4(a)に示すように、入力信号INの電圧波形のゼロクロス点より僅かに高いレベルに設定された閾値VTHが与えられる。 As shown in FIG. 3, the drive signal generator 9 includes a comparator 21 (L, H), a delay circuit 22 (L, H), a NOT gate 23 (L, H), an AND gate 24 (L, H), and an SR. The flip-flop 25 is used. The input signal IN from the primary side current information output unit 8 is given to the non-inverting input terminal of the comparator 21L and the inverting input terminal of the comparator 21H. As shown in FIG. 4A, the inverting input terminal of the comparator 21L is given a threshold value VTL set at a level slightly lower than the zero cross point of the voltage waveform of the input signal IN, and the non-inverting input terminal of the comparator 21H. Similarly, as shown in FIG. 4A, a threshold value VTH set to a level slightly higher than the zero cross point of the voltage waveform of the input signal IN is given.
 コンパレータ21Lの出力端子は、ANDゲート24Lの一方の入力端子及び遅延回路22Lの入力端子に接続されている。遅延回路22Lの出力端子は、NOTゲート23Lを介してANDゲート24Lの他方の入力端子に接続されている。そして、ANDゲート24Lの出力端子は、SRフリップフロップ25のセット端子Sに接続されている。コンパレータ21H側の構成は上記と対称であり、ANDゲート24Hの出力端子は、SRフリップフロップ25のリセット端子Rに接続されている。そして、SRフリップフロップ25の出力端子Qから矩形波信号OSCが出力される。 The output terminal of the comparator 21L is connected to one input terminal of the AND gate 24L and the input terminal of the delay circuit 22L. The output terminal of the delay circuit 22L is connected to the other input terminal of the AND gate 24L via the NOT gate 23L. The output terminal of the AND gate 24L is connected to the set terminal S of the SR flip-flop 25. The configuration on the comparator 21H side is symmetric with the above, and the output terminal of the AND gate 24H is connected to the reset terminal R of the SR flip-flop 25. A rectangular wave signal OSC is output from the output terminal Q of the SR flip-flop 25.
 尚、遅延回路22L,NOTゲート23L及びANDゲート24Lはセット信号出力部26を構成し、遅延回路22H,NOTゲート23H及びANDゲート24Hはリセット信号出力部27を構成している。 The delay circuit 22L, the NOT gate 23L, and the AND gate 24L constitute a set signal output unit 26, and the delay circuit 22H, the NOT gate 23H, and the AND gate 24H constitute a reset signal output unit 27.
 次に、本実施形態の作用について説明する。尚、説明を簡単にするため、電力伝送装置10の送電部19には既に電流が発生しているものとする。この時、1次側電流Iに相当する入力信号INは、図4(a)に示すように正弦波状に変化する。コンパレータ21Lの出力信号は、入力信号INのレベルが閾値VTLを超えるとハイレベルに変化するので、ANDゲート24Lの出力信号もハイレベルになる。そして、遅延回路22Lに設定されている遅延時間が経過すると、ANDゲート24Lの一方の入力端子がローレベルになるので、ANDゲート24Lの出力信号は上記遅延時間だけハイレベルになる。これがSRフリップフロップ25へのSET信号となり(図4(b)参照)、矩形波信号OSCが立ち上がる(図4(d)参照)。 Next, the operation of this embodiment will be described. For simplicity, it is assumed that a current has already been generated in the power transmission unit 19 of the power transmission device 10. At this time, the input signal IN corresponding to the primary side current I changes in a sine wave shape as shown in FIG. Since the output signal of the comparator 21L changes to high level when the level of the input signal IN exceeds the threshold value VTL, the output signal of the AND gate 24L also becomes high level. When the delay time set in the delay circuit 22L elapses, one input terminal of the AND gate 24L becomes low level, so that the output signal of the AND gate 24L becomes high level for the delay time. This becomes the SET signal to the SR flip-flop 25 (see FIG. 4B), and the rectangular wave signal OSC rises (see FIG. 4D).
 一方、コンパレータ21Hの出力信号は、入力信号INのレベルが閾値VTHを下回るとハイレベルに変化する。すると、コンパレータ21L側と同様の動作により、ANDゲート24Hの出力信号は遅延回路24Hの遅延時間だけハイレベルになる。これがSRフリップフロップ25へのRESET信号となり(図4(c)参照)、矩形波信号OSCが立ち下がる(図4(d)参照)。 On the other hand, the output signal of the comparator 21H changes to a high level when the level of the input signal IN falls below the threshold value VTH. Then, the output signal of the AND gate 24H becomes high level for the delay time of the delay circuit 24H by the same operation as that of the comparator 21L. This becomes a RESET signal to the SR flip-flop 25 (see FIG. 4C), and the rectangular wave signal OSC falls (see FIG. 4D).
 すなわち、コンパレータ21L側は、入力信号INが負のレベルからゼロクロス点に達する直前のタイミングでSET信号を出力し、コンパレータ21H側は、入力信号INが正のレベルからゼロクロス点に達する直前のタイミングでRESET信号を出力する。その結果、矩形波信号OSCは、入力信号INがゼロクロス点に達する直前のタイミングで二値レベルが変化するように出力される。 That is, the comparator 21L outputs the SET signal at a timing immediately before the input signal IN reaches the zero cross point from the negative level, and the comparator 21H side at the timing immediately before the input signal IN reaches the zero cross point from the positive level. RESET signal is output. As a result, the rectangular wave signal OSC is output so that the binary level changes at a timing immediately before the input signal IN reaches the zero cross point.
 以上のように本実施形態によれば、電源VINとグランドとの間に接続される2つのパワースイッチ1及び2の直列回路を有してなるパワースイッチ部3により、無線信号で2次側に電力を伝送する送電部19に駆動電流を供給する。ドライバ4は、入力される矩形波信号に基づいてパワースイッチ1及び2に駆動信号を出力する。 As described above, according to the present embodiment, the power switch unit 3 including the series circuit of the two power switches 1 and 2 connected between the power source VIN and the ground can transmit the radio signal to the secondary side. A drive current is supplied to the power transmission unit 19 that transmits power. The driver 4 outputs a drive signal to the power switches 1 and 2 based on the input rectangular wave signal.
 1次側電流情報出力部8は、送電部19に流れる電流を検出し、その電流に相当する情報を出力する。そして、駆動信号生成部9は、その電流情報を参照することで、送電部19に流れる電流がゼロに達するタイミングを基準として信号レベルが変化する矩形波信号を生成し、ドライバ4に出力する。 The primary side current information output unit 8 detects a current flowing through the power transmission unit 19 and outputs information corresponding to the current. Then, the drive signal generation unit 9 refers to the current information, generates a rectangular wave signal whose signal level changes based on the timing when the current flowing through the power transmission unit 19 reaches zero, and outputs the rectangular wave signal to the driver 4.
 このように構成すれば、送電部19の両端電圧と送電部19に流れる電流の位相ズレを抑制でき、前記矩形波信号の周波数は、送電部19の入力インピーダンスの虚部がゼロとなる周波数である共鳴周波数に自動的に調整される。したがって、コイル7のインダクタンスやコンデンサ5の容量のバラつきによる効率や電力の低下を抑制可能となる。また、送電部19に流れる電流がゼロに達する前にドライバ4の出力を切替えれば、共鳴周波数より高い周波数で動作させることができ、前記電流がゼロに達した後にドライバ4の出力を切替えれば、共鳴周波数より低い周波数で動作させることが可能である。 If comprised in this way, the phase shift of the both-ends voltage of the power transmission part 19 and the electric current which flows into the power transmission part 19 can be suppressed, and the frequency of the said rectangular wave signal is a frequency from which the imaginary part of the input impedance of the power transmission part 19 becomes zero. It is automatically adjusted to a certain resonance frequency. Therefore, it is possible to suppress a reduction in efficiency and power due to variations in the inductance of the coil 7 and the capacitance of the capacitor 5. Further, if the output of the driver 4 is switched before the current flowing through the power transmission unit 19 reaches zero, the driver 4 can be operated at a frequency higher than the resonance frequency, and the output of the driver 4 can be switched after the current reaches zero. For example, it is possible to operate at a frequency lower than the resonance frequency.
 そして、駆動信号生成部9は、1次側電流情報出力部8が出力する電圧信号がゼロになる直前のタイミングを検出して動作する。この場合、1次側電流情報出力部8を、コイルLを備えるか、又は抵抗素子R及びコイルLの直列回路又は並列回路を備える構成とすれば、1次側電流Iよりも進み位相となる電圧信号を電流情報として出力できる。またこの場合、コイルLを、送電部19を構成するコイル7と共通にすれば部品数を削減できる。更に、1次側電流情報出力部8を、コンデンサCを備える構成とすれば、1次側電流Iよりも遅れ位相となる電圧信号電流情報として出力できる。そしてこの場合も、コンデンサCを、送電部19を構成するコンデンサ5と共通にすれば部品数を削減できる。 The drive signal generation unit 9 operates by detecting the timing immediately before the voltage signal output from the primary side current information output unit 8 becomes zero. In this case, if the primary-side current information output unit 8 includes the coil L, or includes a series circuit or a parallel circuit of the resistance element R and the coil L, the primary-side current information output unit 8 has a leading phase with respect to the primary-side current I. A voltage signal can be output as current information. In this case, the number of components can be reduced if the coil L is shared with the coil 7 constituting the power transmission unit 19. Further, if the primary side current information output unit 8 is configured to include the capacitor C, it can be output as voltage signal current information having a phase lag behind the primary side current I. In this case as well, the number of components can be reduced if the capacitor C is shared with the capacitor 5 constituting the power transmission unit 19.
  (第2実施形態)
 以下、第1実施形態と同一部分には同一符号を付して説明を省略し、異なる部分について説明する。図5に示すように、第2実施形態の駆動信号生成部31(矩形波信号生成部)は、1つのコンパレータ21を用いており、その非反転入力端子に入力信号INが、反転入力端子には閾値として0V(グランドレベル)がそれぞれ与えられている。コンパレータ21の出力信号は、直接及びNOTゲート32を介してパルス幅制限部33に入力されている。
(Second Embodiment)
Hereinafter, the same parts as those in the first embodiment are denoted by the same reference numerals, description thereof is omitted, and different parts are described. As shown in FIG. 5, the drive signal generation unit 31 (rectangular wave signal generation unit) of the second embodiment uses one comparator 21, and the input signal IN is applied to the non-inverting input terminal and the inverting input terminal is provided. 0V (ground level) is given as a threshold value. The output signal of the comparator 21 is input to the pulse width limiter 33 directly and via the NOT gate 32.
 パルス幅制限部33において、電源とグランドとの間には、抵抗素子34(L,H)及びNチャネルMOSFET35(L,H)の直列回路が接続されており、NチャネルMOSFET35(L,H)には並列にコンデンサ36(L,H)が接続されている。コンパレータ21の出力端子は、NチャネルMOSFET35Lのゲートに接続されており、NOTゲート32の出力端子は、NチャネルMOSFET35Hのゲートに接続されている。そして、NチャネルMOSFET35(L,H)のドレインにはNOTゲート37(L,H)の入力端子が接続されている。NOTゲート37(L,H)は、駆動信号生成部9におけるコンパレータ21(L,H)を置き換えたもので、NOTゲート37(L,H)の出力端子以降の構成は、駆動信号生成部9と同じである。 In the pulse width limiting unit 33, a series circuit of a resistance element 34 (L, H) and an N channel MOSFET 35 (L, H) is connected between the power source and the ground, and the N channel MOSFET 35 (L, H). Are connected in parallel with capacitors 36 (L, H). The output terminal of the comparator 21 is connected to the gate of the N-channel MOSFET 35L, and the output terminal of the NOT gate 32 is connected to the gate of the N-channel MOSFET 35H. The input terminal of the NOT gate 37 (L, H) is connected to the drain of the N-channel MOSFET 35 (L, H). The NOT gate 37 (L, H) replaces the comparator 21 (L, H) in the drive signal generation unit 9. The configuration after the output terminal of the NOT gate 37 (L, H) is the drive signal generation unit 9. Is the same.
 尚、第1実施形態のセット信号出力部26にパルス幅制限部33及びNOTゲート37Lを加えたものがセット信号出力部26Aを構成し、同リセット信号出力部27にパルス幅制限部33並びにNOTゲート32及び37Lを加えたものがリセット信号出力部27Aを構成している。 The set signal output unit 26 according to the first embodiment added with the pulse width limiting unit 33 and the NOT gate 37L constitutes the set signal output unit 26A, and the reset signal output unit 27 includes the pulse width limiting unit 33 and the NOT gate. The sum of the gates 32 and 37L constitutes the reset signal output unit 27A.
 次に、第2実施形態の作用について説明する。図6は図4相当図であり、駆動信号生成部31では、コンパレータ21が入力信号INを閾値0Vと比較しているので、入力信号INが負のレベルからゼロに達するタイミングでSET信号を出力し、入力信号INが正のレベルからゼロに達するタイミングでRESET信号を出力する。その結果、矩形波信号OSCは、入力信号INがゼロに達するタイミングで二値レベルが変化するように出力される。 Next, the operation of the second embodiment will be described. FIG. 6 is a diagram corresponding to FIG. 4. In the drive signal generation unit 31, the comparator 21 compares the input signal IN with the threshold value 0 V, so that the SET signal is output when the input signal IN reaches zero from the negative level. Then, the RESET signal is output at the timing when the input signal IN reaches zero from the positive level. As a result, the rectangular wave signal OSC is output so that the binary level changes at the timing when the input signal IN reaches zero.
 また、駆動信号生成部31は、パルス幅制限部33を設けたことで以下のように動作する。図7に示すように、(a)コンパレータ21の出力信号がハイレベルに変化すると(時点t1)、FET35LがターンオンしてNOTゲート37Lの入力端子は直ちにローレベルに変化する。それに伴い、(b)NOTゲート37Lの出力信号IN_SETは直ちにハイレベルに変化するので(時点t2)、(d)SET信号が発生し(f)矩形波信号OSCが立ち上がる(時点t3)。 Further, the drive signal generation unit 31 operates as follows by providing the pulse width limiting unit 33. As shown in FIG. 7, (a) when the output signal of the comparator 21 changes to high level (time t1), the FET 35L is turned on and the input terminal of the NOT gate 37L immediately changes to low level. Accordingly, (b) the output signal IN_SET of the NOT gate 37L immediately changes to high level (time t2), so that (d) the SET signal is generated and (f) the rectangular wave signal OSC rises (time t3).
 この時、NOTゲート32の出力信号はローレベルに変化してFET35Hをターンオフさせるが、その間に抵抗素子34Hを介してコンデンサ36Hを充電し切ることができないため、NOTゲート37Hの入力端子はハイレベルにならない。したがって、信号IN_RESETはハイレベルを維持する。 At this time, the output signal of the NOT gate 32 changes to a low level to turn off the FET 35H, but the capacitor 36H cannot be fully charged through the resistance element 34H during that time, so the input terminal of the NOT gate 37H is at a high level. do not become. Therefore, the signal IN_RESET maintains a high level.
 この直後に、図7に示すように、(a)コンパレータ21の出力信号が例えばノイズの影響を受けて一瞬ローレベルに変化したとする(時点t4)。この時、信号IN_RESETはハイレベルを維持しており、コンパレータ21の出力信号の立下りに対して、信号IN_RESETの立ち上りは生成されない。したがって、矩形波信号OSCはハイレベルを維持することになり、上記ローレベル変化の影響を受けることが無い。 Immediately after this, as shown in FIG. 7, it is assumed that (a) the output signal of the comparator 21 is momentarily changed to a low level due to the influence of noise (time t4). At this time, the signal IN_RESET is maintained at a high level, and the rising edge of the signal IN_RESET is not generated with respect to the falling edge of the output signal of the comparator 21. Therefore, the rectangular wave signal OSC is maintained at a high level and is not affected by the low level change.
 コンパレータ21の出力信号が、上記一瞬のローレベル変化後に立上ると(時点t5)、FET35Hが継続的にターンオフするので、コンデンサ36Hが抵抗素子34Hを介して充電されて、NOTゲート37Hの入力端子はハイレベルになる。したがって、時点t5から遅れたタイミングで信号IN_RESETはローレベルに変化する。 When the output signal of the comparator 21 rises after the momentary low level change (time t5), the FET 35H is continuously turned off, so that the capacitor 36H is charged via the resistance element 34H and the input terminal of the NOT gate 37H. Becomes high level. Therefore, the signal IN_RESET changes to a low level at a timing delayed from the time point t5.
 その後、時点t6でコンパレータ21の出力信号がローレベルに変化し、矩形波信号OSCがローレベルに立ち下がった直後に時点t7で一瞬だけハイレベルに変化した場合も、上記と同様の動作が信号IN_SET側に作用する。したがって、信号IN_SETはハイレベルを維持し、信号の立上り変化が生じないため、ハイレベル変化の影響も受けることが無い。 Thereafter, when the output signal of the comparator 21 changes to a low level at time t6, and immediately after the rectangular wave signal OSC falls to a low level, it changes to a high level for a moment at time t7, the same operation as above is performed. Acts on the IN_SET side. Therefore, the signal IN_SET is maintained at a high level and no rising change of the signal occurs, so that the signal IN_SET is not affected by the high level change.
 以上のように第2実施形態によれば、駆動信号生成部31は、1次側電流情報出力部8が出力する電圧信号がゼロになるタイミングを検出して動作する。この場合、1次側電流情報出力部8を、抵抗素子Rを備える構成とすれば、1次側電流Iと同位相となる電圧信号を電流情報として出力することができる。 As described above, according to the second embodiment, the drive signal generation unit 31 operates by detecting the timing when the voltage signal output from the primary side current information output unit 8 becomes zero. In this case, if the primary-side current information output unit 8 includes the resistance element R, a voltage signal having the same phase as the primary-side current I can be output as current information.
 更に、駆動信号生成部31に、電流の振幅がゼロに達するタイミングの間隔が下限時間未満になった際に、矩形波信号のレベルを変化させないように制限するパルス幅制限部33を備えたので、コンパレータ21の出力信号が例えばノイズの影響を受けて一瞬ローレベルに変化しても、その影響が及ばないようにキャンセルできる。 Further, since the drive signal generation unit 31 includes the pulse width limiting unit 33 that limits the level of the rectangular wave signal so that the level of the rectangular wave signal does not change when the interval of timing when the current amplitude reaches zero is less than the lower limit time. For example, even if the output signal of the comparator 21 changes to a low level for a moment due to the influence of noise, it can be canceled so that the influence is not exerted.
  (第3実施形態)
 図8に示すように、第3実施形態の電力伝送装置41は、1次側電流情報出力部8を抵抗素子R_OSCで構成し、駆動信号発生部42を第3実施形態のコンパレータ21のみで構成したものである。この電力伝送装置41について同図中に示す各素子定数等を与え、動作周波数,伝送電力及び伝送効率についてシミュレーションを行った。
(Third embodiment)
As shown in FIG. 8, in the power transmission device 41 of the third embodiment, the primary-side current information output unit 8 is configured by a resistance element R_OSC, and the drive signal generation unit 42 is configured by only the comparator 21 of the third embodiment. It is a thing. Each element constant shown in the figure was given to this power transmission device 41, and a simulation was performed on the operating frequency, transmission power, and transmission efficiency.
 電源VINの電圧は10V,送電部19と2次側回路の定数は等しく、容量は3.28nF,抵抗値は0.62Ω,インダクタンスは1.93μH,抵抗素子R_OSCの抵抗値は0.1Ω,1次側-2次側間のコイル結合係数は0.9,平滑コンデンサ16の端子電圧は25V,コンパレータ21の信号伝搬遅延時間は10nsである。尚、図9に示すように、矩形波信号OSCの変化に対しドライバ4が出力する制御信号VGH,VGLのエッジ変化の遅延時間p1~p4は、何れも10nsに設定している。 The voltage of the power source VIN is 10V, the constants of the power transmission unit 19 and the secondary circuit are equal, the capacitance is 3.28 nF, the resistance value is 0.62Ω, the inductance is 1.93 μH, the resistance value of the resistance element R_OSC is 0.1Ω, The coil coupling coefficient between the primary side and the secondary side is 0.9, the terminal voltage of the smoothing capacitor 16 is 25 V, and the signal propagation delay time of the comparator 21 is 10 ns. As shown in FIG. 9, the delay times p1 to p4 of the edge changes of the control signals VGH and VGL output from the driver 4 with respect to the change of the rectangular wave signal OSC are all set to 10 ns.
 送電部19を構成するコイル7及びコンデンサ5のL、Cの素子値が±10%変動した場合でも、図10に示す電力伝送装置41の動作周波数は、共鳴周波数(変動0%で2MHz)の変化に追従して変化している。また、図11に示すように、伝送電力はL、Cの素子値変動に対して約3.3Wでほぼ一定であり、図12に示すように、伝送効率もほぼ80%で一定となっている。 Even when the L and C element values of the coil 7 and the capacitor 5 constituting the power transmission unit 19 fluctuate by ± 10%, the operating frequency of the power transmission device 41 shown in FIG. 10 is the resonance frequency (2 MHz at 0% fluctuation). It is changing following the change. Further, as shown in FIG. 11, the transmission power is substantially constant at about 3.3 W with respect to fluctuations in the element values of L and C, and the transmission efficiency is constant at about 80% as shown in FIG. Yes.
 以上のように第3実施形態によれば、駆動信号発生部42をコンパレータ21のみで簡単に構成できる。 As described above, according to the third embodiment, the drive signal generator 42 can be configured simply by the comparator 21.
  (第4実施形態)
 図13に示すように、第4実施形態の電力伝送装置51は、第3実施形態の電力伝送装置41に起動信号生成部52(初期駆動信号出力部)を加えたものである。この起動信号生成部52より出力される信号によって送電部19の発振動作を開始させる。起動信号生成部52は、遅延回路53,NOTゲート54,ANDゲート55及び56並びにORゲート57で構成されている。遅延回路53の入力端子並びにANDゲート55及び56の入力端子の一方には、外部より起動信号CNTが入力される。
(Fourth embodiment)
As illustrated in FIG. 13, a power transmission device 51 according to the fourth embodiment is obtained by adding an activation signal generation unit 52 (initial drive signal output unit) to the power transmission device 41 according to the third embodiment. The oscillation operation of the power transmission unit 19 is started by the signal output from the activation signal generation unit 52. The activation signal generation unit 52 includes a delay circuit 53, a NOT gate 54, AND gates 55 and 56, and an OR gate 57. The activation signal CNT is input from the outside to one of the input terminal of the delay circuit 53 and the input terminals of the AND gates 55 and 56.
 遅延回路53の出力端子はNOTゲート54を介してANDゲート55の入力端子の他方に接続されている。ANDゲート55の出力端子は、ORゲート57の入力端子の一方に接続されており、ORゲート57の入力端子の他方は、駆動信号生成部42(コンパレータ21)の出力端子に接続されている。ORゲート57の出力端子は、ANDゲート56の入力端子の他方に接続されており、ANDゲート56の出力端子がドライバ4の入力端子に接続されている。尚、遅延回路53,NOTゲート54及びANDゲート55は、パルス信号発生部58を構成している。 The output terminal of the delay circuit 53 is connected to the other input terminal of the AND gate 55 via a NOT gate 54. The output terminal of the AND gate 55 is connected to one input terminal of the OR gate 57, and the other input terminal of the OR gate 57 is connected to the output terminal of the drive signal generation unit 42 (comparator 21). The output terminal of the OR gate 57 is connected to the other input terminal of the AND gate 56, and the output terminal of the AND gate 56 is connected to the input terminal of the driver 4. The delay circuit 53, the NOT gate 54, and the AND gate 55 constitute a pulse signal generation unit 58.
 次に、第4実施形態の作用について説明する。図14に示すように、(a)起動信号CNTのレベルがローからハイに変化すると(時点s1)、(b)ANDゲート55からは、遅延回路53に設定されている遅延時間のハイレベルパルス幅を有する信号TRG(トリガパルス)が出力される(時点s2)。すると、信号TRGは、ANDゲート56を介してドライバ4に入力される((c)信号DRV_IN,時点s3)。 Next, the operation of the fourth embodiment will be described. As shown in FIG. 14, (a) when the level of the activation signal CNT changes from low to high (time point s1), (b) the AND gate 55 sends a high-level pulse with a delay time set in the delay circuit 53. A signal TRG (trigger pulse) having a width is output (time point s2). Then, the signal TRG is input to the driver 4 via the AND gate 56 ((c) signal DRV_IN, time point s3).
 ドライバ4は、信号DRV_INがハイレベルになると、パワースイッチ1側をオンにして送電部19に通電を行う。すると、送電部19に減衰振動が発生して1次側電流情報出力部8の抵抗素子R_OSCに電流が流れ始める((d),時点s4)。そして、(e)駆動信号生成部42は、1次側電流の最初のゼロクロス点を検出して矩形波信号OSCを立ち上げる。 When the signal DRV_IN becomes a high level, the driver 4 turns on the power switch 1 to energize the power transmission unit 19. Then, a damped vibration is generated in the power transmission unit 19 and a current starts to flow through the resistance element R_OSC of the primary side current information output unit 8 ((d), time point s4). Then, (e) the drive signal generation unit 42 detects the first zero cross point of the primary side current and raises the rectangular wave signal OSC.
 時点s5で信号TRGはローレベルになるが、以降は矩形波信号OSCが、ORゲート57及びANDゲート56を介し信号DRV_INとして出力されるので、送電部19の振動は減衰せずに継続される。 At time s5, the signal TRG becomes a low level, but since the rectangular wave signal OSC is output as the signal DRV_IN through the OR gate 57 and the AND gate 56, the vibration of the power transmission unit 19 is continued without being attenuated. .
 以上のように第4実施形態によれば、起動信号生成部52は、駆動信号生成部42の動作を開始させるための初期駆動信号DRV_INを、パルス信号として出力する。具体的には、起動信号CNTが入力されたタイミングで信号TRGを発生させるパルス発生部58と、駆動信号生成部42により生成される矩形波信号OSCと、信号TRGとのOR信号を出力するORゲート57と、起動信号CNTが入力されると、前記OR信号をドライバ4に出力するANDゲート56とを備えて構成した。これにより、送電部19の発振動作を開始させて電力の送信を行うことができる。 As described above, according to the fourth embodiment, the activation signal generation unit 52 outputs the initial drive signal DRV_IN for starting the operation of the drive signal generation unit 42 as a pulse signal. Specifically, the pulse generator 58 that generates the signal TRG at the timing when the activation signal CNT is input, the rectangular wave signal OSC generated by the drive signal generator 42, and the OR that outputs the OR signal of the signal TRG A gate 57 and an AND gate 56 that outputs the OR signal to the driver 4 when the activation signal CNT is input are provided. Thereby, the oscillation operation of the power transmission unit 19 can be started and power can be transmitted.
  (第5実施形態)
 図15に示すように、第5実施形態の電力伝送装置61は、第4実施形態の起動信号生成部52を、起動信号生成部62(初期駆動信号出力部)に置き換えたもので、第4実施形態と同様に、起動信号生成部62より出力される信号によって送電部19の発振動作を開始させる。起動信号生成部62は、発振器63及びPWM選択部64(信号選択部)で構成されている。PWM選択部64の入力端子の一方は、発振器63の出力端子に接続されており、入力端子の他方は、駆動信号発生部42の出力端子に接続されている。
(Fifth embodiment)
As illustrated in FIG. 15, the power transmission device 61 of the fifth embodiment is obtained by replacing the activation signal generation unit 52 of the fourth embodiment with an activation signal generation unit 62 (initial drive signal output unit). Similarly to the embodiment, the oscillation operation of the power transmission unit 19 is started by a signal output from the activation signal generation unit 62. The activation signal generation unit 62 includes an oscillator 63 and a PWM selection unit 64 (signal selection unit). One of the input terminals of the PWM selector 64 is connected to the output terminal of the oscillator 63, and the other input terminal is connected to the output terminal of the drive signal generator 42.
 発振器63は、矩形波の発振信号EXT-OSCを出力する。発振信号EXT-OSCの周波数は、標準の共鳴周波数2.0MHz付近に設定されている。PWM選択部64の入力選択端子には、外部より入力される選択信号SELが入力される。そして、PWM選択部64の出力端子は、ドライバ4の入力端子に接続されている。 The oscillator 63 outputs a rectangular wave oscillation signal EXT-OSC. The frequency of the oscillation signal EXT-OSC is set around a standard resonance frequency of 2.0 MHz. A selection signal SEL input from the outside is input to the input selection terminal of the PWM selection unit 64. The output terminal of the PWM selection unit 64 is connected to the input terminal of the driver 4.
 次に、第5実施形態の作用について説明する。PWM選択部64は、選択信号SELがローレベルの場合は発振信号EXT-OSCを選択しているので、ドライバ4には、信号DRV_INとして発振信号EXT-OSCが出力される。これにより、1次側電流情報出力部8の抵抗素子R_OSCに電流が流れ始め、駆動信号発生部42は、1次側電流の最初のゼロクロス点を検出して矩形波信号OSCを立ち上げる。その後、選択信号SELがハイレベルになると、PWM選択部64は、矩形波信号OSC側を選択するので、以降は矩形波信号OSCが信号DRV_INとして出力されてドライバ4の駆動周波数は自動的に共鳴周波数に調整される。 Next, the operation of the fifth embodiment will be described. Since the PWM selection unit 64 selects the oscillation signal EXT-OSC when the selection signal SEL is at a low level, the oscillation signal EXT-OSC is output to the driver 4 as the signal DRV_IN. As a result, a current starts to flow through the resistance element R_OSC of the primary side current information output unit 8, and the drive signal generation unit 42 detects the first zero cross point of the primary side current and raises the rectangular wave signal OSC. After that, when the selection signal SEL becomes high level, the PWM selection unit 64 selects the rectangular wave signal OSC side, so that the rectangular wave signal OSC is output as the signal DRV_IN and the driving frequency of the driver 4 is automatically resonated thereafter. Adjusted to frequency.
 以上のように第5実施形態によれば、矩形波状の発振信号EXT-OSCを出力する発振器63と、その発振信号EXT-OSCと、矩形波信号生成部42により生成される矩形波信号とを選択してドライバ4に出力するPWM選択部64とを備え、入力される選択信号SELに応じて、起動時にはPWM選択部64により発振信号EXT-OSCを選択して、スイッチング素子部3により送電部19に電流を発生させるようにした。したがって、第4実施形態と同様の効果が得られる。 As described above, according to the fifth embodiment, the oscillator 63 that outputs the rectangular wave oscillation signal EXT-OSC, the oscillation signal EXT-OSC, and the rectangular wave signal generated by the rectangular wave signal generation unit 42 are obtained. And a PWM selection unit 64 that selects and outputs the selected signal to the driver 4. In response to the input selection signal SEL, the PWM selection unit 64 selects the oscillation signal EXT-OSC at the time of startup, and the switching element unit 3 transmits the power transmission unit. An electric current was generated in 19. Therefore, the same effect as the fourth embodiment can be obtained.
 本開示は上記した、又は図面に記載した実施形態にのみ限定されるものではなく、以下のような変形又は拡張が可能である。 The present disclosure is not limited to the embodiment described above or illustrated in the drawings, and the following modifications or expansions are possible.
 第1実施形態の駆動信号生成部9に、パルス幅制限部33を設けても良い。 The pulse width limiter 33 may be provided in the drive signal generator 9 of the first embodiment.
 受電装置18の負荷として、全波整流器11及び平滑コンデンサ16に替えて、抵抗素子を配置しても良い。 Instead of the full-wave rectifier 11 and the smoothing capacitor 16, a resistance element may be arranged as the load of the power receiving device 18.
 スイッチング素子は、MOSFETに限ることなく、バイポーラトランジスタやIGBTなどでも良い。

 
The switching element is not limited to the MOSFET, but may be a bipolar transistor or IGBT.

Claims (24)

  1.  コイル(7)及びコンデンサ(5)を有し、無線信号を発生させて受電側に電力を伝送する送電部(19)と、
     電源とグランドとの間に接続される2つのスイッチング素子(1,2)の直列回路を少なくとも1つ以上有し、前記送電部に駆動電流を供給するスイッチング素子部(3)と、
     入力される矩形波信号に基づいて、前記スイッチング素子にそれぞれ駆動信号を出力する駆動回路(4)と、
     前記送電部に流れる電流を検出し、前記電流に相当する情報(以下、電流情報と称す)を出力する電流情報出力部(8)と、
     前記電流情報を参照することで、前記送電部に流れる電流がゼロに達するタイミングを基準として信号レベルが変化する矩形波信号を生成し、前記駆動回路に出力する矩形波信号生成部(9,31,42)と、を備える電力伝送装置。
    A power transmission unit (19) having a coil (7) and a capacitor (5), generating a radio signal and transmitting power to the power receiving side;
    A switching element section (3) having at least one series circuit of two switching elements (1, 2) connected between a power source and a ground, and supplying a drive current to the power transmission section;
    A drive circuit (4) for outputting a drive signal to each of the switching elements based on an input rectangular wave signal;
    A current information output unit (8) for detecting a current flowing through the power transmission unit and outputting information corresponding to the current (hereinafter referred to as current information);
    By referring to the current information, a rectangular wave signal generating unit (9, 31) that generates a rectangular wave signal whose signal level changes with reference to the timing at which the current flowing through the power transmitting unit reaches zero and outputs the rectangular wave signal to the driving circuit. , 42).
  2.  前記電流情報出力部は、前記送電部に流れる電流と同位相となる電圧信号を、前記電流情報として出力する請求項1記載の電力伝送装置。 The power transmission device according to claim 1, wherein the current information output unit outputs a voltage signal having the same phase as a current flowing through the power transmission unit as the current information.
  3.  前記電流情報出力部は、抵抗素子(R)を有している請求項2記載の電力伝送装置。 The power transmission device according to claim 2, wherein the current information output unit includes a resistance element (R).
  4.  前記電流情報出力部は、前記送電部に流れる電流よりも進み位相となる電圧信号を、前記電流情報として出力する請求項1記載の電力伝送装置。 The power transmission device according to claim 1, wherein the current information output unit outputs a voltage signal having a leading phase with respect to the current flowing through the power transmission unit as the current information.
  5.  前記電流情報出力部は、コイル(L)を有している請求項4記載の電力伝送装置。 The power transmission device according to claim 4, wherein the current information output unit has a coil (L).
  6.  前記電流情報出力部は、抵抗素子(R)及びコイルの直列回路又は並列回路を有している請求項5記載の電力伝送装置。 The power transmission device according to claim 5, wherein the current information output unit has a series circuit or a parallel circuit of a resistance element (R) and a coil.
  7.  前記コイルは、前記送電部を構成するコイルと共通である請求項5又は6記載の電力伝送装置。 The power transmission device according to claim 5 or 6, wherein the coil is common to a coil constituting the power transmission unit.
  8.  前記電流情報出力部は、前記送電部に流れる電流よりも遅れ位相となる電圧信号を、前記電流情報として出力する請求項1記載の電力伝送装置。 The power transmission device according to claim 1, wherein the current information output unit outputs a voltage signal having a phase lagging from a current flowing through the power transmission unit as the current information.
  9.  前記電流情報出力部は、コンデンサ(C)を有している請求項8記載の電力伝送装置。 The power transmission device according to claim 8, wherein the current information output unit has a capacitor (C).
  10.  前記コンデンサは、前記送電部を構成するコンデンサと共通である請求項9記載の電力伝送装置。 The power transmission device according to claim 9, wherein the capacitor is common to a capacitor constituting the power transmission unit.
  11.  前記矩形波信号生成部(31)は、前記電流情報出力部が出力する電圧信号がゼロになるタイミングを検出して動作する請求項2から10の何れか一項に記載の電力伝送装置。 The power transmission device according to any one of claims 2 to 10, wherein the rectangular wave signal generation unit (31) operates by detecting a timing at which a voltage signal output from the current information output unit becomes zero.
  12.  前記矩形波信号生成部(9)は、前記電流情報出力部が出力する電圧信号がゼロになる直前のタイミングを検出して動作する請求項2から10の何れか一項に記載の電力伝送装置。 The power transmission device according to any one of claims 2 to 10, wherein the rectangular wave signal generation unit (9) operates by detecting a timing immediately before a voltage signal output from the current information output unit becomes zero. .
  13.  前記矩形波信号生成部(9,31、42)は、前記電圧信号を閾値と比較するコンパレータ(21)を有している請求項11又は12記載の電力伝送装置。 The power transmission device according to claim 11 or 12, wherein the rectangular wave signal generation unit (9, 31, 42) includes a comparator (21) that compares the voltage signal with a threshold value.
  14.  前記矩形波信号生成部(9,31)は、前記コンパレータの出力信号の変化に基づいてセット信号及びリセット信号をそれぞれ出力するセット信号出力部(26,26A)及びリセット信号出力部(27,27A)と、
     前記セット信号及び前記リセット信号が入力されることで前記矩形波信号を生成するSRフリップフロップ(25)と、を備える請求項13記載の電力伝送装置。
    The rectangular wave signal generation unit (9, 31) outputs a set signal output unit (26, 26A) and a reset signal output unit (27, 27A) that respectively output a set signal and a reset signal based on a change in the output signal of the comparator. )When,
    The power transmission device according to claim 13, further comprising: an SR flip-flop (25) that generates the rectangular wave signal when the set signal and the reset signal are input.
  15.  前記矩形波信号生成部は、前記電流の振幅がゼロに達するタイミングの間隔が下限時間未満になった際に、前記矩形波信号のレベルを変化させないように制限するパルス幅制限部(33)を備える請求項1から14の何れか一項に記載の電力伝送装置。 The rectangular wave signal generating unit includes a pulse width limiting unit (33) for limiting the level of the rectangular wave signal so as not to change when the timing interval at which the amplitude of the current reaches zero is less than a lower limit time. The power transmission device according to any one of claims 1 to 14, further comprising:
  16.  前記矩形波信号生成部(31)は、前記電流の振幅がゼロに達するタイミングの間隔が下限時間未満になった際に、前記矩形波信号のレベルを変化させないように制限するパルス幅制限部(33)と、
     1つのコンパレータ(21)と、を有し、
     前記セット信号出力部(26A)は、前記コンパレータの出力信号の正転信号に基づいて前記セット信号を生成し、
     前記リセット信号出力部(27A)は、前記コンパレータの出力信号の反転信号に基づいて前記リセット信号を生成し、
     前記パルス幅制限部は、前記正転信号及び前記反転信号の立上りの変化を、同立下りの変化よりも遅延させるように構成されている請求項14記載の電力伝送装置。
    The rectangular wave signal generation unit (31) is a pulse width limiting unit that limits the level of the rectangular wave signal so as not to change when the timing interval at which the amplitude of the current reaches zero is less than the lower limit time. 33)
    One comparator (21),
    The set signal output unit (26A) generates the set signal based on a normal rotation signal of the output signal of the comparator,
    The reset signal output unit (27A) generates the reset signal based on an inverted signal of the output signal of the comparator,
    The power transmission device according to claim 14, wherein the pulse width limiting unit is configured to delay the rising change of the normal rotation signal and the inverted signal from the change of the falling edge.
  17.  前記パルス幅制限部は、前記正転信号と前記反転信号とに対応して設けられる、電源とグランドとの間に接続される抵抗素子(34)及びコンデンサ(36)の直列回路と、前記コンデンサに並列に接続されるスイッチング素子(35)とで構成され、
     前記スイッチング素子の導通制御端子には、それぞれ対応する前記正転信号,前記反転信号が入力される請求項16項記載の電力伝送装置。
    The pulse width limiting unit includes a series circuit of a resistance element (34) and a capacitor (36) connected between a power supply and a ground, which are provided corresponding to the normal rotation signal and the inversion signal, and the capacitor And a switching element (35) connected in parallel,
    The power transmission device according to claim 16, wherein the corresponding normal rotation signal and the inverted signal are respectively input to a conduction control terminal of the switching element.
  18.  起動信号が入力されると、前記スイッチング素子部により前記送電部に電流を発生させるための初期駆動信号を前記駆動回路に出力する初期駆動信号出力部(52)を備える請求項1から17の何れか一項に記載の電力伝送装置。 18. The device according to claim 1, further comprising an initial drive signal output unit (52) that outputs an initial drive signal for generating a current to the power transmission unit by the switching element unit when the activation signal is input to the drive circuit. The power transmission device according to claim 1.
  19.  前記初期駆動信号出力部(52)は、前記初期駆動信号を、パルス信号として出力する請求項18記載の電力伝送装置。 The power transmission device according to claim 18, wherein the initial drive signal output unit (52) outputs the initial drive signal as a pulse signal.
  20.  前記初期駆動信号出力部は、前記起動信号が入力されたタイミングでトリガパルスを発生させるパルス発生部(58)と、
     前記矩形波信号生成部により生成される矩形波信号と、前記トリガパルスとのOR信号を出力するORゲート(57)と、
     前記起動信号が入力されると、前記OR信号を前記駆動回路に出力するANDゲート(56)とを備える請求項19記載の電力伝送装置。
    The initial drive signal output unit includes a pulse generator (58) that generates a trigger pulse at a timing when the activation signal is input;
    An OR gate (57) for outputting an OR signal between the rectangular wave signal generated by the rectangular wave signal generation unit and the trigger pulse;
    The power transmission device according to claim 19, further comprising an AND gate (56) that outputs the OR signal to the driving circuit when the activation signal is input.
  21.  矩形波状の発振信号を出力する発振器(63)と、
     前記発振信号と、前記矩形波信号生成部により生成される矩形波信号とを選択して前記駆動回路に出力する信号選択部(64)とを備え、
     入力される選択信号に応じて、起動時には前記信号選択部により前記発振信号を選択することで前記スイッチング素子部により前記送電部に電流を発生させるように構成されている請求項1から17の何れか一項に記載の電力伝送装置。
    An oscillator (63) for outputting a rectangular wave-like oscillation signal;
    A signal selection unit (64) that selects the oscillation signal and the rectangular wave signal generated by the rectangular wave signal generation unit and outputs the selected signal to the drive circuit;
    18. The device according to claim 1, wherein a current is generated in the power transmission unit by the switching element unit by selecting the oscillation signal by the signal selection unit at start-up according to an input selection signal. The power transmission device according to claim 1.
  22.  請求項1から21の何れか一項に記載の電力伝送装置と、
     前記電力伝送装置の送電部より無線信号で送信された電力を受電する受電部(20)と、この受電部に並列に接続される負荷とを有する受電装置と、を備える電力伝送システム。
    The power transmission device according to any one of claims 1 to 21,
    A power transmission system comprising: a power receiving unit (20) that receives power transmitted by a wireless signal from a power transmission unit of the power transmission device; and a power receiving device having a load connected in parallel to the power receiving unit.
  23.  前記負荷は、整流器と、コンデンサとを備えている請求項22記載の電力伝送システム。 The power transmission system according to claim 22, wherein the load includes a rectifier and a capacitor.
  24.  前記負荷は、抵抗である請求項22記載の電力伝送システム。

     
    The power transmission system according to claim 22, wherein the load is a resistor.

PCT/JP2016/000713 2015-02-16 2016-02-11 Electric power transmitting device and electric power transmitting system WO2016132714A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015027614A JP2016152650A (en) 2015-02-16 2015-02-16 Device and system for power transmission
JP2015-027614 2015-02-16

Publications (1)

Publication Number Publication Date
WO2016132714A1 true WO2016132714A1 (en) 2016-08-25

Family

ID=56688964

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2016/000713 WO2016132714A1 (en) 2015-02-16 2016-02-11 Electric power transmitting device and electric power transmitting system

Country Status (2)

Country Link
JP (1) JP2016152650A (en)
WO (1) WO2016132714A1 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111010035A (en) * 2018-10-04 2020-04-14 三美电机株式会社 Semiconductor device for switching power supply and AC-DC converter

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004248365A (en) * 2003-02-12 2004-09-02 Yazaki Corp Method and apparatus for contactless power transmission
US20120139359A1 (en) * 2010-12-06 2012-06-07 Ming-Iu Lai Wireless charging system and transmitting end circuit thereof
JP2014064446A (en) * 2011-12-06 2014-04-10 Sekisui Chem Co Ltd Power reception apparatus, transmission apparatus, and non-contact power feeding system
US20140097791A1 (en) * 2012-10-04 2014-04-10 Linear Technology Corporation Auto resonant driver for wireless power transmitter sensing required transmit power for optimum efficiency
US20140240099A1 (en) * 2013-02-27 2014-08-28 Generalplus Technology Inc. Circuit for signal decoding in rfid or wireless power
US20150061604A1 (en) * 2013-08-30 2015-03-05 Generalplus Technology Inc. Wireless charging circuit and abnormal state protection circuit thereof
JP2016010169A (en) * 2014-06-20 2016-01-18 船井電機株式会社 Non-contact power supply device and non-contact power supply system

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004248365A (en) * 2003-02-12 2004-09-02 Yazaki Corp Method and apparatus for contactless power transmission
US20120139359A1 (en) * 2010-12-06 2012-06-07 Ming-Iu Lai Wireless charging system and transmitting end circuit thereof
JP2014064446A (en) * 2011-12-06 2014-04-10 Sekisui Chem Co Ltd Power reception apparatus, transmission apparatus, and non-contact power feeding system
US20140097791A1 (en) * 2012-10-04 2014-04-10 Linear Technology Corporation Auto resonant driver for wireless power transmitter sensing required transmit power for optimum efficiency
US20140240099A1 (en) * 2013-02-27 2014-08-28 Generalplus Technology Inc. Circuit for signal decoding in rfid or wireless power
US20150061604A1 (en) * 2013-08-30 2015-03-05 Generalplus Technology Inc. Wireless charging circuit and abnormal state protection circuit thereof
JP2016010169A (en) * 2014-06-20 2016-01-18 船井電機株式会社 Non-contact power supply device and non-contact power supply system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111010035A (en) * 2018-10-04 2020-04-14 三美电机株式会社 Semiconductor device for switching power supply and AC-DC converter

Also Published As

Publication number Publication date
JP2016152650A (en) 2016-08-22

Similar Documents

Publication Publication Date Title
US8913404B2 (en) Constant voltage constant current control circuits and methods with improved load regulation
JP4620151B2 (en) Non-contact power transmission circuit
US9906140B2 (en) Power supply circuit and power supply method for switching power supply
US10027130B2 (en) Apparatus for transmitting power wirelessly
JP2007215259A (en) Drive circuit and switching regulator using the same
JP5104058B2 (en) Resonant switching power supply
CN102868300A (en) Switching regulator and control device thereof
JP2006280138A (en) Dc-dc converter
JP2007074809A (en) Semiconductor device
CN101106333A (en) Method and device for providing synchronous rectification circuit of off-line power converter
US8305785B2 (en) Power source apparatus
US9754740B2 (en) Switching control circuit and switching power-supply device
JP2014045594A (en) Switching power supply device
JP2019530416A5 (en)
WO2016147562A1 (en) Non-contact power feeding device and non-contact power receiving device
JP6115637B2 (en) PWM control circuit and switching power supply device
JP2016158240A (en) Driving device
US8957656B2 (en) Power controller and control method for generating adaptive dead-times
JP2015202030A (en) Non-contact power supply device and non-contact power supply system
US9362836B2 (en) Circuit for driving synchronous rectifier and power supply apparatus including the same
WO2016132714A1 (en) Electric power transmitting device and electric power transmitting system
JP6350818B2 (en) Non-contact power transmission device
JP2013005631A (en) Switching power supply apparatus
JP2017184493A (en) Non-contact power transmission device and non-contact power transmission method
EP2434644B1 (en) High voltage floating gate driver topology for very high switching frequencies

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 16752104

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 16752104

Country of ref document: EP

Kind code of ref document: A1