WO2016123856A1 - Amoled像素驱动电路及像素驱动方法 - Google Patents

Amoled像素驱动电路及像素驱动方法 Download PDF

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Publication number
WO2016123856A1
WO2016123856A1 PCT/CN2015/075693 CN2015075693W WO2016123856A1 WO 2016123856 A1 WO2016123856 A1 WO 2016123856A1 CN 2015075693 W CN2015075693 W CN 2015075693W WO 2016123856 A1 WO2016123856 A1 WO 2016123856A1
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Prior art keywords
thin film
film transistor
electrically connected
control signal
source
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English (en)
French (fr)
Inventor
聂诚磊
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US14/758,245 priority Critical patent/US10339859B2/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
    • G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
    • G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
    • G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0819—Several active elements per pixel in active matrix panels used for counteracting undesired variations, e.g. feedback or autozeroing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/08—Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
    • G09G2300/0809—Several active elements per pixel in active matrix panels
    • G09G2300/0842—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor
    • G09G2300/0852—Several active elements per pixel in active matrix panels forming a memory circuit, e.g. a dynamic memory with one capacitor being a dynamic memory with more than one capacitor
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0251—Precharge or discharge of pixel before applying new pixel voltage
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0233—Improving the luminance or brightness uniformity across the screen
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/04—Maintaining the quality of display appearance
    • G09G2320/043—Preventing or counteracting the effects of ageing
    • G09G2320/045—Compensation of drifts in the characteristics of light emitting or modulating elements

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an AMOLED pixel driving circuit and a pixel driving method.
  • OLED Organic Light Emitting Display
  • OLED Organic Light Emitting Display
  • the OLED display device can be divided into two types: passive matrix OLED (PMOLED) and active matrix OLED (AMOLED), namely direct addressing and thin film transistor (Thin Film Transistor, according to the driving method). TFT) matrix addressing two types.
  • the AMOLED has pixels arranged in an array, belongs to an active display type, has high luminous efficiency, and is generally used as a high-definition large-sized display device.
  • the AMOLED is a current driving device. When a current flows through the organic light emitting diode, the organic light emitting diode emits light, and the luminance of the light is determined by the current flowing through the light emitting diode itself.
  • the threshold voltage of the driving thin film transistor drifts with the operation time in the driving circuit of the AMOLED, resulting in unstable illumination of the OLED, it is necessary to employ a pixel driving circuit capable of compensating for the drift of the threshold voltage of the driving thin film transistor.
  • FIG. 1 shows a conventional AMOLED pixel driving circuit, comprising: a second switching thin film transistor SW2, whose gate is electrically connected to the nth second scanning control signal gate2(n), and the drain is electrically connected to The data signal data is electrically connected to the source of the mirrored thin film transistor MR and one end of the second capacitor Cst2.
  • the mirrored thin film transistor MR has a gate electrically connected to the gate of the driving thin film transistor DR via the first node D.
  • the drain is electrically connected to the drain of the first switching thin film transistor SW1, the source is electrically connected to the source of the second switching thin film transistor SW2 and one end of the second capacitor Cst2;
  • the first switching thin film transistor SW1 has a gate Connected to the nth stage first scan control signal gate1(n), the drain is electrically connected to the drain of the mirror thin film transistor MR, the source is electrically connected to the first node D;
  • the precharge thin film transistor PC has a gate
  • the source is electrically connected to the n-1th stage second scan control signal Gate2(n-1), the drain is electrically connected to the first node D, and the thin film transistor DR is driven, and the gate thereof is electrically connected to the first node D.
  • the cathode of the second transistor C422 is electrically connected to the first node D, and the other end is electrically connected to the ground potential GND; one end of the second capacitor Cst2 is electrically connected to the source of the second switching thin film transistor SW2.
  • the source of the mirrored thin film transistor MR is electrically connected to the ground potential GND; the anode of the organic light emitting diode OLED is electrically connected to the power supply voltage VDD, and the cathode is electrically connected to the source of the driving thin film transistor DR. 2 is a timing diagram corresponding to the circuit of FIG. 1.
  • the compensation process of the circuit includes a precharge pre-charge phase, a data write program phase, a reset restore phase, and a drive illumination drive phase, wherein the reset phase is reset.
  • the driving thin film transistor DR is equal to the gate potential Vg of the mirror thin film transistor MR, and the data signal data needs to be restored to the ground potential GND to pull down the source potential Vs of the mirror thin film transistor MR, so that the gate-source voltage of the mirror thin film transistor MR is
  • the gate and source voltages of the driving thin film transistor DR are equal, and the voltage stress applied to the mirror thin film transistor MR and the driving thin film transistor DR is similar to the time and the threshold voltage drift is similar, so that the mirror thin film transistor MR can be used instead of the driving thin film transistor.
  • the DR detects the threshold voltage and compensates for the influence of the threshold voltage drift of the driving thin film transistor DR on the circuit.
  • the conventional AMOLED pixel driving circuit uses the recovery data signal data to the ground potential GND to achieve a close proximity of the gate-source voltage stress of the mirror thin film transistor MR and the driving thin film transistor DR, but this method is shortened. The charging time of the data signal data.
  • An object of the present invention is to provide an AMOLED pixel driving circuit capable of simplifying data signals, increasing charging time of data signals, and realizing normal driving of the panel under the condition that the gate-source voltage stress of the mirror thin film transistor and the driving thin film transistor are close to each other. .
  • the present invention provides an AMOLED pixel driving circuit, including: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, and a first capacitor. , a second capacitor, and an organic light emitting diode;
  • the gate of the sixth thin film transistor is electrically connected to the nth second scan control signal, the drain is electrically connected to the data signal, and the source is electrically connected to the source of the third thin film transistor and one end of the first capacitor ;
  • the gate of the third thin film transistor is electrically connected to the gate of the fourth thin film transistor via the first node, the drain is electrically connected to the drain of the first thin film transistor, and the source is electrically connected to the sixth thin a source of the film transistor and one end of the first capacitor;
  • the gate of the first thin film transistor is electrically connected to the nth stage first scan control signal, the drain is electrically connected to the drain of the third thin film transistor, and the source is electrically connected to the first node;
  • the gate and the source of the fifth thin film transistor are electrically connected to the n-1th stage second scan control signal, and the drain is electrically connected to the first node;
  • the gate of the fourth thin film transistor is electrically connected to the gate of the third thin film transistor via a first node, the drain is electrically connected to the ground potential, and the source is electrically connected to the cathode of the organic light emitting diode;
  • the gate of the second thin film transistor is electrically connected to the reset signal, the source is electrically connected to the source of the third thin film transistor, and the drain is electrically connected to the drain of the fourth thin film transistor and the ground potential;
  • One end of the first capacitor is electrically connected to the source of the sixth thin film transistor and the source of the third thin film transistor, and the other end is electrically connected to the ground potential;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the ground potential;
  • the anode of the organic light emitting diode is electrically connected to the power supply voltage, and the cathode is electrically connected to the source of the fourth thin film transistor;
  • the reset signal provides high and low alternating potentials according to timing, and controls whether the source potential of the third thin film transistor is pulled down to a ground potential.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin films Transistor.
  • the third and fourth thin film transistors are symmetrically disposed, and the channel widths of the two are similar; the fourth thin film transistor is a driving thin film transistor, and the third thin film transistor is a mirror thin film transistor.
  • the reset signal is an n+1th first scan control signal.
  • the data signal, the nth second scan control signal, the nth first scan control signal, the n-1th second scan control signal, and the reset signal are combined to correspond to a precharge phase and data write a phase, and a driving illumination phase;
  • the initial phase of the driving illumination phase is a reset phase;
  • the reset signal provides a high potential
  • the second thin film transistor is turned on, and the source potential of the third thin film transistor is pulled down to a ground potential, so that the gate and source of the third and fourth thin film transistors
  • the voltages are equal; at other stages, the reset signal provides a low potential.
  • the data signal is low, the nth second scan control signal is low, the nth first scan control signal is low, and the n-1th second scan control signal is High potential, the reset signal is low;
  • the data signal is high, the nth second scan control signal is high, the nth first scan control signal is high, and the n-1th second scan control signal For low potential, the reset signal is low;
  • the data signal is low, the nth second scan control signal is low, the nth first scan control signal is low, and the nth level is second.
  • the scan control signal is low and the reset signal is high;
  • the data signal is low
  • the nth second scan control signal is low
  • the nth first scan control signal is low
  • the nth level is second
  • the scan control signal is low and the reset signal is low.
  • the present invention also provides an AMOLED pixel driving circuit, comprising: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a first capacitor, and a second capacitor And organic light emitting diodes;
  • the gate of the sixth thin film transistor is electrically connected to the nth second scan control signal, the drain is electrically connected to the data signal, and the source is electrically connected to the source of the third thin film transistor and one end of the first capacitor ;
  • the gate of the third thin film transistor is electrically connected to the gate of the fourth thin film transistor via the first node, the drain is electrically connected to the drain of the first thin film transistor, and the source is electrically connected to the sixth thin film transistor. a source and one end of the first capacitor;
  • the gate of the first thin film transistor is electrically connected to the nth stage first scan control signal, the drain is electrically connected to the drain of the third thin film transistor, and the source is electrically connected to the first node;
  • the gate and the source of the fifth thin film transistor are electrically connected to the n-1th stage second scan control signal, and the drain is electrically connected to the first node;
  • the gate of the fourth thin film transistor is electrically connected to the gate of the third thin film transistor via a first node, the drain is electrically connected to the ground potential, and the source is electrically connected to the cathode of the organic light emitting diode;
  • the gate of the second thin film transistor is electrically connected to the reset signal, the source is electrically connected to the source of the third thin film transistor, and the drain is electrically connected to the drain of the fourth thin film transistor and the ground potential;
  • One end of the first capacitor is electrically connected to the source of the sixth thin film transistor and the source of the third thin film transistor, and the other end is electrically connected to the ground potential;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the ground potential;
  • the anode of the organic light emitting diode is electrically connected to the power supply voltage, and the cathode is electrically connected to the source of the fourth thin film transistor;
  • the reset signal provides high and low alternating potentials according to timing, and controls the third thin film crystal Whether the source potential of the tube is pulled down to the ground potential;
  • first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous Silicon thin film transistor;
  • the third and fourth thin film transistors are symmetrically disposed, and the channel widths of the two are similar; the fourth thin film transistor is a driving thin film transistor, and the third thin film transistor is a mirror thin film transistor.
  • the invention also provides an AMOLED pixel driving method, comprising the following steps:
  • Step 1 Providing an AMOLED pixel driving circuit
  • the AMOLED pixel driving circuit includes: a first thin film transistor, a second thin film transistor, a third thin film transistor, a fourth thin film transistor, a fifth thin film transistor, a sixth thin film transistor, a first capacitor, a second capacitor, and an organic light emitting diode ;
  • the gate of the sixth thin film transistor is electrically connected to the nth second scan control signal, the drain is electrically connected to the data signal, and the source is electrically connected to the source of the third thin film transistor and one end of the first capacitor ;
  • the gate of the third thin film transistor is electrically connected to the gate of the fourth thin film transistor via the first node, the drain is electrically connected to the drain of the first thin film transistor, and the source is electrically connected to the sixth thin film transistor. a source and one end of the first capacitor;
  • the gate of the first thin film transistor is electrically connected to the nth stage first scan control signal, the drain is electrically connected to the drain of the third thin film transistor, and the source is electrically connected to the first node;
  • the gate and the source of the fifth thin film transistor are electrically connected to the n-1th stage second scan control signal, and the drain is electrically connected to the first node;
  • the gate of the fourth thin film transistor is electrically connected to the gate of the third thin film transistor via a first node, the drain is electrically connected to the ground potential, and the source is electrically connected to the cathode of the organic light emitting diode;
  • the gate of the second thin film transistor is electrically connected to the reset signal, the source is electrically connected to the source of the third thin film transistor, and the drain is electrically connected to the drain of the fourth thin film transistor and the ground potential;
  • One end of a capacitor is electrically connected to the source of the sixth thin film transistor and the source of the third thin film transistor, and the other end is electrically connected to the ground potential;
  • One end of the second capacitor is electrically connected to the first node, and the other end is electrically connected to the ground potential;
  • the anode of the organic light emitting diode is electrically connected to the power supply voltage, and the cathode is electrically connected to the source of the fourth thin film transistor;
  • Step 2 entering the pre-charging stage
  • the data signal provides a low potential
  • the nth second scan control signal provides a low potential
  • the nth stage first scan control signal provides a low potential
  • the n-1th second scan control signal provides a high potential
  • the reset signal provides a low potential a potential
  • a gate of the first node, the third thin film transistor, and a gate of the fourth thin film transistor are precharged to the same potential
  • Step 3 entering the data writing phase
  • the data signal provides a high potential
  • the nth second scan control signal provides a high potential
  • the nth stage first scan control signal provides a high potential
  • the n-1th second scan control signal provides a low potential
  • the reset signal provides a low potential a potential
  • the data signal is written into the first node, the gate of the third thin film transistor, and the gate of the fourth thin film transistor, while raising the source potential of the third thin film transistor;
  • Step 4 entering the driving lighting stage
  • the data signal provides a low potential
  • the nth second scan control signal provides a low potential
  • the nth first scan control signal provides a low potential
  • the n-1th stage The second scan control signal provides a low potential
  • the reset signal provides a high potential
  • the second thin film transistor is turned on
  • the source potential of the third thin film transistor is pulled down to a ground potential, so that the gate and source of the third and fourth thin film transistors Equal voltage
  • the reset signal transitions to a low potential and the organic light emitting diode emits light.
  • the first thin film transistor, the second thin film transistor, the third thin film transistor, the fourth thin film transistor, the fifth thin film transistor, and the sixth thin film transistor are both low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin films Transistor.
  • the third and fourth thin film transistors are symmetrically disposed, and the channel widths of the two are similar; the fourth thin film transistor is a driving thin film transistor, and the third thin film transistor is a mirror thin film transistor.
  • the reset signal is an n+1th first scan control signal.
  • the present invention provides an AMOLED pixel driving circuit and a pixel driving method, and a second thin film transistor controlled by a reset signal is disposed between the third and fourth thin film transistors, that is, the mirror thin film transistor and the driving thin film transistor. Controlling, by the reset signal, the source potential of the third thin film transistor, that is, the mirror thin film transistor, is pulled down to the ground potential in the reset phase, so that the gate and source voltages of the third and fourth thin film transistors, that is, the mirror thin film transistor and the driving thin film transistor are equal.
  • the data signal can be simplified, the charging time of the data signal can be increased, and the normal driving of the panel can be realized.
  • FIG. 1 is a circuit diagram of a conventional AMOLED pixel driving circuit
  • FIG. 2 is a timing diagram of the AMOLED pixel driving circuit shown in FIG. 1;
  • FIG. 3 is a diagram showing relationship between a data signal of the AMOLED pixel driving circuit shown in FIG. 1 and a source voltage of a mirrored thin film transistor;
  • FIG. 4 is a circuit diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 5 is a timing diagram of an AMOLED pixel driving circuit of the present invention.
  • FIG. 6 is a comparison diagram of a data signal of an AMOLED pixel driving circuit of the present invention and a relationship between a data signal of a conventional AMOLED pixel driving circuit and a source voltage of a mirrored thin film transistor.
  • the present invention first provides an AMOLED pixel driving circuit, comprising: a first thin film transistor M1, a second thin film transistor M2, a third thin film transistor M3, a fourth thin film transistor M4, a fifth thin film transistor M5, and a sixth The thin film transistor M6, the first capacitor C1, the second capacitor C2, and the organic light emitting diode D1.
  • the gate of the sixth thin film transistor M6 is electrically connected to the nth second scan control signal Gate2(n), the drain is electrically connected to the data signal Data, and the source is electrically connected to the source of the third thin film transistor M3.
  • a gate of the third thin film transistor M3 is electrically connected to the gate of the fourth thin film transistor M4 via the first node D, and the drain is electrically connected to the drain of the first thin film transistor M1
  • the source is electrically connected to the source of the sixth thin film transistor M6 and one end of the first capacitor C1; the gate of the first thin film transistor M1 is electrically connected to the nth first scan control signal Gate1(n)
  • the drain is electrically connected to the drain of the third thin film transistor M3, and the source is electrically connected to the first node D; the gate and the source of the fifth thin film transistor M5 are electrically connected to the n-1th stage.
  • a second scan control signal Gate2(n-1) the drain is electrically connected to the first node D; the gate of the fourth thin film transistor M4 is electrically connected to the gate of the third thin film transistor M3 via the first node D
  • the drain is electrically connected to the ground potential GND, and the source is electrically connected to the cathode of the organic light emitting diode D1;
  • the gate of the second thin film transistor M2 is electrically connected to the reset signal
  • the source is electrically connected to the source of the third thin film transistor M3, the drain is electrically connected to the drain of the fourth thin film transistor M4 and the ground potential GND; one end of the first capacitor C1 is electrically connected to the sixth
  • the source of the thin film transistor M6 and the source of the third thin film transistor M3 are electrically connected to the ground potential GND; one end of the second capacitor C2 is electrically connected to the first node D, and the other end is electrically connected to the ground.
  • the first thin film transistor M1, the second thin film transistor M2, the third thin film transistor M3, the fourth thin film transistor M4, the fifth thin film transistor M5, and the sixth thin film transistor M6 are both low temperature polysilicon thin film transistors and oxides.
  • the third and fourth thin film transistors M3 and M4 are symmetrically disposed, and the channel widths of the two are similar.
  • the fourth thin film transistor M4 is a driving thin film transistor
  • the third thin film transistor M3 is a mirror thin film transistor. .
  • the reset signal Restore provides high and low alternating potentials according to timing, and controls whether the source potential of the third thin film transistor M3 is pulled down to the ground potential GND.
  • the reset signal Restore is the n+1th first scan control signal Gate1(n+1), which can be obtained by using an existing signal, and does not need to additionally add a signal, which is advantageous for simplifying the circuit structure.
  • the data signal Data, the nth second scan control signal Gate2(n), the nth first scan control signal Gate1(n), and the n-1th second scan control signal Gate2 corresponds to a precharge pre-charge phase, a data write program phase, and a drive illumination drive phase, and the initial phase of the drive illumination drive phase is a reset Restore phase.
  • the data signal Data is low, the n-th second scan control signal Gate2(n) is low, and the n-th first scan control signal Gate1(n) For the low potential, the n-1th second scan control signal Gate2(n-1) is at a high potential, and the reset signal Restore is at a low potential;
  • the data writing Program phase the data signal Data is at a high potential, The nth second scan control signal Gate2(n) is at a high potential, the nth first scan control signal Gate1(n) is at a high potential, and the n-1th second scan control signal Gate2(n-1) is at a low potential
  • the reset signal Restore is low; in the initial reset Restore phase of the driving illumination driving phase, the data signal Data is low, and the nth second scanning control signal Gate2(n) is low, the nth level a scan control signal Gate1(n) is low, the n-1th second scan control signal Gate2(n-1) is low, the
  • the AMOLED pixel driving circuit of the present invention controls the source potential of the third thin film transistor M3 to be pulled down to the ground during the reset Restore stage by controlling the timing of controlling the opening and closing of the second thin film transistor M2 by the reset signal Restore.
  • the potential GND can not only ensure the third and fourth thin film transistors M3, M4, that is, the mirror thin film transistor and the driving film, compared to the conventional method of lowering the source potential of the mirror thin film transistor by restoring the data signal to the ground potential.
  • the gate-source voltage stress of the transistor is close, and the data signal Data is simplified, and the charging time of the data signal Data is increased by ⁇ t.
  • the present invention further provides an AMOLED pixel driving method, including the following steps:
  • Step 1 An AMOLED pixel driving circuit as shown in FIG. 4 is provided, and the circuit will not be repeatedly described herein.
  • the first thin film transistor M1, the second thin film transistor M2, the third thin film transistor M3, the fourth thin film transistor M4, the fifth thin film transistor M5, and the sixth thin film transistor M6 in the AMOLED pixel driving circuit are all low temperature polysilicon thin film transistors, An oxide semiconductor thin film transistor or an amorphous silicon thin film transistor.
  • the third and fourth thin film transistors M3 and M4 are symmetrically arranged, and the channel widths of the two are similar.
  • the fourth thin film transistor M4 is a driving thin film transistor
  • the third thin film transistor M3 is a mirror thin film transistor.
  • the reset signal Restore provides high and low alternating potentials in time series.
  • the reset signal Restore is the n+1th first scan control signal Gate1(n+1).
  • Step 2 Enter the pre-charge Pre-charge phase.
  • the data signal Data provides a low potential
  • the nth second scan control signal Gate2(n) provides a low potential
  • the nth stage first scan control signal Gate1(n) provides a low potential
  • the signal Gate2(n-1) provides a high potential and the reset signal Restore provides a low potential.
  • the fifth thin film transistor M5 is turned on, and the gates of the first node D, the third thin film transistor M3, and the gate of the fourth thin film transistor M4 are precharged to the same potential.
  • Step 3 Enter the data writing program stage.
  • the data signal Data provides a high potential
  • the nth second scan control signal Gate2(n) provides a high potential
  • the nth stage first scan control signal Gate1(n) provides a high potential
  • the signal Gate2(n-1) provides a low potential and the reset signal Restore provides a low potential.
  • the sixth, third, and first thin film transistors are all turned on, and the data signal Data is written into the gates of the first node D, the third thin film transistor M3, and the gate of the fourth thin film transistor M4, so that the third And the fourth thin film transistors M3, M4, that is, the gates of the driving thin film transistor and the mirror thin film transistor
  • the potential Vg is equal, and the source potential Vs of the third thin film transistor M3, that is, the mirror thin film transistor, is raised.
  • Step 4. Enter the drive lighting phase.
  • the data signal Data provides a low potential
  • the nth second scanning control signal Gate2(n) provides a low potential
  • the nth first scanning control signal Gate1(n) Providing a low potential
  • the n-1th second scan control signal Gate2(n-1) provides a low potential
  • the reset signal Restore provides a high potential.
  • the second thin film transistor M2 is turned on under the control of the reset signal Restore, and the source potential Vs of the third thin film transistor M3, that is, the mirror thin film transistor, is pulled down to the ground potential GND, so that the third and fourth thin film transistors M3, M4 That is, the gate and source voltages of the driving thin film transistor and the mirror thin film transistor are equal.
  • the reset signal Restore transitions to a low potential, and the organic light emitting diode D1 emits light.
  • the AMOLED pixel driving method of the present invention controls the source potential Vs of the third thin film transistor M3 to be pulled down to the ground potential GND in the reset Restore phase by the reset signal Restore, compared to the existing pass. Recovering the data signal to the ground potential to lower the source potential of the mirrored thin film transistor not only ensures the gate-to-source voltage stress of the third and fourth thin film transistors M3, M4, that is, the mirror thin film transistor and the driving thin film transistor, but also The data signal Data is simplified, and the charging time of the data signal Data is increased by ⁇ t.
  • a second thin film transistor controlled by a reset signal is disposed between the third and fourth thin film transistors, that is, the mirror thin film transistor and the driving thin film transistor, and the third thin film is controlled by the reset signal.
  • the source potential of the transistor, that is, the mirror thin film transistor is pulled down to the ground potential during the reset phase, so that the gate and source voltages of the third and fourth thin film transistors, that is, the mirror thin film transistor and the driving thin film transistor are equal, compared to recovering the data signal to
  • the ground potential mode can simplify the data signal, increase the charging time of the data signal, and achieve normal driving of the panel.

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Abstract

一种AMOLED像素驱动电路及像素驱动方法。所述AMOLED像素驱动电路包括：第一、第二、第三、第四、第五、第六薄膜晶体管(M1、M2、M3、M4、M5、M6)、第一、第二电容(C1、C2)、及有机发光二极管(D1)；其中，第三薄膜晶体管(M3)为镜像薄膜晶体管，第四薄膜晶体管管(M4)为驱动薄膜晶体管，第二薄膜晶体管(M2)设于第三与第四薄膜晶体管(M3、M4)之间，通过复位信号(Restore)按照时序控制第二薄膜晶体管(M2)的打开与关闭来控制所述第三薄膜晶体管(M3)的源极电位在复位(Restore)阶段被拉低至接地电位(GND)，保证第三、第四薄膜晶体管的(M3、M4)的栅源极电压相等，并能有效简化数据信号，增加数据信号的充电时间。

Description

AMOLED像素驱动电路及像素驱动方法 技术领域
本发明涉及显示技术领域，尤其涉及一种AMOLED像素驱动电路及像素驱动方法。
背景技术
有机发光二极管(Organic Light Emitting Display，OLED)显示装置具有自发光、驱动电压低、发光效率高、响应时间短、清晰度与对比度高、近180°视角、使用温度范围宽，可实现柔性显示与大面积全色显示等诸多优点，被业界公认为是最有发展潜力的显示装置。
OLED显示装置按照驱动方式可以分为无源矩阵型OLED(Passive Matrix OLED，PMOLED)和有源矩阵型OLED(Active Matrix OLED，AMOLED)两大类，即直接寻址和薄膜晶体管(Thin Film Transistor，TFT)矩阵寻址两类。其中，AMOLED具有呈阵列式排布的像素，属于主动显示类型，发光效能高，通常用作高清晰度的大尺寸显示装置。AMOLED是电流驱动器件，当有电流流过有机发光二极管时，有机发光二极管发光，且发光亮度由流过有发光二极管自身的电流决定。由于在AMOLED的驱动电路中，驱动薄膜晶体管的阈值电压会随着工作时间而漂移，从而导致OLED的发光不稳定，因此需要采用能够补偿驱动薄膜晶体管阈值电压的漂移的像素驱动电路。
图1所示为一种现有的AMOLED像素驱动电路，包括：第二开关薄膜晶体管SW2，其栅极电性连接于第n级第二扫描控制信号gate2(n)，漏极电性连接于数据信号data，源极电性连接于镜像薄膜晶体管MR的源极及第二电容Cst2的一端；镜像薄膜晶体管MR，其栅极经由第一节点D电性连接于驱动薄膜晶体管DR的栅极，漏极电性连接于第一开关薄膜晶体管SW1的漏极，源极电性连接于第二开关薄膜晶体管SW2的源极及第二电容Cst2的一端；第一开关薄膜晶体管SW1，其栅极电性连接于第n级第一扫描控制信号gate1(n)，漏极电性连接于镜像薄膜晶体管MR的漏极，源极电性连接于第一节点D；预充电薄膜晶体管PC，其栅极与源极均电性连接于第n-1级第二扫描控制信号Gate2(n-1)，漏极电性连接于第一节点D；驱动薄膜晶体管DR，其栅极经由第一节点D电性连接于镜像薄膜晶体管MR的栅极，漏极电性连接于接地电位GND，源极电性连接于有机发光二 极管OLED的阴极；第一电容Cst1的一端电性连接于第一节点D，另一端电性连接于接地电位GND；第二电容Cst2的一端电性连接于第二开关薄膜晶体管SW2的源极及镜像薄膜晶体管MR的源极，另一端电性连接于接地电位GND；有机发光二极管OLED的阳极电性连接于电源电压VDD，阴极电性连接于驱动薄膜晶体管DR的源极。图2所示为对应于图1电路的时序图，该电路的补偿过程依次包括预充电Pre-charge阶段、数据写入Program阶段、复位Restore阶段、及驱动发光Drive阶段，其中，在复位Restore阶段，驱动薄膜晶体管DR与镜像薄膜晶体管MR的栅极电位Vg相等，数据信号data需要恢复至接地电位GND来拉低镜像薄膜晶体管MR的源极电位Vs，使得镜像薄膜晶体管MR的栅源极电压与驱动薄膜晶体管DR的栅源极电压相等，进一步使得镜像薄膜晶体管MR与驱动薄膜晶体管DR所受到的电压应力大小与时间均相近，阈值电压漂移也相近，所以能够使用镜像薄膜晶体管MR代替驱动薄膜晶体管DR来探测阈值电压，补偿驱动薄膜晶体管DR的阈值电压漂移对电路的影响。如图3所示，该现有的AMOLED像素驱动电路使用恢复数据信号data至接地电位GND的方式来实现镜像薄膜晶体管MR与驱动薄膜晶体管DR的栅源极电压应力接近，但这种方式会缩短数据信号data的充电时间。
发明内容
本发明的目的在于提供一种AMOLED像素驱动电路，在保证镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压应力接近的条件下，能够简化数据信号，增加数据信号的充电时间，实现面板的正常驱动。
本发明的目的还在于提供一种AMOLED像素驱动方法，能够保证镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压应力接近，同时简化数据信号，增加数据信号的充电时间，实现面板的正常驱动。
为实现上述目的，本发明提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄 膜晶体管的源极及第一电容的一端；
所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；
所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
所述复位信号按照时序提供高、低交替电位，控制所述第三薄膜晶体管的源极电位是否被拉低至接地电位。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述第三与第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
所述复位信号为第n+1级第一扫描控制信号。
所述数据信号、第n级第二扫描控制信号、第n级第一扫描控制信号、第n-1级第二扫描控制信号、及复位信号相组合，先后对应于预充电阶段、数据写入阶段、及驱动发光阶段；所述驱动发光阶段的初始为复位阶段；
在所述复位阶段，所述复位信号提供高电位，所述第二薄膜晶体管导通，第三薄膜晶体管的源极电位被拉低至接地电位，使得第三与第四薄膜晶体管的栅源极电压相等；在其它阶段，所述复位信号均提供低电位。
在所述预充电阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为高电位，复位信号为低电位；
在所述数据写入阶段，所述数据信号为高电位，第n级第二扫描控制信号为高电位，第n级第一扫描控制信号为高电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位；
在所述驱动发光阶段初始的复位阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为高电位；
在所述复位阶段之后的驱动发光阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位。
本发明还提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄膜晶体管的源极及第一电容的一端；
所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；
所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
所述复位信号按照时序提供高、低交替电位，控制所述第三薄膜晶体 管的源极电位是否被拉低至接地电位；
其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管；
其中，所述第三与第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一AMOLED像素驱动电路；
所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄膜晶体管的源极及第一电容的一端；
所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
步骤2、进入预充电阶段；
所述数据信号提供低电位，第n级第二扫描控制信号提供低电位，第n级第一扫描控制信号提供低电位，第n-1级第二扫描控制信号提供高电位，复位信号提供低电位，所述第一节点、第三薄膜晶体管的栅极、及第四薄膜晶体管的栅极被预充电至同一电位；
步骤3、进入数据写入阶段；
所述数据信号提供高电位，第n级第二扫描控制信号提供高电位，第n级第一扫描控制信号提供高电位，第n-1级第二扫描控制信号提供低电位，复位信号提供低电位，所述数据信号写入第一节点、第三薄膜晶体管的栅极、及第四薄膜晶体管的栅极，同时抬升第三薄膜晶体管源极电位；
步骤4、进入驱动发光阶段；
首先进入所述驱动发光阶段初始的复位阶段，所述数据信号提供低电位，第n级第二扫描控制信号提供低电位，第n级第一扫描控制信号提供低电位，第n-1级第二扫描控制信号提供低电位，复位信号提供高电位，所述第二薄膜晶体管导通，第三薄膜晶体管的源极电位被拉低至接地电位，使得第三与第四薄膜晶体管的栅源极电压相等；
接着进入所述驱动发光阶段的后续阶段，所述复位信号转变为低电位，有机发光二极管发光。
所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
所述第三与第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
所述复位信号为第n+1级第一扫描控制信号。
本发明的有益效果：本发明提供的一种AMOLED像素驱动电路及像素驱动方法，在第三与第四薄膜晶体管即镜像薄膜晶体管与驱动薄膜晶体管之间设置一受复位信号控制的第二薄膜晶体管，通过复位信号来控制第三薄膜晶体管即镜像薄膜晶体管的源极电位在复位阶段被拉低至接地电位，使得第三与第四薄膜晶体管即镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压相等，相比于将数据信号恢复至接地电位的方式，能够简化数据信号，增加数据信号的充电时间，实现面板的正常驱动。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为一种现有的AMOLED像素驱动电路的电路图；
图2为图1所示AMOLED像素驱动电路的时序图；
图3为图1所示AMOLED像素驱动电路的数据信号与镜像薄膜晶体管的源极电压的关系图；
图4为本发明的AMOLED像素驱动电路的电路图；
图5为本发明的AMOLED像素驱动电路的时序图；
图6为本发明的AMOLED像素驱动电路的数据信号及现有的AMOLED像素驱动电路的数据信号与镜像薄膜晶体管的源极电压的关系对比图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图4，本发明首先提供一种AMOLED像素驱动电路，包括：第一薄膜晶体管M1、第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4、第五薄膜晶体管M5、第六薄膜晶体管M6、第一电容C1、第二电容C2、及有机发光二极管D1。
所述第六薄膜晶体管M6的栅极电性连接于第n级第二扫描控制信号Gate2(n)，漏极电性连接于数据信号Data，源极电性连接于第三薄膜晶体管M3的源极及第一电容C1的一端；所述第三薄膜晶体管M3的栅极经由第一节点D电性连接于第四薄膜晶体管M4的栅极，漏极电性连接于第一薄膜晶体管M1的漏极，源极电性连接于第六薄膜晶体管M6的源极及第一电容C1的一端；所述第一薄膜晶体管M1的栅极电性连接于第n级第一扫描控制信号Gate1(n)，漏极电性连接于第三薄膜晶体管M3的漏极，源极电性连接于第一节点D；所述第五薄膜晶体管M5的栅极与源极均电性连接于第n-1级第二扫描控制信号Gate2(n-1)，漏极电性连接于第一节点D；所述第四薄膜晶体管M4的栅极经由第一节点D电性连接于第三薄膜晶体管M3的栅极，漏极电性连接于接地电位GND，源极电性连接于有机发光二极管D1的阴极；所述第二薄膜晶体管M2的栅极电性连接于复位信号 Restore，源极电性连接于第三薄膜晶体管M3的源极，漏极电性连接于第四薄膜晶体管M4的漏极及接地电位GND；所述第一电容C1的一端电性连接于第六薄膜晶体管M6的源极及第三薄膜晶体管M3的源极，另一端电性连接于接地电位GND；所述第二电容C2的一端电性连接于第一节点D，另一端电性连接于接地电位GND；所述有机发光二极管D1的阳极电性连接于电源电压VDD，阴极电性连接于第四薄膜晶体管M4的源极。
具体地，所述第一薄膜晶体管M1、第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4、第五薄膜晶体管M5、与第六薄膜晶体管M6均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。其中，所述第三与第四薄膜晶体管M3、M4呈对称设置，且二者的沟道宽度相近，所述第四薄膜晶体管M4为驱动薄膜晶体管，所述第三薄膜晶体管M3为镜像薄膜晶体管。
结合图5，所述复位信号Restore按照时序提供高、低交替电位，控制所述第三薄膜晶体管M3的源极电位是否被拉低至接地电位GND。优选的，所述复位信号Restore为第n+1级第一扫描控制信号Gate1(n+1)，采用现有信号即可获得，不需要额外增加信号，有利于简化电路结构。
如图5所示，所述数据信号Data、第n级第二扫描控制信号Gate2(n)、第n级第一扫描控制信号Gate1(n)、第n-1级第二扫描控制信号Gate2(n-1)、及复位信号Restore相组合，先后对应于预充电Pre-charge阶段、数据写入Program阶段、及驱动发光Drive阶段，所述驱动发光Drive阶段的初始为复位Restore阶段。
具体地，在所述预充电Pre-charge阶段，所述数据信号Data为低电位，第n级第二扫描控制信号Gate2(n)为低电位，第n级第一扫描控制信号Gate1(n)为低电位，第n-1级第二扫描控制信号Gate2(n-1)为高电位，复位信号Restore为低电位；在所述数据写入Program阶段，所述数据信号Data为高电位，第n级第二扫描控制信号Gate2(n)为高电位，第n级第一扫描控制信号Gate1(n)为高电位，第n-1级第二扫描控制信号Gate2(n-1)为低电位，复位信号Restore为低电位；在所述驱动发光Drive阶段初始的复位Restore阶段，所述数据信号Data为低电位，第n级第二扫描控制信号Gate2(n)为低电位，第n级第一扫描控制信号Gate1(n)为低电位，第n-1级第二扫描控制信号Gate2(n-1)为低电位，复位信号Restore为高电位，所述第二薄膜晶体管M2导通，第三薄膜晶体管M3的源极电位被拉低至接地电位GND，使得第三与第四薄膜晶体管M3、M4的栅源极电压相等；在所述复位Restore阶段之后的驱动发光Drive阶段，所述数据信号Data 为低电位，第n级第二扫描控制信号Gate2(n)为低电位，第n级第一扫描控制信号Gate1(n)为低电位，第n-1级第二扫描控制信号Gate2(n-1)为低电位，复位信号Restore为低电位，有机发光二极管D1发光。
请参阅图6，本发明的AMOLED像素驱动电路通过复位信号Restore按照时序控制第二薄膜晶体管M2的打开与关闭来控制所述第三薄膜晶体管M3的源极电位在复位Restore阶段被拉低至接地电位GND，相比于现有的通过将数据信号恢复至接地电位来拉低镜像薄膜晶体管的源极电位的方式，不仅能够保证第三与第四薄膜晶体管M3、M4即镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压应力接近，而且简化了数据信号Data，将数据信号Data的充电时间增加了Δt。
请参阅图5、并结合图4，本发明还提供一种AMOLED像素驱动方法，包括如下步骤：
步骤1、提供一上述如图4所示的AMOLED像素驱动电路，此处不再对该电路进行重复描述。该AMOLED像素驱动电路中的第一薄膜晶体管M1、第二薄膜晶体管M2、第三薄膜晶体管M3、第四薄膜晶体管M4、第五薄膜晶体管M5、与第六薄膜晶体管M6均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。所述第三与第四薄膜晶体管M3、M4呈对称设置，且二者的沟道宽度相近，所述第四薄膜晶体管M4为驱动薄膜晶体管，所述第三薄膜晶体管M3为镜像薄膜晶体管。
所述复位信号Restore按照时序提供高、低交替电位。优选的，所述复位信号Restore为第n+1级第一扫描控制信号Gate1(n+1)。
步骤2、进入预充电Pre-charge阶段。
所述数据信号Data提供低电位，第n级第二扫描控制信号Gate2(n)提供低电位，第n级第一扫描控制信号Gate1(n)提供低电位，第n-1级第二扫描控制信号Gate2(n-1)提供高电位，复位信号Restore提供低电位。所述第五薄膜晶体管M5导通，所述第一节点D、第三薄膜晶体管M3的栅极、及第四薄膜晶体管M4的栅极被预充电至同一电位。
步骤3、进入数据写入Program阶段。
所述数据信号Data提供高电位，第n级第二扫描控制信号Gate2(n)提供高电位，第n级第一扫描控制信号Gate1(n)提供高电位，第n-1级第二扫描控制信号Gate2(n-1)提供低电位，复位信号Restore提供低电位。所述第六、第三、第一薄膜晶体管均导通，所述数据信号Data写入第一节点D、第三薄膜晶体管M3的栅极、及第四薄膜晶体管M4的栅极，使得第三与第四薄膜晶体管M3、M4即驱动薄膜晶体管与镜像薄膜晶体管的栅极 电位Vg相等，同时抬升第三薄膜晶体管M3即镜像薄膜晶体管的源极电位Vs。
步骤4、进入驱动发光Drive阶段。
首先进入所述驱动发光Drive阶段初始的复位Restore阶段，所述数据信号Data提供低电位，第n级第二扫描控制信号Gate2(n)提供低电位，第n级第一扫描控制信号Gate1(n)提供低电位，第n-1级第二扫描控制信号Gate2(n-1)提供低电位，复位信号Restore提供高电位。所述第二薄膜晶体管M2在复位信号Restore的控制下导通，第三薄膜晶体管M3即镜像薄膜晶体管的源极电位Vs被拉低至接地电位GND，使得第三与第四薄膜晶体管M3、M4即驱动薄膜晶体管与镜像薄膜晶体管的的栅源极电压相等。
接着进入所述驱动发光Drive阶段的后续阶段，所述复位信号Restore转变为低电位，有机发光二极管D1发光。
如图6所示，本发明的AMOLED像素驱动方法通过复位信号Restore来控制所述第三薄膜晶体管M3的源极电位Vs在复位Restore阶段被拉低至接地电位GND，相比于现有的通过将数据信号恢复至接地电位来拉低镜像薄膜晶体管的源极电位的方法，不仅能够保证第三与第四薄膜晶体管M3、M4即镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压应力接近，而且简化了数据信号Data，将数据信号Data的充电时间增加了Δt。
本发明的AMOLED像素驱动电路及像素驱动方法，在第三与第四薄膜晶体管即镜像薄膜晶体管与驱动薄膜晶体管之间设置一受复位信号控制的第二薄膜晶体管，通过复位信号来控制第三薄膜晶体管即镜像薄膜晶体管的源极电位在复位阶段被拉低至接地电位，使得第三与第四薄膜晶体管即镜像薄膜晶体管与驱动薄膜晶体管的栅源极电压相等，相比于将数据信号恢复至接地电位的方式，能够简化数据信号，增加数据信号的充电时间，实现面板的正常驱动。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (14)

  1. 一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
    所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄膜晶体管的源极及第一电容的一端；
    所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
    所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
    所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
    所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；
    所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
    所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
    所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
    所述复位信号按照时序提供高、低交替电位，控制所述第三薄膜晶体管的源极电位是否被拉低至接地电位。
  2. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  3. 如权利要求1所述的AMOLED像素驱动电路，其中，所述第三与 第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
  4. 如权利要求1所述的AMOLED像素驱动电路，其中，所述复位信号为第n+1级第一扫描控制信号。
  5. 如权利要求1所述的AMOLED像素驱动电路，其中，所述数据信号、第n级第二扫描控制信号、第n级第一扫描控制信号、第n-1级第二扫描控制信号、及复位信号相组合，先后对应于预充电阶段、数据写入阶段、及驱动发光阶段；所述驱动发光阶段的初始为复位阶段；
    在所述复位阶段，所述复位信号提供高电位，所述第二薄膜晶体管导通，第三薄膜晶体管的源极电位被拉低至接地电位，使得第三与第四薄膜晶体管的栅源极电压相等；在其它阶段，所述复位信号均提供低电位。
  6. 如权利要求5所述的AMOLED像素驱动电路，其中，
    在所述预充电阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为高电位，复位信号为低电位；
    在所述数据写入阶段，所述数据信号为高电位，第n级第二扫描控制信号为高电位，第n级第一扫描控制信号为高电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位；
    在所述驱动发光阶段初始的复位阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为高电位；
    在所述复位阶段之后的驱动发光阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位。
  7. 一种AMOLED像素驱动电路，包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
    所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄膜晶体管的源极及第一电容的一端；
    所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏 极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
    所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
    所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
    所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；
    所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
    所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
    所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
    所述复位信号按照时序提供高、低交替电位，控制所述第三薄膜晶体管的源极电位是否被拉低至接地电位；
    其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管；
    其中，所述第三与第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
  8. 如权利要求7所述的AMOLED像素驱动电路，其中，所述复位信号为第n+1级第一扫描控制信号。
  9. 如权利要求7所述的AMOLED像素驱动电路，其中，所述数据信号、第n级第二扫描控制信号、第n级第一扫描控制信号、第n-1级第二扫描控制信号、及复位信号相组合，先后对应于预充电阶段、数据写入阶段、及驱动发光阶段；所述驱动发光阶段的初始为复位阶段；
    在所述复位阶段，所述复位信号提供高电位，所述第二薄膜晶体管导通，第三薄膜晶体管的源极电位被拉低至接地电位，使得第三与第四薄膜晶体管的栅源极电压相等；在其它阶段，所述复位信号均提供低电位。
  10. 如权利要求9所述的AMOLED像素驱动电路，其中，
    在所述预充电阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信 号为高电位，复位信号为低电位；
    在所述数据写入阶段，所述数据信号为高电位，第n级第二扫描控制信号为高电位，第n级第一扫描控制信号为高电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位；
    在所述驱动发光阶段初始的复位阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为高电位；
    在所述复位阶段之后的驱动发光阶段，所述数据信号为低电位，第n级第二扫描控制信号为低电位，第n级第一扫描控制信号为低电位，第n-1级第二扫描控制信号为低电位，复位信号为低电位。
  11. 一种AMOLED像素驱动方法，包括如下步骤：
    步骤1、提供一AMOLED像素驱动电路；
    所述AMOLED像素驱动电路包括：第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、第六薄膜晶体管、第一电容、第二电容、及有机发光二极管；
    所述第六薄膜晶体管的栅极电性连接于第n级第二扫描控制信号，漏极电性连接于数据信号，源极电性连接于第三薄膜晶体管的源极及第一电容的一端；
    所述第三薄膜晶体管的栅极经由第一节点电性连接于第四薄膜晶体管的栅极，漏极电性连接于第一薄膜晶体管的漏极，源极电性连接于第六薄膜晶体管的源极及第一电容的一端；
    所述第一薄膜晶体管的栅极电性连接于第n级第一扫描控制信号，漏极电性连接于第三薄膜晶体管的漏极，源极电性连接于第一节点；
    所述第五薄膜晶体管的栅极与源极均电性连接于第n-1级第二扫描控制信号，漏极电性连接于第一节点；
    所述第四薄膜晶体管的栅极经由第一节点电性连接于第三薄膜晶体管的栅极，漏极电性连接于接地电位，源极电性连接于有机发光二极管的阴极；
    所述第二薄膜晶体管的栅极电性连接于复位信号，源极电性连接于第三薄膜晶体管的源极，漏极电性连接于第四薄膜晶体管的漏极及接地电位；
    所述第一电容的一端电性连接于第六薄膜晶体管的源极及第三薄膜晶体管的源极，另一端电性连接于接地电位；
    所述第二电容的一端电性连接于第一节点，另一端电性连接于接地电位；
    所述有机发光二极管的阳极电性连接于电源电压，阴极电性连接于第四薄膜晶体管的源极；
    步骤2、进入预充电阶段；
    所述数据信号提供低电位，第n级第二扫描控制信号提供低电位，第n级第一扫描控制信号提供低电位，第n-1级第二扫描控制信号提供高电位，复位信号提供低电位，所述第一节点、第三薄膜晶体管的栅极、及第四薄膜晶体管的栅极被预充电至同一电位；
    步骤3、进入数据写入阶段；
    所述数据信号提供高电位，第n级第二扫描控制信号提供高电位，第n级第一扫描控制信号提供高电位，第n-1级第二扫描控制信号提供低电位，复位信号提供低电位，所述数据信号写入第一节点、第三薄膜晶体管的栅极、及第四薄膜晶体管的栅极，同时抬升第三薄膜晶体管的源极电位；
    步骤4、进入驱动发光阶段；
    首先进入所述驱动发光阶段初始的复位阶段，所述数据信号提供低电位，第n级第二扫描控制信号提供低电位，第n级第一扫描控制信号提供低电位，第n-1级第二扫描控制信号提供低电位，复位信号提供高电位，所述第二薄膜晶体管导通，第三薄膜晶体管的源极电位被拉低至接地电位，使得第三与第四薄膜晶体管的栅源极电压相等；
    接着进入所述驱动发光阶段的后续阶段，所述复位信号转变为低电位，有机发光二极管发光。
  12. 如权利要求11所述的AMOLED像素驱动方法，其中，所述第一薄膜晶体管、第二薄膜晶体管、第三薄膜晶体管、第四薄膜晶体管、第五薄膜晶体管、与第六薄膜晶体管均为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管、或非晶硅薄膜晶体管。
  13. 如权利要求11所述的AMOLED像素驱动电路，其中，所述第三与第四薄膜晶体管呈对称设置，且二者的沟道宽度相近；所述第四薄膜晶体管为驱动薄膜晶体管，所述第三薄膜晶体管为镜像薄膜晶体管。
  14. 如权利要求11所述的AMOLED像素驱动电路，其中，所述复位信号为第n+1级第一扫描控制信号。
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