WO2016082716A1

WO2016082716A1 - Power supply device and working method thereof

Info

Publication number: WO2016082716A1
Application number: PCT/CN2015/095135
Authority: WO
Inventors: 陈锋
Original assignee: 王玮冰
Priority date: 2014-11-26
Filing date: 2015-11-20
Publication date: 2016-06-02
Also published as: CN104836328A; CN104836328B

Abstract

A power supply device and a working method thereof. The device comprises a power supply E, a DC-DC converter (1), a data output buffer (2), and a voltage detector (3). The power supply E is used to supply power to the DC-DC converter (1) and the data output buffer (2). The DC-DC converter (1) is used to convert a voltage output by the power supply E and then supply power to a load. The voltage detector (3) is used to detect an output voltage of the DC-DC converter (1), and when it is detected that the output voltage is higher than an upper limit value or is lower than a lower limit value, the voltage detector (3) controls the DC-DC converter (1) to be disconnected from the load, detects a voltage at a load end, and controls the data output buffer (2) to output a voltage and supply power to the load. The device can use the data output buffer to implement the function of a backup power supply converter, and effectively reduces costs.

Description

Power supply device and working method thereof

Technical field

The present invention relates to the field of power supply technologies, and in particular, to a power supply device and a working method thereof.

Background technique

In general electronic equipment, the most vulnerable is the power converter in the power supply unit, so some electronic equipment with high reliability requirements need to have a backup power converter. However, the additional setup of the backup power converter increases the cost of the device. Many electronic devices have a data output buffer. If the data output buffer can be used to implement the function of the backup power converter, the equipment cost can be effectively reduced.

Summary of the invention

The object of the present invention is to overcome the technical problem that a power supply device with high reliability requirements is generally provided with a backup power converter, which increases the cost, and provides a power supply device and a working method thereof, which can realize backup by using a data output buffer. The power converter's function effectively reduces the cost.

In order to solve the above problems, the present invention is implemented by the following technical solutions:

A power supply device of the present invention includes a power source E, a DC-DC converter, a data output buffer, and a voltage monitor, wherein: the power source E is used to supply power to the DC-DC converter and the data output buffer; DC-DC conversion The device is configured to convert the voltage outputted by the power source E to supply power to the load; the voltage monitor is configured to monitor an output voltage of the DC-DC converter, and when the output voltage is detected to be higher than an upper limit value or lower than a lower limit value, The voltage monitor controls the DC-DC converter to disconnect from the load and monitors the load terminal voltage to control the data output buffer output voltage to power the load.

Advantageously, the data output buffer comprises a first selector, a second selector and a tri-state gate, the first input, the second input and the selection of the first selector being electrically connected to the voltage monitor, respectively The output end of a selector is electrically connected to the enable end of the tri-state gate, the first input end of the second selector is a signal input end, the second input end of the second selector is electrically connected to the power source E, and the second selector The selection end is electrically connected to the voltage monitor, the output end of the second selector is electrically connected to the input end of the tri-state gate, and the output end of the tri-state gate is a signal output end.

When the DC-DC converter is working normally, the voltage monitor controls the first input of the first selector and the first input of the second selector to be gated, and the voltage monitor outputs a low level to the first of the first selector. Input The first selector outputs a low level to the enable terminal of the three-state gate. At this time, the data output buffer is a conventional three-state gate-based data output buffer; when the DC-DC converter fails, The voltage monitor monitors that the output voltage of the DC-DC converter exceeds a preset value, and the voltage monitor controls the second input of the first selector and the second input of the second selector to strobe, and the voltage monitor outputs a PWM signal To the second input of the first selector, the second selector outputs a power supply E voltage VE to the input of the three-state gate, and the first selector outputs a PWM signal to the enable terminal of the three-state gate, and the PWM high level time The longer the three-state gate outputs a high level, and the higher the PWM duty cycle due to the on-resistance of the tri-state gate, the higher the output voltage of the tri-state gate under the same load current. Therefore, the output voltage of the tri-state gate is controlled by PWM, and the voltage output from the tri-state gate supplies power to the load.

Advantageously, said data output buffer comprises a third selector, an inverter, a PMOS transistor and a resistor, the first input of the third selector being a signal input, the second input of the third selector and the selection The voltage is connected to the voltage monitor, the output of the third selector is electrically connected to the input end of the inverter, the output end of the inverter is electrically connected to the gate of the PMOS transistor, and the drain of the PMOS transistor is electrically connected to the power source E. The source of the PMOS transistor is electrically connected to the first end of the resistor, the second end of the resistor is grounded, and the first end of the resistor is a signal output end.

When the DC-DC converter is working normally, the voltage monitor controls the first input of the third selector to be strobed. At this time, the data output buffer is a conventional data output buffer based on the open drain output; when DC-DC When the converter fails, the voltage monitor monitors that the output voltage of the DC-DC converter exceeds a preset value, the voltage monitor controls the second input of the third selector to strobe, and the voltage monitor outputs the PWM signal to the third selection. The second input terminal of the second selector output PWM is output to the gate of the PMOS transistor through the inverter, and the longer the PWM high level, the longer the low voltage of the PMOS transistor gate after the inverter The longer the high level of the output corresponding to the first end of the resistor, and the on-resistance due to the open-drain output, the larger the PWM duty cycle, the voltage at the first end of the resistor is also at the same load current. The higher, therefore, the voltage output from the first end of the resistor is PWM controlled, and the voltage output from the first end of the resistor supplies power to the load.

A power supply device comprising a power supply E, a DC-DC converter and a capacitor C1, further comprising a data output buffer, a switch tube S1, a switch tube S2 and a voltage monitor, wherein a negative pole of the power source E is grounded, The positive pole of the power supply E is electrically connected to the input end of the DC-DC converter and the power supply end of the data output buffer The output end of the DC-DC converter is electrically connected to the first detecting end of the voltage monitor and the first conducting end of the switch tube S1, and the second conducting end of the switch tube S1 and the second conducting end of the voltage monitor The detecting end, the first conducting end of the switch S2 and the upper plate of the capacitor C1 are electrically connected, the lower plate of the capacitor C1 is grounded, and the second conducting end of the switch S2 is electrically connected to the signal output end of the data output buffer. The voltage monitor is electrically connected to the data output buffer, the control terminal of the switch S1, and the control terminal of the switch S2, and the upper plate of the capacitor C1 is the positive output terminal of the power supply device.

The power supply E, the DC-DC converter and the capacitor C1 constitute a conventional power supply system; the data output buffer, the switch tube S1, the switch tube S2 and the voltage monitor constitute a circuit for realizing the data output buffer as a backup power converter.

After power-on, the voltage monitor monitors the voltage VCC at the output of the DC-DC converter. If the voltage VCC is within a preset range, the voltage monitor determines that the DC-DC converter is operating normally, and the voltage monitor controls the switch S1 to be closed. The switch tube S2 is turned off, and the DC-DC converter converts the voltage output from the power source E into a required voltage output power supply, and the data output buffer normally transmits data, and transmits the input data signal.

If the voltage VCC is not within the preset range, the voltage monitor determines that the DC-DC converter is faulty, the voltage monitor controls the switch S1 to open, the switch S2 is closed, the DC-DC converter stops supplying power, and the voltage monitor Sending a control signal and a PWM signal to the data output buffer, sending an alarm signal to the external electronic device, the data output buffer stops the data output after receiving the control signal, and the data output buffer inputs the voltage to the power source E according to the received PWM signal. After PWM modulation, it is output to the upper plate of capacitor C1 for power supply.

Preferably, the data output buffer comprises a signal input end, a signal output end, a first controller, a current voltage detector, an inductor L, a capacitor C2, a switch tube S11, a switch tube S12, a switch tube S13, a switch tube S14, and The switch S15, the first conductive end of the switch S11 and the first conductive end of the switch S13 are electrically connected to the power source E, and the second conductive end of the switch S11 and the first conductive end of the switch S12, The first detecting end of the current-voltage detector is electrically connected to the first conducting end of the inductor L, the second conducting end of the switching tube S13 is opposite to the first conducting end of the switching tube S14, and the first conducting end of the switching tube S15 The second detecting end of the current-voltage detector and the second conducting end of the inductor L are electrically connected, and the second conducting end of the switch tube S15 is electrically connected to the upper plate and the signal output end of the capacitor C2, and the first switch tube S12 Two conduction ends, switch tube S14 The second conduction end and the lower plate of the capacitor C2 are grounded, and the first controller is respectively connected with the signal input end, the voltage monitor, the data output end of the current voltage detector, the control end of the switch tube S11, and the switch tube S12. The control terminal, the control terminal of the switch S13, the control terminal of the switch S14, and the control terminal of the switch S15 are electrically connected.

When the data output buffer is configured by the voltage monitor to perform the data transfer function, the first controller controls the switch S15 to be constantly turned on. During the process of the input signal Din transitioning from a low level to a high level, and then from a high level to a low level, the data output buffer operates into six segments of T1, T2, T3, T4, T5, and T6. In the stage, the first controller controls the switch tube S11, the switch tube S12, the switch tube S13, and the switch tube S14 to operate.

When the input signal Din transitions from a low level to a high level, it enters the T1 interval, the switch tube S11 is turned on, the switch tube S12, the switch tube S13, and the switch tube S14 are turned off, and the charge stored in the power source E is connected to the inductor via the switch tube S11. L and capacitor C2 are charged, and the voltage VDout of the upper plate of capacitor C2 is free to oscillate from 0 to Vx. At the end of the T1 interval, the current energy in the inductor L plus the charge energy on the capacitor C2 is equal to the capacitive energy storage of the voltage on the capacitor C1 that needs to be output. Then enter the T2 section, the switch S12 is turned on, the switch S11, the switch S13, and the switch S14 are turned off, and free oscillation continues to occur. When T2 ends, the current energy in the inductor L is all transferred to the capacitor C2. Then enter the T3 interval, the switch tube S13 is turned on, the switch tube S11, the switch tube S12, the switch tube S14 is disconnected, the upper plate of the capacitor C2 is strengthened to VE, and the signal output terminal outputs a high level.

When the input signal Din transitions from a high level to a low level, the T4 section is entered, the switch S12 is turned on, the switch S11, the switch S13, and the switch S14 are turned off, and the charges on the upper plate of the capacitor C2 are all transferred to the inductor. In L, at the end of T4, VDout is 0, and the current in the inductor L reaches the maximum value. Then, in the T5 section, the switch S11 and the switch S14 are turned on, the switch S12 and the switch S13 are turned off, and the energy in the inductor L is all transferred to the power source E. When the end of T5, the current in the inductor L is zero. Then enter the T6 interval, the switch tube S14 is turned on, the switch tube S11, the switch tube S12, the switch tube S13 is turned off, and the signal output end outputs a low level.

When the data output buffer is configured by the voltage monitor to perform the power supply function, the first controller controls the switch tube S13 to be constantly turned off, the voltage monitor controls the switch tube S2 to be constantly turned on, the switch tube S11, the switch tube S12, and the switch tube S14 Switching tube S15, inductor L, capacitor C2, capacitor C1 constitute synchronous rectification non-inverting output The Buck-Boost circuit powers electronic devices.

Advantageously, said voltage monitor comprises a reference voltage output module Ref, a comparator CMP1, a comparator CMP2, a comparator CMP3, an operational amplifier OA, a compensation capacitor CL, a ramp transmitter ramp and a second controller, the in-phase of the comparator CMP1 The input terminal and the inverting input terminal of the comparator CMP2 are electrically connected to the output end of the DC-DC converter, and the inverting input terminal of the comparator CMP1 is electrically connected to the first output end of the reference voltage output module Ref, and the comparator CMP2 is in phase. The input end is electrically connected to the second output end of the reference voltage output module Ref, and the non-inverting input terminal of the operational amplifier OA is electrically connected to the upper plate of the capacitor C1, and the inverting input terminal of the operational amplifier OA and the third of the reference voltage output module Ref The output end is electrically connected, the output end of the operational amplifier OA is electrically connected to one end of the compensation capacitor CL and the inverting input end of the comparator CMP3, the other end of the compensation capacitor CL is grounded, and the non-inverting input terminal of the comparator CMP3 is electrically connected with the ramp transmitter ramp. The second controller is respectively connected to the output of the comparator CMP1, the output of the comparator CMP2, the output of the comparator CMP3, the control terminal of the switch S1, and the control of the switch S2. And a first controller electrically connected.

The reference voltage V1 outputted by the first output of the reference voltage output module Ref is referenced by the second output of the voltage output module Ref, V1>V2. When the voltage VCC outputted by the output of the DC-DC converter is in the range of V1 to V2, the second controller controls to determine that the DC-DC converter operates normally; when the voltage VCC outputted from the output of the DC-DC converter exceeds V1 to V2 In the range, the second controller determines that the DC-DC converter has failed. The operational amplifier OA amplifies the voltage difference between the voltage VDD of the upper plate of the capacitor C1 and the voltage V3 of the third output of the reference voltage output module Ref, and then compares with the ramp voltage output by the ramp transmitter ramp, and the comparison result is output to the The second controller adjusts the PWM signal duty ratio according to the comparison result, thereby stabilizing the voltage VDD of the upper plate of the capacitor C1 at a set value.

Advantageously, said power supply unit further comprises an alarm module, said alarm module being electrically coupled to the voltage monitor. If the voltage VCC is not within the preset range, the voltage monitor sends an alarm signal to the alarm module, and the alarm module alerts the user.

Preferably, the power supply device further includes a third controller and an AND circuit, wherein an output of the third controller is electrically connected to an input end of the voltage monitor and a first input end of the AND circuit, a second input of the AND circuit is electrically coupled to an output of the voltage monitor, the output of the AND circuit It is electrically connected to the input of the first controller.

When the DC-DC converter is working normally, the voltage monitor outputs a low level to the second input of the AND circuit, and does not receive the signal output by the third controller, and the AND circuit outputs a low level to the data output buffer. The data output buffer performs a data transfer function to transmit the input data signal. When the DC-DC converter fails, if the third controller outputs a high level, the data output buffer implements the backup power converter function, and if the third controller outputs a low level, the data output buffer performs data transmission. Features. The greater the ratio between the data transmission time and the power supply time, the greater the amplitude of the output voltage drop of the power supply device, and the larger the ripple of the output voltage of the power supply device; the smaller the ratio of the data transmission time to the power supply time, the power supply device The smaller the magnitude of the output voltage drop, the smaller the ripple of the output voltage of the power supply unit. At the same time, the ratio between the transmission data time and the power supply time also affects the power supply efficiency. This ratio is large and the peak current is also higher, and the efficiency is lower under the same load conditions. Therefore, it is necessary to reduce the ratio between the data transmission time and the power supply time as much as possible. To this end, it is necessary to dynamically adjust the proportional relationship between the transmission data time and the power supply time. Only when the data needs to be transmitted, the system is configured to transmit the data mode. Once the transmission is completed, the data output buffer is immediately restored to the data backup mode. .

The working method of a power supply device of the present invention comprises the following steps:

S1: The voltage monitor monitors the voltage VCC at the output of the DC-DC converter. If the voltage VCC is greater than or equal to the lower limit value V1 and less than or equal to the upper limit value V2, the voltage monitor determines that the DC-DC converter is working normally, and performs step S2. If the voltage VCC is less than the lower limit value V1 or greater than the upper limit value V2, the voltage monitor determines that the DC-DC converter is faulty, and performs step S3;

S2: The voltage monitor controls the switch tube S1 to be closed, and the switch tube S2 is disconnected. The DC-DC converter converts the voltage output from the power source E into a required voltage output power supply, the data output buffer works normally, performs a data transmission function, and inputs Data signal is sent out;

S3: The voltage monitor controls the switch tube S1 to be disconnected, the switch tube S2 is closed, the DC-DC converter stops supplying power, and the voltage monitor sends a control signal and a PWM signal to the data output buffer to send an alarm signal to the external electronic device, and the data The output buffer stops the data output operation after receiving the control signal, and the data output buffer PWM-modulates the voltage input from the power source E according to the received PWM signal, and outputs the voltage to the upper plate of the capacitor C1 for power supply.

Advantageously, the method of the data output buffer performing a data transfer function comprises the steps of:

N1: The first controller controls the switch S15 to be constantly conducting, the current voltage detector detects the current in the inductor L and the output voltage VDout of the upper plate of the capacitor C2, and the first controller reads the input signal Din when the input signal Din is When the low level transitions to the high level, step N2 is performed, and when the input signal Din transitions from the high level to the low level, step N5 is performed;

N2: the first controller controls the switch tube S11 to turn on the T1 time, and controls the switch tube S12, the switch tube S13, and the switch tube S14 to turn off the T1 time;

N3: At the end of the T1 time, the first controller controls the switch tube S12 to turn on the T2 time, and controls the switch tube S11, the switch tube S13, and the switch tube S14 to turn off the T2 time;

N4: At the end of the T2 time, the first controller controls the switch S13 to be turned on, the control switch tube S11, the switch tube S12, the switch tube S14 is turned off, and then jumps to step N1;

N5: the first controller controls the switch tube S12 to be turned on, and the control switch tube S11, the switch tube S13, and the switch tube S14 are disconnected;

N6: When the output voltage VDout decreases to 0, the first controller controls the switch tube S11 and the switch tube S14 to turn on the T5 time, and the control switch tube S12 and the switch tube S13 are turned off for T5 time;

N7: At the end of the T5 time, the first controller controls the switch S14 to be turned on, the control switch tube S11, the switch tube S12, the switch tube S13 is turned off, and then jumps to step N1;

The first controller modifies the T1 time length in real time, including the following steps: the first controller presets the initial value of the T1 time, and when the T2 time ends, if the output voltage VDout is less than the power supply E voltage VE, the time length of the T1 is increased; When the output voltage VDout is greater than the power supply E voltage VE, the length of time T1 is decreased.

Preferably, the length of the T2 is: the first controller modifies the length of the T2 in real time, and includes the following steps: the first controller presets the initial value of the T2 time, and when the T2 time ends, if the residual current in the inductor L is greater than 0, Then increase the length of time T2; if the residual current in the inductor L is less than 0, reduce the length of time T2; or the length of the T2 time is: when the T1 time ends, the T2 time starts, when the current in the inductor L is equal to 0, End of T2 time;

The length of the T5 is: the first controller modifies the length of the T5 in real time, and includes the following steps: the first controller presets the initial value of the T5 time, and when the T5 time ends, if the residual current in the inductor L is small At 0, the length of time T5 is increased; if the residual current in the inductor L is greater than 0, the length of time T5 is decreased; or the length of time T5 is: when the output voltage VDout is lowered to 0, the time T5 starts, when the inductance L When the medium current is equal to 0, the T5 time ends.

The current flowing from the first conducting end to the second conducting end in the inductor L is a positive current direction, and the current in the inductor L is greater than zero. By controlling S11, S12, S13, and S14, the power supply E is controlled to non-destructively charge the capacitor C2 through the inductor L or the capacitor C2 is non-destructively discharged to the power source E through the inductor L, thereby achieving non-destructive charging and discharging of the capacitor C2 load, and this charging and discharging process At the same time, the lossless transmission of the data signal is realized. Since the current in the inductor L needs to end at the zero point in the T2 phase and the T5 phase, thereby reducing the power consumption and avoiding the circuit noise generated by the high-frequency oscillation of the residual current in the inductor L, the first controller controls the T2 phase and the T5 phase. Duration is important.

H1: The voltage monitor monitors the voltage VCC at the output of the DC-DC converter. If the voltage VCC is greater than or equal to the lower limit value V1 and less than or equal to the upper limit value V2, the voltage monitor determines that the DC-DC converter is working normally, and performs step S2 if When the voltage VCC is less than the lower limit value V1 or greater than the upper limit value V2, the voltage monitor determines that the DC-DC converter is faulty, and performs step S3;

H2: The voltage monitor controls the switch tube S1 to be closed and the switch tube S2 to be disconnected. The DC-DC converter converts the voltage output from the power source E into a required voltage output power supply, and the voltage monitor outputs a low level to the second of the AND circuit. At the input end, the AND circuit outputs a low level to the data output buffer, and the data output buffer performs a data transmission function to transmit the input data signal;

H3: The voltage monitor controls the switch S1 to open, the switch S2 is closed, the DC-DC converter stops supplying power, and the voltage monitor outputs a high level to the second input of the AND circuit, and sends a PWM signal to the data output buffer. Transmitting an alarm signal to an external electronic device and transmitting a control signal to the third controller. When no data needs to be transmitted, the third controller outputs a high level to the first input terminal of the AND circuit and the voltage monitor, the AND gate The circuit outputs a high level to the data output buffer, and the data output buffer stops the data output after receiving the high level control signal, and the data output buffer PWM modulates the voltage input to the power source E according to the received PWM signal, and outputs the result to The upper plate of the capacitor C1 is powered; when it is required to transmit data, the third controller outputs a low level to the first input terminal of the AND circuit and the voltage monitor, and the voltage monitor controls the switch after receiving the low level signal. S1, switch tube S2 is disconnected, and the output of the gate circuit is low. Level to the data output buffer, the data output buffer stops the power supply after receiving the low level control signal, and re-executes the data transfer function.

A power supply device comprising a power supply E, a DC-DC converter and a capacitor C1, further comprising a data output buffer, a switch tube S1, a switch tube S2 and a voltage monitor, wherein a negative pole of the power source E is grounded, The anode of the power source E is electrically connected to the input end of the DC-DC converter and the power terminal of the data output buffer, the output end of the DC-DC converter and the first detection end of the voltage monitor and the first switch S1 The conduction end is electrically connected, and the second conduction end of the switch tube S1 is electrically connected to the second detection end of the voltage monitor, the first conduction end of the switch tube S2, and the upper plate of the capacitor C1, and the lower plate of the capacitor C1 Grounding, the second conduction end of the switch tube S2 is electrically connected to the signal output end of the data output buffer, and the voltage monitor is electrically connected to the data output buffer, the control end of the switch tube S1 and the control end of the switch tube S2, respectively. The upper plate of the capacitor C1 is a positive output terminal of the power supply device, and the data output buffer includes a signal input end, a signal output end, a first controller, a current voltage detector, an inductor L, a capacitor C2, a switch tube S11, Switch tube S12, switch tube S13 and switch tube S 14. The first conductive end of the switch tube S11 and the first conductive end of the switch tube S13 are both electrically connected to the power source E. The second conductive end of the switch tube S11 and the first conductive end of the switch tube S12, current and voltage The first detecting end of the detector is electrically connected to the first conducting end of the inductor L, the second conducting end of the switch tube S13 is opposite to the first conducting end of the switch tube S14, the second detecting end of the current and voltage detector, and the inductor The second conduction end of the L, the upper plate of the capacitor C2 and the signal output end are electrically connected, and the second conduction end of the switch tube S12, the second conduction end of the switch tube S14, and the lower plate of the capacitor C2 are grounded. The first controller is respectively connected with the signal input end, the voltage monitor, the data output end of the current voltage detector, the control end of the switch tube S11, the control end of the switch tube S12, the control end of the switch tube S13, and the control end of the switch tube S14. Electrical connection.

The substantial effect of the present invention is that the function of the backup power converter can be realized by using the data output buffer, thereby effectively reducing the cost.

DRAWINGS

Figure 1 is a circuit schematic diagram of the present invention;

2 is a circuit schematic diagram of a data output buffer of the present invention;

Figure 3 is a circuit schematic diagram of a voltage monitor;

4 is a timing chart of control signals of a data output buffer performing a data transfer function;

Figure 5 is a timing diagram of a control signal when the data output buffer is powered;

Figure 6 is a circuit schematic diagram of the present invention;

Figure 7 is a circuit schematic diagram of a data output buffer of the present invention;

Figure 8 is a timing diagram of a control signal when the data output buffer is powered;

9 is a schematic structural diagram of a data output buffer;

Figure 10 is a block diagram showing the structure of a data output buffer.

In the figure: 1, DC-DC converter, 2, data output buffer, 3, voltage monitor, 4, signal input, 5, signal output, 6, first controller, 7, current and voltage detector, 8. Second controller, 9, alarm module, 10, third controller, 11, AND gate circuit, 12, first selector, 13, second selector, 14, three-state gate, 15, third choice , 16, inverter, 17, PMOS tube, 18, resistor.

detailed description

The technical solutions of the present invention will be further specifically described below by way of embodiments and with reference to the accompanying drawings.

Embodiment 1: A power supply device of this embodiment, as shown in FIG. 1, includes a power source E for supplying power to the DC-DC converter 1 and the data output buffer 2; and a DC-DC converter 1 for The voltage outputted by the power source E is converted to supply power to the load; the voltage monitor 3 is configured to monitor the output voltage of the DC-DC converter 1, and when the output voltage is detected to be higher than the upper limit value or lower than the lower limit value, the voltage is The monitor 3 controls the DC-DC converter 1 to be disconnected from the load, and monitors the load terminal voltage, controls the output voltage of the data output buffer 2 to supply power to the load; and the data output buffer 2 supplies power to the load under the control of the voltage monitor 3. .

As shown in FIG. 9, the data output buffer 2 includes a first selector 12, a second selector 13, and a tri-state gate 14, respectively, the first input terminal, the second input terminal and the selection terminal of the first selector 12 are respectively connected to the voltage The monitor 3 is electrically connected, the output of the first selector 12 is electrically connected to the enable end of the tri-state gate 14, the first input of the second selector 13 is a signal input, and the second input of the second selector 13 The terminal is electrically connected to the power source E, the selection terminal of the second selector 13 is electrically connected to the voltage monitor 3, the output terminal of the second selector 13 is electrically connected to the input terminal of the tri-state gate 14, and the output terminal of the tri-state gate 14 is Signal output.

Embodiment 2: A power supply device of this embodiment, as shown in FIG. 10, the data output buffer 2 includes a third selector 15, an inverter 16, a PMOS transistor 17, and a resistor 18, and a third selector 15 An input terminal is a signal input terminal, a second input terminal and a selection terminal of the third selector 15 are electrically connected to the voltage monitor 3, respectively, and an output end of the third selector 15 is electrically connected to the input end of the inverter 16 The output of the phase comparator 16 is electrically connected to the gate of the PMOS transistor 17, the drain of the PMOS transistor 17 is electrically connected to the power source E, the source of the PMOS transistor 17 is electrically connected to the first end of the resistor 18, and the second end of the resistor 18 is connected. Grounding, the first end of the resistor 18 is a signal output end, and the rest of the structure is the same as that in the first embodiment.

When the DC-DC converter is working normally, the voltage monitor controls the first input of the third selector to be strobed. At this time, the data output buffer is a conventional data output buffer based on the open drain output; when DC-DC When the converter fails, the voltage monitor monitors that the output voltage of the DC-DC converter exceeds a preset value, the voltage monitor controls the second input of the third selector to strobe, and the voltage monitor outputs the PWM signal to the third selection. The second input terminal of the second selector output PWM is output to the gate of the PMOS transistor through the inverter, and the longer the PWM high level, the longer the low voltage of the PMOS transistor gate after the inverter The longer the high level of the output corresponding to the first end of the resistor, and the on-resistance due to the open-drain output, the larger the PWM duty cycle, the voltage at the first end of the resistor is also at the same load current. Therefore, the voltage outputted by the first end of the resistor is controlled by the PWM, and the voltage outputted by the first end of the resistor supplies power to the load. Embodiment 3: A power supply device of the embodiment, as shown in FIG. , DC-DC converter and capacitor C1, also included A data output buffer 2, a switch Sl, switch S2, the voltage monitor and alarm module 9 3, negative ground power source E, the positive power supply E and the DC-DC converter The input end of the device 1 is electrically connected to the power supply end of the data output buffer 2, and the output end of the DC-DC converter 1 is electrically connected to the first detection end of the voltage monitor 3 and the first conduction end of the switch tube S1, the switch The second conducting end of the tube S1 is electrically connected to the second detecting end of the voltage monitor 3, the first conducting end of the switching tube S2 and the upper plate of the capacitor C1, the lower plate of the capacitor C1 is grounded, and the switching tube S2 is The second conductive end is electrically connected to the signal output end of the data output buffer 2, and the voltage monitor 3 is electrically connected to the data output buffer 2, the alarm module 9, the control end of the switch tube S1, and the control end of the switch tube S2, respectively. The upper plate of capacitor C1 is the positive output of the power supply unit.

The power supply E, the DC-DC converter 1 and the capacitor C1 constitute a conventional power supply system; the data output buffer 2, the switch tube S1, the switch tube S2 and the voltage monitor 3 constitute a circuit for realizing the data output buffer as a backup power converter .

After power-on, the voltage monitor 3 monitors the voltage VCC at the output of the DC-DC converter 1. If the voltage VCC is within a preset range, the voltage monitor 3 determines that the DC-DC converter 1 is operating normally, and the voltage monitor 3 controls The switch S1 is closed and the switch S2 is turned off. The DC-DC converter 1 converts the voltage output from the power supply E into a required voltage output power supply, and the data output buffer 2 transmits data normally, and transmits the input data signal.

If the voltage VCC is not within the preset range, the voltage monitor 3 determines that the DC-DC converter has failed, the voltage monitor 3 controls the switch S1 to be turned off, the switch S2 is closed, and the DC-DC converter 1 stops supplying power, and at the same time The voltage monitor 3 sends a control signal and a PWM signal to the data output buffer 2, and sends an alarm signal to the alarm module 9. The alarm module 9 alarms the user, and the data output buffer 2 stops the data output after receiving the control signal, and the data output buffer The device 2 PWM-modulates the voltage input from the power source E according to the received PWM signal, and outputs it to the upper plate of the capacitor C1 for power supply.

As shown in FIG. 2, the data output buffer 2 includes a signal input terminal 4, a signal output terminal 5, a first controller 6, a current voltage detector 7, an inductor L, a capacitor C2, a switch tube S11, a switch tube S12, and a switch tube. S13, the switch tube S14 and the switch tube S15, the first conductive end of the switch tube S11 and the first conductive end of the switch tube S13 are electrically connected to the power source E, and the second conductive end of the switch tube S11 and the switch tube S12 The first conducting end, the first detecting end of the current-voltage detector 7 and the first conducting end of the inductor L are electrically connected, the second conducting end of the switch tube S13 and the first conducting end of the switching tube S14, the switching tube The first conduction end of S15, the second detection end of the current voltage detector 7 and the second conduction end of the inductor L are electrically connected, and the first switch tube S15 The second conducting end is electrically connected to the upper plate and the signal output end of the capacitor C2, and the second conducting end of the switching tube S12, the second conducting end of the switching tube S14 and the lower plate of the capacitor C2 are grounded, the first control And the signal input terminal 4, the voltage monitor 3, the data output end of the current voltage detector 7, the control end of the switch tube S11, the control end of the switch tube S12, the control end of the switch tube S13, and the control of the switch tube S14 The terminal is electrically connected to the control terminal of the switch S15.

When the data output buffer 2 is configured by the voltage monitor 3 to perform the data transfer function, the first controller 6 controls the switch S15 to be constantly turned on. In the process of the input signal Din transitioning from a low level to a high level, and then jumping from a high level to a low level, the data output buffer 2 is divided into six parts: T1, T2, T3, T4, T5, and T6. In one stage, as shown in FIG. 4, the first controller 6 controls the switching tube S11, the switching tube S12, the switching tube S13, and the switching tube S14 to operate.

When the input signal Din transitions from a low level to a high level, it enters the T1 interval, the switch tube S11 is turned on, the switch tube S12, the switch tube S13, and the switch tube S14 are turned off, and the charge stored in the power source E is connected to the inductor via the switch tube S11. L and capacitor C2 are charged, and the voltage VDout of the upper plate of capacitor C2 is free to oscillate from 0 to Vx. At the end of the T1 interval, the current energy in the inductor L plus the charge energy on the capacitor C2 is equal to the capacitive energy storage of the voltage on the capacitor C1 that needs to be output. Then enter the T2 section, the switch S12 is turned on, the switch S11, the switch S13, and the switch S14 are turned off, and free oscillation continues to occur. When T2 ends, the current energy in the inductor L is all transferred to the capacitor C2. Then enter the T3 interval, the switch tube S13 is turned on, the switch tube S11, the switch tube S12, the switch tube S14 is disconnected, the upper plate of the capacitor C2 is strengthened to VE, and the signal output terminal 5 outputs a high level.

When the input signal Din transitions from a high level to a low level, the T4 section is entered, the switch S12 is turned on, the switch S11, the switch S13, and the switch S14 are turned off, and the charges on the upper plate of the capacitor C2 are all transferred to the inductor. In L, at the end of T4, VDout is 0, and the current in the inductor L reaches the maximum value. Then, in the T5 section, the switch S11 and the switch S14 are turned on, the switch S12 and the switch S13 are turned off, and the energy in the inductor L is all transferred to the power source E. When the end of T5, the current in the inductor L is zero. Then enter the T6 section, the switch tube S14 is turned on, the switch tube S11, the switch tube S12, the switch tube S13 is turned off, and the signal output terminal 5 outputs a low level.

When the data output buffer 2 is configured by the voltage monitor 3 to perform the power supply function, the first controller 6 controls the switch S13 to be constantly turned off, and the voltage monitor 3 controls the switch S2 to be constantly turned on, the switch tube S11, and the switch Switch S12, switch tube S14, switch tube S15, inductor L, capacitor C2, capacitor C1 constitute the Buck-Boost circuit of synchronous rectification non-inverting output, control timing of switch tube S11, switch tube S12, switch tube S14, switch tube S15 As shown in Figure 5, the electronic device is powered.

As shown in FIG. 3, the voltage monitor 3 includes a reference voltage output module Ref, a comparator CMP1, a comparator CMP2, a comparator CMP3, an operational amplifier OA, a compensation capacitor CL, a ramp transmitter ramp, and a second controller 8, a comparator The non-inverting input of the CMP1 and the inverting input of the comparator CMP2 are electrically connected to the output of the DC-DC converter, and the inverting input of the comparator CMP1 is electrically connected to the first output of the reference voltage output module Ref. The non-inverting input of the CMP2 is electrically connected to the second output of the reference voltage output module Ref, and the non-inverting input of the operational amplifier OA is electrically connected to the upper plate of the capacitor C1, and the inverting input of the operational amplifier OA and the reference voltage output module Ref The third output terminal is electrically connected, the output end of the operational amplifier OA is electrically connected to one end of the compensation capacitor CL and the inverting input terminal of the comparator CMP3, the other end of the compensation capacitor CL is grounded, the non-inverting input terminal of the comparator CMP3 and the ramp transmitter ramp Electrically connected, the second controller 8 and the output of the comparator CMP1, the output of the comparator CMP2, the output of the comparator CMP3, the control terminal of the switch S1, and the control terminal of the switch S2 It is electrically connected to the first controller 6.

The reference voltage V1 outputted by the first output of the reference voltage output module Ref is referenced by the second output of the voltage output module Ref, V1>V2. When the voltage VCC outputted from the output of the DC-DC converter 1 is in the range of V1 to V2, the second controller 8 controls to determine that the DC-DC converter 1 is operating normally; when the voltage output from the output of the DC-DC converter 1 is VCC When the range of V1 to V2 is exceeded, the second controller 8 determines that the DC-DC converter has failed. The operational amplifier OA amplifies the voltage difference between the voltage VDD of the upper plate of the capacitor C1 and the voltage V3 of the third output of the reference voltage output module Ref, and then compares with the ramp voltage output by the ramp transmitter ramp, and the comparison result is output to the The second controller 8 adjusts the duty ratio of the PWM signal according to the comparison result, thereby stabilizing the voltage VDD of the upper plate of the capacitor C1 at a set value.

The working method of the power supply device of the embodiment is applicable to the above power supply device, and includes the following steps:

S1: The voltage monitor monitors the voltage VCC at the output of the DC-DC converter. If the voltage VCC is greater than or equal to the lower limit value V1 and less than or equal to the upper limit value V2, the voltage monitor determines that the DC-DC converter is normal. Working, step S2, if the voltage VCC is less than the lower limit value V1 or greater than the upper limit value V2, the voltage monitor determines that the DC-DC converter has failed, step S3;

The method in which the data output buffer performs the data transfer function includes the following steps:

The first controller modifies the length of the T1 in real time, including the following steps: when the first controller presets T1 The initial value between the two ends, if the output voltage VDout is less than the power supply E voltage VE, the time length of T1 is increased; if the output voltage VDout is greater than the power supply E voltage VE, the time length of T1 is decreased;

The length of the T2 is: the first controller modifies the length of the T2 in real time, and includes the following steps: the first controller presets the initial value of the T2 time. When the T2 time ends, if the residual current in the inductor L is greater than 0, the T2 is increased. The length of time; if the residual current in the inductor L is less than 0, then reduce the length of time T2; or the length of the T2 time is: when the T1 time ends, the T2 time begins, when the current in the inductor L is equal to 0, the T2 time ends. ;

The length of the T5 is: the first controller modifies the length of the T5 in real time, and includes the following steps: the first controller presets the initial value of the T5 time. When the T5 time ends, if the residual current in the inductor L is less than 0, the T5 is increased. The length of time; if the residual current in the inductor L is greater than 0, then reduce the length of time T5; or the length of time T5 is: when the output voltage VDout decreases to 0, the T5 time begins, when the current in the inductor L is equal to 0, The T5 time is over.

Embodiment 4: A power supply device of this embodiment, as shown in FIG. 6, further includes a third controller 10 and an AND circuit 11, an output of the third controller 10 and an input terminal of the voltage monitor 3 and The first input end of the gate circuit 11 is electrically connected, the second input end of the AND circuit 11 is electrically connected to the output end of the voltage monitor 3, and the output end of the AND circuit 11 is electrically connected to the input end of the first controller 6, The rest of the structure is the same as in Embodiment 1.

When the DC-DC converter is working normally, the voltage monitor outputs a low level to the second input of the AND circuit, and does not receive the signal output by the third controller, and the AND circuit outputs a low level to the data output buffer. The data output buffer performs a data transfer function to transmit the input data signal. DC-DC When the converter fails, if the third controller outputs a high level, the data output buffer implements a backup power converter function, and if the third controller outputs a low level, the data output buffer performs a data transfer function. The greater the ratio between the data transmission time and the power supply time, the greater the amplitude of the output voltage drop of the power supply device, and the larger the ripple of the output voltage of the power supply device; the smaller the ratio of the data transmission time to the power supply time, the power supply device The smaller the magnitude of the output voltage drop, the smaller the ripple of the output voltage of the power supply unit. At the same time, the ratio between the transmission data time and the power supply time also affects the power supply efficiency. This ratio is large and the peak current is also higher, and the efficiency is lower under the same load conditions. Therefore, it is necessary to reduce the ratio between the data transmission time and the power supply time as much as possible. To this end, it is necessary to dynamically adjust the proportional relationship between the transmission data time and the power supply time. Only when the data needs to be transmitted, the system is configured to transmit the data mode. Once the transmission is completed, the data output buffer is immediately restored to the data backup mode. .

The working method of the power supply device of this embodiment is applicable to the above power supply device, and includes the following steps:

H3: The voltage monitor controls the switch S1 to open, the switch S2 is closed, the DC-DC converter stops supplying power, and the voltage monitor outputs a high level to the second input of the AND circuit, and sends a PWM signal to the data output buffer. Transmitting an alarm signal to an external electronic device and transmitting a control signal to the third controller. When no data needs to be transmitted, the third controller outputs a high level to the first input terminal of the AND circuit and the voltage monitor, the AND gate The circuit outputs a high level to the data output buffer, and the data output buffer stops the data output after receiving the high level control signal, and the data output buffer PWM modulates the voltage input to the power source E according to the received PWM signal, and outputs the result to The upper plate of the capacitor C1 is powered; when data needs to be transmitted, the third controller outputs a low level to the first input of the AND circuit and the voltage monitor, After receiving the low level signal, the voltage monitor controls the switch tube S1 and the switch tube S2 to be disconnected, and the AND circuit outputs a low level to the data output buffer, and the data output buffer stops the power supply after receiving the low level control signal. Re-execute the data transfer function.

Embodiment 5: A power supply device of this embodiment, as shown in FIG. 7, the data output buffer includes a signal input end, a signal output end, a first controller, a current voltage detector, an inductor L, a capacitor C2, and a switch tube. S11, the switch tube S12, the switch tube S13 and the switch tube S14, the first conduction end of the switch tube S11 and the first conduction end of the switch tube S13 are electrically connected to the power source E, and the second conduction end of the switch tube S11 is The first conduction end of the switch tube S12, the first detection end of the current voltage detector and the first conduction end of the inductor L are electrically connected, and the second conduction end of the switch tube S13 and the first conduction end of the switch tube S14 The second detecting end of the current-voltage detector, the second conducting end of the inductor L, the upper plate of the capacitor C2 and the signal output end are electrically connected, the second conducting end of the switch tube S12, and the second lead of the switch tube S14 The lower end of the terminal and the capacitor C2 are grounded, and the first controller is respectively connected with the signal input end, the voltage monitor, the data output end of the current voltage detector, the control end of the switch tube S11, the control end of the switch tube S12, and the switch. The control end of the tube S13 is electrically connected to the control end of the switch tube S14, and the remaining structure Example 1.

After power-on, the voltage monitor monitors the voltage VCC at the output of the DC-DC converter. If the voltage VCC is within the preset range, the voltage monitor determines that the DC-DC converter is working normally, and the voltage monitor controls the switch S1 to close and switch. The tube S2 is disconnected, and the DC-DC converter converts the voltage output from the power source E into a required voltage output power supply, and the data output buffer normally transmits data, and transmits the input data signal.

If the voltage VCC is not within the preset range, the voltage monitor determines that the DC-DC converter has failed, the voltage monitor controls the switch S1 to open, and the DC-DC converter stops supplying power. At the same time, the voltage monitor sends a control signal to the data output buffer, and generates a corresponding duty cycle control signal PWM according to the monitored VDD point voltage value to the data output buffer, and also generates a corresponding S2 switch control signal. The data output buffer stops the data output after receiving the control signal, and the control switch tube S13 is constantly disconnected, and the switch tube S11, the switch tube S12, the switch tube S14, the switch tube S2, the inductor L, the capacitor C2, and the capacitor C1 form a synchronous rectification. Buck-Boost circuit with non-inverting output. The data output buffer controls the switch tube S11, the switch tube S12, and the switch tube S14 to be turned on and off according to the received PWM signal, and is connected to the voltage monitor control switch tube S2, as shown in FIG. The voltage monitor also sends an alarm signal to the external electronics.

Claims

A power supply device comprising a power supply E, a DC-DC converter (1), a data output buffer (2) and a voltage monitor (3), wherein:

Power supply E is used to power the DC-DC converter (1) and the data output buffer (2);

The DC-DC converter (1) is configured to convert a voltage output from the power source E to supply a load;

The voltage monitor (3) is for monitoring the output voltage of the DC-DC converter (1), and the voltage monitor (3) controls when the output voltage is detected to be higher than the upper limit value or lower than the lower limit value. The DC-DC converter (1) is disconnected from the load and monitors the voltage at the load terminal, controlling the output voltage of the data output buffer (2) to supply power to the load.
The power supply apparatus according to claim 1, characterized in that said data output buffer (2) comprises a first selector (12), a second selector (13) and a tri-state gate (14), the first selection The first input end, the second input end and the selection end of the device (12) are respectively electrically connected to the voltage monitor (3), and the output end of the first selector (12) and the enable end of the tri-state gate (14) are electrically connected. Connected, the first input of the second selector (13) is a signal input, the second input of the second selector (13) is electrically connected to the power supply E, and the selection and voltage monitoring of the second selector (13) The (3) is electrically connected, the output of the second selector (13) is electrically connected to the input of the tri-state gate (14), and the output of the tri-state gate (14) is a signal output.
The power supply apparatus according to claim 1, wherein said data output buffer (2) comprises a third selector (15), an inverter (16), a PMOS transistor (17), and a resistor (18). The first input end of the third selector (15) is a signal input end, and the second input end and the selection end of the third selector (15) are respectively electrically connected to the voltage monitor (3), and the third selector (15) The output end is electrically connected to the input end of the inverter (16), the output end of the inverter (16) is electrically connected to the gate of the PMOS transistor (17), and the drain of the PMOS transistor (17) is electrically connected to the power source E. The source of the PMOS transistor (17) is electrically connected to the first end of the resistor (18), the second end of the resistor (18) is grounded, and the first end of the resistor (18) is a signal output terminal.
A power supply device comprising a power source E, a DC-DC converter (1) and a capacitor C1, characterized by further comprising a data output buffer (2), a switch tube S1, a switch tube S2 and a voltage monitor (3), The negative pole of the power source E is grounded, and the anode of the power source E is electrically connected to the input end of the DC-DC converter (1) and the power terminal of the data output buffer (2), and the DC-DC converter (1) Output and electricity The first detecting end of the voltage monitor (3) is electrically connected to the first conducting end of the switch tube S1, the second conducting end of the switch tube S1 is connected to the second detecting end of the voltage monitor (3), and the switching tube S2 The first conduction end is electrically connected to the upper plate of the capacitor C1, the lower plate of the capacitor C1 is grounded, and the second conduction end of the switch tube S2 is electrically connected to the signal output end of the data output buffer (2), and the voltage monitor (3) Electrically connected to the data output buffer (2), the control terminal of the switch S1, and the control terminal of the switch S2, and the upper plate of the capacitor C1 is the positive output terminal of the power supply device.
The power supply device according to claim 4, characterized in that said data output buffer (2) comprises a signal input terminal (4), a signal output terminal (5), a first controller (6), a current voltage detector (7), the inductor L, the capacitor C2, the switch tube S11, the switch tube S12, the switch tube S13, the switch tube S14 and the switch tube S15, the first conduction end of the switch tube S11 and the first conduction end of the switch tube S13 Electrically connected to the power source E, the second conductive end of the switch tube S11 is electrically connected to the first conductive end of the switch tube S12, the first detecting end of the current voltage detector (7), and the first conductive end of the inductor L, The second conduction end of the switch tube S13 is connected to the first conduction end of the switch tube S14, the first conduction end of the switch tube S15, the second detection end of the current voltage detector (7), and the second conduction of the inductor L. The second conductive end of the switch S15 is electrically connected to the upper plate and the signal output end (5) of the capacitor C2, the second conductive end of the switch tube S12, and the second conductive end of the switch tube S14 and The lower plate of the capacitor C2 is grounded, and the first controller (6) is respectively connected with the signal input end (4), the voltage monitor (3), the current output of the current voltage detector (7), Off the end of the control tube S11, the control terminal of the switch S12, the control terminal of the switch S13, the switch control terminal and the control terminal of the switch S15 is connected to S14.
The power supply device according to claim 5, characterized in that said voltage monitor (3) comprises a reference voltage output module Ref, a comparator CMP1, a comparator CMP2, a comparator CMP3, an operational amplifier OA, a compensation capacitor CL, a ramp The transmitter ramp and the second controller, the non-inverting input of the comparator CMP1 and the inverting input of the comparator CMP2 are both electrically connected to the output of the DC-DC converter (1), and the inverting input of the comparator CMP1 is The first output end of the reference voltage output module Ref is electrically connected, the non-inverting input terminal of the comparator CMP2 is electrically connected to the second output end of the reference voltage output module Ref, and the non-inverting input terminal of the operational amplifier OA is electrically connected to the upper plate of the capacitor C1. The inverting input terminal of the operational amplifier OA is electrically connected to the third output end of the reference voltage output module Ref, and the output end of the operational amplifier OA is electrically connected to the end of the compensation capacitor CL and the inverting input terminal of the comparator CMP3, and the compensation capacitor CL is additionally One end is grounded, the non-inverting input of the comparator CMP3 is electrically connected to the ramp transmitter ramp, and the second controller (8) is respectively connected to the output of the comparator CMP1, the output of the comparator CMP2, the output of the comparator CMP3, and the switching transistor. The control end of S1 and the control end of switch S2 are electrically connected to the first controller (6).
A power supply unit according to claim 4 or 5 or 6, characterized in that it further comprises an alarm module (9), said alarm module (9) being electrically connected to the voltage monitor (3).
The power supply device according to claim 4 or 5 or 6, further comprising a third controller (10) and an AND circuit (11), the output of the third controller (10) and voltage monitoring The input of the device (3) is electrically connected to the first input of the AND circuit (11), and the second input of the AND circuit (11) is electrically connected to the output of the voltage monitor (3), The output of the AND circuit (11) is electrically coupled to the input of the first controller (6).
A power supply device, the power supply device according to any one of claims 4-7, comprising the steps of:

S1: The voltage monitor (3) monitors the voltage VCC at the output of the DC-DC converter (1). If the voltage VCC is greater than or equal to the lower limit value V1 and less than or equal to the upper limit value V2, the voltage monitor determines that the DC-DC converter is normal. Working, step S2, if the voltage VCC is less than the lower limit value V1 or greater than the upper limit value V2, the voltage monitor determines that the DC-DC converter has failed, step S3;

S2: The voltage monitor (3) controls the switch tube S1 to be closed, the switch tube S2 is disconnected, and the DC-DC converter (1) converts the voltage output from the power source E into a required voltage output power supply, and the data output buffer (2) is normal. Work, perform data transmission function, and send the input data signal;

S3: The voltage monitor (3) controls the switch tube S1 to be opened, the switch tube S2 is closed, the DC-DC converter (1) stops supplying power, and the voltage monitor sends a control signal and a PWM signal to the data output buffer (2), Sending an alarm signal to the external electronic device, the data output buffer stops the data output after receiving the control signal, and the data output buffer PWM-modulates the voltage input from the power source E according to the received PWM signal, and outputs the voltage to the upper plate of the capacitor C1. Power is supplied.
The operating method of a power supply device according to claim 9, wherein the data output buffer (2) comprises a signal input terminal (4), a signal output terminal (5), a first controller (6), and a current. The voltage detector (7), the inductor L, the capacitor C2, the switch tube S11, the switch tube S12, the switch tube S13, the switch tube S14 and the switch tube S15, the first conduction end of the switch tube S11 and the first guide of the switch tube S13 Pass The terminals are electrically connected to the power source E. The second conducting end of the switch tube S11 is electrically connected to the first conducting end of the switch tube S12, the first detecting end of the current voltage detector (7) and the first conducting end of the inductor L. Connecting, the second conduction end of the switch tube S13 and the first conduction end of the switch tube S14, the first conduction end of the switch tube S15, the second detection end of the current voltage detector (7), and the second inductor L The conduction end is electrically connected, and the second conduction end of the switch tube S15 is electrically connected to the upper plate and the signal output end (5) of the capacitor C2, and the second conduction end of the switch tube S12 and the second conduction end of the switch tube S14 are The lower plate of the terminal and the capacitor C2 are grounded, and the first controller (6) is respectively connected with the signal input terminal (4), the voltage monitor (3), the data output terminal of the current voltage detector (7), and the switch tube S11. The control terminal, the control terminal of the switch S12, the control terminal of the switch S13, the control terminal of the switch S14, and the control terminal of the switch S15 are electrically connected, and the data output buffer (2) performs a data transfer function including The following steps:

N1: The first controller (6) controls the switch S15 to be constantly conducting, the current voltage detector (7) detects the current in the inductor L and the output voltage VDout of the upper plate of the capacitor C2, and the first controller (6) reads The input signal Din, when the input signal Din jumps from a low level to a high level, step N2 is performed, when the input signal Din transitions from a high level to a low level, step N5 is performed;

N2: the first controller (6) controls the switch tube S11 to turn on the T1 time, and controls the switch tube S12, the switch tube S13, and the switch tube S14 to turn off the T1 time;

N3: At the end of the T1 time, the first controller (6) controls the switch tube S12 to turn on the T2 time, and controls the switch tube S11, the switch tube S13, and the switch tube S14 to turn off the T2 time;

N4: At the end of the T2 time, the first controller (6) controls the switch S13 to be turned on, the control switch tube S11, the switch tube S12, the switch tube S14 is turned off, and then jumps to step N1;

N5: the first controller (6) controls the switch tube S12 to be turned on, and the control switch tube S11, the switch tube S13, and the switch tube S14 are disconnected;

N6: When the output voltage VDout is reduced to 0, the first controller (6) controls the switch tube S11, the switch tube S14 is turned on for T5 time, and the control switch tube S12 and the switch tube S13 are turned off for T5 time;

N7: At the end of the T5 time, the first controller (6) controls the switch S14 to be turned on, the control switch tube S11, the switch tube S12, the switch tube S13 is turned off, and then jumps to step N1;

The first controller (6) modifies the T1 time length in real time, including the following steps: the first controller presets the initial value of the T1 time, and when the T2 time ends, if the output voltage VDout is less than the power supply E voltage VE increases the length of time T1; if the output voltage VDout is greater than the power supply E voltage VE, the length of time T1 is decreased.
The working method of the power supply device according to claim 10, wherein the length of the T2 is: the first controller (6) modifies the length of the T2 in real time, and includes the following steps: the first controller presets the initial value of the T2 time. When the T2 time ends, if the residual current in the inductor L is greater than 0, the length of time T2 is increased; if the residual current in the inductor L is less than 0, the length of time T2 is decreased; or the length of the T2 time is: when T1 At the end of the time, the T2 time begins, and when the current in the inductor L is equal to 0, the T2 time ends;

The length of the T5 is: the first controller modifies the length of the T5 in real time, and includes the following steps: the first controller presets the initial value of the T5 time. When the T5 time ends, if the residual current in the inductor L is less than 0, the T5 is increased. The length of time; if the residual current in the inductor L is greater than 0, then reduce the length of time T5; or the length of time T5 is: when the output voltage VDout decreases to 0, the T5 time begins, when the current in the inductor L is equal to 0, The T5 time is over.
A method of operating a power supply device, suitable for use in a power supply device according to claim 8, comprising the steps of:

H1: The voltage monitor (3) monitors the voltage VCC at the output of the DC-DC converter (1). If the voltage VCC is greater than or equal to the lower limit value V1 and less than or equal to the upper limit value V2, the voltage monitor determines that the DC-DC converter is working normally. Step S2, if the voltage VCC is less than the lower limit value V1 or greater than the upper limit value V2, the voltage monitor determines that the DC-DC converter has failed, step S3;

H2: The voltage monitor (3) controls the switch tube S1 to close and the switch tube S2 to open. The DC-DC converter (1) converts the voltage output from the power source E to the required voltage output power supply, and the voltage monitor outputs a low level to a second input terminal of the AND circuit (11), the AND circuit outputs a low level to the data output buffer (2), and the data output buffer performs a data transmission function to transmit the input data signal;

H3: The voltage monitor (3) controls the switch S1 to open, the switch S2 is closed, the DC-DC converter (1) stops supplying power, and the voltage monitor outputs a high level to the second input of the AND circuit (11). End, send PWM signal to the data output buffer (2), send an alarm signal to the external electronic device, send a control signal to the third controller (10), when the data is not required to be sent, the third controller outputs a high level to The first input of the AND circuit and the voltage monitor, the AND circuit outputs a high level to the data output buffer, The data output buffer stops the data output after receiving the high level control signal, and the data output buffer PWM modulates the voltage input from the power source E according to the received PWM signal, and outputs the power to the upper plate of the capacitor C1 for power supply; When transmitting data, the third controller outputs a low level to the first input end of the AND circuit and the voltage monitor, and after the voltage monitor receives the low level signal, the control switch S1 and the switch S2 are disconnected, and the AND circuit The output is low to the data output buffer, and the data output buffer stops the power supply after receiving the low level control signal, and re-executes the data transfer function.
A power supply device comprising a power source E, a DC-DC converter (1) and a capacitor C1, characterized by further comprising a data output buffer (2), a switch tube S1, a switch tube S2 and a voltage monitor (3), The negative pole of the power source E is grounded, and the anode of the power source E is electrically connected to the input end of the DC-DC converter (1) and the power terminal of the data output buffer (2), and the DC-DC converter (1) The output end is electrically connected to the first detecting end of the voltage monitor (3) and the first conducting end of the switch tube S1, and the second conducting end of the switch tube S1 and the second detecting end of the voltage monitor (3), The first conduction end of the switch tube S2 is electrically connected to the upper plate of the capacitor C1, the lower plate of the capacitor C1 is grounded, and the second conduction end of the switch tube S2 is electrically connected to the signal output end of the data output buffer (2). The voltage monitor (3) is electrically connected to the data output buffer (2), the control end of the switch S1, and the control end of the switch S2, and the upper plate of the capacitor C1 is the positive output end of the power supply device. The data output buffer (2) includes a signal input terminal (4), a signal output terminal (5), a first controller (6), a current voltage detector (7), an inductor L, and a capacitor C2. The switch S11, the switch tube S12, the switch tube S13 and the switch tube S14, the first conduction end of the switch tube S11 and the first conduction end of the switch tube S13 are electrically connected to the power source E, and the second conduction of the switch tube S11 The end is electrically connected to the first conduction end of the switch tube S12, the first detection end of the current voltage detector (7) and the first conduction end of the inductor L, and the second conduction end of the switch tube S13 and the switch tube S14 The first conducting end, the second detecting end of the current-voltage detector (7), the second conducting end of the inductor L, the upper plate of the capacitor C2 and the signal output end (5) are electrically connected, and the second end of the switch tube S12 The conduction end, the second conduction end of the switch tube S14 and the lower plate of the capacitor C2 are grounded, and the first controller (6) is respectively connected with the signal input end (4), the voltage monitor (3), the current voltage detector The data output end of (7), the control end of the switch tube S11, the control end of the switch tube S12, the control end of the switch tube S13, and the control end of the switch tube S14 are electrically connected.