CN101751599B - Circuit for improving test speed of contact type intelligent card chip - Google Patents

Circuit for improving test speed of contact type intelligent card chip Download PDF

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CN101751599B
CN101751599B CN2008102279907A CN200810227990A CN101751599B CN 101751599 B CN101751599 B CN 101751599B CN 2008102279907 A CN2008102279907 A CN 2008102279907A CN 200810227990 A CN200810227990 A CN 200810227990A CN 101751599 B CN101751599 B CN 101751599B
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test
way
output
ternary
pad
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CN101751599A (en
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郑晓光
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Beijing CEC Huada Electronic Design Co Ltd
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Beijing CEC Huada Electronic Design Co Ltd
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Abstract

When a contact type intelligent card is communicated with the outside, pins for data transmission generally use open-drain PAD. The low level of the output of the open-drain PAD is converted to high level by an upward-pulling resistor, so the raising time of the level is longer and the output transmission speed is not high. In the test circuit design of the contact type intelligent card chip, the data transmission pins for communication are generally multiplexed by the output of the test result. However, the test time is lengthened and the cost is increased due to the influence of open-drain output on the transmission speed. The invention provides a circuit for improving the test speed of the contact type intelligent card chip, and thereby ensuring that the data transmission pins work in a strong drive state under the test mode and effectively improve the test speed.

Description

A kind of circuit that improves test speed of contact type intelligent card chip
Technical field
The present invention is mainly used in the design and the field tests of contact type smart card chip.In chip design, add special circuit, improve the speed of data output under the test pattern, can effectively shorten the time of utilizing ATE that chip is tested, reduce testing cost, promote tested productivity.The present invention is fit to all and uses the intelligent card chip of ISO/IEC 7816 standards as the contact communication interface.Simultaneously, the present invention is also applicable to test pin and operate as normal pin multiplexing, and needs during operate as normal pin to realize opening in the chip design of characteristic Lou.
Background technology
In modern society, contact intelligent card has been widely used in every field such as traffic administration, social security, telecommunications, automobile fuel filler paying.Contact type smart card chip is the chief component of contact intelligent card.The production run of contact intelligent card comprises steps such as processing and manufacturing, silicon test, encapsulation, fabrication, the test of one-tenth card.Silicon test is to guarantee the requisite important step of product quality.
Silicon test is because will use accurate expensive ATE, and the expense of test is the factor that will consider.The silicon test expense was directly proportional with the time of test, and simultaneously, because the ATE resource-constrained, the test duration also has influence on the production capacity of test.
In contact intelligent card, the communication standard of at present main flow is ISO/IEC 7816.This communication standard has defined clock, has resetted, bi-directional data, power supply,, and other 3 keep pins, totally 8 contact points are a kind of asynchronous half-duplex communication interface standards.Stipulate in ISO/IEC 7816 standards, carry out data interaction through a bidirectional data line between contact card reader and the card.Can only have a side to be in transmit status at most between card reader and the card, when a side was transmit status, the opposing party was an accepting state.When both sides are accepting state, should keep high level on the data line.Under the T=0 communication pattern, when a side is transmit status, during safeguard bit, make mistakes if the opposing party detects PB, need data line be dragged down, the notice transmit leg resends.So card reader and the data line of card need to be connected with the mode of " line with ".The output high level should be " weak 1 ", when either party is output as when low, can move data line to low level.
As shown in Figure 1, " line with " function of opening Lou that PAD can well realize.When data outputs (dout) are 0, metal-oxide-semiconductor conducting, PAD output low level.When data were output as 1, metal-oxide-semiconductor ended, and PAD is moved to high level on the pull-up resistor (resistance).PAD has individual problem but open Lou, when data output (dout) when low level changes to high level, lean on pull-up resistor fully.Keep low level noise margin simultaneously in order to improve level rising speed; The value of pull-up resistor generally is advisable with 10k ohm to 25k ohm; So big resistance causes pull-up current very little, opens that Lou PAD is longer from the time that low level is raised to high level, wants hundreds of nanosecond usually.Stipulate in the ISO/IEC7816 standard that under 30pF capacitive load condition, bi-directional data PAD rise time maximum can not surpass lus.Open Lou that PAD can satisfy this condition, so in the design of general intelligence the core of the card sheet, the bi-directional data pin of ISO/IEC 7816 all uses out and leaks PAD.
Opening Lou, PAD can satisfy the needs that ISO/IEC 7816 communicates by letter; But the highest speed of having only hundreds of Kbps is compared with the power of test of the tens000000 even tens megahertz signals that ATE can provide; Wasted the ability of ATE resource, testing efficiency is very low.
Summary of the invention
Content of the present invention has been to realize a kind of circuit that can improve test speed of contact type intelligent card chip.
Contact intelligent card is during with extraneous communication, because ISO/IEC 7816 standards, makes card and bidirectional data transfers pin between the card reader need the mode of usefulness " line with " to be connected.So pins for data transmission is used usually and is opened Lou PAD.Open the Lou conversion of output from the low level to the high level of PAD and accomplished by pull-up resistor, cause the level rising time longer, output transmission rate is not high, the highest baud rate of having only hundreds of Kbps.
In the test circuit design of contact type smart card chip, in order to reduce pin, test result is exported the data transmission pin that common multiplexed communications is used.Automatic test machine generally can both provide the signal of tens000000 even tens megahertzes, and is higher tens times than the speed of opening PAD Lou.Simultaneously, test circuit is owing to all be to be defined voluntarily by the chip designer, and the requirement of " line with " can not arranged the data output pin in the test sequence.Being the very strong power of test of automatic test machine on the one hand, is the PAD at a slow speed that adopts for the requirement of satisfying communications applications on the one hand, only owing to open Lou output to the influence of transfer rate, makes the time lengthening of test, increases cost, and has influenced the production capacity of test.
Open Lou PAD and rise to high level from low level and driven by pull-up resistor, because pull-up current is little, the time of level rising is longer.And the conversion between the high-low level of ternary two-way PAD output all is by the firing current driving of metal-oxide-semiconductor, and driving force is strong, and the time of level conversion is also short, and operating rate can reach more than tens000000.The circuit structure that the present invention proposes does not use traditional Lou PAD that opens, and has been to use ternary two-way PAD, substitutes with ternary two-way PAD and opens Lou PAD, can solve the slow shortcoming of PAD operating rate.Realize the isolation of test and two patterns of proper communication simultaneously, under two kinds of patterns, on same PAD, realize ternary and " line with " two specific characters respectively.Control signal through test circuit produces under normal communication mode, as opening leakage characteristic, satisfies the requirement of ISO/IEC 7816 communications with the two-way PAD of three-state.Under test pattern, as three step responses, low level and high level are all used the strong output that drives with the two-way PAD of three-state, and low level can rise to high level very soon.
Description of drawings
Fig. 1 opens Lou PAD synoptic diagram
The circuit of Fig. 2 raising chip testing disclosed by the invention speed
Data path under Fig. 3 communication pattern
Data path under Fig. 4 test pattern
Embodiment
Describe below in conjunction with the accompanying drawing specific embodiments of the invention.
As shown in Figure 2, selected for use ternary two-way PAD (1) as the data transmission pin in the disclosed circuit of the present invention.Ternary two-way PAD is made up of triple gate (6) and pull-up resistor (7) two parts, has designed (3) two selector switchs of selector switch (2) and selector switch in the circuit.Each selector switch has the two-way input, respectively from test circuit module (4) and ISO/IEC7816 module (5).The test_mode signal of the test circuit module of chip internal (4) output, as the control end of two selector switchs, control selects a road in the two-way input as output.
When chip was in normal communication mode, the test_mode signal was 0, and at this moment, the input end of ternary two-way PAD (in) is 0, the data (7816_dout) of output control terminal (control) for exporting.The data path of chip internal is as shown in Figure 3.When 7816_dout was 0, the triple gate (6) in the PAD was in opening, and 0 of input end is outputed to chip exterior.When 7816_dout was 1, the triple gate (6) in the PAD was in cut-off state, and output terminal is by moving high level on the pull-up resistor (7).At this moment, if the card reader output low level can be moved this pin to low level, realized the requirement of communication protocol to bi-directional data signal " line with ".
When chip was in test pattern, the test_mode signal was 1, at this moment, the test data (test_dout) of the input end of ternary two-way PAD (in) for exporting, output control terminal (control) is test data output enable (test_out_en).The data path of chip internal is as shown in Figure 4.Effective when test_out_en is 0, expression output, the triple gate (6) in the PAD is in opening, and test_dout is outputed to chip exterior.At this moment, no matter the test_dout level is from low to high or from high to low, all is that the firing current by metal-oxide-semiconductor drives, and driving force is very strong, and the speed of data output is fast.Invalid when test_out_en is 1, expression does not need output, and the triple gate (6) in the PAD is in cut-off state, and output terminal perhaps drives the input pin as test vector by ATE by moving high level on the pull-up resistor (7).
The circuit structure that the present invention proposes is on the basis of satisfying the application of ISO/IEC 7816 communication protocols; Effectively realized the test pattern of chip and the isolation of normal communication mode, under test pattern, effectively improved chip testing speed, the speed of data output is significantly promoted; Shortened the test duration; Improve the utilization factor of test machine, effectively reduced testing cost, promoted tested productivity.Through control signal, communications applications pattern and test pattern to be isolated, two kinds of patterns use different PAD characteristics, have solved both have demands of different to " line with " and speed contradiction.

Claims (1)

1. circuit that improves test speed of contact type intelligent card chip; The data pins that it is characterized in that intelligent card chip is used ternary two-way PAD; The ternary two-way PAD (1) that selects the band pull-up resistor for use is as the data transmission pin, and ternary two-way PAD is made up of triple gate (6) and pull-up resistor (7) two parts, and two selector switchs have the two-way input; Respectively from test circuit module (4) and ISO/IEC 7816 modules (5); The test_mode signal of the test circuit module of chip internal (4) output, as the control end of two selector switchs, control selects a road in the two-way input as output; Do gating control with test mode signal, contact type smart card chip is in proper communication and test under two kinds of patterns the input that the input end of ternary two-way PAD is different with the output control terminal gating; When test mode signal is 0; The normal communication mode of expression intelligent card chip, at this moment, the input end of ternary two-way PAD is 0; The data of output control terminal for exporting, ternary two-way PAD shows as the two-way characteristic of opening leakage; When test mode signal is 1, the test pattern of expression intelligent card chip, at this moment; The data of the input end of ternary two-way PAD for exporting; Output control terminal is the test data output enable, and ternary two-way PAD shows as the two-way three-state characteristic, and low level rises to high level very soon.
CN2008102279907A 2008-12-04 2008-12-04 Circuit for improving test speed of contact type intelligent card chip Active CN101751599B (en)

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Publication number Priority date Publication date Assignee Title
CN103376400B (en) * 2012-04-27 2016-08-03 华为技术有限公司 Chip detecting method and chip
CN104836328B (en) * 2014-11-26 2017-04-26 杭州硅星科技有限公司 Power supply device and working method thereof

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1536486A (en) * 2003-04-04 2004-10-13 上海华园微电子技术有限公司 Intelligent card chip with microprocessor capable of making automatic test
CN101174310A (en) * 2006-11-03 2008-05-07 北京中电华大电子设计有限责任公司 Smart card chip testing method and circuits

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1536486A (en) * 2003-04-04 2004-10-13 上海华园微电子技术有限公司 Intelligent card chip with microprocessor capable of making automatic test
CN101174310A (en) * 2006-11-03 2008-05-07 北京中电华大电子设计有限责任公司 Smart card chip testing method and circuits

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Address after: 102209 Beijing, Beiqijia, the future of science and technology in the south area of China electronic network security and information technology industry base C building,

Patentee after: Beijing CEC Huada Electronic Design Co., Ltd.

Address before: 100102 Beijing City, Chaoyang District Lize two Road No. 2, Wangjing science and Technology Park A block five layer

Patentee before: Beijing CEC Huada Electronic Design Co., Ltd.