WO2016058369A1 - Method for manufacturing nitride light emitting diode - Google Patents

Method for manufacturing nitride light emitting diode Download PDF

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WO2016058369A1
WO2016058369A1 PCT/CN2015/078638 CN2015078638W WO2016058369A1 WO 2016058369 A1 WO2016058369 A1 WO 2016058369A1 CN 2015078638 W CN2015078638 W CN 2015078638W WO 2016058369 A1 WO2016058369 A1 WO 2016058369A1
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layer
light emitting
emitting diode
nitride
material layer
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PCT/CN2015/078638
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French (fr)
Chinese (zh)
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谢翔麟
徐志波
李政鸿
林兓兓
卓昌正
张家宏
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厦门市三安光电科技有限公司
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Publication of WO2016058369A1 publication Critical patent/WO2016058369A1/en
Priority to US15/401,091 priority Critical patent/US10263139B2/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds

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  • the invention relates to a method for preparing a light emitting diode, and belongs to the technical field of light emitting diode manufacturing.
  • PVD Physical Vapor Deposition
  • a material source a solid or liquid surface
  • a gaseous atom a molecule or a partially ionized ion under vacuum
  • a low pressure gas or plasma
  • Physical vapor deposition methods mainly include: vacuum evaporation, sputter coating, arc plasma plating, ion plating, and molecular beam epitaxy; it can deposit not only metal films, alloy films, but also compounds, ceramics, semiconductors, polymers.
  • Membrane and the like the technology has simple process, little environmental pollution, less consumption of raw materials, uniform film formation and strong adhesion to the substrate.
  • the patterned substrate technique performs epitaxial growth of the LED material on the surface of the patterned substrate by fabricating a pattern having a fine structure on the surface of the planar substrate.
  • the patterned interface changes the growth process of the GaN material, inhibits the extension of the defect to the epitaxial surface, and improves the quantum efficiency of the device.
  • the roughened GaN/substrate interface can scatter the photons emitted from the active region, so that the original emission is completely The photon has the opportunity to exit to the outside of the device, effectively improving light extraction efficiency.
  • the depth of the pattern on the surface of the patterned substrate is required to be less than 2 ⁇ m.
  • the MOCVD method cannot obtain a good quality epitaxial film layer; in addition, due to the uneven surface characteristics of the patterned substrate, it is necessary to laminate a thick buffer layer between the n-type layer and the substrate in the LED structure to grow the n-type layer. The surface of the previous epitaxial layer reaches the required gentle structure, which facilitates the lamination of the subsequent epitaxial layers.
  • the thicker underlying structure generates a large stress, which causes the growth of the completed LED structure to be warped, which is not conducive to the implementation of subsequent processes (for example, follow-up).
  • the phenomenon of cracking occurs in the process), and the electrical properties of the individual LED structures are significantly different, which affects the growth yield; and the doping concentration of the active layer is also limited by the influence of the underlying quality, and the higher doping level cannot be obtained. This limits the further improvement of voltage isoelectricity.
  • the present invention provides a method for preparing a nitride semiconductor, which uses a PVD method to deposit an AlN thin film layer on a patterned substrate having a larger depth, and a thin nitride epitaxial layer deposited on the AlN thin film layer by a CVD method.
  • Step 1 providing a substrate and placing it in a physical vapor deposition (PVD) chamber;
  • PVD physical vapor deposition
  • Step two depositing an AlN material layer on the surface of the substrate by using a PVD method
  • Step 3 taking out the substrate on which the AlN material layer is deposited, placing it in a carrier and introducing it into a chemical vapor deposition (CVD) chamber;
  • CVD chemical vapor deposition
  • Step 4 depositing a nitride material layer on the surface of the AlN material layer by a CVD method
  • Step 5 depositing an active layer having a high concentration of doping on the surface of the nitride material layer, the doping concentration of which is sufficient to improve the voltage characteristics of the light emitting diode;
  • Step 6 depositing a p-type layer on the surface of the high concentration doped active layer.
  • the deposition methods of the third step to the sixth step are all metal organic chemical vapor deposition (MOCVD).
  • the substrate is a patterned substrate having a vertical height of 2 to 20 microns.
  • the pattern in the substrate is dry etch or wet etch or a combination of the foregoing.
  • the nitride material layer is formed by combining a non-doped gallium nitride material layer and an n-type gallium nitride material layer.
  • the nitride material layer is formed by combining a low temperature gallium nitride layer, a high temperature undoped gallium nitride layer and an n-type gallium nitride material layer.
  • the low temperature gallium nitride layer has a growth temperature of 200 to 900 °C.
  • the layer of the nitride material in the step 4 ranges from 1.0 to 3.5 microns.
  • the nitride epitaxial layer has an overall epitaxial layer thickness of less than or equal to 4 micrometers.
  • the highly doped active layer deposited in the step 6 is doped with an n-type impurity, and the doping concentration is greater than 6 ⁇ 10 18 /cm 3 .
  • the chamber temperature in the second step is 350 to 550 °C.
  • the chamber pressure in the second step is 2 to 10 mtorr.
  • the thickness of the AlN material layer deposited in the second step is 5 to 350 angstroms.
  • the present invention deposits a surface-flattened AlN thin film layer on a patterned substrate having a larger depth by using a PVD method, and deposits a thinner nitride epitaxial layer structure on the AlN thin film layer by a CVD method.
  • the active layer is doped with a high concentration of n-type impurities; the large-depth patterned substrate is used to improve the light extraction efficiency, and at the same time, by reducing the small stress of the epitaxial layer, the warpage plating of the epitaxial wafer is improved, thereby improving the single piece.
  • the electrical uniformity of the epitaxial wafer; and the high-concentration doping of the active layer improves the voltage electrical properties of the LED structure, thereby improving the overall yield of the LED chip.
  • FIG. 1 is a flow chart of a method for preparing a nitride light emitting diode according to the present invention.
  • FIG. 2 is a schematic structural view of a light emitting diode according to Embodiment 1 of the present invention.
  • FIG. 3 is a schematic structural view of a light emitting diode according to Embodiment 2 of the present invention.
  • FIG. 4 is a schematic structural view of a light emitting diode according to Embodiment 3 of the present invention.
  • substrate 2. AlN material layer; 3. nitride material layer; 30. low temperature gallium nitride layer; 31. non-doped gallium nitride material layer; 32. n-type gallium nitride material layer; 4. Highly doped active layer; 5. p-type layer.
  • a substrate 1 is provided, which is a flat substrate or a patterned substrate made of sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide, etc., in a patterned substrate.
  • the vertical height of the pattern ranges from 2 to 20 microns.
  • the pattern can be formed by dry etching or by wet etching.
  • the large depth substrate 1 is placed in the PVD chamber to adjust the chamber temperature to 350-550 ° C.
  • an AlN material layer 2 having a flat surface and a thickness of 5 to 350 angstroms is deposited on the surface of the substrate 1 by the PVD method; the pattern depth of the patterned substrate is higher than that of the conventional substrate due to the film formation property of the PVD method.
  • the AlN material layer 2 can still maintain the surface flatness and the film quality is better; then the substrate deposited with the AlN material layer 2 is taken out, and then placed in the carrier and introduced into the chemical vapor deposition (CVD) chamber, adjusting the chamber temperature to 400 to 1150 ° C, depositing a nitride material layer 3 on the surface of the AlN material layer 2 by CVD; and depositing a high concentration doped active layer 4 and p on the nitride material layer 3
  • the layer 5, the high concentration doping active layer 4 is doped with an n-type impurity, and the doping concentration is greater than 6 ⁇ 10 18 /cm 3
  • the doping concentration is sufficient to improve the voltage characteristics of the light emitting diode; wherein the deposition mode of the nitride material layer 3 to the p type layer 5 is preferably metal organic chemical vapor deposition (MOCVD).
  • MOCVD metal organic chemical vapor deposition
  • the light emitting diode of the structure is plated with AlN by the PVD method.
  • the material layer has better crystal quality and less influence on the quality of the subsequently deposited material layer. Therefore, the subsequent active layer can be doped with high concentration impurities without significantly reducing the crystal quality, thereby avoiding the increase of leakage current and other electrical deterioration.
  • the phenomenon, and the high concentration doped active layer structure can effectively reduce the voltage of the light emitting diode, thereby improving the chip yield of the light emitting diode.
  • the substrate 1 is provided as a flat substrate or a patterned substrate, which may be made of sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide; when a patterned substrate is selected, The vertical height of the pattern ranges from 2 to 20 microns, and the pattern is formed by dry etching or wet etching; the large depth substrate 1 is placed in the PVD chamber, the chamber temperature is adjusted to 350-550 ° C, and the pressure is 2 ⁇ 10mtorr, using the PVD method to deposit a layer of AlN material with a flat surface and a thickness of 5 to 350 angstroms on the surface of the substrate 1; due to the film forming property of the PVD method, when the pattern depth of the substrate used is higher than that of the conventional patterned substrate The AlN material layer 2 can still maintain the surface flatness and the film quality is better; then the substrate on which the AlN material layer 2 is deposited is taken out, and then placed in the carrier and introduced into the chemical vapor
  • the chamber temperature is 900 to 1150 ° C
  • a nitride material layer 3 is deposited on the surface of the AlN material layer 2 by a CVD method, the layer being composed of a high temperature undoped gallium nitride material layer 31 and an n-type gallium nitride material.
  • Layer 32 is formed in combination, wherein the undoped gallium nitride material layer 31 has a thickness ranging from 0 to 1.5 microns; n-type nitridation The material layer 32 has a thickness of 1.0 to 3.0 ⁇ m; and the nitride material layer 3 has a thickness of 1.0 to 3.5 ⁇ m; finally, the doped active layer 4 and the p-type layer 5 are deposited on the nitride material layer 3, and the active layer 4 is doped.
  • the deposition mode of the nitride material layer 3 to the p type layer 5 is preferably metal organic chemical vapor deposition (MOCVD);
  • MOCVD metal organic chemical vapor deposition
  • the overall epitaxial layer thickness of the light emitting diode is less than or equal to 4 micrometers; Because the bottom layer and the overall thickness of the light-emitting diode are thin, the lattice stress is reduced, thereby reducing the warpage of the epitaxial wafer, so that the growth conditions of each point of the single-piece epitaxial wafer are uniform, and the electrical properties of the points are uniform. Moreover, the probability of occurrence of fragmentation in the subsequent process is reduced; at the same time, the structure uses a large substrate depth, which effectively improves the light extraction efficiency, thereby improving the growth yield of the light emitting diode.
  • MOCVD metal organic chemical vapor deposition
  • the embodiment is optimized on the basis of Embodiment 2, that is, when the substrate on which the AlN material layer 2 is deposited is taken out and placed in a chemical vapor deposition (CVD) chamber, the adjustment is performed.
  • the chamber temperature is 200-900 ° C
  • the low-temperature gallium nitride layer 30 is deposited on the surface of the AlN material layer 2 by a CVD method to a thickness of 5 ⁇ to 1500 ⁇ , and then the chamber temperature is raised to 900 ° C or higher to deposit a high temperature non-doped nitrogen.
  • the gallium layer 31 is deposited, and then the n-type gallium nitride layer 32 is deposited, and finally the chamber temperature is further adjusted to continue to deposit the doped active layer 4 and the p-type layer 5.
  • a low-temperature gallium nitride layer 30 is first deposited on the AlN material layer, and then the low-temperature gallium nitride layer 30 is subjected to a high-temperature annealing treatment to accelerate the low-temperature nitridation before the high-temperature undoped gallium nitride layer is deposited.
  • the gallium layer 30 forms an "island structure" to realize a "nucleation" process.
  • the layer Since the layer is low-temperature growth, its partial crystal characteristics are similar to those of the AlN material layer 2, and some material properties are close to the subsequent nitride material layer 3, so It can well connect the AlN material layer and the high temperature gallium nitride material layer, buffering and reducing the lattice stress between the AlN material layer 2 and the nitride material layer 3, thereby improving the lattice quality of the subsequent epitaxial layer.

Abstract

A method for manufacturing a nitride light emitting diode. A PVD method is used to deposit an AlN film layer (2) on a patterned substrate (1) having a larger depth; a CVD method is used to deposit a nitride epitaxial layer (3) having a small thickness on the AlN film layer; and a doped active layer (4) and a p-type layer (5) are formed on the nitride epitaxial layer. The thickness of an epitaxial layer is decreased to reduce stress so as to improve warping of an epitaxial wafer, and then improve electrical property uniformity of a single epitaxial wafer; a patterned substrate having a large depth is used to improve light extraction efficiency; and a high-concentration impurity is doped in an active layer, so that voltage characteristics can be effectively reduced without affecting current leakage, so as to improve overall yield of the light emitting diode.

Description

氮化物发光二极管制备方法Nitride light emitting diode preparation method
本申请要求于2014年10月16日提交中国专利局、申请号为201410549383.8、发明名称为“一种氮化物发光二极管制备方法”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。The present application claims priority to Chinese Patent Application No. 201410549383.8, the entire disclosure of which is hereby incorporated herein in in.
技术领域Technical field
本发明涉及一种发光二极管制备方法，属于发光二极管制造技术领域。The invention relates to a method for preparing a light emitting diode, and belongs to the technical field of light emitting diode manufacturing.
背景技术Background technique
物理气相沉积(Physical Vapor Deposition，PVD)技术是指在真空条件下，采用物理方法，将材料源——固体或液体表面气化成气态原子、分子或部分电离成离子，并通过低压气体(或等离子体)过程，在基体表面沉积具有某种特殊功能的薄膜的技术。物理气相沉积方法主要包括：真空蒸镀、溅射镀膜、电弧等离子体镀、离子镀膜，及分子束外延等；其不仅可以沉积金属膜、合金膜、还可以沉积化合物、陶瓷、半导体、聚合物膜等；该技术工艺过程简单，对环境污染小，原材消耗少，且成膜均匀致密，与基板的结合力强。Physical Vapor Deposition (PVD) technology refers to the physical method of vaporizing a material source, a solid or liquid surface, into a gaseous atom, a molecule or a partially ionized ion under vacuum, and passing a low pressure gas (or plasma). The process of depositing a film with a special function on the surface of a substrate. Physical vapor deposition methods mainly include: vacuum evaporation, sputter coating, arc plasma plating, ion plating, and molecular beam epitaxy; it can deposit not only metal films, alloy films, but also compounds, ceramics, semiconductors, polymers. Membrane and the like; the technology has simple process, little environmental pollution, less consumption of raw materials, uniform film formation and strong adhesion to the substrate.
图形化衬底技术通过在平面衬底表面制作具有细微结构的图形，然后再在这种图形化衬底表面进行外延生长LED材料。图形化的界面改变了GaN材料的生长过程，能抑制缺陷向外延表面延伸，提高器件内量子效率；同时，粗糙化的GaN/衬底界面能散射从有源区发射的光子，使原本全发射的光子有机会出射到器件外部，有效提高光提取效率。The patterned substrate technique performs epitaxial growth of the LED material on the surface of the patterned substrate by fabricating a pattern having a fine structure on the surface of the planar substrate. The patterned interface changes the growth process of the GaN material, inhibits the extension of the defect to the epitaxial surface, and improves the quantum efficiency of the device. At the same time, the roughened GaN/substrate interface can scatter the photons emitted from the active region, so that the original emission is completely The photon has the opportunity to exit to the outside of the device, effectively improving light extraction efficiency.
但目前常规的利用金属有机化学气相沉积法(MOCVD法)在图形化衬底表面外延生长LED材料时，对于图形化衬底表面的图形深度要求其小于2微米，当深度值大于此值时，MOCVD法无法得到质量良好的外延薄膜层；此外，因图形化衬底凹凸不平的表面特点，故而在LED结构中需在n型层与衬底之间层叠较厚缓冲层，使n型层生长之前的外延层表面达到需要的平缓结构，利于后续外延层的层叠，然而较厚的底层结构产生较大应力，造成生长完成的LED结构翘曲偏大，从而不利于后续制程的实施(例如后续制程中出现裂片现象)，且造成单片LED结构中各处电性能差异明显，影响生长良率；且因底层质量影响，致使活性层掺杂浓度亦受其局限，无法得到较高掺杂水平，从而局限了电压等电性的进一步改善。 However, when conventionally using metal organic chemical vapor deposition (MOCVD) to epitaxially grow LED materials on the surface of a patterned substrate, the depth of the pattern on the surface of the patterned substrate is required to be less than 2 μm. When the depth value is greater than this value, The MOCVD method cannot obtain a good quality epitaxial film layer; in addition, due to the uneven surface characteristics of the patterned substrate, it is necessary to laminate a thick buffer layer between the n-type layer and the substrate in the LED structure to grow the n-type layer. The surface of the previous epitaxial layer reaches the required gentle structure, which facilitates the lamination of the subsequent epitaxial layers. However, the thicker underlying structure generates a large stress, which causes the growth of the completed LED structure to be warped, which is not conducive to the implementation of subsequent processes (for example, follow-up). The phenomenon of cracking occurs in the process), and the electrical properties of the individual LED structures are significantly different, which affects the growth yield; and the doping concentration of the active layer is also limited by the influence of the underlying quality, and the higher doping level cannot be obtained. This limits the further improvement of voltage isoelectricity.
发明内容Summary of the invention
针对上述问题，本发明提出了一种氮化物半导体制备方法，采用PVD法在更大深度的图形化衬底上沉积AlN薄膜层，在AlN薄膜层上利用CVD法沉积厚度较薄氮化物外延层，通过减薄外延层减小应力，改善外延片的翘曲度，进而改善单片外延片的电性均匀性；同时利用较大深度图形化衬底改善取光效率；且在活性层中掺入高浓度杂质，在不影响漏电的状况下可有效降低电压特性，进而改善发光二极管的整体良率。In view of the above problems, the present invention provides a method for preparing a nitride semiconductor, which uses a PVD method to deposit an AlN thin film layer on a patterned substrate having a larger depth, and a thin nitride epitaxial layer deposited on the AlN thin film layer by a CVD method. By reducing the stress by thinning the epitaxial layer, improving the warpage of the epitaxial wafer, thereby improving the electrical uniformity of the single epitaxial wafer; and simultaneously improving the light extraction efficiency by using a large depth patterned substrate; and doping in the active layer The high concentration of impurities can effectively reduce the voltage characteristics without affecting the leakage, thereby improving the overall yield of the LED.
本发明解决上述问题的具体技术方案为：一种氮化物发光二极管制备方法，包括如下步骤：The specific technical solution to solve the above problem is: a method for preparing a nitride light emitting diode, comprising the following steps:
步骤一：提供一衬底，将其放入物理气相沉积(PVD)腔室；Step 1: providing a substrate and placing it in a physical vapor deposition (PVD) chamber;
步骤二：利用PVD法在所述衬底表面沉积AlN材料层；Step two: depositing an AlN material layer on the surface of the substrate by using a PVD method;
步骤三：将沉积有所述AlN材料层的衬底取出，再将其放入载盘内并传入化学气相沉积(CVD)腔室；Step 3: taking out the substrate on which the AlN material layer is deposited, placing it in a carrier and introducing it into a chemical vapor deposition (CVD) chamber;
步骤四：在所述AlN材料层表面利用CVD法沉积氮化物材料层；Step 4: depositing a nitride material layer on the surface of the AlN material layer by a CVD method;
步骤五：在所述氮化物材料层表面沉积具有高浓度掺杂的活性层，其掺杂浓度足以改善发光二极管的电压特性；Step 5: depositing an active layer having a high concentration of doping on the surface of the nitride material layer, the doping concentration of which is sufficient to improve the voltage characteristics of the light emitting diode;
步骤六：在所述高浓度掺杂活性层表面沉积p型层。Step 6: depositing a p-type layer on the surface of the high concentration doped active layer.
优选的，所述步骤三至步骤六的沉积方式均为金属有机化学气相沉积法(MOCVD)。Preferably, the deposition methods of the third step to the sixth step are all metal organic chemical vapor deposition (MOCVD).
优选的，所述衬底为图形化衬底，图形垂直高度为2～20微米。Preferably, the substrate is a patterned substrate having a vertical height of 2 to 20 microns.
优选的，所述衬底中图形为干法蚀刻或湿法蚀刻或前述组合制备。Preferably, the pattern in the substrate is dry etch or wet etch or a combination of the foregoing.
优选的，所述步骤四中氮化物材料层为非参杂氮化镓材料层与n型氮化镓材料层组合形成。Preferably, in the fourth step, the nitride material layer is formed by combining a non-doped gallium nitride material layer and an n-type gallium nitride material layer.
优选的，所述步骤四中氮化物材料层为低温氮化镓层、高温非掺杂氮化镓层与n型氮化镓材料层组合形成。Preferably, in the fourth step, the nitride material layer is formed by combining a low temperature gallium nitride layer, a high temperature undoped gallium nitride layer and an n-type gallium nitride material layer.
优选的，所述低温氮化镓层的生长温度为200～900℃。 Preferably, the low temperature gallium nitride layer has a growth temperature of 200 to 900 °C.
优选的，所述步骤四中氮化物材料层范围为1.0～3.5微米。Preferably, the layer of the nitride material in the step 4 ranges from 1.0 to 3.5 microns.
优选的，所述氮化物发光二极管的整体外延层厚度小于或等于4微米。Preferably, the nitride epitaxial layer has an overall epitaxial layer thickness of less than or equal to 4 micrometers.
优选的，所述步骤六中沉积的高掺杂活性层掺杂有n型杂质，掺杂浓度大于6×1018/cm3。Preferably, the highly doped active layer deposited in the step 6 is doped with an n-type impurity, and the doping concentration is greater than 6×10 18 /cm 3 .
优选的，所述步骤二中腔室温度为350～550℃。Preferably, the chamber temperature in the second step is 350 to 550 °C.
优选的，所述步骤二中腔室压力为2～10mtorr。Preferably, the chamber pressure in the second step is 2 to 10 mtorr.
优选的，所述步骤二中沉积的AlN材料层厚度为5～350埃。Preferably, the thickness of the AlN material layer deposited in the second step is 5 to 350 angstroms.
本发明至少具有以下有益效果：本发明通过使用PVD法在较大深度的图形化衬底上沉积表面平整的AlN薄膜层，在此AlN薄膜层上利用CVD法沉积厚度较薄氮化物外延层结构，且此结构中活性层掺杂有高浓度n型杂质；利用大深度图形化衬底改善取光效率，同时通过减薄外延层较小应力，改善外延片的翘曲镀，进而改善单片外延片的电性均匀性；且通过高浓度掺杂活性层，改善LED结构的电压电性，进而改善LED芯片的整体良率。The present invention has at least the following advantageous effects: the present invention deposits a surface-flattened AlN thin film layer on a patterned substrate having a larger depth by using a PVD method, and deposits a thinner nitride epitaxial layer structure on the AlN thin film layer by a CVD method. In this structure, the active layer is doped with a high concentration of n-type impurities; the large-depth patterned substrate is used to improve the light extraction efficiency, and at the same time, by reducing the small stress of the epitaxial layer, the warpage plating of the epitaxial wafer is improved, thereby improving the single piece. The electrical uniformity of the epitaxial wafer; and the high-concentration doping of the active layer improves the voltage electrical properties of the LED structure, thereby improving the overall yield of the LED chip.
附图说明DRAWINGS
附图用来提供对本发明的进一步理解，并且构成说明书的一部分，与本发明的实施例一起用于解释本发明，并不构成对本发明的限制；此外，附图数据是描述概要，不是按比例绘制。The drawings are intended to provide a further understanding of the invention, and are a part of the description of the invention. draw.
图1为本发明之一种氮化物发光二极管的制备方法流程图。1 is a flow chart of a method for preparing a nitride light emitting diode according to the present invention.
图2为本发明之实施例1的发光二极管结构示意图。2 is a schematic structural view of a light emitting diode according to Embodiment 1 of the present invention.
图3为本发明之实施例2的发光二极管结构示意图。3 is a schematic structural view of a light emitting diode according to Embodiment 2 of the present invention.
图4为本发明之实施例3的发光二极管结构示意图。4 is a schematic structural view of a light emitting diode according to Embodiment 3 of the present invention.
图中：1.衬底；2.AlN材料层；3.氮化物材料层；30.低温氮化镓层；31.非参杂氮化镓材料层；32.n型氮化镓材料层；4.高掺杂活性层；5.p型层。In the figure: 1. substrate; 2. AlN material layer; 3. nitride material layer; 30. low temperature gallium nitride layer; 31. non-doped gallium nitride material layer; 32. n-type gallium nitride material layer; 4. Highly doped active layer; 5. p-type layer.
具体实施方式 detailed description
下面结合附图和实施例对本发明的具体实施方式进行详细说明。The specific embodiments of the present invention will be described in detail below with reference to the drawings and embodiments.
实施例1Example 1
请参看附图1和2，提供衬底1，其为平片衬底或图形化衬底，其材质为蓝宝石、硅、碳化硅、氮化镓或砷化镓等，其中图形化衬底中图形的垂直高度范围为2～20微米，其图形可用干法蚀刻形成，亦可用湿法蚀刻形成；将此大深度衬底1放入PVD腔室，调节腔室温度为350～550℃，压力为2～10mtorr，利用PVD法在衬底1表面沉积表面平整、厚度为5～350埃的AlN材料层2；因PVD法的成膜特性，当图形化衬底的图形深度高于常规衬底深度时，其AlN材料层2仍能保持表面平整，膜层质量较好的特性；随后将沉积有AlN材料层2的衬底取出，再将其放入载盘内并传入化学气相沉积(CVD)腔室，调节腔室温度为400～1150℃，在AlN材料层2表面利用CVD法沉积一氮化物材料层3；再在氮化物材料层3上沉积高浓度掺杂活性层4和p型层5，高浓度掺杂活性层4掺杂有n型杂质，掺杂浓度大于6×1018/cm3，其掺杂浓度足以改善发光二极管的电压特性；其中氮化物材料层3至p型层5的沉积方式优选金属有机化学气相沉积法(MOCVD)此结构的发光二极管因其底层使用PVD法镀AlN材料层，其晶体质量较好，对后续沉积的材料层质量影响较小，故后续活性层可掺杂高浓度杂质而不会明显降低其晶体质量，从而避免造成漏电流增加等电性变差的现象，而该高浓度掺杂活性层结构可有效降低发光二极管的电压，进而改善发光二极管的芯片良率。Referring to Figures 1 and 2, a substrate 1 is provided, which is a flat substrate or a patterned substrate made of sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide, etc., in a patterned substrate. The vertical height of the pattern ranges from 2 to 20 microns. The pattern can be formed by dry etching or by wet etching. The large depth substrate 1 is placed in the PVD chamber to adjust the chamber temperature to 350-550 ° C. For 2 to 10 mtorr, an AlN material layer 2 having a flat surface and a thickness of 5 to 350 angstroms is deposited on the surface of the substrate 1 by the PVD method; the pattern depth of the patterned substrate is higher than that of the conventional substrate due to the film formation property of the PVD method. At the depth, the AlN material layer 2 can still maintain the surface flatness and the film quality is better; then the substrate deposited with the AlN material layer 2 is taken out, and then placed in the carrier and introduced into the chemical vapor deposition ( CVD) chamber, adjusting the chamber temperature to 400 to 1150 ° C, depositing a nitride material layer 3 on the surface of the AlN material layer 2 by CVD; and depositing a high concentration doped active layer 4 and p on the nitride material layer 3 The layer 5, the high concentration doping active layer 4 is doped with an n-type impurity, and the doping concentration is greater than 6×10 18 /cm 3 The doping concentration is sufficient to improve the voltage characteristics of the light emitting diode; wherein the deposition mode of the nitride material layer 3 to the p type layer 5 is preferably metal organic chemical vapor deposition (MOCVD). The light emitting diode of the structure is plated with AlN by the PVD method. The material layer has better crystal quality and less influence on the quality of the subsequently deposited material layer. Therefore, the subsequent active layer can be doped with high concentration impurities without significantly reducing the crystal quality, thereby avoiding the increase of leakage current and other electrical deterioration. The phenomenon, and the high concentration doped active layer structure can effectively reduce the voltage of the light emitting diode, thereby improving the chip yield of the light emitting diode.
实施例2Example 2
请参看附图3，提供衬底1，为平片衬底或图形化衬底，其材质可为蓝宝石、硅、碳化硅、氮化镓或砷化镓等；当选用图形化衬底时，其图形的垂直高度范围为2～20微米，其图形为干法蚀刻或湿法蚀刻形成；将此大深度衬底1放入PVD腔室，调节腔室温度为350～550℃，压力为2～10mtorr，利用PVD法在衬底1表面沉积表面平整、厚度为5～350埃的AlN材料层2；因PVD法的成膜特性，当所使用衬底的图形深度高于常规图形化衬底时，其AlN材料层2仍能保持表面平整，膜层质量较好的特性；随后将沉积有AlN材料层2的衬底取出，再将其放入载盘内并传入化学气相沉积(CVD)腔室，调节腔室温度为900～1150℃，在AlN材料层2表面利用CVD法沉积一氮化物材料层3，该层由高温非掺杂氮化镓材料层31与n型氮化镓材料层32组合形成，其中非掺杂氮化镓材料层31厚度范围为0～1.5微米；n型氮化镓材料层32厚度为1.0～3.0微米；而氮化物材料层3厚度为1.0～3.5微米；最后再在氮化物材料层3上沉积掺杂活性层4和p型层5，而活性层4的掺杂浓度足 以改善发光二极管的电压特性；此外，氮化物材料层3至p型层5的沉积方式优选金属有机化学气相沉积法(MOCVD)；此发光二极管整体外延层厚度小于或等于4微米；而此结构的发光二极管因其底层及总体厚度均较薄，故而减小了晶格应力，从而减小外延片的翘曲，使单片外延片各点的生长条件均匀一致，各点的电性一致，且减小后续制程中出现破片的概率；同时，因此结构使用衬底深度较大，有效改善了取光效率，进而改善发光二极管的生长良率。Referring to FIG. 3, the substrate 1 is provided as a flat substrate or a patterned substrate, which may be made of sapphire, silicon, silicon carbide, gallium nitride or gallium arsenide; when a patterned substrate is selected, The vertical height of the pattern ranges from 2 to 20 microns, and the pattern is formed by dry etching or wet etching; the large depth substrate 1 is placed in the PVD chamber, the chamber temperature is adjusted to 350-550 ° C, and the pressure is 2 ~10mtorr, using the PVD method to deposit a layer of AlN material with a flat surface and a thickness of 5 to 350 angstroms on the surface of the substrate 1; due to the film forming property of the PVD method, when the pattern depth of the substrate used is higher than that of the conventional patterned substrate The AlN material layer 2 can still maintain the surface flatness and the film quality is better; then the substrate on which the AlN material layer 2 is deposited is taken out, and then placed in the carrier and introduced into the chemical vapor deposition (CVD). a chamber, the chamber temperature is 900 to 1150 ° C, and a nitride material layer 3 is deposited on the surface of the AlN material layer 2 by a CVD method, the layer being composed of a high temperature undoped gallium nitride material layer 31 and an n-type gallium nitride material. Layer 32 is formed in combination, wherein the undoped gallium nitride material layer 31 has a thickness ranging from 0 to 1.5 microns; n-type nitridation The material layer 32 has a thickness of 1.0 to 3.0 μm; and the nitride material layer 3 has a thickness of 1.0 to 3.5 μm; finally, the doped active layer 4 and the p-type layer 5 are deposited on the nitride material layer 3, and the active layer 4 is doped. Miscellaneous concentration In order to improve the voltage characteristics of the light emitting diode; in addition, the deposition mode of the nitride material layer 3 to the p type layer 5 is preferably metal organic chemical vapor deposition (MOCVD); the overall epitaxial layer thickness of the light emitting diode is less than or equal to 4 micrometers; Because the bottom layer and the overall thickness of the light-emitting diode are thin, the lattice stress is reduced, thereby reducing the warpage of the epitaxial wafer, so that the growth conditions of each point of the single-piece epitaxial wafer are uniform, and the electrical properties of the points are uniform. Moreover, the probability of occurrence of fragmentation in the subsequent process is reduced; at the same time, the structure uses a large substrate depth, which effectively improves the light extraction efficiency, thereby improving the growth yield of the light emitting diode.
实施例3Example 3
请参看附图4，本实施例在实施例2的基础上进行优化实施，即当将沉积有AlN材料层2的衬底取出，再将其放入化学气相沉积(CVD)腔室时，调节腔室温度为200-900℃，在AlN材料层2表面利用CVD法先沉积低温氮化镓层30，厚度为5埃～1500埃，再升高腔室温度至900℃以上沉积高温非掺杂氮化镓层31，后再沉积n型氮化镓层32，最后再调节腔室温度继续沉积掺杂活性层4和p型层5。Referring to FIG. 4, the embodiment is optimized on the basis of Embodiment 2, that is, when the substrate on which the AlN material layer 2 is deposited is taken out and placed in a chemical vapor deposition (CVD) chamber, the adjustment is performed. The chamber temperature is 200-900 ° C, and the low-temperature gallium nitride layer 30 is deposited on the surface of the AlN material layer 2 by a CVD method to a thickness of 5 Å to 1500 Å, and then the chamber temperature is raised to 900 ° C or higher to deposit a high temperature non-doped nitrogen. The gallium layer 31 is deposited, and then the n-type gallium nitride layer 32 is deposited, and finally the chamber temperature is further adjusted to continue to deposit the doped active layer 4 and the p-type layer 5.
本实施例中，在AlN材料层上先沉积低温氮化镓层30，后在升温沉积高温非掺杂氮化镓层之前先对低温氮化镓层30进行升高温退火处理，使低温氮化镓层30形成“岛状结构”，实现“成核”过程，由于该层为低温生长，其部分晶体特性与AlN材料层2较为相近，而部分材料特性与后续氮化物材料层3接近，故其可以很好地连接AlN材料层与高温氮化镓材料层，缓冲减小AlN材料层2与氮化物材料层3之间的晶格应力，从而改善后续外延层的晶格质量。In this embodiment, a low-temperature gallium nitride layer 30 is first deposited on the AlN material layer, and then the low-temperature gallium nitride layer 30 is subjected to a high-temperature annealing treatment to accelerate the low-temperature nitridation before the high-temperature undoped gallium nitride layer is deposited. The gallium layer 30 forms an "island structure" to realize a "nucleation" process. Since the layer is low-temperature growth, its partial crystal characteristics are similar to those of the AlN material layer 2, and some material properties are close to the subsequent nitride material layer 3, so It can well connect the AlN material layer and the high temperature gallium nitride material layer, buffering and reducing the lattice stress between the AlN material layer 2 and the nitride material layer 3, thereby improving the lattice quality of the subsequent epitaxial layer.
应当理解的是，上述具体实施方案为本发明的优选实施例，本发明的范围不限于该实施例，凡依本发明所做的任何变更，皆属本发明的保护范围之内。 It is to be understood that the above-described embodiments are a preferred embodiment of the invention, and the scope of the invention is not limited to the embodiment, and any modifications made in accordance with the invention are within the scope of the invention.

Claims (14)

  1. 一种氮化物发光二极管制备方法，包括如下步骤：A method for preparing a nitride light emitting diode includes the following steps:
    步骤一：提供一衬底，将其放入物理气相沉积(PVD)腔室；Step 1: providing a substrate and placing it in a physical vapor deposition (PVD) chamber;
    步骤二：利用PVD法在所述衬底表面沉积AlN材料层；Step two: depositing an AlN material layer on the surface of the substrate by using a PVD method;
    步骤三：将沉积有所述AlN材料层的衬底取出，再将其放入化学气相沉积(CVD)腔室；Step 3: taking out the substrate on which the AlN material layer is deposited, and placing it in a chemical vapor deposition (CVD) chamber;
    步骤四：在所述AlN材料层表面利用CVD法沉积氮化物材料层；Step 4: depositing a nitride material layer on the surface of the AlN material layer by a CVD method;
    步骤五：在所述氮化物材料层表面沉积具有高浓度掺杂的活性层，其掺杂浓度足以改善发光二极管的电压特性；Step 5: depositing an active layer having a high concentration of doping on the surface of the nitride material layer, the doping concentration of which is sufficient to improve the voltage characteristics of the light emitting diode;
    步骤六：在所述高浓度掺杂活性层表面沉积p型层。Step 6: depositing a p-type layer on the surface of the high concentration doped active layer.
  2. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤三至步骤六的沉积方式均为金属有机化学气相沉积法(MOCVD)。The method for preparing a nitride light emitting diode according to claim 1, wherein the deposition methods of the third step to the sixth step are all metal organic chemical vapor deposition (MOCVD).
  3. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述衬底为图形化衬底，图形垂直高度为2～20微米。The method of fabricating a nitride light emitting diode according to claim 1, wherein the substrate is a patterned substrate, and the vertical height of the pattern is 2 to 20 μm.
  4. 根据权利要求3所述的氮化物发光二极管制备方法，其特征在于：所述衬底中图形为干法蚀刻或湿法蚀刻或前述组合制备。The method of fabricating a nitride light emitting diode according to claim 3, wherein the pattern in the substrate is dry etching or wet etching or a combination of the foregoing.
  5. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤五中沉积的掺杂活性层掺杂有n型杂质，掺杂浓度大于6×1018/cm3。The method for fabricating a nitride light emitting diode according to claim 1, wherein the doped active layer deposited in the fifth step is doped with an n-type impurity, and the doping concentration is greater than 6×10 18 /cm 3 .
  6. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤四中氮化物材料层为高温非掺杂氮化镓与n型氮化镓材料层组合形成。The method for fabricating a nitride light emitting diode according to claim 1, wherein the nitride material layer in the fourth step is formed by combining a high temperature undoped gallium nitride layer and an n-type gallium nitride material layer.
  7. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤四中氮化物材料层为低温氮化镓层、高温非掺杂氮化镓层与n型氮化镓层组合形成。The method for fabricating a nitride light emitting diode according to claim 1, wherein the nitride material layer in the step 4 is a combination of a low temperature gallium nitride layer, a high temperature undoped gallium nitride layer and an n-type gallium nitride layer. form.
  8. 根据权利要求7所述的氮化物发光二极管制备方法，其特征在于：所述低温氮化镓层的生长温度为200～900℃。The method of fabricating a nitride light emitting diode according to claim 7, wherein the low temperature gallium nitride layer has a growth temperature of 200 to 900 °C.
  9. 根据权利要求7所述的氮化物发光二极管制备方法，其特征在于：所述低温氮化镓层的 厚度为5埃～1500埃。A method of fabricating a nitride light emitting diode according to claim 7, wherein said low temperature gallium nitride layer The thickness is from 5 angstroms to 1500 angstroms.
  10. 根据权利要求6或7所述的氮化物发光二极管制备方法，其特征在于：所述氮化物材料层厚度范围为1.0～3.5微米。The method of fabricating a nitride light emitting diode according to claim 6 or 7, wherein the nitride material layer has a thickness in the range of 1.0 to 3.5 μm.
  11. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述氮化物发光二极管的整体外延层厚度小于或等于4微米。The method of fabricating a nitride light emitting diode according to claim 1, wherein the nitride light emitting diode has an overall epitaxial layer thickness of less than or equal to 4 micrometers.
  12. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤二中腔室温度为350～550℃。The method for preparing a nitride light emitting diode according to claim 1, wherein the chamber temperature in the second step is 350 to 550 °C.
  13. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤二中腔室压力为2～10mtorr。The method for fabricating a nitride light emitting diode according to claim 1, wherein the chamber pressure in the second step is 2 to 10 mtorr.
  14. 根据权利要求1所述的氮化物发光二极管制备方法，其特征在于：所述步骤二中沉积的AlN材料层厚度为5～350埃。 The method for fabricating a nitride light emitting diode according to claim 1, wherein the layer of AlN material deposited in the second step has a thickness of 5 to 350 angstroms.
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