WO2015196858A1 - 一种电压调整器的电路 - Google Patents

一种电压调整器的电路 Download PDF

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Publication number
WO2015196858A1
WO2015196858A1 PCT/CN2015/077506 CN2015077506W WO2015196858A1 WO 2015196858 A1 WO2015196858 A1 WO 2015196858A1 CN 2015077506 W CN2015077506 W CN 2015077506W WO 2015196858 A1 WO2015196858 A1 WO 2015196858A1
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voltage
output
terminal
positive
unit
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PCT/CN2015/077506
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English (en)
French (fr)
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唐样洋
张臣雄
王新入
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华为技术有限公司
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Publication of WO2015196858A1 publication Critical patent/WO2015196858A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of dc power input into dc power output
    • H02M3/22—Conversion of dc power input into dc power output with intermediate conversion into ac
    • H02M3/24—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters
    • H02M3/28—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac
    • H02M3/325—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal
    • H02M3/335—Conversion of dc power input into dc power output with intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode to produce the intermediate ac using devices of a triode or a transistor type requiring continuous application of a control signal using semiconductor devices only

Definitions

  • the present invention relates to the field of electronic technologies, and in particular, to a circuit of a voltage regulator.
  • a voltage regulator is a linear regulator that maintains the input voltage and output voltage differential within a nominal value by adjusting the output voltage through a transistor or MOSFET running in a linear operating region.
  • the voltage regulator has the characteristics of low loss, small quiescent current and simple structure, so it is widely used in various electronic devices.
  • the output voltage of the voltage regulator may generate noise due to temperature change, voltage drift or integration of process nodes, such as spikes, etc., directly burdening the load, such as affecting the load.
  • process nodes such as spikes, etc.
  • the embodiment of the invention provides a circuit of a voltage regulator, which can reduce the noise of the output voltage of the voltage regulator and improve the stability of the voltage regulator.
  • a first aspect of the embodiments of the present invention provides a circuit for a voltage regulator, including a voltage input terminal, a transformer unit, a feedback control unit, a pressure relief unit, and a voltage output terminal, wherein:
  • a first end of the voltage transformation unit is connected to a positive pole of the voltage input end, a second end of the voltage transformation unit is connected to a positive pole of the voltage output end, an input end of the feedback control unit and the voltage output end
  • the positive terminal is connected, the output end of the feedback control unit is connected to the controlled end of the voltage transformation unit, the first end of the pressure relief unit is connected to the positive pole of the voltage output end, and the second end of the pressure relief unit Connected to the negative pole of the voltage output end, the third end of the pressure relief unit is connected to the output end of the feedback control unit;
  • the feedback control unit is configured to correspondingly reduce or increase a voltage drop of the voltage transformation unit to stabilize a positive output of the voltage output terminal when an output voltage of a positive electrode of the voltage output terminal is higher or lower than a preset threshold a voltage
  • the pressure relief unit includes a switch tube
  • the feedback control unit is further configured to turn on the switch tube when the output voltage of the positive pole of the voltage output jumps
  • the switch tube is used for discharging when turned on The clutter of the positive pole of the voltage output.
  • the pressure relief unit further includes a first filter capacitor and an equivalent resistor, wherein the switch transistor is an NMOS (Negative Channel Metal Oxide Semiconductor) :
  • the drain of the switch tube is connected to the anode of the voltage output end, and the source of the switch tube is respectively connected to the first end of the first filter capacitor and the first end of the equivalent resistor, the switch The gate of the tube is connected to the output of the feedback control unit, and the cathode of the voltage output terminal is respectively connected to the second end of the first filter capacitor and the second end of the equivalent resistor.
  • the output voltage of the output end of the feedback control unit increases.
  • the voltage of the gate of the switch tube will be greater than the turn-on voltage of the switch tube, and the switch tube is turned on, and the filter network formed by the first filter capacitor and the equivalent resistor will filter out the voltage output end.
  • the clutter of the positive pole when the output voltage of the positive terminal of the voltage output terminal jumps, the output voltage of the output end of the feedback control unit increases.
  • the voltage of the gate of the switch tube will be greater than the turn-on voltage of the switch tube, and the switch tube is turned on, and the filter network formed by the first filter capacitor and the equivalent resistor will filter out the voltage output end.
  • the clutter of the positive pole when the output voltage of the positive terminal of the voltage output terminal jumps, the output voltage of the output end of the feedback control unit increases.
  • the voltage of the gate of the switch tube will be greater than the turn-on voltage of the switch tube, and the switch tube is turned on, and the filter network formed by the first filter capacitor and the equivalent resistor will filter out the
  • the circuit further includes a filtering unit, a first end of the filtering unit is connected to an anode of the voltage output end, and a second part of the filtering unit The end is connected to the negative pole of the voltage output end;
  • the filtering unit is configured to filter out clutter of the positive pole of the voltage output end.
  • the filtering unit includes a second filter capacitor, and the first end of the second filter capacitor and the voltage output The anode of the terminal is connected, and the second end of the second filter capacitor is connected to the cathode of the voltage output terminal.
  • the feedback control unit includes a first voltage dividing resistor, a second voltage dividing resistor, and an error amplifier, where:
  • a first end of the first voltage dividing resistor is connected to a positive pole of the voltage output end, and a second end of the first voltage dividing resistor is connected to a first end of the second voltage dividing resistor, the second point a second end of the voltage resistor is connected to the negative terminal of the voltage output end, a positive input end of the error amplifier is connected to a second end of the first voltage dividing resistor, and a negative input end of the error amplifier is connected to the first reference
  • the output of the error amplifier is connected to the controlled end of the voltage transformation unit and the third end of the pressure relief unit, respectively.
  • the transformer unit includes a P-Power-MOSFET (Positive channel-Power-Metal) An Oxide Semiconductor Field Effect Transistor, wherein a source of the P-Power-MOSFET is connected to a positive terminal of the voltage input terminal, and a drain of the P-Power-MOSFET transistor Connected to the positive terminal of the voltage output terminal, the gate of the P-Power-MOSFET tube is connected to the output terminal of the error amplifier.
  • P-Power-MOSFET Positive channel-Power-Metal
  • An Oxide Semiconductor Field Effect Transistor wherein a source of the P-Power-MOSFET is connected to a positive terminal of the voltage input terminal, and a drain of the P-Power-MOSFET transistor Connected to the positive terminal of the voltage output terminal, the gate of the P-Power-MOSFET tube is connected to the output terminal of the error amplifier.
  • a seventh possible implementation when the output voltage of the positive pole of the voltage output terminal is higher than a preset threshold, the positive input end of the error amplifier The difference between the voltage and the first reference voltage is increased, and thus the output current of the output of the error amplifier is decreased, and the voltage drop of the source and the drain of the P-Power-MOSFET is increased, thereby The output voltage of the positive terminal of the voltage output terminal is decreased;
  • the output voltage of the positive terminal of the voltage output terminal is lower than a preset threshold, the difference between the voltage of the positive input terminal of the error amplifier and the first reference voltage is decreased, and the output current of the output terminal of the error amplifier is increased. Large, the voltage drop across the source and drain of the P-Power-MOSFET is reduced, and the output voltage of the positive terminal of the voltage output is increased.
  • an output of the feedback control unit includes a first output end and a second output end, and the first output end of the feedback control unit is a controlled end of the pressure transformation unit is connected, and a second output end of the feedback control unit is connected to the third end of the pressure relief unit,
  • the feedback control unit includes a first voltage dividing resistor, a second voltage dividing resistor, a digital comparator, and a digital controller, wherein:
  • a first end of the first voltage dividing resistor is connected to a positive pole of the voltage output end, and a second end of the first voltage dividing resistor is connected to a first end of the second voltage dividing resistor, the second point a second end of the voltage resistor is connected to a negative terminal of the voltage output end, a positive input end of the digital comparator is connected to a second end of the first voltage dividing resistor, and a negative input end of the digital comparator is connected a second reference voltage, an output of the digital comparator is respectively connected to an input end of the digital controller and a third end of the pressure release unit, and an output end of the digital controller and the transformer unit are received
  • the console is connected.
  • the transformer unit includes at least three PMOS (Positive Channel Metal Oxide Semiconductor) tubes.
  • the number of ports of the output of the digital controller is not less than the number of the PMOS transistors, wherein the source of each of the PMOS transistors is connected to the positive terminal of the voltage input and output terminals, and the leakage of each of the PMOS transistors
  • the pole is connected to the anode of the voltage output terminal,
  • the gate of each PMOS transistor is connected to a corresponding port of the output of the digital controller.
  • the digital controller when the output voltage of the positive pole of the voltage output terminal is higher than a preset threshold, the positive input of the digital comparator The difference between the voltage of the terminal and the second reference voltage increases, and the output voltage of the output of the error amplifier increases, the digital controller will reduce the number of the PMOS transistors that are turned on, the conduction The total resistance of the PMOS transistor is increased, the total voltage drop of the source and the drain of the turned-on PMOS transistor is increased, and the output voltage of the anode of the voltage output terminal is decreased;
  • the digital controller When the output voltage of the positive terminal of the voltage output terminal is lower than a preset threshold, the difference between the voltage of the positive input terminal of the digital comparator and the second reference voltage is decreased, and further the output voltage of the output terminal of the error amplifier Decreasing, the digital controller will increase the number of the PMOS transistors that are turned on, the total resistance of the turned-on PMOS transistors is reduced, and the total voltage of the source and drain of the turned-on PMOS transistors The drop is reduced, and the output voltage of the positive electrode of the voltage output terminal is increased.
  • the feedback control unit in the embodiment of the present invention changes the voltage drop of the voltage transformation unit according to the voltage of the voltage output terminal, thereby maintaining the input voltage and the output voltage difference of the voltage regulator within the rated value, and the filtering unit can filter out
  • the voltage output terminal outputs a clutter in the voltage.
  • the switching tube in the response filtering unit is turned on, and the turned-on switching tube can bleed the clutter at the voltage output end.
  • FIG. 1 is a schematic structural diagram of a circuit of a voltage regulator according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a circuit of a voltage regulator according to an embodiment of the present invention.
  • FIG. 3 is a schematic diagram of another circuit of a voltage regulator according to an embodiment of the present invention.
  • the circuit of the voltage regulator in the embodiment of the invention can be applied to electronic devices such as smart phones, personal computers, tablet computers, digital music players and electronic readers, and can realize "DC (Direct Current)-DC” voltage regulation. effect.
  • FIG. 1 is a schematic structural diagram of a circuit of a voltage regulator according to an embodiment of the present invention.
  • the circuit of the voltage regulator in this embodiment as shown in the figure may include a voltage input terminal V i , a transformer unit 110 , a feedback control unit 120 , a pressure relief unit 130 , and a voltage output terminal V o , wherein:
  • the first end of the voltage transformation unit 110 is connected to the anode of the voltage input terminal V i , and the second end of the voltage transformation unit 110 is connected to the anode of the voltage output terminal V o , and the input end of the feedback control unit 120 and the voltage output terminal V o
  • the positive terminal is connected, and the output end of the feedback control unit 120 is connected to the controlled end of the voltage transformation unit 110.
  • the first end of the pressure relief unit 130 is connected to the positive terminal of the voltage output terminal V o , and the second end of the pressure relief unit 130 and the voltage output are connected.
  • the negative terminal of the terminal V o is connected, and the third end of the pressure relief unit 130 is connected to the output of the feedback control unit 120.
  • the feedback control unit 120 is configured to correspondingly reduce or increase the voltage drop of the transformer unit 110 when the output voltage of the anode of the voltage output terminal V o is higher or lower than a preset threshold to stabilize the output of the anode of the voltage output terminal V o
  • the voltage and pressure relief unit 130 includes a switch tube.
  • the feedback control unit 120 is further configured to turn on the switch tube when the output voltage of the positive terminal of the voltage output terminal V o is hopped, and the switch tube is configured to bleed the voltage output end when turned on. The clutter of the positive pole.
  • the circuit of the voltage regulator may further include a filtering unit 140.
  • the first end of the filtering unit 140 is connected to the anode of the voltage output terminal V o
  • the second end of the filtering unit 140 is connected to the cathode of the voltage output terminal V o .
  • the filtering unit 140 is configured to filter out the clutter of the positive pole of the voltage output terminal V o .
  • FIG. 2 is a schematic diagram of an alternative circuit of a voltage regulator in an embodiment of the present invention.
  • the transformer unit 110 includes a P-Power-MOSFET (Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor) tube, and the P-Power-MOSFET tube is The MOSFET is shown in the figure;
  • the feedback control unit 120 includes a first voltage dividing resistor R1, a second voltage dividing resistor R2, and an error amplifier A1;
  • the switching transistor is an NMOS (Negative Channel Metal Oxide Semiconductor) tube, as shown in the figure.
  • the pressure relief unit 130 further includes a first filter capacitor C1 and an equivalent resistor R3;
  • the filtering unit 140 includes a second filter capacitor C2.
  • the drain of the switching transistor NMOS is connected to the anode of the voltage output terminal V o , and the source of the switching transistor NMOS is respectively connected to the first end of the first filter capacitor C1 and the first end of the equivalent resistor R3 , and the voltage output terminal V
  • the negative pole of o is respectively connected to the second end of the first filter capacitor C1 and the second end of the equivalent resistor R3, and the gate of the switch transistor NMOS is connected to the output end of the error amplifier A1, and the first end of the first voltage dividing resistor R1 Connected to the positive terminal of the voltage output terminal V o , the second end of the first voltage dividing resistor R1 is connected to the first end of the second voltage dividing resistor R2 , and the second end of the second voltage dividing resistor R2 is connected to the voltage output terminal V o
  • the negative terminal is connected, the positive input terminal of the error amplifier A1 is connected to the second end of the first voltage dividing resistor R1, the negative input terminal of the error amplifier A1
  • the gate is connected, the source of the power tube MOSFET is connected to the anode of the voltage input terminal V i , the drain of the power tube MOSFET is connected to the anode of the voltage output terminal V o , and the first end of the second filter capacitor C2 is connected to the voltage output terminal V o is connected to the positive electrode, the second terminal of the second capacitor C2 and the filter Voltage is connected to a negative output terminal V o.
  • the embodiment of the present invention selects a P-Power-MOSFET tube as a transformer component to realize a low-drop voltage regulator.
  • the resistance R ds between the source and the drain of the P-Power-MOSFET is very small, so The voltage drop across the source and drain of the P-Power-MOSFET in the linear operating region can be less than 2V, enabling low drop voltages.
  • the loop “1 ⁇ 2 ⁇ 3 ⁇ 4” constitutes a feedback loop.
  • the output voltage of the positive pole of the voltage output terminal V o is higher than a preset threshold, the voltage of the positive input terminal of the error amplifier A1 and the first reference voltage Vref1 As the difference is increased, it is known from the "input-output" characteristic of the error amplifier that the output current of the output terminal of the error amplifier A1 is decreased in accordance with the above difference. Since the P-Power-MOSFET tube operates in the linear operating region at this time, the voltage drop of the source and drain of the P-Power-MOSFET tube increases as the output current of the error amplifier A1 decreases (for the specific principle, refer to P- The characteristic curve of the Power-MOSFET tube will not be described here.
  • V out V in -V drop
  • V ref1 1V
  • V reg -V ref1 1V>0.65V
  • Embodiments of the present invention achieve the effect of stabilizing the output voltage of the voltage regulator.
  • capacitor C2 simple filtering unit 140 to filter out the voltage output terminal V o of the non-DC inclusions, i.e. clutter.
  • the filtering unit 140 is not limited to including only the capacitor C2.
  • the feedback loop ie, the feedback control unit 120
  • the feedback control unit 120 can achieve the effect of stabilizing the output voltage of the voltage output terminal V o , but the delay of the whole feedback process is longer, and the jitter delay of the clutter is longer. Short, can not respond quickly, second, the larger the capacitance value of C1 in the above capacitor C2 (ie, the filtering unit 140), the stronger the filtering ability, but the delay of the output voltage change will also increase, and the difficulty coefficient of the capacitor is also made. It also increases. It can be seen that the voltage regulator including only the feedback control unit 120 and the RC filter unit 140 is not perfect. Therefore, the circuit of the voltage regulator further includes a pressure relief unit 130.
  • the error amplifier A1 when the output voltage of the voltage output terminal V o jumps (ie, the output voltage value changes greatly in a short time), the error amplifier A1 is positive.
  • the difference between the voltage of the input terminal and the first reference voltage Vref1 is increased, and the output voltage of the output terminal of the error amplifier A1 is increased according to the increase of the difference, and the voltage of the gate of the switch tube is greater than the opening of the switch tube.
  • the switch transistor NMOS is turned on, and then the filter network composed of the first filter capacitor C1 and the equivalent resistor R3 filters out the clutter of the positive pole of the voltage output terminal V o , thereby reducing the spike pulse and improving the voltage regulator Anti-noise performance.
  • FIG. 3 is a schematic diagram of an alternative circuit of a voltage regulator in an embodiment of the present invention.
  • the circuit in FIG. 3 and FIG. 2 differs in the transformer unit 110 and the feedback control unit 120.
  • FIG. 2 is a circuit diagram in an analog feedback mode
  • FIG. 3 is a circuit diagram in a digital feedback mode. It should be noted that the working principles of the pressure relief unit 130 and the filtering unit 140 are not described in this embodiment.
  • the transformer unit 110 includes at least three PMOS (Positive Channel Metal Oxide Semiconductor) tubes, as shown by the PMOS in the figure; the output of the feedback control unit 120 includes the first output.
  • the number of ports at the output of the A3 is not less than the number of PMOS transistors.
  • the first end of the first voltage dividing resistor R1 is connected to the positive terminal of the voltage output terminal V o
  • the second end of the first voltage dividing resistor R1 is connected to the first end of the second voltage dividing resistor R2
  • the second voltage dividing resistor The second end of R2 is connected to the negative terminal of the voltage output terminal V o
  • the positive input terminal of the digital comparator A2 is connected to the second end of the first voltage dividing resistor R1
  • the negative input terminal of the digital comparator A2 is connected to the second reference voltage Vref2
  • the output of the digital comparator A2 is respectively connected to the input terminal of the digital controller A3 and the gate of the switch transistor NMOS
  • the respective output terminals of the digital controller A3 are respectively connected to the gates of the corresponding PMOS transistors.
  • the loop "1 ⁇ 2 ⁇ 3 ⁇ 4 ⁇ 5" constitutes a feedback loop.
  • the output voltage of the positive pole of the voltage output terminal V o is higher than a preset threshold, the voltage of the positive input terminal of the digital comparator A2 and the second reference voltage Vref2 The difference is increased, and the output voltage of the digital comparator A2 is increased in accordance with the above difference, that is, the voltage at the input terminal of the digital controller A3 is increased.
  • digital controller (DC, Digital Controller) is a common electronic controller, generally connected with the feedback part of the circuit, including A/D conversion or D/A conversion, usually through computer software programming or logic circuit. Specific control algorithm.
  • the digital controller A3 correspondingly reduces the number of turned-on PMOS transistors according to the increased value of the output voltage of the digital comparator A2. Since there is a resistor R ds between the drain and the source of the turned-on PMOS transistor, if the resistors are connected in parallel When R ds decreases, the total resistance of the turned-on PMOS transistor will increase, and the voltage drop will also increase.
  • V out V in -V drop
  • V drop increases and V out decreases, thus the voltage output terminal
  • the output voltage of the positive electrode of V o is reduced.
  • the sampling voltage V reg of the positive input of digital comparator A2 is 1.65V.
  • Embodiments of the present invention achieve the effect of stabilizing the output voltage of the voltage regulator. It should be noted that the more the number of PMOS tubes is, the higher the accuracy of the transformation unit 110 is.
  • the feedback control unit in the embodiment of the present invention changes the voltage drop of the voltage transformation unit according to the voltage of the voltage output terminal, thereby maintaining the input voltage and the output voltage difference of the voltage regulator within the rated value, and the filtering unit can filter the output of the voltage output terminal.
  • the clutter in the voltage further, when the voltage at the voltage output end jumps, the switching tube in the response filtering unit is turned on, and the turned-on switching tube can bleed the clutter at the voltage output end.

Abstract

提供了一种电压调整器的电路，包括电压输入端（Vi）、变压单元（110）、反馈控制单元（120）、泄压单元（130）以及电压输出端（Vo），其中，所述反馈控制单元（120）用于在所述电压输出端（Vo）的正极的输出电压高于或低于预设阈值时对应地降低或升高所述变压单元（110）的压降，所述泄压单元（130）包括开关管，所述反馈控制单元（120）还用于在所述电压输出端（Vo）的正极的输出电压跳变时导通所述开关管，所述开关管用于在导通时泄放所述电压输出端（Vo）的正极的杂波。采用所述电压调整器的电路，可以减少电压调整器的输出电压的噪声，提高电压调整器的稳定性。

Description

一种电压调整器的电路 技术领域
本发明涉及电子技术领域，尤其涉及一种电压调整器的电路。
背景技术
电压调整器是一种线性稳压器，通过在线性工作区运行的晶体管或MOSFET管调整输出电压，将输入电压与输出电压差额维持在额定值之内。电压调整器具有损耗低、静态电流小和结构简单等特点，因此广泛应用于各类的电子设备。
在应用过程中，难免地，电压调整器的输出电压可能会因为温度改变、电压漂移或工艺节点集成度增大等原因产生噪声，如尖刺脉冲等，直接给负载带来负担，如影响负载的响应速度和加大负载的能量损耗等。
发明内容
本发明实施例提供了一种电压调整器的电路，可以减少电压调整器的输出电压的噪声，提高电压调整器的稳定性。
本发明实施例第一方面提供了一种电压调整器的电路，包括电压输入端、变压单元、反馈控制单元、泄压单元以及电压输出端，其中：
所述变压单元的第一端与所述电压输入端的正极相连，所述变压单元的第二端与所述电压输出端的正极相连，所述反馈控制单元的输入端与所述电压输出端的正极相连，所述反馈控制单元的输出端与所述变压单元的受控端相连，所述泄压单元的第一端与所述电压输出端的正极相连，所述泄压单元的第二端与所述电压输出端的负极相连，所述泄压单元的第三端与所述反馈控制单元的输出端相连；
所述反馈控制单元用于在所述电压输出端的正极的输出电压高于或低于预设阈值时对应地降低或升高所述变压单元的压降以稳定所述电压输出端的正极的输出电压，所述泄压单元包括开关管，所述反馈控制单元还用于在所述电压输出端的正极的输出电压跳变时导通所述开关管，所述开关管用于在导通时泄放所述电压输出端的正极的杂波。
在第一方面的第一种可能实现方式中，所述泄压单元还包括第一滤波电容和等效电阻，所述开关管是NMOS(Negative channel Metal Oxide Semiconductor，N沟道MOS)管，其中：
所述开关管的漏极与所述电压输出端的正极相连，所述开关管的源极分别与所述第一滤波电容的第一端和所述等效电阻的第一端相连，所述开关管的栅极与所述反馈控制单元的输出端相连，所述电压输出端的负极分别与所述第一滤波电容的第二端和所述等效电阻的第二端相连。
结合第一方面的第一种可能实现方式，在第二种可能实现方式中，当所述电压输出端的正极的输出电压发生跳变时，所述反馈控制单元的输出端的输出电压增大，所述开关管的栅极的电压将大于所述开关管的开启电压，进而所述开关管导通，所述第一滤波电容和所述等效电阻构成的滤波网络将滤除所述电压输出端的正极的杂波。
结合第一方面的可能实现方式，在第三种可能实现方式中，所述电路还包括滤波单元，所述滤波单元的第一端与所述电压输出端的正极相连，所述滤波单元的第二端与所述电压输出端的负极相连；
所述滤波单元用于滤除所述电压输出端的正极的杂波。
结合第一方面以及第一方面的第三种可能实现方式，在第四种可能实现方式中，所述滤波单元包括第二滤波电容，所述第二滤波电容的第一端与所述电压输出端的正极相连，所述第二滤波电容的第二端与所述电压输出端的负极相连。
结合第一方面的可能实现方式，在第五种可能实现方式中，所述反馈控制单元包括第一分压电阻、第二分压电阻以及误差放大器，其中：
所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述误差放大器的正输入端与所述第一分压电阻的第二端相连，所述误差放大器的负输入端接入第一参考电压，所述误差放大器的输出端分别与所述变压单元的受控端和所述泄压单元的第三端相连。
结合第一方面以及第一方面的第五种可能实现方式，在第六种可能实现方式中，所述变压单元包括P-Power-MOSFET(Positive channel-Power-Metal  Oxide Semiconductor Field Effect Transistor，P沟道功率MOS场效应晶体)管，其中，所述P-Power-MOSFET管的源极与所述电压输入端的正极相连，所述P-Power-MOSFET管的漏极与所述电压输出端的正极相连，所述P-Power-MOSFET管的栅极与所述误差放大器的输出端相连。
结合第一方面以及第一方面的第六种可能实现方式，在第七种可能实现方式中，当所述电压输出端的正极的输出电压高于预设阈值时，所述误差放大器的正输入端的电压和所述第一参考电压的差值增大，进而所述误差放大器的输出端的输出电流减小，所述P-Power-MOSFET管的源极和漏极的压降增大，进而所述电压输出端的正极的输出电压减小；
当所述电压输出端的正极的输出电压低于预设阈值时，所述误差放大器的正输入端的电压和所述第一参考电压的差值减小，进而所述误差放大器的输出端的输出电流增大，所述P-Power-MOSFET管的源极和漏极的压降减小，进而所述电压输出端的正极的输出电压增大。
结合第一方面的可能实现方式，在第八种可能实现方式中，所述反馈控制单元的输出端包括第一输出端和第二输出端，所述反馈控制单元的第一输出端与所述变压单元的受控端相连，所述反馈控制单元的第二输出端与所述泄压单元的第三端相连，
所述反馈控制单元包括第一分压电阻、第二分压电阻、数字比较器以及数字控制器，其中：
所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述数字比较器的正输入端与所述第一分压电阻的第二端相连，所述数字比较器的负输入端接入第二参考电压，所述数字比较器的输出端分别与所述数字控制器的输入端和所述泄压单元的第三端相连，所述数字控制器的输出端与所述变压单元的受控端相连。
结合第一方面以及第一方面的第八种可能实现方式，在第九种可能实现方式中，所述变压单元包括至少三个PMOS(Positive channel Metal Oxide Semiconductor，P沟道MOS)管，所述数字控制器的输出端的端口个数不少于所述PMOS管的个数，其中，每个所述PMOS管的源极均与所述电压入出端的正极相连，所述每个PMOS管的漏极均与所述电压输出端的正极相连， 所述每个PMOS管的栅极与所述数字控制器的输出端的对应端口相连。
结合第一方面以及第一方面的第九种可能实现方式，在第十种可能实现方式中，当所述电压输出端的正极的输出电压高于预设阈值时，所述数字比较器的正输入端的电压和所述第二参考电压的差值增大，进而所述误差放大器的输出端的输出电压增大，所述数字控制器将减少导通的所述PMOS管的个数，所述导通的PMOS管的总阻值增大，所述导通的PMOS管的源极和漏极的总压降增大，进而所述电压输出端的正极的输出电压减小；
当所述电压输出端的正极的输出电压低于预设阈值时，所述数字比较器的正输入端的电压和所述第二参考电压的差值减小，进而所述误差放大器的输出端的输出电压减小，所述数字控制器将增加导通的所述PMOS管的个数，所述导通的PMOS管的总阻值减少，所述导通的PMOS管的源极和漏极的总压降减小，进而所述电压输出端的正极的输出电压增大。
由上可见，本发明实施例中的反馈控制单元根据电压输出端的电压改变变压单元的压降，从而将电压调整器的输入电压与输出电压差额维持在额定值之内，滤波单元可滤除电压输出端输出电压中的杂波，进一步地，在电压输出端的电压发生跳变时，响应滤波单元中的开关管导通，导通的开关管可泄放电压输出端的杂波。
附图说明
为了更清楚地说明本发明实施例，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明实施例提供的一种电压调整器的电路的结构示意图；
图2是本发明实施例提供的一种电压调整器的电路的原理图；
图3是本发明实施例提供的另一种电压调整器的电路的原理图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而 不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
本发明实施例中的电压调整器的电路可应用于智能手机、个人电脑、平板电脑、数字音乐播放器以及电子阅读器等电子设备，可实现“DC(Direct Current，直流电)-DC”稳压作用。
图1是本发明实施例提供的一种电压调整器的电路的结构示意图。如图所示本实施例中的电压调整器的电路可以包括电压输入端Vi、变压单元110、反馈控制单元120、泄压单元130以及电压输出端Vo，其中：
变压单元110的第一端与电压输入端Vi的正极相连，变压单元110的第二端与电压输出端Vo的正极相连，反馈控制单元120的输入端与电压输出端Vo的正极相连，反馈控制单元120的输出端与变压单元110的受控端相连，泄压单元130的第一端与电压输出端Vo的正极相连，泄压单元130的第二端与电压输出端Vo的负极相连，泄压单元130的第三端与反馈控制单元120的输出端相连。
反馈控制单元120用于在电压输出端Vo的正极的输出电压高于或低于预设阈值时对应地降低或升高变压单元110的压降以稳定电压输出端Vo的正极的输出电压，泄压单元130包括开关管，反馈控制单元120还用于在电压输出端Vo的正极的输出电压跳变时导通开关管，开关管用于在导通时泄放所述电压输出端的正极的杂波。
可选的，电压调整器的电路还可以包括滤波单元140，滤波单元140的第一端与电压输出端Vo的正极相连，滤波单元140的第二端与电压输出端Vo的负极相连。滤波单元140用于滤除电压输出端Vo的正极的杂波。
图2是本发明实施例中的可选的一种电压调整器的电路的原理图。
作为一种可选的实施例，变压单元110包括P-Power-MOSFET(Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor，P沟道功率MOS场效应晶体)管，P-Power-MOSFET管如图中MOSFET所示；反馈控制单元120包括第一分压电阻R1、第二分压电阻R2以及误差放大器A1；开关管是NMOS(Negative channel Metal Oxide Semiconductor，N沟道MOS)管，如图中NMOS所示，泄压单元130还包括第一滤波电容C1和等效电阻R3； 滤波单元140包括第二滤波电容C2。
其中，开关管NMOS的漏极与电压输出端Vo的正极相连，开关管NMOS的源极分别与第一滤波电容C1的第一端和等效电阻R3的第一端相连，电压输出端Vo的负极分别与第一滤波电容C1的第二端和等效电阻R3的第二端相连，开关管NMOS的栅极与误差放大器A1的输出端相连，第一分压电阻R1的第一端与电压输出端Vo的正极相连，第一分压电阻R1的第二端与第二分压电阻R2的第一端相连，第二分压电阻R2的第二端与电压输出端Vo的负极相连，误差放大器A1的正输入端与第一分压电阻R1的第二端相连，误差放大器A1的负输入端接入第一参考电压Vref1，误差放大器A1的输出端还与功率管MOSFET的栅极相连，功率管MOSFET的源极与电压输入端Vi的正极相连，功率管MOSFET的漏极与电压输出端Vo的正极相连，第二滤波电容C2的第一端与电压输出端Vo的正极相连，第二滤波电容C2的第二端与电压输出端Vo的负极相连。
下面将结合图2具体地说明电压调整器的工作原理：
电压输入端Vi上电且电压输出端Vo外接负载后，电压调整器的电路处于工作状态。设电压输入端Vi的正极的电压为Vin，电压输出端Vo的正极的电压为Vout，电压输入端Vi与电压输出端Vo的压降为Vdrop，则Vout＝Vin-Vdrop。其中，传统的电压调整器(如78xx系列的芯片)都要求Vdrop大于2V，否则就不能正常工作，在一些Vdrop小于2V的情况下(如Vin＝5V，Vout＝3.3V，此时Vdrop＝1.7V<2V)，传统的电压调整器不能满足要求。针对上述情况，本发明实施例选取P-Power-MOSFET管作为变压器件以实现低跌落的电压调节器，具体的，P-Power-MOSFET的源极和漏极间的电阻Rds非常小，故在线性工作区内的P-Power-MOSFET的源极和漏极的压降可小于2V，可实现低跌落电压。
进一步地，回路“1→2→3→4”构成反馈环，当电压输出端Vo的正极的输出电压高于预设阈值时，误差放大器A1的正输入端的电压和第一参考电压Vref1的差值增大，由误差放大器的“输入-输出”特性可知，误差放大器A1的输出端的输出电流根据上述差值增大而减小。由于此时P-Power-MOSFET管工作在线性工作区，故P-Power-MOSFET管的源极和漏极的压降随误差放大器A1的输出电流减小而增大(具体原理可参考P-Power-MOSFET管的特 性曲线，这里不再赘述)。再根据Vout＝Vin-Vdrop可知，若Vdrop增大，则Vout减小，因而电压输出端Vo的正极的输出电压将减小，直至恢复到预设阈值。例如：假设Vin＝5V，Vout的预设阈值为3.3V，Vref1＝1V，且R1＝R2，误差放大器A1的正输入端的采样电压Vreg＝1.65V，即(Vreg-Vref1)＝0.65V，当Vout从3.3V跳变为4V时，Vreg增大为2V，此时(Vreg-Vref1)＝1V>0.65V，进而误差放大器A1的输出电流根据(Vreg-Vref1)的增大值对应地减小，以使P-Power-MOSFET管的源极和漏极的压降增大，直至增大0.7V，从而Vout＝4V-0.7V＝3.3V，重新恢复预设阈值。同理可知，相反地，当电压输出端Vo的正极的输出电压低于预设阈值时，电压输出端Vo的正极的输出电压增大，直至恢复到预设阈值。本发明实施例实现了稳定电压调整器的输出电压的作用。
另外，电容C2构成简单的滤波单元140，滤除电压输出端Vo夹杂的非直流电，即杂波。滤波单元140并不仅限于只包括电容C2。
需要指出的是，第一，上述反馈环(即反馈控制单元120)虽然可实现稳定电压输出端Vo的输出电压的作用，但整个反馈过程延时较长，而杂波的抖动延时较短，不能快速响应，第二，上述电容C2(即滤波单元140)中的C1的电容值越大，滤波能力越强，但输出电压变化的延时也将增大，同时制作电容的难度系数也随之增大。由此可见，仅包含反馈控制单元120和RC滤波单元140的电压调整器并不完善。因而，电压调整器的电路还包括了泄压单元130，具体地，当电压输出端Vo的输出电压发生跳变(即输出电压值在短时间发生较大变化)时，误差放大器A1的正输入端的电压和第一参考电压Vref1的差值增大，误差放大器A1的输出端的输出电压根据上述差值增大而增大，所述开关管的栅极的电压将大于所述开关管的开启电压，开关管NMOS导通，进而由第一滤波电容C1和等效电阻R3构成的滤波网络来滤除电压输出端Vo的正极的杂波，从而减少了尖刺脉冲，提高了电压调整器的抗噪性能。
图3是本发明实施例中的可选的另一种电压调整器的电路的原理图。图3和图2中的电路区别在于变压单元110和反馈控制单元120，图2为模拟反馈方式下的电路图，图3为数字反馈方式下的电路图。需要指出的是，泄压单元130和滤波单元140的工作原理在本实施不再赘述。
作为一种可选的实施例，变压单元110包括至少三个PMOS(Positive channel Metal Oxide Semiconductor，P沟道MOS)管，如图中PMOS所示；反馈控制单元120的输出端包括第一输出端和第二输出端，分别如图中端点5和端点6所示，反馈控制单元120包括第一分压电阻R1、第二分压电阻R2、数字比较器A2以及数字控制器A3，数字控制器A3的输出端的端口个数不少于PMOS管的个数。
其中，第一分压电阻R1的第一端与电压输出端Vo的正极相连，第一分压电阻R1的第二端与第二分压电阻R2的第一端相连，第二分压电阻R2的第二端与电压输出端Vo的负极相连，数字比较器A2的正输入端与第一分压电阻R1的第二端相连，数字比较器A2的负输入端接入第二参考电压Vref2，数字比较器A2的输出端分别与数字控制器A3的输入端和开关管NMOS的栅极相连，数字控制器A3的各个输出端分别与对应的PMOS管的栅极相连。
具体地，下面将结合图3说明变压单元110和反馈控制单元120的工作原理：
电压输入端Vi上电且电压输出端Vo外接负载后，电压调整器的电路处于工作状态。回路“1→2→3→4→5”构成反馈环，当电压输出端Vo的正极的输出电压高于预设阈值时，数字比较器A2的正输入端的电压和第二参考电压Vref2的差值增大，进而数字比较器A2的输出电压根据上述差值增大而增大，即数字控制器A3的输入端的电压增大。其中，数字控制器(DC，Digital Controller)为一种常见的电子控制器，一般与电路中反馈部分相连，包括A/D转换或D/A转换，通常是通过计算机软件编程或逻辑电路，完成特定的控制算法。数字控制器A3根据数字比较器A2的输出电压的增大值对应地减少导通的PMOS管的个数，由于导通的PMOS管的漏极和源极间存在电阻Rds，若并联的电阻Rds减少，则导通的PMOS管的总电阻将增大，其压降也增大，再根据Vout＝Vin-Vdrop可知，Vdrop增大，Vout减小，因而电压输出端Vo的正极的输出电压减小。例如：假设电路中有4个PMOS管，数字控制器A3的输出端的输出字节为“0011”，即PMOS管M1和M2导通，M3和M4不导通，且Vin＝5V，Vout的预设阈值为3.3V，Vref1＝1V，且R1＝R2，数字比较器A2的正输入端的采样电压Vreg＝1.65V，那么，当Vout从3.3V跳变为4V时，Vreg增大为2V，此时(Vreg-Vref1)＝1V>0.65V，数字比较器A2输出端的输出电压 根据(Vreg-Vref1)的增大值对应地增大，数字控制器A3分析数字比较器A2的输出电压后输出字节“0111”，即只控制PMOS管M1导通，M1的电阻相对于并联的M1和M2的电阻有所增大，以使导通的PMOS管的总压降增大0.7，从而Vout＝4V-0.7V＝3.3V，重新恢复预设阈值。同理可知，相反地，当电压输出端Vo的正极的输出电压低于预设阈值时，电压输出端Vo的正极的输出电压增大。本发明实施例实现了稳定电压调整器的输出电压的作用。需要指出的是，PMOS管的个数越多，变压单元110变压的精度越高。
本发明实施例中的反馈控制单元根据电压输出端的电压改变变压单元的压降，从而将电压调整器的输入电压与输出电压差额维持在额定值之内，滤波单元可滤除电压输出端输出电压中的杂波，进一步地，在电压输出端的电压发生跳变时，响应滤波单元中的开关管导通，导通的开关管可泄放电压输出端的杂波。
以上对本发明实施例所提供的电压调整器的电路进行了详细介绍，本文中应用了具体个例对本发明的原理及实施方式进行了阐述，以上实施例的说明只是用于帮助理解本发明的方法及其核心思想；同时，对于本领域的一般技术人员，依据本发明的思想，在具体实施方式及应用范围上均会有改变之处，综上所述，本说明书内容不应理解为对本发明的限制。

Claims (11)

  1. 一种电压调整器的电路，其特征在于，所述电路包括电压输入端、变压单元、反馈控制单元、泄压单元以及电压输出端，其中：
    所述变压单元的第一端与所述电压输入端的正极相连，所述变压单元的第二端与所述电压输出端的正极相连，所述反馈控制单元的输入端与所述电压输出端的正极相连，所述反馈控制单元的输出端与所述变压单元的受控端相连，所述泄压单元的第一端与所述电压输出端的正极相连，所述泄压单元的第二端与所述电压输出端的负极相连，所述泄压单元的第三端与所述反馈控制单元的输出端相连；
    所述反馈控制单元用于在所述电压输出端的正极的输出电压高于或低于预设阈值时对应地降低或升高所述变压单元的压降以稳定所述电压输出端的正极的输出电压，所述泄压单元包括开关管，所述反馈控制单元还用于在所述电压输出端的正极的输出电压跳变时导通所述开关管，所述开关管用于在导通时泄放所述电压输出端的正极的杂波。
  2. 如权利要求1所述的电压调整器的电路，其特征在于，所述泄压单元还包括第一滤波电容和等效电阻，所述开关管是NMOS(Negative channel Metal Oxide Semiconductor，N沟道MOS)管，其中：
    所述开关管的漏极与所述电压输出端的正极相连，所述开关管的源极分别与所述第一滤波电容的第一端和所述等效电阻的第一端相连，所述开关管的栅极与所述反馈控制单元的输出端相连，所述电压输出端的负极分别与所述第一滤波电容的第二端和所述等效电阻的第二端相连。
  3. 如权利要求2所述的电压调整器的电路，其特征在于，当所述电压输出端的正极的输出电压发生跳变时，所述反馈控制单元的输出端的输出电压增大，所述开关管的栅极的电压将大于所述开关管的开启电压，进而所述开关管导通，所述第一滤波电容和所述等效电阻构成的滤波网络将滤除所述电压输出端的正极的杂波。
  4. 如权利要求1所述的电压调整器的电路，其特征在于，所述电路还包括滤波单元，所述滤波单元的第一端与所述电压输出端的正极相连，所述滤波单元的第二端与所述电压输出端的负极相连；
    所述滤波单元用于滤除所述电压输出端的正极的杂波。
  5. 如权利要求4所述的电压调整器的电路，其特征在于，所述滤波单元包括第二滤波电容，所述第二滤波电容的第一端与所述电压输出端的正极相连，所述第二滤波电容的第二端与所述电压输出端的负极相连。
  6. 如权利要求1所述的电压调整器的电路，其特征在于，所述反馈控制单元包括第一分压电阻、第二分压电阻以及误差放大器，其中：
    所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述误差放大器的正输入端与所述第一分压电阻的第二端相连，所述误差放大器的负输入端接入第一参考电压，所述误差放大器的输出端分别与所述变压单元的受控端和所述泄压单元的第三端相连。
  7. 如权利要求6所述的电压调整器的电路，其特征在于，所述变压单元包括P-Power-MOSFET(Positive channel-Power-Metal Oxide Semiconductor Field Effect Transistor，P沟道功率MOS场效应晶体)管，其中，所述P-Power-MOSFET管的源极与所述电压输入端的正极相连，所述P-Power-MOSFET管的漏极与所述电压输出端的正极相连，所述P-Power-MOSFET管的栅极与所述误差放大器的输出端相连。
  8. 如权利要求7所述的电压调整器的电路，其特征在于，
    当所述电压输出端的正极的输出电压高于预设阈值时，所述误差放大器的正输入端的电压和所述第一参考电压的差值增大，进而所述误差放大器的输出端的输出电流减小，所述P-Power-MOSFET管的源极和漏极的压降增大，进而所述电压输出端的正极的输出电压减小；
    当所述电压输出端的正极的输出电压低于预设阈值时，所述误差放大器的正输入端的电压和所述第一参考电压的差值减小，进而所述误差放大器的输出端的输出电流增大，所述P-Power-MOSFET管的源极和漏极的压降减小，进而所述电压输出端的正极的输出电压增大。
  9. 如权利要求1所述的电压调整器的电路，其特征在于，所述反馈控制单元的输出端包括第一输出端和第二输出端，所述反馈控制单元的第一输出端与所述变压单元的受控端相连，所述反馈控制单元的第二输出端与所述泄压单元的第三端相连，
    所述反馈控制单元包括第一分压电阻、第二分压电阻、数字比较器以及数字控制器，其中：
    所述第一分压电阻的第一端与所述电压输出端的正极相连，所述第一分压电阻的第二端与所述第二分压电阻的第一端相连，所述第二分压电阻的第二端与所述电压输出端的负极相连，所述数字比较器的正输入端与所述第一分压电阻的第二端相连，所述数字比较器的负输入端接入第二参考电压，所述数字比较器的输出端分别与所述数字控制器的输入端和所述泄压单元的第三端相连，所述数字控制器的输出端与所述变压单元的受控端相连。
  10. 如权利要求9所述的电压调整器的电路，其特征在于，所述变压单元包括至少三个PMOS(Positive channel Metal Oxide Semiconductor，P沟道MOS)管，所述数字控制器的输出端的端口个数不少于所述PMOS管的个数，其中，每个所述PMOS管的源极均与所述电压入出端的正极相连，所述每个PMOS管的漏极均与所述电压输出端的正极相连，所述每个PMOS管的栅极与所述数字控制器的输出端的对应端口相连。
  11. 如权利要求10所述的电压调整器的电路，其特征在于，
    当所述电压输出端的正极的输出电压高于预设阈值时，所述数字比较器的正输入端的电压和所述第二参考电压的差值增大，进而所述误差放大器的输出端的输出电压增大，所述数字控制器将减少导通的所述PMOS管的个数，所述导通的PMOS管的总阻值增大，所述导通的PMOS管的源极和漏极的总 压降增大，进而所述电压输出端的正极的输出电压减小；
    当所述电压输出端的正极的输出电压低于预设阈值时，所述数字比较器的正输入端的电压和所述第二参考电压的差值减小，进而所述误差放大器的输出端的输出电压减小，所述数字控制器将增加导通的所述PMOS管的个数，所述导通的PMOS管的总阻值减少，所述导通的PMOS管的源极和漏极的总压降减小，进而所述电压输出端的正极的输出电压增大。
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108319318A (zh) * 2018-04-09 2018-07-24 艾乐德电子（南京）有限公司 一种输出电压瞬间跌落和跃升幅值可控的开关电源及方法
CN110738835A (zh) * 2019-11-12 2020-01-31 无锡蓝天电子股份有限公司 一种带上位机通讯接口功能的家用火灾报警控制器
CN112953311A (zh) * 2021-03-03 2021-06-11 珞石（北京）科技有限公司 一种滞回比较的电压泄放电路
CN116056286A (zh) * 2023-04-03 2023-05-02 东莞锐视光电科技有限公司 降低光源电路压降的方法、装置、介质及电子设备

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104079177B (zh) * 2014-06-24 2017-06-20 华为技术有限公司 一种电压调整器的电路
CN110168894B (zh) 2017-08-16 2020-07-28 华为技术有限公司 一种调压电路
CN113655837A (zh) * 2021-07-23 2021-11-16 成都华微电子科技有限公司 快速瞬态响应的线性稳压器
CN116073655A (zh) * 2023-01-28 2023-05-05 深圳通锐微电子技术有限公司 升压转换电路
CN116054594B (zh) * 2023-04-01 2023-06-23 苏州美思迪赛半导体技术有限公司 一种同时具备模拟反馈和数字反馈的开关电源系统

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090256540A1 (en) * 2008-04-11 2009-10-15 Ta-Yung Yang Low drop-out regulator providing constant current and maximum voltage limit
CN102204072A (zh) * 2011-04-13 2011-09-28 华为技术有限公司 迟滞控制转换电路和供电系统
CN103346678A (zh) * 2013-07-11 2013-10-09 广州金升阳科技有限公司 一种有源钳位反激电路的辅开关管隔离驱动电路
CN104079177A (zh) * 2014-06-24 2014-10-01 华为技术有限公司 一种电压调整器的电路

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7671663B2 (en) * 2006-12-12 2010-03-02 Texas Instruments Incorporated Tunable voltage controller for a sub-circuit and method of operating the same
CN102148564B (zh) * 2010-02-10 2014-08-13 上海华虹宏力半导体制造有限公司 电压转换电路
CN101819448A (zh) * 2010-04-02 2010-09-01 上海北京大学微电子研究院 线性电压调节器
CN202997918U (zh) * 2012-12-11 2013-06-12 深圳国微技术有限公司 一种电源芯片输出电压纹波抑制电路
CN103135648B (zh) * 2013-03-20 2015-01-21 电子科技大学 低压差线性稳压器
CN104065268B (zh) * 2014-06-17 2017-12-05 华为技术有限公司 一种片上供电网络

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090256540A1 (en) * 2008-04-11 2009-10-15 Ta-Yung Yang Low drop-out regulator providing constant current and maximum voltage limit
CN102204072A (zh) * 2011-04-13 2011-09-28 华为技术有限公司 迟滞控制转换电路和供电系统
CN103346678A (zh) * 2013-07-11 2013-10-09 广州金升阳科技有限公司 一种有源钳位反激电路的辅开关管隔离驱动电路
CN104079177A (zh) * 2014-06-24 2014-10-01 华为技术有限公司 一种电压调整器的电路

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108319318A (zh) * 2018-04-09 2018-07-24 艾乐德电子（南京）有限公司 一种输出电压瞬间跌落和跃升幅值可控的开关电源及方法
CN108319318B (zh) * 2018-04-09 2024-04-12 艾乐德电子（南京）有限公司 一种输出电压瞬间跌落和跃升幅值可控的开关电源及方法
CN110738835A (zh) * 2019-11-12 2020-01-31 无锡蓝天电子股份有限公司 一种带上位机通讯接口功能的家用火灾报警控制器
CN112953311A (zh) * 2021-03-03 2021-06-11 珞石（北京）科技有限公司 一种滞回比较的电压泄放电路
CN116056286A (zh) * 2023-04-03 2023-05-02 东莞锐视光电科技有限公司 降低光源电路压降的方法、装置、介质及电子设备

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