WO2015165329A1 - 控制方法和控制设备 - Google Patents

控制方法和控制设备 Download PDF

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Publication number
WO2015165329A1
WO2015165329A1 PCT/CN2015/076666 CN2015076666W WO2015165329A1 WO 2015165329 A1 WO2015165329 A1 WO 2015165329A1 CN 2015076666 W CN2015076666 W CN 2015076666W WO 2015165329 A1 WO2015165329 A1 WO 2015165329A1
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WIPO (PCT)
Prior art keywords
controller
data
router
firmware code
identifier
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PCT/CN2015/076666
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English (en)
French (fr)
Inventor
马久跃
包云岗
任睿
隋秀峰
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华为技术有限公司
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Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to JP2016565343A priority Critical patent/JP6479045B2/ja
Priority to KR1020167032928A priority patent/KR101984150B1/ko
Priority to EP15785280.7A priority patent/EP3131241B1/en
Publication of WO2015165329A1 publication Critical patent/WO2015165329A1/zh
Priority to US15/337,498 priority patent/US10579394B2/en

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4411—Configuring for operating with peripheral devices; Loading of device drivers
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/40—Bus structure
    • G06F13/4004—Coupling between buses
    • G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs
    • G06F9/4401—Bootstrapping
    • G06F9/4406—Loading of operating system

Definitions

  • Embodiments of the present invention relate to computer technologies, and in particular, to a control method and a control device.
  • I/O chipset is an important component of a computer system. Its basic function is to connect a central processing unit (CPU) and an I/O device. Data path between the I/O device.
  • CPU central processing unit
  • I/O device Data path between the I/O device.
  • the I/O chipset includes a Quick Path Interconnect (QPI) bus interface connected to the CPU, and a Peripheral Component Interconnect Express connected to the I/O device.
  • QPI Quick Path Interconnect
  • PCIE Peripheral Component Interconnect Express
  • other functional modules such as: functional modules that implement encryption functions, however, whether it is a QPI interface, a PCIE interface or some other functional modules, the functions implemented are solidified in the chipset, That is, once the I/O chipset is manufactured, its functions cannot be changed. Therefore, the implementation of the I/O chipset is not flexible.
  • an embodiment of the present invention provides a control method and a control device.
  • a first aspect of the embodiments of the present invention provides a control method, including:
  • the router receives data sent by the first device, where the data carries an identifier of the I/O device;
  • the second device or the first device is the I/O device.
  • the controller is based on the control
  • the firmware code stored in the device processes the data, including:
  • the firmware code stored in the memory is called to process the data in the buffer.
  • the determining the I/O device according to the correspondence between the I/O device and the controller and the identifier of the I/O device Before identifying the corresponding controller it also includes:
  • the method further includes:
  • the firmware code is loaded into the controller by a basic input/output system BIOS or an operating system OS.
  • the method further includes:
  • the method further includes:
  • the firmware code of the controller is modified according to the functional requirements of the I/O device.
  • a second aspect of the embodiments of the present invention provides a control method, including:
  • the controller receives the data and processes the data according to a firmware code stored in the controller
  • the controller transmits the processed data to the second device when the data is received from the first device; or the controller when the data is received from the first device by the router Sending the processed data to the router, so that the router sends the processed data to the second device;
  • the second device or the first device is an I/O device.
  • the method further includes: the controller processing the data according to the firmware code stored in the controller, including:
  • the firmware code stored in the memory is called to process the data in the buffer.
  • the method further includes:
  • the firmware code is loaded into the controller by a basic input/output system BIOS or an operating system OS.
  • the method further includes:
  • the firmware code of the controller is modified according to the functional requirements of the I/O device.
  • a third aspect of the embodiments of the present invention provides a control device, including:
  • a router and at least two controllers
  • the router is configured to receive data sent by the first device, where the data carries an identifier of the I/O device, and according to the correspondence between the I/O device and the controller and the identifier of the I/O device, Determining, by the controller, the identifier corresponding to the identifier of the I/O device in the at least two controllers, and transmitting the data to a controller corresponding to the identifier of the I/O device;
  • a controller corresponding to the identifier of the I/O device, configured to process the data according to a firmware code stored in the controller, obtain processed data, and send the processed data to the router;
  • the router is further configured to send the processed data to the second device;
  • the second device or the first device is the I/O device.
  • the controller includes:
  • a memory for storing the firmware code
  • a buffer for storing the data read by the processor from the queue of the controller
  • the processor is configured to invoke the firmware code stored in the memory to process data in the buffer, obtain processed data, and send the processed data to the router.
  • the router is further configured to perform, according to a functional requirement of the I/O device and a function implemented by the at least two controllers, Establish a correspondence between the I/O device and the controller.
  • the controller is further configured to receive the firmware loaded by the basic input/output system BIOS or the operating system OS Code.
  • the router further includes:
  • the router programming interface is configured to modify the correspondence between the I/O device and the controller according to the functional requirements of the I/O device.
  • the controller further includes:
  • Controller programming interface for modifying the firmware code of the controller according to the functional requirements of the I/O device.
  • the control method and the control device provided by the embodiment of the present invention receive data sent by the first device by using a router, where the data carries the identifier of the I/O device, according to the correspondence between the I/O device and the controller, and the I/O device. Identifying, determining a controller corresponding to the identifier of the I/O device, and transmitting the data to a controller corresponding to the identifier of the I/O device, so that the controller processes the data according to the firmware code stored in the controller, and receives the control
  • the processed data sent by the device sends the processed data to the second device, and the second device or the first device is an I/O device. Since the firmware code is generally programmable in the embodiment of the present invention, the control device (specifically, the I/O chipset) having the above control method is relatively flexible.
  • FIG. 1 is a schematic structural view of an I/O chipset in the prior art
  • Embodiment 1 of a control method according to the present invention
  • FIG. 3 is a schematic structural view of a controller of the present invention.
  • Embodiment 4 is a schematic flowchart of Embodiment 2 of a control method according to the present invention.
  • FIG. 5 is a schematic structural diagram of an embodiment of a control device according to the present invention.
  • FIG. 1 is a schematic diagram of the structure of the I/O chipset in the prior art. As can be seen from Figure 1, the I/O chipset The CPU bus interface and the I/O bus interface are included.
  • the CPU bus interface in FIG. 1 is illustrated by a Quick Path Interconnect (QPI) bus interface.
  • QPI Quick Path Interconnect
  • the QPI bus interface is only one of the CPU bus interfaces, QPI.
  • the bus interface is used to connect to the CPU.
  • the I/O bus interface in Figure 1 is exemplified by the Peripheral Component Interconnect Express (PCIE) bus interface of the device connection.
  • PCIE Peripheral Component Interconnect Express
  • the PCIE bus interface is just one of the I/O.
  • O bus interface for connecting I/O devices.
  • the implemented functions are solidified in the chipset, I/.
  • the implementation of the O chipset is not flexible.
  • the implementation of the I/O chipset is inflexible.
  • the data sent by the first device is received by the router, according to the identifier of the I/O device carried in the data, and I.
  • Corresponding relationship between the /O device and the controller determining a controller corresponding to the identifier of the I/O device, and storing a firmware code corresponding to the firmware code, for example, implementing encryption or decryption , compression and / or bandwidth allocation.
  • the router sends the above data to the controller corresponding to the identifier of the I/O device, the controller processes the data, and sends the processed data to the router, and the router sends the processed data of the controller to the second device, where
  • the first device or the second device is an I/O device, that is, if the first device refers to the CPU, and the second device refers to the I/O device, if the first device refers to It is the I/O device, and the second device refers to the CPU. Since the firmware code is generally programmable in the embodiment of the present invention, the control device (specifically, the I/O chipset) having the above control method is relatively flexible.
  • Embodiment 1 of a control method of the present invention. As shown in FIG. 2, the method in this embodiment includes:
  • S201 The router receives the data sent by the first device.
  • the data sent by the first device carries the identifier of the I/O device.
  • the first device may be a CPU or an I/O device.
  • the above data may be data sent by the CPU to the I/O device, or data sent by the I/O device to the CPU, whether sent by the CPU to the I/O device or I/.
  • the O device is sent to the CPU, and the data carries the identifier of the I/O device.
  • the identifier of the I/O device may be the name of the I/O device or the number of the I/O device. As long as you can uniquely identify the I / O device.
  • S202 Determine a controller corresponding to the identifier of the I/O device according to the correspondence between the I/O device and the controller and the identifier of the I/O device.
  • the router stores the correspondence between the I/O device and the controller.
  • a controller can implement one or a group of functions, such as encryption, decryption, compression, and/or bandwidth allocation.
  • the correspondence between the I/O device and the controller is usually established according to the functional requirements of the I/O device and the functions implemented by the controller.
  • the function requirement of the I/O device 1 is to encrypt the data communicated with the CPU.
  • the function implemented by the controller 1 is an encryption function, and the correspondence relationship between the I/O device 1 and the controller 1 is established;
  • the function requirement of the I/O device 2 is that the data communicated with the CPU is to be compressed, and the controller 3
  • the function implemented is the compression function, and the correspondence between the I/O device 2 and the controller 3 is established; the correspondence between the other I/O devices and the controller is similar, and details are not described herein again.
  • controller 1 implements encryption function
  • controller 2 implements bandwidth allocation function
  • controller 3 implements compression function
  • controller 4 implements decryption function
  • the functional requirements of the I/O device 1 are changed from the previous encryption requirement to the compression requirement, and the controller 3 can implement the compression function. Therefore, it is only necessary to modify the correspondence between the previous I/O device 1 and the controller 1 as an I/O device. 1 Correspondence with controller 3.
  • the controller in the I/O chipset does not have the functional requirements for implementing the I/O device change, usually through the I/O device.
  • the functional requirements modify the controller's firmware code.
  • the function implemented by the controller 1 can be modified from the previous encryption to the delay control.
  • the modification of the functions implemented by the controller is usually to modify the firmware code stored in the controller, the memory in the controller can store different firmware codes, and the processor in the controller is called by different
  • the firmware code is processed so that the controller can implement different functions.
  • the firmware code is generally programmable in the embodiment of the present invention, the control device (specifically, the I/O chipset) having the above control method is relatively flexible.
  • Another implementation manner is to modify the function of the controller and the correspondence between the I/O device and the controller, as long as the established relationship satisfies the functional requirements of the I/O device. It is the same as the function implemented by the controller, and will not be described here.
  • the firmware code in the controller is usually loaded into the controller by the basic input/output system (Basic Input/Output System, BIOS) or the operating system (Operating System, OS).
  • BIOS Basic Input/Output System
  • OS Operating System
  • the controller loads the firmware code, the correspondence between the I/O device and the controller is established.
  • the correspondence between the I/O device and the controller may be established first, and then the corresponding code is loaded into the controller according to the corresponding relationship.
  • the invention is not limited.
  • S203 Send data to a controller corresponding to the identifier of the I/O device, so that the controller processes the data according to the firmware code stored in the controller.
  • the router sends the above data to the controller corresponding to the identifier of the I/O device, and the controller processes the data.
  • FIG. 3 is a schematic structural diagram of a controller according to the present invention.
  • the controller includes a queue, a buffer, a processor, and a memory.
  • the memory stores the firmware code
  • the queue stores the data sent by the router.
  • the router after receiving the data communicated between the CPU and the I/O device, the router sends the data to the control according to the identifier of the I/O device carried in the data.
  • the controller's processor reads data from the controller's queue to the buffer, calls the firmware code stored in the memory to process the data in the buffer, and returns the processed data to the router.
  • S204 Receive processed data sent by the controller.
  • the controller After the controller processes the data according to the stored firmware code, it returns the data to the router, and the router receives the processed data sent by the controller.
  • S205 Send the processed data to the second device.
  • the router sends the processed data to the second device.
  • the second device or the first device is an I/O device. That is, if the first device refers to the CPU and the second device refers to the I/O device, if the first device refers to the I/O device and the second device refers to the CPU.
  • the technical solution of the present invention is data sent by the CPU to the I/O device or data sent by the I/O device to the CPU. Both apply.
  • the controller can implement different functions by loading different codes, that is, the function of the controller is variable, and the correspondence between the I/O device and the controller in the router can also be based on the function of the I/O device.
  • the demand changes and is modified. Therefore, the I/O chipset with the above router and controller can implement different functions, and the implementation is very flexible.
  • Embodiment 2 is a schematic flowchart of Embodiment 2 of a control method of the present invention. Specifically, the method in this embodiment is as follows:
  • S401 The controller receives the data, and processes the data according to the firmware code stored in the controller.
  • the structure of the controller can be seen in FIG. 3. Specifically, the controller stores the received data in a queue, and the processor in the controller reads data from the controller queue to the buffer, and calls the firmware code pair stored in the memory. The data in the buffer is processed.
  • the controller receives data from the router.
  • the controller receives data from the first device, and the first device may be a CPU or an I/O device, when the first device is a CPU.
  • the second device is an I/O device, and when the first device is an I/O device, the second device is a CPU.
  • firmware code stored in the controller is usually loaded into the controller through the BIOS or the OS when the system is booted.
  • the firmware code of the controller can also be modified according to the functional requirements of the I/O device. The specific description of the embodiment shown in FIG. 2 is not described here.
  • S402 when the data is received from the first device, the controller sends the processed data to the second device; or when the data is received by the router from the first device, the controller sends the processed data to the router. So that the router sends the processed data to the second device.
  • the processed data is directly sent to the second device; in the scenario with the router, after the controller processes the data, the processed data is processed. Returned to the router and sent to the second device through the router.
  • the data is received by the controller, and the data is processed according to the firmware code stored in the controller.
  • the controller sends the processed data to the second device; or
  • the controller sends the processed data to the router, so that the router sends the processed data to the second device. Since the firmware code is generally programmable in the embodiment of the present invention, the control device (specifically, the I/O chipset) having the above control method is flexible.
  • FIG. 5 is a schematic structural diagram of an embodiment of a control device according to the present invention.
  • the control device of the embodiment is disposed on an I/O chipset in a computer.
  • the structure of the control device in this embodiment includes a router 501 and at least two controllers 502. Only the four controllers are shown in FIG. 5, and the number of the controllers may be set according to the actual application. For this reason, the invention does not limit the router, and the router in the control device is used to receive the data sent by the first device.
  • the data carries the identifier of the I/O device, and the router determines, according to the correspondence between the I/O device and the controller and the identifier of the I/O device, a controller corresponding to the identifier of the I/O device in the at least two controllers. And sending the foregoing data to the controller corresponding to the identifier of the I/O device; the controller corresponding to the identifier of the I/O device processes the data according to the firmware code stored in the controller, and obtains the processed data, and sends the processed data to the router.
  • the processed data; the router is further configured to send the processed data to the second device.
  • the second device or the first device is the above I/O device.
  • the controller includes a memory, a buffer, a queue, and a processor, wherein the memory is used to store firmware code, and the queue is used for receiving.
  • the data sent by the router, the buffer is used to store the data read by the processor from the controller's queue, and the processor is used to call the firmware code stored in the memory to process the data in the buffer, obtain the processed data, and The router sends the processed data.
  • the working process of the controller refer to the detailed description of the method embodiment shown in FIG. 2, and details are not described herein again.
  • controllers may share the same memory storage firmware code, and the processor may call the corresponding firmware code during processing.
  • the router is further configured to establish a correspondence between the I/O device and the controller according to the functional requirements of the I/O device and the functions implemented by the at least two controllers.
  • the router is further configured to establish a correspondence between the I/O device and the controller according to the functional requirements of the I/O device and the functions implemented by the at least two controllers.
  • the controller is further configured to receive the firmware code loaded by the BIOS or the OS.
  • the firmware code loaded by the BIOS or the OS.
  • the router further includes a router editing interface, configured to modify the correspondence between the I/O device and the controller according to the functional requirements of the I/O device.
  • a router editing interface configured to modify the correspondence between the I/O device and the controller according to the functional requirements of the I/O device.
  • the controller further includes a controller programming interface for the I/O device according to the The function requirement is to modify the firmware code of the controller, and specifically, under what circumstances, how to modify the detailed description of the method embodiment shown in FIG. 2, and details are not described herein again.
  • control device provided by the present invention can be seen from the above description, the controller of the control device can implement different functions by loading different firmware codes, and the correspondence relationship of the routers of the control device can be modified according to changes of user requirements, thereby making The I/O chipset with this control device can implement different functions according to requirements, and its implementation is very flexible.
  • the aforementioned program can be stored in a computer readable storage medium.
  • the program when executed, performs the steps including the foregoing method embodiments; and the foregoing storage medium includes various media that can store program codes, such as a ROM, a RAM, a magnetic disk, or an optical disk.

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Abstract

一种控制方法和控制设备，通过路由器接收第一设备发送的数据（201），上述数据中携带I/O设备的标识，根据I/O设备与控制器的对应关系和I/O设备的标识，确定I/O设备的标识对应的控制器（202），将数据发送到I/O设备的标识对应的控制器，以使控制器根据该控制器中存储的固件代码对数据进行处理（203），接收控制器发送的处理后的数据（204），将处理后的数据发送给第二设备（205），第二设备或者第一设备为I/O设备，由于通常固件代码是可以编程的，因此，具有应用上述控制方法的控制设备实现比较灵活。

Description

控制方法和控制设备 技术领域
本发明实施例涉及计算机技术，尤其涉及一种控制方法和控制设备。
背景技术
输入输出(Input/Output，以下简称：I/O)芯片组是计算机系统中的重要部件，其基本功能是连接中央处理器(Central Processing Unit，以下简称：CPU)和I/O设备，是CPU和I/O设备之间的数据通路。
现有技术中，I/O芯片组包含了与CPU连接的快速通道互联(Quick Path Interconnect，以下简称：QPI)总线接口、与I/O设备连接的快速外围部件互连(Peripheral Component Interconnect Express，以下简称：PCIE)总线接口、以及其它一些功能模块，例如：实现加密功能的功能模块，然而，无论是QPI接口、PCIE接口还是其它一些功能模块，实现的功能都是固化在芯片组中，也就是，I/O芯片组一经生产制造，其具有的功能便不可改变，因此，I/O芯片组的实现不灵活。
发明内容
为解决上述现有技术问题，本发明实施例提供一种控制方法和控制设备。
本发明实施例第一方面提供一种控制方法，包括：
路由器接收第一设备发送的数据，所述数据中携带I/O设备的标识；
根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述I/O设备的标识对应的控制器；
将所述数据发送到所述I/O设备的标识对应的控制器，以使所述控制器根据所述控制器中存储的固件代码对所述数据进行处理；
接收所述控制器发送的所述处理后的数据；
将所述处理后的数据发送给第二设备；
所述第二设备或者所述第一设备是所述I/O设备。
结合第一方面，在第一种可能的实现方式中，所述控制器根据所述控制 器中存储的固件代码对所述数据进行处理，包括：
从所述控制器的队列中读取所述数据到缓冲区；
调用存储器中存储的所述固件代码对所述缓冲区中的数据进行处理。
结合第一种可能的实现方式，在第二种可能的实现方式中，所述根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述I/O设备的标识对应的控制器之前，还包括：
根据所述I/O设备的功能需求和所述控制器实现的功能，建立所述I/O设备与控制器的对应关系。
结合第一种可能的实现方式，在第三种可能的实现方式中，还包括：
通过基本输入/输出系统BIOS或操作系统OS将所述固件代码加载到所述控制器中。
结合第一种至第三种可能的实现方式中任一种可能的实现方式，在第四种可能的实现方式中，还包括：
根据所述I/O设备的功能需求修改所述I/O设备与控制器的对应关系。
结合第一种至第三种可能的实现方式中任一种可能的实现方式，在第五种可能的实现方式中，还包括：
根据所述I/O设备的功能需求修改所述控制器的固件代码。
本发明实施例第二方面提供一种控制方法，包括：
控制器接收数据，并且根据所述控制器中存储的固件代码对所述数据进行处理；
当所述数据是从第一设备接收的时候，所述控制器将所述处理后的数据发送给第二设备；或当所述数据是通过路由器从第一设备接收的时候，所述控制器将所述处理后的数据发送给所述路由器，以使所述路由器将所述处理后的数据发送给第二设备；
所述第二设备或者所述第一设备是I/O设备。
结合第二方面，在第一种可能的实现方式中，所述方法还包括：所述控制器根据所述控制器中存储的固件代码对所述数据进行处理，包括：
从所述控制器的队列中读取所述数据到缓冲区；
调用存储器中存储的所述固件代码对所述缓冲区中的数据进行处理。
结合第二方面的第一种可能的实现方式，在第二种可能的实现方式中， 所述方法还包括：
通过基本输入/输出系统BIOS或操作系统OS将所述固件代码加载到所述控制器中。
结合第二方面或第一种可能的实现方式，在第三种可能的实现方式中，所述方法还包括：
根据所述I/O设备的功能需求修改所述控制器的固件代码。
本发明实施例第三方面提供一种控制设备，包括：
路由器和至少两个控制器；
其中，所述路由器，用于接收第一设备发送的数据，所述数据中携带I/O设备的标识，并根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述至少两个控制器中与所述I/O设备的标识对应的控制器，将所述数据发送到所述I/O设备的标识对应的控制器；
所述I/O设备的标识对应的控制器，用于根据所述控制器中存储的固件代码对所述数据进行处理，得到处理后的数据，向所述路由器发送所述处理后的数据；
所述路由器，还用于将所述处理后的数据发送给第二设备；
所述第二设备或所述第一设备是所述I/O设备。
结合第三方面，在第一种可能的实现方式中，所述控制器包括：
存储器，用于存储所述固件代码；
缓冲区，用于存储处理器从所述控制器的队列中读取的所述数据；
所述处理器，用于调用所述存储器中存储的所述固件代码对所述缓冲区中的数据进行处理，得到处理后的数据，向所述路由器发送所述处理后的数据。
结合第三方面或第一种可能的实现方式，在第二种可能的实现方式中，所述路由器，还用于根据I/O设备的功能需求和所述至少两个控制器实现的功能，建立所述I/O设备与控制器的对应关系。
结合第三方面或第一种或第二种可能的实现方式，在第三种可能的实现方式中，所述控制器还用于接收基本输入/输出系统BIOS或操作系统OS加载的所述固件代码。
结合第三方面或第一种至第三种可能的实现方式中任一种可能的实现方 式，在第四种可能的实现方式中，所述路由器还包括：
路由器编程接口：用于根据所述I/O设备的功能需求修改所述I/O设备与控制器的对应关系。
结合第三方面或第一种至第四种可能的实现方式中任一种可能的实现方式，在第五种可能的实现方式中，所述控制器还包括：
控制器编程接口：用于根据所述I/O设备的功能需求修改所述控制器的固件代码。
本发明实施例提供的控制方法和控制设备，通过路由器接收第一设备发送的数据，上述数据中携带I/O设备的标识，根据I/O设备与控制器的对应关系和I/O设备的标识，确定I/O设备的标识对应的控制器，将数据发送到I/O设备的标识对应的控制器，以使控制器根据所述控制器中存储的固件代码对数据进行处理，接收控制器发送的处理后的数据，将处理后的数据发送给第二设备，第二设备或者第一设备为I/O设备。由于本发明实施例中通常固件代码是可以编程的，因此，具有应用上述控制方法的控制设备(具体可以为I/O芯片组)实现比较灵活。
附图说明
为了更清楚地说明本发明实施例或现有技术中的技术方案，下面将对实施例或现有技术描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动性的前提下，还可以根据这些附图获得其他的附图。
图1为现有技术中I/O芯片组的结构示意图；
图2为本发明控制方法实施例一的流程示意图；
图3为本发明控制器的结构示意图；
图4为本发明控制方法实施例二的流程示意图；
图5为本发明控制设备实施例的结构示意图。
具体实施方式
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而 不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本发明保护的范围。
通常，计算机会具有至少一块I/O芯片组，例如：主板上包含至少一块I/O芯片组。I/O芯片组的主要功能是转发I/O设备与CPU之间通信的数据，图1为现有技术中I/O芯片组的结构示意图，从图1可以看出，I/O芯片组上包括CPU总线接口和I/O总线接口，图1中CPU总线接口以快速通道互联(Quick Path Interconnect，以下简称：QPI)总线接口为例示出，QPI总线接口只是其中一种CPU总线接口，QPI总线接口用于连接CPU，图1中I/O总线接口以设备连接的快速外围部件互连(Peripheral Component Interconnect Express，以下简称：PCIE)总线接口为例示出，PCIE总线接口只是其中一种I/O总线接口，用于连接I/O设备。当然，I/O芯片组上还可以有其他接口或者功能模块(未示出)，但是，无论是QPI接口、PCIE接口还是其它一些功能模块，实现的功能都是固化在芯片组中，I/O芯片组的实现不灵活。
采用现有技术的方案，I/O芯片组的实现不灵活，在本发明的技术方案中，通过路由器接收第一设备发送的数据，根据上述数据中携带的I/O设备的标识，以及I/O设备与控制器的对应关系，确定上述I/O设备的标识对应的控制器，控制器中存储一段固件代码，该固件代码对应的可实现一个或一组功能，例如：实现加密、解密、压缩和/或带宽分配等。路由器将上述数据发送到I/O设备的标识对应的控制器，控制器对上述数据进行处理，并将处理后的数据发送到路由器，路由器将控制器处理后的数据发送给第二设备，在本发明各实施例中，第一设备或第二设备是I/O设备，也就是，若第一设备指的是CPU、第二设备指的则是I/O设备，若第一设备指的是I/O设备、第二设备指的则是CPU。由于本发明实施例中通常固件代码是可以编程的，因此，具有应用上述控制方法的控制设备(具体可以为I/O芯片组)实现比较灵活。
下面以具体地实施例对本发明的技术方案进行详细说明。下面这几个具体的实施例可以相互结合，对于相同或相似的概念或过程可能在某些实施例不再赘述。
图2为本发明控制方法实施例一的流程示意图，如图2所示，本实施例的方法，包括：
S201：路由器接收第一设备发送的数据。
其中，第一设备发送的数据中携带I/O设备的标识。
第一设备可以是CPU或者I/O设备，上述数据可以是CPU发送给I/O设备的数据，或者是I/O设备发送给CPU的数据，无论是CPU发送给I/O设备还是I/O设备发送给CPU，数据中都会携带I/O设备的标识，其中，I/O设备的标识可以是I/O设备的名称或I/O设备的编号，对此，本发明不做限制，只要能够唯一标识I/O设备即可。
S202：根据I/O设备与控制器的对应关系和I/O设备的标识，确定I/O设备的标识对应的控制器。
路由器中会存储I/O设备与控制器的对应关系，一个控制器可以实现一个或一组功能，例如：实现加密、解密、压缩和/或带宽分配等功能。
通常会根据I/O设备的功能需求和控制器实现的功能，建立I/O设备与控制器的对应关系，例如：I/O设备1的功能需求是与CPU之间通信的数据要进行加密处理，控制器1实现的功能为加密功能，则建立I/O设备1与控制器1的对应关系；I/O设备2的功能需求是与CPU之间通信的数据要进行压缩处理，控制器3实现的功能为压缩功能，则建立I/O设备2与控制器3的对应关系；其他I/O设备与控制器的对应关系的建立类似，在此不再赘述。
当I/O设备的功能需求发生变化时，一种实现方式是，当I/O芯片组中的控制器具有实现I/O设备变化后的功能需求时，通常会根据I/O设备的功能需求修改I/O设备与控制器的对应关系。例如：I/O芯片组中目前的4个控制器可以实现的功能分别为：控制器1实现加密功能，控制器2实现带宽分配功能，控制器3实现压缩功能，控制器4实现解密功能；I/O设备1的功能需求从之前的加密需求变为压缩需求，控制器3可实现压缩功能，因此，仅需要将之前I/O设备1与控制器1的对应关系修改为I/O设备1与控制器3的对应关系。
当I/O设备的功能需求发生变化时，另一种实现方式是，当I/O芯片组中的控制器不具有实现I/O设备变化后的功能需求时，通常通过I/O设备的功能需求修改控制器的固件代码，例如：I/O设备1的功能需求从之前的加密需求变为延迟控制需求，则可以将控制器1实现的功能由之前的加密修改为延迟控制。对控制器实现的功能的修改通常是修改控制器中存储的固件代码，控制器中的存储器可以存储不同的固件代码，控制器中的处理器通过调用不同 的固件代码进行处理使控制器可以实现不同的功能。而且由于本发明实施例中通常固件代码是可以编程的，因此，具有应用上述控制方法的控制设备(具体可以为I/O芯片组)实现比较灵活。
当I/O设备的功能需求发生变化时，再一种实现方式是，同时修改控制器的功能和I/O设备与控制器的对应关系，只要建立的对应关系满足I/O设备的功能需求与控制器实现的功能相同即可，在此不再赘述。
控制器中的固件代码通常在系统启动时由基本输入/输出系统(Basic Input/Output System，以下简称：BIOS)或者操作系统(Operating System，以下简称：OS)将固件代码加载到控制器中。通常在控制器加载固件代码之后，建立I/O设备与控制器的对应关系，当然，也可以先建立I/O设备与控制器的对应关系，再根据对应关系往控制器中加载相应的代码，对此，本发明不做限制。
S203：将数据发送到I/O设备的标识对应的控制器，以使控制器根据所述控制器中存储的固件代码对上述数据进行处理。
路由器将上述数据发送到上述I/O设备的标识对应的控制器，由控制器对上述数据进行处理。
图3为本发明控制器的结构示意图，如图3所示，控制器包括队列、缓冲区、处理器、存储器。其中，存储器存储固件代码，队列存储路由器发送的数据；参考图3，路由器接收到CPU与I/O设备之间通信的数据之后，根据数据中携带的I/O设备的标识将数据发送到控制器的队列中，控制器的处理器从控制器的队列中读取数据到缓冲区，调用存储器中存储的固件代码对缓冲区中的数据进行处理，将处理后的数据返回给路由器。
S204：接收控制器发送的处理后的数据。
控制器根据存储的固件代码对数据处理完之后，会将数据返回给路由器，路由器接收控制器发送的处理后的数据。
S205：将上述处理后的数据发送给第二设备。
路由器将上述处理后的数据发送给第二设备，本实施例中，第二设备或第一设备是I/O设备。也就是，若第一设备指的是CPU、第二设备指的则是I/O设备，若第一设备指的是I/O设备、第二设备指的则是CPU。本发明的技术方案无论是CPU发送给I/O设备的数据，还是I/O设备发送给CPU的数据 都适用。
通过上述各步骤的描述可知控制器可通过加载不同的代码实现不同的功能，即控制器的功能可变，路由器中的I/O设备与控制器的对应关系也可以根据I/O设备的功能需求变化而修改，因此，具有上述路由器与控制器的I/O芯片组的可以实现不同的功能，其实现非常灵活。
图4为本发明控制方法实施例二的流程示意图，具体地，本实施例的方法如下：
S401：控制器接收数据，并且根据控制器中存储的固件代码对数据进行处理。
控制器的结构可参见图3，具体地，控制器将接收的数据存储到队列中，控制器中的处理器从控制器的队列中读取数据到缓冲区，调用存储器中存储的固件代码对缓冲区中的数据进行处理。
在具有路由器的应用场景中，控制器从路由器接收数据，在无路由器的应用场景中，控制器从第一设备接收数据，第一设备可以是CPU或者I/O设备，当第一设备是CPU时，第二设备是I/O设备，当第一设备是I/O设备时，第二设备是CPU。
需要说明的是，控制器中存储的固件代码通常是在系统启动时，通过BIOS或者OS将固件代码加载到控制器中。还可以根据I/O设备功能需求修改控制器的固件代码，具体在什么情况下修改以及如何修改可参见图2所示实施例中的具体描述，在此不再赘述。
S402：当数据是从第一设备接收的时候，控制器将处理后的数据发送给第二设备；或当数据是通过路由器从第一设备接收的时候，控制器将处理后的数据发送给路由器，以使路由器将处理后的数据发送给第二设备。
也就是，在没有路由器的场景中，控制器对数据进行处理之后，将处理后的数据直接发送给第二设备；在有路由器的场景中，控制器对数据进行处理之后，将处理后的数据返回给路由器，通过路由器发送给第二设备。
本发明实施例，通过控制器接收数据，并且根据控制器中存储的固件代码对数据进行处理，当数据是从第一设备接收的时候，控制器将处理后的数据发送给第二设备；或当数据是通过路由器从第一设备接收的时候，控制器将处理后的数据发送给路由器，以使路由器将处理后的数据发送给第二设备， 由于本发明实施例中通常固件代码是可以编程的，因此，具有应用上述控制方法的控制设备(具体可以为I/O芯片组)实现灵活。
图5为本发明控制设备实施例的结构示意图，本实施例的控制设备设置在计算机中的I/O芯片组上，本实施例控制设备的结构包括路由器501和至少两个控制器502，图5中仅示出了4个控制器，控制器具体地个数可以依据实际应用而设置，对此，本发明不做限制，其中，控制设备中的路由器用于接收第一设备发送的数据，上述数据中携带I/O设备的标识，路由器根据I/O设备与控制器的对应关系和I/O设备的标识，确定上述至少两个控制器中与I/O设备的标识对应的控制器，将上述数据发送到I/O设备的标识对应的控制器；上述I/O设备的标识对应的控制器根据控制器中存储的固件代码对数据进行处理，得到处理后的数据，向路由器发送处理后的数据；路由器还用于将上述处理后的数据发送到第二设备。其中，上述第二设备或第一设备是上述I/O设备。
图3是图5所示实施例中的任一个控制器的结构示意图，参见图3，控制器包括存储器、缓冲区、队列和处理器，其中，存储器用于存储固件代码，队列，用于接收路由器发送的数据，缓冲区用于存储处理器从控制器的队列中读取的数据，处理器用于调用存储器中存储的固件代码对缓冲区中的数据进行处理，得到处理后的数据，并向路由器发送处理后的数据。控制器的具体工作流程可参见图2所示方法实施例的详细描述，在此不再赘述。
需要说明的是，在上述实施例中，不同的控制器之间也可以共用同一个存储器存储固件代码，处理器在处理时调用对应的固件代码即可。
在上述实施例中，路由器还用于根据I/O设备的功能需求和至少两个控制器实现的功能，建立I/O设备与控制器的对应关系。具体地建立方法参见图2所示方法实施例的详细描述，在此不再赘述。
在上述实施例中，控制器还用于接收BIOS或者OS加载的固件代码，具体实现参见图2所示方法实施例的详细描述，在此不再赘述。
在上述实施例中，路由器还包括路由器编辑接口，用于根据I/O设备的功能需求修改I/O设备与控制器的对应关系。具体在什么情况下修改，如何修改参见图2所示方法实施例的详细描述，在此不再赘述。
在上述实施例中，控制器还包括控制器编程接口，用于根据I/O设备的 功能需求修改控制器的固件代码，具体在什么情况下修改，如何修改参见图2所示方法实施例的详细描述，在此不再赘述。
本发明提供的控制设备，从上述描述可以看出，控制设备的控制器可以通过加载不同的固件代码实现不同的功能，控制设备的路由器的对应关系可以根据用户需求的变化而修改，从而，使得具有该控制设备的I/O芯片组可以根据需求实现不同的功能，其实现非常灵活。
本领域普通技术人员可以理解：实现上述各方法实施例的全部或部分步骤可以通过程序指令相关的硬件来完成。前述的程序可以存储于一计算机可读取存储介质中。该程序在执行时，执行包括上述各方法实施例的步骤；而前述的存储介质包括：ROM、RAM、磁碟或者光盘等各种可以存储程序代码的介质。
最后应说明的是：以上各实施例仅用以说明本发明的技术方案，而非对其限制；尽管参照前述各实施例对本发明进行了详细的说明，本领域的普通技术人员应当理解：其依然可以对前述各实施例所记载的技术方案进行修改，或者对其中部分或者全部技术特征进行等同替换；而这些修改或者替换，并不使相应技术方案的本质脱离本发明各实施例技术方案的范围。

Claims (16)

  1. 一种控制方法，其特征在于，包括：
    路由器接收第一设备发送的数据，所述数据中携带I/O设备的标识；
    根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述I/O设备的标识对应的控制器；
    将所述数据发送到所述I/O设备的标识对应的控制器，以使所述控制器根据所述控制器中存储的固件代码对所述数据进行处理；
    接收所述控制器发送的所述处理后的数据；
    将所述处理后的数据发送给第二设备；
    所述第二设备或者所述第一设备是所述I/O设备。
  2. 根据权利要求1所述的方法，其特征在于，所述控制器根据所述控制器中存储的固件代码对所述数据进行处理，包括：
    从所述控制器的队列中读取所述数据到缓冲区；
    调用存储器中存储的所述固件代码对所述缓冲区中的数据进行处理。
  3. 根据权利要求1或2所述的方法，其特征在于，所述根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述I/O设备的标识对应的控制器之前，还包括：
    根据所述I/O设备的功能需求和所述控制器实现的功能，建立所述I/O设备与控制器的对应关系。
  4. 根据权利要求2所述的方法，其特征在于，还包括：
    通过基本输入/输出系统BIOS或操作系统OS将所述固件代码加载到所述控制器中。
  5. 根据权利要求2～4任一项所述的方法，其特征在于，还包括：
    根据所述I/O设备的功能需求修改所述I/O设备与控制器的对应关系。
  6. 根据权利要求2～4任一项所述的方法，其特征在于，还包括：
    根据所述I/O设备的功能需求修改所述控制器的固件代码。
  7. 一种控制方法，其特征在于，包括：
    控制器接收数据，并且根据所述控制器中存储的固件代码对所述数据进行处理；
    当所述数据是从第一设备接收的时候，所述控制器将所述处理后的数据 发送给第二设备；或当所述数据是通过路由器从第一设备接收的时候，所述控制器将所述处理后的数据发送给所述路由器，以使所述路由器将所述处理后的数据发送给第二设备；
    所述第二设备或者所述第一设备是I/O设备。
  8. 根据权利要求7所述的方法，其特征在于，还包括：所述控制器根据所述控制器中存储的固件代码对所述数据进行处理，包括：
    从所述控制器的队列中读取所述数据到缓冲区；
    调用存储器中存储的所述固件代码对所述缓冲区中的数据进行处理。
  9. 根据权利要求8所述的方法，其特征在于，还包括：
    通过基本输入/输出系统BIOS或操作系统OS将所述固件代码加载到所述控制器中。
  10. 根据权利要求7～8任一所述的方法，其特征在于，还包括：
    根据所述I/O设备的功能需求修改所述控制器的固件代码。
  11. 一种控制设备，其特征在于，包括：
    路由器和至少两个控制器；
    其中，所述路由器，用于接收第一设备发送的数据，所述数据中携带I/O设备的标识，并根据I/O设备与控制器的对应关系和所述I/O设备的标识，确定所述至少两个控制器中与所述I/O设备的标识对应的控制器，将所述数据发送到所述I/O设备的标识对应的控制器；
    所述I/O设备的标识对应的控制器，用于根据所述控制器中存储的固件代码对所述数据进行处理，得到处理后的数据，向所述路由器发送所述处理后的数据；
    所述路由器，还用于将所述处理后的数据发送给第二设备；
    所述第二设备或所述第一设备是所述I/O设备。
  12. 根据权利要求11所述的控制设备，其特征在于，所述控制器包括：
    存储器，用于存储所述固件代码；
    缓冲区，用于存储处理器从所述控制器的队列中读取的所述数据；
    所述处理器，用于调用所述存储器中存储的所述固件代码对所述缓冲区中的数据进行处理，得到处理后的数据，向所述路由器发送所述处理后的数据。
  13. 根据权利要求11或12所述的控制设备，其特征在于，所述路由器，还用于根据I/O设备的功能需求和所述至少两个控制器实现的功能，建立所述I/O设备与控制器的对应关系。
  14. 根据权利要求11～13任一项所述的控制设备，其特征在于，所述控制器还用于接收基本输入/输出系统BIOS或操作系统OS加载的所述固件代码。
  15. 根据权利要求11～14任一项所述的控制设备，其特征在于，所述路由器还包括：
    路由器编程接口：用于根据所述I/O设备的功能需求修改所述I/O设备与控制器的对应关系。
  16. 根据权利要求11～15任一项所述的控制设备，其特征在于，所述控制器还包括：
    控制器编程接口：用于根据所述I/O设备的功能需求修改所述控制器的固件代码。
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Publication number Priority date Publication date Assignee Title
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101046749A (zh) * 2006-03-31 2007-10-03 联想(北京)有限公司 一种芯片固件升级方法
WO2008074212A1 (fr) * 2006-12-20 2008-06-26 Netac Technology Co., Ltd. Procédé permettant de commander une mémoire flash
CN101593120A (zh) * 2009-06-29 2009-12-02 成都市华为赛门铁克科技有限公司 带外升级方法和系统
CN102467409A (zh) * 2010-11-08 2012-05-23 研祥智能科技股份有限公司 一键调用应用程序的方法
CN103235741A (zh) * 2013-04-15 2013-08-07 厦门亿联网络技术股份有限公司 一种通过芯片实现硬件兼容的方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2629278B2 (ja) 1988-06-30 1997-07-09 株式会社日立製作所 仮想計算機システム
JPH05134877A (ja) * 1991-11-15 1993-06-01 Fuji Electric Co Ltd 計算機システムの立ち上げ方式
US5414851A (en) 1992-06-15 1995-05-09 International Business Machines Corporation Method and means for sharing I/O resources by a plurality of operating systems
US5991824A (en) * 1997-02-06 1999-11-23 Silicon Graphics, Inc. Method and system for simultaneous high bandwidth input output
US6591309B1 (en) * 1999-11-24 2003-07-08 Intel Corporation I/O bus abstraction for a cluster interconnection fabric
US7058750B1 (en) * 2000-05-10 2006-06-06 Intel Corporation Scalable distributed memory and I/O multiprocessor system
JP2002330204A (ja) * 2001-04-27 2002-11-15 Toshiba Corp 電子機器におけるソフトウェア切り替え方法
EP1483674B1 (en) * 2002-03-13 2006-04-05 Advanced Micro Devices, Inc. Usb host controller
DE10211054A1 (de) 2002-03-13 2003-10-09 Advanced Micro Devices Inc USB-Hostcontroller
JP2005108098A (ja) * 2003-10-01 2005-04-21 Hitachi Ltd データｉ／ｏ装置及びデータｉ／ｏ装置の制御方法
US8032674B2 (en) * 2004-07-19 2011-10-04 Marvell International Ltd. System and method for controlling buffer memory overflow and underflow conditions in storage controllers
CN101042582A (zh) 2007-04-25 2007-09-26 上海电器科学研究所（集团）有限公司 带现场总线接口的可编程可配置远程i/o模块
US8776080B2 (en) * 2007-09-25 2014-07-08 Intel Corporationa Management component transport protocol interconnect filtering and routing
JP4483947B2 (ja) 2008-01-17 2010-06-16 日本電気株式会社 入出力制御装置
JP5665303B2 (ja) 2009-11-17 2015-02-04 キヤノン株式会社 情報処理装置、その方法及びプログラム
US8495258B2 (en) * 2011-05-24 2013-07-23 International Business Machines Corporation Implementing storage adapter performance optimization with hardware accelerators offloading firmware for buffer allocation and automatically DMA

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101046749A (zh) * 2006-03-31 2007-10-03 联想(北京)有限公司 一种芯片固件升级方法
WO2008074212A1 (fr) * 2006-12-20 2008-06-26 Netac Technology Co., Ltd. Procédé permettant de commander une mémoire flash
CN101593120A (zh) * 2009-06-29 2009-12-02 成都市华为赛门铁克科技有限公司 带外升级方法和系统
CN102467409A (zh) * 2010-11-08 2012-05-23 研祥智能科技股份有限公司 一键调用应用程序的方法
CN103235741A (zh) * 2013-04-15 2013-08-07 厦门亿联网络技术股份有限公司 一种通过芯片实现硬件兼容的方法

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3131241A4 *

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