WO2015139160A1

WO2015139160A1 - Hard decision decoding method for ldpc code of dynamic threshold bit-flipping

Info

Publication number: WO2015139160A1
Application number: PCT/CN2014/001171
Authority: WO
Inventors: 高美洲; 李峰; 张红柳; 刘大铕
Original assignee: 山东华芯半导体有限公司
Priority date: 2014-03-20
Filing date: 2014-12-25
Publication date: 2015-09-24
Also published as: CN103888148B; CN103888148A

Abstract

Disclosed is a hard decision decoding method for an LDPC code of dynamic threshold bit-flipping. Determining an initial flipping threshold T, and using a dynamic threshold, that is, a dynamic turn threshold, and changing the flipping threshold to the dynamic threshold can reduce the probability of mistaken flipping, and also reduce the number of iterations of decoding, which makes the bit-flipping decoding of LDPC code more efficient, and also improves the error correcting capability of the LDPC code. The error correcting capability of the solution increases compared to that of the standard bit-flipping method.

Description

LDPC code hard decision decoding method with dynamic threshold bit flipping

Technical field

The present invention relates to a bit flip construction method for an LDPC (Low Density Parity Check) hard decision decoder.

Background technique

In various applications that require signal transmission, an Error Correcting Code (ECC) is often used, which enables the receiver to correct the error and obtain the correct signal when the signal is transmitted incorrectly.

The error correcting code can be applied to many systems. In the communication system, the signal transmission may be interfered by channel effects and channel noise, thereby causing the data stored in the flash memory device to be incorrect. The data stored in the flash memory device is data encoded by the error correction code device, and the error correction code is a necessary functional unit for the flash memory control device.

As the process of memory becomes more and more advanced, the memory unit is getting smaller and smaller, and the data stored by the memory unit is gradually increasing, resulting in an increasing probability of error in the flash memory during reading. Therefore, the error correction code error correction capability of the flash memory control device is an important factor in determining whether the memory controller device is qualified. However, the use of a strong error correction code in a flash memory control device requires a high amount of computation and a long operation time, so that the application of the flash memory control device is greatly limited.

The LDPC code is a packet error correction code with a sparse check matrix proposed by Robert Gallager in his doctoral thesis in 1962. It is suitable for all channels, its performance is close to Shannon limit, and its description and implementation are simple, the decoding is simple and parallel operation is possible, suitable for hardware implementation.

LDPC codes have great application potential and are widely used in deep space communications, fiber optic communications, satellite communications, satellite digital video, digital watermarking, magnetic/optical/holographic storage, mobile and fixed wireless communications, cable modulation/demodulation and digital users. application.

According to the increasingly advanced process of the flash memory device, the error correction capability of the error correction code in the flash memory control device also needs to be enhanced. In the current flash memory control device, the main error correction code is the BCH code. As the error probability increases, the space requirement and computing power of the BCH code are gradually increased. With the improvement of the flash memory storage process, the BCH code is corrected. The ability has gradually become unsuitable for the development of the flash memory process, so an error correction code with a stronger error correction capability is needed. Select LDPC code instead of BCH The code is more appropriate.

The setting of the bit flip threshold threshold T in the hard decision decoder of the LDPC code plays an important role in the hard decision decoding of the LDPC code, which affects the error correction capability of the LDPC code and its decoding rate. .

If the bit flip threshold threshold T is set too large, the number of iterations of decoding is increased, thereby affecting the decoding rate.

If the bit flip threshold T is set too small, it will cause false flipping, which increases the number of iterations of decoding, thereby affecting the decoding rate.

For an irregular check matrix, a fixed bit flip threshold threshold T is selected, which causes a large false flip probability and greatly increases the number of iterations of decoding, which in the severe case leads to decoding failure.

When the error rate of the symbol in the sequence Z reaches a certain value, the fixed bit flip threshold T is used for decoding, and the decoding is not successfully performed regardless of the number of times the decoder is iterated.

Summary of the invention

Based on the dynamic threshold, an object of the present invention is to provide a dynamic threshold bit-turned LDPC code hard decision decoding method, which improves decoding rate and error correction capability.

The invention adopts the following technical solutions:

A dynamic threshold bit flipping LDPC code hard decision decoding method, determining an initial flip threshold T, comprising the following steps:

1) reading a codeword sequence and calculating a syndrome according to the codeword sequence;

2) Determine whether the syndrome is zero. If it is zero, stop iteration and output the codeword sequence; otherwise, go to step 3)

3) calculating, for each symbol bit of each codeword in the codeword sequence, the number of non-satisfying check equations that the symbol bit participates in;

4) Calculating the flip threshold: as the number of iterations increases, the flip threshold T is decremented to obtain the current flip threshold;

5) If the number of unsatisfied check equations is greater than the current flip threshold, the corresponding symbol bits are flipped, and the syndrome of the corresponding codeword sequence after the flip is calculated;

6) Repeat steps 2), 3), 4) and 5) until the decoding is successful, or the maximum number of iterations is reached, the output decoding fails.

The above-mentioned dynamic threshold bit-turning LDPC code hard decision decoding method, the current flip threshold T:

T=j(b-c-m)/a;

Where: m indicates that the current iteration is the first iteration, j is the current column weight corresponding to the symbol bit, and a, b, and c are empirically normal numbers.

The above dynamic threshold bit flipping LDPC code hard decision decoding method determines an initial flip threshold T, and the steps of flipping in the iteration are as follows:

a) Calculate the syndrome S=[s ₀ s ₁ ,...,s _M-1 ] according to the hard decision sequence Z=[z ₀ , z ₁ ,..., z _N _-1 ]:

Wherein the H _mn test matrix, if the syndrome S=0, stop the iteration, output the hard decision sequence Z and display the decoding success, otherwise enter b);

b) For each symbol bit z _n , calculate the number of unsatisfied check equations f _n that it participates in:

If f _n >T, flip z _n to obtain a new hard decision sequence Z;

c) repeat a) and b) until the decoding is successful, or reach the maximum number of iterations and display the decoding failure;

The hard decision sequence is the sequence of codewords obtained after step 5) flipping.

According to the present invention, using a dynamic threshold, that is, a dynamic flip threshold, changing the flip threshold to a dynamic threshold can reduce the probability of false flipping, and also reduce the number of iterations of decoding, making the bit flip decoding of the LDPC code more efficient; The error correction capability of the LDPC code is improved, and the error correction capability of the present invention is enhanced over the standard bit flip method.

DRAWINGS

1 is a schematic block diagram of a flash memory storage control device.

2 is a flow chart of LDPC symbol bit flip decoding.

detailed description

The LDPC code is a type of linear block code which has all the characteristics of a linear block code. The LDPC code can be divided into two types: regular-LDPC and irregular-LDPC. The hypothesis check matrix H ₀ is an m×n-order matrix, and the regular LDPC code can be written as (n, j, k). n is the code length, j is the weight of each column of the check matrix (ie, the number of 1 in the column, referred to as the column weight, k is the weight of each row of the check matrix (ie, the number of 1 in the row, referred to as the row) The row weight, and generally j>2, k>j, rather than the check matrix of the regular LDPC code, is not exactly the same number of ones per row per column.

The iterative decoding method of LDPC codes can be roughly divided into two types: one is a hard decision method, and the other is a soft decision method. The hard decision bit flip method delivers binary hard information in the iterative process, while the soft decision method passes the real soft information related to the probability in the iterative process. The hard decision method is simple to operate and easy to implement in hardware, but the error correction performance is general; the soft decision method has better performance, but the implementation complexity is higher. This scheme mainly improves the hard decision decoder and improves its error correction capability. The specific process of the hard decision bit flip decoding method of the LDPC code is as follows.

In each iteration, the bit flip method first calculates the value of the syndrome based on the hard round sequence of the previous round. If all the syndromes are 0, the iteration is stopped, and the decoding is successful. Otherwise, the number of check equations in which the syndrome is 1 for each bit is calculated, and the number of the check equations that are not satisfied is greater than a certain number. The bit flip of the threshold threshold T is preset to obtain a new hard decision sequence, and then proceeds to the next iteration until the decoding is successful or the maximum number of iterations is reached and the decoding failure is displayed. The optimal decoding performance can be achieved by appropriately selecting the threshold threshold T.

The hard decision sequence is a sequence after the decoder receives the sequence to be decoded and flipped by the bit flip method.

1 is a simplified functional block diagram of one embodiment of a flash memory controller device. The LDPC code decoder is included in the flash memory controller. The flash memory controller is primarily responsible for data read and write and data storage and other functions.

The data generated by the flash memory controller from the host to obtain data through the LDPC code decoder for encoding operation is stored in the flash memory. If the host wants to obtain the data in the flash memory, the flash memory controller needs to be read from the flash memory, and the LDPC code decoder performs a decoding operation to generate data input to the host.

2 is a dynamic threshold (the dynamic threshold, the flip threshold, the dynamic flip threshold, and the bit flip threshold threshold represent the names of the same threshold in different usage environments, and those skilled in the art can easily understand) the bit flipping LDPC code decoding method flow. Figure. A codeword sequence is obtained from the flash memory by the flash memory controller, and the ASCII code decoder reads the codeword sequence. The entire decoding process of the LDPC code can be seen from FIG. Determine an initial flip threshold T so that its process is as follows:

(1) after reading the codeword sequence, calculating a syndrome according to the codeword sequence;

(2) judging whether the syndrome S is zero, if it is zero, stopping the iteration, outputting the codeword sequence and displaying the decoding success, otherwise entering (3);

(3) calculating, for each symbol bit of each codeword in each codeword sequence, the number of unsatisfied check equations in which it participates;

(4) Determine the new flip threshold by decrementing;

(5) If the number of unsatisfied check equations is greater than the new flip threshold, the corresponding codeword is flipped;

(6) Repeat (2), (3), (4), and (5) until the decoding is successful, or the maximum number of iterations is reached and the decoding failure is displayed.

Symbols: In digital communications, a binary number is often represented by the same time-spaced symbols. Signals within such time intervals are referred to as (binary) symbols. This interval is called the symbol length. The code word is composed of several symbols.

Regarding the terminology used in the art as a common term, it is not explained in detail, such as a syndrome, according to a general explanation of the communication principle, that is, a syndrome of a linear packet (n, k) code, if the code is error-corrected The ability is t, then all error modes whose weight is less than or equal to t have a unique syndrome (companion) corresponding to it.

Regarding the flip threshold, the decrement is performed by the given formula, the calculation amount is relatively small, but the representativeness is not good, and it cannot effectively represent the current state of decoding.

Based on the method of bit flipping decoding of LDPC codes, a dynamic threshold bit flipping LDPC code decoding method is proposed. The principle is that when the LDPC code performs bit flipping decoding, its flipping threshold is a fixed value, which is easy to cause an erroneous flip in the decoding process, thereby increasing the number of iterations of the decoder and making the decoding time too long. In order to more effectively utilize the bit flip decoding of the LDPC code, a hard decision decoding method for the dynamic threshold bit flipping LDPC code is proposed. The specific process is shown in Figure 2.

A hard decision decoding method for a dynamic threshold bit-turned LDPC code proposed by the present scheme may In order to effectively avoid the above problems. The decoding method of this patent can reduce the number of iterations of decoding, thereby increasing the decoding rate; it can also improve the error correction capability and can correct more errors in the sequence Z.

The formula for the dynamic threshold: T = j (b - c - m) / a. Where T is the threshold, m is the first iteration, j is the column weight, and a, b, and c are empirically normal numbers (the constant is related to the process of the flash memory and the error that needs to be corrected).

Where a, b, and c are empirical constants, which are constants, and do not affect the dynamic threshold "dynamic" characteristic in the formula, and if the initial threshold is considered to be a fixed threshold under normal conditions, the fixing determined by those skilled in the art according to this The threshold value, by correlation with the column weight and the number of iterations, obtains a dynamic threshold directly related to the number of iterations and the column weight, thereby effectively reducing the amount of calculation and improving the decoding efficiency. Since the experience of Changshu has no effect on "dynamics", it will not be repeated here.

The dynamic threshold T is closely related to the column weight j of the check matrix, the number of times the decoder is the first iteration, and the empirical constant. The column weight of the check matrix is the limit of the dynamic threshold. The larger the number of iterations of the decoder, the smaller the change space of the dynamic threshold T. The empirical constant is determined by the error that the flash memory process and the sequence Z need to correct. Each time the decoder is iterated, the symbols in sequence Z are judged based on the dynamic threshold of each symbol to determine whether to flip, and multiple symbols are flipped each time.

The result of the syndrome being the product of the check matrix H _mn and the sequence Z transposed is shown in the following equation s _m .

The specific steps of the bit flipping method are as follows:

(a) The hard-decision sequence _{_{Z = [z 0, z 1}} , ..., z M-1] calculates syndrome _{_{S = [s 0, s 1}} , ..., s M-1]:

Wherein the H _mn test matrix, if the syndrome S=0, stops the iteration, outputs the hard decision sequence Z and displays the decoding success, otherwise enters (b).

(b) For each symbol bit z _n , calculate the number of unsatisfied check equations f _n that it participates in:

If f _n >T, then z _n is flipped to obtain a new hard decision sequence Z.

(c) Repeat (a) and (b) until the decoding is successful, or the maximum number of iterations is reached and the decoding fails.

It can be seen that the bit flipping method is a simple hard decision method, which only requires logical operations, and the implementation is very simple.

Claims

A dynamic threshold bit flipping LDPC code hard decision decoding method determines an initial flip threshold T, which is characterized by the following steps:

1) reading a codeword sequence and calculating a syndrome according to the codeword sequence;

2) Determine whether the syndrome is zero. If it is zero, stop iteration and output the codeword sequence; otherwise, go to step 3)

3) calculating, for each symbol bit of each codeword in the codeword sequence, the number of non-satisfying check equations that the symbol bit participates in;

4) Calculating the flip threshold: as the number of iterations increases, the flip threshold T is decremented to obtain the current flip threshold;

5) If the number of unsatisfied check equations is greater than the current flip threshold, the corresponding symbol bits are flipped, and the syndrome of the corresponding codeword sequence after the flip is calculated;

6) Repeat steps 2), 3), 4) and 5) until the decoding is successful, or the maximum number of iterations is reached, the output decoding fails.
The dynamic threshold bit-turned LDPC code hard decision decoding method according to claim 1, wherein the current flip threshold T:

T=j(b-c·m)/a;

Where: m indicates that the current iteration is the first iteration, j is the current column weight corresponding to the symbol bit, and a, b, and c are empirically normal numbers.
The dynamic threshold bit-turned LDPC code hard decision decoding method according to claim 1 or 2, wherein an initial flip threshold T is determined, wherein the step of flipping in the iteration is as follows:

a) according to the hard decision sequence
Calculation syndrome

Wherein the H mn test matrix, if the syndrome S=0, stop the iteration, output the hard decision sequence Z and display the decoding success, otherwise enter b);

b) For each symbol bit z n , calculate the number of unsatisfied check equations f n that it participates in:

If f n >T, flip z n to obtain a new hard decision sequence Z;

c) repeat a) and b) until the decoding is successful, or reach the maximum number of iterations and display the decoding failure;

The hard decision sequence is the sequence of codewords obtained after step 5) flipping.