WO2015114936A1

WO2015114936A1 - Light emitting element

Info

Publication number: WO2015114936A1
Application number: PCT/JP2014/081643
Authority: WO
Inventors: 司北野; 宏一難波江; 昌輝大矢; 上山　智; 弘晃伊藤
Original assignee: エルシード株式会社
Priority date: 2014-01-30
Filing date: 2014-11-28
Publication date: 2015-08-06
Also published as: TW201530810A

Abstract

Provided is a light emitting element capable of suppressing generation of voids in a semiconductor without deteriorating crystal qualities of the semiconductor. This light emitting element is provided with: a sapphire substrate having recesses and projections that are formed to be scattered in a surface at a pitch of 1 μm or less; and a semiconductor laminated section formed on the surface of the sapphire substrate, said semiconductor laminated section including a light emitting layer, and being formed of a III nitride semiconductor. At the interface between the sapphire substrate and the semiconductor laminated section, there are diffraction operations of light emitted from the light emitting layer. The density of voids having a size smaller than the pitch of the recesses or projections, said voids being in the semiconductor laminated section close to the sapphires substrate, is set at 1.0×10²/cm²-2.3×10⁷/cm².

Description

Light emitting element

The present invention relates to a light emitting element.

A group III nitride semiconductor formed on the surface of the sapphire substrate and including a light emitting layer, and light emitted from the light emitting layer formed on the surface side of the sapphire substrate is incident and is larger than the optical wavelength of the light and smaller than the coherent length of the light. There is known an LED element comprising a diffractive surface in which concave or convex portions are formed at a period, and an Al reflective film that is formed on the back side of the substrate and reflects light diffracted by the diffractive surface and re-enters the diffractive surface. (See Patent Document 1). In this LED element, the light transmitted by the diffraction action is re-incident on the diffraction surface, and the light is transmitted again using the diffraction action on the diffraction surface, so that the light can be extracted outside the element in a plurality of modes.

International Publication No. 2011/0276779

By the way, the inventors have studied to improve the crystal quality of the semiconductor by forming voids having a predetermined density in the vicinity of the sapphire substrate in the semiconductor laminated portion. However, there is a concern about the adverse effect on the diffraction effect due to the formation of voids.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a light emitting device capable of achieving both improvement of crystal quality of a semiconductor due to voids and suppression of adverse effects on diffraction effects. It is in.

In order to achieve the above object, the present invention includes a sapphire substrate in which concave portions or convex portions scattered on the surface with a period of 1 μm or less are formed, and a light emitting layer formed on the surface of the sapphire substrate. In a light emitting device having a semiconductor laminated portion made of a semiconductor and obtaining a diffraction action of light emitted from the light emitting layer at an interface between the sapphire substrate and the semiconductor laminated portion, in the vicinity of the sapphire substrate of the semiconductor laminated portion There is provided a light-emitting element that is formed with a size smaller than the period of the concave portion or the convex portion and includes a void having a density of 2.6 × 10 ² / cm ² or more and 2.3 × 10 ⁷ / cm ² or less.

In the light-emitting element, the void density may be 1.0 × 10 ⁷ / cm ² or less.

In the above light emitting device, the semiconductor stacked portion may have a buffer layer formed on the sapphire substrate side, and the buffer layer may be formed by a sputtering method.

In the above light emitting device, the semiconductor stacked portion may have a buffer layer formed on the sapphire substrate side, and the buffer layer may be made of AlN.

In the above light-emitting element, when the period of the concave portion or the convex portion is P and the peak wavelength of light emitted from the light emitting layer is λ, the relationship of 1/2 × λ ≦ P ≦ 16/9 × λ is satisfied. Good.

According to the light emitting device of the present invention, it is possible to achieve both improvement in crystal quality of a semiconductor due to voids and suppression of adverse effects on diffraction effects.

FIG. 1 is a schematic cross-sectional view of an LED element showing a first embodiment of the present invention. 2A and 2B are explanatory diagrams showing the diffraction action of light at the interface having different refractive indexes, where FIG. 2A shows a state of reflection at the interface, and FIG. 2B shows a state of transmission through the interface. FIG. 3 shows the incident angle of light incident from the semiconductor layer side to the interface at the interface between the group III nitride semiconductor layer and the sapphire substrate when the period of the recesses or protrusions is 500 nm, and the diffraction action at the interface. It is a graph which shows the relationship of a transmission angle. FIG. 4 shows the incident angle of light incident from the semiconductor layer side to the interface at the interface between the group III nitride semiconductor layer and the sapphire substrate when the period of the recesses or protrusions is 500 nm, and the diffraction action at the interface. It is a graph which shows the relationship of a reflection angle. FIG. 5 is an explanatory view showing the traveling direction of light inside the device. FIG. 6 is a partially enlarged schematic cross-sectional view of the LED element. FIG. 7 is a graph showing an example of the reflectance of the reflecting portion. FIG. 8 shows a sapphire substrate, where (a) is a schematic perspective view, and (b) is a schematic explanatory view showing an AA cross section. FIG. 9 is a table showing the relationship between the convex period and the void density. FIG. 10 is a graph showing the relationship between the thickness of the buffer layer and the void density. FIG. 11 is a graph showing the relationship between the wavelength and the transmittance in the LED element. FIG. 12 is a graph showing the relationship between the void density and the light extraction efficiency in the LED element. FIG. 13 is a graph showing the relationship between the void density and the threading dislocation density in the semiconductor stack. FIG. 14 is a graph showing the relationship between the thickness of the buffer layer and the transmittance. FIG. 15 is a diagram showing the light distribution characteristics of the LED element in polar coordinates. 16A and 16B show the light distribution characteristics of the LED element, where FIG. 16A shows a state in which the convex portion is not formed on the sapphire substrate, and FIGS. 16B to 11H show the state in which the convex portion is formed on the sapphire substrate. Shows things. FIG. 17 is a table showing calculated values and actually measured values of each substrate. FIG. 18 is a graph showing a change in integrated intensity for light within a predetermined angle range with respect to the optical axis. FIG. 19 is a graph showing the relationship between the allowable order of transmitted diffracted light and the integrated intensity. FIG. 20 is a graph showing the relationship between the allowable order of reflected diffracted light and the integrated intensity. FIG. 21 is a graph showing the relationship between the period of convex portions and the allowable orders of transmitted diffracted light and reflected diffracted light. FIG. 22 is a schematic cross-sectional view of an LED element showing a second embodiment of the present invention. FIG. 23 is a partially enlarged schematic cross-sectional view of the LED element. FIG. 24 is a graph illustrating an example of the reflectance of the reflecting portion. FIG. 25 is a schematic cross-sectional view of an LED element showing a modification. FIG. 26 is a schematic cross-sectional view of an LED element showing a modification. FIG. 27 is a schematic cross-sectional view of an LED element showing a modification.

FIG. 1 is a schematic cross-sectional view of an LED element showing a first embodiment of the present invention.
As shown in FIG. 1, the LED element 1 includes a sapphire substrate 2 on which a semiconductor stacked portion 19 made of a group III nitride semiconductor layer is formed. Here, the refractive index of sapphire is 1.78, and the refractive index of the group III nitride semiconductor layer is 2.52. The LED element 1 is a flip chip type, and light is mainly extracted from the back side of the sapphire substrate 2. The semiconductor stacked unit 19 includes a buffer layer 10, an n-type GaN layer 12, a light emitting layer 14, an electron blocking layer 16, and a p-type GaN layer 18 in this order from the sapphire substrate 2 side. A p-side electrode 27 is formed on the p-type GaN layer 18, and an n-side electrode 28 is formed on the n-type GaN layer 12.

As shown in FIG. 1, the buffer layer 10 is made of AlN and is formed on the surface of the sapphire substrate 2. The buffer layer 10 is formed by a sputtering method. The n-type GaN layer 12 as the first conductivity type layer is formed on the buffer layer 10 and is made of n-GaN. The light emitting layer 14 is formed on the n-type GaN layer 12, is made of GalnN / GaN, and emits blue light by injection of electrons and holes. In the present embodiment, the peak wavelength of light emission of the light emitting layer 14 is 450 nm.

The electron block layer 16 is formed on the light emitting layer 14 and is made of p-AIGaN. The p-type GaN layer 18 as the second conductivity type layer is formed on the electron block layer 16 and is made of p-GaN. The n-type GaN layer 12 to the p-type GaN layer 18 are formed by MOCVD (Metal-Organic-Chemical-Vapor-Deposition) method. In addition, when a voltage is applied to the first conductive type layer and the second conductive type layer at least including the first conductive type layer, the active layer, and the second conductive type layer, the active layer is formed by recombination of electrons and holes. The layer structure of the semiconductor layer is arbitrary as long as it emits light.

The surface of the sapphire substrate 2 forms a diffraction surface 2a. On the surface of the sapphire substrate 2, a flat portion 2b and a plurality of convex portions 2c periodically formed on the flat portion 2b are formed. The shape of each convex portion 2c may be a truncated cone shape such as a cone or a polygonal pyramid, or a truncated cone shape such as a truncated cone or a truncated polygonal truncated cone. Each convex portion 2 c is designed to diffract light emitted from the light emitting layer 14. In the present embodiment, the light verticalizing action can be obtained by the convex portions 2c arranged periodically. Here, the light verticalizing action means that the light intensity distribution is more perpendicular to the interface between the sapphire substrate 2 and the semiconductor stacked portion 19 after being reflected and transmitted than before being incident on the diffraction surface. It is biased in the direction.

2A and 2B are explanatory diagrams showing the diffraction action of light at the interface having different refractive indexes, where FIG. 2A shows a state of reflection at the interface, and FIG. 2B shows a state of transmission through the interface.
Here, from the Bragg diffraction condition, when light is reflected at the interface, the condition that the reflection angle θ _ref should satisfy with respect to the incident angle θ _in is:
P · n1 · (sin θ _in −sin θ _ref ) = m · λ (1)
It is. Here, P is the period of the concave or convex portion, n1 is the refractive index of the medium on the incident side, λ is the wavelength of the incident light, and m is an integer. When light is incident on the sapphire substrate 2 from the semiconductor laminated portion 19, n1 is the refractive index of the group III nitride semiconductor. As shown in FIG. 2A, light incident on the interface is reflected at a reflection angle θ _ref that satisfies the above equation (1).

On the other hand, from the Bragg diffraction condition, when light is transmitted at the interface, the condition that the transmission angle θ _out should satisfy with respect to the incident angle θ _in is:
P · (n1 · sin θ _in −n2 · sin θ _out ) = m ′ · λ (2)
It is. Here, n2 is the refractive index of the medium on the exit side, and m ′ is an integer. For example, when light is incident on the sapphire substrate 2 from the semiconductor stacked portion 19, n2 is the refractive index of sapphire. As shown in FIG. 2B, light incident on the interface is transmitted at a transmission angle θ _out that satisfies the above equation (2).

FIG. 3 shows the incident angle of light incident from the semiconductor layer side to the interface at the interface between the group III nitride semiconductor layer and the sapphire substrate when the period of the recesses or protrusions is 500 nm, and the diffraction action at the interface. It is a graph which shows the relationship of a transmission angle. FIG. 4 shows the incident angle of light incident on the interface from the semiconductor layer side and the diffraction at the interface at the interface between the group III nitride semiconductor layer and the sapphire substrate when the period of the recesses or protrusions is 500 nm. It is a graph which shows the relationship of the reflection angle by an effect | action.

The light incident on the diffractive surface 2a has a critical angle of total reflection as in a general flat surface. At the interface between the GaN-based semiconductor layer and the sapphire substrate 2, the critical angle is 45.9 °. As shown in FIG. 3, in the region exceeding the critical angle, transmission in the diffraction mode is possible at m ′ = 1, 2, 3, 4 satisfying the diffraction condition of the above equation (2). Further, as shown in FIG. 4, in the region exceeding the critical angle, reflection in the diffraction mode is possible at m = 1, 2, 3, 4 satisfying the diffraction condition of the above equation (1). When the critical angle is 45.9 °, the light output exceeding the critical angle is about 70%, and the light output not exceeding the critical angle is about 30%. That is, extracting light in a region exceeding the critical angle greatly contributes to improving the light extraction efficiency of the LED element 1.

Here, in the region where the transmission angle θ _out is smaller than the incident angle θ _in , the light transmitted through the diffractive surface 2 a changes in angle toward the perpendicular to the interface between the sapphire substrate 2 and the group III nitride semiconductor layer. In FIG. 3, this area is indicated by hatching. As shown in FIG. 3, with respect to the light transmitted through the diffractive surface 2a, in the region exceeding the critical angle, the light in the diffraction mode of m ′ = 1, 2, 3 changes in angle toward the vertical in all angle regions. . The light of the diffraction mode of m ′ = 4 does not become vertical in a part of the angle range, but the influence of the light having a large diffraction order is relatively small, so the influence is small. The angle will change to the side. That is, compared with the intensity distribution of the light incident on the diffractive surface 2a on the semiconductor multilayer part 19 side, the intensity distribution of the light transmitted through the diffractive surface 2a on the sapphire substrate 2 side is different from that of the semiconductor multilayer part 19 and sapphire. It is biased in a direction perpendicular to the interface of the substrate 2.

In the region where the reflection angle θ _ref is smaller than the incident angle θ _in , the light reflected by the diffraction surface 2a changes in angle toward the perpendicular to the interface between the sapphire substrate 2 and the group III nitride semiconductor layer. In FIG. 4, this area is indicated by hatching. As shown in FIG. 4, with respect to the light reflected by the diffractive surface 2a, in the region exceeding the critical angle, the light in the diffraction mode of m = 1, 2, 3 changes in angle toward the vertical in all angle regions. . Although the light of the diffraction mode of m = 4 is not vertically inclined in some angle regions, the influence of light having a large diffraction order is relatively small, so the influence is small. The angle will change. That is, compared with the intensity distribution of light incident on the diffractive surface 2a on the semiconductor multilayer portion 19 side, the intensity distribution of light emitted from the diffractive surface 2a on the semiconductor multilayer portion 19 side is reflected by the semiconductor multilayer portion 19 and sapphire. It is biased in a direction perpendicular to the interface of the substrate 2.

FIG. 5 is an explanatory view showing the traveling direction of light inside the device.
As shown in FIG. 5, of the light emitted from the light emitting layer 14, the light incident on the sapphire substrate 2 beyond the critical angle is transmitted and reflected on the diffractive surface 2a in a direction closer to the vertical than when incident. That is, the light transmitted through the diffractive surface 2a is incident on the back surface of the sapphire substrate 2 with the angle being changed toward the vertical direction. Further, the light reflected by the diffractive surface 2a is reflected by the p-side electrode 27 and the n-side electrode 28 in a state in which the angle is changed toward the vertical direction, and then enters the diffractive surface 2a again. The incident angle at this time is closer to the vertical than the previous incident angle. As a result, the light incident on the back surface of the sapphire substrate 2 can be shifted vertically.

FIG. 6 is a partially enlarged schematic cross-sectional view of the LED element.
As shown in FIG. 6, the p-side electrode 27 includes a diffusion electrode 21 formed on the p-type GaN layer 18, a dielectric multilayer film 22 formed in a predetermined region on the diffusion electrode 21, and a dielectric multilayer film. 22 and a metal electrode 23 formed on the substrate 22. The diffusion electrode 21 is formed on the entire surface of the p-type GaN layer 18 and is made of a transparent material such as ITO (Indium Tin Oxide). The dielectric multilayer film 22 is configured by repeating a plurality of pairs of the first material 22a and the second material 22b having different refractive indexes. In the dielectric multilayer film 22, for example, the first material 22a may be ZrO ₂ (refractive index: 2.18), the second material 22b may be SiO ₂ (refractive index: 1.46), and the number of pairs is five. it can. The dielectric multilayer film 22 may be formed using a material different from ZrO ₂ and SiO _2. For example, AlN (refractive index: 2.18), Nb ₂ O ₃ (refractive index: 2.4), Ta ₂ O ₃ (refractive index: 2.35) or the like may be used. The metal electrode 23 covers the dielectric multilayer film 22 and is made of a metal material such as Al. The metal electrode 23 is electrically connected to the diffusion electrode 21 through a via hole 22 c formed in the dielectric multilayer film 22.

As shown in FIG. 6, the n-side electrode 28 is formed on the exposed n-type GaN layer 12 by etching the n-type GaN layer 12 from the p-type GaN layer 18. The n-side electrode 28 includes a diffusion electrode 24 formed on the n-type GaN layer 12, a dielectric multilayer film 25 formed in a predetermined region on the diffusion electrode 24, and a metal formed on the dielectric multilayer film 25. Electrode 26. The diffusion electrode 24 is formed on the entire surface of the n-type GaN layer 12 and is made of a transparent material such as ITO (Indium Tin Oxide). The dielectric multilayer film 25 is configured by repeating a plurality of pairs of the first material 25a and the second material 25b having different refractive indexes. In the dielectric multilayer film 25, for example, the first material 25a may be ZrO ₂ (refractive index: 2.18), the second material 25b may be SiO ₂ (refractive index: 1.46), and the number of pairs is five. it can. The dielectric multilayer film 25 may be formed using a material different from ZrO ₂ and SiO ₂ , for example, AlN (refractive index: 2.18), Nb ₂ O ₃ (refractive index: 2.4), Ta ₂ O ₃ (refractive index: 2.35) or the like may be used. The metal electrode 26 covers the dielectric multilayer film 25 and is made of a metal material such as Al. The metal electrode 26 is electrically connected to the diffusion electrode 24 through a via hole 25 c formed in the dielectric multilayer film 25.

In the LED element 1, the p-side electrode 27 and the n-side electrode 28 form a reflecting portion. The p-side electrode 27 and the n-side electrode 28 each have a higher reflectance as the angle is closer to the vertical. In addition to the light directly emitted from the light emitting layer 14 and directly incident on the reflecting portion, the light reflected by the diffractive surface 2a of the sapphire substrate 2 and changed in angle toward the perpendicular to the interface is incident. That is, the intensity distribution of light incident on the reflecting portion is biased toward the vertical as compared with the case where the surface of the sapphire substrate 2 is a flat surface.

FIG. 7 is a graph showing an example of the reflectance of the reflecting portion. In the example of FIG. 7, the dielectric multilayer film formed on the ITO is a combination of ZrO ₂ and SiO _{2 and} the number of pairs is five, and an Al layer is formed on the dielectric multilayer film. As shown in FIG. 7, a reflectance of 98% or more is realized in an angle range where the incident angle is 0 degree to 45 degrees. In addition, a reflectance of 90% or more is realized in an angle range where the incident angle is 0 to 75 degrees. As described above, the combination of the dielectric multilayer film and the metal layer is an advantageous reflection condition for the light that is perpendicular to the interface. In addition, when only an Al layer is formed on ITO, it has been confirmed that a constant reflectance of approximately 84% is obtained regardless of the incident angle.

Next, the sapphire substrate 2 will be described in detail with reference to FIG. FIG. 8 shows a sapphire substrate, where (a) is a schematic perspective view, and (b) is a schematic explanatory view showing an AA cross section.

As shown in FIG. 8A, the diffractive surface 2a is aligned with the intersections of the virtual triangular lattice at a predetermined period so that the center of each convex portion 2c is the position of the apex of the regular triangle in plan view. Formed. In addition, the period here means the distance of the peak position of the height in the adjacent convex part 2c. In the present embodiment, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light emitting layer 14 is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
The period of the convex portion 2c is set so as to satisfy the relationship. About this relationship,
23/45 × λ ≦ P ≦ 14/9 × λ
It is preferable that The period of the convex portion 2c is set so that the transmitted diffracted light includes at least second-order diffracted light and does not include fifth-order diffracted light. Further, the period of the convex portion 2c is set so that the reflected diffracted light includes at least third-order diffracted light.

Incidentally, the inventors have studied to improve the crystal quality of the semiconductor by forming voids of a predetermined density in the vicinity of the sapphire substrate 2 in the semiconductor laminated portion 19. When the concave portions or the convex portions 2 c that are scattered at a period of 1 μm or less are formed on the sapphire substrate 2, it is expected that the crystal quality of the semiconductor is improved by forming voids. However, since there is a concern about the adverse effect on the diffraction effect due to the formation of voids, the influence of the voids on the diffraction effect was investigated. In addition, the void here is a size having an optical influence, and those having a size of several nanometers to several tens of nanometers are not considered because the optical influence can be ignored.

FIG. 9 is a table showing the relationship between the convex period and the void density. The void density was measured when the buffer layer was made of GaN grown at a low temperature by the MOCVD method and when the buffer layer was made of AlN formed by the sputtering method. The thickness of the buffer layer was 80 nm.
As shown in FIG. 9, the void density is reduced when AlN is used compared to the case where the buffer layer 10 is GaN. Further, it was confirmed that the void density increases as the period of the convex portion 2c decreases. That is, it is considered that voids in the semiconductor are caused by the convex portions 2c formed periodically. When the buffer layer 10 is made of GaN grown by the MOCVD method, the void density exceeds 1.0 × 10 ⁷ / cm ² regardless of the period of the protrusions 2c. On the other hand, when the buffer layer 10 is made of AlN formed by a sputtering method, the void density is 1.0 × 10 ⁷ / cm ² or less. Note that due to the accuracy of the optical microscope in which this measurement was performed, when the void density is 1.0 × 10 ⁷ / cm ² or less, an accurate value cannot be grasped, so FIG. 9 shows 1.0 × 10 ⁷ / It is shown as cm ² or less.

Thus, the void density of the buffer layer 10 is changed by changing the material of the buffer layer 10. Further, the void density can be changed by changing the film thickness of the buffer layer 10. FIG. 10 is a graph showing the relationship between the thickness of the buffer layer and the void density. Here, the buffer layer 10 was measured as AlN formed by a sputtering method. The annealing time described later was 5 minutes. As shown in FIG. 10, increasing the film thickness of the buffer layer 10 decreases the void density, and decreasing the film thickness increases the void density.

Further, when the buffer layer 10 is formed by the sputtering method, the void density can be changed depending on the presence or absence of annealing after sputtering. In the present embodiment, the buffer layer 10 is formed by sputtering at 400 ° C. to 700 ° C., for example, and annealed at, for example, 3 ° C. to 10 minutes, for example 900 ° C. to 1100 ° C. Thus, LED element 1 was produced.

FIG. 11 is a graph showing the relationship between the wavelength and transmittance of the LED element. The transmittance was measured by irradiating light of a predetermined wavelength in a direction perpendicular to the sapphire substrate 2 of the LED element 1. Here, the sample body 1 was made of AlN in which the buffer layer 10 was formed by sputtering and the annealing time was 5 minutes, and the thickness of the buffer layer 10 was 80 nm. The sample body 2 was made of GaN obtained by growing the buffer layer 10 at a low temperature by the MOCVD method, and the thickness of the buffer layer was 25 nm. In each sample body, the period of the convex portion 2c was set to 460 nm. Note that in GaN grown at a low temperature by the MOCVD method, the void density is substantially constant even when the thickness of the buffer layer is changed.

As shown in FIG. 11, when the buffer layer 10 is made of AlN formed by sputtering, it is understood that the transmittance is improved as compared with the case where GaN is grown at low temperature by MOCVD. Specifically, the transmittance improved by 3.2% for light having a wavelength of 450 nm. This seems to be due to the fact that the generation of voids in the semiconductor stacked portion 19 is suppressed. Moreover, when LED elements were actually produced using each sample body, the light extraction efficiency was improved by 9.4%.

If the buffer layer 10 is made of AlN formed by sputtering, the reason why the generation of voids is suppressed is considered as follows. First, when the buffer layer is formed by using the sputtering method, the raw material goes straight from the target toward the sapphire substrate 2, so that the buffer layer 10 is uniformly formed between the convex portions 2 c of the sapphire substrate 2. In addition, since the buffer layer 10 is made of AlN, migration is suppressed as compared with GaN, so that generation of voids is suppressed.

In addition, a plurality of LED elements 1 having different void densities were produced, and experiments were conducted to see how the light extraction efficiency changes. FIG. 12 is a graph showing the relationship between the void density and the light extraction efficiency in the LED element. Each LED element 1 is made of AlN in which the buffer layer 10 is formed by sputtering, and the period of the convex portions 2c is 460 nm. The density of voids was changed by changing the film thickness of the buffer layer 10. Specifically, the void density is 1.0 × 10 / cm ² , 2.6 × 10 ² / cm ² , 1.3 × 10 ⁴ / cm ² , 2.3 × 10 ⁷ / cm ² , 5.0 ×. 10 ⁸ / cm ² . The void density was measured using an electron microscope by exposing the voids by etching the semiconductor stack using a dry etching apparatus. Thereby, data with higher accuracy than the data shown in FIG. 9 could be obtained.

As shown in FIG. 12, the light extraction efficiency was relatively good up to a void density of 2.3 × 10 ⁷ / cm ^2, and the light extraction efficiency decreased when the void density was 5.0 × 10 ⁸ / cm ² . That is, it is understood that the light extraction efficiency decreases as the void density increases.

FIG. 13 is a graph showing the relationship between the void density and the threading dislocation density in the semiconductor stack. As shown in FIG. 13, the threading dislocation density is 1.0 × 10 ⁹ / cm ² when the void density is 1.0 × 10 / cm ² , and 4. 4 when the void density is 2.6 × 10 ² / cm ² . When it is 0 × 10 ⁸ / cm ² , 1.3 × 10 ⁴ / cm ² , it is 3.2 × 10 ⁸ / cm ² , and when it is 2.3 × 10 ⁷ / cm ² , it is 2.2 × 10 ⁸ / cm 2. ² and when it was 5.0 × 10 ⁸ / cm ² , it was 1.6 × 10 ⁸ / cm ² . As shown in FIG. 13, the threading dislocation density was relatively low when the void density was 2.6 × 10 ² / cm ² or more, and the threading dislocation density was high when the void density was 1.0 × 10 / cm ² . That is, it is understood that the threading dislocation density increases as the void density decreases.

As described above, the void is formed in the vicinity of the sapphire substrate 2 of the semiconductor stacked portion 19 with a size smaller than the period of the convex portion 2c, and the density is 2.6 × 10 ² / cm ² or more and 2.3 × 10 ⁷ / cm ² or less. By providing the above, it is possible to achieve both improvement in crystal quality of the semiconductor due to voids and suppression of adverse effects on the diffraction action.

FIG. 14 is a table showing the relationship between the thickness of the buffer layer and the transmittance. In FIG. 14, “FSS” indicates the LED element 1 using the sapphire substrate 2 on which the unevenness is not formed, and “MPSS” uses the sapphire substrate 2 on which the dotted projections are formed as in the present embodiment. The LED element 1 which was found is shown. In each sample body, the period of the convex portion 2c was set to 460 nm, the buffer layer 10 was made of AlN formed by a sputtering method, and the thickness was changed to 20 nm, 40 nm, 60 nm, and 80 nm.
As shown in FIG. 14, the transmittance is almost constant in “FSS”, but the transmittance decreases in “MPSS” when the thickness of the buffer layer 10 is 20 nm. This is considered because the flatness of the surface of each semiconductor layer in the semiconductor stacked portion 19 is lost. As described above, when the flatness of the surface of each semiconductor layer is lost, the crystal quality of the semiconductor deteriorates.

FIG. 15 is a diagram showing the light distribution characteristics of the LED element in polar coordinates. Here, the sample body 3 was “MPSS”, and the buffer layer 10 was made of GaN grown at a low temperature by the MOCVD method, and the thickness of the buffer layer 10 was 25 nm. The void density of the sample body 3 is 5.0 × 10 ⁷ / cm ² . The sample body 4 was “FSS”, and the buffer layer 10 was made of GaN grown at a low temperature by the MOCVD method, and the thickness of the buffer layer 10 was 25 nm. The sample body 5 was made of AlN in which the buffer layer 10 was formed by sputtering, and the thickness of the buffer layer 10 was 60 nm. The void density of the sample body 5 is 1.0 × 10 ⁴ / cm ² . In each drawing of FIG. 15, the direction perpendicular to the sapphire substrate 2 is shown as 0 degree (optical axis). Moreover, the light emission wavelength of the light emitting layer 14 of each sample body was 450 nm.

When the convex portion 2 c is not formed on the surface of the sapphire substrate 2 as in the sample body 4, the light is emitted from the LED element 1 isotropically. On the other hand, as shown in the sample body 3 and the sample body 5, the light distribution characteristic is changed by forming the convex portion 2c capable of obtaining a diffraction action. Specifically, as shown in the sample body 5, in the light distribution characteristics, there are portions where the strength is higher than others in a specific angle region. This location has been found to be due to ± first order light that is reflected by the reflector and then transmitted through the diffractive surface.

Here, it is considered that the light distribution characteristic of the sample body 3 is different from that of the sample body 5 due to the influence of light scattering by the voids formed in the semiconductor stacked portion 19. That is, when the void density exceeds 1.0 × 10 ⁷ / cm ² , it is considered that the influence of scattering increases and the light distribution characteristics as in the sample body 3 are obtained. Thus, when the influence of scattering becomes large, it will be disadvantageous for the LED element 1 which takes out light using a diffraction effect.

Furthermore, with reference to FIGS. 16 to 21, the light distribution characteristics of the light extracted from the LED element 1 will be described based on the simulation. FIG. 16 shows the light distribution characteristics of the LED element in polar coordinates, (a) shows a state in which no convex portion is formed on the sapphire substrate, and (b) to (h) show the convex portion formed on the sapphire substrate. It shows the one in the state. Here, (b) has a period of 200 nm, (c) has a period of 225 nm, (d) has a period of 320 nm, (e) has a period of 450 nm, (f) Indicates that the period is 600 nm, (g) indicates that the period is 700 nm, and (h) indicates that the period is 800 nm. In each drawing of FIG. 16, the direction perpendicular to the sapphire substrate is shown as 0 degree (optical axis).

Here, in order to confirm whether or not the calculated values of the simulation are appropriate, the simulation calculated values were compared with the measured values of the sample body. This examination was performed by comparing the integrated intensity calculated by the simulation with the actual measurement value obtained by emitting the sample body. FIG. 17 is a table showing calculated values and actually measured values of each substrate. In FIG. 17, “FSS” indicates a substrate on which unevenness is not formed, “PSS” indicates a substrate on which linear unevenness is formed, and “MPSS” indicates a recessed portion or a protrusion that is scattered as in the present embodiment. The board | substrate with which the part was formed is shown. As shown in FIG. 17, it is understood that the calculated value and the actually measured value are almost the same regardless of the substrate, and the calculated value of the simulation is appropriate.

Investigate the light distribution characteristics of FIG. As shown in FIG. 16A, when the convex portion 2 c is not formed on the surface of the sapphire substrate 2, light is emitted from the LED element 1 isotropically. On the other hand, as shown in FIGS. 16B to 16H, the light distribution characteristic is changed by forming the convex portion 2c capable of obtaining the diffraction action. Specifically, as shown in FIGS. 16B, 16C, etc., in the light distribution characteristic, there is a portion A where the intensity is higher than the others in a specific angle region. This portion A has been found to be due to ± first-order light that is reflected by the reflecting portion and then passes through the diffraction surface. Then, as shown in FIGS. 16B to 16H, by changing the period of the convex portion 2c, the angular area of this portion A changes.

FIG. 18 is a graph showing a change in integrated intensity for light within a predetermined angle range with respect to the optical axis. In FIG. 18, the horizontal axis represents the period of the convex portion, and the vertical axis represents the integrated intensity within ± 30 degrees with respect to the optical axis. Here, the broken line indicates the integrated intensity of the PSS substrate having the period of the linear protrusions of 3 μm. The alternate long and short dash line indicates the integrated intensity of the FSS substrate.

As shown in FIG. 18, when the period of the convex portion 2c is 225 nm or more and 800 nm or less, the integrated intensity is larger than that of the PSS substrate. That is, when the period of the convex portion 2c is P, and the peak wavelength of light emitted from the light emitting layer 14 is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
If the relationship is satisfied, the light intensity on the optical axis can be made larger than that of the PSS substrate. And under the condition where this equation is established, since the diffractive action is obtained, the influence of the voids of the semiconductor stacked portion 19 becomes large.

Further, as shown in FIG. 18, the integrated intensity is higher than that of the FSS substrate when the period of the convex portion 2c is 230 nm or more and 700 nm or less. That is, when the period of the convex portion 2c is P, and the peak wavelength of light emitted from the light emitting layer 14 is λ,
23/45 × λ ≦ P ≦ 14/9 × λ
If the relationship is satisfied, the light intensity on the optical axis can be made larger than that of the FSS substrate. And under the condition where this equation is established, since the diffractive action is obtained, the influence of the voids of the semiconductor stacked portion 19 becomes large.

FIG. 19 is a graph showing the relationship between the allowable order of transmitted diffracted light and the integrated intensity. Here, the allowable order means how many order components the transmitted diffracted light contains (allowed). Note that the alternate long and short dash line in FIG. 19 indicates the integrated intensity of the FSS substrate.

As shown in FIG. 19, when the transmitted diffracted light is allowed up to the second, third, or fourth order, it always exceeds the integrated intensity of the FSS substrate, whereas the transmitted diffracted light is allowed only the first order. In some cases or when the fifth or higher order is allowed, the integrated intensity of the FSS substrate is lower. That is, the transmitted diffracted light is preferably designed so as to include at least the second-order diffracted light and not include the fifth-order diffracted light.

FIG. 20 is a graph showing the relationship between the allowable order of reflected diffracted light and the integrated intensity. Here, the allowable order means how many order components of the reflected diffracted light are included (allowed). Note that the alternate long and short dash line in FIG. 20 indicates the integrated intensity of the FSS substrate.

As shown in FIG. 20, for the reflected diffracted light, when the third or higher order is allowed, the integrated intensity of the FSS substrate is always exceeded. On the other hand, when the reflected diffracted light is allowed only to the second order or lower, the FSS It will be less than the integrated intensity of the substrate. That is, the reflected diffracted light is preferably designed to include at least third-order diffracted light.

FIG. 21 is a graph showing the relationship between the period of convex portions and the allowable orders of transmitted diffracted light and reflected diffracted light. Also in FIG. 21, the emission wavelength of the light emitting layer 14 is set to 450 nm.
As shown in FIG. 21, the period of the convex portion 2 c that is allowed up to the second, third, or fourth order in the transmitted diffracted light is 260 nm to 620 nm. That is, when the period of the convex portion 2c is P, and the peak wavelength of light emitted from the light emitting layer 14 is λ,
26/45 × λ ≦ P ≦ 62/45 × λ
If the relationship is satisfied, the allowable order of the transmitted diffracted light is from the second order to the fourth order.

On the other hand, with respect to the reflected diffracted light, the period of the convex part 2c allowed to be higher than the third order is 280 nm. That is, when the period of the convex portion 2c is P, and the peak wavelength of light emitted from the light emitting layer 14 is λ,
28/45 × λ ≦ P
If the above relationship is satisfied, the allowable order for the reflected diffracted light is the third order or higher. That is, in order to make the allowable order of the transmitted diffracted light between the second order and the fourth order, and the allowable order of the reflected diffracted light be the third order or more,
26/45 × λ ≦ P ≦ 62/45 × λ
It is sufficient to satisfy the relationship.

In the LED element 1 configured as described above, since the void density in the semiconductor stacked portion 19 is 1.0 × 10 ⁷ / cm ² or less, the influence of scattering can be minimized, The light distribution characteristic due to the diffractive action is not impaired. Further, since the buffer layer 10 is formed by the sputtering method, generation of voids in the semiconductor stacked portion 19 can be suppressed. Furthermore, by making the buffer layer 10 AlN, generation of voids in the semiconductor stacked portion 19 can be effectively suppressed. Furthermore, by setting the thickness of the buffer layer 10 to 60 nm or less, the crystal quality of the semiconductor can be improved as compared with the conventional “FSS”. Furthermore, by making the thickness of the buffer layer 10 exceed 20 nm, it is possible to suppress deterioration of the flatness of the crystal surface of the semiconductor stacked portion 19.

Moreover, in the LED element 1 of this embodiment, since the diffraction surface 2a and the reflection part are provided, the light distribution characteristic of the light emitted from the element can be changed from the vertical direction. And when the period of the convex part 2c is P and the peak wavelength of the light emitted from the light emitting layer 14 is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
Thus, the amount of light around the optical axis extracted from the element can be increased. Therefore, appropriate light distribution can be realized using light distribution characteristics resulting from diffraction while improving the light extraction efficiency using the diffraction action.

Further, in the diffractive surface 2a, the transmitted diffracted light is allowed up to the second, third or fourth order, and the reflected diffracted light is allowed to be higher than the third order. The amount of light can be increased.

Further, by verticalizing the light on the diffraction surface 2a, the distance until the light emitted from the light emitting layer 14 reaches the back surface of the sapphire substrate 2 can be remarkably shortened, and the absorption of light inside the device is suppressed. can do. The LED element has a problem that light in an angle region exceeding the critical angle of the interface propagates in the lateral direction, so that the light is absorbed inside the element. Since the vertical direction is 2a, the light absorbed inside the device can be drastically reduced. Furthermore, in the present embodiment, the reflection portion is a combination of the

dielectric multilayer films

22 and 25 and the metal layers 23 and 26 so that the reflectivity increases as the angle is closer to the interface. Therefore, the reflection conditions are advantageous for light that is closer to the vertical.

22 and 23 show a second embodiment of the present invention, and FIG. 22 is a schematic cross-sectional view of an LED element.
As shown in FIG. 22, the LED element 101 is a face-up type, in which a semiconductor stacked portion 119 made of a group III nitride semiconductor layer is formed on the surface of a sapphire substrate 102. This LED element 101 is a face-up type, and light is mainly extracted from the side opposite to the sapphire substrate 102. The semiconductor stacked unit 119 includes a buffer layer 110, an n-type GaN layer 112, a light emitting layer 114, an electron blocking layer 116, and a p-type GaN layer 118 in this order from the sapphire substrate 102 side. A p-side electrode 127 is formed on the p-type GaN layer 118 and an n-side electrode 128 is formed on the n-type GaN layer 112. The p-side electrode 127 has a diffusion electrode 121 formed on the p-type GaN layer 118 and a pad electrode 122 formed on a part of the diffusion electrode 121.

The buffer layer 110 is made of AlN and is formed on the surface of the sapphire substrate 102. The buffer layer 110 has a thickness of 40 nm or less and is formed by a sputtering method. Moreover, the void density in the semiconductor stacked portion 119 is 1.0 × 10 ⁷ / cm ² or less.

In this LED element 101, the surface of the sapphire substrate 102 forms a diffraction surface 102a. On the surface of the sapphire substrate 102, a flat portion 102b and a plurality of convex portions 102c periodically formed on the flat portion 102b are formed. The shape of each convex portion 102c can be a truncated cone shape such as a cone or a polygonal pyramid, or a truncated cone shape such as a truncated cone or a truncated polygonal truncated cone. Each convex part 102c is designed to diffract the light emitted from the light emitting layer 114. In the present embodiment, a light verticalizing action can be obtained by each of the convex portions 102c arranged periodically.

In the diffractive surface 102a of the present embodiment, when the period of the convex portion 102c is P and the peak wavelength of light emitted from the light emitting layer 114 is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
The period of the convex portion 102c is set so as to satisfy the above relationship. Further, the period of the convex portion 102c is set so that the transmitted diffracted light includes at least second-order diffracted light and does not include fifth-order diffracted light. The period of the convex portion 102c is set so that the reflected diffracted light includes at least third-order diffracted light.

An additional GaN layer grown under a growth condition that promotes facet formation of GaN rather than the growth condition of the n-type GaN layer 112 may be provided between the buffer layer 110 and the n-type GaN layer 112. In order to achieve growth conditions advantageous for facet formation, the temperature in the reactor is lowered, the pressure in the reactor is increased, the supply amount of NH ₃ is reduced, the supply amount of (CH ₃ ) ₃ Ga is reduced, Etc. are considered. By providing this GaN layer, the semiconductor stacked portion 119 can have good crystal quality without being affected by the period of the convex portion 102c. The additional GaN layer can be formed, for example, by supplying NH ₂ at 2200 sccm and (CH ₃ ) ₃ Ga at 20 sccm while maintaining the temperature in the reactor at 950 ° C. and the pressure at 930 hPa for a predetermined time. The n-type GaN layer 112 can be formed, for example, by setting the temperature in the reactor to 1040 ° C., the pressure to 500 hPa, and supplying NH ₃ at 8000 sccm and (CH ₃ ) ₃ Ga at 45 sccm.

FIG. 23 is a partially enlarged schematic cross-sectional view of the LED element.
As shown in FIG. 23, a dielectric multilayer film 124 is formed on the back side of the sapphire substrate 102. The dielectric multilayer film 124 is covered with an Al layer 126 that is a metal layer. In the light emitting element 101, the dielectric multilayer film 124 and the Al layer 126 form a reflecting portion, and the light emitted from the light emitting layer 114 and transmitted through the diffraction surface 102a by the diffraction action is reflected by the reflecting portion. Then, the light transmitted by the diffractive action is re-incident on the diffractive surface 102a, and is transmitted again by using the diffractive action on the diffractive surface 102a, so that the light can be extracted outside the element in a plurality of modes.

FIG. 24 is a graph illustrating an example of the reflectance of the reflecting portion. In FIG. 24, the dielectric multilayer film formed on the sapphire substrate is a combination of ZrO ₂ and SiO _{2 and} the number of pairs is 5, and an Al layer is formed on the dielectric multilayer film. As shown in FIG. 24, a reflectance of 99% or more is realized in an angle range where the incident angle is 0 degree to 55 degrees. In addition, a reflectance of 98% or more is realized in the angle range where the incident angle is 0 degree to 60 degrees. In addition, a reflectance of 92% or more is realized in an angle range where the incident angle is 0 degree to 75 degrees. As described above, the combination of the dielectric multilayer film and the metal layer is an advantageous reflection condition for the light that is perpendicular to the interface. When only the Al layer is formed on the sapphire substrate, it has been confirmed that the reflectance is almost 88% regardless of the incident angle.

In the LED element 101 configured as described above, since the void density in the semiconductor stacked portion 119 is 1.0 × 10 ⁷ / cm ² or less, the influence of scattering can be minimized, The light distribution characteristic due to the diffractive action is not impaired. In addition, since the buffer layer 110 is formed by a sputtering method, generation of voids in the semiconductor stacked portion 119 can be suppressed. Furthermore, by using AlN as the buffer layer 110, generation of voids in the semiconductor stacked portion 119 can be effectively suppressed. Furthermore, by setting the thickness of the buffer layer 110 to 60 nm or less, the crystal quality of the semiconductor can be improved as compared with the conventional “FSS”. Furthermore, by making the thickness of the buffer layer 110 exceed 20 nm, it is possible to suppress deterioration of the flatness of the crystal surface of the semiconductor stacked portion 119.

Further, since the diffractive surface 102a and the reflecting portion are provided, the light distribution characteristic of the light emitted from the element can be changed from the vertical. When the period of the convex portion 102c is P and the peak wavelength of the light emitted from the light emitting layer 114 is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
Thus, the amount of light around the optical axis extracted from the element can be increased.

Further, in the diffractive surface 102a, the transmitted diffracted light is allowed up to the second order, the third order, or the fourth order, and the reflected diffracted light is allowed to be the third order or higher. The amount of light can be increased.

Further, the distance until the light emitted from the light emitting layer 114 reaches the surface of the p-side electrode 127 can be remarkably shortened, and the light absorption inside the device can be suppressed. The LED element has a problem that light in an angle region exceeding the critical angle of the interface propagates in the lateral direction, so that the light is absorbed inside the element. The light absorbed inside the element can be drastically reduced by setting the vertical direction at 102a. Furthermore, in the present embodiment, the reflection portion is a combination of the dielectric multilayer film 124 and the metal layer 126, and the reflectivity increases as the angle is more perpendicular to the interface. This is a reflection condition that is advantageous with respect to the generated light.

In the first and second embodiments, the diffractive surface is composed of periodically formed convex portions, but the diffractive surface may be composed of periodically formed concave portions. Of course. In addition to forming the convex portions or the concave portions in alignment with the intersections of the triangular lattice, for example, it can be formed in alignment with the intersections of the virtual square lattice.

In the first and second embodiments, the light emitting surface of the element is flat. However, as shown in FIGS. 25 and 26, for example, the light emitting surface is processed to be uneven. May be. The LED element 1 of FIG. 25 is obtained by performing uneven processing on the back surface of the sapphire substrate 2 in the flip-chip type LED element of the first embodiment. The back surface 2g of the sapphire substrate 2 is formed with a flat portion 2h and a plurality of convex portions 2i that are periodically formed on the flat portion 2h. The shape of each convex part 2i can be a truncated cone such as a cone or a polygonal pyramid, or a truncated cone such as a truncated cone or a truncated polygonal truncated cone. It is preferable that the period of each convex part 2i in the back surface 2g of the sapphire substrate 2 is shorter than the period of the diffractive surface 2a. Thereby, the Fresnel reflection in the back surface 2g of the sapphire substrate 2 is suppressed.

In addition, the LED element 101 in FIG. 26 is obtained by performing uneven processing on the surface of the p-side electrode 127 in the LED element of the second embodiment of the face-up type. The surface 127g of the p-type electrode 127 includes a flat portion 127h and a plurality of convex portions 127i that are periodically formed on the flat portion 127h. The shape of each convex portion 127i can be a truncated cone such as a cone or a polygonal pyramid, or a truncated cone such as a truncated cone or a truncated polygonal truncated cone. The period of each convex part 127i on the surface 127g of the p-side electrode 127 is preferably shorter than the period of the diffractive surface 102a. Thereby, Fresnel reflection on the surface 127g of the p-side electrode 127 is suppressed.

In the first and second embodiments, the buffer layer is a single layer formed by the sputtering method. However, for example, as shown in FIG. 27, the buffer layer is formed by the sputtering method. The first layer 10a and the second layer 10b grown at a low temperature by the MOCVD method may be used. Thereby, compared with the case where the buffer layer is a single layer formed by sputtering, the threading dislocation density can be further reduced while the void density is made equal. Specifically, when the first layer 10a is 20 nm AlN formed by sputtering and the second layer 10b is 20 nm GaN grown at a low temperature by MOCVD, the buffer layer is formed by sputtering. The value was the same as that obtained when the 40 nm single layer AlN was formed, and the threading dislocation density was lower than that obtained when the buffer layer was a 20 nm single layer AlN formed by sputtering.

In the first and second embodiments, the light emitting layer emits blue light. However, for example, green light, red light, or the like may be emitted. In short, it is only necessary that the relationship between the period of the concave portion or the convex portion and the peak wavelength of the light emitted from the light emitting layer satisfy a predetermined condition.

The light-emitting element of the present invention is industrially useful because it can achieve both improvement of the crystal quality of the semiconductor due to voids and suppression of adverse effects on the diffraction effect.

DESCRIPTION OF SYMBOLS 1 LED element 2 Sapphire substrate

2a Diffraction surface

2c Convex part 10a 1st layer 10b 2nd layer 14 Light emitting layer 19 Semiconductor laminated part 27 P side electrode 28 n side electrode 101 LED element 102 Sapphire substrate 102a Diffraction surface 114 Light emitting layer 119 Semiconductor laminated part Part 124 Dielectric multilayer 126 Al layer

Claims

A sapphire substrate in which concave portions or convex portions scattered on the surface with a period of 1 μm or less are formed;
A semiconductor multilayer part formed on the surface of the sapphire substrate and including a light emitting layer and made of a group III nitride semiconductor,
In the light emitting element that obtains the diffraction action of the light emitted from the light emitting layer at the interface between the sapphire substrate and the semiconductor stacked portion,
A void having a size smaller than the period of the concave portion or the convex portion and having a density of 2.6 × 10 2 / cm 2 or more and 2.3 × 10 7 / cm 2 or less is formed near the sapphire substrate of the semiconductor stacked portion. A light emitting device provided.
The light emitting device according to claim 1, wherein the density of the voids is 1.0 × 10 7 / cm 2 or less.
The semiconductor stacked portion has a buffer layer formed on the sapphire substrate side,
The light emitting device according to claim 2, wherein the buffer layer is formed by a sputtering method.
The semiconductor stacked portion has a buffer layer formed on the sapphire substrate side,
The light emitting device according to claim 3, wherein the buffer layer is made of AlN.
When the period of the concave or convex part is P, and the peak wavelength of light emitted from the light emitting layer is λ,
1/2 × λ ≦ P ≦ 16/9 × λ
The light emitting device according to claim 4, satisfying the relationship: