TW201530810A - Light emitting element - Google Patents
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- 239000000758 substrate Substances 0.000 claims abstract description 98
- 239000004065 semiconductor Substances 0.000 claims abstract description 84
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 80
- 239000010980 sapphire Substances 0.000 claims abstract description 80
- 150000004767 nitrides Chemical class 0.000 claims abstract description 14
- 239000011800 void material Substances 0.000 claims description 44
- 238000004544 sputter deposition Methods 0.000 claims description 25
- 230000000694 effects Effects 0.000 claims description 6
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- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 2
- 239000011229 interlayer Substances 0.000 description 2
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- 229910002704 AlGaN Inorganic materials 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
- H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
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- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
- H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/10—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a light reflecting structure, e.g. semiconductor Bragg reflector
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- H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
- H01L33/387—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape with a plurality of electrode regions in direct contact with the semiconductor body and being electrically interconnected by another electrode layer
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- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
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Abstract
Description
本發明是關於發光元件(light emitting device)。The present invention relates to a light emitting device.
已知有具備如下構件之LED元件:形成於藍寶石基板(sapphire substrate)的表面上包含發光層之三族氮化物半導體(group III nitride semiconductor),與形成於藍寶石基板的表面側由發光層發出的光入射,以比該光的光波長(optical wavelength)大比該光的相干長度(coherence length)小的週期形成有凹部或凸部之繞射面,與使形成於基板的背面側在繞射面繞射的光反射並使其再入射到繞射面之Al反射膜(參照專利文獻1)。在該LED元件中,可藉由使藉由繞射作用透過的光再入射到繞射面,在繞射面再度利用繞射作用使其透過而以複數個模式(mode)將光取出到元件外部。An LED element having a member formed on a surface of a sapphire substrate including a light-emitting layer and a group III nitride semiconductor formed on the surface side of the sapphire substrate and emitted from the light-emitting layer is known. The light is incident, and a diffraction surface having a concave portion or a convex portion is formed at a period smaller than an optical wavelength of the light than a coherence length of the light, and a diffraction surface formed on the back side of the substrate is diffracted The surface-reflected light is reflected and incident on the Al-reflecting film of the diffraction surface (see Patent Document 1). In the LED element, light transmitted by the diffraction action is incident on the diffraction surface, and the diffraction surface is again transmitted by the diffraction effect, and the light is taken out to the element in a plurality of modes. external.
[專利文獻1]國際公開第2011/027679號公報[Patent Document 1] International Publication No. 2011/027679
但是,藉由在半導體積層部中的藍寶石基板近旁形成規定密度的空隙(void)提高半導體的結晶品質被發明者們檢討。可是,擔心形成空隙所造成的給予繞射作用不良的影響。However, the inventors have reviewed the improvement of the crystal quality of the semiconductor by forming a void of a predetermined density in the vicinity of the sapphire substrate in the semiconductor laminate portion. However, there is a concern about the effect of giving a diffraction effect due to the formation of voids.
本發明是鑑於前述情況所進行的創作,其目的為提供一種可使因空隙造成的提高半導體的結晶品質與抑制給予繞射作用不良的影響並存之發光元件。The present invention has been made in view of the above circumstances, and an object thereof is to provide a light-emitting element which can improve the crystal quality of a semiconductor due to a void and suppress the influence of imparting a diffraction failure.
為了達成前述目的,在本發明中提供一種發光元件,包含:在表面形成有以1μm以下的週期散佈的凹部或凸部之藍寶石基板;形成於前述藍寶石基板的表面上包含發光層由三族氮化物半導體構成的半導體積層部,在前述藍寶石基板與前述半導體積層部的界面得到由前述發光層發出的光的繞射作用,其中在前述半導體積層部的前述藍寶石基板近旁包含以比前述凹部或凸部的週期小的尺寸形成,密度為2.6×102 /cm2 以上2.3×107 /cm2 以下的空隙。In order to achieve the above object, the present invention provides a light-emitting element comprising: a sapphire substrate having a concave portion or a convex portion dispersed at a period of 1 μm or less on a surface thereof; and a light-emitting layer formed on the surface of the sapphire substrate; a semiconductor layered portion formed of a group nitride semiconductor, wherein a diffraction effect of light emitted from the light-emitting layer is obtained at an interface between the sapphire substrate and the semiconductor layered portion, wherein the concave portion is included in the vicinity of the sapphire substrate in the semiconductor layered portion Or the dimension of the convex portion is small, and the density is 2.6 × 10 2 /cm 2 or more and 2.3 × 10 7 /cm 2 or less.
在上述發光元件中,前述空隙的密度為1.0×107 /cm2 以下也可以。In the above light-emitting element, the density of the voids may be 1.0 × 10 7 /cm 2 or less.
在上述發光元件中,前述半導體積層部具有形成於前述藍寶石基板側的緩衝層(buffer layer),前述緩衝層藉由濺鍍法(sputtering method)形成也可以。In the above light-emitting device, the semiconductor build-up portion may have a buffer layer formed on the sapphire substrate side, and the buffer layer may be formed by a sputtering method.
在上述發光元件中,前述半導體積層部具有形成於前述藍寶石基板側的緩衝層,前述緩衝層由AlN構成也可以。In the above light-emitting device, the semiconductor laminate portion may have a buffer layer formed on the sapphire substrate side, and the buffer layer may be formed of AlN.
在上述發光元件中,以前述凹部或凸部的週期為P,以由前述發光層發出的光的峰值波長(peak wavelength)為λ時,滿足1/2×λ≦P≦16/9×λ的關係也可以。In the above light-emitting element, the period of the concave portion or the convex portion is P, and when the peak wavelength of light emitted from the light-emitting layer is λ, 1/2 × λ ≦ P ≦ 16 / 9 × λ is satisfied. The relationship is also ok.
依照本發明的發光元件,可使因空隙造成的提高半導體的結晶品質與抑制給予繞射作用不良的影響並存。According to the light-emitting element of the present invention, it is possible to improve the crystal quality of the semiconductor due to the voids and to suppress the influence of the diffraction failure.
圖1是顯示本發明的第一實施形態的LED元件之模式剖面圖。 如圖1所示,LED元件1是在藍寶石基板2的表面上形成有由三族氮化物半導體層構成的半導體積層部19。此處,藍寶石的折射率為1.78,三族氮化物半導體層的折射率為2.52。該LED元件1為倒裝晶片(flip chip)型,光主要被由藍寶石基板2的背面側取出。半導體積層部19由藍寶石基板2側起依如下的順序具有:緩衝層10、n型GaN層12、發光層14、電子阻隔層(electron blocking layer)16、p型GaN層18。在p型GaN層18上形成有p側電極27,並且在n型GaN層12上形成有n側電極28。Fig. 1 is a schematic cross-sectional view showing an LED element according to a first embodiment of the present invention. As shown in FIG. 1, the LED element 1 is formed with a semiconductor laminate portion 19 composed of a group III nitride semiconductor layer on the surface of the sapphire substrate 2. Here, the refractive index of sapphire is 1.78, and the refractive index of the group III nitride semiconductor layer is 2.52. The LED element 1 is of a flip chip type, and light is mainly taken out from the back side of the sapphire substrate 2. The semiconductor build-up portion 19 has, in order from the sapphire substrate 2 side, a buffer layer 10, an n-type GaN layer 12, a light-emitting layer 14, and an electron blocking layer (e l e c t r o n b l o c k i n g l a y e r ) 16. The p-type GaN layer 18. A p-side electrode 27 is formed on the p-type GaN layer 18, and an n-side electrode 28 is formed on the n-type GaN layer 12.
如圖1所示,緩衝層10由AlN構成,形成於藍寶石基板2的表面上。緩衝層10藉由濺鍍法形成。當作第一導電型層的n型GaN層12形成於緩衝層10上,藉由n-GaN構成。發光層14形成於n型GaN層12上,藉由GalnN/GaN構成,藉由電子及電洞的注入而發出藍色光。在本實施形態中,發光層14的發光的峰值波長為450nm。As shown in FIG. 1, the buffer layer 10 is made of AlN and is formed on the surface of the sapphire substrate 2. The buffer layer 10 is formed by a sputtering method. An n-type GaN layer 12 as a first conductivity type layer is formed on the buffer layer 10 and is made of n-GaN. The light-emitting layer 14 is formed on the n-type GaN layer 12 and is made of GalnN/GaN, and emits blue light by injection of electrons and holes. In the present embodiment, the peak wavelength of the light emission of the light-emitting layer 14 is 450 nm.
電子阻隔層16形成於發光層14上,藉由p-AlGaN構成。當作第二導電型層的p型GaN層18形成於電子阻隔層16上,藉由p-GaN構成。n型GaN層12到p型GaN層18藉由MOCVD(Metal Organic Chemical Vapor Deposition:金屬有機化學氣相沈積)法形成。此外,至少包含第一導電型層、主動層(active layer)及第二導電型層,若為電壓一被施加於第一導電型層及第二導電型層,就藉由電子及電洞的再結合(recombination)而在主動層發出光的話,則半導體層的層構成是任意的。The electron blocking layer 16 is formed on the light-emitting layer 14 and is made of p-AlGaN. A p-type GaN layer 18 as a second conductivity type layer is formed on the electron blocking layer 16 and is made of p-GaN. The n-type GaN layer 12 to the p-type GaN layer 18 are formed by a MOCVD (Metal Organic Chemical Vapor Deposition) method. In addition, at least the first conductive type layer, the active layer and the second conductive type layer are applied to the first conductive type layer and the second conductive type layer by voltage, and the electron and the hole are used. When the light is emitted from the active layer by recombination, the layer configuration of the semiconductor layer is arbitrary.
藍寶石基板2的表面構成繞射面2a。藍寶石基板2的表面形成平坦部2b,與週期地形成於平坦部2b的複數個凸部2c。各凸部2c的形狀除了圓錐、多角錐等的錐狀之外,也能以將錐的上部切掉的圓錐台、多角錐台等的錐台狀。各凸部2c被設計以使由發光層14發出的光繞射。在本實施形態中,可藉由週期地配置的各凸部2c得到光的垂直化作用。此處,光的垂直化作用是指光的強度分布為由繞射面反射及透過之後比入射到繞射面之前還偏向對藍寶石基板2與半導體積層部19的界面垂直的方向。The surface of the sapphire substrate 2 constitutes a diffraction surface 2a. The surface of the sapphire substrate 2 is formed with a flat portion 2b and a plurality of convex portions 2c that are periodically formed in the flat portion 2b. The shape of each convex portion 2c may be a truncated cone shape such as a truncated cone or a polygonal pyramid, or a truncated cone shape such as a truncated cone or the like. Each convex portion 2c is designed to diffract light emitted from the light-emitting layer 14. In the present embodiment, the verticalization of light can be obtained by the convex portions 2c arranged periodically. Here, the verticalization of light means that the intensity distribution of light is a direction perpendicular to the interface between the sapphire substrate 2 and the semiconductor laminate portion 19 after being reflected and transmitted by the diffraction surface, before being incident on the diffraction surface.
圖2是顯示不同的折射率的界面中的光的繞射作用之說明圖,(a)是顯示在界面反射的狀態,(b)是顯示透過界面的狀態。 此處由布拉格的繞射條件(Bragg's condition of diffraction),於光在界面反射的情形下,對入射角θin 反射角θref 應滿足的條件為 P・n1・(sinθin -sinθref )=m・λ・・・(1) 此處,P為凹部或凸部的週期,n1為入射側的介質的折射率,λ為入射的光的波長,m為整數。當光由半導體積層部19入射到藍寶石基板2時,n1成為三族氮化物半導體的折射率。如圖2(a)所示,以滿足上述(1)式的反射角θref 入射到界面的光被反射。 Fig. 2 is an explanatory view showing a diffraction action of light in an interface having different refractive indexes, wherein (a) shows a state of reflection at the interface, and (b) shows a state of transmission through the interface. Here, Bragg's condition of diffraction, in the case where light is reflected at the interface, the condition that the incident angle θ in reflection angle θ ref should satisfy is P·n1·(sinθ in -sinθ ref )= m・λ・・(1) Here, P is a period of a concave portion or a convex portion, n1 is a refractive index of a medium on the incident side, λ is a wavelength of incident light, and m is an integer. When light is incident on the sapphire substrate 2 by the semiconductor buildup portion 19, n1 becomes the refractive index of the group III nitride semiconductor. As shown in FIG. 2(a), light incident on the interface that satisfies the reflection angle θ ref of the above formula (1) is reflected.
另一方面,由布拉格的繞射條件,於光在界面透過的情形下,對入射角θin 透射角θout 應滿足的條件為 P・(n1・(sinθin -n2・sinθout )=m’・λ・・・(2) 此處,n2為射出側的介質的折射率, m’為整數。例如當光由半導體積層部19入射到藍寶石基板2時,n2成為藍寶石的折射率。如圖2(b)所示,以滿足上述(2)式的透射角θout 入射到界面的光被透過。On the other hand, in the case of the diffraction condition of Bragg, when the light is transmitted through the interface, the condition that the incident angle θ in the transmission angle θ out should satisfy is P·(n1·(sinθ in -n2·sinθ out )=m (2) Here, n2 is the refractive index of the medium on the emission side, and m' is an integer. For example, when light is incident on the sapphire substrate 2 by the semiconductor laminate portion 19, n2 becomes the refractive index of sapphire. As shown in FIG. 2(b), light incident on the interface that satisfies the transmission angle θ out of the above formula (2) is transmitted.
圖3是顯示凹部或凸部的週期以500nm的情形的三族氮化物半導體層與藍寶石基板的界面中之由半導體層側入射到界面的光的入射角,與藉由在界面的繞射作用產生的透射角的關係之圖表。而且,圖4是顯示凹部或凸部的週期以500nm的情形的三族氮化物半導體層與藍寶石基板的界面中之由半導體層側入射到界面的光的入射角,與藉由在界面的繞射作用產生的反射角的關係之圖表。3 is a view showing an incident angle of light incident on the interface from the side of the semiconductor layer in the interface between the group III nitride semiconductor layer and the sapphire substrate at a period of 500 nm in the period of the recess or the projection, and by diffraction at the interface A graph of the relationship of the transmitted angles produced. 4 is a view showing an incident angle of light incident on the interface from the side of the semiconductor layer in the interface between the group III nitride semiconductor layer and the sapphire substrate at a period of 500 nm in the period of the recess or the projection, and by winding at the interface A graph of the relationship between the angles of reflection produced by the action.
在入射到繞射面2a的光存在與一般的平坦面一樣的全反射的臨界角。在GaN系半導體層與藍寶石基板2的界面中臨界角為45.9∘。如圖3所示,在超過臨界角的區域中,在滿足上述(2)式的繞射條件之m’=1、2、3、4的繞射模式下的透射為可能。而且如圖4所示,在超過臨界角的區域中,在滿足上述(1)式的繞射條件之m=1、2、3、4的繞射模式下的反射為可能。當臨界角為45.9∘時,超過臨界角的光輸出(optical output)為約70%,不超過臨界角的光輸出成為約30%。也就是說,取出超過臨界角的區域的光大大地有助於LED元件1的光取出效率的提高。The light incident on the diffraction surface 2a has a critical angle of total reflection as a general flat surface. The critical angle at the interface between the GaN-based semiconductor layer and the sapphire substrate 2 is 45.9 Å. As shown in Fig. 3, in the region exceeding the critical angle, transmission in the diffraction mode satisfying the diffraction conditions of the above formula (2), m' = 1, 2, 3, 4 is possible. Further, as shown in FIG. 4, in the region exceeding the critical angle, it is possible to reflect in the diffraction mode of m=1, 2, 3, and 4 satisfying the diffraction condition of the above formula (1). When the critical angle is 45.9 Å, the optical output exceeding the critical angle is about 70%, and the light output not exceeding the critical angle becomes about 30%. That is to say, the light taken out of the region exceeding the critical angle greatly contributes to an improvement in the light extraction efficiency of the LED element 1.
此處在透射角θout 比入射角θin 小的區域中,透過繞射面2a的光角度變化成對藍寶石基板2與三族氮化物半導體層的界面接近垂直。圖3中以影線(hatching)表示該區域。如圖3所示,針對透過繞射面2a的光,在超過臨界角的區域中,m’=1、2、3的繞射模式的光在所有的角度域角度變化成接近垂直。m’=4的繞射模式的光在一部分的角度域不成為接近垂直,惟因繞射次數大的光的強度較小故影響小,在該一部分的角度域中也實質上會角度變化成接近垂直。也就是說,與在半導體積層部19側入射到繞射面2a的光的強度分布比較,在藍寶石基板2側透過繞射面2a射出的光的強度分布偏向對半導體積層部19與藍寶石基板2的界面垂直的方向。Here, in a region where the transmission angle θ out is smaller than the incident angle θ in , the angle of the light transmitted through the diffraction surface 2 a changes to be perpendicular to the interface between the sapphire substrate 2 and the group III nitride semiconductor layer. This area is indicated by hatching in FIG. As shown in FIG. 3, for the light transmitted through the diffraction surface 2a, in the region exceeding the critical angle, the light of the diffraction pattern of m'=1, 2, 3 changes to be nearly vertical at all angles. The light of the diffraction mode of m'=4 does not become nearly vertical in a part of the angular range, but the influence of the light having a large number of diffractions is small, so that the influence is small, and the angle is substantially changed in the angular domain of the part. Near vertical. In other words, the intensity distribution of the light transmitted through the diffraction surface 2a on the side of the sapphire substrate 2 is biased toward the semiconductor laminate portion 19 and the sapphire substrate 2 as compared with the intensity distribution of the light incident on the diffraction surface 2a on the semiconductor laminate portion 19 side. The vertical direction of the interface.
而且,在反射角θref 比入射角θin 小的區域中,在繞射面2a反射的光角度變化成對藍寶石基板2與三族氮化物半導體層的界面接近垂直。圖4中以影線表示該區域。如圖4所示,針對在繞射面2a反射的光,在超過臨界角的區域中,m=1、2、3的繞射模式的光在所有的角度域角度變化成接近垂直。m=4的繞射模式的光在一部分的角度域不成為接近垂直,惟因繞射次數大的光的強度較小故影響小,在該一部分的角度域中也實質上會角度變化成接近垂直。也就是說,與在半導體積層部19側入射到繞射面2a的光的強度分布比較,在半導體積層部19側由繞射面2a藉由反射而射出的光的強度分布偏向對半導體積層部19與藍寶石基板2的界面垂直的方向。Further, in a region where the reflection angle θ ref is smaller than the incident angle θ in , the angle of the light reflected on the diffraction surface 2 a changes to be perpendicular to the interface between the sapphire substrate 2 and the group III nitride semiconductor layer. This area is indicated by hatching in FIG. As shown in FIG. 4, for the light reflected on the diffraction surface 2a, in the region exceeding the critical angle, the light of the diffraction mode of m=1, 2, 3 changes to be nearly vertical at all angles. The light of the diffraction mode of m=4 does not become nearly vertical in a part of the angular range, but the influence of the light having a large number of diffraction times is small, so that the influence is small, and the angle is substantially changed to be close in the angular domain of the part. vertical. In other words, the intensity distribution of the light emitted by the diffraction surface 2a by the reflection on the semiconductor laminate portion 19 side is biased toward the semiconductor laminate portion as compared with the intensity distribution of the light incident on the diffraction surface 2a on the semiconductor laminate portion 19 side. 19 is perpendicular to the interface of the sapphire substrate 2.
圖5是顯示元件內部中的光的行進方向之說明圖。 如圖5所示,由發光層14發出的光之中超過臨界角入射到藍寶石基板2的光在繞射面2a透過及反射比入射到繞射面2a時還接近對藍寶石基板2垂直的方向。也就是說,透過繞射面2a的光在朝接近垂直角度變化的狀態下入射到藍寶石基板2的背面。而且,在繞射面2a反射的光在朝接近垂直角度變化的狀態下藉由p側電極27及n側電極28反射後,再度入射到繞射面2a。此時的入射角成為比先前的入射角還接近垂直。其結果,能以入射到藍寶石基板2的背面的光當作接近垂直。Fig. 5 is an explanatory view showing a traveling direction of light in the inside of the element. As shown in FIG. 5, among the light emitted from the light-emitting layer 14, light incident on the sapphire substrate 2 beyond the critical angle passes through the diffraction surface 2a and the reflection ratio is closer to the sapphire substrate 2 when it is incident on the diffraction surface 2a. . That is, the light transmitted through the diffraction surface 2a is incident on the back surface of the sapphire substrate 2 in a state of being changed toward a near vertical angle. Then, the light reflected by the diffraction surface 2a is reflected by the p-side electrode 27 and the n-side electrode 28 in a state of being changed toward the vertical angle, and then incident on the diffraction surface 2a again. The incident angle at this time is also nearly perpendicular to the previous incident angle. As a result, the light incident on the back surface of the sapphire substrate 2 can be regarded as being nearly vertical.
圖6是LED元件之局部放大模式剖面圖。 如圖6所示,p側電極27具有:形成於p型GaN層18上之擴散電極(diffusion electrode)21,與形成於擴散電極21上的規定區域之介電質多層膜22,與形成於介電質多層膜22上之金屬電極23。擴散電極21全面地形成於p型GaN層18,由例如ITO(Indium Tin Oxide:銦錫氧化物)等的透明材料構成。而且,介電質多層膜22是重複複數個折射率不同的第一材料22a與第二材料22b的對(pair)而構成。介電質多層膜22例如第一材料22a能以ZrO2 (折射率:2.18),第二材料22b能以SiO2 (折射率:1.46),對數能以5。此外,使用與ZrO2 與SiO2 不同的材料構成介電質多層膜22也可以,例如使用AlN(折射率:2.18)、Nb2 O3 (折射率:2.4)、Ta2 O3 (折射率:2.35)等也可以。金屬電極23被覆介電質多層膜22,由例如Al等的金屬材料構成。金屬電極23經由形成於介電質多層膜22的介層孔(via hole)22c與擴散電極21電連接。Fig. 6 is a partially enlarged schematic cross-sectional view showing the LED element. As shown in FIG. 6, the p-side electrode 27 has a diffusion electrode 21 formed on the p-type GaN layer 18, and a dielectric multilayer film 22 formed in a predetermined region on the diffusion electrode 21, and is formed on A metal electrode 23 on the dielectric multilayer film 22. The diffusion electrode 21 is formed entirely on the p-type GaN layer 18, and is made of a transparent material such as ITO (Indium Tin Oxide). Further, the dielectric multilayer film 22 is formed by repeating a plurality of pairs of the first material 22a and the second material 22b having different refractive indices. The dielectric multilayer film 22 such as the first material 22a can have ZrO 2 (refractive index: 2.18), the second material 22b can have SiO 2 (refractive index: 1.46), and the logarithm can be 5. Further, it is also possible to form the dielectric multilayer film 22 using a material different from ZrO 2 and SiO 2 , for example, AlN (refractive index: 2.18), Nb 2 O 3 (refractive index: 2.4), and Ta 2 O 3 (refractive index). : 2.35) etc. The metal electrode 23 covers the dielectric multilayer film 22 and is made of a metal material such as Al. The metal electrode 23 is electrically connected to the diffusion electrode 21 via a via hole 22c formed in the dielectric multilayer film 22.
如圖6所示,n側電極28係對p型GaN層18至n型GaN層12蝕刻,形成於露出的n型GaN層12上。n側電極28具有:形成於n型GaN層12上之擴散電極24,與形成於擴散電極24上的規定區域之介電質多層膜25,與形成於介電質多層膜25上之金屬電極26。擴散電極24全面地形成於n型GaN層12,由例如ITO(Indium Tin Oxide:銦錫氧化物)等的透明材料構成。而且,介電質多層膜25是重複複數個折射率不同的第一材料25a與第二材料25b的對而構成。介電質多層膜25例如第一材料25a能以ZrO2 (折射率:2.18),第二材料25b能以SiO2 (折射率:1.46),對數能以5。此外,使用與ZrO2 與SiO2 不同的材料構成介電質多層膜25也可以,例如使用AlN(折射率:2.18)、Nb2 O3 (折射率:2.4)、Ta2 O3 (折射率:2.35)等也可以。金屬電極26被覆介電質多層膜25,由例如Al等的金屬材料構成。金屬電極26經由形成於介電質多層膜25的介層孔25c與擴散電極24電連接。As shown in FIG. 6, the n-side electrode 28 is formed by etching the p-type GaN layer 18 to the n-type GaN layer 12 on the exposed n-type GaN layer 12. The n-side electrode 28 has a diffusion electrode 24 formed on the n-type GaN layer 12, a dielectric multilayer film 25 formed in a predetermined region on the diffusion electrode 24, and a metal electrode formed on the dielectric multilayer film 25. 26. The diffusion electrode 24 is formed entirely on the n-type GaN layer 12, and is made of a transparent material such as ITO (Indium Tin Oxide). Further, the dielectric multilayer film 25 is formed by repeating a plurality of pairs of the first material 25a and the second material 25b having different refractive indices. The dielectric multilayer film 25 can have, for example, ZrO 2 (refractive index: 2.18), the second material 25b can have SiO 2 (refractive index: 1.46), and the logarithm can be 5. Further, the dielectric multilayer film 25 may be formed using a material different from ZrO 2 and SiO 2 , for example, AlN (refractive index: 2.18), Nb 2 O 3 (refractive index: 2.4), and Ta 2 O 3 (refractive index) may be used. : 2.35) etc. The metal electrode 26 is covered with the dielectric multilayer film 25, and is made of a metal material such as Al. The metal electrode 26 is electrically connected to the diffusion electrode 24 via a via hole 25c formed in the dielectric multilayer film 25.
在該LED元件1中,p側電極27及n側電極28構成反射部。p側電極27及n側電極28分別為越接近垂直的角度反射率越高。至反射部除了由發光層14發出直接入射的光之外,在藍寶石基板2的繞射面2a反射,角度變化成對界面接近垂直的光也入射到反射部。也就是說,入射到反射部的光的強度分布與藍寶石基板2的表面為平坦面的情形比較的話,成為偏向接近垂直的狀態。In the LED element 1, the p-side electrode 27 and the n-side electrode 28 constitute a reflection portion. The p-side electrode 27 and the n-side electrode 28 have higher angular reflectivities toward the vertical direction, respectively. The reflection portion is reflected on the diffraction surface 2a of the sapphire substrate 2 in addition to the light directly incident from the light-emitting layer 14, and the light whose angle is changed to be perpendicular to the interface also enters the reflection portion. In other words, when the intensity distribution of the light incident on the reflecting portion is compared with the case where the surface of the sapphire substrate 2 is a flat surface, the intensity is relatively close to the vertical.
圖7是顯示反射部的反射率的一例之圖表。在圖7的例子中,藉由ZrO2 與SiO2 的組合構成形成於ITO上的介電質多層膜的對數以5,重疊於介電質多層膜形成了Al層。如圖7所示,在入射角為0度到45度的角度域中實現98%以上的反射率。而且,在入射角為0度到75度的角度域中實現90%以上的反射率。如此,介電質多層膜與金屬層的組合對於成為對界面接近垂直的光成為有利的反射條件。此外,確認了在ITO上僅形成Al層的情形不取決於入射角,成為約84%的一定的反射率。FIG. 7 is a graph showing an example of the reflectance of the reflection portion. In the example of FIG. 7, the logarithm of the dielectric multilayer film formed on the ITO by the combination of ZrO 2 and SiO 2 is 5, and the Al layer is formed by being superposed on the dielectric multilayer film. As shown in FIG. 7, a reflectance of 98% or more is achieved in an angle range of an incident angle of 0 to 45 degrees. Moreover, a reflectance of 90% or more is achieved in an angle range in which the incident angle is from 0 to 75 degrees. As such, the combination of the dielectric multilayer film and the metal layer is a reflective condition that is advantageous for light having an interface close to vertical. Further, it was confirmed that the case where only the Al layer was formed on the ITO did not depend on the incident angle, and it became a certain reflectance of about 84%.
其次,參照圖8就藍寶石基板2詳細敘述。圖8是顯示藍寶石基板,(a)是模式斜視圖,(b)是顯示A-A剖面之模式說明圖。Next, the sapphire substrate 2 will be described in detail with reference to FIG. Fig. 8 is a view showing a sapphire substrate, (a) is a schematic perspective view, and (b) is a schematic explanatory view showing an A-A cross section.
如圖8(a)所示,繞射面2a以平面視各凸部2c的中心成為正三角形的頂點的位置而以規定的週期排列於假想的三角格子的交點而形成。此外,此處所謂的週期是指鄰接的凸部2c中的高度的尖峰位置(peak position)的距離。在本實施形態中,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,滿足如下的關係: 1/2×λ≦P≦16/9×λ 而設定凸部2c的週期。關於該關係以 23/45×λ≦P≦14/9×λ 較佳。而且,凸部2c的週期被設定,以使透射繞射光包含至少2次的繞射光,不包含5次的繞射光。而且,凸部2c的週期被設定,以使反射繞射光包含至少3次的繞射光。As shown in FIG. 8(a), the diffraction surface 2a is formed by arranging the positions of the apexes of the equilateral triangles in a plan view in a plane at a predetermined period in the intersection of the virtual triangular lattices. Further, the term "cycle" as used herein refers to the distance of the peak position of the height in the adjacent convex portion 2c. In the present embodiment, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 1/2 × λ ≦ P ≦ 16 / 9 × λ is set. The period of the convex portion 2c. It is preferable that the relationship is 23/45 × λ ≦ P ≦ 14 / 9 × λ. Further, the period of the convex portion 2c is set such that the transmitted diffracted light includes at least two times of diffracted light, and does not include five times of diffracted light. Moreover, the period of the convex portion 2c is set such that the reflected diffracted light contains at least 3 times of diffracted light.
但是,藉由在半導體積層部19中的藍寶石基板2近旁形成規定密度的空隙提高半導體的結晶品質被發明者們檢討。當在藍寶石基板2上形成以1μm以下的週期散佈的凹部或凸部2c時,藉由形成空隙提高半導體的結晶品質被預想。但是,因擔心形成空隙所造成的給予繞射作用不良的影響,因此調查了空隙造成的給予繞射作用的影響。此外,此處所謂的空隙是有光學的影響的大小者,數奈米(nano)到數十奈米左右的大小者因可忽視光學的影響故不考慮。However, the inventors have reviewed the improvement of the crystal quality of the semiconductor by forming a void having a predetermined density in the vicinity of the sapphire substrate 2 in the semiconductor build-up portion 19. When the concave portion or the convex portion 2c which is dispersed at a period of 1 μm or less is formed on the sapphire substrate 2, it is expected that the crystal quality of the semiconductor is improved by forming the void. However, since the influence of the diffraction action caused by the formation of the void is feared, the influence of the diffraction effect by the void is investigated. In addition, the gaps referred to herein are those having an optical influence, and the number of nanometers to several tens of nanometers is not considered because the influence of optics can be ignored.
圖9是顯示凸部的週期與空隙密度的關係之表。空隙密度的測定是在緩衝層以藉由MOCVD法在低溫使其成長的GaN的情形,與在緩衝層以藉由濺鍍法形成的AlN的情形下進行。此外,緩衝層的厚度以80nm。 如圖9所示,與緩衝層10以GnN的情形比較,在緩衝層10以AlN的情形下空隙的密度減少。而且,確認了凸部2c的週期越小空隙密度越大。也就是說,半導體中的空隙考慮為起因於週期地形成的凸部2c。當緩衝層10以藉由MOCVD法使其成長的GaN時,不管凸部2c的週期,空隙密度超過了1.0×107 /cm2 。另一方面,當緩衝層10以藉由濺鍍法形成的AlN時,空隙密度成為1.0×107 /cm2 以下。此外,進行該測定的光學顯微鏡的精度的關係上,空隙密度為1.0×107 /cm2 以下的情形因無法掌握正確的值,因此在圖9以1.0×107 /cm2 以下而顯示。Fig. 9 is a table showing the relationship between the period of the convex portion and the void density. The measurement of the void density is carried out in the case where the buffer layer is grown by GaN at a low temperature by the MOCVD method, and in the case where the buffer layer is formed of AlN by sputtering. Further, the thickness of the buffer layer was 80 nm. As shown in FIG. 9, compared with the case where the buffer layer 10 is GnN, the density of the voids is reduced in the case where the buffer layer 10 is AlN. Further, it was confirmed that the smaller the period of the convex portion 2c, the larger the void density. That is, the void in the semiconductor is considered to be caused by the convex portion 2c which is periodically formed. When the buffer layer 10 is grown by GaN by MOCVD, the void density exceeds 1.0 × 10 7 /cm 2 regardless of the period of the convex portion 2c. On the other hand, when the buffer layer 10 is AlN formed by sputtering, the void density is 1.0 × 10 7 /cm 2 or less. In addition, in the case of the accuracy of the optical microscope for the measurement, when the void density is 1.0 × 10 7 /cm 2 or less, since the correct value cannot be grasped, it is displayed at 1.0 × 10 7 /cm 2 or less in Fig. 9 .
如此,緩衝層10的空隙密度藉由變更緩衝層10的材質而變化。而且,藉由使緩衝層10的膜厚變化,也能使空隙密度變化。圖10是顯示緩衝層的膜厚與空隙密度的關係之圖表。在此處是緩衝層10以藉由濺鍍法形成的AlN而進行了測定。此外,後述的退火時間(annealing time)以5分。如圖10所示,若加大緩衝層10的膜厚,則空隙密度變低,若減小緩衝層10的膜厚,則空隙密度變高。As described above, the void density of the buffer layer 10 changes by changing the material of the buffer layer 10. Further, the void density can be changed by changing the film thickness of the buffer layer 10. Fig. 10 is a graph showing the relationship between the film thickness of the buffer layer and the void density. Here, the buffer layer 10 was measured by AlN formed by a sputtering method. Further, the annealing time to be described later was 5 minutes. As shown in FIG. 10, when the film thickness of the buffer layer 10 is increased, the void density is lowered, and when the film thickness of the buffer layer 10 is made small, the void density is increased.
而且,當以濺鍍法形成緩衝層10時,可藉由濺鍍後的退火的有無而使空隙密度變化。在本實施形態中,以例如400℃到700℃藉由濺鍍形成緩衝層10,例如3分鐘到10分鐘,以例如900℃到1100℃進行退火,照那樣連續地形成半導體積層部19製作了LED元件1。Further, when the buffer layer 10 is formed by sputtering, the void density can be changed by the presence or absence of annealing after sputtering. In the present embodiment, the buffer layer 10 is formed by sputtering at, for example, 400 ° C to 700 ° C, for example, for 3 minutes to 10 minutes, annealing is performed at, for example, 900 ° C to 1100 ° C, and the semiconductor laminate portion 19 is continuously formed as described above. LED element 1.
圖11是顯示LED元件中的波長與透射率的關係之圖表。透射率的測定是對LED元件1的藍寶石基板2照射規定波長的光於垂直的方向而進行。此處,試樣體1為以藉由濺鍍法形成緩衝層10退火時間以5分的AlN,緩衝層10的厚度以80nm而製作。而且,試樣體2為緩衝層10以藉由MOCVD法在低溫使其成長的GaN,緩衝層的厚度以25nm而製作。各試樣體都是凸部2c的週期以460nm。此外,在藉由MOCVD法在低溫使其成長的GaN中,即使使緩衝層的厚度變化,空隙密度也大致一定。Fig. 11 is a graph showing the relationship between the wavelength and the transmittance in the LED element. The transmittance is measured by irradiating the sapphire substrate 2 of the LED element 1 with light of a predetermined wavelength in a vertical direction. Here, the sample body 1 was made of AlN having a buffer layer 10 annealing time of 5 minutes by sputtering, and the thickness of the buffer layer 10 was 80 nm. Further, the sample body 2 was made of GaN in which the buffer layer 10 was grown at a low temperature by an MOCVD method, and the thickness of the buffer layer was 25 nm. Each sample body has a period of the convex portion 2c of 460 nm. Further, in GaN grown at a low temperature by the MOCVD method, even if the thickness of the buffer layer is changed, the void density is substantially constant.
如圖11所示,若緩衝層10以藉由濺鍍法形成的AlN,則與藉由MOCVD法在低溫使其成長的GaN的情形比較,可理解透射率提高。具體上,在450nm的波長的光中,透射率提高了3.2%。此點被認為是起因於半導體積層部19中的空隙的產生被抑制。而且,使用各試樣體實際製作了LED元件的結果,光取出效率提高了9.4%。As shown in FIG. 11, when the buffer layer 10 is made of AlN formed by a sputtering method, it is understood that the transmittance is improved as compared with the case of GaN which is grown at a low temperature by the MOCVD method. Specifically, in light of a wavelength of 450 nm, the transmittance is improved by 3.2%. This point is considered to be caused by the occurrence of voids in the semiconductor laminate portion 19. Further, as a result of actually producing an LED element using each sample body, the light extraction efficiency was improved by 9.4%.
若緩衝層10以藉由濺鍍法形成的AlN,則空隙的產生被抑制的理由考慮如下。首先,若利用濺鍍法形成緩衝層,則因原料由靶(target)朝藍寶石基板2直進,因此在藍寶石基板2的各凸部2c之間也均勻地形成有緩衝層10。此外,藉由緩衝層10以AlN,與GaN比較因遷移(migration)被抑制,故空隙的產生被抑制。When the buffer layer 10 is made of AlN formed by a sputtering method, the reason why the generation of voids is suppressed is considered as follows. First, when the buffer layer is formed by the sputtering method, since the raw material is directed from the target toward the sapphire substrate 2, the buffer layer 10 is uniformly formed between the convex portions 2c of the sapphire substrate 2. Further, since AlN is suppressed by migration of the buffer layer 10 compared with GaN, generation of voids is suppressed.
而且,製作複數個使空隙密度變化的LED元件1,進行了光取出效率如何變化的實驗。圖12是顯示LED元件中的空隙密度與光取出效率的關係之圖表。各LED元件1是緩衝層10以藉由濺鍍法形成的AlN,凸部2c的週期以460nm。空隙的密度藉由使緩衝層10的膜厚變化而使其變化。具體上,空隙密度以1.0×10/cm2 、2.6×102 /cm2 、1.3×104 /cm2 、2.3×107 /cm2 、5.0×108 /cm2 。此外,空隙密度的測定是藉由乾式蝕刻裝置(dry etching apparatus)對半導體積層部蝕刻使空隙露出,使用電子顯微鏡進行。據此,可得到比圖9所示的數據還高的精度的數據。Further, an experiment was conducted in which a plurality of LED elements 1 which change the gap density were produced, and how the light extraction efficiency was changed. Fig. 12 is a graph showing the relationship between the void density and the light extraction efficiency in the LED element. Each of the LED elements 1 is AlN formed by a sputtering method on the buffer layer 10, and the period of the convex portion 2c is 460 nm. The density of the voids is changed by changing the film thickness of the buffer layer 10. Specifically, the void density is 1.0 × 10 / cm 2 , 2.6 × 10 2 /cm 2 , 1.3 × 10 4 /cm 2 , 2.3 × 10 7 /cm 2 , and 5.0 × 10 8 /cm 2 . Further, the measurement of the void density was performed by etching the semiconductor laminate portion by a dry etching apparatus to expose the voids, and using an electron microscope. According to this, it is possible to obtain data with higher accuracy than the data shown in FIG.
如圖12所示,空隙密度到2.3×107 /cm2 為止光取出效率比較良好,一成為5.0×108 /cm2 ,光取出效率就降低。也就是說,可理解為空隙密度一變高,光取出效率就降低。12, the void density to 2.3 × 10 7 / cm 2 until the light extraction efficiency is relatively good, be a 5.0 × 10 8 / cm 2, light extraction efficiency is lowered. That is to say, it can be understood that as the void density becomes higher, the light extraction efficiency is lowered.
圖13是顯示空隙密度與半導體積層部的貫通差排密度的關係之圖表。如圖13所示,貫通差排密度在空隙密度為1.0×10/cm2 時為1.0×109 /cm2 ,在2.6×102 /cm2 時為4.0×108 /cm2 ,在1.3×104 /cm2 時為3.2×108 /cm2 ,在2.3×107 /cm2 時為2.2×108 /cm2 ,在5.0×108 /cm2 時為1.6×108 /cm2 。如圖13所示,空隙密度為2.6×102 /cm2 以上貫通差排密度比較低,一成為1.0×10/cm2 ,貫通差排密度就變高。也就是說,可理解為空隙密度一變低,貫通差排密度就變高。Fig. 13 is a graph showing the relationship between the void density and the penetration difference density of the semiconductor laminate portion. As shown in Fig. 13, the through-difference density was 1.0 × 10 9 /cm 2 at a void density of 1.0 × 10 /cm 2 and 4.0 × 10 8 /cm 2 at 2.6 × 10 2 /cm 2 at 1.3. × 10 4 cm 2 hour / was 3.2 × 10 8 / cm 2, at 2.3 × 10 7 2 when / cm is 2.2 × 10 8 / cm 2, at 5.0 × 10 8 2 when / cm is 1.6 × 10 8 / cm 2 . As shown in Fig. 13, the void density is 2.6 × 10 2 /cm 2 or more, and the through-displacement density is relatively low, and once it becomes 1.0 × 10 / cm 2 , the penetration difference density becomes high. That is to say, it can be understood that as the void density becomes lower, the through-difference density becomes higher.
由以上,藉由在半導體積層部19的藍寶石基板2近旁包含以比凸部2c的週期小的尺寸形成,密度為2.6×102 /cm2 以上2.3×107 /cm2 以下的空隙,可使因空隙造成的提高半導體的結晶品質與抑制給予繞射作用不良的影響並存。In the vicinity of the sapphire substrate 2 of the semiconductor laminated portion 19, the gap is formed to be smaller than the period of the convex portion 2c, and the density is 2.6 × 10 2 /cm 2 or more and 2.3 × 10 7 /cm 2 or less. Increasing the crystal quality of the semiconductor due to the voids and suppressing the influence of the diffraction failure.
圖14是顯示緩衝層的厚度與透射率的關係之表。圖14中[FSS]是表示使用未形成有凹凸的藍寶石基板2之LED元件1, [MPSS]是表示使用如本實施形態形成有散佈的凸部的藍寶石基板2之LED元件1。各試樣體都是凸部2c的週期以460nm,緩衝層10以藉由濺鍍法形成的AlN,使厚度變化成20nm、40nm、60nm及80nm。 如圖14所示,在[FSS]中透射率大致一定,但在[MPSS]中緩衝層10的厚度一成為20nm,透射率就降低。此點可考慮為乃因半導體積層部19中的各半導體層表面的平坦性失去。如此,各半導體層表面的平坦性一失去,半導體的結晶品質就變差。Fig. 14 is a table showing the relationship between the thickness of the buffer layer and the transmittance. In Fig. 14, [FSS] is an LED element 1 which uses a sapphire substrate 2 on which irregularities are not formed, and [MPSS] is an LED element 1 in which a sapphire substrate 2 in which a convex portion is formed as in the present embodiment is used. Each of the sample bodies had a period of 460 nm in which the convex portion 2c was formed, and the buffer layer 10 was changed in thickness to 20 nm, 40 nm, 60 nm, and 80 nm by AlN formed by sputtering. As shown in Fig. 14, the transmittance is substantially constant in [FSS], but in [MPSS], the thickness of the buffer layer 10 becomes 20 nm, and the transmittance is lowered. This point is considered to be because the flatness of the surface of each semiconductor layer in the semiconductor build-up portion 19 is lost. As a result, the flatness of the surface of each semiconductor layer is lost, and the crystal quality of the semiconductor is deteriorated.
圖15是以極座標顯示LED元件的光分布特性之圖。此處,試樣體3為[MPSS],緩衝層10以藉由MOCVD法在低溫使其成長的GaN,緩衝層10的厚度以25nm而製作。試樣體3的空隙密度為5.0×107 /cm2 。而且,試樣體4為[FSS],緩衝層10以藉由MOCVD法在低溫使其成長的GaN,緩衝層10的厚度以25nm而製作。而且,試樣體5為緩衝層10以藉由濺鍍法形成的AlN,緩衝層10的厚度以60nm而製作。試樣體5的空隙密度為1.0×104 /cm2 。此外,在圖15的各圖中,以垂直於藍寶石基板2的方向為0度(光軸)而顯示。而且,各試樣體的發光層14的發光波長以450nm。Fig. 15 is a view showing the light distribution characteristics of the LED elements in polar coordinates. Here, the sample body 3 is [MPSS], and the buffer layer 10 is made of GaN which is grown at a low temperature by the MOCVD method, and the thickness of the buffer layer 10 is 25 nm. The sample body 3 had a void density of 5.0 × 10 7 /cm 2 . Further, the sample body 4 was [FSS], and the buffer layer 10 was made of GaN grown at a low temperature by an MOCVD method, and the thickness of the buffer layer 10 was 25 nm. Further, the sample body 5 was made of AlN formed by a sputtering method for the buffer layer 10, and the thickness of the buffer layer 10 was 60 nm. The sample body 5 had a void density of 1.0 × 10 4 /cm 2 . Further, in each of the drawings of Fig. 15, the direction perpendicular to the sapphire substrate 2 is 0 degree (optical axis). Further, the emission wavelength of the light-emitting layer 14 of each sample body was 450 nm.
如試樣體4所示,當在藍寶石基板2的表面未形成有凸部2c時,光由LED元件1等向地(isotropically)射出。相對於此,如試樣體3及試樣體5所示,藉由形成可得到繞射作用的凸部2c而使光分布特性變化。具體上,如試樣體5所示,在光分布特性中在特定的角度域存在強度比其他高之處。判明了該處是由在反射部反射後透過繞射面的±1次的光造成的。As shown in the sample body 4, when the convex portion 2c is not formed on the surface of the sapphire substrate 2, light is emitted isotropically emitted by the LED element 1 or the like. On the other hand, as shown in the sample body 3 and the sample body 5, the light distribution characteristics are changed by forming the convex portion 2c which can obtain the diffraction action. Specifically, as shown in the sample body 5, in the light distribution characteristic, there is a higher intensity than the others in a specific angle range. It was found that the place was caused by ±1 time of light transmitted through the diffraction surface after being reflected by the reflection portion.
此處,試樣體3的光分布特性與試樣體5不同可考慮為是因形成於半導體積層部19中的空隙造成的光的散射的影響。也就是說,空隙密度一超過1.0×107 /cm2 ,散射的影響就變大,成為像試樣體3的光分布特性。如此散射的影響一變大,就變成對利用繞射作用取出光的LED元件1不利。Here, the light distribution characteristic of the sample body 3 is different from the sample body 5 in consideration of the influence of scattering of light by the voids formed in the semiconductor layer stacking portion 19. In other words, when the void density exceeds 1.0 × 10 7 /cm 2 , the influence of scattering becomes large, and the light distribution characteristics of the sample body 3 become. As the influence of such scattering becomes larger, it becomes disadvantageous for the LED element 1 which takes out light by the diffraction action.
進而參照圖16至圖21根據模擬(simulation)就由LED元件1取出的光的光分布特性進行說明。圖16是以極座標顯示LED元件的光分布特性,(a)是顯示在藍寶石基板未形成有凸部的狀態之圖,(b)~(h)是顯示在藍寶石基板形成有凸部的狀態之圖。此處(b)是顯示週期為200nm之圖,(c)是顯示週期為225nm之圖,(d)是顯示週期為320nm之圖,(e)是顯示週期為450nm之圖,(f)是顯示週期為600nm之圖,(g)是顯示週期為700nm之圖,(h)是顯示週期為800nm之圖。此外,在圖16的各圖中,以垂直於藍寶石基板的方向為0度(光軸)而顯示。Further, the light distribution characteristics of the light taken out by the LED element 1 will be described based on simulations with reference to FIGS. 16 to 21 . Fig. 16 is a view showing the light distribution characteristics of the LED element in the polar coordinates, (a) showing a state in which the convex portion is not formed on the sapphire substrate, and (b) to (h) showing the state in which the convex portion is formed on the sapphire substrate. Figure. Here, (b) is a graph showing a period of 200 nm, (c) is a graph showing a period of 225 nm, (d) is a graph showing a period of 320 nm, (e) is a graph showing a period of 450 nm, and (f) is a graph showing a period of 450 nm. The display period is a graph of 600 nm, (g) is a graph showing a period of 700 nm, and (h) is a graph showing a period of 800 nm. Further, in each of the graphs of Fig. 16, the direction perpendicular to the sapphire substrate is 0 degree (optical axis).
此處為了確認模擬的計算值等是否妥當,比較由模擬得到的計算值與試樣體的實測值而進行了檢討。該檢討藉由比較由模擬計算的積分強度與使試樣體發光而得到的實測值而進行。圖17是顯示各基板的計算值與實測值之表。圖17中[FSS]是表示未形成有凹凸的基板,[PSS]是表示形成有線狀的凹凸的基板,[MPSS]是表示如本實施形態形成有散佈的凹部或凸部的基板。如圖17所示,任何基板計算值與實測值都大致一致,可理解為模擬的計算值等妥當。Here, in order to confirm whether or not the calculated value of the simulation is appropriate, the calculated value obtained by the simulation and the measured value of the sample body are compared and reviewed. This review was carried out by comparing the integrated intensity calculated by the simulation with the measured value obtained by illuminating the sample body. Fig. 17 is a table showing calculated values and measured values of the respective substrates. In Fig. 17, [FSS] is a substrate on which irregularities are not formed, [PSS] is a substrate on which linear irregularities are formed, and [MPSS] is a substrate on which concave portions or convex portions are formed in the present embodiment. As shown in Fig. 17, the calculated value of any substrate is substantially the same as the measured value, which can be understood as the calculated value of the simulation and the like.
針對圖16的光分布特性進行檢討。如圖16(a)所示,在藍寶石基板2的表面未形成有凸部2c的情形光由LED元件1等向地射出。相對於此,如圖16(b)~(h)所示,藉由形成可得到繞射作用的凸部2c而使光分布特性變化。具體上如圖16(b)、(c)等所示,在光分布特性中在特定的角度域存在強度比其他高之處A。判明了該處A是由在反射部反射後透過繞射面的±1次的光造成的。再者如圖16(b)~(h)所示,藉由使凸部2c的週期變化而使該處A的角度域變化。The light distribution characteristics of FIG. 16 were reviewed. As shown in FIG. 16(a), when the convex portion 2c is not formed on the surface of the sapphire substrate 2, light is emitted from the LED element 1 or the like. On the other hand, as shown in FIGS. 16(b) to 16(h), the light distribution characteristics are changed by forming the convex portion 2c which can obtain the diffraction action. Specifically, as shown in FIGS. 16(b), (c) and the like, in the light distribution characteristic, there is a point A in which the intensity is higher than the others in a specific angle range. It was found that the portion A was caused by ±1 time of light transmitted through the diffraction surface after being reflected by the reflecting portion. Further, as shown in FIGS. 16(b) to (h), the angular range of the portion A is changed by changing the period of the convex portion 2c.
圖18是就對光軸的規定角度範圍內的光顯示積分強度的變化之圖表。在圖18中,以橫軸為凸部的週期,以縱軸為對光軸±30度以內的積分強度。此處虛線是表示線狀凸部的週期為3μm的PSS基板的積分強度。而且,一點鏈線是表示FSS基板的積分強度。Fig. 18 is a graph showing changes in integrated intensity of light in a predetermined angular range with respect to the optical axis. In Fig. 18, the horizontal axis represents the period of the convex portion, and the vertical axis represents the integrated intensity within ±30 degrees of the optical axis. Here, the broken line indicates the integrated intensity of the PSS substrate having a period of 3 μm of the linear convex portion. Moreover, the one-point chain line indicates the integrated intensity of the FSS substrate.
如圖18所示,凸部2c的週期為225nm以上800nm以下,積分強度比PSS基板大。也就是說,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,使其滿足如下的關係: 1/2×λ≦P≦16/9×λ 的話,可比PSS基板還加大光軸上的光強度。而且,在該式成立的條件下,由於是得到繞射作用的狀態,因此半導體積層部19的空隙的影響變大。As shown in FIG. 18, the period of the convex portion 2c is 225 nm or more and 800 nm or less, and the integrated intensity is larger than that of the PSS substrate. In other words, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 1/2 × λ ≦ P ≦ 16 / 9 × λ, The light intensity on the optical axis can also be increased compared to the PSS substrate. Further, under the condition that the equation is established, since the diffraction action is obtained, the influence of the void of the semiconductor laminate portion 19 is increased.
而且如圖18所示,凸部2c的週期為230nm以上700nm以下,積分強度比FSS基板大。也就是說,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,使其滿足如下的關係: 23/45×λ≦P≦14/9×λ 的話,可比FSS基板還加大光軸上的光強度。而且,在該式成立的條件下,由於是得到繞射作用的狀態,因此半導體積層部19的空隙的影響變大。Further, as shown in FIG. 18, the period of the convex portion 2c is 230 nm or more and 700 nm or less, and the integrated intensity is larger than that of the FSS substrate. In other words, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 23/45 × λ ≦ P ≦ 14 / 9 × λ, The light intensity on the optical axis can also be increased compared to the FSS substrate. Further, under the condition that the equation is established, since the diffraction action is obtained, the influence of the void of the semiconductor laminate portion 19 is increased.
圖19是顯示透射繞射光的容許次數與積分強度的關係之圖表。此處容許次數是指透射繞射光包含到幾次的成分呢(被容許呢)。此外,圖19中的一點鏈線是表示FSS基板的積分強度。Fig. 19 is a graph showing the relationship between the allowable number of transmitted diffracted lights and the integrated intensity. The allowable number of times here refers to the composition of the transmitted diffracted light that is included several times (allowed). Further, the one-dot chain line in Fig. 19 indicates the integrated intensity of the FSS substrate.
如圖19所示,關於透射繞射光若被容許到2次、3次或4次,則始終會超過FSS基板的積分強度,另一方面,當透射繞射光只被容許1次時,或被容許5次以上時,則低於FSS基板的積分強度。也就是說關於透射繞射光,設計以使包含至少2次的繞射光,不包含5次的繞射光較佳。As shown in FIG. 19, if the transmitted diffracted light is allowed to be 2, 3, or 4 times, the integrated intensity of the FSS substrate is always exceeded. On the other hand, when the transmitted diffracted light is allowed only once, or When it is allowed to be 5 or more times, it is lower than the integrated intensity of the FSS substrate. That is to say, with respect to the transmitted diffracted light, it is preferable to design the diffracted light including at least 2 times and the diffracted light not including 5 times.
圖20是顯示反射繞射光的容許次數與積分強度的關係之圖表。此處容許次數是指反射繞射光包含到幾次的成分呢(被容許呢)。此外,圖20中的一點鏈線是表示FSS基板的積分強度。Fig. 20 is a graph showing the relationship between the allowable number of reflected diffracted lights and the integrated intensity. The allowable number of times here refers to the composition of the reflected diffracted light that is included several times (allowed). Further, the one-dot chain line in Fig. 20 indicates the integrated intensity of the FSS substrate.
如圖20所示,關於反射繞射光,若被容許3次以上,則始終會超過FSS基板的積分強度,另一方面,當反射繞射光只被容許2次以下時,則低於FSS基板的積分強度。也就是說關於反射繞射光,設計以使包含至少3次的繞射光較佳。As shown in FIG. 20, when the reflected diffracted light is allowed to be three or more times, the integrated intensity of the FSS substrate is always exceeded. On the other hand, when the reflected diffracted light is allowed only twice or less, it is lower than the FSS substrate. Integral intensity. That is to say, with respect to the reflected diffracted light, it is preferable to design the diffracted light including at least 3 times.
圖21是顯示凸部的週期與透射繞射光及反射繞射光的容許次數的關係之圖表。在圖21中也是發光層14的發光波長以450nm。 如圖21所示,關於透射繞射光,若被容許到2次、3次或4次的凸部2c的週期為260nm到620nm。也就是說,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,使其滿足如下的關係: 26/45×λ≦P≦62/45×λ 的話,關於透射繞射光,容許次數成為2次到4次。Fig. 21 is a graph showing the relationship between the period of the convex portion and the allowable number of the transmitted diffracted light and the reflected diffracted light. Also in Fig. 21, the light-emitting layer 14 has an emission wavelength of 450 nm. As shown in FIG. 21, the period of the convex portion 2c which is allowed to be 2, 3, or 4 times with respect to the transmitted diffracted light is 260 nm to 620 nm. In other words, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 26/45 × λ ≦ P ≦ 62 / 45 × λ, Regarding the transmitted diffracted light, the allowable number of times is 2 to 4 times.
另一方面,關於反射繞射光,被容許3次以上的凸部2c的週期為280nm。也就是說,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,使其滿足如下的關係: 28/45×λ≦P 的話,關於反射繞射光,容許次數成為3次以上。也就是說,為了使透射繞射光的容許次數成為2次到4次之間,反射繞射光的容許次數成為3次以上,使其滿足如下的關係: 26/45×λ≦P≦62/45×λ 的話即可。 On the other hand, regarding the reflected diffracted light, the period of the convex portion 2c which is allowed to be three or more times is 280 nm. In other words, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 28/45 × λ ≦ P, for the reflected diffracted light, The number of times is three or more. In other words, in order to make the allowable number of transmitted diffracted lights between two and four times, the allowable number of reflected diffracted lights is three or more times, and the following relationship is satisfied: 26/45×λ≦P≦62/45 ×λ can be.
在如以上構成的LED元件1中,因半導體積層部19中的空隙密度成為1.0×107 /cm2 以下,故可使散射的影響成最小限度,不會損及由繞射作用產生的光分布特性。而且,因藉由濺鍍法形成緩衝層10,故可抑制半導體積層部19中的空隙的產生。進而藉由緩衝層10以AlN,可有效地抑制半導體積層部19中的空隙的產生。再者,藉由緩衝層10的厚度以60nm以下,與以往的[FSS]比較可提高半導體的結晶品質。進而藉由使緩衝層10的厚度超過20nm,可抑制半導體積層部19的結晶表面的平坦性惡化。In the LED element 1 having the above configuration, since the void density in the semiconductor build-up portion 19 is 1.0 × 10 7 /cm 2 or less, the influence of scattering can be minimized, and the light generated by the diffraction can be prevented from being damaged. Distribution characteristics. Further, since the buffer layer 10 is formed by a sputtering method, generation of voids in the semiconductor build-up portion 19 can be suppressed. Further, by the AlN of the buffer layer 10, the generation of voids in the semiconductor build-up portion 19 can be effectively suppressed. Further, by the thickness of the buffer layer 10 being 60 nm or less, the crystal quality of the semiconductor can be improved as compared with the conventional [FSS]. Further, by making the thickness of the buffer layer 10 more than 20 nm, the deterioration of the flatness of the crystal surface of the semiconductor buildup portion 19 can be suppressed.
而且,在本實施形態的LED元件1中,因配設繞射面2a及反射部,故可使由元件射出的光的光分布特性變化成接近垂直。再者,以凸部2c的週期為P,以由發光層14發出的光的峰值波長為λ時,因使其滿足如下的關係: 1/2×λ≦P≦16/9×λ 故可加大由元件取出的光軸周圍的光量。因此,可利用繞射作用提高光的取出效率,同時利用起因於繞射的光分布特性實現適切的光分布。Further, in the LED element 1 of the present embodiment, since the diffraction surface 2a and the reflection portion are disposed, the light distribution characteristics of the light emitted from the element can be changed to be nearly vertical. Further, when the period of the convex portion 2c is P and the peak wavelength of the light emitted from the light-emitting layer 14 is λ, the following relationship is satisfied: 1/2 × λ ≦ P ≦ 16 / 9 × λ Increase the amount of light around the optical axis taken out of the component. Therefore, it is possible to increase the light extraction efficiency by the diffraction action while realizing an appropriate light distribution by utilizing the light distribution characteristics due to the diffraction.
而且在繞射面2a中,因關於透射繞射光使其被容許到2次、3次或4次,關於反射繞射光使其被容許3次以上,故可加大由元件取出的光軸周圍的光量。Further, in the diffraction surface 2a, since the diffracted light is allowed to be allowed to be applied twice, three times or four times, and the diffracted light is allowed to be allowed three times or more, the optical axis around the element can be enlarged. The amount of light.
而且,可藉由繞射面2a中的光的垂直化格外地縮短由發光層14發出的光到達藍寶石基板2的背面的距離,可抑制元件內部中的光的吸收。在LED元件中,因超過界面的臨界角的角度區域的光傳播於橫向,故有在元件內部光被吸收的問題,惟因在繞射面2a使超過臨界角的角度區域的光成接近垂直,故可飛躍地減少在元件內部被吸收的光。再者在本實施形態中,因反射部以介電質多層膜22、25與金屬層23、26的組合,對界面越接近垂直的角度反射率越高,故對於成為對界面接近垂直的光成為有利的反射條件。Further, by the verticalization of the light in the diffraction surface 2a, the distance of the light emitted from the light-emitting layer 14 to the back surface of the sapphire substrate 2 can be particularly shortened, and the absorption of light in the inside of the element can be suppressed. In the LED element, light in an angular region exceeding the critical angle of the interface propagates in the lateral direction, so there is a problem that light is absorbed inside the element, but the light in the angular region exceeding the critical angle is made nearly vertical in the diffraction surface 2a. Therefore, the light absorbed inside the component can be drastically reduced. Further, in the present embodiment, since the reflection portion is made of a combination of the dielectric multilayer films 22 and 25 and the metal layers 23 and 26, the angle closer to the vertical angle is higher, so that the light is close to the interface. Become a favorable reflection condition.
圖22及圖23是顯示本發明的第二實施形態,圖22是LED元件之模式剖面圖。 如圖22所示,該LED元件101為面朝上(face-up)型,是在藍寶石基板102的表面上形成有由三族氮化物半導體層構成的半導體積層部119。該LED元件101為面朝上型,光主要被由與藍寶石基板102相反側取出。半導體積層部119由藍寶石基板102側起依如下的順序具有:緩衝層110、n型GaN層112、發光層114、電子阻隔層116、p型GaN層118。在p型GaN層118上形成有p側電極127,並且在n型GaN層112上形成有n側電極128。而且,p側電極127具有:形成於p型GaN層118上之擴散電極121,與形成於擴散電極121上的一部分之墊電極(pad electrode)122。22 and 23 are views showing a second embodiment of the present invention, and Fig. 22 is a schematic cross-sectional view showing an LED element. As shown in FIG. 22, the LED element 101 is of a face-up type, and a semiconductor laminate portion 119 composed of a group III nitride semiconductor layer is formed on the surface of the sapphire substrate 102. The LED element 101 is of a face-up type, and light is mainly taken out from the side opposite to the sapphire substrate 102. The semiconductor build-up portion 119 has a buffer layer 110, an n-type GaN layer 112, a light-emitting layer 114, an electron blocking layer 116, and a p-type GaN layer 118 in the following order from the sapphire substrate 102 side. A p-side electrode 127 is formed on the p-type GaN layer 118, and an n-side electrode 128 is formed on the n-type GaN layer 112. Further, the p-side electrode 127 has a diffusion electrode 121 formed on the p-type GaN layer 118 and a pad electrode 122 formed on a portion of the diffusion electrode 121.
緩衝層110由AlN構成,形成於藍寶石基板102的表面上。緩衝層110為厚度40nm以下,藉由濺鍍法形成。而且,半導體積層部119中的空隙密度成為1.0×107 /cm2 以下。The buffer layer 110 is made of AlN and is formed on the surface of the sapphire substrate 102. The buffer layer 110 has a thickness of 40 nm or less and is formed by a sputtering method. Further, the void density in the semiconductor build-up portion 119 is 1.0 × 10 7 /cm 2 or less.
在該LED元件101中,藍寶石基板102的表面構成繞射面102a。藍寶石基板102的表面形成平坦部102b,與週期地形成於平坦部102b的複數個凸部102c。各凸部102c的形狀除了圓錐、多角錐等的錐狀之外,也能以將錐的上部切掉的圓錐台、多角錐台等的錐台狀。各凸部102c被設計以使由發光層114發出的光繞射。在本實施形態中,可藉由週期地配置的各凸部102c得到光的垂直化作用。In the LED element 101, the surface of the sapphire substrate 102 constitutes a diffraction surface 102a. The surface of the sapphire substrate 102 is formed with a flat portion 102b and a plurality of convex portions 102c periodically formed in the flat portion 102b. The shape of each convex portion 102c may be a truncated cone shape such as a truncated cone or a polygonal pyramid, or a truncated cone shape such as a truncated cone or the like. Each convex portion 102c is designed to diffract light emitted from the light-emitting layer 114. In the present embodiment, the verticalization of light can be obtained by the convex portions 102c arranged periodically.
本實施形態的繞射面102a是以凸部102c的週期為P,以由發光層114發出的光的峰值波長為λ時,滿足如下的關係: 1/2×λ≦P≦16/9×λ 而設定凸部102c的週期。而且,凸部102c的週期被設定以使透射繞射光包含至少2次的繞射光,不包含5次的繞射光。而且,凸部102c的週期被設定以使反射繞射光包含至少3次的繞射光。The diffraction surface 102a of the present embodiment has a period of the convex portion 102c as P, and when the peak wavelength of the light emitted from the light-emitting layer 114 is λ, the following relationship is satisfied: 1/2 × λ ≦ P ≦ 16 / 9 × λ sets the period of the convex portion 102c. Further, the period of the convex portion 102c is set such that the transmitted diffracted light includes at least two times of diffracted light, and does not include five times of diffracted light. Moreover, the period of the convex portion 102c is set such that the reflected diffracted light includes at least 3 times of diffracted light.
此外,在緩衝層110與n型GaN層112之間配設藉由GaN的刻面形成(faceting)被促進的成長條件而不是n型GaN層112的成長條件成長的追加的GaN層也可以。作為對刻面形成有利的成長條件可考慮降低反應器(reactor)內的溫度,增加反應器內的壓力,減少NH3 的供給量,減少(CH3 )3 Ga的供給量等。藉由配設該GaN層,可不受到凸部102c的週期的影響而使半導體積層部119成良好的結晶品質。追加的GaN層例如可藉由一邊保持規定時間反應器內的溫度於950℃,壓力於930hPa,一邊供給2200sccm的NH3 、20sccm的(CH3 )3 Ga而形成。而且,n型GaN層112例如可藉由反應器內的溫度以1040℃,壓力以500hPa,供給8000sccm的NH3 、45sccm的(CH3 )3 Ga而形成。Further, an additional GaN layer may be disposed between the buffer layer 110 and the n-type GaN layer 112 by the growth conditions in which the faceting of GaN is promoted instead of the growth conditions of the n-type GaN layer 112. As favorable growth conditions for the facet formation, it is conceivable to lower the temperature in the reactor, increase the pressure in the reactor, reduce the supply amount of NH 3 , and reduce the supply amount of (CH 3 ) 3 Ga or the like. By disposing the GaN layer, the semiconductor layered portion 119 can be made to have a good crystal quality without being affected by the period of the convex portion 102c. The additional GaN layer can be formed, for example, by supplying 2200 sccm of NH 3 and 20 sccm of (CH 3 ) 3 Ga while maintaining the temperature in the reactor at 950 ° C for a predetermined period of time and a pressure of 930 hPa. Further, the n-type GaN layer 112 can be formed, for example, by supplying 8000 sccm of NH 3 and 45 sccm of (CH 3 ) 3 Ga at a temperature of 1040 ° C and a pressure of 500 hPa in the reactor.
圖23是LED元件之局部放大模式剖面圖。 如圖23所示,在藍寶石基板102的背面側形成有介電質多層膜124。介電質多層膜124藉由金屬層之Al層126被覆。在該發光元件101中,介電質多層膜124及Al層126構成反射部,在該反射部使由發光層114發出藉由繞射作用透過繞射面102a的光反射。然後,可藉由使藉由繞射作用透過的光再入射到繞射面102a,在繞射面102a再度利用繞射作用使其透過,以複數個模式將光取出到元件外部。Figure 23 is a partially enlarged schematic cross-sectional view showing an LED element. As shown in FIG. 23, a dielectric multilayer film 124 is formed on the back side of the sapphire substrate 102. The dielectric multilayer film 124 is covered by an Al layer 126 of a metal layer. In the light-emitting element 101, the dielectric multilayer film 124 and the Al layer 126 constitute a reflection portion, and the light-emitting layer 114 emits light that is transmitted through the diffraction surface 102a by the diffraction action. Then, by the light transmitted by the diffraction action being incident on the diffraction surface 102a, the diffraction surface 102a is again transmitted by the diffraction action, and the light is taken out to the outside of the element in a plurality of modes.
圖24是顯示反射部的反射率的一例之圖表。在圖24中,藉由ZrO2 與SiO2 的組合構成形成於藍寶石基板上的介電質多層膜的對數以5,重疊於介電質多層膜形成了Al層。如圖24所示,在入射角為0度到55度的角度域中實現99%以上的反射率。而且,在入射角為0度到60度的角度域中實現98%以上的反射率。而且,在入射角為0度到75度的角度域中實現92%以上的反射率。如此,介電質多層膜與金屬層的組合對於成為對界面接近垂直的光成為有利的反射條件。此外,確認了在藍寶石基板上僅形成Al層的情形不取決於入射角,成為約88%的一定的反射率。FIG. 24 is a graph showing an example of the reflectance of the reflection portion. In FIG. 24, the dielectric layer of the dielectric multilayer film formed on the sapphire substrate by the combination of ZrO 2 and SiO 2 has a logarithm of 5, and an Al layer is formed by superposing on the dielectric multilayer film. As shown in FIG. 24, a reflectance of 99% or more is achieved in an angle range of an incident angle of 0 to 55 degrees. Moreover, a reflectance of 98% or more is achieved in an angle range of an incident angle of 0 to 60 degrees. Moreover, a reflectance of 92% or more is achieved in an angle range of an incident angle of 0 to 75 degrees. As such, the combination of the dielectric multilayer film and the metal layer is a reflective condition that is advantageous for light having an interface close to vertical. Further, it was confirmed that the case where only the Al layer was formed on the sapphire substrate did not depend on the incident angle, and it became a certain reflectance of about 88%.
在如以上構成的LED元件101中,因半導體積層部119中的空隙密度成為1.0×107 /cm2 以下,故可使散射的影響成最小限度,不會損及由繞射作用產生的光分布特性。而且,因藉由濺鍍法形成緩衝層110,故可抑制半導體積層部119中的空隙的產生。進而藉由緩衝層110以AlN,可有效地抑制半導體積層部119中的空隙的產生。再者,藉由緩衝層110的厚度以60nm以下,與以往的[FSS]比較可提高半導體的結晶品質。進而藉由使緩衝層110的厚度超過20nm,可抑制半導體積層部119的結晶表面的平坦性惡化。In the LED element 101 having the above configuration, since the void density in the semiconductor build-up portion 119 is 1.0 × 10 7 /cm 2 or less, the influence of scattering can be minimized, and the light generated by the diffraction can be prevented from being damaged. Distribution characteristics. Further, since the buffer layer 110 is formed by a sputtering method, generation of voids in the semiconductor build-up portion 119 can be suppressed. Further, by the AlN of the buffer layer 110, generation of voids in the semiconductor build-up portion 119 can be effectively suppressed. Further, by the thickness of the buffer layer 110 being 60 nm or less, the crystal quality of the semiconductor can be improved as compared with the conventional [FSS]. Further, by making the thickness of the buffer layer 110 more than 20 nm, the deterioration of the flatness of the crystal surface of the semiconductor build-up portion 119 can be suppressed.
而且,因配設繞射面102a及反射部,故可使由元件射出的光的光分布特性變化成接近垂直。再者,以凸部102c的週期為P,以由發光層114發出的光的峰值波長為λ時,因使其滿足如下的關係: 1/2×λ≦P≦16/9×λ 故可加大由元件取出的光軸周圍的光量。Further, since the diffraction surface 102a and the reflection portion are disposed, the light distribution characteristics of the light emitted from the element can be changed to be nearly vertical. Further, when the period of the convex portion 102c is P and the peak wavelength of the light emitted from the light-emitting layer 114 is λ, the following relationship is satisfied: 1/2 × λ ≦ P ≦ 16 / 9 × λ Increase the amount of light around the optical axis taken out of the component.
而且在繞射面102a中,因關於透射繞射光使其被容許到2次、3次或4次,關於反射繞射光使其被容許3次以上,故可加大由元件取出的光軸周圍的光量。Further, in the diffraction surface 102a, since the diffracted light is allowed to be allowed to be applied twice, three times or four times, and the diffracted light is allowed to be allowed three times or more, the optical axis around the element can be enlarged. The amount of light.
而且,可格外地縮短由發光層114發出的光到達p側電極127的表面的距離,可抑制元件內部中的光的吸收。在LED元件中,因超過界面的臨界角的角度區域的光傳播於橫向,故有在元件內部光被吸收的問題,惟因在繞射面102a使超過臨界角的角度區域的光成接近垂直,故可飛躍地減少在元件內部被吸收的光。再者在本實施形態中,因反射部以介電質多層膜124與金屬層126的組合,對界面越接近垂直的角度反射率越高,故對於成為對界面接近垂直的光成為有利的反射條件。Moreover, the distance from the light emitted from the light-emitting layer 114 to the surface of the p-side electrode 127 can be particularly shortened, and the absorption of light in the inside of the element can be suppressed. In the LED element, since the light in the angular region exceeding the critical angle of the interface propagates in the lateral direction, there is a problem that light is absorbed inside the element, but the light in the angular region exceeding the critical angle is made nearly vertical in the diffraction surface 102a. Therefore, the light absorbed inside the component can be drastically reduced. Further, in the present embodiment, since the reflection portion is formed by the combination of the dielectric multilayer film 124 and the metal layer 126, the angle closer to the vertical is higher, and therefore the reflection becomes favorable for the light whose interface is nearly vertical. condition.
此外,在第一及第二實施形態中雖然顯示了以週期地形成的凸部構成繞射面,但當然以週期地形成的凹部構成繞射面也可以。而且,除了將凸部或凹部排列於三角格子的交點而形成之外,例如也能排列於假想的正方格子的交點而形成。Further, in the first and second embodiments, it is shown that the circumferentially formed convex portions constitute the diffraction surface, but of course, the concave portions formed periodically may constitute the diffraction surface. Further, in addition to forming the convex portion or the concave portion at the intersection of the triangular lattices, for example, it may be formed by being arranged at the intersection of the virtual square lattices.
而且,在第一及第二實施形態中雖然顯示了元件中的光的射出面為平坦的面,但例如如圖25及圖26所示,對光的射出面施以凹凸加工也可以。圖25的LED元件1是在倒裝晶片型的第一實施形態的LED元件中,對藍寶石基板2的背面施以凹凸加工。該藍寶石基板2的背面2g形成平坦部2h,與週期地形成於平坦部2h的複數個凸部2i。各凸部2i的形狀除了圓錐、多角錐等的錐狀之外,也能以將錐的上部切掉的圓錐台、多角錐台等的錐台狀。使藍寶石基板2的背面2g中的各凸部2i的週期比繞射面2a的週期短較佳。據此,藍寶石基板2的背面2g中的菲涅耳反射(Fresnel reflection)被抑制。Further, in the first and second embodiments, although the emitting surface of the light in the element is a flat surface, for example, as shown in FIGS. 25 and 26, the light emitting surface may be subjected to uneven processing. In the LED element 1 of the first embodiment of the flip chip type, the LED element 1 of FIG. 25 is subjected to uneven processing on the back surface of the sapphire substrate 2. The back surface 2g of the sapphire substrate 2 is formed with a flat portion 2h and a plurality of convex portions 2i that are periodically formed in the flat portion 2h. The shape of each convex portion 2i may be a truncated cone shape such as a truncated cone or a polygonal pyramid, or a truncated cone shape such as a truncated cone or the like. It is preferable that the period of each convex portion 2i in the back surface 2g of the sapphire substrate 2 is shorter than the period of the diffraction surface 2a. Accordingly, the Fresnel reflection in the back surface 2g of the sapphire substrate 2 is suppressed.
而且,圖26的LED元件101是在倒裝晶片型的第二實施形態的LED元件中,對p側電極127的表面施以凹凸加工。該p側電極127的表面127g形成平坦部127h,與週期地形成於平坦部127h的複數個凸部127i。各凸部127i的形狀除了圓錐、多角錐等的錐狀之外,也能以將錐的上部切掉的圓錐台、多角錐台等的錐台狀。使p側電極127的表面127g中的各凸部127i的週期比繞射面102a的週期短較佳。據此,p側電極127的表面127g中的菲涅耳反射被抑制。Further, in the LED element 101 of the second embodiment of the flip chip type, the LED element 101 of FIG. 26 applies a concavo-convex process to the surface of the p-side electrode 127. The surface 127g of the p-side electrode 127 forms a flat portion 127h and a plurality of convex portions 127i that are periodically formed in the flat portion 127h. The shape of each convex portion 127i may be a truncated cone shape such as a truncated cone or a polygonal frustum, in addition to a tapered shape such as a cone or a polygonal pyramid. It is preferable that the period of each convex portion 127i in the surface 127g of the p-side electrode 127 is shorter than the period of the diffraction surface 102a. According to this, Fresnel reflection in the surface 127g of the p-side electrode 127 is suppressed.
而且,在第一及第二實施形態中雖然顯示了緩衝層以藉由濺鍍法形成的單層,但例如如圖27所示,緩衝層為藉由濺鍍法形成的第一層10a,與藉由MOCVD法在低溫成長的第二層10b構成者也可以。據此,與緩衝層以藉由濺鍍法形成的單層的情形比較,可使空隙密度同等同時更降低貫通差排密度。具體上,第一層10a以藉由濺鍍法形成的20nm的AlN,第二層10b以藉由MOCVD法在低溫成長的20nm的GaN的結果,關於空隙密度成為與緩衝層以藉由濺鍍法形成的40nm的單層的AlN的情形同等的值,關於貫通差排密度是比緩衝層以藉由濺鍍法形成的20nm的單層的AlN的情形的值還低。Further, in the first and second embodiments, although the buffer layer is shown as a single layer formed by sputtering, for example, as shown in FIG. 27, the buffer layer is the first layer 10a formed by sputtering. It is also possible to form a second layer 10b which grows at a low temperature by the MOCVD method. According to this, compared with the case where the buffer layer is a single layer formed by a sputtering method, the void density can be made equal and the through-difference density can be further reduced. Specifically, the first layer 10a is made of 20 nm of AlN by sputtering, and the second layer 10b is made of 20 nm of GaN grown by low temperature by MOCVD, and the void density becomes a buffer layer by sputtering. The value of the 40 nm single-layer AlN formed by the method is equivalent to the value of the through-difference density which is lower than the case where the buffer layer is a single-layer AlN of 20 nm formed by a sputtering method.
而且,在第一及第二實施形態中雖然顯示了由發光層發出藍色光,但例如發出綠色、紅色等的光也可以。總之,只要凹部或凸部的週期與由發光層發出的光的峰值波長的關係滿足規定的條件的話即可。Further, in the first and second embodiments, it is shown that blue light is emitted from the light-emitting layer, but light such as green or red may be emitted. In short, it suffices that the relationship between the period of the concave portion or the convex portion and the peak wavelength of the light emitted from the light-emitting layer satisfies a predetermined condition.
1、101‧‧‧LED元件
2、102‧‧‧藍寶石基板
2a、102a‧‧‧繞射面
2b、102b‧‧‧平坦部
2c、2i、102c‧‧‧凸部
2g‧‧‧背面
2h‧‧‧平坦面
10、110‧‧‧緩衝層
10a‧‧‧第一層
10b‧‧‧第二層
12、112‧‧‧n型GaN層
14、114‧‧‧發光層
16、116‧‧‧電子阻隔層
18、118‧‧‧p型GaN層
19、119‧‧‧半導體積層部
21、24、121‧‧‧擴散電極
22、25、124‧‧‧介電質多層膜
22a‧‧‧第一材料
22b‧‧‧第二材料
22c、25c‧‧‧介層孔
23、26‧‧‧金屬電極
27、127‧‧‧p側電極
28、128‧‧‧n側電極
122‧‧‧墊電極
124‧‧‧介電質多層膜
126‧‧‧Al層
127g‧‧‧p側電極的表面
127h‧‧‧平坦部
127i‧‧‧凸部1, 101‧‧‧ LED components
2, 102‧‧‧ sapphire substrate
2a, 102a‧‧‧Diffraction surface
2b, 102b‧‧‧ flat
2c, 2i, 102c‧‧‧ convex
2g‧‧‧back
2h‧‧‧flat surface
10, 110‧‧‧ buffer layer
10a‧‧‧ first floor
10b‧‧‧ second floor
12, 112‧‧‧n type GaN layer
14, 114‧‧‧Lighting layer
16, 116‧‧‧Electronic barrier
18, 118‧‧‧p-type GaN layer
19. 119‧‧‧ Semiconductor Stacking Department
21, 24, 121‧‧‧ diffusion electrodes
22, 25, 124‧‧‧ dielectric multilayer film
22a‧‧‧First material
22b‧‧‧Second material
22c, 25c‧‧‧ interlayer hole
23, 26‧‧‧ metal electrodes
27, 127‧‧‧p side electrode
28, 128‧‧‧n side electrode
122‧‧‧ pads electrode
124‧‧‧Dielectric multilayer film
126‧‧‧Al layer
Surface of the 127g‧‧‧p side electrode
127h‧‧‧flat
127i‧‧‧ convex
圖1是顯示本發明的第一實施形態的LED元件之模式剖面圖。 圖2(a)、(b)是顯示不同的折射率的界面中的光的繞射作用之說明圖,(a)是顯示在界面反射的狀態,(b)是顯示透過界面的狀態。 圖3是顯示凹部或凸部的週期以500nm的情形的三族氮化物半導體層與藍寶石基板的界面中之由半導體層側入射到界面的光的入射角,與藉由在界面的繞射作用產生的透射角的關係之圖表。 圖4是顯示凹部或凸部的週期以500nm的情形的三族氮化物半導體層與藍寶石基板的界面中之由半導體層側入射到界面的光的入射角,與藉由在界面的繞射作用產生的反射角的關係之圖表。 圖5是顯示元件內部中的光的行進方向之說明圖。 圖6是LED元件之局部放大模式剖面圖。 圖7是顯示反射部的反射率的一例之圖表。 圖8(a)、(b)是顯示藍寶石基板,(a)是模式斜視圖,(b)是顯示A-A剖面之模式說明圖。 圖9是顯示凸部的週期與空隙密度的關係之表。 圖10是顯示緩衝層的膜厚與空隙密度的關係之圖表。 圖11是顯示LED元件中的波長與透射率(transmissivity)的關係之圖表。 圖12是顯示LED元件中的空隙密度與光取出效率的關係之圖表。 圖13是顯示空隙密度與半導體積層部的貫通差排密度(threading dislocation density)的關係之圖表。 圖14是顯示緩衝層的厚度與透射率的關係之表。 圖15是以極座標顯示LED元件的光分布特性(light distribution characteristics)之圖。 圖16是顯示LED元件的光分布特性,(a)是顯示在藍寶石基板未形成有凸部的狀態之圖,(b)~(h)是顯示在藍寶石基板形成有凸部的狀態之圖 圖17是顯示各基板的計算值與實測值之表。 圖18是就對光軸的規定角度範圍內的光顯示積分強度(integrated intensity)的變化之圖表。 圖19是顯示透射繞射光的容許次數與積分強度的關係之圖表。 圖20是顯示反射繞射光的容許次數與積分強度的關係之圖表。 圖21是顯示凸部的週期與透射繞射光及反射繞射光的容許次數的關係之圖表。 圖22是顯示本發明的第二實施形態的LED元件之模式剖面圖。 圖23是LED元件之局部放大模式剖面圖。 圖24是顯示反射部的反射率的一例之圖表。 圖25是顯示變形例的LED元件之模式剖面圖。 圖26是顯示變形例的LED元件之模式剖面圖。 圖27是顯示變形例的LED元件之模式剖面圖。Fig. 1 is a schematic cross-sectional view showing an LED element according to a first embodiment of the present invention. 2(a) and 2(b) are explanatory views showing the diffraction action of light in the interface of different refractive indices, wherein (a) shows a state in which the interface is reflected, and (b) shows a state in which the transmission interface is displayed. 3 is a view showing an incident angle of light incident on the interface from the side of the semiconductor layer in the interface between the group III nitride semiconductor layer and the sapphire substrate at a period of 500 nm in the period of the recess or the projection, and by diffraction at the interface A graph of the relationship of the transmitted angles produced. 4 is a view showing an incident angle of light incident on the interface from the side of the semiconductor layer in the interface between the group III nitride semiconductor layer and the sapphire substrate at a period of 500 nm in the period of the recess or the projection, and by diffraction at the interface A graph of the relationship of the resulting reflection angles. Fig. 5 is an explanatory view showing a traveling direction of light in the inside of the element. Fig. 6 is a partially enlarged schematic cross-sectional view showing the LED element. FIG. 7 is a graph showing an example of the reflectance of the reflection portion. 8(a) and 8(b) are diagrams showing a sapphire substrate, (a) is a schematic perspective view, and (b) is a schematic explanatory view showing an A-A cross section. Fig. 9 is a table showing the relationship between the period of the convex portion and the void density. Fig. 10 is a graph showing the relationship between the film thickness of the buffer layer and the void density. Fig. 11 is a graph showing the relationship between the wavelength and the transmissivity in the LED element. Fig. 12 is a graph showing the relationship between the void density and the light extraction efficiency in the LED element. Fig. 13 is a graph showing the relationship between the void density and the threading dislocation density of the semiconductor laminate portion. Fig. 14 is a table showing the relationship between the thickness of the buffer layer and the transmittance. Fig. 15 is a view showing the light distribution characteristics of the LED elements in polar coordinates. 16 is a view showing a light distribution characteristic of the LED element, (a) is a view showing a state in which a convex portion is not formed on the sapphire substrate, and (b) to (h) are diagrams showing a state in which a convex portion is formed on the sapphire substrate. 17 is a table showing calculated values and measured values of the respective substrates. Fig. 18 is a graph showing changes in integrated intensity with respect to light in a predetermined angular range of the optical axis. Fig. 19 is a graph showing the relationship between the allowable number of transmitted diffracted lights and the integrated intensity. Fig. 20 is a graph showing the relationship between the allowable number of reflected diffracted lights and the integrated intensity. Fig. 21 is a graph showing the relationship between the period of the convex portion and the allowable number of the transmitted diffracted light and the reflected diffracted light. Fig. 22 is a schematic cross-sectional view showing an LED element according to a second embodiment of the present invention. Figure 23 is a partially enlarged schematic cross-sectional view showing an LED element. FIG. 24 is a graph showing an example of the reflectance of the reflection portion. Fig. 25 is a schematic cross-sectional view showing an LED element of a modification. Fig. 26 is a schematic cross-sectional view showing an LED element of a modification. Fig. 27 is a schematic cross-sectional view showing an LED element of a modification.
1‧‧‧LED元件 1‧‧‧LED components
2‧‧‧藍寶石基板 2‧‧‧Sapphire substrate
2a‧‧‧繞射面 2a‧‧‧Diffing surface
2b‧‧‧平坦部 2b‧‧‧flat
2c‧‧‧凸部 2c‧‧‧ convex
10‧‧‧緩衝層 10‧‧‧buffer layer
12‧‧‧n型GaN層 12‧‧‧n-type GaN layer
14‧‧‧發光層 14‧‧‧Lighting layer
16‧‧‧電子阻隔層 16‧‧‧Electronic barrier
18‧‧‧p型GaN層 18‧‧‧p-type GaN layer
19‧‧‧半導體積層部 19‧‧‧Semiconductor Stacking Department
21、24‧‧‧擴散電極 21, 24‧‧‧ diffusion electrode
22、25‧‧‧介電質多層膜 22, 25‧‧‧ Dielectric multilayer film
22c、25c‧‧‧介層孔 22c, 25c‧‧‧ interlayer hole
23、26‧‧‧金屬電極 23, 26‧‧‧ metal electrodes
27‧‧‧p側電極 27‧‧‧p side electrode
28‧‧‧n側電極 28‧‧‧n side electrode
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TWI553901B (en) * | 2015-09-07 | 2016-10-11 | 環球晶圓股份有限公司 | Ultraviolet led and method of making the same |
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US8941136B2 (en) * | 2009-09-07 | 2015-01-27 | El-Seed Corporation | Semiconductor light emitting element |
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