WO2015109357A1 - Agencement de gradateur commandé par découpage de phase avec une protection contre la surintensité lors de l'alimentation d'une lampe - Google Patents

Agencement de gradateur commandé par découpage de phase avec une protection contre la surintensité lors de l'alimentation d'une lampe Download PDF

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Publication number
WO2015109357A1
WO2015109357A1 PCT/AU2015/000020 AU2015000020W WO2015109357A1 WO 2015109357 A1 WO2015109357 A1 WO 2015109357A1 AU 2015000020 W AU2015000020 W AU 2015000020W WO 2015109357 A1 WO2015109357 A1 WO 2015109357A1
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WO
WIPO (PCT)
Prior art keywords
transistor
arrangement
voltage
resistor
current
Prior art date
Application number
PCT/AU2015/000020
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English (en)
Inventor
Philip Tracy
Original Assignee
Hendon Semiconductors Pty Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from AU2014900208A external-priority patent/AU2014900208A0/en
Application filed by Hendon Semiconductors Pty Ltd filed Critical Hendon Semiconductors Pty Ltd
Publication of WO2015109357A1 publication Critical patent/WO2015109357A1/fr

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Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02H—EMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08—Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M5/00—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases
    • H02M5/02—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc
    • H02M5/04—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters
    • H02M5/22—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M5/275—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M5/293—Conversion of ac power input into ac power output, e.g. for change of voltage, for change of frequency, for change of number of phases without intermediate conversion into dc by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B39/00—Circuit arrangements or apparatus for operating incandescent light sources
    • H05B39/04—Controlling
    • H05B39/041—Controlling the light-intensity of the source
    • H05B39/044—Controlling the light-intensity of the source continuously
    • H05B39/048—Controlling the light-intensity of the source continuously with reverse phase control
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/20—Responsive to malfunctions or to light source life; for protection
    • H05B47/25—Circuit arrangements for protecting against overcurrent
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/08—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters
    • H02M1/081—Circuits specially adapted for the generation of control voltages for semiconductor devices incorporated in static converters wherein the phase of the control voltage is adjustable with reference to the AC source
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/32—Means for protecting converters other than automatic disconnection
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05B—ELECTRIC HEATING; ELECTRIC LIGHT SOURCES NOT OTHERWISE PROVIDED FOR; CIRCUIT ARRANGEMENTS FOR ELECTRIC LIGHT SOURCES, IN GENERAL
    • H05B47/00—Circuit arrangements for operating light sources in general, i.e. where the type of light source is not relevant
    • H05B47/20—Responsive to malfunctions or to light source life; for protection
    • H05B47/28—Circuit arrangements for protecting against abnormal temperature
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B20/00—Energy efficient lighting technologies, e.g. halogen lamps or gas discharge lamps

Definitions

  • This invention relates to a phase cutting control dimmer arrangement that includes short circuit protection elements and more particularly short circuit protection elements that require minimal specified holding current when in use, are designable and interface-able into the arrangement without introducing any significant complexity and/or multiple signal connections to a microcontroller and so forth, to provide a fast acting means to turn OFF and protect the solid state switching devices for the Dimmer if the provided switch load becomes short circuited and/or severely exceeds safe operating conditions of circuitry components.
  • Phase cutting control dimmer arrangements operate by switching AC mains supplies to a lamp or light load for only a chosen time portion of each AC mains supply half cycle.
  • the time period for the AC mains supply as applied to the load is determined conventionally by an analogue or digital timer, controlling the load switching device, that must be started and stopped at exact times during each AC mains supply half cycle.
  • the two terminals are wired in series with the load and the time at which the timer is started and stopped, once again for the most part is derived from the processing of the voltage that appears across each of the active and load dimmer voltage terminals.
  • Solid state switching devices such as Field Effect Transistors (FETs) or Insulated Gate Bipolar Transistors (IGBTs), in these kinds of Dimmer
  • circuitry can be introduced into the phase cutting control dimmer arrangement in an attempt to shield the switch from load circuit faults.
  • Examples include a current sensing resistor in series with the regulating transistor wherein as the current increases, the voltage drop across the resistor causes the operation of the regulating transistor to limit the conduction of a pass transistor in series with the load.
  • phase cutting controlled dimmer arrangement having short circuit protection elements that can provide for over-current protection having a fast acting means to turn OFF and protect the solid state switching devices when a switch load becomes short circuited or severely exceeds appropriate operating conditions with minimum specified values for the current for maintaining operation of the short circuit protection elements thereby not adding any significant complexity of the phase cutting control dimmer arrangement's power supply and at the same time simplified interfacing between the micro-controller and the switching
  • phase cutting controlled dimmer arrangement with over-current protection said arrangement adapted to control the level of power switchable to a load, said arrangement including;
  • FETs Insulated Gate Bipolar Transistors
  • IGBTs Insulated Gate Bipolar Transistors
  • a current sensing resistor in electrical communication with said back-to- back FETs or IGBTs, said current sensing resistor adapted to provide a first voltage at a first end across said current sensing resistor or a second voltage at second end across said current sensing resistor;
  • a first transistor including an electrical pathway to the second end of said current sensing resistor so as to be in electrical communication with the provided second voltage across said current sensing resistor, such that when the second voltage exceeds a threshold voltage, said threshold voltage commensurate with an over-current event experienced by the FETs or IGBTs, said first transistor is triggered into conduction wherein said first transistor conduction provides a first means for said FETs or IGBTs to be turned OFF thereby withdrawing power to the load;
  • a second transistor having an electrical path connected to the first end of said current sensing resistor, said electrical path providing means for electrical communication with the first voltage across said current sensing resistor, such that when the second voltage across the current sensing resistor exceeds a threshold voltage, said threshold voltage commensurate with an over-current event experienced by the FETs or IGBTs, said second transistor is triggered into conduction, wherein said conduction provides a second means for the FETs or IGBTs to be turned OFF thereby withdrawing power to the load.
  • the first transistor and the second transistor are Bipolar Junction Transistors (BJT).
  • the first transistor and the second transistor are NPN Bipolar Junction Transistors.
  • preference load control arrangement for turning OFF and ON electrical power to the load includes a control switch with back-to-back Field Effect Transistors (FETs).
  • FETs Field Effect Transistors
  • the current sensing resistor includes an electrical path at the first end connected to the source of one FET and at the second end of said current sensing resistor an electrical path connected to the source of the other FET.
  • the first transistor includes an electrical path from the emitter to the second voltage across the current sensing resistor and an electrical path from the base to the first voltage across the current sensing resistor.
  • the second transistor includes an electrical path from the emitter to the first voltage across the current sensing resistor and an electrical path from the base to the second voltage across the current sensing resistor.
  • the first transistor's first means, and the second transistor's second means to turn OFF the FETs includes a third transistor having an electrical path into the interconnected gates of the FETs when either the first transistor or the second transistor are triggered into conduction when an over- current event is experienced.
  • the third transistor is a BJT.
  • the collector of the third transistor includes an electrical path into the connected gates of the back-to-back FETs.
  • the third transistor is adapted to sink a current significantly larger than the FETs gate drive current available via a gate drive resistor such that the third transistor is adapted to discharge gate source capacitance of each FETs so as to quickly turn OFF said FETs before damaging of FETs due to the over-current event experienced.
  • the current sensing resistor is adjusted to provide a voltage drop of approximately 0.6 V measureable at the first voltage or the second voltage when current flowing through the current sensing resistor has a value commensurate with threshold voltage to trigger conduction for the first transistor or the second transistor when a short-circuit and/or severely exceeded AC supply current being switched by the FETs is experienced.
  • first transistor and the second transistor each include an electrical path to a separate series resistor.
  • each resistor connected in series is connected to the base of each of the first transistor and the second transistor.
  • each resistor connected in series with the base of each of the first transistor and the second transistor has as a large value so as to minimise the value of base current that can flow into the base of the first transistor and the second transistor when an over-current event is experienced.
  • each of the first transistor and the second transistor includes a collector resistor connect at one end via a path including the base- emitter of a fourth transistor to the positive DC power supply arrangement of the phase cutting control dimmer arrangement wherein said collector resistors are valued and adapted to minimise current to prevent the power supply
  • the fourth transistor in electrical communication with a threshold voltage recognition resistor said threshold voltage recognition resistor along the electrical path between each of the collector resistors of the first transistor and second transistor and positive DC power supply arrangement respectively such that when current flows in the threshold voltage recognition resistor that exceeds the set threshold voltage this turns ON the fourth transistor.
  • the fourth transistor is a PNP BJT.
  • the threshold voltage recognition resistor has an electrical path into the base of the fourth transistor PNP BJT such that when the current flowing in the threshold voltage recognition resistor exceeds the threshold voltage, preferably of 0.6 V, this then results in turning ON the fourth transistor PNP BJT and wherein the collector voltage will rise to closely equal the positive voltage of the power supply, preferably 10V.
  • the collector of the fourth transistor PNP BJT is connected to zero volt reference along a first electrical path through series resistor pair and a second electrical path through a current limiting resistor feeding into the base of the third transistor.
  • the third transistor will be turned ON by the voltage developed across a resistor between the base of the third transistor and its emitter or zero volt reference as caused by the current flowing along the second electrical path from the collector of the fourth transistor PNP BJT through the current limiting resistor to the base of the third transistor.
  • the recognition resistor adapted to provide a filter to slow the response time of the arrangement so as to enable a fast enough response time to protect the FETs but not inadvertently too quick that it may falsely instigate the over-current protection by a momentary fast transient voltage that may have occurred on the AC mains supply.
  • the voltage at the base of the second transistor would be approximately 0.6 V and the voltage at the collector of the fourth transistor will be at 10 V.
  • resistor divider series resistors are selected to provide a voltage at the microcontroller interface that is set close to the microcontroller's supply voltage but not exceeding the maximum allowed voltage.
  • the maximum allowed voltage established by the resistor divider series resistors is limited to +0.3 V above the microcontroller's supply voltage.
  • the microcontroller is programmed with a high impedance input configuration for the interface pin allowing the microcontroller to read at any time the status of the over-current protection without causing any change to it, adapted to re-set the over-current protection to an inactive state and be able to set the over-current protection to a protective state.
  • the ability of the single interface connection of the microcontroller allows a separate control path, that acts directly on the FET gates, whereby the microcontroller is adapted to turn OFF the FETs in response to other overload stimulus such as an over-temperature signal that is generated within the microcontroller, without requiring any external temperature sensing components or additional interface connections.
  • the arrangement in this invention is able to provide over- current protection that requires minimal holding current for the short-circuit protection elements, which in some embodiments can be less than 0.5 mA, while at the same time still maintaining a simplified interfacing with the remainder of the phase cutting control dimmer arrangement as there is only one single connection required with the microcontroller.
  • this invention allows interfacing with the microcontroller having just one microcontroller port.
  • Modern conventional timer switches, dimmers and the like are required to fit into very small spaces and are built with extremely small componentry.
  • Advantageously by being able to utilise a microcontroller with just the requirement of a single port pin means that there can be a significant reduction in size and associated costs.
  • the microcontroller with the single connection is still able to identify whether the short-circuit protection elements have been activated or not and be inherently adapted to be able to re-set the over-current protection module to the inactive state and to be able to set the over-current protection short-circuit protection elements to the tripped or protective state as required.
  • the ability to set the over-current protection module within the arrangement to the trip state allows the micro-controller a separate control path, that acts directly on the connected FET gates, whereby this separate control path is adapted to turn OFF the FETs in response to other overload stimulus such as over-temperature signal that is generated totally within the micro-controller, without requiring any external temperature sensing components or any additional interface connections.
  • the micro-controller includes an inbuilt temperature sensor.
  • the micro-controller inbuilt temperature sensor is
  • programmable and/or adaptable to provide aggregate temperature data for the micro-controller which in turn provides temperature information for the microcontroller's surrounding environment that can be utilised in a total safety control system to protect the phase cutting controlled dimmer arrangement.
  • this arrangement allows the ability to switch OFF the FETs even if a fault in the drive signal is acting to turn the FETs ON.
  • Figure 1 illustrates an electrical circuit of a two-wire trailing edge dimmer arrangement of a preferred embodiment of this invention including short-circuit protection elements for over-current protection when the dimmer arrangement is providing power and controlling the illumination levels of a lamp load.
  • Figure 1 provides a circuit arrangement for a two-wire trailing edge dimmer arrangement shown generally as (10) adapted to remove power from the end or trailing edge of each AC mains supply cycle.
  • the dimmer terminals include ACTIVE (12) and LOAD (14).
  • the dimmer terminal voltage is effectively bridged by rectifier diodes (16) and (18) and the parasitic diodes (24) and (26) which are contained in the corresponding Field Effect Transistors (FETs) (20) and (22) that comprise the load current switch.
  • FETs (20) and (22) are arranged back-to- back and operate in the N-Channel enhancement mode having source terminals (21 ) and (23) connected together via resistor (33) with the gates (25) and (27) of each of the FETs (20) and (22) also connected with the drain terminals (29) and (31 ) acting as two power terminals.
  • the single sensing resistor (33) is adapted by interchanging the base and emitter connections to the single sensing resistor (33) so it can respond to either polarity of voltages (32) and (34) developed across the single sensing resistor (33).
  • the first transistor (28) is connected to the second voltage (34) on one side of the sensing resistor (33) wherein the second transistor is connected to the first voltage on the other side of the sensing resistor (33).
  • the first transistor (28) and second transistor (30) provide the sensing of the voltage that will be developed across the sensing resistor (33) due to the AC mains current flowing in the main switching elements of the back-to-back FETs (20) and (22).
  • the single sensing resistor (33) is adjustable to provide a voltage drop of approximately 0.6 V when the current that is flowing in the sensing resistor (33) has a peak value at which the short-circuit protection elements within the arrangement (10) become operable.
  • a typical value may be 20A peak and accordingly therefore provide a value for the sensing resistor of around 30 milliohms.
  • the voltage across the sensing resistor (33) can reach a voltage of around 3 V. If the 3 V is applied directly to the base (99) and emitter (38) of the first transistor (28) or the base (71 ) and emitter (73) of the second transistor (30), the first transistor (28) and second transistor (30) would be destroyed.
  • protection resistors (40) and (42) having large values preferably of the order of 100 kilo ohms are inserted in series with the respective first transistor (28) and the second transistor (30) to limit, to a small value of the order of 25 micro amps ( ⁇ ), the current that can flow into base of the first transistor (28) and the base of the second transistor (30).
  • the voltage (32) is really just the same voltage as (34), i.e. the voltage developed across the sensing resistor (33).
  • the sensed voltage has two possible polarities if it is always referenced to the common or 0 V reference node labelled (34). In one case (32) is positive with respect to (34) and in the other case (32) is negative with respect to (34). The polarity depends on which mains half cycle causes the overload, for example what polarity the mains has when the overload occurs.
  • the collector resistors (44) and (46) limit the current to about 0.25 mA.
  • resistor (50) When current from resistor (44) or (46) flows into resistor (50), having a value of the order of 10 kilo ohms, this will cause the voltage across resistor (50) to exceed 0.6 V and cause a fourth transistor (52) which is a PNP BJT to turn ON.
  • the second transistor (30) In the event that the second transistor (30) is not already ON by the fact that the voltage across the sensing resistor (33) exceeding 0.6 V, the second transistor (30) will be turned ON by the voltage developed across the current limiting protection resistor (42) as caused by the current in the series paired resistors (56) and (58). The third transistor (36) will be turned ON by the voltage developed across the resistor (41 ) caused by the current flowing through resistor (60).
  • Capacitor (62) across resistor (50) provides a filter to slow the response time of the over-current protection elements so the over-current protection elements can be thus fast enough to protect the FETs (20) and (22), but no so fast that the over-current protection elements are tripped by very fast transient voltages which may occur on the AC mains supply.
  • the third transistor (36) provides the path that will turn OFF the FETs (20) and (22), in response to an over-current event.
  • the third transistor (36) is adapted to be able to sink a current much larger than the FET's (20) and (22) gate drive current (64) as provided via gate drive resistor (67) as the third transistor (36) is adapted to discharge the gate source capacitance of the FETs (20) and (22), which may be of the order of a few nano farads, and to which the third transistor (36) must be inherently capable to be able to quickly turn the FETs (20) and (22) OFF before a large current, due to the over-current event, is present long enough to damage the FETs (20) and (22).
  • the use of the two separate collector resistors (44) and (46) of the first transistor (28) and second transistor (30) ensures that the required latching remains possible and is not prevented from happening under certain overload conditions.
  • the second transistor (30) emitter (73), connected to the top of the sensing resistor (33) has a potential of +3 V and consequently that means that the second transistor (30) is reverse bias, because its base (71 ) being 0 V is approximately 3 V below its emitter voltage, and the second transistor (30) therefore cannot turn ON. Consequently the intended latching action involving the fourth transistor (52) and the second transistor (30) is prevented from happening.
  • the values of the series connected resistors (56) and (58) are selected to limit the current that would be available to flow into the interface pin (66) of the microcontroller (68).
  • resistive divider resistors (56) and (58) are chosen to provide a voltage at the microcontroller (68) interface that is set close to the
  • microcontroller's supply voltage but will not exceed the maximum allowed voltage. That maximum allowed voltage is usually limited to +0.3 V above the microcontroller's supply voltage.
  • the microcontroller is programmable to provide a high impedance input configuration for the interface pin (66) into the microcontroller (68) and accordingly is able to read the state of the short-circuit protection elements within the phase cutting control arrangement at any time.
  • the microcontroller (68) can remove the base drive (71 ) to the second transistor (30) so the second transistor (30) turns OFF so that the over-current protection module or those short-circuit protection elements that make up the over-protection module may be re-set to the inactive state.
  • the microcontroller (68) can turn ON the second transistor (30) and set the over- current protection elements to the active or protective state as required.
  • the microcontroller (68) could also include an internal temperature sensor which could provide accurate temperature data for the microcontroller (68). This temperature information can provide
  • microcontroller (68) are adapted to match the logic voltage levels applied to the microcontroller pin (66) that would be most advantageous to minimising the supply current consumed by the microcontroller (68).
  • this is achieved by arranging that the two voltage levels generated in the active and inactive states wherein the over-current protection is put into operation to turn OFF the FETs due to an over-current situation can be adapted, by utilising the values of resistors (58) and (56) so that the voltage levels closely equal the logic voltages used by the microcontroller (68).
  • a 5 W lamp on a 230 V mains supply has a nominal operating current of less than 22 milliamps. If that lamp is to be dimmed to 10% of its full brightness then the lamp current being passed by its dimmer may need to be reduced to 2.2 milliamps.
  • the simplest powering arrangement passes a controlled load current directly through a low voltage zener diode so the available dc supply current equals the average current flowing in the lamp load.
  • Complex arrangements using high frequency transformer-based power supplies that can increase the low voltage power supply current to multiples of the lamp load current are well known but have many disadvantages including their cost, physical size and potential generation of radio interference.
  • the average current passing through the load, or required for normal operation of the dimmer or switch will ideally be less than 1 mA.
  • the switch is to electronically include a true OFF' state then that current may be required to be 10 times smaller.
  • Electronic switches require protection against the connection of short-circuits and the prior art methods of protection generally have required the provision of more than 1 mA just for this, relatively small, protection part of the total switching arrangement, one that may include a microcontroller that can require a significant fraction of that 1 mA for its operation.
  • the total current drawn from the low voltage power supply in this invention is greatly reduced because the minimum specified value for holding current of small SCRs, as used in the prior art, is about 5 mA.
  • Good design practice requires the designer to ensure that much current can flow in the SCR to guarantee it remains conductive. That requires the dimmer's low voltage supply to be capable of at least that 5 mA and more to allow for the rest of its operation.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Circuit Arrangement For Electric Light Sources In General (AREA)

Abstract

L'invention porte sur un agencement de dispositif de gradation commandé par découpage de phase avec une protection contre la surintensité, comprenant une commande de charge pour des FET ou des IGBT dos à dos avec des grilles connectées. Selon l'invention, une résistance détectrice de courant fournit une première tension et une seconde tension. Un premier transistor possède un chemin électrique vers la seconde tension et un second transistor possède un chemin électrique vers la première tension de telle sorte que lorsque la seconde ou la première tension dépasse une tension seuil, cela est fonction d'un événement de surintensité des FET ou des IGBT dos à dos, déclenchant le premier ou le second transistor en conduction dans laquelle une conduction du premier ou du second transistor fournit un moyen pour ouvrir les FET ou les IGBT dos à dos, retirant ainsi une puissance à la charge.
PCT/AU2015/000020 2014-01-24 2015-01-19 Agencement de gradateur commandé par découpage de phase avec une protection contre la surintensité lors de l'alimentation d'une lampe WO2015109357A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
AU2014900208A AU2014900208A0 (en) 2014-01-24 Phase cutting controlled dimmer arrangement with over-current protection when powering a lamp
AU2014900208 2014-01-24

Publications (1)

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WO2015109357A1 true WO2015109357A1 (fr) 2015-07-30

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017147214A1 (fr) * 2016-02-22 2017-08-31 Texas Instruments Incorporated Commande de capacité de gâchette dans un commutateur de charge
DE102017201893A1 (de) * 2017-01-12 2018-07-12 Continental Teves Ag & Co. Ohg Elektronische Schaltung zur Absicherung einer Energieversorgung einer Empfangseinrichtung
CN110957935A (zh) * 2019-10-21 2020-04-03 中国科学院电工研究所 一种驱动电源电路

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Publication number Priority date Publication date Assignee Title
US5239255A (en) * 1991-02-20 1993-08-24 Bayview Technology Group Phase-controlled power modulation system
EP1253809A2 (fr) * 2001-04-27 2002-10-30 Raymond Kleger Organe de commande et méthode de commande d' une charge électrique
GB2418082A (en) * 2004-09-13 2006-03-15 Wen-Hsin Chao Protection device for ac electronic dimmer

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5239255A (en) * 1991-02-20 1993-08-24 Bayview Technology Group Phase-controlled power modulation system
EP1253809A2 (fr) * 2001-04-27 2002-10-30 Raymond Kleger Organe de commande et méthode de commande d' une charge électrique
GB2418082A (en) * 2004-09-13 2006-03-15 Wen-Hsin Chao Protection device for ac electronic dimmer

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017147214A1 (fr) * 2016-02-22 2017-08-31 Texas Instruments Incorporated Commande de capacité de gâchette dans un commutateur de charge
US9813053B2 (en) 2016-02-22 2017-11-07 Texas Instruments Incorporated Gate capacitance control in a load switch
DE102017201893A1 (de) * 2017-01-12 2018-07-12 Continental Teves Ag & Co. Ohg Elektronische Schaltung zur Absicherung einer Energieversorgung einer Empfangseinrichtung
CN110192315A (zh) * 2017-01-12 2019-08-30 大陆-特韦斯贸易合伙股份公司及两合公司 用于为接收装置的电源提供保护的电子电路
US11050238B2 (en) 2017-01-12 2021-06-29 Continental Teves Ag & Co. Ohg Electronic circuit for providing protection for an energy supply for a receiving device
CN110957935A (zh) * 2019-10-21 2020-04-03 中国科学院电工研究所 一种驱动电源电路
CN110957935B (zh) * 2019-10-21 2021-12-03 中国科学院电工研究所 一种驱动电源电路

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