WO2015101144A1 - Power amplifier and gain switching circuit thereof - Google Patents

Power amplifier and gain switching circuit thereof Download PDF

Info

Publication number
WO2015101144A1
WO2015101144A1 PCT/CN2014/093421 CN2014093421W WO2015101144A1 WO 2015101144 A1 WO2015101144 A1 WO 2015101144A1 CN 2014093421 W CN2014093421 W CN 2014093421W WO 2015101144 A1 WO2015101144 A1 WO 2015101144A1
Authority
WO
WIPO (PCT)
Prior art keywords
signal
gain
power
power tube
resistor
Prior art date
Application number
PCT/CN2014/093421
Other languages
French (fr)
Chinese (zh)
Inventor
赵骞
张黎阳
龙华
Original Assignee
国民技术股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 国民技术股份有限公司 filed Critical 国民技术股份有限公司
Publication of WO2015101144A1 publication Critical patent/WO2015101144A1/en
Priority to US15/139,087 priority Critical patent/US9595933B2/en
Priority to US15/418,748 priority patent/US9887679B2/en
Priority to US15/853,835 priority patent/US10044334B2/en
Priority to US15/853,950 priority patent/US9973164B1/en
Priority to US15/854,738 priority patent/US10044335B2/en

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03G—CONTROL OF AMPLIFICATION
    • H03G3/00—Gain control in amplifiers or frequency changers without distortion of the input signal
    • H03G3/20—Automatic control
    • H03G3/30—Automatic control in amplifiers having semiconductor devices
    • H03G3/3036—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers
    • H03G3/3042—Automatic control in amplifiers having semiconductor devices in high-frequency amplifiers or in frequency-changers in modulators, frequency-changers, transmitters or power amplifiers

Definitions

  • the invention belongs to the field of power amplifiers, and in particular to a power amplifier and a gain switching circuit thereof.
  • Power amplifiers usually have multiple gain modes, such as high gain / low gain mode, or high gain / medium gain / Low gain three modes.
  • Traditional gain implementations can be:
  • a power amplifier gain switching circuit comprising:
  • a gain control unit that accesses an external input signal and outputs a first input signal, and accesses an external driving signal, and outputs a control signal according to the driving signal;
  • Amplification unit with:
  • the bias input is connected to an externally supplied bias voltage
  • the first input signal is accessed
  • the amplifying unit switches the gain coefficient of the gain output signal according to the control signal.
  • a power amplifier including a bias voltage generating circuit, a driving signal generating circuit, and the above-described power amplifier gain switching circuit is also provided.
  • the power amplifier and the gain switching circuit thereof can control the gain control unit to output a control signal according to an external input signal and a driving signal, and the control signal can enable the amplifying unit to effectively achieve gain attenuation, and the phase jump caused by the gain switching is small.
  • Figure 1 is a block diagram of a power amplifier gain switching circuit
  • FIG. 2 is a circuit schematic diagram of a power amplifier gain switching circuit in an embodiment
  • FIG. 3 is a circuit schematic diagram of a power amplifier gain switching circuit in another embodiment.
  • a power amplifier gain switching circuit includes an amplifying unit 100 and a gain control unit 200.
  • the gain control unit 200 accesses the input signal RF in and outputs the first input signal, and accesses the driving signal V mode , and outputs a control signal according to the driving signal V mode .
  • the amplifying unit 100 has: a bias input terminal a for accessing an externally supplied bias voltage; a signal input terminal b for accessing the first input signal; a control terminal c for accessing the control signal; The output terminal d of the output signal of the gain is output; the amplification unit 100 switches the gain coefficient of the output signal RF out through the gain according to the switching of the control signal.
  • the gain control unit 200 is one or a plurality of parallel.
  • the first input signal of the previous output is used as the latter input signal RF in , and thus,
  • the external drive signal V mode controls the corresponding number of gain control units 200 to operate, which allows the amplification unit 100 to achieve the gain of the corresponding stage.
  • the gain control unit 200 when the gain control unit 200 is one, the amplifying unit 100 can be made to realize a high gain or a low gain post output to the input signal.
  • the gain control unit 200 when the gain control unit 200 is two, the amplifying unit 100 can be made to implement a high gain, a medium gain, or a low gain post output for the input signal.
  • the above-mentioned driving signal V mode includes a high level and a low level.
  • the gain control unit 200 When the gain control unit is connected to the (drive signal V mode ) low level, the gain control unit 200 is turned off, and the control signal is not output; when the gain control unit 200 is connected (the drive signal V mode ) is high level, the gain control unit is Turning on, the output control signal causes the gain factor of the amplifying unit 100 to decrease.
  • the gain control unit 200 generates a first input signal after blocking the input signal RF in and pulling it low.
  • the gain control unit 200 includes a first DC blocking capacitor C1 and a first resistor R1.
  • One end of the first DC blocking capacitor C1 is used to input the input signal RF in , and the other end of the first DC blocking capacitor C1 outputs a first input signal to the signal input end b of the amplifying unit 100 via the first resistor R1; the first power tube Q1 and the second power transistor Q2 base drive signal is V mode, in particular through the resistor R6 of the drive signal is V mode; transmit power of a first power transistor Q1 and the second transistor Q2 is connected to ground, a first power transistor The collector of Q1 is connected in series with the first resistor R1 via the second resistor R2, and the collector of the second power transistor Q2 is connected to the control terminal c via the third resistor R3. It can be seen that the gain control unit 200 can generate a first input signal by blocking the input signal and pulling it low after the driving signal V mode is controlled.
  • the gain control unit 200 when the gain control unit 200 is a plurality of parallels, the first input signal of the previous output is used as the input signal RF in the next one , that is, the input signal RF in is separated from the gain control unit 200 on the left side of the figure.
  • the front end of the straight capacitor C4 is input, and then the first input signal is output from the rear end of the resistor R7, and the first input signal is input as the input signal RF in of the first DC blocking capacitor C1 in the gain control unit 200 on the right side of the figure.
  • the gain attenuating unit 200 is plural, the plurality of first DC blocking capacitors C1 of the plurality of gain switching units 200 are combined into one DC blocking capacitor, and the plurality of first resistors R1 are combined into one resistor, that is, multiple A DC blocking capacitor C1 is replaced by one, and a plurality of first resistors R1 are replaced by one; of course, a plurality of them may be used.
  • the amplification unit 100 includes a first amplifier 110 and a second amplifier 120.
  • the first amplifier 110 has a first bias input terminal a for accessing the bias voltage, that is, a bias input terminal a of the amplifying unit 100, and a first signal input terminal for accessing the first input signal. That is, the signal input terminal b of the amplifying unit 100; the first output terminal f for outputting the primary output signal of the first gain; and the control terminal for accessing the control signal c, that is, the control terminal of the amplifying unit 100 c.
  • the second amplifier 120 has a second bias input terminal e for accessing the bias voltage, and a bias input terminal of the amplifying unit 100. a second signal input terminal f for accessing the primary output signal; and a second output terminal d for outputting the output signal of the second gain, that is, the output terminal d of the amplification unit 100.
  • the first amplifier 110 includes a third power tube Q3, a fourth power tube Q4, a second DC blocking capacitor C2, and a fourth resistor. R4, the first inductor L1.
  • the base of the third power tube Q3 serves as the first bias input terminal a, and the collector of the third power tube Q3 is connected to the first power source Vccb
  • the emitter of the third power tube Q3 is connected to the base of the fourth power tube Q4 via the fourth resistor R4, and the base of the fourth power tube Q4 serves as the control end c, and the fourth power tube Q4
  • the collector is connected as the first output terminal f and connected to one end of the first inductor L1, the other end of the first inductor L1 is connected to the second power source Vcc1, the emitter of the fourth power transistor Q4 is grounded, and the second DC blocking capacitor C2 One end is used as the first signal input terminal b, and the other end of the second DC blocking capacitor C2 is connected to the base of the fourth power transistor Q4.
  • the second amplifier 120 includes a fifth power tube Q5, a sixth power tube Q6, a third DC blocking capacitor C3, and a fifth resistor. R5, the second inductor L2.
  • the base of the fifth power tube Q5 serves as the first bias input terminal e, and the collector of the fifth power transistor Q5 is connected to the first power source Vccb
  • the emitter of the fifth power transistor Q5 is connected to the base of the sixth power transistor Q6 via the fifth resistor R5, and the collector of the sixth power transistor Q6 serves as the output terminal d of the amplifying unit 100 and is coupled to the first inductor L1.
  • One end of the second inductor L2 is connected to the third power source Vcc2, the emitter of the sixth power tube Q6 is grounded, and one end of the third DC blocking capacitor C3 is used as the second signal input terminal b and the fourth power tube.
  • the collector of Q4 is connected, and the other end of the third DC blocking capacitor C3 is connected to the base of the sixth power transistor Q6.
  • the power tube is a triode.
  • the first power transistor Q1 and the second power transistor Q2 are turned on, so that the base voltage of the fourth power transistor Q4 is lowered (depending on the resistance of the resistor R3 and the resistor R8). ), such that the collector of the first amplifier 110 (the fourth power of the transistor Q4) of the primary output coefficient signal output from the primary gain becomes low, resulting in the final output signal RF out of the gain factor of the second amplifier 120 also becomes low.
  • the gain control unit 200 when the driving signals V mode1 and V mode2 are both low level, the gain control unit 200 does not operate, and the amplifying unit 100 is in the high gain mode; when one of the driving signals V mode1 and V mode2 is high At the level, one of the gain control unit 200 operates, the other does not work, the amplification unit 100 is in the medium gain mode; when the drive signal V mode1 , V mode 2 are both high level, the gain control unit 200 operates simultaneously, and the amplification unit 100 is at a low level Gain mode.
  • a power amplifier including a bias voltage generating circuit, a driving signal generating circuit, and the above-described power amplifier gain switching circuit is also provided.

Abstract

A power amplifier and a gain switching circuit thereof. The gain switching circuit comprises: an amplification unit, provided with a bias input end and accessing a bias voltage; a signal input end, accessing a first input signal; a control end, accessing a control signal; an output end, outputting a gained output signal; and a gain control unit, accessing an input signal and outputting the first input signal, accessing a driving signal, and outputting the control signal according to the driving signal. The amplification unit switches a gain coefficient of the gained output signal according to the control signal.

Description

功率放大器及其增益切换电路 Power amplifier and gain switching circuit 技术领域 Technical field
本发明属于功率放大器领域，尤其涉及一种功率放大器及其增益切换电路。  The invention belongs to the field of power amplifiers, and in particular to a power amplifier and a gain switching circuit thereof.
背景技术 Background technique
功率放大器通常都有多种增益模式，如高增益 / 低增益两种模式，或者高增益 / 中增益 / 低增益三种模式。传统的增益实现方式可以有： Power amplifiers usually have multiple gain modes, such as high gain / low gain mode, or high gain / medium gain / Low gain three modes. Traditional gain implementations can be:
（ 1 ） 通过调整偏置电路的电压 / 电流值，是电路工作在不同的偏置情况下，从而实现增益切换。该方法的缺点是高增益和低增益落差不大。 (1) by adjusting the voltage of the bias circuit / The current value is the circuit operating under different bias conditions to achieve gain switching. The disadvantage of this method is that the high gain and low gain drop are not large.
（ 2 ） 通过不同信号通道的切换实现高低增益模式切换。该方法的缺点是芯片面积大，切换增益有可能导致相位不连续。 ( 2 ) High and low gain mode switching is achieved by switching between different signal channels. The disadvantage of this method is that the chip area is large, and the switching gain may cause phase discontinuity.
发明内容 Summary of the invention
基于此，有必要提供一种 功率放大器增益切换电路 ，旨在解决 高增益和低增益落差不大 的问题。 Based on this, it is necessary to provide a power amplifier gain switching circuit designed to solve the problem of low gain and low gain drop.
一种功率放大器增益切换电路，包括： A power amplifier gain switching circuit comprising:
增益控制单元，接入外部输入信号并输出第一输入信号，且接入外部驱动信号，并根据该驱动信号输出控制信号； a gain control unit that accesses an external input signal and outputs a first input signal, and accesses an external driving signal, and outputs a control signal according to the driving signal;
放大单元，具有： Amplification unit with:
偏置输入端，接入 外部提供的 偏置电压； The bias input is connected to an externally supplied bias voltage;
信号输入端，接入 所述 第一输入信号； a signal input end, the first input signal is accessed;
控制端，接入 所述 控制信号；以及 a control terminal that accesses the control signal;
输出端，输出经增益的输出信号； Output, outputting a gain output signal;
所述放大单元根据所述控制信号切换所述经增益的输出信号的增益系数。 The amplifying unit switches the gain coefficient of the gain output signal according to the control signal.
此外，还提供了一种功率放大器，包括偏置电压产生电路、驱动信号产生电路以及上述的功率放大器增益切换电路。 Further, a power amplifier including a bias voltage generating circuit, a driving signal generating circuit, and the above-described power amplifier gain switching circuit is also provided.
上述功率放大器及其增益切换电路可以根据外部的输入信号和驱动信号控制增益控制单元输出控制信号，控制信号可以使得放大单元有效实现增益衰减，增益切换带来的相位跳变很小。 The power amplifier and the gain switching circuit thereof can control the gain control unit to output a control signal according to an external input signal and a driving signal, and the control signal can enable the amplifying unit to effectively achieve gain attenuation, and the phase jump caused by the gain switching is small.
附图说明 DRAWINGS
图 1 是功率放大器增益切换电路的模块示意图； Figure 1 is a block diagram of a power amplifier gain switching circuit;
图 2 是一个实施例中的功率放大器增益切换电路的电路原理图； 2 is a circuit schematic diagram of a power amplifier gain switching circuit in an embodiment;
图 3 是另一个实施例中的功率放大器增益切换电路的电路原理图。 3 is a circuit schematic diagram of a power amplifier gain switching circuit in another embodiment.
具体实施方式 detailed description
为了使本发明要解决的技术问题、技术方案及有益效果更加清楚明白，以下结合附图及实施例，对本发明进行进一步详细说明。应当理解，此处所描述的具体实施例仅仅用以解释本发明，并不用于限定本发明。 The present invention will be further described in detail below with reference to the accompanying drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
如图 1 所示，一种功率放大器增益切换电路，包括放大单元 100 、增益控制单元 200 。 As shown in FIG. 1, a power amplifier gain switching circuit includes an amplifying unit 100 and a gain control unit 200.
增益控制单元 200 接入输入信号 RFin 并输出的第一输入信号，且接入驱动信号 Vmode ，并根据该驱动信号 Vmode 输出控制信号。The gain control unit 200 accesses the input signal RF in and outputs the first input signal, and accesses the driving signal V mode , and outputs a control signal according to the driving signal V mode .
放大单元 100 ，具有：用于接入外部提供的偏置电压的偏置输入端 a ；用于接入第一输入信号的信号输入端 b ；用于接入控制信号的控制端 c ；用于输出经增益的输出信号的输出端 d ；放大单元 100 根据控制信号的切换经增益的输出信号 RFout 的增益系数。The amplifying unit 100 has: a bias input terminal a for accessing an externally supplied bias voltage; a signal input terminal b for accessing the first input signal; a control terminal c for accessing the control signal; The output terminal d of the output signal of the gain is output; the amplification unit 100 switches the gain coefficient of the output signal RF out through the gain according to the switching of the control signal.
在优选的实施例中，增益控制单元 200 为一个或为并联的多个，当增益控制单元 200 为多个时，前一个输出的第一输入信号作为后一个的输入信号 RFin ，如此，通过外部的驱动信号 Vmode 控制相应个数的增益控制单元 200 工作，可以使得放大单元 100 实现相应级的增益。例如，参考图 2 ，增益控制单元 200 为一个时，可以使得放大单元 100 对输入信号实现高增益或低增益的后输出。参考图 3 ，增益控制单元 200 为两个时，可以使得放大单元 100 对输入信号实现高增益、中增益或低增益的后输出。In a preferred embodiment, the gain control unit 200 is one or a plurality of parallel. When the gain control unit 200 is plural, the first input signal of the previous output is used as the latter input signal RF in , and thus, The external drive signal V mode controls the corresponding number of gain control units 200 to operate, which allows the amplification unit 100 to achieve the gain of the corresponding stage. For example, referring to Fig. 2, when the gain control unit 200 is one, the amplifying unit 100 can be made to realize a high gain or a low gain post output to the input signal. Referring to FIG. 3, when the gain control unit 200 is two, the amplifying unit 100 can be made to implement a high gain, a medium gain, or a low gain post output for the input signal.
需要说明的是，本实施例中，上述的驱动信号 Vmode 包括高电平和低电平。It should be noted that, in this embodiment, the above-mentioned driving signal V mode includes a high level and a low level.
当增益控制单元接 200 入（驱动信号 Vmode ）低电平时，增益控制单元 200 截止，未输出控制信号；当增益控制单元 200 接入（驱动信号 Vmode ）为高电平时，增益控制控制单元导通，输出控制信号使得放大单元 100 的增益系数降低。When the gain control unit is connected to the (drive signal V mode ) low level, the gain control unit 200 is turned off, and the control signal is not output; when the gain control unit 200 is connected (the drive signal V mode ) is high level, the gain control unit is Turning on, the output control signal causes the gain factor of the amplifying unit 100 to decrease.
增益控制单元 200 将输入信号 RFin 的进行隔直并拉低电平后，产生第一输入信号。The gain control unit 200 generates a first input signal after blocking the input signal RF in and pulling it low.
在其中一个实施例中，参考图 2 和 3 ，增益控制单元 200 包括第一隔直电容 C1 、第一电阻 R1 、第一功率管 Q1 、第二功率管 Q2 、第二电阻 R2 、第三电阻 R3 。 In one embodiment, referring to FIGS. 2 and 3, the gain control unit 200 includes a first DC blocking capacitor C1 and a first resistor R1. The first power tube Q1, the second power tube Q2, the second resistor R2, and the third resistor R3.
第一隔直电容 C1 的一端用于接入输入信号 RFin ，第一隔直电容 C1 的另一端经第一电阻 R1 向放大单元 100 的 信号输入端 b 输出第一输入信号；第一功率管 Q1 和第二功率管 Q2 的基极接入驱动信号 Vmode ，具体是经过电阻 R6 接入驱动信号 Vmode 的；第一功率管 Q1 和第二功率管 Q2 的发射极接地，第一功率管 Q1 的集电极经第二电阻 R2 与第一电阻 R1 串接，第二功率管 Q2 的集电极经第三电阻 R3 与控制端 c 连接。由此可知，增益控制单元 200 在驱动信号 Vmode 的控制下，可以将输入信号的进行隔直并拉低电平后产生第一输入信号。One end of the first DC blocking capacitor C1 is used to input the input signal RF in , and the other end of the first DC blocking capacitor C1 outputs a first input signal to the signal input end b of the amplifying unit 100 via the first resistor R1; the first power tube Q1 and the second power transistor Q2 base drive signal is V mode, in particular through the resistor R6 of the drive signal is V mode; transmit power of a first power transistor Q1 and the second transistor Q2 is connected to ground, a first power transistor The collector of Q1 is connected in series with the first resistor R1 via the second resistor R2, and the collector of the second power transistor Q2 is connected to the control terminal c via the third resistor R3. It can be seen that the gain control unit 200 can generate a first input signal by blocking the input signal and pulling it low after the driving signal V mode is controlled.
参考图 3 ，当增益控制单元 200 为并联的多个时，前一个输出的第一输入信号作为后一个的输入信号 RFin ，即输入信号 RFin 从图示左边的增益控制单元 200 中的隔直电容 C4 前端输入，其后从电阻 R7 的后端输出第一输入信号，而该第一输入信号作为图示右边的增益控制单元 200 中的第一隔直电容 C1 的输入信号 RFin 输入。另外，当增益衰减单元 200 为多个时，多个增益切换单元 200 中的多个第一隔直电容 C1 合并为一个隔直电容，多个第一电阻 R1 合并为一个电阻，即多个第一隔直电容 C1 以一个代替、多个第一电阻 R1 以一个代替；当然也可以是多个。Referring to FIG. 3, when the gain control unit 200 is a plurality of parallels, the first input signal of the previous output is used as the input signal RF in the next one , that is, the input signal RF in is separated from the gain control unit 200 on the left side of the figure. The front end of the straight capacitor C4 is input, and then the first input signal is output from the rear end of the resistor R7, and the first input signal is input as the input signal RF in of the first DC blocking capacitor C1 in the gain control unit 200 on the right side of the figure. In addition, when the gain attenuating unit 200 is plural, the plurality of first DC blocking capacitors C1 of the plurality of gain switching units 200 are combined into one DC blocking capacitor, and the plurality of first resistors R1 are combined into one resistor, that is, multiple A DC blocking capacitor C1 is replaced by one, and a plurality of first resistors R1 are replaced by one; of course, a plurality of them may be used.
在其中一个实施例中，参考图 2 和 3 ，放大单元 100 包括第一放大器 110 和第二放大器 120 ；第一放大器 110 具有：用于接入偏置电压的第一偏置输入端 a ，即放大单元 100 的偏置输入端 a ；用于接入第一输入信号的第一信号输入端 b ，即放大单元 100 的信号输入端 b ；用于输出经第一次增益的初级输出信号的第一输出端 f ；以及用于接入控制信号控制端 c ，即放大单元 100 的控制端 c 。 In one embodiment, referring to Figures 2 and 3, the amplification unit 100 includes a first amplifier 110 and a second amplifier 120. The first amplifier 110 has a first bias input terminal a for accessing the bias voltage, that is, a bias input terminal a of the amplifying unit 100, and a first signal input terminal for accessing the first input signal. That is, the signal input terminal b of the amplifying unit 100; the first output terminal f for outputting the primary output signal of the first gain; and the control terminal for accessing the control signal c, that is, the control terminal of the amplifying unit 100 c.
第二放大器 120 具有：用于接入偏置电压的第二偏置输入端 e ，同放大单元 100 的偏置输入端 a ；用于接入初级输出信号的第二信号输入端 f ；以及用于输出经第二次增益的输出信号的第二输出端 d ，即放大单元 100 的输出端 d 。 The second amplifier 120 has a second bias input terminal e for accessing the bias voltage, and a bias input terminal of the amplifying unit 100. a second signal input terminal f for accessing the primary output signal; and a second output terminal d for outputting the output signal of the second gain, that is, the output terminal d of the amplification unit 100.
本实施例中，第一放大器 110 包括第三功率管 Q3 、第四功率管 Q4 、第二隔直电容 C2 、第四电阻 R4 、第一电感 L1 。 In this embodiment, the first amplifier 110 includes a third power tube Q3, a fourth power tube Q4, a second DC blocking capacitor C2, and a fourth resistor. R4, the first inductor L1.
第三功率管 Q3 的基极作为第一偏置输入端 a ，第三功率管 Q3 的集电极接第一电源 Vccb ，第三功率管 Q3 的发射极经第四电阻 R4 与第四功率管 Q4 的基极连接，且第四功率管 Q4 的基极作为控制端 c ，第四功率管 Q4 的集电极作为第一输出端 f 并与第一电感 L1 的一端连接，第一电感 L1 的另一端接第二电源 Vcc1 ，第四功率管 Q4 的发射极接地，第二隔直电容 C2 的一端作为第一信号输入端 b ，第二隔直电容 C2 的另一端与第四功率管 Q4 的基极连接。 The base of the third power tube Q3 serves as the first bias input terminal a, and the collector of the third power tube Q3 is connected to the first power source Vccb The emitter of the third power tube Q3 is connected to the base of the fourth power tube Q4 via the fourth resistor R4, and the base of the fourth power tube Q4 serves as the control end c, and the fourth power tube Q4 The collector is connected as the first output terminal f and connected to one end of the first inductor L1, the other end of the first inductor L1 is connected to the second power source Vcc1, the emitter of the fourth power transistor Q4 is grounded, and the second DC blocking capacitor C2 One end is used as the first signal input terminal b, and the other end of the second DC blocking capacitor C2 is connected to the base of the fourth power transistor Q4.
本实施例中，第二放大器 120 包括第五功率管 Q5 、第六功率管 Q6 、第三隔直电容 C3 、第五电阻 R5 、第二电感 L2 。 In this embodiment, the second amplifier 120 includes a fifth power tube Q5, a sixth power tube Q6, a third DC blocking capacitor C3, and a fifth resistor. R5, the second inductor L2.
第五功率管 Q5 的基极作为第一偏置输入端 e ，第五功率管 Q5 的集电极接第一电源 Vccb ，第五功率管 Q5 的发射极经第五电阻 R5 与第六功率管 Q6 的基极连接，第六功率管 Q6 的集电极作为放大单元 100 的输出端 d 并与第一电感 L1 的一端连接，第二电感 L2 的另一端接第三电源 Vcc2 ，第六功率管 Q6 的发射极接地，第三隔直电容 C3 的一端作为第二信号输入端 b 与第四功率管 Q4 的集电极连接，第三隔直电容 C3 的另一端与第六功率管 Q6 的基极连接。 The base of the fifth power tube Q5 serves as the first bias input terminal e, and the collector of the fifth power transistor Q5 is connected to the first power source Vccb The emitter of the fifth power transistor Q5 is connected to the base of the sixth power transistor Q6 via the fifth resistor R5, and the collector of the sixth power transistor Q6 serves as the output terminal d of the amplifying unit 100 and is coupled to the first inductor L1. One end of the second inductor L2 is connected to the third power source Vcc2, the emitter of the sixth power tube Q6 is grounded, and one end of the third DC blocking capacitor C3 is used as the second signal input terminal b and the fourth power tube. The collector of Q4 is connected, and the other end of the third DC blocking capacitor C3 is connected to the base of the sixth power transistor Q6.
其中，参考图 3 ，上述的功率管为三极管。当外部输入的驱动信号 Vmode1 为高电平时，第一功率管 Q1 和第二功率管 Q2 导通，使第四功率管 Q4 的基极电压变低（取决于电阻 R3 和电阻 R8 的阻值），使得第一放大器 110 （第四功率管 Q4 的集电极）输出的初级输出信号的第一次增益的系数变低，最后致使第二放大器 120 的输出信号 RFout 的增益系数也变低。Wherein, referring to FIG. 3, the power tube is a triode. When the externally input driving signal V mode1 is at a high level, the first power transistor Q1 and the second power transistor Q2 are turned on, so that the base voltage of the fourth power transistor Q4 is lowered (depending on the resistance of the resistor R3 and the resistor R8). ), such that the collector of the first amplifier 110 (the fourth power of the transistor Q4) of the primary output coefficient signal output from the primary gain becomes low, resulting in the final output signal RF out of the gain factor of the second amplifier 120 also becomes low.
基于上述图 3 的实施例，当驱动信号 Vmode1 、 Vmode2 均为低电平时，增益控制单元 200 不工作，放大单元 100 处于高增益模式；当驱动信号 Vmode1 、 Vmode2 其中之一为高电平时，增益控制单元 200 其中一个工作，另一个不工作，放大单元 100 处于中增益模式；当驱动信号 Vmode1 ， Vmode2 均为高电平时，增益控制单元 200 同时工作，放大单元 100 处于低增益模式。Based on the embodiment of FIG. 3 above, when the driving signals V mode1 and V mode2 are both low level, the gain control unit 200 does not operate, and the amplifying unit 100 is in the high gain mode; when one of the driving signals V mode1 and V mode2 is high At the level, one of the gain control unit 200 operates, the other does not work, the amplification unit 100 is in the medium gain mode; when the drive signal V mode1 , V mode 2 are both high level, the gain control unit 200 operates simultaneously, and the amplification unit 100 is at a low level Gain mode.
此外，还提供了一种功率放大器，包括偏置电压产生电路、驱动信号产生电路以及上述的功率放大器增益切换电路。 Further, a power amplifier including a bias voltage generating circuit, a driving signal generating circuit, and the above-described power amplifier gain switching circuit is also provided.
以上仅所述为本发明的较佳实施例而已，并不用以限制本发明，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。 The above is only the preferred embodiment of the present invention, and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection of the present invention. Within the scope.

Claims (10)

  1. 一种功率放大器增益切换电路，其特征在于，包括：A power amplifier gain switching circuit, comprising:
    增益控制单元，接入外部输入信号并输出第一输入信号，且接入外部驱动信号，并根据该驱动信号输出控制信号；a gain control unit that accesses an external input signal and outputs a first input signal, and accesses an external driving signal, and outputs a control signal according to the driving signal;
    放大单元，具有：Amplification unit with:
    偏置输入端，接入外部提供的偏置电压；The bias input terminal is connected to an externally supplied bias voltage;
    信号输入端，接入所述第一输入信号；a signal input end, the first input signal is accessed;
    控制端，接入所述控制信号；以及a control terminal that accesses the control signal;
    输出端，输出经增益的输出信号；Output, outputting a gain output signal;
    所述放大单元根据所述控制信号切换所述经增益的输出信号的增益系数。The amplifying unit switches the gain coefficient of the gain output signal according to the control signal.
  2. 根据权利要求 1 所述的功率放大器增益切换电路，其特征在于，所述增益控制单元包括第一隔直电容、第一电阻、第一功率管、第二功率管、第二电阻、第三电阻，其中，According to claim 1 The power amplifier gain switching circuit is characterized in that the gain control unit includes a first DC blocking capacitor, a first resistor, a first power transistor, a second power transistor, a second resistor, and a third resistor, wherein
    所述第一隔直电容一端用于接入所述输入信号，另一端经所述第一电阻输出所述第一输入信号；One end of the first DC blocking capacitor is used to access the input signal, and the other end is used to output the first input signal via the first resistor;
    所述第一功率管和所述第二功率管的基极接入所述驱动信号、发射极接地，所述第一功率管的集电极经所述第二电阻与所述第一电阻串接，所述第二功率管的集电极经所述第三电阻与所述控制端连接。The bases of the first power tube and the second power tube are connected to the driving signal, and the emitter is grounded, and the collector of the first power tube is connected to the first resistor via the second resistor The collector of the second power tube is connected to the control terminal via the third resistor.
  3. 根据权利要求 1 或 2 所述的功率放大器增益切换电路，其特征在于，所述增益控制单元为一个或为并联的多个。According to claim 1 or 2 The power amplifier gain switching circuit is characterized in that the gain control unit is one or a plurality of parallel.
  4. 根据权利要求 2 所述的功率放大器增益切换电路，其特征在于，所述增益控制单元为并联的多个时，多个所述增益控制单元中的多个所述第一隔直电容合并为一个隔直电容，多个所述增益衰减单元中的多个所述第一电阻合并为一个电阻。According to claim 2 The power amplifier gain switching circuit is characterized in that, when the gain control unit is a plurality of parallel, a plurality of the first DC blocking capacitors of the plurality of gain control units are combined into one DC blocking capacitor, A plurality of the first resistors of the plurality of gain attenuating units are combined into one resistor.
  5. 根据权利要求 1 所述的功率放大器增益切换电路，其特征在于，所述驱动信号包括高电平和低电平；The power amplifier gain switching circuit according to claim 1, wherein the driving signal comprises a high level and a low level;
    当所述增益控制单元接入低电平时，所述增益控制单元截止，未输出所述控制信号；当所述增益控制单元接入高电平时，所述增益控制单元导通，输出所述控制信号使得所述输出信号的增益系数降低。When the gain control unit is connected to a low level, the gain control unit is turned off, and the control signal is not output; when the gain control unit is connected to a high level, the gain control unit is turned on, and the control is output The signal causes the gain factor of the output signal to decrease.
  6. 根据权利要求 1 或 2 所述的功率放大器增益切换电路，其特征在于，所述增益控制单元用于将所述输入信号的进行隔直并拉低电平后，产生所述第一输入信号。According to claim 1 or 2 The power amplifier gain switching circuit is characterized in that the gain control unit is configured to generate the first input signal after blocking the input signal and pulling a low level.
  7. 根据权利要求 1 或 2 所述的功率放大器增益切换电路，其特征在于，所述放大单元包括第一放大器和第二放大器；According to claim 1 or 2 The power amplifier gain switching circuit, characterized in that the amplifying unit comprises a first amplifier and a second amplifier;
    所述第一放大器，具有：The first amplifier has:
    第一偏置输入端，接入所述偏置电压；a first bias input terminal for accessing the bias voltage;
    第一信号输入端，接入所述第一输入信号；a first signal input terminal, the first input signal is accessed;
    第一输出端，输出经第一次增益的初级输出信号；以及a first output that outputs a primary output signal that is subjected to a first gain;
    控制端，接入所述控制信号；Control terminal, accessing the control signal;
    所述第二放大器，具有：The second amplifier has:
    第二偏置输入端，接入所述偏置电压；a second bias input terminal for accessing the bias voltage;
    第二信号输入端，接入所述初级输出信号；以及a second signal input terminal for accessing the primary output signal;
    第二输出端，输出经第二次增益的所述输出信号。The second output outputs the output signal of the second gain.
  8. 根据权利要求 7 所述的功率放大器增益切换电路，其特征在于，所述第一放大器包括第三功率管、第四功率管、第二隔直电容、第四电阻、第一电感；According to claim 7 The power amplifier gain switching circuit is characterized in that: the first amplifier comprises a third power tube, a fourth power tube, a second DC blocking capacitor, a fourth resistor, and a first inductor;
    所述第三功率管的基极作为所述第一偏置输入端，集电极接第一电源，发射极经所述第四电阻与所述第四功率管的基极连接，且所述第四功率管的基极作为所述控制端，所述第四功率管的集电极作为所述第一输出端并与所述第一电感的一端连接，所述第一电感的另一端接第二电源，所述第四功率管的发射极接地，所述第二隔直电容的一端作为所述第一信号输入端，另一端与所述第四功率管的基极连接。The base of the third power tube serves as the first bias input end, the collector is connected to the first power source, and the emitter is connected to the base of the fourth power tube via the fourth resistor, and the The base of the fourth power tube serves as the control end, the collector of the fourth power tube serves as the first output end and is connected to one end of the first inductor, and the other end of the first inductor is connected to the second The power source, the emitter of the fourth power tube is grounded, and one end of the second DC blocking capacitor is used as the first signal input end, and the other end is connected to the base of the fourth power tube.
  9. 根据权利要求 8 所述的功率放大器增益切换电路，其特征在于，所述第二放大器包括第五功率管、第六功率管、第三隔直电容、第五电阻、第二电感；According to claim 8 The power amplifier gain switching circuit is characterized in that: the second amplifier comprises a fifth power tube, a sixth power tube, a third DC blocking capacitor, a fifth resistor, and a second inductor;
    所述第五功率管的基极作为所述第一偏置输入端，集电极接第一电源，发射极经所述第五电阻与所述第六功率管的基极连接，所述第六功率管的集电极作为所述放大单元的输出端并与所述第一电感的一端连接，所述第二电感的另一端接第三电源，所述第六功率管的发射极接地，所述第三隔直电容的一端作为所述第二信号输入端与所述第四功率管的集电极连接，另一端与所述第六功率管的基极连接。The base of the fifth power tube serves as the first bias input end, the collector is connected to the first power source, and the emitter is connected to the base of the sixth power tube via the fifth resistor, the sixth a collector of the power tube is connected as an output end of the amplifying unit and connected to one end of the first inductor, and another end of the second inductor is connected to a third power source, and an emitter of the sixth power tube is grounded, One end of the third DC blocking capacitor is connected to the collector of the fourth power tube as the second signal input end, and the other end is connected to the base of the sixth power tube.
  10. 一种功率放大器，其特征在于，包括偏置电压产生电路、驱动信号产生电路以及权利要求 1 至 9 任一项所述的功率放大器增益切换电路。A power amplifier comprising a bias voltage generating circuit, a driving signal generating circuit, and claims 1 to 9 A power amplifier gain switching circuit as claimed in any of the preceding claims.
PCT/CN2014/093421 2013-12-30 2014-12-10 Power amplifier and gain switching circuit thereof WO2015101144A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
US15/139,087 US9595933B2 (en) 2013-12-30 2016-04-26 Power amplifier device and circuits
US15/418,748 US9887679B2 (en) 2013-12-30 2017-01-29 Power amplifier and gain switching circuit thereof
US15/853,835 US10044334B2 (en) 2013-12-30 2017-12-24 Power amplifier and gain reduction circuit thereof
US15/853,950 US9973164B1 (en) 2013-12-30 2017-12-25 Power amplifier output power control circuit
US15/854,738 US10044335B2 (en) 2013-12-30 2017-12-26 Multi-mode multi-frequency power amplifier

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201310746831.9A CN104753477B (en) 2013-12-30 2013-12-30 Power amplifier and its gain switching circuit
CN201310746831.9 2013-12-30

Related Parent Applications (2)

Application Number Title Priority Date Filing Date
PCT/CN2014/093423 Continuation WO2015101145A1 (en) 2013-12-30 2014-12-10 Power amplifier and gain reduction circuit thereof
PCT/CN2014/093423 Continuation-In-Part WO2015101145A1 (en) 2013-12-30 2014-12-10 Power amplifier and gain reduction circuit thereof

Related Child Applications (1)

Application Number Title Priority Date Filing Date
US15/139,087 Continuation US9595933B2 (en) 2013-12-30 2016-04-26 Power amplifier device and circuits

Publications (1)

Publication Number Publication Date
WO2015101144A1 true WO2015101144A1 (en) 2015-07-09

Family

ID=53493167

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2014/093421 WO2015101144A1 (en) 2013-12-30 2014-12-10 Power amplifier and gain switching circuit thereof

Country Status (2)

Country Link
CN (1) CN104753477B (en)
WO (1) WO2015101144A1 (en)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106788298B (en) * 2015-11-20 2019-03-15 厦门宇臻集成电路科技有限公司 A kind of power amplifier gain switching circuit
CN106169915B (en) * 2016-06-30 2020-07-31 唯捷创芯(天津)电子技术股份有限公司 Multi-gain mode power amplifier, chip and communication terminal
JP2018063613A (en) * 2016-10-14 2018-04-19 ルネサスエレクトロニクス株式会社 Semiconductor device
CN106559052A (en) * 2016-11-22 2017-04-05 西京学院 A kind of electro-nic message transmissions amplifier
CN108206679A (en) * 2016-12-20 2018-06-26 深圳市中兴微电子技术有限公司 A kind of radio-frequency power amplifier and its gain control circuit
CN107241073B (en) * 2017-05-25 2020-05-05 江苏大学 Parallel structure power amplifier for improving linearity

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4929908A (en) * 1988-05-02 1990-05-29 Kubushiki Kaisha Toshiba Gain controllable amplifier circuit
WO2002015397A2 (en) * 2000-08-16 2002-02-21 Maxim Integrated Products, Inc. Low-loss bypass mode of an amplifier with high linearity and matched impedance
WO2004023631A2 (en) * 2002-09-04 2004-03-18 Cirrus Logic, Inc. Power supply based audio compression for digital audio amplifier
CN1641998A (en) * 2004-01-16 2005-07-20 络达科技股份有限公司 Switchable gain amplifier
CN1665127A (en) * 2004-03-03 2005-09-07 恩益禧电子股份有限公司 Variable capacitor circuit and integrated circuit containing the same
US20070040607A1 (en) * 2005-08-19 2007-02-22 Micron Technology, Inc. Switched capacitor amplifier with higher gain and improved closed-loop gain accuracy

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2379567B (en) * 2001-08-30 2003-09-10 Zarlink Semiconductor Ltd Controllable attenuator
CN101394151B (en) * 2008-10-14 2011-01-26 福建先创电子有限公司 Automatic gain compensation and linear control method and device for power amplifier
KR101300324B1 (en) * 2011-11-22 2013-08-28 삼성전기주식회사 Power amplfier
CN202652152U (en) * 2012-05-15 2013-01-02 无锡中科微电子工业技术研究院有限责任公司 Output power adjustable circuit of radio frequency power amplifier

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4929908A (en) * 1988-05-02 1990-05-29 Kubushiki Kaisha Toshiba Gain controllable amplifier circuit
WO2002015397A2 (en) * 2000-08-16 2002-02-21 Maxim Integrated Products, Inc. Low-loss bypass mode of an amplifier with high linearity and matched impedance
WO2004023631A2 (en) * 2002-09-04 2004-03-18 Cirrus Logic, Inc. Power supply based audio compression for digital audio amplifier
CN1641998A (en) * 2004-01-16 2005-07-20 络达科技股份有限公司 Switchable gain amplifier
CN1665127A (en) * 2004-03-03 2005-09-07 恩益禧电子股份有限公司 Variable capacitor circuit and integrated circuit containing the same
US20070040607A1 (en) * 2005-08-19 2007-02-22 Micron Technology, Inc. Switched capacitor amplifier with higher gain and improved closed-loop gain accuracy

Also Published As

Publication number Publication date
CN104753477A (en) 2015-07-01
CN104753477B (en) 2018-07-20

Similar Documents

Publication Publication Date Title
WO2015101144A1 (en) Power amplifier and gain switching circuit thereof
CN102611964B (en) Power amplification circuit and system
TWI540830B (en) Operational amplifier and power management system thereof for controlling electric light source
US20050025323A1 (en) Multi-channel power amplifier with channels independently self-configuring to a bridge or single-ended output, particularly for audio applications
TWI271923B (en) Variable gain amplifier maintaining constant DC offset at output end
US20080186091A1 (en) Dual Transconductance Amplifiers and Differential Amplifiers Implemented Using Such Dual Transconductance Amplifiers
TWI442696B (en) A circuit with three-stage of power-on sequence used for suppressing the pop noise in audio system
CN103117718A (en) High-fidelity transistor audio power amplifier
WO2015101145A1 (en) Power amplifier and gain reduction circuit thereof
EP0037406A4 (en) Cmos operational amplifier with reduced power dissipation.
JPH11317635A (en) Variable gain amplifier and analog multiplexer
JP2002208843A5 (en)
US7501893B2 (en) Variable gain amplifier circuit
US6975170B2 (en) Adaptive amplifier output common mode voltage adjustment
US3986134A (en) Push-pull amplifier circuitry
EP0913926B1 (en) Integrated power amplifier which allows parallel connections
JP2017538364A (en) Active RC filter
JPH0495408A (en) Semiconductor device
JP5514036B2 (en) Audio amplifier and electronic device using the same
TW201902116A (en) Inverting amplifier comparator
TWI623192B (en) Circuit and amplifier with deterministic noise cancellation
TW202147773A (en) A power amplifier and a vehicle audio system
EP1352466A2 (en) A fully differential, variable-gain amplifier and a multidimensional amplifier arrangement
JP6866637B2 (en) amplifier
JP5822912B2 (en) Active mute system for amplifier

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 14877314

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

32PN Ep: public notification in the ep bulletin as address of the adressee cannot be established

Free format text: OTING OF LOSS OF RIGHTS PURSUANT TO RULE 112(1) EPC (EPO FORM 1205A DATED 22.11.2016)

122 Ep: pct application non-entry in european phase

Ref document number: 14877314

Country of ref document: EP

Kind code of ref document: A1