WO2015078125A1

WO2015078125A1 - Optical device

Info

Publication number: WO2015078125A1
Application number: PCT/CN2014/074950
Authority: WO
Inventors: 胡鹏; 李泉明; 宛政文
Original assignee: 华为技术有限公司
Priority date: 2013-11-28
Filing date: 2014-04-09
Publication date: 2015-06-04
Also published as: CN103606546A; CN103606546B

Abstract

An optical device (100), comprising a plurality of chips (10), a plurality of micro thermal electric coolers (TEC), a substrate (30) and a housing (50); the chips (10), the micro TECs (20) and the substrate (30) are installed in the housing (50); a micro TEC (20) comprises a cold surface and a thermal surface; each chip (10) is pasted with one micro TEC (20) at the lower surface, and the cold surface is pasted to the chip (10); when the working temperature of the chip (10) is higher than a set temperature, the micro TEC (20) cools the chip (10); the thermal surface is affixed to the substrate (30), and the substrate (30) is located between the thermal surface and the bottom wall (54) of the housing (50) so as to conduct out the heat of the chip (10) and the micro TEC (20) via the housing (50). When the working temperature of a chip (10) is higher than the set temperature, the micro TEC (20) affixed on the lower surface of each chip (10) on the optical device cools the chip (10), so that different chips (10) work at different optimum working temperatures, thus improving the rate of good chips (10) and cooling efficiency, and solving the problem in the prior art of a low rate of good chips (10) in some channels and high power consumption of the optical device (100) due to all chips (10) working at the same temperature.

Description

Optical device

The present application claims priority to Chinese Patent Application No. 2013-122 543, the entire disclosure of which is incorporated herein by reference. Technical field

The present invention relates to the field of communications technologies, and in particular, to an optical device. Background technique

With the integration and miniaturization of optical devices, the single-point heat flux density of optical devices is increasing. In order to ensure the stability of the signal transmitted or received by the chip, the chip needs to be controlled to operate at a suitable temperature. The temperature control method of the existing optical device chip is mainly through a thermoelectric cooler (TEC, Thermal Electric Cooler), and a temperature equalizing substrate is added to the cold surface of the TEC, and all the chips and passive components are arranged on the temperature equalizing substrate. The heat dissipation technology connects the TEC cold surface to the temperature equalization substrate, and controls all the chips to work at the same temperature through the temperature equalization substrate. However, due to the different growth processes of the chips, the optimal operating temperature required is different, resulting in partial channels. The yield of the chip is low, and since all the chips must operate at the same temperature, the power consumption of the entire optical device is high. Summary of the invention

The technical problem to be solved by the present invention is that the prior art has the problems of low chip yield and high power consumption.

In order to achieve the above object, the embodiments of the present invention provide the following technical solutions:

An optical device includes a plurality of chips, a plurality of TECs, a substrate and a casing, wherein the chip, the micro TEC, and the substrate are mounted in the casing, The micro TEC includes a cold surface and a hot surface, and each of the chips is attached with one of the micro TECs, and the cold surface is attached to the chip, and when any one of the chips has a high operating temperature When the temperature is set, the micro TEC attached to any one of the chips is cooled by any one of the chips, the hot surface is attached to the substrate, and the substrate is located on the hot surface and the outer casing. Between the bottom walls, heat for the chip and the micro TEC is led through the outer casing. In a first possible embodiment, the bottom of the substrate is connected to the bottom wall of the outer casing. In conjunction with the first possible embodiment, in a second possible embodiment, the bottom of the substrate is connected to the bottom wall of the outer casing by solder or silver paste.

In a third possible implementation, the micro TEC is a thin film thermoelectric cooler.

In a fourth possible implementation manner, the optical device further includes a plurality of passive devices, and the passive device is disposed on the substrate.

In conjunction with the fourth possible implementation, in a fifth possible implementation, the gold wire of the passive device is connected to the outer casing through the substrate.

In a sixth possible implementation manner, the substrate is a temperature uniform substrate having thermal conductivity. In combination with any of the above possible embodiments, in a seventh possible embodiment, one side wall of the outer casing is connected to one side wall of the substrate.

In conjunction with the seventh possible embodiment, in an eighth possible implementation, the one sidewall of the outer casing is connected to the one sidewall of the substrate by solder or silver paste.

In combination with any one of the third to sixth possible embodiments, in a ninth possible implementation, the outer casing is integrally formed with the substrate.

In conjunction with the ninth possible implementation, in a tenth possible implementation, a gap is provided between a side wall of the outer casing and a side wall of the substrate.

In conjunction with the ninth possible embodiment, in an eleventh possible embodiment, the bottom wall of the outer casing is integral with the bottom of the substrate.

In conjunction with a ninth possible embodiment, in a twelfth possible embodiment, a side wall of the outer casing is coupled to a side wall of the substrate.

In conjunction with a twelfth possible embodiment, in a thirteenth possible embodiment, the one side wall of the outer casing is connected to the one side wall of the substrate by solder or silver paste.

In a fourteenth possible implementation manner, the set temperature is an optimal operating temperature of the chip

± 0.5 degrees.

According to the optical device of the present invention, a micro TEC is attached to the underside of each of the chips, and when the operating temperature of the chip is higher than a set temperature, the micro TEC attached to each chip is cooled. The different chips can be operated at different optimal operating temperatures, thereby improving the yield and cooling efficiency of the chip, thereby solving the problem in the prior art that all chips work in phase. The same temperature results in lower channel chip yield and higher power consumption of the entire optical device. DRAWINGS

In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments will be briefly described below. It is obvious that the drawings in the following description are only some embodiments of the present invention. Other drawings may also be obtained from those of ordinary skill in the art in view of the drawings.

1 is a partially assembled schematic view of an optical device according to a first embodiment of the present invention;

2 is a schematic view showing the assembly of an optical device according to a second embodiment of the present invention;

Figure 3 is an enlarged schematic view of the circle III of Figure 2;

Figure 4 is a cross-sectional view of the optical device shown in Figure 2;

Figure 5 is a cross-sectional view showing an optical device according to a third embodiment of the present invention;

6 is a cross-sectional view showing an optical device according to a fourth embodiment of the present invention;

Figure 7 is a cross-sectional view showing an optical device according to a fifth embodiment of the present invention. detailed description

BRIEF DESCRIPTION OF THE DRAWINGS The technical solutions in the embodiments of the present invention will be described in detail below with reference to the accompanying drawings. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without departing from the inventive scope are the scope of the present invention.

Referring to FIG. 1 , an optical device 100 according to a first embodiment of the present invention includes a plurality of chips 10 , a plurality of thermal electric coolers (TEC) (refer to FIG. 4 ), a substrate 30 , and The outer casing 50 (refer to FIG. 2), the chip 10, the micro TEC 20 and the substrate 30 are mounted in the outer casing 50, and each of the micro TECs 20 includes a cold surface and a hot surface, and each of the chips 10 The micro TEC 20 is attached to the lower surface, and the cold surface is attached to the chip 10. When the operating temperature of any one of the plurality of chips 10 is higher than a set temperature, The micro TEC 20 under one chip 10 refrigerates any one of the chips 10, the hot surface is attached to the substrate 30, and the substrate 30 is located between the hot surface and the bottom wall 54 of the outer casing 50 ( Please refer to FIG. 4) for passing the heat of the chip 10 and the micro TEC 20 through the outer Shell 50 is exported.

In the present embodiment, the micro TEC 20 is a film type thermoelectric refrigerator. Specifically, the micro TEC 20 is of the same order of magnitude as the chip 10 and is approximately 10-1000 um. Moreover, the micro TEC 20 is ten times more dense than the conventional TEC.

In the present embodiment, the set temperature is an optimum operating temperature of the chip 10 of ± 0.5 degrees.

In the present embodiment, the bottom of the substrate 30 is connected to the bottom wall 54 of the outer casing 50. Specifically, the bottom of the substrate 30 is connected to the bottom wall 54 of the outer casing 50 by solder or silver paste.

In the present embodiment, the substrate 30 is a temperature equalizing substrate having thermal conductivity. Specifically, the substrate 30 is a ceramic uniform temperature substrate such as an alumina or aluminum nitride ceramic substrate.

Since the micro TEC 20 is attached to the lower surface of each of the chips 10, when the operating temperature of any one of the plurality of chips 10 is higher than the set temperature, the micro TEC 20 attached to the chip 10 is The cooling enables different chips 10 to operate at different optimal operating temperatures, thereby improving the yield and cooling efficiency of the chip 10, thereby solving the problem in the prior art that all the chips 10 are operated at the same temperature. This leads to problems of lower yield and poor cooling efficiency of some channel chips. At the same time, because different chips 10 work at different optimal operating temperatures, and the conventional TEC is replaced by a miniature TEC20, the power consumption of the chip 10 and the micro TEC 20 is reduced, thereby reducing the power consumption of the entire optical device 100. Further, the problem that the power consumption of the entire optical device 100 is high due to the operation of all the chips 10 at the same temperature and the use of a large TEC is solved.

Further, since the cold surface is attached to the chip 10, that is, the chip 10 is in direct contact with the cold surface, the response time of the micro TEC 20 is faster, when the operating temperature of the chip 10 is higher than the set temperature. At the time, the micro TEC 20 cools the chip 10 for the first time, thereby further improving the cooling efficiency of the chip 10.

Further, when the operating temperature of the chip 10 is lower than the set temperature, the micro TEC 20 attached to each of the chips 10 also heats it, so that the operating temperature of the chip 10 is lower than the set temperature or high. At the set temperature, the micro TEC 20 located under the chip 10 can operate the chip 10 at an optimal operating temperature, thereby further improving the yield of the chip 10, thereby solving the problem in the prior art. All of the chips 10 operate at the same temperature, resulting in a lower yield of the partial channel chip and a higher power consumption of the entire optical device 100.

Please refer to FIG. 2 to FIG. 4 together, which is an optical device 100a according to a second embodiment of the present invention. The optical device 100a provided by the second embodiment has substantially the same structure as that of the optical device 100 provided by the first embodiment, and the functions are similar, except that the optical device 100a further includes a plurality of The source device 10a, the passive device 10a is disposed on the substrate 30.

In the present embodiment, the passive device 10a is an electronic component such as a resistor or a capacitor.

As a further improvement of the present invention, the gold wire 12a of the passive device 10a is connected to the outer casing 50 through the substrate 30.

In the present embodiment, the gold wire 12a of the passive device 10a is connected to one side wall 52 of the outer casing 50 through the substrate 30.

As shown in FIG. 4, in the present embodiment, a gap 52a is provided between one side wall of the substrate 30 and one side wall 52 of the outer casing 50.

Since the passive device 10a is disposed on the substrate 30 connected to the hot surface of the micro TEC 20, and the gold wire 12a of the passive device 10a is connected to the outer casing 50 through the substrate 30, thereby the outer casing 50 Heat is not conducted to the chip 10 through the gold wire 12a, reducing or preventing heat backflow, thereby reducing the passive load, thereby reducing the power consumption of the optical device 100a.

Further, since the passive device 10a is disposed on the substrate 30 connected to the hot face of the micro TEC 20, solder or silver paste penetrates into the gap 52a between the side wall of the substrate 30 and the side wall of the case 50 during assembly. In the middle, the heat is not directly transmitted from the outer casing 50 to the cold surface of the micro TEC 20, so that there is no thermal short circuit between the cold surface of the micro TEC 20 and the solder or silver paste between the outer casing 50 and the substrate 30, thereby improving the chip 10 The cooling efficiency further solves the problem that the temperature of the chip 10 is too high and the power consumption of the micro TEC 20 is excessive due to the thermal short circuit between the cold surface of the micro TEC 20 and the solder or silver paste between the outer casing 50 and the substrate 30 in the prior art. problem. Moreover, since there is no thermal short between the cold surface of the micro TEC 20 and the solder or silver paste between the outer casing 50 and the substrate 30, there is no fear that solder or silver paste penetrates into the side walls of the substrate 30 and the outer casing 50 during assembly. The gap 52a between the side walls reduces the difficulty of the assembly process and improves the assembly efficiency.

In the present embodiment, the material of the bottom wall 54 and the side wall of the outer casing 50 are different.

In other embodiments, the bottom wall 54 and the side walls of the outer casing 50 are of the same material.

Referring to FIG. 5, an optical device 100b according to a third embodiment of the present invention, an optical device 100b according to the third embodiment, and an optical device 100a according to the second embodiment (please refer to FIG. 2) The structure is basically the same, the functions realized are similar, and the difference is that one of the outer casings 50 The side walls 52 are connected to one side wall of the substrate 30.

In the present embodiment, one side wall 52 of the outer casing 50 is connected to one side wall of the substrate 30 by solder or silver paste.

Since the bottom of the substrate 30 is connected to the bottom wall 54 of the outer casing 50, and one side wall 52 of the outer casing 50 is connected to one side wall of the substrate 30, so that the chip 10 and the micro TEC 20 are Heat is conducted through the bottom wall 54 and the side wall 52 of the outer casing 50, that is, the entire outer casing 50 can dissipate heat as a heat dissipation path, which increases the heat dissipation area, reduces the power consumption of the optical device 100b, and further improves the chip 10 Cooling efficiency.

Referring to FIG. 6, an optical device 100c according to a fourth embodiment of the present invention, an optical device 100c according to the fourth embodiment, and an optical device 100a according to the second embodiment (please refer to FIG. 2) The structures are substantially the same, and the functions achieved are similar, except that the outer casing 50 is integrally formed with the substrate 30.

Specifically, the bottom wall 54 of the outer casing 50 is integrated with the bottom of the substrate 30.

Since the bottom wall 54 of the outer casing 50 is integrated with the bottom of the substrate 30, the heat of the chip 10 and the micro TEC 20 can be led out through the outer casing 50 more quickly, further improving the heat dissipation efficiency of the chip 10.

As a further improvement of the present invention, a side wall 52 of the outer casing 50 is connected to a side wall of the substrate 30.

Since the bottom of the substrate 30 is integrally connected with the bottom wall 54 of the outer casing 50, and one side wall 52 of the outer casing 50 is connected to one side wall of the substrate 30, so that the chip 10 and the micro The heat of the TEC 20 is led out through the bottom wall 54 and the sidewall of the outer casing 50, that is, the entire outer casing 50 can be used as a heat dissipation path to dissipate heat, thereby increasing the heat dissipation area, further improving the heat dissipation efficiency of the chip 10, and reducing the optical device 100c. Power consumption.

Referring to FIG. 7, an optical device 100d according to a fifth embodiment of the present invention, an optical device 100d according to the fifth embodiment, and an optical device 100c according to the fourth embodiment (please refer to FIG. 6) The structure is substantially the same, and the functions are similar, except that a gap 52d is provided between a side wall 52 of the outer casing 50 (please refer to FIG. 2) and one side wall of the substrate 30. The above-described embodiments do not constitute a limitation on the scope of protection of the technical solutions. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the above-described embodiments are intended to be included within the scope of the technical solutions.

Claims

Rights request

An optical device, comprising: a plurality of chips, a plurality of thermal electric coolers (TEC), a substrate and a casing, the chip, the micro TEC, and the substrate Mounted in the housing, the micro TEC includes a cold surface and a hot surface, each of the chips is attached with a micro TEC under the chip, and the cold surface is attached to the chip, when the plurality of chips When the operating temperature of any one of the chips is higher than the set temperature, the micro TEC attached to any one of the chips cools the chip, the hot surface is attached to the substrate, and the substrate is located Between the hot face and the bottom wall of the outer casing, heat for the chip and the micro TEC is led through the outer casing.

2. The optical device according to claim 1, wherein a bottom of the substrate is connected to a bottom wall of the outer casing.

3. The optical device according to claim 2, wherein a bottom of the substrate and a bottom wall of the outer case are connected by solder or silver paste.

The optical device according to claim 1, wherein the micro TEC is a thin film type thermoelectric cooler.

5. The optical device according to claim 1, wherein the optical device further comprises a plurality of passive devices, and the passive device is disposed on the substrate.

6. The optical device according to claim 5, wherein the gold wire of the passive device is connected to the outer casing through the substrate.

The optical device according to claim 1, wherein the substrate is a temperature equalization substrate having thermal conductivity.

The optical device according to any one of claims 1 to 7, wherein the outer casing A side wall is connected to a side wall of the substrate.

9. The optical device according to claim 8, wherein the one side wall of the outer casing and the one side wall of the substrate are connected by solder or silver paste.

The optical device according to any one of claims 4 to 7, wherein the outer casing is integrally formed with the substrate.

The optical device according to claim 10, wherein a gap is provided between a side wall of the outer casing and one side wall of the substrate.

The optical device according to claim 10, wherein a bottom wall of the outer casing is integrally formed with a bottom of the substrate.

13. The optical device according to claim 10, wherein one side wall of the outer casing is connected to one side wall of the substrate.

14. The optical device according to claim 13, wherein the one side wall of the outer casing and the one side wall of the substrate are connected by solder or silver paste.

15. The optical device according to claim 1, wherein the set temperature is an optimum operating temperature of the chip of ± 0.5 degrees.