WO2015076135A1 - Thin film piezoelectric actuator and method for manufacturing same - Google Patents

Thin film piezoelectric actuator and method for manufacturing same Download PDF

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Publication number
WO2015076135A1
WO2015076135A1 PCT/JP2014/079724 JP2014079724W WO2015076135A1 WO 2015076135 A1 WO2015076135 A1 WO 2015076135A1 JP 2014079724 W JP2014079724 W JP 2014079724W WO 2015076135 A1 WO2015076135 A1 WO 2015076135A1
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Prior art keywords
substrate
resist
thin film
film
piezoelectric
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PCT/JP2014/079724
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French (fr)
Japanese (ja)
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陽介 中野
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コニカミノルタ株式会社
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Priority to JP2015549077A priority Critical patent/JPWO2015076135A1/en
Publication of WO2015076135A1 publication Critical patent/WO2015076135A1/en

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    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/16Production of nozzles
    • B41J2/1621Manufacturing processes
    • B41J2/1631Manufacturing processes photolithography
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/14Structure thereof only for on-demand ink jet heads
    • B41J2/14201Structure of print heads with piezoelectric elements
    • B41J2/14233Structure of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/16Production of nozzles
    • B41J2/1607Production of print heads with piezoelectric elements
    • B41J2/161Production of print heads with piezoelectric elements of film type, deformed by bending and disposed on a diaphragm
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/16Production of nozzles
    • B41J2/1621Manufacturing processes
    • B41J2/1626Manufacturing processes etching
    • B41J2/1628Manufacturing processes etching dry etching
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/01Manufacture or treatment
    • H10N30/08Shaping or machining of piezoelectric or electrostrictive bodies
    • H10N30/082Shaping or machining of piezoelectric or electrostrictive bodies by etching, e.g. lithography
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/20Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators
    • H10N30/204Piezoelectric or electrostrictive devices with electrical input and mechanical output, e.g. functioning as actuators or vibrators using bending displacement, e.g. unimorph, bimorph or multimorph cantilever or membrane benders
    • H10N30/2047Membrane type
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/704Piezoelectric or electrostrictive devices based on piezoelectric or electrostrictive films or coatings
    • H10N30/706Piezoelectric or electrostrictive devices based on piezoelectric or electrostrictive films or coatings characterised by the underlying bases, e.g. substrates
    • H10N30/708Intermediate layers, e.g. barrier, adhesion or growth control buffer layers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/14Structure thereof only for on-demand ink jet heads
    • B41J2002/14459Matrix arrangement of the pressure chambers
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B41PRINTING; LINING MACHINES; TYPEWRITERS; STAMPS
    • B41JTYPEWRITERS; SELECTIVE PRINTING MECHANISMS, i.e. MECHANISMS PRINTING OTHERWISE THAN FROM A FORME; CORRECTION OF TYPOGRAPHICAL ERRORS
    • B41J2/00Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed
    • B41J2/005Typewriters or selective printing mechanisms characterised by the printing or marking process for which they are designed characterised by bringing liquid or particles selectively into contact with a printing material
    • B41J2/01Ink jet
    • B41J2/135Nozzles
    • B41J2/14Structure thereof only for on-demand ink jet heads
    • B41J2002/14491Electrical connection

Definitions

  • the present invention relates to a method of manufacturing a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and a thin film piezoelectric actuator manufactured by the manufacturing method.
  • an ink jet printer having an ink jet head having a plurality of channels for discharging liquid ink is known.
  • a two-dimensional image can be output to the recording medium.
  • Ink can be ejected using a pressure actuator (piezoelectric, electrostatic, thermal deformation, etc.) or by generating bubbles in the ink in the tube by heat.
  • the piezoelectric actuator has advantages such as high output, modulation, high responsiveness, and choice of ink, and has been frequently used in recent years.
  • Piezoelectric actuators include those using bulk piezoelectric materials and those using thin film piezoelectric materials (piezoelectric thin films). Since the former has a large output, large droplets can be discharged, but it is large and expensive. On the other hand, since the latter has a small output, the amount of droplets cannot be increased, but is small and low in cost. In order to realize a small, low-cost printer with high resolution (small droplets may be sufficient), it can be said that it is suitable to configure an actuator using a piezoelectric thin film.
  • a piezoelectric element having a structure in which a piezoelectric thin film is sandwiched between an upper electrode and a lower electrode is formed on a thin silicon (vibration plate) having a thickness of several microns.
  • a high frequency electric field of the order of kHz is applied to the piezoelectric element, and the piezoelectric thin film expands and contracts in the in-plane direction of the diaphragm due to the inverse piezoelectric effect, thereby displacing the diaphragm.
  • the volume of the pressure chamber in contact with the diaphragm changes, and ink in the pressure chamber can be ejected.
  • the above-mentioned piezoelectric thin film is formed on a silicon substrate by chemical film-forming methods such as CVD (Chemical Vapor Deposition), physical methods such as sputtering and ion plating, and liquid phase growth such as sol-gel methods. It is formed using a film process.
  • CVD Chemical Vapor Deposition
  • physical methods such as sputtering and ion plating
  • liquid phase growth such as sol-gel methods. It is formed using a film process.
  • a material of the piezoelectric thin film a crystal having a perovskite structure made of lead (Pb), zirconium (Zr), titanium (Ti), and oxygen (O) called PZT (lead zirconate titanate) is often used.
  • a piezoelectric thin film and electrodes (upper electrode and lower electrode) are formed on one surface side of the silicon substrate in the actuator, and functional parts such as an ink flow path and a pressure chamber are formed on the other surface side. These are formed by a highly accurate processing process using a semiconductor process technology such as photolithography.
  • the portion of the silicon substrate that forms the upper wall of the pressure chamber constitutes the diaphragm described above.
  • a plurality of piezoelectric elements are arranged at a high density on a relatively large silicon wafer having a diameter of 6 inches or a diameter of 8 inches, a plurality of actuators are collectively formed, and then the silicon wafer is divided into pieces.
  • the cost can be significantly reduced as compared with single wafer manufacturing in which actuators are manufactured individually.
  • Patent Documents 1 and 2 disclose a technique for dividing a wafer having a thin portion.
  • a protective film is attached to a thin portion of a wafer via a resist, and then the wafer is cut and cut and divided by a dicing apparatus.
  • Patent Document 2 a wafer and a hard substrate are bonded together with a resist, and a thin portion and a divided groove are simultaneously formed by dry etching, and then a wafer portion remaining in the divided groove, that is, a lower portion of the divided groove is sharpened. It is ruptured with a blade (for example, razor), and then dipped in acetone to remove the resist and collect the hard substrate and each chip.
  • a blade for example, razor
  • Japanese Patent Laying-Open No. 2005-197436 (refer to claim 1, paragraphs [0010] to [0018], FIG. 1, etc.)
  • Japanese Patent Laid-Open No. 2006-32716 (see claims 1, 2, 4, paragraphs [0020] to [0023], FIGS. 5 to 8 etc.)
  • Patent Document 2 discloses that the resist for bonding the wafer and the hard substrate is desirably thin in consideration of heat dissipation.
  • a step corresponding to the thickness of the piezoelectric element occurs on one surface side of the substrate, that is, the side where the piezoelectric element is formed.
  • a step corresponding to the thickness of the piezoelectric element is generated on the surface of the resist.
  • air bubbles
  • heat distribution occurs in the wafer during dry etching when forming the thin portion.
  • the accuracy of dry etching is reduced, and it is difficult to accurately form the thin portion.
  • the present invention has been made to solve the above-described problems, and its purpose is to reduce the breakage of the diaphragm and improve the yield in manufacturing individual thin film piezoelectric actuators by dividing the substrate.
  • Another object of the present invention is to provide a method for manufacturing a thin film piezoelectric actuator capable of accurately forming a diaphragm and a thin film piezoelectric actuator manufactured by the manufacturing method.
  • a manufacturing method of a thin film piezoelectric actuator is a manufacturing method of a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and an electrode and a piezoelectric are formed on one surface of the substrate.
  • Patterning and forming a piezoelectric element including a thin film, patterning and forming a first dividing groove for dividing the substrate on one surface side of the substrate by dry etching, and on one surface of the substrate
  • a diaphragm positioned corresponding to the piezoelectric element and a second divided groove positioned corresponding to the first divided groove are patterned.
  • a step of forming a second resist for annealing and the substrate is dry-etched from the other surface side using the second resist as a mask, thereby connecting the diaphragm and the first dividing groove. And simultaneously forming the second dividing groove penetrating therethrough.
  • the substrate Since the substrate is divided by forming the first and second dividing grooves in the substrate by dry etching, the substrate can be divided without damaging the diaphragm due to mechanical processing such as dicing. Thereby, the breakage of the diaphragm at the time of dividing the substrate can be reduced and the yield can be improved.
  • the surface of the 1st resist is flat when affixing a film base material on a 1st resist, it can affix without entraining a bubble. Thereby, in dry etching at the time of forming the diaphragm, it is possible to suppress the heat distribution from being generated in the substrate due to the bubbles and to reduce the accuracy of the dry etching, and the diaphragm can be formed with high accuracy.
  • FIG. 1 is a plan view showing a schematic configuration of a thin film piezoelectric actuator according to an embodiment of the present invention, and a cross-sectional view taken along line A-A ′ in the plan view. It is sectional drawing which shows the manufacturing process of the said thin film piezoelectric actuator. It is sectional drawing which shows the manufacturing process of the said thin film piezoelectric actuator.
  • FIG. 10 is a cross-sectional view showing another configuration of the film base used, which is a part of the manufacturing process of the thin film piezoelectric actuator.
  • the numerical value range includes the values of the lower limit A and the upper limit B.
  • FIG. 1 is a plan view showing a schematic configuration of a thin film piezoelectric actuator (hereinafter also simply referred to as an actuator or a chip) of the present embodiment, and a sectional view taken along the line AA ′ in the plan view.
  • the thin film piezoelectric actuator 1 of this embodiment is configured by laminating a thermal oxide film 3, a lower electrode 4, a piezoelectric thin film 5, and an upper electrode 6 in this order on a substrate 2.
  • the substrate 2 has a pressure chamber 2a for containing ink. And the part which makes the upper wall of the pressure chamber 2a in the board
  • substrate 2 comprises the diaphragm 2b.
  • the thermal oxide film 3 is formed for the purpose of protecting and insulating the substrate 2.
  • the lower electrode 4, the piezoelectric thin film 5 and the upper electrode 6 constitute a piezoelectric element 7.
  • the piezoelectric thin film 5 When a driving signal (driving voltage) is supplied to the lower electrode 4 and the upper electrode 6 from a driving circuit (not shown), the piezoelectric thin film 5 is perpendicular to the thickness direction according to the potential difference between the lower electrode 4 and the upper electrode 6. Expands and contracts in one direction (direction parallel to the surface of the substrate 2). Then, due to the difference in length between the piezoelectric thin film 5 and the diaphragm 2b, a curvature is generated in the diaphragm 2b, and the diaphragm 2b is displaced (curved or vibrated) in the thickness direction.
  • FIG. 1 is cross-sectional views showing the manufacturing process of the thin film piezoelectric actuator 1.
  • the thin film piezoelectric actuator 1 is roughly manufactured through the following steps (1) to (16).
  • the steps (2) to (7) correspond to the step of patterning the piezoelectric element 7. Further, the steps (2) to (10) are performed on one surface side with respect to the substrate 2, and the steps (11) to (14) are performed on the other surface side with respect to the substrate 2.
  • Substrate preparation step (2) Lower electrode layer formation step (3) Piezoelectric thin film layer formation step (4) Upper electrode layer formation step (5) Upper electrode patterning step (6) Piezoelectric thin film patterning step (7) Lower electrode patterning Step (8) First division groove forming step (9) First resist forming step (10) Film substrate pasting step (11) Second resist forming step (12) Dry etching step 1 (13) Dry etching process 2 (14) Second resist removal step (15) Film substrate peeling step (16) First resist removal step
  • the substrate 2 is prepared.
  • the material of the substrate 2 is crystalline silicon (Si) that is widely used in MEMS (Micro Electro Mechanical Systems).
  • Si crystalline silicon
  • MEMS Micro Electro Mechanical Systems
  • two Si substrates 2c and 2e are bonded via an oxide film 2d made of SiO 2.
  • An SOI (Silicon on Insulator) structure is used.
  • the Si substrate 2c is also called a supporting silicon substrate
  • the oxide film 2d is also called an intermediate oxide film
  • the Si substrate 2e is also called a silicon device layer.
  • each of the Si substrate 2c, the oxide film 2d, and the Si substrate 2e can be changed depending on the design of the actuator.
  • the thickness of the Si substrate 2c is, for example, 600 ⁇ m
  • the thickness of the oxide film 2d is, for example, 0.5 ⁇ m
  • the thickness of the Si substrate 2e is, for example, 5 ⁇ m.
  • the substrate 2 may be a semiconductor substrate made of single crystal silicon.
  • thermal oxide film 3 made of SiO 2 is further formed on the Si substrate 2e of the substrate 2.
  • the thermal oxide film 3 is formed by thermally oxidizing the surface of the substrate 2.
  • the thickness of the thermal oxide film 3 is, for example, 0.1 ⁇ m.
  • Lower electrode layer forming step A lower electrode layer 4 a serving as a base of the lower electrode 4 is formed on the surface of the thermal oxide film 3.
  • the lower electrode layer 4a is formed by sequentially forming a titanium (Ti) layer and a platinum (Pt) layer from the thermal oxide film 3 side by sputtering.
  • the Ti layer is an adhesion layer provided in order to improve the adhesion between the Pt layer and the thermal oxide film 3, and has a thickness of about 10 nm, for example.
  • the adhesion layer may be composed of a titanium oxide (TiOx) layer.
  • the Pt layer has self-orientation and is oriented in the (111) direction with respect to the substrate 2.
  • the thickness of the Pt layer is, for example, about 100 nm.
  • the lower electrode layer 4a may be composed of three layers of Ti (for example, thickness 20 nm), Pt (for example, thickness 100 nm), and Ti (for example, thickness 10 nm).
  • Piezoelectric thin film layer forming step A piezoelectric thin film layer 5a made of lead zirconate titanate (PZT) is formed on the lower electrode layer 4a at a temperature of 600 ° C. by sputtering.
  • the thickness of the piezoelectric thin film layer 5a is, for example, 4 to 5 ⁇ m.
  • the ratio of Zr and Ti constituting PZT is around 52:48 constituting the MPB (Morphotropic Phase Boundary) composition.
  • the PZT film constituting the piezoelectric thin film layer 5a is preferably oriented at (100) of the perovskite layer that provides high piezoelectric characteristics.
  • a buffer layer for controlling the crystal orientation of the piezoelectric thin film layer 5a may be formed between the piezoelectric thin film layer 5a and the lower electrode layer 4a.
  • the buffer layer there are perovskite-type lead lanthanum titanate (PLT), strontium ruthenium oxide (SRO), strontium titanium oxide (STO), etc., and the (100) direction parallel to the substrate surface (laminated surface). It is desirable that it be oriented. Thereby, the growth of the (100) -oriented PZT film can be facilitated, and the (100) -oriented PZT film can be obtained more stably.
  • the piezoelectric thin film layer 5a formed in this way has a very high value of ⁇ 180 pm / V in the piezoelectric constant d 31 .
  • the upper electrode layer 6a is formed on the piezoelectric thin film layer 5a by sputtering.
  • the upper electrode layer 6a is formed by laminating a Ti layer and a gold (Au) layer.
  • the Ti layer is formed in order to improve the adhesion between the piezoelectric thin film layer 5a and the Au layer.
  • the thickness of the Ti layer is, for example, 0.01 ⁇ m, and the thickness of the Au layer is, for example, 0.2 ⁇ m.
  • Upper electrode patterning step A resist is applied on the upper electrode layer 6a by a spin coat method, a spray method, or the like, exposed and developed to form a mask pattern of the upper electrode 6, and then the upper electrode layer 6a. Is wet etched to form a pattern of the upper electrode 6.
  • Piezoelectric thin film patterning step A resist pattern is formed on the piezoelectric thin film layer 5a, and the piezoelectric thin film layer 5a is wet etched with a mixed etching solution such as hydrofluoric acid, hydrogen peroxide, hydrofluoric acid, etc. A pattern of the thin film 5 is formed.
  • the resist pattern has a circular portion having a diameter of 180 to 250 ⁇ m at a position corresponding to the pressure chamber, and the piezoelectric thin film 5 having a size corresponding to the circular portion is formed by patterning.
  • Lower electrode patterning step A resist is applied on the lower electrode layer 4a by a spin coat method, a spray method, or the like, exposed and developed to form a mask pattern of the lower electrode 4, and then the lower electrode layer 4a is formed.
  • the pattern of the lower electrode 4 is formed by wet etching or dry etching. Thereby, a piezoelectric element 7 composed of the lower electrode 4, the piezoelectric thin film 5 and the upper electrode 6 is formed.
  • First Divided Groove Forming Step A resist is applied on the substrate 2 by a spin coat method, a spray method, or the like, and exposure and development are performed to form a mask pattern of chip divided grooves. Thereafter, the outermost thermal oxide film 3 is etched using a gas such as trifluoromethane (CHF 3 ) by reactive ion etching which is a kind of dry etching, and then a gas such as sulfur hexafluoride (SF 6 ) is used. Then, the Si substrate 2e is etched. Thereby, the first division grooves 11 are formed at predetermined division positions of the substrate 2. The depth of the first dividing groove 11 is a depth corresponding to the thickness of the thermal oxide film 3 and the Si substrate 2e, and is, for example, 4 to 7 ⁇ m.
  • CHF 3 trifluoromethane
  • SF 6 sulfur hexafluoride
  • a first resist 12 is formed on the substrate 2 so as to cover the piezoelectric element 7 and the first dividing groove 11 and to flatten the surface.
  • the first resist 12 can be applied on the substrate 2 by a spin coating method, a spray method, or the like.
  • Concavities and convexities are formed on the surface of the substrate 2 by the formation of the piezoelectric elements 7 and the first dividing grooves 11, but the first resist 12 has a certain degree of flatness to cover the concavities and convexities. It is desirable to have a thickness (for example, 20 ⁇ m or more).
  • Shipley S1830 is suitable as the first resist 12.
  • the film substrate 13 is pasted on the first resist 12.
  • a film substrate with an adhesive layer (adhesive film) having an adhesive layer 13b on one side of the substrate 13a can be used.
  • a dicing tape or a back grind tape is suitable. What is necessary is just to cut the excess part (part protruded from the board
  • the film base 13 is difficult to peel off thereafter. It is desirable to use one having an adhesive layer 13b that is less adhesive than before peeling by heating or irradiation with light such as ultraviolet rays (UV).
  • a film substrate 13 for example, UDT-1005M3 manufactured by Denka Adtex can be used.
  • the film base material 13 on the first resist 12 for example, as described in Japanese Patent Application Laid-Open No. 2004-266183, the film base material is pressed with a roller or the like from the edge of the substrate.
  • a method of adhering or a method of adhering a film substrate in a vacuum atmosphere as described in JP-A No. 2001-210701 is suitable. By these methods, it is possible to reduce entrainment of air (bubbles) between the first resist 12 and the film substrate 13.
  • Second resist formation step On the surface of the substrate 2 opposite to the side on which the piezoelectric element 7 is formed, the diaphragm 2b positioned corresponding to the piezoelectric element 7 and the first dividing groove 11 are provided.
  • a second resist 22 is formed for patterning the second dividing groove 21 positioned at the same position. That is, a resist for patterning the diaphragm 2b and the second dividing groove 21 by applying the second resist 22 on the surface by a spin coat method, a spray method or the like, and performing exposure and development. Form a pattern.
  • the second resist 22 may include an ink flow path pattern.
  • the diaphragm 2 b is positioned corresponding to the piezoelectric element 7” means that the diaphragm 2 b is positioned below the piezoelectric element 7 (particularly the piezoelectric thin film 5), and corresponds to the first dividing groove 11.
  • the position of the second dividing groove 21 means that the second dividing groove 21 is located below the first dividing groove 11 (almost the same position in the in-plane direction of the substrate 2).
  • the substrate 2 is dry-etched from the above surface side, so that the diaphragm 2b and the second divided groove 21 that is connected to and penetrates the first divided groove 11 are formed at the same time.
  • This step is performed in the following two steps (12) and (13).
  • the Si substrate 2c is dry etched. That is, using the intermediate oxide film (oxide film 2d) as an etching stopper layer, the Si substrate 2c is deeply etched by a Bosch process (using SF 6 or C 4 F 8 as an etching gas) such as an ICP (Inductively Coupled Plasma) apparatus. Etching process.
  • a Bosch process using SF 6 or C 4 F 8 as an etching gas
  • ICP Inductively Coupled Plasma
  • the pressure chamber 2a and the diaphragm 2b are formed by etching, and at the same time, the second divided groove 21 is also formed.
  • the first dividing groove 11 is formed by etching the Si substrate 2e, and the first resist 12 is buried in the removed portion of the Si substrate 2e.
  • the oxide film 2d is removed by etching at the time of forming the first resist 12, the first resist 12 filling the first dividing groove 11 is exposed. That is, when the second divided groove 21 is formed by etching the Si substrate 2c and the oxide film 2d, the second divided groove 21 is connected to the first divided groove 11 and penetrates in the substrate thickness direction. Thereby, the board
  • substrate 2 is separated into pieces. At this point, each of the separated substrates 2 is supported by the film base material 13 via the first resist 12 and therefore does not come apart.
  • Second resist removal step While the divided individual substrates 2 are attached to the film base 13 via the first resist 12, the second resist 22 is used with a gas such as O 2 . Remove by dry etching.
  • Film substrate peeling step The film substrate 13 attached to the first resist 12 is peeled off. As described above, if a film substrate 13 that is made low in adhesiveness by UV irradiation or the like is used, the film substrate 13 can be easily peeled off by such UV irradiation. Even if the film substrate 13 is peeled off, the piezoelectric element 7 is protected by the first resist 12, so that the piezoelectric element 7 is scratched at the time of peeling, or the adhesive of the adhesive layer 13 b of the film substrate 13 is piezoelectric. It adheres to the element 7 and does not remain.
  • First resist removing step The first resist 12 is removed by dry etching using a gas such as O 2 . Thereby, the thin film piezoelectric actuator 1 corresponding to each substrate 2 is completed. At this time, the first resist 12 is dry-etched in a state where the divided individual substrates 2 are supported by the base of the dry etching apparatus (for example, ICP apparatus). The corresponding thin film piezoelectric actuator 1 is not scattered and does not interfere.
  • the first divided groove 11 and the second divided groove 21 are formed in the substrate 2 by dry etching to divide the substrate 2, so that the substrate is mechanically processed by dicing or the like.
  • the substrate 2 can be divided without damaging the diaphragm 2 b such as vibration.
  • it is possible to improve the yield by reducing the breakage of the diaphragm 2b at the time of dividing the substrate, and to reduce the manufacturing cost.
  • the surface of the first resist 12 is flat, so that the film base material 13 can be stuck without entraining bubbles.
  • heat distribution is generated in the substrate 2 during the subsequent dry etching in the steps (12) and (13), so that the etching accuracy is deteriorated. Resulting in.
  • the surface of the first resist 12 is flat and there is no bubble entrainment when the film base material 13 is attached, the etching accuracy is good and stable, and the diaphragm 2b is accurately formed. can do.
  • the first resist 12 is removed by dry etching after the film base material 13 is peeled off from the first resist 12, as described above, the individual substrates 2 are supported by the base of the dry etching apparatus.
  • the first resist 12 can be removed. Therefore, it is possible to reduce the damage of the diaphragm 2b due to the chips corresponding to the divided individual substrates 2 being scattered and interfering with each other when or after the first resist 12 is removed. Moreover, since each chip cannot be separated, handling of each chip is also facilitated. Furthermore, by removing the first resist 12 after the film substrate 13 is peeled off by a dry process, the diaphragm 2b is not stressed, and the diaphragm 2b is damaged when the first resist 12 is removed. Nor.
  • the film substrate 13 since the adhesive film 13b which has the adhesion layer 13b which becomes lower adhesion than before peeling by heating or light irradiation is used as the film substrate 13, the film substrate 13 is peeled from the first resist 12. It becomes easy and the workability
  • FIG. 4 is a cross-sectional view showing another configuration of the film substrate 13 to be used, which is a part of the manufacturing process of the thin film piezoelectric actuator 1.
  • the adhesive layer 13b attached to one side of the substrate 13a contains the thermal foam 31.
  • the thermal foam 31 is foamed by heating, so that the adhesive layer 13b is lower than before peeling. It may be a heat-foamed sheet that becomes sticky.
  • a film base 13 for example, TG-0330-6 and TG-0330-4 manufactured by Sumilon can be used.
  • the adhesive layer 13b has a two-layer structure. Thermal foam 31 is scattered in the first layer (first layer counted from the base 13a side) of the adhesive layer 13b, and in the second layer (second layer counted from the base 13a side), Non-adhesive layers 32 (olefin resin layers containing a surfactant) that are sufficiently thin with respect to the entire thickness of the adhesive layer 13b are dotted at a mixing rate of 10 to 75 wt%.
  • the blending ratio of the non-adhesive layer 32 may be larger than the blending ratio in the above-mentioned TG-0330-6 or TG-0330-4 manufactured by Sumilon.
  • the heat-foamed body 31 is foamed by heating, whereby the pressure-sensitive adhesive layer 13b is lowered and the pressure-sensitive adhesive force becomes almost zero. It becomes easy to peel the material 13, and workability
  • the thermal foam 31 is foamed, the film base 13 is relatively pushed up with respect to the substrate 2, so that the film base 13 can be easily peeled without applying a load to the substrate 2. Become.
  • the film base material 13 in which the thermal foam 31 is present in the adhesive layer 13b and the non-adhesive layer 32 is scattered on the surface layer portion of the adhesive layer 13b the film base material 13 is stress-free. Can be peeled off (without stressing the chip).
  • the manufacturing method of the thin film piezoelectric actuator applicable to the ink jet head has been described.
  • the manufacturing method of the present embodiment can be variously applied to the manufacture of a device using a piezoelectric element, for example, a thermal sensor or an ultrasonic wave. It can also be applied to the manufacture of devices such as sensors.
  • the manufacturing method of the thin film piezoelectric actuator of the present embodiment described above can be expressed as follows, and the following effects are obtained.
  • the manufacturing method of the thin film piezoelectric actuator of the present embodiment is a manufacturing method of a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and includes an electrode and a piezoelectric thin film on one surface of the substrate.
  • Patterning the piezoelectric element forming a first dividing groove for dividing the substrate on one surface side of the substrate by dry etching, forming the first dividing groove on one surface of the substrate, Forming a first resist for flattening the surface covering the piezoelectric element and the first dividing groove, a step of attaching a film base material on the first resist, and one surface of the substrate And patterning a diaphragm located corresponding to the piezoelectric element and a second divided groove located corresponding to the first divided groove on the other surface opposite to A second resist for forming the substrate, and dry etching the substrate from the other surface side using the second resist as a mask, thereby connecting the diaphragm and the first dividing groove. Forming the second dividing groove penetrating therethrough at the same time.
  • the piezoelectric element is formed on one surface side of the substrate, and the first division groove is formed by dry etching. Then, the diaphragm and the second divided groove are formed simultaneously by dry etching the substrate from the other surface side. At this time, since the second dividing groove is connected to the first dividing groove and penetrates the substrate, eventually, the substrate is along the first and second dividing grooves simultaneously with the formation of the diaphragm and the second dividing groove. And divided into individual thin film piezoelectric actuators (chips).
  • the substrate is not mechanically divided using a dicing device or a blade as in the past, but the substrate is divided by dry etching, so that damage caused by mechanical processing (vibration or water pressure of cutting water) ) Is not applied to the diaphragm.
  • mechanical processing vibration or water pressure of cutting water
  • a first resist is formed on one surface of the substrate so as to cover the piezoelectric element and the first dividing groove. Since the surface of this 1st resist is flat, when a film base material is affixed on this 1st resist, it can affix without enclosing a bubble. As a result, it is possible to suppress a decrease in the accuracy of dry etching caused by heat distribution in the substrate during dry etching when the diaphragm is formed, and the diaphragm can be formed with high accuracy.
  • the film base material is peeled off, and then the first resist is removed by dry etching. May further be included.
  • the film base material is peeled off, and the first resist is removed to obtain individual chips.
  • the first resist is removed by dry etching, it is possible to remove the first resist while supporting each chip on the base of the dry etching apparatus. Thereby, since the individual chips are not separated, the breakage of the diaphragm due to the interference (contact) between the chips can be reduced, and the handling of each chip is facilitated.
  • an adhesive film having an adhesive layer that becomes less adhesive at the time of peeling than before peeling by heating or light irradiation may be used.
  • the film base material pressure-sensitive adhesive film
  • a heat-foamed sheet having an adhesive layer that becomes less sticky than before peeling due to foaming of the heat-foamed material by heating at the time of peeling may be used.
  • the film substrate thermal foamed sheet
  • the film base material is relatively pushed up with respect to the substrate. Therefore, the film base material can be easily peeled without applying a load to the substrate.
  • the thin film piezoelectric actuator of the present embodiment described above is manufactured by the manufacturing method described above.
  • the present invention can be used for manufacturing devices such as an actuator of an inkjet head, a thermal sensor, and an ultrasonic sensor.

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Abstract

This method for manufacturing a thin film piezoelectric actuator has: a step for pattern-forming a piezoelectric element (7) on one surface of a substrate (2); a step for pattern-forming a first dividing trench (11) on the one surface side of the substrate (2) by means of dry etching; a step for forming a first resist (12) on the one surface of the substrate (2), said first resist planarizing a surface by covering the piezoelectric element (7) and the first dividing trench (11); a step for bonding a film base material on the first resist (12); a step for forming a second resist on the other surface of the substrate (2); and a step for forming, at one time, a diaphragm and a second dividing trench by dry-etching the substrate (2) from the other surface side using the second resist as a mask, said second dividing trench penetrating the substrate by being connected to the first dividing trench (11).

Description

薄膜圧電アクチュエータおよびその製造方法Thin film piezoelectric actuator and manufacturing method thereof
 本発明は、基板を分割して個々の薄膜圧電アクチュエータを製造する薄膜圧電アクチュエータの製造方法と、その製造方法によって製造された薄膜圧電アクチュエータとに関するものである。 The present invention relates to a method of manufacturing a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and a thin film piezoelectric actuator manufactured by the manufacturing method.
 従来から、液体インクを吐出する複数のチャネルを有するインクジェットヘッドを備えたインクジェットプリンタが知られている。用紙や布などの記録メディアに対してインクジェットヘッドを相対的に移動させながら、インクの吐出を制御することにより、記録メディアに対して二次元の画像を出力することができる。インクの吐出は、圧力式のアクチュエータ(圧電式、静電式、熱変形など)を利用したり、熱によって管内のインクに気泡を発生させることで行うことができる。中でも、圧電式のアクチュエータは、出力が大きい、変調が可能、応答性が高い、インクを選ばない、などの利点を有しており、近年よく利用されている。 Conventionally, an ink jet printer having an ink jet head having a plurality of channels for discharging liquid ink is known. By controlling the ejection of ink while moving the inkjet head relative to a recording medium such as paper or cloth, a two-dimensional image can be output to the recording medium. Ink can be ejected using a pressure actuator (piezoelectric, electrostatic, thermal deformation, etc.) or by generating bubbles in the ink in the tube by heat. Among them, the piezoelectric actuator has advantages such as high output, modulation, high responsiveness, and choice of ink, and has been frequently used in recent years.
 圧電式のアクチュエータには、バルク状の圧電体を用いたものと、薄膜の圧電体(圧電薄膜)を用いたものとがある。前者は出力が大きいため、大きな液滴を吐出することができるが、大型でコストが高い。これに対して、後者は出力が小さいため、液滴量は大きくできないが、小型でコストが低い。高解像度(小液滴で良い)で小型、低コストのプリンタを実現するには、圧電薄膜を用いてアクチュエータを構成することが適していると言える。 Piezoelectric actuators include those using bulk piezoelectric materials and those using thin film piezoelectric materials (piezoelectric thin films). Since the former has a large output, large droplets can be discharged, but it is large and expensive. On the other hand, since the latter has a small output, the amount of droplets cannot be increased, but is small and low in cost. In order to realize a small, low-cost printer with high resolution (small droplets may be sufficient), it can be said that it is suitable to configure an actuator using a piezoelectric thin film.
 アクチュエータに圧電薄膜を用いたインクジェットヘッドでは、厚さ数ミクロンのシリコン薄肉(振動板)上に、上部電極と下部電極とで圧電薄膜を挟んだ構造の圧電素子が形成される。この圧電素子にkHzオーダーの高周波の電界を印加し、圧電薄膜が逆圧電効果により振動板の面内方向に伸縮することで振動板が変位する。これにより、振動板に接する圧力室の容積が変化し、圧力室内のインクを吐出することが可能となる。 In an inkjet head using a piezoelectric thin film as an actuator, a piezoelectric element having a structure in which a piezoelectric thin film is sandwiched between an upper electrode and a lower electrode is formed on a thin silicon (vibration plate) having a thickness of several microns. A high frequency electric field of the order of kHz is applied to the piezoelectric element, and the piezoelectric thin film expands and contracts in the in-plane direction of the diaphragm due to the inverse piezoelectric effect, thereby displacing the diaphragm. As a result, the volume of the pressure chamber in contact with the diaphragm changes, and ink in the pressure chamber can be ejected.
 上記の圧電薄膜は、シリコン基板上に、CVD(Chemical Vapor  Deposition)法などの化学的成膜法、スパッタ法やイオンプレーティング法といった物理的な方法、ゾルゲル法などの液相成長、などの成膜プロセスを用いて形成される。圧電薄膜の材料としては、PZT(チタン酸ジルコン酸鉛)と呼ばれる鉛(Pb)、ジルコニウム(Zr)、チタン(Ti)、酸素(O)からなるペロブスカイト構造の結晶を用いることが多い。 The above-mentioned piezoelectric thin film is formed on a silicon substrate by chemical film-forming methods such as CVD (Chemical Vapor Deposition), physical methods such as sputtering and ion plating, and liquid phase growth such as sol-gel methods. It is formed using a film process. As a material of the piezoelectric thin film, a crystal having a perovskite structure made of lead (Pb), zirconium (Zr), titanium (Ti), and oxygen (O) called PZT (lead zirconate titanate) is often used.
 アクチュエータにおけるシリコン基板の一方の面側には、圧電薄膜および電極(上部電極、下部電極)が形成され、他方の面側には、インク流路および圧力室などの機能部が形成される。これらは、フォトリソグラフィーなどの半導体プロセス技術を用いた高精度な加工プロセスによりそれぞれ形成される。シリコン基板において圧力室の上壁をなす部分は、上述した振動板を構成する。 A piezoelectric thin film and electrodes (upper electrode and lower electrode) are formed on one surface side of the silicon substrate in the actuator, and functional parts such as an ink flow path and a pressure chamber are formed on the other surface side. These are formed by a highly accurate processing process using a semiconductor process technology such as photolithography. The portion of the silicon substrate that forms the upper wall of the pressure chamber constitutes the diaphragm described above.
 このとき、直径6インチや直径8インチといった比較的大きなシリコンウェハ上に複数の圧電素子を高密度に配置し、複数のアクチュエータを一括して形成した後、シリコンウェハを分割して個片化すれば、アクチュエータを個別に製造する枚葉製造に比べて、コストを大幅に低減することができる。 At this time, a plurality of piezoelectric elements are arranged at a high density on a relatively large silicon wafer having a diameter of 6 inches or a diameter of 8 inches, a plurality of actuators are collectively formed, and then the silicon wafer is divided into pieces. For example, the cost can be significantly reduced as compared with single wafer manufacturing in which actuators are manufactured individually.
 薄肉部を有するウェハを分割する技術については、例えば特許文献1および2に開示されている。特許文献1では、ウェハの薄肉部にレジストを介して保護フィルムを貼り付け、その後、ウェハに切り込みを入れてダイシング装置により切断、分割するようにしている。また、特許文献2では、ウェハと硬質基板とをレジストで貼り合わせ、ドライエッチングによって薄肉部と分割溝とを同時に形成した後、分割溝に残ったウェハ部分、つまり、分割溝の下部を鋭利な刃物(例えばカミソリ)で破断し、その後、アセトンに浸してレジストを除去し、硬質基板と各チップとを回収するようにしている。 For example, Patent Documents 1 and 2 disclose a technique for dividing a wafer having a thin portion. In Patent Document 1, a protective film is attached to a thin portion of a wafer via a resist, and then the wafer is cut and cut and divided by a dicing apparatus. In Patent Document 2, a wafer and a hard substrate are bonded together with a resist, and a thin portion and a divided groove are simultaneously formed by dry etching, and then a wafer portion remaining in the divided groove, that is, a lower portion of the divided groove is sharpened. It is ruptured with a blade (for example, razor), and then dipped in acetone to remove the resist and collect the hard substrate and each chip.
特開2005-197436号公報(請求項1、段落〔0010〕~〔0018〕、図1等参照)Japanese Patent Laying-Open No. 2005-197436 (refer to claim 1, paragraphs [0010] to [0018], FIG. 1, etc.) 特開2006-32716号公報(請求項1、2、4、段落〔0020〕~〔0023〕、図5~図8等参照)Japanese Patent Laid-Open No. 2006-32716 (see claims 1, 2, 4, paragraphs [0020] to [0023], FIGS. 5 to 8 etc.)
 ところが、インクジェットヘッドのアクチュエータにおいて、厚さ数ミクロンしかないシリコン薄肉からなる振動板の機械的強度は非常に弱い。このため、上記した特許文献1または2の方法をアクチュエータの製造にそのまま利用すると、ウェハを分割して個片化する際に、振動板が破損し、歩留りが低下するという問題が生ずる。より詳しくは、特許文献1の方法を利用すると、ダイシング装置を用いてウェハを切断する際に、ブレードからの振動や切削水の水圧によって、薄肉部である振動板が破損する。また、特許文献2の方法を利用すると、分割溝に残ったウェハ部分を鋭利な刃物で機械的に切断する際の振動により、振動板が破損する。 However, in the inkjet head actuator, the mechanical strength of the diaphragm made of thin silicon having a thickness of only a few microns is very weak. For this reason, if the above-described method of Patent Document 1 or 2 is used as it is for manufacturing an actuator, there arises a problem that when the wafer is divided into individual pieces, the diaphragm is damaged and the yield is lowered. More specifically, when the method disclosed in Patent Document 1 is used, when the wafer is cut using a dicing apparatus, the vibration plate, which is a thin-walled portion, is damaged by vibration from the blade and the hydraulic pressure of the cutting water. Further, when the method of Patent Document 2 is used, the diaphragm is damaged by vibration when the wafer portion remaining in the dividing groove is mechanically cut with a sharp blade.
 また、特許文献2では、ウェハと硬質基板とを貼り合わせるレジストは、放熱を考慮して薄くすることが望ましいことが開示されている。しかし、インクジェットヘッドのアクチュエータにおいては、基板の一方の面側、すなわち、圧電素子が形成される側に、圧電素子の厚み分の段差が生じる。このため、レジストの厚さを薄くすると、レジストの表面に圧電素子の厚さに対応する段差が生じる。この場合、レジストに硬質基板を貼り合わせる際に空気(気泡)を巻き込み、薄肉部形成時のドライエッチングにおいてウェハに熱分布が生じる。その結果、ドライエッチングの精度が低下し、薄肉部を精度よく形成することが困難となる。 Further, Patent Document 2 discloses that the resist for bonding the wafer and the hard substrate is desirably thin in consideration of heat dissipation. However, in the actuator of the ink jet head, a step corresponding to the thickness of the piezoelectric element occurs on one surface side of the substrate, that is, the side where the piezoelectric element is formed. For this reason, when the thickness of the resist is reduced, a step corresponding to the thickness of the piezoelectric element is generated on the surface of the resist. In this case, air (bubbles) is involved when the hard substrate is bonded to the resist, and heat distribution occurs in the wafer during dry etching when forming the thin portion. As a result, the accuracy of dry etching is reduced, and it is difficult to accurately form the thin portion.
 本発明は、上記の問題点を解決するためになされたもので、その目的は、基板を分割して個々の薄膜圧電アクチュエータを製造するにあたり、振動板の破損を低減して歩留りを向上させるとともに、振動板を精度よく形成することができる薄膜圧電アクチュエータの製造方法と、その製造方法によって製造された薄膜圧電アクチュエータとを提供することにある。 The present invention has been made to solve the above-described problems, and its purpose is to reduce the breakage of the diaphragm and improve the yield in manufacturing individual thin film piezoelectric actuators by dividing the substrate. Another object of the present invention is to provide a method for manufacturing a thin film piezoelectric actuator capable of accurately forming a diaphragm and a thin film piezoelectric actuator manufactured by the manufacturing method.
 本発明の一側面に係る薄膜圧電アクチュエータの製造方法は、基板を分割して個々の薄膜圧電アクチュエータを製造する薄膜圧電アクチュエータの製造方法であって、前記基板の一方の面上に、電極および圧電薄膜を含む圧電素子をパターニング形成する工程と、前記基板の一方の面側に、前記基板を分割するための第1の分割溝をドライエッチングによってパターニング形成する工程と、前記基板の一方の面上に、前記圧電素子および前記第1の分割溝を覆って表面を平坦化する第1のレジストを形成する工程と、前記第1のレジスト上に、フィルム基材を貼り付ける工程と、前記基板における一方の面とは反対側の他方の面上に、前記圧電素子に対応して位置する振動板と、前記第1の分割溝に対応して位置する第2の分割溝とをパターニングするための第2のレジストを形成する工程と、前記第2のレジストをマスクとして、前記基板を他方の面側からドライエッチングすることにより、前記振動板と、前記第1の分割溝とつながって貫通する前記第2の分割溝とを同時に形成する工程とを有している。 A manufacturing method of a thin film piezoelectric actuator according to one aspect of the present invention is a manufacturing method of a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and an electrode and a piezoelectric are formed on one surface of the substrate. Patterning and forming a piezoelectric element including a thin film, patterning and forming a first dividing groove for dividing the substrate on one surface side of the substrate by dry etching, and on one surface of the substrate A step of forming a first resist that covers the piezoelectric element and the first dividing groove and flattens the surface; a step of attaching a film base material on the first resist; and On the other surface opposite to the one surface, a diaphragm positioned corresponding to the piezoelectric element and a second divided groove positioned corresponding to the first divided groove are patterned. A step of forming a second resist for annealing, and the substrate is dry-etched from the other surface side using the second resist as a mask, thereby connecting the diaphragm and the first dividing groove. And simultaneously forming the second dividing groove penetrating therethrough.
 ドライエッチングによって基板に第1および第2の分割溝を形成して基板を分割するため、ダイシング等による機械的加工によるダメージを振動板に与えることなく基板を分割できる。これにより、基板分割時の振動板の破損を低減して歩留りを向上させることができる。また、第1のレジスト上にフィルム基材を貼り付ける際に、第1のレジストの表面が平坦であるため、気泡を巻き込むことなく貼り付けることができる。これにより、振動板形成時のドライエッチングにおいて、上記気泡によって基板に熱分布が生じてドライエッチングの精度が低下するのを抑えることができ、振動板を精度よく形成することができる。 Since the substrate is divided by forming the first and second dividing grooves in the substrate by dry etching, the substrate can be divided without damaging the diaphragm due to mechanical processing such as dicing. Thereby, the breakage of the diaphragm at the time of dividing the substrate can be reduced and the yield can be improved. Moreover, since the surface of the 1st resist is flat when affixing a film base material on a 1st resist, it can affix without entraining a bubble. Thereby, in dry etching at the time of forming the diaphragm, it is possible to suppress the heat distribution from being generated in the substrate due to the bubbles and to reduce the accuracy of the dry etching, and the diaphragm can be formed with high accuracy.
本発明の実施の一形態に係る薄膜圧電アクチュエータの概略の構成を示す平面図と、その平面図におけるA-A’線矢視断面図である。1 is a plan view showing a schematic configuration of a thin film piezoelectric actuator according to an embodiment of the present invention, and a cross-sectional view taken along line A-A ′ in the plan view. 上記薄膜圧電アクチュエータの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the said thin film piezoelectric actuator. 上記薄膜圧電アクチュエータの製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the said thin film piezoelectric actuator. 上記薄膜圧電アクチュエータの製造工程の一部であって、用いるフィルム基材の他の構成を示す断面図である。FIG. 10 is a cross-sectional view showing another configuration of the film base used, which is a part of the manufacturing process of the thin film piezoelectric actuator.
 本発明の実施の一形態について、図面に基づいて説明すれば、以下の通りである。なお、本明細書において、数値範囲をA~Bと表記した場合、その数値範囲に下限Aおよび上限Bの値は含まれるものとする。 An embodiment of the present invention will be described below with reference to the drawings. In this specification, when the numerical range is expressed as A to B, the numerical value range includes the values of the lower limit A and the upper limit B.
 〔薄膜圧電アクチュエータの構成〕
 図1は、本実施形態の薄膜圧電アクチュエータ(以下、単にアクチュエータまたはチップとも称する)の概略の構成を示す平面図と、その平面図におけるA-A’線矢視断面図とを併せて示したものである。本実施形態の薄膜圧電アクチュエータ1は、基板2上に、熱酸化膜3、下部電極4、圧電薄膜5、上部電極6をこの順で積層して構成されている。
[Configuration of thin film piezoelectric actuator]
FIG. 1 is a plan view showing a schematic configuration of a thin film piezoelectric actuator (hereinafter also simply referred to as an actuator or a chip) of the present embodiment, and a sectional view taken along the line AA ′ in the plan view. Is. The thin film piezoelectric actuator 1 of this embodiment is configured by laminating a thermal oxide film 3, a lower electrode 4, a piezoelectric thin film 5, and an upper electrode 6 in this order on a substrate 2.
 基板2には、インクを収容するための圧力室2aが形成されている。そして、基板2において圧力室2aの上壁をなす部分が、振動板2bを構成している。熱酸化膜3は、基板2の保護および絶縁の目的で形成されている。下部電極4、圧電薄膜5および上部電極6は、圧電素子7を構成している。 The substrate 2 has a pressure chamber 2a for containing ink. And the part which makes the upper wall of the pressure chamber 2a in the board | substrate 2 comprises the diaphragm 2b. The thermal oxide film 3 is formed for the purpose of protecting and insulating the substrate 2. The lower electrode 4, the piezoelectric thin film 5 and the upper electrode 6 constitute a piezoelectric element 7.
 下部電極4および上部電極6に、図示しない駆動回路から駆動信号(駆動電圧)が供給されると、圧電薄膜5が、下部電極4と上部電極6との電位差に応じて、厚さ方向に垂直な方向(基板2の面に平行な方向)に伸縮する。そして、圧電薄膜5と振動板2bとの長さの違いにより、振動板2bに曲率が生じ、振動板2bが厚さ方向に変位(湾曲、振動)する。 When a driving signal (driving voltage) is supplied to the lower electrode 4 and the upper electrode 6 from a driving circuit (not shown), the piezoelectric thin film 5 is perpendicular to the thickness direction according to the potential difference between the lower electrode 4 and the upper electrode 6. Expands and contracts in one direction (direction parallel to the surface of the substrate 2). Then, due to the difference in length between the piezoelectric thin film 5 and the diaphragm 2b, a curvature is generated in the diaphragm 2b, and the diaphragm 2b is displaced (curved or vibrated) in the thickness direction.
 したがって、圧力室2a内にインクを収容しておけば、上述した振動板2bの振動により、圧力室2a内のインクに圧力波が伝搬され、圧力室2a内のインクが吐出孔(図示せず)からインク滴として外部に吐出される。 Therefore, if the ink is stored in the pressure chamber 2a, a pressure wave is propagated to the ink in the pressure chamber 2a due to the vibration of the vibration plate 2b described above, and the ink in the pressure chamber 2a is ejected (not shown). ) To the outside as ink droplets.
 〔薄膜圧電アクチュエータの製造方法〕
 次に、薄膜圧電アクチュエータ1の製造方法について説明する。図2および図3は、薄膜圧電アクチュエータ1の製造工程を示す断面図である。薄膜圧電アクチュエータ1は、大まかに以下の(1)~(16)の工程を経て製造される。なお、(2)~(7)の工程は、圧電素子7をパターニング形成する工程に対応する。また、(2)~(10)の工程は、基板2に対して一方の面側で行われ、(11)~(14)の工程は、基板2に対して他方の面側で行われる。
[Manufacturing method of thin film piezoelectric actuator]
Next, a method for manufacturing the thin film piezoelectric actuator 1 will be described. 2 and 3 are cross-sectional views showing the manufacturing process of the thin film piezoelectric actuator 1. The thin film piezoelectric actuator 1 is roughly manufactured through the following steps (1) to (16). The steps (2) to (7) correspond to the step of patterning the piezoelectric element 7. Further, the steps (2) to (10) are performed on one surface side with respect to the substrate 2, and the steps (11) to (14) are performed on the other surface side with respect to the substrate 2.
 (1)基板準備工程
 (2)下部電極層形成工程
 (3)圧電薄膜層形成工程
 (4)上部電極層形成工程
 (5)上部電極パターニング工程
 (6)圧電薄膜パターニング工程
 (7)下部電極パターニング工程
 (8)第1の分割溝形成工程
 (9)第1のレジスト形成工程
 (10)フィルム基材貼付工程
 (11)第2のレジスト形成工程
 (12)ドライエッチング工程1
 (13)ドライエッチング工程2
 (14)第2のレジスト除去工程
 (15)フィルム基材剥離工程
 (16)第1のレジスト除去工程
(1) Substrate preparation step (2) Lower electrode layer formation step (3) Piezoelectric thin film layer formation step (4) Upper electrode layer formation step (5) Upper electrode patterning step (6) Piezoelectric thin film patterning step (7) Lower electrode patterning Step (8) First division groove forming step (9) First resist forming step (10) Film substrate pasting step (11) Second resist forming step (12) Dry etching step 1
(13) Dry etching process 2
(14) Second resist removal step (15) Film substrate peeling step (16) First resist removal step
 以下、上記(1)~(16)の各工程の詳細について説明する。 Hereinafter, the details of the steps (1) to (16) will be described.
 (1)基板準備工程
 まず、基板2を用意する。基板2の材料は、MEMS(Micro  Electro Mechanical Systems)に多く利用されている結晶シリコン(Si)であり、ここでは、SiO2からなる酸化膜2dを介して2枚のSi基板2c・2eが接合されたSOI(Silicon  on  Insulator)構造のものを用いる。Si基板2cは支持シリコン基板とも呼ばれ、酸化膜2dは中間酸化膜とも呼ばれ、Si基板2eはシリコンデバイス層とも呼ばれる。
(1) Substrate preparation process First, the substrate 2 is prepared. The material of the substrate 2 is crystalline silicon (Si) that is widely used in MEMS (Micro Electro Mechanical Systems). Here, two Si substrates 2c and 2e are bonded via an oxide film 2d made of SiO 2. An SOI (Silicon on Insulator) structure is used. The Si substrate 2c is also called a supporting silicon substrate, the oxide film 2d is also called an intermediate oxide film, and the Si substrate 2e is also called a silicon device layer.
 Si基板2c、酸化膜2d、Si基板2eのそれぞれの厚さは、アクチュエータの設計により変更することが可能である。本実施形態では、Si基板2cの厚さは例えば600μmであり、酸化膜2dの厚さは例えば0.5μmであり、Si基板2eの厚さは例えば5μmである。なお、基板2は、単結晶シリコンからなる半導体基板であってもよい。 The thickness of each of the Si substrate 2c, the oxide film 2d, and the Si substrate 2e can be changed depending on the design of the actuator. In the present embodiment, the thickness of the Si substrate 2c is, for example, 600 μm, the thickness of the oxide film 2d is, for example, 0.5 μm, and the thickness of the Si substrate 2e is, for example, 5 μm. The substrate 2 may be a semiconductor substrate made of single crystal silicon.
 基板2のSi基板2eの上には、さらにSiO2からなる熱酸化膜3が形成されている。この熱酸化膜3は、基板2の表面を熱酸化することによって形成される。熱酸化膜3の厚さは例えば0.1μmである。 On the Si substrate 2e of the substrate 2, a thermal oxide film 3 made of SiO 2 is further formed. The thermal oxide film 3 is formed by thermally oxidizing the surface of the substrate 2. The thickness of the thermal oxide film 3 is, for example, 0.1 μm.
 (2)下部電極層形成工程
 熱酸化膜3の表面に下部電極4の元となる下部電極層4aを形成する。下部電極層4aは、熱酸化膜3側から、チタン(Ti)の層と白金(Pt)の層とをスパッタによって順に成膜して構成されている。Ti層は、Pt層と熱酸化膜3との密着性を向上させるために設けられた密着層であり、例えば膜厚10nm程度である。なお、密着層は、酸化チタン(TiOx)の層で構成されてもよい。Pt層は、自己配向性を有しており、基板2に対して(111)方向に配向している。Pt層の厚さは、例えば100nm程度である。なお、下部電極層4aは、Ti(例えば厚さ20nm)、Pt(例えば厚さ100nm)、Ti(例えば厚さ10nm)の3層で構成されていてもよい。
(2) Lower electrode layer forming step A lower electrode layer 4 a serving as a base of the lower electrode 4 is formed on the surface of the thermal oxide film 3. The lower electrode layer 4a is formed by sequentially forming a titanium (Ti) layer and a platinum (Pt) layer from the thermal oxide film 3 side by sputtering. The Ti layer is an adhesion layer provided in order to improve the adhesion between the Pt layer and the thermal oxide film 3, and has a thickness of about 10 nm, for example. The adhesion layer may be composed of a titanium oxide (TiOx) layer. The Pt layer has self-orientation and is oriented in the (111) direction with respect to the substrate 2. The thickness of the Pt layer is, for example, about 100 nm. The lower electrode layer 4a may be composed of three layers of Ti (for example, thickness 20 nm), Pt (for example, thickness 100 nm), and Ti (for example, thickness 10 nm).
 (3)圧電薄膜層形成工程
 下部電極層4a上に、チタン酸ジルコン酸鉛(PZT)からなる圧電薄膜層5aをスパッタ法により600℃の温度で成膜する。圧電薄膜層5aの厚さは、例えば4~5μmである。このとき、PZTを構成するZrとTiの比は、MPB(Morphotropic Phase  Boundary)組成を構成する52:48付近であることが望ましい。また、圧電薄膜層5aを構成するPZT膜は、高い圧電特性が得られるペロブスカイト層の(100)に配向していることが望ましい。
(3) Piezoelectric thin film layer forming step A piezoelectric thin film layer 5a made of lead zirconate titanate (PZT) is formed on the lower electrode layer 4a at a temperature of 600 ° C. by sputtering. The thickness of the piezoelectric thin film layer 5a is, for example, 4 to 5 μm. At this time, it is desirable that the ratio of Zr and Ti constituting PZT is around 52:48 constituting the MPB (Morphotropic Phase Boundary) composition. In addition, the PZT film constituting the piezoelectric thin film layer 5a is preferably oriented at (100) of the perovskite layer that provides high piezoelectric characteristics.
 なお、圧電薄膜層5aと下部電極層4aとの間に、圧電薄膜層5aの結晶配向性を制御するためのバッファ層を形成してもよい。バッファ層としては、ペロブスカイト型のチタン酸ランタン鉛(PLT)や、酸化ストロンチウムルテニウム(SRO)、酸化ストロンチウムチタン(STO)等があり、基板面(積層面)に対して平行な(100)方向に配向していることが望ましい。これにより、(100)配向のPZT膜の成長を容易にでき、(100)配向のPZT膜をより安定して得ることができる。このようにして形成される圧電薄膜層5aは、圧電定数d31において、-180pm/Vと非常に高い値が得られる。 A buffer layer for controlling the crystal orientation of the piezoelectric thin film layer 5a may be formed between the piezoelectric thin film layer 5a and the lower electrode layer 4a. As the buffer layer, there are perovskite-type lead lanthanum titanate (PLT), strontium ruthenium oxide (SRO), strontium titanium oxide (STO), etc., and the (100) direction parallel to the substrate surface (laminated surface). It is desirable that it be oriented. Thereby, the growth of the (100) -oriented PZT film can be facilitated, and the (100) -oriented PZT film can be obtained more stably. The piezoelectric thin film layer 5a formed in this way has a very high value of −180 pm / V in the piezoelectric constant d 31 .
 (4)上部電極層形成工程
 圧電薄膜層5a上に、スパッタ法により、上部電極層6aを形成する。上部電極層6aは、Ti層と金(Au)の層とを積層して構成される。Ti層は、圧電薄膜層5aとAu層との密着性を向上させるために形成されている。Ti層の厚さは例えば0.01μmであり、Au層の厚さは例えば0.2μmである。
(4) Upper electrode layer forming step The upper electrode layer 6a is formed on the piezoelectric thin film layer 5a by sputtering. The upper electrode layer 6a is formed by laminating a Ti layer and a gold (Au) layer. The Ti layer is formed in order to improve the adhesion between the piezoelectric thin film layer 5a and the Au layer. The thickness of the Ti layer is, for example, 0.01 μm, and the thickness of the Au layer is, for example, 0.2 μm.
 (5)上部電極パターニング工程
 上部電極層6aの上に、レジストをスピンコート法やスプレー法等で塗布して、露光、現像を行い、上部電極6のマスクパターンを形成した後、上部電極層6aをウェットエッチングし、上部電極6のパターンを形成する。
(5) Upper electrode patterning step A resist is applied on the upper electrode layer 6a by a spin coat method, a spray method, or the like, exposed and developed to form a mask pattern of the upper electrode 6, and then the upper electrode layer 6a. Is wet etched to form a pattern of the upper electrode 6.
 (6)圧電薄膜パターニング工程
 圧電薄膜層5aの上にレジストパターンを形成し、フッ硝酸、過酸化水素水、フッ酸等の混合エッチング液で圧電薄膜層5aをウェットエッチングして、PZTからなる圧電薄膜5のパターンを形成する。上記のレジストパターンは、圧力室に対応する位置に、直径180~250μmの円形部を有しており、この円形部に対応した大きさの圧電薄膜5がパターニング形成されることになる。
(6) Piezoelectric thin film patterning step A resist pattern is formed on the piezoelectric thin film layer 5a, and the piezoelectric thin film layer 5a is wet etched with a mixed etching solution such as hydrofluoric acid, hydrogen peroxide, hydrofluoric acid, etc. A pattern of the thin film 5 is formed. The resist pattern has a circular portion having a diameter of 180 to 250 μm at a position corresponding to the pressure chamber, and the piezoelectric thin film 5 having a size corresponding to the circular portion is formed by patterning.
 (7)下部電極パターニング工程
 下部電極層4a上に、レジストをスピンコート法やスプレー法等で塗布して、露光、現像を行い、下部電極4のマスクパターンを形成した後、下部電極層4aをウェットエッチングまたはドライエッチングし、下部電極4のパターンを形成する。これにより、下部電極4、圧電薄膜5および上部電極6からなる圧電素子7が形成される。
(7) Lower electrode patterning step A resist is applied on the lower electrode layer 4a by a spin coat method, a spray method, or the like, exposed and developed to form a mask pattern of the lower electrode 4, and then the lower electrode layer 4a is formed. The pattern of the lower electrode 4 is formed by wet etching or dry etching. Thereby, a piezoelectric element 7 composed of the lower electrode 4, the piezoelectric thin film 5 and the upper electrode 6 is formed.
 (8)第1の分割溝形成工程
 基板2上にレジストをスピンコート法やスプレー法等で塗布して、露光、現像を行い、チップ分割溝のマスクパターンを形成する。その後、ドライエッチングの一種である反応性イオンエッチングにより、トリフルオロメタン(CHF3)等のガスを用いて最表面の熱酸化膜3をエッチングし、次いで六フッ化硫黄(SF6)等のガスを用いてSi基板2eをエッチングする。これにより、基板2の所定の分割位置に、第1の分割溝11が形成される。第1の分割溝11の深さは、熱酸化膜3とSi基板2eの厚さに応じた深さであり、例えば4~7μmである。
(8) First Divided Groove Forming Step A resist is applied on the substrate 2 by a spin coat method, a spray method, or the like, and exposure and development are performed to form a mask pattern of chip divided grooves. Thereafter, the outermost thermal oxide film 3 is etched using a gas such as trifluoromethane (CHF 3 ) by reactive ion etching which is a kind of dry etching, and then a gas such as sulfur hexafluoride (SF 6 ) is used. Then, the Si substrate 2e is etched. Thereby, the first division grooves 11 are formed at predetermined division positions of the substrate 2. The depth of the first dividing groove 11 is a depth corresponding to the thickness of the thermal oxide film 3 and the Si substrate 2e, and is, for example, 4 to 7 μm.
 (9)第1のレジスト形成工程
 基板2上に、圧電素子7および第1の分割溝11を覆って表面を平坦化する第1のレジスト12を形成する。第1のレジスト12は、スピンコート法やスプレー法などで基板2上に塗布することができる。圧電素子7および第1の分割溝11の形成によって基板2の表面には凹凸(段差)が形成されるが、第1のレジスト12は、上記凹凸を覆って表面を平坦化するために、ある程度の厚み(例えば20μm以上)を有していることが望ましい。第1のレジスト12としては、例えばシプレー社S1830などが適している。
(9) First Resist Forming Step A first resist 12 is formed on the substrate 2 so as to cover the piezoelectric element 7 and the first dividing groove 11 and to flatten the surface. The first resist 12 can be applied on the substrate 2 by a spin coating method, a spray method, or the like. Concavities and convexities (steps) are formed on the surface of the substrate 2 by the formation of the piezoelectric elements 7 and the first dividing grooves 11, but the first resist 12 has a certain degree of flatness to cover the concavities and convexities. It is desirable to have a thickness (for example, 20 μm or more). For example, Shipley S1830 is suitable as the first resist 12.
 (10)フィルム基材貼付工程
 第1のレジスト12上に、フィルム基材13を貼り付ける。フィルム基材13としては、基体13aの片面に粘着層13bが付いた粘着層付きフィルム基材(粘着フィルム)を用いることができ、例えばダイシングテープやバックグラインドテープなどが適している。フィルム基材13の余分な部分(基板2からはみ出た部分)は、カッターなどでカットすればよい。また、予め基板2の大きさに合わせてフィルム基材13をカットしておいてもよい。
(10) Film substrate pasting step The film substrate 13 is pasted on the first resist 12. As the film substrate 13, a film substrate with an adhesive layer (adhesive film) having an adhesive layer 13b on one side of the substrate 13a can be used. For example, a dicing tape or a back grind tape is suitable. What is necessary is just to cut the excess part (part protruded from the board | substrate 2) of the film base material 13 with a cutter. Further, the film base 13 may be cut in advance according to the size of the substrate 2.
 ここで、第1のレジスト12とフィルム基材13の粘着層13bとの密着性が良好であると、その後、フィルム基材13の剥離がしにくくなるため、フィルム基材13としては、剥離時に、加熱または紫外線(UV)などの光照射によって剥離前よりも低粘着化する粘着層13bを有するものを用いることが望ましい。このようなフィルム基材13としては、例えばデンカアドテックス製のUDT-1005M3を用いることができる。 Here, when the adhesion between the first resist 12 and the adhesive layer 13b of the film base 13 is good, the film base 13 is difficult to peel off thereafter. It is desirable to use one having an adhesive layer 13b that is less adhesive than before peeling by heating or irradiation with light such as ultraviolet rays (UV). As such a film substrate 13, for example, UDT-1005M3 manufactured by Denka Adtex can be used.
 また、第1のレジスト12上にフィルム基材13を貼り付ける方法としては、例えば、特開2004-266183号公報に記載のように、基板の端部からローラー等で押圧しながらフィルム基材を貼り付ける方法や、特開2001-210701号公報に記載のように、真空雰囲気下でフィルム基材を貼り付ける方法が適している。これらの方法により、第1のレジスト12とフィルム基材13との間に空気(気泡)が巻き込まれるのを低減することができる。 In addition, as a method for attaching the film base material 13 on the first resist 12, for example, as described in Japanese Patent Application Laid-Open No. 2004-266183, the film base material is pressed with a roller or the like from the edge of the substrate. A method of adhering or a method of adhering a film substrate in a vacuum atmosphere as described in JP-A No. 2001-210701 is suitable. By these methods, it is possible to reduce entrainment of air (bubbles) between the first resist 12 and the film substrate 13.
 (11)第2のレジスト形成工程
 基板2における圧電素子7の形成側とは反対側の面上に、圧電素子7に対応して位置する振動板2bと、第1の分割溝11に対応して位置する第2の分割溝21とをパターニングするための第2のレジスト22を形成する。つまり、上記面上に、第2のレジスト22をスピンコート法やスプレー法等で塗布して、露光、現像を行うことにより、振動板2bおよび第2の分割溝21をパターニング形成するためのレジストパターンを形成する。このとき、第2のレジスト22は、インク流路のパターンを含んでいてもよい。
(11) Second resist formation step On the surface of the substrate 2 opposite to the side on which the piezoelectric element 7 is formed, the diaphragm 2b positioned corresponding to the piezoelectric element 7 and the first dividing groove 11 are provided. A second resist 22 is formed for patterning the second dividing groove 21 positioned at the same position. That is, a resist for patterning the diaphragm 2b and the second dividing groove 21 by applying the second resist 22 on the surface by a spin coat method, a spray method or the like, and performing exposure and development. Form a pattern. At this time, the second resist 22 may include an ink flow path pattern.
 なお、圧電素子7に対応して振動板2bが位置するとは、圧電素子7(特に圧電薄膜5)の下方に振動板2bが位置することを意味し、第1の分割溝11に対応して第2の分割溝21が位置するとは、第1の分割溝11の下方に第2の分割溝21が位置する(基板2の面内方向においてほぼ同じ位置である)ことを意味する。 The phrase “the diaphragm 2 b is positioned corresponding to the piezoelectric element 7” means that the diaphragm 2 b is positioned below the piezoelectric element 7 (particularly the piezoelectric thin film 5), and corresponds to the first dividing groove 11. The position of the second dividing groove 21 means that the second dividing groove 21 is located below the first dividing groove 11 (almost the same position in the in-plane direction of the substrate 2).
 次に、基板2を上記面側からドライエッチングすることにより、振動板2bと、第1の分割溝11とつながって貫通する第2の分割溝21とを同時に形成する。この工程は、以下の(12)および(13)の2段階の工程で行われる。 Next, the substrate 2 is dry-etched from the above surface side, so that the diaphragm 2b and the second divided groove 21 that is connected to and penetrates the first divided groove 11 are formed at the same time. This step is performed in the following two steps (12) and (13).
 (12)ドライエッチング工程1
 第2のレジスト22をマスクとして、Si基板2cをドライエッチングする。つまり、中間酸化膜(酸化膜2d)をエッチングストッパー層として利用し、ICP(Inductively  Coupled Plasma)装置等のボッシュプロセス(エッチングガスとしてSF6、C48を使用)により、Si基板2cを深堀エッチング加工する。
(12) Dry etching process 1
Using the second resist 22 as a mask, the Si substrate 2c is dry etched. That is, using the intermediate oxide film (oxide film 2d) as an etching stopper layer, the Si substrate 2c is deeply etched by a Bosch process (using SF 6 or C 4 F 8 as an etching gas) such as an ICP (Inductively Coupled Plasma) apparatus. Etching process.
 (13)ドライエッチング工程2
 露出した中間酸化膜(酸化膜2d)を、CHF3等のガスを用いたRIE(Reactive Ion  Etching)等のドライエッチングによって除去する。これにより、直径200μm程度の圧力室2aが形成される。このとき、圧力室2aの上壁を構成するSi基板2eが振動板2b(可動部)となる。
(13) Dry etching process 2
The exposed intermediate oxide film (oxide film 2d) is removed by dry etching such as RIE (Reactive Ion Etching) using a gas such as CHF 3 . Thereby, the pressure chamber 2a having a diameter of about 200 μm is formed. At this time, the Si substrate 2e constituting the upper wall of the pressure chamber 2a becomes the vibration plate 2b (movable part).
 また、エッチングによって圧力室2aおよび振動板2bを形成すると同時に、第2の分割溝21も形成される。このとき、第1の分割溝11は、Si基板2eをエッチングして形成されており、除去されたSi基板2eの部分に第1のレジスト12が埋められているため、第2の分割溝21の形成の際に酸化膜2dがエッチングによって除去されると、第1の分割溝11を埋める第1のレジスト12が表出する。すなわち、Si基板2cおよび酸化膜2dのエッチングによって第2の分割溝21が形成されると、第2の分割溝21は第1の分割溝11とつながり、基板厚さ方向に貫通する。これにより、基板2が個片化される。なお、この時点では、個片化された各々の基板2は第1のレジスト12を介してフィルム基材13で支持されているため、ばらけることはない。 In addition, the pressure chamber 2a and the diaphragm 2b are formed by etching, and at the same time, the second divided groove 21 is also formed. At this time, the first dividing groove 11 is formed by etching the Si substrate 2e, and the first resist 12 is buried in the removed portion of the Si substrate 2e. When the oxide film 2d is removed by etching at the time of forming the first resist 12, the first resist 12 filling the first dividing groove 11 is exposed. That is, when the second divided groove 21 is formed by etching the Si substrate 2c and the oxide film 2d, the second divided groove 21 is connected to the first divided groove 11 and penetrates in the substrate thickness direction. Thereby, the board | substrate 2 is separated into pieces. At this point, each of the separated substrates 2 is supported by the film base material 13 via the first resist 12 and therefore does not come apart.
 (14)第2のレジスト除去工程
 分割された個々の基板2を、第1のレジスト12を介してフィルム基材13に貼り付けたまま、第2のレジスト22を、O2等のガスを用いたドライエッチングによって除去する。
(14) Second resist removal step While the divided individual substrates 2 are attached to the film base 13 via the first resist 12, the second resist 22 is used with a gas such as O 2 . Remove by dry etching.
 (15)フィルム基材剥離工程
 第1のレジスト12に貼り付けられたフィルム基材13を剥離する。上述したように、フィルム基材13として、UV照射などによって低粘着化するものを用いていれば、そのようなUV照射によってフィルム基材13を容易に剥離することができる。フィルム基材13を剥離しても、第1のレジスト12によって圧電素子7が保護されているため、剥離時に圧電素子7に傷が付いたり、フィルム基材13の粘着層13bの粘着剤が圧電素子7に付着し、残ることはない。
(15) Film substrate peeling step The film substrate 13 attached to the first resist 12 is peeled off. As described above, if a film substrate 13 that is made low in adhesiveness by UV irradiation or the like is used, the film substrate 13 can be easily peeled off by such UV irradiation. Even if the film substrate 13 is peeled off, the piezoelectric element 7 is protected by the first resist 12, so that the piezoelectric element 7 is scratched at the time of peeling, or the adhesive of the adhesive layer 13 b of the film substrate 13 is piezoelectric. It adheres to the element 7 and does not remain.
 (16)第1のレジスト除去工程
 第1のレジスト12を、O2等のガスを用いたドライエッチングによって除去する。これにより、個々の基板2に対応する薄膜圧電アクチュエータ1が完成することになる。このとき、ドライエッチング装置(例えばICP装置)の基台で、分割された個々の基板2を支持した状態で、第1のレジスト12がドライエッチングされるため、ドライエッチング後に、個々の基板2に対応する薄膜圧電アクチュエータ1がばらけて干渉することはない。
(16) First resist removing step The first resist 12 is removed by dry etching using a gas such as O 2 . Thereby, the thin film piezoelectric actuator 1 corresponding to each substrate 2 is completed. At this time, the first resist 12 is dry-etched in a state where the divided individual substrates 2 are supported by the base of the dry etching apparatus (for example, ICP apparatus). The corresponding thin film piezoelectric actuator 1 is not scattered and does not interfere.
 以上のように、本実施形態では、ドライエッチングにより、基板2に第1の分割溝11および第2の分割溝21を形成して基板2を分割するため、ダイシング等による機械的な加工によって基板2を分割する場合に比べて、振動板2bに振動等のダメージを与えることなく基板2を分割できる。これにより、基板分割時の振動板2bの破損を低減して歩留りを向上させることができ、製造コストの削減が見込める。 As described above, in the present embodiment, the first divided groove 11 and the second divided groove 21 are formed in the substrate 2 by dry etching to divide the substrate 2, so that the substrate is mechanically processed by dicing or the like. Compared with the case of dividing 2, the substrate 2 can be divided without damaging the diaphragm 2 b such as vibration. As a result, it is possible to improve the yield by reducing the breakage of the diaphragm 2b at the time of dividing the substrate, and to reduce the manufacturing cost.
 また、第1のレジスト12上にフィルム基材13を貼り付ける際に、第1のレジスト12の表面が平坦であるため、気泡を巻き込むことなくフィルム基材13を貼り付けることができる。第1のレジストとフィルム基材13との間に気泡が介在した状態では、その後の(12)および(13)の工程でのドライエッチング時に基板2に熱分布が生じるため、エッチングの精度が悪化してしまう。しかし、本実施形態では、第1のレジスト12の表面が平坦で、フィルム基材13の貼り付け時に気泡の巻き込みがないため、エッチングの精度が良好でかつ安定し、振動板2bを精度よく形成することができる。 Further, when the film base material 13 is stuck on the first resist 12, the surface of the first resist 12 is flat, so that the film base material 13 can be stuck without entraining bubbles. In the state where air bubbles are interposed between the first resist and the film base material 13, heat distribution is generated in the substrate 2 during the subsequent dry etching in the steps (12) and (13), so that the etching accuracy is deteriorated. Resulting in. However, in this embodiment, since the surface of the first resist 12 is flat and there is no bubble entrainment when the film base material 13 is attached, the etching accuracy is good and stable, and the diaphragm 2b is accurately formed. can do.
 また、第1のレジスト12からフィルム基材13を剥離した後、第1のレジスト12をドライエッチングによって除去するので、上述したように、ドライエッチング装置の基台で個々の基板2を支持しながら、第1のレジスト12を除去できる。したがって、第1のレジスト12の除去時または除去後に、分割した個々の基板2に対応するチップがばらけてチップ同士が干渉し、これによって振動板2bが破損するのを低減することができる。また、各チップがばらけないため、各チップのハンドリングも容易となる。さらに、フィルム基材13の剥離後の第1のレジスト12の除去をドライプロセスで行うことにより、振動板2bにストレスがかからず、第1のレジスト12の除去時に振動板2bが破損することもない。 Further, since the first resist 12 is removed by dry etching after the film base material 13 is peeled off from the first resist 12, as described above, the individual substrates 2 are supported by the base of the dry etching apparatus. The first resist 12 can be removed. Therefore, it is possible to reduce the damage of the diaphragm 2b due to the chips corresponding to the divided individual substrates 2 being scattered and interfering with each other when or after the first resist 12 is removed. Moreover, since each chip cannot be separated, handling of each chip is also facilitated. Furthermore, by removing the first resist 12 after the film substrate 13 is peeled off by a dry process, the diaphragm 2b is not stressed, and the diaphragm 2b is damaged when the first resist 12 is removed. Nor.
 また、フィルム基材13として、剥離時に、加熱または光照射によって剥離前よりも低粘着化する粘着層13bを有する粘着フィルムを用いているため、第1のレジスト12からフィルム基材13を剥離しやすくなり、製造時の作業性を向上させることができる。 Moreover, since the adhesive film 13b which has the adhesion layer 13b which becomes lower adhesion than before peeling by heating or light irradiation is used as the film substrate 13, the film substrate 13 is peeled from the first resist 12. It becomes easy and the workability | operativity at the time of manufacture can be improved.
 〔フィルム基材の他の例〕
 図4は、薄膜圧電アクチュエータ1の製造工程の一部であって、用いるフィルム基材13の他の構成を示す断面図である。フィルム基材13は、基体13aの片面に付いた粘着層13bが熱発泡体31を含有しており、剥離時に、加熱によって熱発泡体31が発泡することで剥離前よりも粘着層13bが低粘着化する熱発泡シートであってもよい。このようなフィルム基材13(熱発泡シート)としては、例えばスミロン社製のTG-0330-6、TG-0330-4を使用することができる。
[Other examples of film substrate]
FIG. 4 is a cross-sectional view showing another configuration of the film substrate 13 to be used, which is a part of the manufacturing process of the thin film piezoelectric actuator 1. In the film substrate 13, the adhesive layer 13b attached to one side of the substrate 13a contains the thermal foam 31. At the time of peeling, the thermal foam 31 is foamed by heating, so that the adhesive layer 13b is lower than before peeling. It may be a heat-foamed sheet that becomes sticky. As such a film base 13 (thermal foam sheet), for example, TG-0330-6 and TG-0330-4 manufactured by Sumilon can be used.
 上記の粘着層13bは2層構造となっている。粘着層13bの1層目(基体13a側から数えて第1層目)には、熱発泡体31が散在しており、2層目(基体13a側から数えて第2層目)には、粘着層13bの全体の厚さに対して十分に薄い非粘着層32(界面活性剤を配合したオレフィン系樹脂層)が10~75wt%の配合率で点在している。なお、非粘着層32の配合率は、上記のスミロン社製のTG-0330-6やTG-0330-4における配合率より多くても構わない。 The adhesive layer 13b has a two-layer structure. Thermal foam 31 is scattered in the first layer (first layer counted from the base 13a side) of the adhesive layer 13b, and in the second layer (second layer counted from the base 13a side), Non-adhesive layers 32 (olefin resin layers containing a surfactant) that are sufficiently thin with respect to the entire thickness of the adhesive layer 13b are dotted at a mixing rate of 10 to 75 wt%. The blending ratio of the non-adhesive layer 32 may be larger than the blending ratio in the above-mentioned TG-0330-6 or TG-0330-4 manufactured by Sumilon.
 図4で示したフィルム基材13を第1のレジスト12から剥離する際、加熱によって熱発泡体31が発泡することで粘着層13bが低粘着化し、粘着力がほぼゼロとなるため、フィルム基材13を剥離しやすくなり、製造時の作業性を向上させることができる。特に、熱発泡体31が発泡することで、基板2に対してフィルム基材13が相対的に押し上げられるため、基板2に負荷をかけることなくフィルム基材13を容易に剥離することが可能となる。また、粘着層13bにおける第1のレジスト12との接触側には、非粘着層32が散在しているため、第1のレジスト12と粘着層13bとが強固に固着するのを防止して、フィルム基材13の剥離をさらに容易にすることができる。 When the film base 13 shown in FIG. 4 is peeled from the first resist 12, the heat-foamed body 31 is foamed by heating, whereby the pressure-sensitive adhesive layer 13b is lowered and the pressure-sensitive adhesive force becomes almost zero. It becomes easy to peel the material 13, and workability | operativity at the time of manufacture can be improved. In particular, since the thermal foam 31 is foamed, the film base 13 is relatively pushed up with respect to the substrate 2, so that the film base 13 can be easily peeled without applying a load to the substrate 2. Become. Moreover, since the non-adhesive layer 32 is scattered on the contact side of the adhesive layer 13b with the first resist 12, it is possible to prevent the first resist 12 and the adhesive layer 13b from being firmly fixed, Peeling of the film base 13 can be further facilitated.
 このように、粘着層13b中に熱発泡体31が存在し、粘着層13bの表層部に非粘着層32が散在しているフィルム基材13を使用することで、フィルム基材13をストレスフリーで(チップにストレスを与えることなく)剥離できる。 Thus, by using the film base material 13 in which the thermal foam 31 is present in the adhesive layer 13b and the non-adhesive layer 32 is scattered on the surface layer portion of the adhesive layer 13b, the film base material 13 is stress-free. Can be peeled off (without stressing the chip).
 なお、以上では、インクジェットヘッドに適用可能な薄膜圧電アクチュエータの製法について説明したが、本実施形態の製法は、圧電素子を用いたデバイスの製造に種々適用することができ、例えば熱センサや超音波センサなどのデバイスの製造にも適用することができる。 In the above, the manufacturing method of the thin film piezoelectric actuator applicable to the ink jet head has been described. However, the manufacturing method of the present embodiment can be variously applied to the manufacture of a device using a piezoelectric element, for example, a thermal sensor or an ultrasonic wave. It can also be applied to the manufacture of devices such as sensors.
 以上で説明した本実施形態の薄膜圧電アクチュエータの製造方法は、以下のように表現することができ、これによって以下の作用効果を奏する。 The manufacturing method of the thin film piezoelectric actuator of the present embodiment described above can be expressed as follows, and the following effects are obtained.
 本実施形態の薄膜圧電アクチュエータの製造方法は、基板を分割して個々の薄膜圧電アクチュエータを製造する薄膜圧電アクチュエータの製造方法であって、前記基板の一方の面上に、電極および圧電薄膜を含む圧電素子をパターニング形成する工程と、前記基板の一方の面側に、前記基板を分割するための第1の分割溝をドライエッチングによってパターニング形成する工程と、前記基板の一方の面上に、前記圧電素子および前記第1の分割溝を覆って表面を平坦化する第1のレジストを形成する工程と、前記第1のレジスト上に、フィルム基材を貼り付ける工程と、前記基板における一方の面とは反対側の他方の面上に、前記圧電素子に対応して位置する振動板と、前記第1の分割溝に対応して位置する第2の分割溝とをパターニングするための第2のレジストを形成する工程と、前記第2のレジストをマスクとして、前記基板を他方の面側からドライエッチングすることにより、前記振動板と、前記第1の分割溝とつながって貫通する前記第2の分割溝とを同時に形成する工程とを有している。 The manufacturing method of the thin film piezoelectric actuator of the present embodiment is a manufacturing method of a thin film piezoelectric actuator in which a substrate is divided to manufacture individual thin film piezoelectric actuators, and includes an electrode and a piezoelectric thin film on one surface of the substrate. Patterning the piezoelectric element, forming a first dividing groove for dividing the substrate on one surface side of the substrate by dry etching, forming the first dividing groove on one surface of the substrate, Forming a first resist for flattening the surface covering the piezoelectric element and the first dividing groove, a step of attaching a film base material on the first resist, and one surface of the substrate And patterning a diaphragm located corresponding to the piezoelectric element and a second divided groove located corresponding to the first divided groove on the other surface opposite to A second resist for forming the substrate, and dry etching the substrate from the other surface side using the second resist as a mask, thereby connecting the diaphragm and the first dividing groove. Forming the second dividing groove penetrating therethrough at the same time.
 上記の製造方法によれば、基板の一方の面側に圧電素子が形成され、さらに第1の分割溝がドライエッチングによって形成される。そして、基板を他方の面側からドライエッチングすることにより、振動板と第2の分割溝とが同時に形成される。このとき、第2の分割溝は第1の分割溝とつながって基板を貫通するため、結局、振動板および第2の分割溝の形成と同時に、基板が第1および第2の分割溝に沿って個々の薄膜圧電アクチュエータ(チップ)に分割される。 According to the above manufacturing method, the piezoelectric element is formed on one surface side of the substrate, and the first division groove is formed by dry etching. Then, the diaphragm and the second divided groove are formed simultaneously by dry etching the substrate from the other surface side. At this time, since the second dividing groove is connected to the first dividing groove and penetrates the substrate, eventually, the substrate is along the first and second dividing grooves simultaneously with the formation of the diaphragm and the second dividing groove. And divided into individual thin film piezoelectric actuators (chips).
 このように、従来のようにダイシング装置や刃物などを用いて機械的に基板を分割するのではなく、ドライエッチングによって基板を分割するため、分割時に機械的加工によるダメージ(振動や切削水の水圧)を振動板に与えることがない。これにより、基板分割時の振動板の破損を低減することができ、チップ製造時の歩留りを向上させることができる。 In this way, the substrate is not mechanically divided using a dicing device or a blade as in the past, but the substrate is divided by dry etching, so that damage caused by mechanical processing (vibration or water pressure of cutting water) ) Is not applied to the diaphragm. Thereby, the breakage of the diaphragm at the time of dividing the substrate can be reduced, and the yield at the time of chip manufacture can be improved.
 また、基板の一方の面上に、圧電素子および第1の分割溝を覆うように第1のレジストが形成される。この第1のレジストの表面は平坦であるため、この第1のレジスト上にフィルム基材を貼り付ける際に、気泡を巻き込むことなく貼り付けることができる。これにより、振動板形成時のドライエッチングにおいて基板に熱分布が生じてドライエッチングの精度が低下するのを抑えることができ、振動板を精度よく形成することができる。 Further, a first resist is formed on one surface of the substrate so as to cover the piezoelectric element and the first dividing groove. Since the surface of this 1st resist is flat, when a film base material is affixed on this 1st resist, it can affix without enclosing a bubble. As a result, it is possible to suppress a decrease in the accuracy of dry etching caused by heat distribution in the substrate during dry etching when the diaphragm is formed, and the diaphragm can be formed with high accuracy.
 上記の製造方法は、ドライエッチングによって前記振動板と前記第2の分割溝とを同時に形成した後に、前記フィルム基材を剥離する工程と、その後、前記第1のレジストをドライエッチングによって除去する工程とをさらに有していてもよい。 In the above manufacturing method, after the diaphragm and the second divided groove are simultaneously formed by dry etching, the film base material is peeled off, and then the first resist is removed by dry etching. May further be included.
 基板に振動板および第2の分割溝を形成した後、フィルム基材を剥離し、第1のレジストを除去することにより、個々のチップが得られる。このとき、第1のレジストをドライエッチングによって除去するため、個々のチップをドライエッチング装置の基台で支持しながら、第1のレジストを除去することが可能となる。これにより、個々のチップがばらけることがないため、チップ同士の干渉(接触)による振動板の破損を低減でき、また、各チップのハンドリングも容易となる。 After forming the diaphragm and the second dividing groove on the substrate, the film base material is peeled off, and the first resist is removed to obtain individual chips. At this time, since the first resist is removed by dry etching, it is possible to remove the first resist while supporting each chip on the base of the dry etching apparatus. Thereby, since the individual chips are not separated, the breakage of the diaphragm due to the interference (contact) between the chips can be reduced, and the handling of each chip is facilitated.
 前記フィルム基材として、剥離時に、加熱または光照射によって剥離前よりも低粘着化する粘着層を有する粘着フィルムを用いてもよい。この場合、加熱または光照射によって粘着層が低粘着化するため、フィルム基材(粘着フィルム)を剥離しやすくなり、作業性が向上する。 As the film base material, an adhesive film having an adhesive layer that becomes less adhesive at the time of peeling than before peeling by heating or light irradiation may be used. In this case, since the pressure-sensitive adhesive layer is lowered by heating or light irradiation, the film base material (pressure-sensitive adhesive film) can be easily peeled off, and the workability is improved.
 前記フィルム基材として、剥離時に、加熱によって熱発泡体が発泡することで剥離前よりも低粘着化する粘着層を有する熱発泡シートを用いてもよい。この場合、加熱によって粘着層が低粘着化するため、フィルム基材(熱発泡シート)を剥離しやすくなり、作業性が向上する。特に、熱発泡体が発泡することで、基板に対してフィルム基材が相対的に押し上げられるため、基板に負荷をかけることなくフィルム基材を容易に剥離することが可能となる。 As the film substrate, a heat-foamed sheet having an adhesive layer that becomes less sticky than before peeling due to foaming of the heat-foamed material by heating at the time of peeling may be used. In this case, since the pressure-sensitive adhesive layer is lowered by heating, the film substrate (thermally foamed sheet) is easily peeled off, and workability is improved. In particular, since the thermal foam is foamed, the film base material is relatively pushed up with respect to the substrate. Therefore, the film base material can be easily peeled without applying a load to the substrate.
 以上で説明した本実施形態の薄膜圧電アクチュエータは、上述した製造方法によって製造されるものである。 The thin film piezoelectric actuator of the present embodiment described above is manufactured by the manufacturing method described above.
 本発明は、例えばインクジェットヘッドのアクチュエータや、熱センサ、超音波センサなどのデバイスの製造に利用可能である。 The present invention can be used for manufacturing devices such as an actuator of an inkjet head, a thermal sensor, and an ultrasonic sensor.
   1   薄膜圧電アクチュエータ
   2   基板
   2b  振動板
   4   下部電極
   5   圧電薄膜
   6   上部電極
   7   圧電素子
  11   第1の分割溝
  12   第1のレジスト
  13   フィルム基材(粘着フィルム、熱発泡シート)
  13b  粘着層
  21   第2の分割溝
  22   第2のレジスト
  31   熱発泡体
DESCRIPTION OF SYMBOLS 1 Thin film piezoelectric actuator 2 Board | substrate 2b Diaphragm 4 Lower electrode 5 Piezoelectric thin film 6 Upper electrode 7 Piezoelectric element 11 1st division groove 12 1st resist 13 Film base material (adhesive film, thermal foam sheet)
13b Adhesive layer 21 Second dividing groove 22 Second resist 31 Thermal foam

Claims (5)

  1.  基板を分割して個々の薄膜圧電アクチュエータを製造する薄膜圧電アクチュエータの製造方法であって、
     前記基板の一方の面上に、電極および圧電薄膜を含む圧電素子をパターニング形成する工程と、
     前記基板の一方の面側に、前記基板を分割するための第1の分割溝をドライエッチングによってパターニング形成する工程と、
     前記基板の一方の面上に、前記圧電素子および前記第1の分割溝を覆って表面を平坦化する第1のレジストを形成する工程と、
     前記第1のレジスト上に、フィルム基材を貼り付ける工程と、
     前記基板における一方の面とは反対側の他方の面上に、前記圧電素子に対応して位置する振動板と、前記第1の分割溝に対応して位置する第2の分割溝とをパターニングするための第2のレジストを形成する工程と、
     前記第2のレジストをマスクとして、前記基板を他方の面側からドライエッチングすることにより、前記振動板と、前記第1の分割溝とつながって貫通する前記第2の分割溝とを同時に形成する工程とを有している、薄膜圧電アクチュエータの製造方法。
    A thin film piezoelectric actuator manufacturing method for manufacturing individual thin film piezoelectric actuators by dividing a substrate,
    Patterning a piezoelectric element including an electrode and a piezoelectric thin film on one surface of the substrate;
    Patterning a first dividing groove for dividing the substrate on one surface side of the substrate by dry etching;
    Forming a first resist on one surface of the substrate to flatten the surface so as to cover the piezoelectric element and the first dividing groove;
    A step of affixing a film substrate on the first resist;
    On the other surface of the substrate opposite to the one surface, a vibration plate positioned corresponding to the piezoelectric element and a second divided groove positioned corresponding to the first divided groove are patterned. Forming a second resist for performing,
    Using the second resist as a mask, the substrate is dry-etched from the other surface side, thereby simultaneously forming the diaphragm and the second divided groove penetrating through the first divided groove. A method of manufacturing a thin film piezoelectric actuator.
  2.  ドライエッチングによって前記振動板と前記第2の分割溝とを同時に形成した後に、前記フィルム基材を剥離する工程と、
     その後、前記第1のレジストをドライエッチングによって除去する工程とをさらに有している、請求項1に記載の薄膜圧電アクチュエータの製造方法。
    A step of peeling the film substrate after simultaneously forming the diaphragm and the second divided groove by dry etching;
    The method of manufacturing a thin film piezoelectric actuator according to claim 1, further comprising a step of removing the first resist by dry etching.
  3.  前記フィルム基材として、剥離時に、加熱または光照射によって剥離前よりも低粘着化する粘着層を有する粘着フィルムを用いる、請求項2に記載の薄膜圧電アクチュエータの製造方法。 3. The method for producing a thin film piezoelectric actuator according to claim 2, wherein an adhesive film having an adhesive layer that becomes less adhesive at the time of peeling by heating or light irradiation than before peeling is used as the film substrate.
  4.  前記フィルム基材として、剥離時に、加熱によって熱発泡体が発泡することで剥離前よりも低粘着化する粘着層を有する熱発泡シートを用いる、請求項2に記載の薄膜圧電アクチュエータの製造方法。 3. The method of manufacturing a thin film piezoelectric actuator according to claim 2, wherein a thermal foam sheet having an adhesive layer that becomes less adhesive than before peeling when the thermal foam is foamed by heating at the time of peeling is used as the film base.
  5.  請求項1から4のいずれかに記載の製造方法によって製造された薄膜圧電アクチュエータ。 A thin film piezoelectric actuator manufactured by the manufacturing method according to claim 1.
PCT/JP2014/079724 2013-11-20 2014-11-10 Thin film piezoelectric actuator and method for manufacturing same WO2015076135A1 (en)

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WO2006090618A1 (en) * 2005-02-23 2006-08-31 Matsushita Electric Industrial Co., Ltd. Process for fabricating piezoelectric element
JP2007196431A (en) * 2006-01-24 2007-08-09 Fuji Xerox Co Ltd Liquid droplet delivering head, and method for manufacturing liquid droplet delivering head
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