WO2015070707A1 - 一种智能变电站通用数据采集方法 - Google Patents

一种智能变电站通用数据采集方法 Download PDF

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WO2015070707A1
WO2015070707A1 PCT/CN2014/089756 CN2014089756W WO2015070707A1 WO 2015070707 A1 WO2015070707 A1 WO 2015070707A1 CN 2014089756 W CN2014089756 W CN 2014089756W WO 2015070707 A1 WO2015070707 A1 WO 2015070707A1
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frequency
data
frequency division
transmission
cpu board
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PCT/CN2014/089756
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English (en)
French (fr)
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樊陈
倪益民
窦仁晖
姚志强
姜玉磊
徐歆
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国家电网公司
中国电力科学研究院
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Publication of WO2015070707A1 publication Critical patent/WO2015070707A1/zh

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
    • H02J13/00002—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network characterised by monitoring
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
    • H02J13/00006—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network characterised by information or instructions transport means between the monitoring, controlling or managing units and monitored, controlled or operated power network element or electrical equipment
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J13/00—Circuit arrangements for providing remote indication of network conditions, e.g. an instantaneous record of the open or closed condition of each circuitbreaker in the network; Circuit arrangements for providing remote control of switching means in a power distribution network, e.g. switching in and out of current consumers by using a pulse code signal carried by the network
    • H02J13/00032—Systems characterised by the controlled or operated power network elements or equipment, the power network elements or equipment not otherwise provided for
    • H02J13/00034—Systems characterised by the controlled or operated power network elements or equipment, the power network elements or equipment not otherwise provided for the elements or equipment being or involving an electric power substation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E60/00—Enabling technologies; Technologies with a potential or indirect contribution to GHG emissions mitigation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00—Systems supporting electrical power generation, transmission or distribution
    • Y04S10/16—Electric power substations
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S10/00—Systems supporting electrical power generation, transmission or distribution
    • Y04S10/30—State monitoring, e.g. fault, temperature monitoring, insulator monitoring, corona discharge
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y04—INFORMATION OR COMMUNICATION TECHNOLOGIES HAVING AN IMPACT ON OTHER TECHNOLOGY AREAS
    • Y04S—SYSTEMS INTEGRATING TECHNOLOGIES RELATED TO POWER NETWORK OPERATION, COMMUNICATION OR INFORMATION TECHNOLOGIES FOR IMPROVING THE ELECTRICAL POWER GENERATION, TRANSMISSION, DISTRIBUTION, MANAGEMENT OR USAGE, i.e. SMART GRIDS
    • Y04S40/00—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them
    • Y04S40/12—Systems for electrical power generation, transmission, distribution or end-user application management characterised by the use of communication or information technologies, or communication or information technology specific aspects supporting them characterised by data transport means between the monitoring, controlling or managing units and monitored, controlled or operated electrical equipment

Definitions

  • the invention relates to a data acquisition method for a substation, in particular to a general data acquisition method for an intelligent substation.
  • the merging unit serves as a bridge connecting the electronic transformer or the conventional transformer and the secondary device of the spacer layer, and provides guarantee for the reliability operation of the protection and measurement and control device.
  • the application of electronic transformers is an important part of the construction of intelligent substations; however, in the specific construction of intelligent substations, the requirements for sampling frequency of different types of spacer secondary devices are not the same as the application requirements are different.
  • the present invention provides a smart substation general data acquisition method.
  • the method comprises the following steps:
  • Step 1 collecting the voltage signal and the current signal of the smart substation at a high frequency to obtain high frequency sampling data
  • Step 2 acquiring frequency-divided data of the high-frequency sampling data
  • Step 3 Standardize transmission of the frequency division data.
  • the high frequency sampling data is collected by a high frequency acquisition CPU board or a high frequency acquisition module; the high frequency acquisition CPU board or the high frequency acquisition module is connected to an electronic transformer through an optical fiber. Receiving the electronic mutual inductance The high frequency sampling data sent by the device;
  • the high-frequency acquisition CPU board outputs the collected 256-point/cycle high-frequency sampling data to the high-frequency transmission CPU board and the frequency-divided transmission CPU board; the high-frequency acquisition module samples the 256-point/cycle high-frequency sampling data. Outputting to the high frequency transmission module and the frequency division transmission module respectively; the number of the frequency division transmission CPU board and the frequency division transmission module are both N, N is at least 1; the high frequency transmission CPU board and the high frequency The number of transmission modules is 1;
  • the high frequency acquisition CPU board and the high frequency acquisition module each comprise a high frequency acquisition circuit board;
  • the high frequency acquisition circuit board comprises a high frequency crystal oscillator circuit and a high frequency sampling FPGA circuit;
  • the high frequency crystal oscillator circuit is used to generate a 256-point/cycle pulse;
  • the high-frequency sampling FPGA circuit transmits a high-frequency sampling pulse to the electronic transformer according to a crystal frequency of the high-frequency crystal oscillator circuit, and receives the high-frequency signal fed back by the electronic transformer Sampling data;
  • the obtaining the frequency division data in the step 2 includes:
  • Step 2-1 Customizing the frequency division data; the frequency division transmission CPU board or the frequency division transmission module customizes the frequency division data by hardware dialing; the frequency division transmission CPU board or the frequency division transmission The CPU module outputs sampling data of different frequencies by setting different frequency division dial codes;
  • Step 2-2 Interpolating the high frequency sampling data by the digital signal processor of the frequency division transmission CPU board or the frequency division transmission module to obtain the frequency division data; the digital signal processor adopts a division a segment parabolic interpolation algorithm performs a difference calculation on the 256-point/cycle high-frequency sampling data;
  • the frequency division transmission CPU board and the frequency division transmission module both include a frequency division FPGA circuit and a frequency division crystal oscillation circuit; and the frequency division crystal oscillation circuit is configured to generate a frequency division corresponding to the frequency division dial code. a pulse; the frequency division FPGA circuit performs data transmission according to the frequency division pulse;
  • the frequency division data in the step 3 is transmitted in a point-to-point or networking manner conforming to the IEC61850-9-2 standard;
  • the high frequency acquisition CPU board, the high frequency transmission CPU board and the frequency division transmission CPU board are integrated on one device, and the clock synchronization signal conforming to the IRIG-B or IEEE1588 standard is uniformly used for synchronization timing. ;
  • the high frequency acquisition module, the high frequency transmission module and the frequency division transmission module are integrated on one CPU board, and the clock synchronization signal conforming to the IRIG-B or IEEE1588 standard is used for synchronization timing.
  • an intelligent electronic device (IED) in an intelligent substation can directly receive a required sampling frequency, and does not need to perform data difference calculation by itself, which is not only simplified.
  • the circuit design reduces the workload of the device itself, and also improves the processing efficiency of each device of the intelligent substation, and further improves the real-time performance of the device;
  • a point-to-point or network transmission mode conforming to the IEC61850-9-2 standard is adopted; in the prior art, a 126-byte length message is transmitted by using 80 points/cycle, and 4000 packets are transmitted per second, and the bandwidth is 3.84. M/s; after adopting the data collection method disclosed in the present application, the high frequency data is interpolated into 24 points/cycle, the same message length, 1200 packets per second, and the bandwidth is only 1.15 M/s, which is effectively reduced.
  • the use of network bandwidth is conducive to improving the stability and reliability of network communication transmission;
  • the data of the merging unit accessible to the network is improved; when the 80 point/cycle data is transmitted, the data of the merging unit that can be accessed is increased by 3 times, and the original is guaranteed.
  • the number of switches can be greatly reduced, and the investment and construction cost of the substation can be further reduced;
  • a high-frequency transmission CPU board and a high-frequency transmission module are not interpolated, and only 256 points/cycle data are transmitted, and the high-frequency transmission CPU board reduces the load of the high-frequency acquisition CPU board. It ensures the stable operation of the device when the high-frequency acquisition CPU board performs data acquisition; the high-frequency transmission module reduces the load of the high-frequency acquisition module and ensures the stability and reliability of the operation of the high-frequency acquisition module.
  • the universal data acquisition method of the intelligent substation realizes the requirement of different sampling frequencies of different applications such as the whole station protection, measurement, measurement and PMU of the intelligent substation through only one set of acquisition circuits, and reduces the configuration of the data acquisition device. Quantity, simplify the design of intelligent substation and reduce the construction cost of substation.
  • FIG. 1 is a flow chart of a general data acquisition method for a smart substation according to an embodiment of the present invention
  • FIG. 2 is a structural diagram of a multi-CPU board in the embodiment of the present invention.
  • FIG. 3 is a structural diagram of a single CPU board in the embodiment of the present invention.
  • FIG. 1 shows a flow chart of a data collection method, which is specifically:
  • Step 1 High-frequency acquisition of voltage signals and current signals of the intelligent substation to obtain high-frequency sampling data
  • the sampling frequency of the measurement and control device is 32 points/cycle (1600Hz); in the intelligent substation, the common sampling frequency of the electronic transformer and the combining unit is 80 points/cycle (4000kHz); the relay protection device (such as line protection, etc.) ), commonly used sampling frequency includes 24 points / cycle (1200Hz), 32 points / cycle (1600Hz), 48 points / cycle (2400Hz); PMU device commonly used sampling frequency including 80 points / cycle (4000Hz), 96 points / cycle (4800Hz ), 100 points / cycle (5000Hz) And 200 points / cycle (10kHz); power quality monitoring device, according to the standard requirements for accurate measurement of more than 50 harmonics, the sampling frequency should be no less than 128 points / cycle (6400Hz); fault recording device, sampling frequency is not lower than 100 points / cycle (5000Hz); digital watt-hour meter, including the accuracy of 0.01 standard watt-hour meter and 0.05 standard watt-hour meter, the ordinary metering sampling frequency is 160 points / cycle (8000Hz), to achieve
  • Step 2 obtaining frequency-divided data of high-frequency sampling data; obtaining 24 points/cycle, 32 points/cycle, 48 points/cycle, 80 points/cycle, 96 points/cycle according to actual needs of different intelligent electronic devices in the intelligent substation, Divided data such as 100 points/cycle and 128 points/cycle;
  • the intelligent substation line protection device in the prior art needs to interpolate the data into 24 points/cycle according to the internal requirement of the device after receiving the sampling frequency through the network;
  • the protection device can directly receive the 24 point/cycle sampling data, and does not need to perform data interpolation by itself, thereby improving the working efficiency;
  • the IEC61850-9-2 typical message with a length of 126 bytes is transmitted at 80 points/cycle, the second time is The 4,000 packets are transmitted with a bandwidth of 3.84 M/s. In this embodiment, 1200 packets are transmitted per second, and the bandwidth is only 1.15 M/s.
  • Step 3 Standardize transmission of the frequency-divided data by means of a point-to-point or networking method conforming to the IEC 61850-9-2 standard.
  • the embodiment includes two methods of high frequency acquisition and data transmission by using a high frequency acquisition CPU board and a high frequency acquisition module;
  • Figure 2 shows the specific structure diagram of high-frequency acquisition and data transmission of intelligent substation using high-frequency acquisition CPU board, high-frequency transmission CPU board and frequency-divided transmission CPU board; based on the intelligent substation shown in Figure 2
  • the data collection method is:
  • Step 1 The high-frequency acquisition CPU board is connected to the electronic transformer through the optical fiber, and receives the high-frequency data sent by the electronic transformer; the high-frequency acquisition CPU board outputs the collected 256-point/cycle high-frequency data to the high-frequency transmission CPU.
  • the board and the frequency-divided transmission CPU board; the high-frequency acquisition CPU board, the high-frequency transmission CPU board, and the frequency-divided transmission CPU board are integrated on one device, and the data interaction is performed through the high-speed serial bus in the high-speed device, and the uniform use conforms to IRIG- B or IEEE1588 standard clock synchronization signal is synchronized;
  • high frequency acquisition CPU board includes high frequency acquisition circuit board;
  • high frequency acquisition circuit board includes high frequency crystal oscillator circuit and high frequency sampling FPGA circuit; high frequency crystal oscillator circuit is used to generate 256 Point/cycle (ie 12.8 kHz) pulse;
  • the high frequency sampling FPGA circuit sends a high frequency sampling pulse to the electronic transformer according to the crystal frequency of the high frequency crystal oscillator circuit, and receives the high frequency sampling data fed back by the electronic transformer;
  • Step 2 Obtain the frequency division data through different frequency division transmission CPU boards; the specific steps are as follows:
  • Step 2-1 Customize the frequency division data; the frequency division transmission CPU board customizes the frequency division data through hardware dialing; the frequency division transmission CPU board outputs different frequency sampling data by setting different frequency division dial codes; each frequency division transmission CPU board It can be printed separately or in a unified manner.
  • the hardware structure of each frequency-divided transmission CPU board is exactly the same; different frequency-division transmission CPU boards only realize the output of different frequencies through hardware dialing, ensuring different Interchangeability after frequency division transmission of CPU board failure;
  • FIG. 3 shows a specific structure diagram of high-frequency acquisition and data transmission of the intelligent substation by using the high-frequency acquisition module, the high-frequency transmission module and the frequency division transmission module; the general data acquisition method based on the intelligent substation shown in FIG. for:
  • Step 1 The high-frequency acquisition module is connected to the electronic transformer through the optical fiber to receive the high-frequency data sent by the electronic transformer; the high-frequency acquisition module outputs the 256-point/cycle high-frequency sampling data to the high-frequency transmission module and the frequency division respectively.
  • the transmission module; the high frequency acquisition module, the high frequency transmission module and the frequency division transmission module are integrated on one CPU board, and the clock synchronization signal conforming to the IRIG-B or IEEE1588 standard is uniformly used for synchronization timing; the number of the frequency division transmission modules is N; the number of high-frequency transmission modules is 1; the high-frequency transmission module does not perform interpolation calculation, only 256 points/cycle high-frequency sampling data is transmitted, thereby reducing the load of the high-frequency acquisition module and ensuring high acquisition of the high-frequency acquisition module.
  • the frequency data is stable when the device is running;
  • the high frequency acquisition module includes a high frequency acquisition circuit board;
  • the high frequency acquisition circuit board includes a high frequency crystal oscillator circuit and a high frequency sampling FPGA circuit;
  • Step 2 Obtain the frequency division data through different frequency division transmission modules. The specific steps are as follows:
  • Step 2-1 Customize the frequency division data; the frequency division transmission module customizes the frequency division data through hardware dialing; the frequency division transmission CPU module outputs sampling data of different frequencies by setting different frequency division dial codes; hardware of each frequency division transmission module;
  • the structure is completely the same, and the CPU modules of different frequency divisions only realize the output of different frequencies through hardware dialing, and ensure the interchangeability of the CPU modules after different frequency division transmissions;
  • Step 2-2 Interpolating the high frequency data by the digital signal processor of the frequency division transmission module to obtain the frequency division data; the digital signal processor uses the segmentation parabolic interpolation algorithm to calculate the difference of the high frequency data; the frequency division transmission module Including the frequency division FPGA circuit and the frequency division crystal circuit.
  • the truncation error is 7.28*10-5.
  • the relative error is 9.28*10-4, which satisfies the accuracy requirements of sampling.
  • the unified synchronous clock signal can ensure that the sampling data of different frequencies in 24 points/cycle to 256 points/cycle are transmitted within 1 s, which can effectively avoid the self-clock error of the frequency-divided crystal circuit in the absence of timing. Cumulative data transmission is abnormal; the time-synchronized pulse signal lines are paralleled through the bus backplane. This ensures that when the timing signal comes, all CPU boards or modules will be cleared according to the clock calculator to ensure all data.
  • each frequency-divided transmission CPU board or frequency-divided transmission module is divided by its own frequency-divided FPGA circuit without uniform synchronization, due to the error between the frequency-divided FPGA circuits, after a period of After time, the time will be out of synchronization; in this embodiment, when transmitting 80 points/cycle frequency data, the frequency is 4000, and the data calculator is 0-3999. When the time pulse comes, the data calculator is cleared, and the CPU board sends The 0th packet data, when the 3999th packet is sent, the time difference from the next timing pulse is theoretically 250us, but the actual device only needs to send the message before this.
  • each CPU board or module ensures that the two times of the start and end of the message transmission are synchronized, and the equal interval of the message transmission of the intermediate link is realized by each frequency division FPGA circuit, which can be effectively Improve the accuracy and stability of message delivery.
  • the universal data acquisition method of the intelligent substation provides the requirements for different sampling frequencies of different applications such as the whole station protection, measurement, measurement and PMU device of the intelligent substation through only one set of acquisition circuits, and reduces the configuration of the data acquisition device. Quantity, simplify the design of intelligent substation and reduce the construction cost of substation.

Abstract

一种智能变电站通用数据采集方法，包括以下步骤：步骤1、高频采集智能变电站的电压信号和电流信号，获得高频采样数据；步骤2、获取高频采样数据的分频数据；步骤3、对分频数据进行标准化传输。本方法仅通过一套采样电路实现智能变电站全站保护、测量、计量和PMU等各类不同应用对不同采样频率的需求，减少数据采集设备配置数量，简化智能变电站设计，降低变电站的建设成本。

Description

一种智能变电站通用数据采集方法 技术领域
本发明涉及变电站数据采集方法，具体涉及一种智能变电站通用数据采集方法。
背景技术
近年来，随着电子技术和光纤通信技术的飞速发展，电子式互感器在变电站得到了广泛应用，与传统电磁式互感器相比，电子式互感器具有抗干扰性能好，测量精度高等一系列优点。合并单元作为连接电子式互感器或常规互感器与间隔层二次设备的桥梁，为保护、测控装置的可靠性运行提供保障。当前，电子式互感器的应用为智能变电站建设的重要组成部分；但在智能变电站具体建设中随着应用需求的不同，各类间隔层二次装置对采样频率的要求也不尽相同。传统变电站中由于采用的是电缆连接的方式，各二次设备的数据由各自装置分别采集，导致采集资源重复配置，同时也增大了变电站设计的复杂程度。而在数字化变电站乃至当前的智能变电站，数据的采集均通过合并单元实现，而保护装置、测控装置、PMU装置、电能质量监测装置、故障录波装置和电能量计量装置对数据采集频率的要求各不相同，结果导致针对各自不同的需求需要配置各自独立的合并单元，虽然合并单元的应用实现了数据的数字化采集，但冗余的配置也导致采集资源配置的重复和浪费，增加了变电站的建设成本，增添了变电站设计的复杂程度，也给今后变电站的运行维护带来了困难。
因此，提供一种能够通过一套采集电路满足整个变电站各类数据采集需求，有效简化变电站数据采集设备数量和减少网络传输数据流量的智能变电站通用数据采集方法显得尤为重要。
发明内容
为了满足现有技术的需要，本发明提供了一种智能变电站通用数据采集方法所述方法包括下述步骤：
步骤1：高频采集所述智能变电站的电压信号和电流信号，获得高频采样数据；
步骤2：获取所述高频采样数据的分频数据；以及
步骤3：对所述分频数据进行标准化传输。
优选的，所述步骤1中通过高频采集CPU板或高频采集模块采集所述高频采样数据；所述高频采集CPU板或所述高频采集模块通过光纤与电子式互感器相连，接收所述电子式互感 器发送的所述高频采样数据；
所述高频采集CPU板将采集的256点/周波高频采样数据分别输出到高频传输CPU板和分频传输CPU板；所述高频采集模块将所述256点/周波高频采样数据分别输出到高频传输模块和分频传输模块；所述分频传输CPU板和所述分频传输模块的数目均为N，N至少为1；所述高频传输CPU板和所述高频传输模块的数目均为1；
所述高频采集CPU板和所述高频采集模块均包括高频采集电路板；所述高频采集电路板包括高频晶振电路和高频采样FPGA电路；所述高频晶振电路用于产生256点/周波脉冲；所述高频采样FPGA电路依据所述高频晶振电路的晶振频率向所述电子式互感器发送高频采样脉冲，并接收所述电子式互感器反馈的所述高频采样数据；
优选的，所述步骤2中获取所述分频数据包括：
步骤2-1：定制所述分频数据；所述分频传输CPU板或所述分频传输模块通过硬件拨码定制所述分频数据；所述分频传输CPU板或所述分频传输CPU模块通过设置不同的分频拨码输出不同频率的采样数据；
步骤2-2：通过所述分频传输CPU板或所述分频传输模块的数字信号处理器对所述高频采样数据进行插值，获取所述分频数据；所述数字信号处理器采用分段抛物线插值算法对所述256点/周波高频采样数据进行差值计算；
优选的，所述分频传输CPU板和所述分频传输模块均包括分频FPGA电路和分频晶振电路；所述分频晶振电路用于产生与所述分频拨码相对应的分频脉冲；所述分频FPGA电路依据所述分频脉冲进行数据传输；
优选的，所述步骤3中所述分频数据通过符合IEC61850-9-2标准的点对点或组网方式进行传输；
优选的，所述高频采集CPU板、所述高频传输CPU板和所述分频传输CPU板集成在一个装置上，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时；
所述高频采集模块、所述高频传输模块和所述分频传输模块集成在一个CPU板上，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时。
与最接近的现有技术相比，本发明的优异效果是：
1、本发明技术方案中，采用本申请公开的数据采集方法，智能变电站中的智能电子装置(Intelligent Electronic Device，IED)能够直接接收需要的采样频率，不需要自行进行数据差值计算，不仅简化了电路设计，减少了装置自身的工作量，同时也提高了智能变电站各设备的处理效率，进一步提升的装置的实时性；
2、本发明技术方案中，采用符合IEC61850-9-2标准的点对点或组网传输方式；现有技术中采用80点/周波传输126byte长度报文，每秒传输4000包报文，带宽为3.84M/s；而采用本申请公开的数据采集方法后，将高频数据插值成24点/周波，同样的报文长度，每秒传输1200包报文，带宽仅为1.15M/s，有效减少了网络带宽使用量，有利于提高网络通信传输的稳定性和可靠性；
3、本发明技术方案中，通过降低网络带宽，提高了网络可接入的合并单元的数据；当传输80点/周波数据时，可接入的合并单元的数据提高3倍，在保证原有网络可靠性和安全性的前提下可大幅减少交换机的使用数量，进一步降低变电站的投资建设成本；
4、本发明技术方案中，设置一个高频传输CPU板和高频传输模块不进行插值，仅将256点/周波的采样数据进行传输，高频传输CPU板减轻了高频采集CPU板的负荷，保证高频采集CPU板进行数据采集时装置的稳定运行；高频传输模块减轻了高频采集模块的负荷，保证了高频采集模块运行的稳性和可靠性。
5、本发明提供的一种智能变电站通用数据采集方法，仅通过一套采集电路实现智能变电站全站保护、测量、计量和PMU等各类不同应用对不同采样频率的需求，减少数据采集设备配置数量，简化智能变电站设计，降低变电站的建设成本。
附图说明
下面结合附图对本发明进一步说明。
图1是：本发明实施例中一种智能变电站通用数据采集方法流程图；
图2是：本发明实施例中多CPU板件架构图；
图3是：本发明实施例中单CPU板件架构图。
具体实施方式
下面将结合本申请实施例中的附图，对本申请实施例中的技术方案进行清楚、完整地描述。
本发明提供了一种智能变电站通用数据采集方法，如图1示出了数据采集方法流程图，具体为：
步骤1、高频采集智能变电站的电压信号和电流信号，从而获取高频采样数据；
传统变电站中，测控装置常用采样频率为32点/周波(1600Hz)；智能变电站中，电子式互感器和合并单元常用采样频率为80点/周波(4000kHz)；继电保护装置(如线路保护等)，常用采样频率包括24点/周波(1200Hz)、32点/周波(1600Hz)、48点/周波(2400Hz)；PMU装置常用采样频率包括80点/周波(4000Hz)、96点/周波(4800Hz)、100点/周波(5000Hz) 和200点/周波(10kHz)；电能质量监测装置，按照能够精确测量50次以上谐波的标准要求，采样频率应不小于128点/周波(6400Hz)；故障录波装置，采样频率不低于100点/周波(5000Hz)；数字化电度表，包括精度为0.01级标准电度表和0.05级标准电度表，普通的计量采样频率为160点/周波(8000Hz)，若要达到更高的精度要求，其采样频率应达到256点/周波(12.8kHz)；为满足实际工况需求，本实施例中采用基于FPGA的采集电路高频采集智能变电站的电压信号和电流信号，得到256点/周波(12.8kHz)的高频采样数据，每个高频采样数据之间的时间间隔为78.125us(20ms/256)；
步骤2、获取高频采样数据的分频数据；依据智能变电站中不同智能电子装置的实际需求获得24点/周波、32点/周波、48点/周波、80点/周波、96点/周波、100点/周波和128点/周波等分频数据；
当采用80点/周波的采样频率传输模式时，现有技术中的智能变电站线路保护装置通过网络接收采样频率后需按照其装置内部需求将数据插值成24点/周波；而本实施例中线路保护装置能够直接接收24点/周波采样数据，不需自行进行数据插值，提高了工作效率；现有技术中采用80点/周波传输长度为126byte的IEC61850-9-2典型报文时，每秒传输4000包报文，带宽为3.84M/s，本实施例中每秒传输1200包报文，带宽仅为1.15M/s。
步骤3、通过符合IEC61850-9-2标准的点对点或组网方式对分频数据进行标准化传输。
本实施例包括通过高频采集CPU板和高频采集模块两种高频采集与数据传输的方法；
(1)图2示出了采用高频采集CPU板、高频传输CPU板和分频传输CPU板对智能变电站进行高频采集和数据传输的具体结构图；基于图2所示的智能变电站通用数据采集方法为：
步骤1：高频采集CPU板通过光纤与电子式互感器相连，接收电子式互感器发送的高频数据；高频采集CPU板将采集的256点/周波高频数据分别输出到高频传输CPU板和分频传输CPU板；高频采集CPU板、高频传输CPU板和分频传输CPU板集成在一个装置上，通过高速装置内的高速串行总线进行数据交互，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时；高频采集CPU板包括高频采集电路板；高频采集电路板包括高频晶振电路和高频采样FPGA电路；高频晶振电路用于产生256点/周波(即12.8kHz)脉冲；高频采样FPGA电路依据高频晶振电路的晶振频率向电子式互感器发送高频采样脉冲，并接收电子式互感器反馈的高频采样数据；
当本发明公开的通用数据采集方法仅用于计量用时，即仅需要高频采集(256点/周波脉冲)，及高频传输时，对分频传输CPU板不进行配置或分频传输CPU板的数目设置为0；若 需要进行分频传输时，分频传输CPU板的数目为N，N至少为1；高频传输CPU板的数目为1；高频传输CPU板不进行插值计算，仅将256点/周波的高频采样数据进行传输，从而减轻高频采集CPU板的负荷，保证高频采集CPU板采集高频采样数据时装置稳定运行。
步骤2：通过不同的分频传输CPU板获取分频数据；具体步骤为：
步骤2-1：定制分频数据；分频传输CPU板通过硬件拨码定制分频数据；分频传输CPU板通过设置不同的分频拨码输出不同频率的采样数据；各分频传输CPU板既可单独印制，也可统一印制，当采用统一印制时，各分频传输CPU板的硬件结构完全相同；不同分频传输CPU板仅通过硬件拨码实现不同频率的输出，确保不同分频传输CPU板故障后的互换性；
步骤2-2：通过分频传输CPU板的数字信号处理器对高频数据进行插值，获取分频数据；数字信号处理器采用分段抛物线插值算法对高频数据进行差值计算；分频传输CPU板包括分频FPGA电路和分频晶振电路。
(2)图3示出了采用高频采集模块、高频传输模块和分频传输模块对智能变电站进行高频采集和数据传输的具体结构图；基于图3所示的智能变电站通用数据采集方法为：
步骤1：高频采集模块通过光纤与电子式互感器相连，接收电子式互感器发送的高频数据；高频采集模块将256点/周波高频采样数据分别输出到高频传输模块和分频传输模块；高频采集模块、高频传输模块和分频传输模块集成在一个CPU板上，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时；分频传输模块的数目为N；高频传输模块的数目为1；高频传输模块不进行插值计算，仅将256点/周波的高频采样数据进行传输，从而减轻高频采集模块的负荷，保证高频采集模块高采集频数据时装置稳定运行；高频采集模块包括高频采集电路板；高频采集电路板包括高频晶振电路和高频采样FPGA电路；
步骤2：通过不同的分频传输模块获取分频数据，具体步骤为：
获取分频数据的具体步骤为：
步骤2-1：定制分频数据；分频传输模块通过硬件拨码定制分频数据；分频传输CPU模块通过设置不同的分频拨码输出不同频率的采样数据；各分频传输模块的硬件结构完全相同，不同分频传输CPU模块仅通过硬件拨码实现不同频率的输出，确保不同分频传输CPU模块故障后的互换性；
步骤2-2：通过分频传输模块的数字信号处理器对高频数据进行插值，获取分频数据；数字信号处理器采用分段抛物线插值算法对高频数据进行差值计算；分频传输模块包括分频FPGA电路和分频晶振电路。
本实施例中当256点/周波高频采样数据插值成80点/周波时，其截断误差为7.28*10-5， 相对误差为9.28*10-4，满足采样的精度要求。
本实施例采用统一的同步时钟信号能够确保24点/周波～256点/周波内不同频率的采样数据均在1s内传输完成，能够有效避免分频晶振电路在缺乏对时情况下自身时钟误差的累积而导致的数据传输异常；通过总线背板将对时同步的脉冲信号线路并行起来，如此可保证当对时信号来临时，所有CPU板或模块都将依据时钟计算器清零，确保所有数据的内部一致性；若各分频传输CPU板或分频传输模块之间仅通过各自的分频FPGA电路进行分频而不进行统一的同步，由于分频FPGA电路之间存在的误差，经过一段时间后就会造成时间不同步；本实施例中传送80点/周波频率数据时，其频率为4000，数据计算器为0-3999，当对时脉冲来临后数据计算器清零，CPU板发送第0包数据，当第3999包报文发出后，理论上离下一个对时脉冲的时间差为250us，但实际装置只需要在此之前将报文发出即可；通过各CPU板或模块的统一对时同步，确保报文发送的开始和结束的两个时间实现同步，中间环节的报文发送的等间隔由各个分频FPGA电路实现，可有效提高报文发送的准确性和稳定性。
本实施例提供的一种智能变电站通用数据采集方法，仅通过一套采集电路实现智能变电站全站保护、测量、计量和PMU装置等各类不同应用对不同采样频率的需求，减少数据采集设备配置数量，简化智能变电站设计，降低变电站的建设成本。
最后应当说明的是：所描述的实施例仅是本申请一部分实施例，而不是全部的实施例。基于本申请中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，都属于本申请保护的范围。

Claims (6)

  1. 一种智能变电站通用数据采集方法，其特征在于，所述方法包括下述步骤：
    步骤1：高频采集所述智能变电站的电压信号和电流信号，获得高频采样数据；
    步骤2：获取所述高频采样数据的分频数据；以及
    步骤3：对所述分频数据进行标准化传输。
  2. 如权利要求1所述的一种智能变电站通用数据采集方法，其特征在于，所述步骤1中通过高频采集CPU板或高频采集模块采集所述高频采样数据；所述高频采集CPU板或所述高频采集模块通过光纤与电子式互感器相连，接收所述电子式互感器发送的所述高频采样数据；
    所述高频采集CPU板将采集的256点/周波高频采样数据分别输出到高频传输CPU板和分频传输CPU板；所述高频采集模块将所述256点/周波高频采样数据分别输出到高频传输模块和分频传输模块；所述分频传输CPU板和所述分频传输模块的数目均为N，N至少为1；所述高频传输CPU板和所述高频传输模块的数目均为1；
    所述高频采集CPU板和所述高频采集模块均包括高频采集电路板；所述高频采集电路板包括高频晶振电路和高频采样FPGA电路；所述高频晶振电路用于产生256点/周波脉冲；所述高频采样FPGA电路依据所述高频晶振电路的晶振频率向所述电子式互感器发送高频采样脉冲，并接收所述电子式互感器反馈的所述高频采样数据。
  3. 如权利要求1或2所述的一种智能变电站通用数据采集方法，其特征在于，所述步骤2中获取所述分频数据包括：
    步骤2-1：定制所述分频数据；所述分频传输CPU板或所述分频传输模块通过硬件拨码定制所述分频数据；所述分频传输CPU板或所述分频传输CPU模块通过设置不同的分频拨码输出不同频率的采样数据；
    步骤2-2：通过所述分频传输CPU板或所述分频传输模块的数字信号处理器对所述高频采样数据进行插值，获取所述分频数据；所述数字信号处理器采用分段抛物线插值算法对所述256点/周波高频采样数据进行差值计算。
  4. 如权利要求3所述的一种智能变电站通用数据采集方法，其特征在于，所 述分频传输CPU板和所述分频传输模块均包括分频FPGA电路和分频晶振电路；所述分频晶振电路用于产生与所述分频拨码相对应的分频脉冲；所述分频FPGA电路依据所述分频脉冲进行数据传输。
  5. 如权利要求1所述的一种智能变电站通用数据采集方法，其特征在于，所述步骤3中所述分频数据通过符合IEC61850-9-2标准的点对点或组网方式进行传输。
  6. 如权利要求2所述的一种智能变电站通用数据采集方法，其特征在于，所述高频采集CPU板、所述高频传输CPU板和所述分频传输CPU板集成在一个装置上，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时；
    所述高频采集模块、所述高频传输模块和所述分频传输模块集成在一个CPU板上，并统一采用符合IRIG-B或IEEE1588标准的时钟同步信号进行同步对时。
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