WO2015056036A1 - Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur - Google Patents

Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur Download PDF

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Publication number
WO2015056036A1
WO2015056036A1 PCT/IB2013/002285 IB2013002285W WO2015056036A1 WO 2015056036 A1 WO2015056036 A1 WO 2015056036A1 IB 2013002285 W IB2013002285 W IB 2013002285W WO 2015056036 A1 WO2015056036 A1 WO 2015056036A1
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WO
WIPO (PCT)
Prior art keywords
video
main control
interface
control interface
switch system
Prior art date
Application number
PCT/IB2013/002285
Other languages
English (en)
Inventor
Ismail OZSARAC
Original Assignee
Aselsan Elektronik Sanayi Ve Ticaret Anonim Sirketi
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Aselsan Elektronik Sanayi Ve Ticaret Anonim Sirketi filed Critical Aselsan Elektronik Sanayi Ve Ticaret Anonim Sirketi
Priority to KR1020157033133A priority Critical patent/KR101701669B1/ko
Priority to PCT/IB2013/002285 priority patent/WO2015056036A1/fr
Publication of WO2015056036A1 publication Critical patent/WO2015056036A1/fr

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/222—Studio circuitry; Studio devices; Studio equipment
    • H04N5/262—Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/268—Signal distribution or switching

Definitions

  • the present invention relates to a system and method to switch videos in FPGA. Background of the Invention
  • European patent document EP1956832 discloses a video switch for allowing at least two users to view video data from respective ones of at least two video sources.
  • the video switch comprises a switch for selecting one of the at least two video sources and at least one sampler connected to the switch.
  • the sampler is for sampling video data from the at least two video sources.
  • the video switch further comprises a controller for controlling the switch and sampler to select one of the at least two video sources and sample a frame of video data.
  • An output is provided for transmitting video data to one of the at least two users.
  • the output supports a maximum number of simultaneous users which is at least two, and the number of samplers in the video switch is less than the maximum number of simultaneous users; a video switch according to the present invention allows a sampler for capturing video data to be shared between at least two simultaneous users. This reduces the cost size and complexity of the hardware required to implement a video switch.
  • the sampler may comprise a programmable Phase Locked Loop which can optionally have a fast lock mode.
  • this system requires video frame buffers and on the other side video frame buffering requires external memory usage.
  • video frame buffering adds video latency.
  • United States patent document US20050046748 discloses systems and methods for performing video switching between multiple inputs and outputs are disclosed.
  • a system in one embodiment, includes a video box coupled to one or more user interfaces, a plurality of video inputs, and a plurality of video outputs.
  • the video box includes a video controller coupled to the one or more user interfaces and a video switch coupled to the plurality of video inputs and the plurality of video outputs.
  • Activation of the user interface generates a video control signal that is sent to the generated video control signal.
  • the video controller generates a video switching signal based on the received video control signal.
  • the video switch connects one or more of the plurality of video inputs to one or more of the plurality of video outputs based on the generated video control signal.
  • FIFO's are not used for the video switching, actually FIFO's are used for hiding the video switching commands.
  • this system does not use FPGA for video switching, it uses a special microchip which is produced by Analog Devices, and in this system video switching process is performed on the hardware not on software.
  • Cisoka CMOS complementary metal-oxide-semiconductor
  • a manageable video matrix switching equipment comprising a W77E58 single chip microcomputer module, an AD81 15 video matrix switching module, an AD8054 video driving module, an FPGA (Field Programmable Gate Array) video detecting module and other functional modules.
  • a W77E58 single chip microcomputer module comprising a W77E58 single chip microcomputer module, an AD81 15 video matrix switching module, an AD8054 video driving module, an FPGA (Field Programmable Gate Array) video detecting module and other functional modules.
  • an AD81 15 video matrix switching module
  • an AD8054 video driving module
  • an FPGA Field Programmable Gate Array
  • the manageable video matrix switching equipment has the advantages that by application of the scheme of the manageable video matrix switching equipment, not only can a touch screen in a display console be used for carrying out matrix switching on eight paths of monitored video inputs and sixteen monitored video outputs as required and transmitting the switched video inputs and video outputs to required departments so as to make related important departments capable of timely and effectively monitoring the operation condition of important equipment or situations related to important places, but also the functions of carrying out state monitoring and switching management on the equipment through equipment management software, selecting on whether to receive network remote control channel switching and the like can be fulfilled. Meanwhile, the eight paths of input videos can be physically detected through direct output.
  • the manageable video matrix switching equipment can play a great role in judging a fault without dismantling the display console under the conditions of limited ship space and testing equipment.
  • this system does not use FPGA for video switching, it uses a special microchip which is produced by Analog Devices,
  • Objective of the present invention is to eliminate the clock switch requirements.
  • Another objective of the present invention is to provide flexibility to adjust number of input and output videos.
  • Another objective of the present invention is to eliminate the need for frame buffers (external memory). Another objective of the present invention is to add no frame latency, less than line latency.
  • Another objective of the present invention is to provide user controls to switch between different inputs and outputs.
  • Figure 1 shows the system for the video switch.
  • Figure 2 shows method for the video switch.
  • the inventive system for the video switch system (1) essentially comprises;
  • At least one main control interface (2) which controls the video switch system (1), and which connects all other part of the video switch system
  • At least one video output interface (4) which takes the switched videos from the main control interface (2), and which sends the switched videos to the output,
  • At least one user interface (5) which captures the user selections and controls, and which send these commands to the main control interface
  • the inventive method for the video switch method (100) essentially comprises the steps of;
  • the inventive system for the video switch system (1) consists of main control interface (2) which controls the video switch system (1), and which connects all other part of the video switch system (1) to each other, video input interface (3) which captures the incoming video line, and which sends them to the main control interface (2), video output interface (4) which takes the switched videos from the main control interface (2), and which sends the switched videos to the output, user interface (5) which captures the user selections and controls, and which send these commands to the main control interface (2).
  • video input interface (3) contains a line FIFO.
  • the video synchronization signals vsync, hsync and data valid are captured by the video input interface (3).
  • the incoming pixel data is written to the FIFO by using the pixel clock and data valid signal by the video input interface (3).
  • step 102 sending video to the main control interface (2) with pixel clock by the video input interface (3)
  • step 103 sending video which comes from the video input interface (3) and comparing the incoming video's clock and main control interface's (2) local clock by main control interface (2)
  • main control interface (2) starts the read operation when the specific number of PIXEL DATA is written to the FIFO
  • step 104 switching video with the switching formula by main control interface (2)
  • the main control interface (2) is responsible for switching operation and the specific number for video called "wait" can be
  • step 105 "taking data address which is selected by user from the user interface (5) and assigning this address to the video for hiding control data of the video"
  • user interface (5) is responsible for the video flow controls and user interface (5) contains address spaces (registers) to keep the data.
  • WR EN signal is used to write data to address's.
  • the data includes the necessarily information for the video inputs and outputs, and this address is taken from user interface (5) by main control interface (2).
  • main control interface (2) sends video to the video output interface (4) with the local clock frequency.
  • video output interface (4) generates the necessary synchronization signals according to information stored in registers. The main information kept in registers:
  • video output interface (4) generates vsync out, hsync out, data valid out and pixel data out signals.
  • Input synchronization signals are buffered by local clock and the output synchronization signal are generated according to the input synchronization signal states. After that video output interface sends the selected video to the output.

Abstract

La présente invention concerne un système et un procédé pour commuter des vidéos dans une matrice prédiffusée programmable par l'utilisateur (FPGA). La présente invention a comme objectif d'éliminer les exigences de commutateur d'horloge. Un autre objectif de la présente invention est de fournir une certaine flexibilité pour régler le nombre de vidéos d'entrée et de sortie. Un certain autre objectif de la présente invention est d'éliminer le besoin de tampon de trame (mémoire externe). Un autre objectif de la présente invention est d'ajouter aucune latence de trame, encore moins une latence de ligne. Un autre objectif de la présente invention est de fournir des commandes d'utilisateur pour commuter entre différentes entrées et différentes sorties.
PCT/IB2013/002285 2013-10-14 2013-10-14 Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur WO2015056036A1 (fr)

Priority Applications (2)

Application Number Priority Date Filing Date Title
KR1020157033133A KR101701669B1 (ko) 2013-10-14 2013-10-14 Fpga의 적응형 소프트 비디오 스위치
PCT/IB2013/002285 WO2015056036A1 (fr) 2013-10-14 2013-10-14 Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/IB2013/002285 WO2015056036A1 (fr) 2013-10-14 2013-10-14 Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur

Publications (1)

Publication Number Publication Date
WO2015056036A1 true WO2015056036A1 (fr) 2015-04-23

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PCT/IB2013/002285 WO2015056036A1 (fr) 2013-10-14 2013-10-14 Commutateur de logiciel vidéo adaptatif pour des matrices prédiffusées programmables par l'utilisateur

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KR (1) KR101701669B1 (fr)
WO (1) WO2015056036A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109788214A (zh) * 2018-12-13 2019-05-21 中国科学院西安光学精密机械研究所 一种基于fpga的多路视频无缝切换系统和方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999052246A1 (fr) * 1998-04-03 1999-10-14 Avid Technology, Inc. Commande de commutation de connexions entre dispositifs informatiques et appareil a cet effet
US20020138716A1 (en) * 2001-03-22 2002-09-26 Quicksilver Technology, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US20050046748A1 (en) 2003-08-28 2005-03-03 Ellett Kirk D. Video switching systems and methods
EP1956832A2 (fr) 2007-02-08 2008-08-13 Adder Technology Limited Commutation vidéo et procédé d'échantillonnage de sources vidéo simultanées
US20090244393A1 (en) * 2008-04-01 2009-10-01 Tomoji Mizutani Signal switching apparatus and control method of signal switching apparatus
WO2011000041A1 (fr) * 2009-06-30 2011-01-06 Avega Systems Pty Ltd Systèmes et procédés destinés à fournir une synchronisation dans un environnement en réseau
CN202276408U (zh) 2011-10-28 2012-06-13 韩绍泽 一种可管理的视频矩阵切换设备

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SG135022A1 (en) * 2003-05-01 2007-09-28 Genesis Microchip Inc Method and apparatus for efficient transmission of multimedia data packets

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999052246A1 (fr) * 1998-04-03 1999-10-14 Avid Technology, Inc. Commande de commutation de connexions entre dispositifs informatiques et appareil a cet effet
US20020138716A1 (en) * 2001-03-22 2002-09-26 Quicksilver Technology, Inc. Adaptive integrated circuitry with heterogeneous and reconfigurable matrices of diverse and adaptive computational units having fixed, application specific computational elements
US20050046748A1 (en) 2003-08-28 2005-03-03 Ellett Kirk D. Video switching systems and methods
EP1956832A2 (fr) 2007-02-08 2008-08-13 Adder Technology Limited Commutation vidéo et procédé d'échantillonnage de sources vidéo simultanées
US20090244393A1 (en) * 2008-04-01 2009-10-01 Tomoji Mizutani Signal switching apparatus and control method of signal switching apparatus
WO2011000041A1 (fr) * 2009-06-30 2011-01-06 Avega Systems Pty Ltd Systèmes et procédés destinés à fournir une synchronisation dans un environnement en réseau
CN202276408U (zh) 2011-10-28 2012-06-13 韩绍泽 一种可管理的视频矩阵切换设备

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109788214A (zh) * 2018-12-13 2019-05-21 中国科学院西安光学精密机械研究所 一种基于fpga的多路视频无缝切换系统和方法

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KR20150143851A (ko) 2015-12-23
KR101701669B1 (ko) 2017-02-01

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