WO2015033881A1 - Organic thin film transistor - Google Patents

Organic thin film transistor Download PDF

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Publication number
WO2015033881A1
WO2015033881A1 PCT/JP2014/072889 JP2014072889W WO2015033881A1 WO 2015033881 A1 WO2015033881 A1 WO 2015033881A1 JP 2014072889 W JP2014072889 W JP 2014072889W WO 2015033881 A1 WO2015033881 A1 WO 2015033881A1
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Prior art keywords
electrode
film transistor
thin film
organic
semiconductor layer
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PCT/JP2014/072889
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French (fr)
Japanese (ja)
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昌弘 三谷
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シャープ株式会社
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10KORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/40Organic transistors
    • H10K10/46Field-effect transistors, e.g. organic thin-film transistors [OTFT]
    • H10K10/462Insulated gate field-effect transistors [IGFETs]
    • H10K10/466Lateral bottom-gate IGFETs comprising only a single gate

Definitions

  • the present invention relates to an organic thin film transistor, and more particularly to an organic thin film transistor including an organic semiconductor layer as a semiconductor layer.
  • a thin film transistor is provided as a switching element for each pixel which is the minimum unit of an image.
  • an inorganic semiconductor material is mainly used, such as an oxide semiconductor such as amorphous silicon, polysilicon, or indium gallium zinc oxide.
  • an organic thin film transistor having an organic semiconductor layer formed of an organic semiconductor material has been proposed. Since the organic thin film transistor can be formed at a low temperature (less than 200 ° C.), the selectivity of the substrate is improved. In addition, since the organic semiconductor layer can be formed using a coating process, the manufacturing cost can be reduced. Furthermore, due to the flexibility of organic materials (such as organic semiconductors and organic insulating films) constituting the device, it is also suitable for flexible display devices.
  • JP-A-2004-55654 Patent Document 1
  • JP-A-2010-161312 Patent Document 2
  • Patent Document 2 disclose such organic thin film transistors.
  • An organic thin film transistor disclosed in Patent Document 1 includes a source electrode and a drain electrode arranged so as to be opposed to each other, and an organic semiconductor layer having carrier mobility formed between the source electrode and the drain electrode. Is provided.
  • the source electrode and the drain electrode are made of materials having different work functions.
  • An organic thin film transistor disclosed in Patent Document 2 includes a source electrode and a drain electrode that are arranged so as to be opposed to each other, and an organic semiconductor layer having carrier mobility formed between the source electrode and the drain electrode. Is provided.
  • a thiol compound layer made of a benzenethiol compound having an electron donating group bonded to a benzene ring is formed on a portion of the source electrode and the drain electrode that are in electrical contact with the organic semiconductor layer.
  • the degree of carrier injection from the source electrode into the organic semiconductor layer can be changed, and as a result, only the threshold voltage can be selectively controlled.
  • the TFT characteristics when the TFT characteristics are measured in the dark state after the light is turned on / off without applying a voltage in the photo state, the TFT characteristics hardly change. That is, in the organic thin film transistor, the characteristic shift occurs only when a voltage is applied while applying light, and the TFT characteristic changes very slowly with respect to the subsequent light blocking.
  • This phenomenon is very problematic when the organic thin film transistor is used as a backplane of a liquid crystal display device. This is because, in a liquid crystal display device, strong light hits an organic thin film transistor in a state where a voltage is applied by light from a backlight. Similarly, in an organic EL (Electro Luminescence) display device, light hits an organic thin film transistor in a state where a voltage is applied by self-luminescence.
  • organic EL Electro Luminescence
  • the present invention has been made in view of the above problems, and an object of the present invention is to provide an organic thin film transistor that can easily extract charges accumulated in an organic semiconductor layer and has stable TFT characteristics. There is to do.
  • An organic thin film transistor includes a gate electrode, an organic semiconductor layer disposed to face the gate electrode, a gate insulating layer positioned between the gate electrode and the organic semiconductor layer, and the organic semiconductor layer. Connected to the organic semiconductor layer, and a body electrode connected to the organic semiconductor layer and for removing charges accumulated in the organic semiconductor layer.
  • the work function of the body electrode is preferably different from the work functions of the source electrode and the drain electrode.
  • the body electrode is preferably made of a material different from that of the source electrode and the drain electrode.
  • a monomolecular film is preferably formed at the interface between the body electrode and the organic semiconductor layer.
  • the organic semiconductor layer is preferably a p-type organic semiconductor layer.
  • the work function of the body electrode is the same as that of the source electrode or the drain electrode. It is preferably smaller than the work function.
  • the organic semiconductor layer is preferably an n-type organic semiconductor layer, and the work function of the body electrode is larger than the work function of the source electrode or the drain electrode. It is preferable.
  • the present invention it is possible to easily extract charges accumulated in the organic semiconductor layer and to provide an organic thin film transistor having stable TFT characteristics.
  • FIG. 1 is a plan view of an organic thin film transistor according to Embodiment 1.
  • FIG. 2 is a cross-sectional view corresponding to line II (A) -II (A) and a cross-sectional view corresponding to line II (B) -II (B) shown in FIG. 1 in a thin film transistor substrate including the organic thin film transistor shown in FIG.
  • FIG. 3 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. It is sectional drawing at the time of dividing
  • FIG. 20 is a diagram illustrating a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate illustrated in FIG. 19.
  • FIG. 6 is a cross-sectional view when a thin film transistor substrate including an organic thin film transistor according to a fourth embodiment is divided along a direction in which source and drain electrodes are arranged, and a cross-sectional view when divided along an extending direction of a body electrode. It is a figure which shows the process of forming the source electrode of the thin-film transistor substrate shown in FIG. 29, a drain electrode, and a body electrode. It is a figure which shows the process of surface-treating to the body electrode shown in FIG.
  • FIG. 33 is a diagram showing a first step of forming a body electrode of the thin film transistor substrate shown in FIG. 32. It is a figure which shows the 2nd process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG.
  • FIG. 33 is a diagram showing a step of forming a second protective layer and a gate insulating layer of the thin film transistor substrate shown in FIG. 32.
  • FIG. 33 is a diagram showing a step of forming a gate electrode of the thin film transistor substrate shown in FIG. 32.
  • FIG. 33 is a diagram showing a first step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 32.
  • FIG. 33 is a diagram showing a second step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 32.
  • FIG. 33 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 32. It is sectional drawing at the time of dividing along the extending direction of a body electrode, and sectional drawing at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor which concerns on Embodiment 6 along the direction where a source electrode and a drain electrode are arranged.
  • FIG. 33 is a diagram showing a first step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 32.
  • FIG. 33 is a diagram showing a second step of forming an inter
  • FIG. 44 is a diagram showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIG. 43.
  • FIG. 44 is a diagram showing a step of performing a surface treatment on the body electrode shown in FIG. 43. It is sectional drawing at the time of dividing along the extending direction of a body electrode, and sectional drawing at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor concerning Embodiment 7 along the direction where a source electrode and a drain electrode are arranged.
  • FIG. 47 is a diagram showing a first step of forming an organic semiconductor layer of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a first step of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a second step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a first step of forming a body electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a second step of forming the body electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a first step of forming a body electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a step of forming a gate insulating layer of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a step of forming a gate electrode of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a first step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a second step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIG. 46.
  • FIG. 47 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 46.
  • FIG. 46 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 46.
  • FIG. 9 is a cross-sectional view when a thin film transistor substrate including an organic thin film transistor shown in Embodiment 8 is divided along a direction in which a source electrode and a drain electrode are arranged, and a cross-sectional view when divided along an extending direction of a body electrode.
  • FIG. 59 is a diagram showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIG. 58.
  • FIG. 60 is a diagram showing a step of performing a surface treatment on the body electrode shown in FIG. 59. It is a figure which shows the top view of the organic thin-film transistor which concerns on Embodiment 9.
  • FIG. It is a figure which shows the energy level of the organic thin-film transistor shown in FIG.
  • FIG. 64 is a diagram showing a first example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63.
  • FIG. 64 is a diagram showing a second example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63.
  • FIG. 67 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66.
  • FIG. 67 is a diagram showing a second example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66.
  • FIG. 64 is a diagram showing a second example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66.
  • FIG. 67 is a diagram showing a third example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. It is a schematic sectional drawing which shows the 2nd form of the organic electroluminescence display which comprises the thin-film transistor substrate shown in FIG.
  • FIG. 71 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. 70.
  • FIG. 1 is a plan view of the organic thin film transistor according to the first embodiment.
  • 2A and 2B are cross-sectional views corresponding to the line II (A) -II (A) shown in FIG. 1 and II (B) -II (II) in the thin film transistor substrate having the organic thin film transistor shown in FIG. B) It is sectional drawing corresponding to a line.
  • FIG. 1 FIG. 2 (A), and (B)
  • the organic thin-film transistor which concerns on this Embodiment, and the thin-film transistor substrate provided with the same are demonstrated.
  • an organic thin film transistor 1 includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and a base coat.
  • the source electrode 14 a and the drain electrode 14 b are arranged side by side along a direction that is spaced apart from each other and intersects the direction in which the gate electrode 12 extends, and at least a part of the source electrode 14 a and the drain electrode 14 b sandwich the gate insulating layer 13. Are provided to overlap.
  • the source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
  • the body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12.
  • the body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
  • the organic semiconductor layer 19a covers the body electrode 17a and a portion of the gate insulating layer 13 located between the source electrode 14a and the drain electrode 14b, and on the upper surface of each of the source electrode 14a, the drain electrode 14b, and the body electrode 17a. At least partly touches. A portion of the organic semiconductor layer 19a located between the source electrode 14a and the drain electrode 14b faces the gate electrode 12 so as to sandwich the gate insulating layer 13 therebetween.
  • the organic thin film transistor 1 further includes a protective layer 20a provided on the organic semiconductor layer 19a and a mask layer 21A provided on the protective layer 20a.
  • the thin film transistor substrate 2 is provided so as to cover the organic thin film transistor 1, the interlayer protective layer 22 provided so as to cover the organic thin film transistor 1, and the interlayer protective layer 22.
  • the interlayer mask layer 23A, the source electrode terminal 25a connected to the source electrode 14a of the organic thin film transistor 1, the pixel electrode 25b connected to the drain electrode 14b of the organic thin film transistor 1, and the body electrode 17a of the organic thin film transistor 1 are connected.
  • Body electrode terminal 25c is connected to cover the organic thin film transistor 1, the interlayer protective layer 22 provided so as to cover the organic thin film transistor 1, and the interlayer protective layer 22.
  • Contact holes 24a, 24b, and 24c are formed in the interlayer mask layer 23A and the interlayer protection layer 22.
  • the contact hole 24a is provided so as to reach the source electrode 14a from the surface side of the interlayer mask layer 23A.
  • the contact hole 24b is provided so as to reach the drain electrode 14b from the surface side of the interlayer mask layer 23A.
  • the contact hole 24c is provided so as to reach the body electrode 17a from the surface side of the interlayer mask layer 23A.
  • the source electrode terminal 25a is connected to the source electrode 14a via the contact hole 24a
  • the pixel electrode 25b is connected to the drain electrode 14b via the contact hole 24b
  • the body electrode terminal 25c is connected to the contact hole 24c. Is connected to the body electrode 17a.
  • the organic semiconductor layer 19a a p-type organic semiconductor layer or an n-type organic semiconductor layer can be employed.
  • the material of the source electrode, the drain electrode, and the body electrode can be appropriately selected. Details thereof will be described later.
  • FIG. 3 is a diagram illustrating an example of energy levels when the organic thin film transistor illustrated in FIG. 1 includes a p-type organic semiconductor layer.
  • HOMO of the organic semiconductor material Highest Occupied Molecular Orbital: highest occupied molecular orbital
  • the source electrode S source electrode 14a
  • the drain electrode D drain electrode 14b
  • LUMO of the organic semiconductor material forming a body electrode BD (body electrode 17a) using (Lowest Unoccupied Molecular Orbital lowest unoccupied molecular orbital) metallic material having a work function close W BD level. That is, the body electrode BD is formed by a different metal material as a source electrode S and the drain electrode D, the work function W BD of body electrode BD is the work function W S of the source electrode S and the drain electrode D, smaller than W D Become.
  • the organic thin-film transistor 1 of the present embodiment since the work function W S of the source electrode S is close to HOMO level of the organic semiconductor layer 19a, the hole of the p-type organic semiconductor It can be easily injected into the layer 19a. For this reason, a large current can flow in the organic thin film transistor 1. Further, since the work function W BD of the body electrode BD is lower than the LUMO level of the organic semiconductor layer 19a, electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode BD. As a result, in the organic thin film transistor 1 according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • FIG. 4 is a diagram illustrating an example of energy levels when the organic thin film transistor illustrated in FIG. 1 includes an n-type organic semiconductor layer.
  • the organic semiconductor layer 19a is n-type
  • LUMO of the organic semiconductor material Liwest Unoccupied Molecular Orbital: lowest unoccupied molecular orbital
  • the source electrode S source electrode 14a
  • the drain electrode D drain electrode 14b
  • the organic HOMO of the semiconductor material forming a body electrode BD (body electrode 17a) using a metal material having a (Highest Occupied Molecular Orbital highest occupied molecular orbital) near the level the work function W BD. That is, the body electrode BD is formed by a different metal material as a source electrode S and the drain electrode D, the work function W BD of body electrode BD is the work function W S of the source electrode S and the drain electrode D, greater than W D Become.
  • the work function W S of the source electrode S is smaller than the LUMO level of the organic semiconductor layer 19a, an electron of an n-type organic It can be easily injected into the semiconductor layer 19a. For this reason, a large current can flow in the organic thin film transistor 1.
  • the work function W BD of the body electrode BD is close to the HOMO level of the organic semiconductor layer 19a, holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode BD.
  • stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • FIGS. 5A and 5B to FIGS. 15A and 15B are diagrams showing respective steps for manufacturing the thin film transistor substrate shown in FIGS. 2A and 2B. With reference to FIGS. 5A and 5B to FIGS. 15A and 15B, a method of manufacturing the thin film transistor substrate 2 shown in FIGS. 2A and 2B will be described.
  • FIGS. 5A and 5B are diagrams showing a base coat layer forming step of the thin film transistor substrate 2 shown in FIGS. 2A and 2B.
  • a base coat layer 11 made of an inorganic insulating film, an organic insulating film, or a combination of both is formed on the substrate 10 for the purpose of barrier properties such as moisture and oxygen. To do.
  • a glass substrate a plastic substrate such as PEN, PES, or PET, or a substrate in which a film material such as PEN, PES, PET, PI, or aramid or an organic insulating film is formed on a glass substrate as a support substrate Etc.
  • a film material such as PEN, PES, PET, PI, or aramid or an organic insulating film is formed on a glass substrate as a support substrate Etc.
  • the base coat layer 11 can be formed by forming a nitride film, an oxide film, a nitrided oxide film or the like by, for example, a CVD method.
  • coating resin such as a polyimide and zeonore, for example by a spin coat method, a slit coat method, etc.
  • FIGS. 6 (A) and 6 (B) are diagrams showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 2 (A) and 2 (B).
  • the gate electrode 12 is formed to a thickness of about 100 to 400 nm by vacuum deposition, sputtering, or the like.
  • the gate electrode 12 can be formed by forming a metal film of Al, Al—Si, Cu, W, Mo, MoW, Ti, Cr, or the like and a metal film having a laminated structure in which these are laminated. .
  • an adhesion layer such as Ti or Cr at the interface.
  • the gate electrode 12 is formed using a vacuum evaporation method, a separate patterning step is not required by depositing the metal film using a metal mask.
  • the gate electrode 12 In the case of forming the gate electrode 12 using the sputtering method, first, the metal film (gate electrode film) is formed on the entire main surface of the base coat layer 11, and then a photosensitive resist is applied on the gate electrode film. . Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the gate electrode 12 is patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
  • the pattern forming method of the gate electrode 12 is not limited to the above method, and a printing method using an electrically conductive paste, an electrolytic plating method, an electroless plating method, or the like can be employed.
  • FIGS. 7A and 7B are views showing a process of forming a gate insulating layer of the thin film transistor substrate shown in FIGS. 2A and 2B.
  • an organic insulating material such as polyvinylphenol (PVP) or polystyrene (PS) so as to cover the gate electrode 12 by spin coating, slit coating, ink jetting, printing, or the like.
  • PVP polyvinylphenol
  • PS polystyrene
  • FIGS. 8A and 8B are diagrams showing a process of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIGS. 2A and 2B.
  • the source electrode 14a and the drain electrode 14b are formed on the gate insulating layer 13 to a thickness of about 100 to 400 nm by vacuum deposition, sputtering, or the like.
  • the materials of the source electrode 14a and the drain electrode 14b are the same material, and can be selected according to the type of the organic semiconductor layer 19a formed in a later process.
  • the organic semiconductor layer 19a is p-type
  • a material having a large work function and a small hole injection barrier to the p-type organic semiconductor layer 19a is adopted as a material for the source electrode 14a and the drain electrode 14b.
  • a metal film of Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, or the like, and a metal film having a laminated structure in which these are laminated are combined. Can be adopted.
  • a material having a small work function and a small barrier for injecting electrons into the n-type organic semiconductor layer 19a may be employed as the material for the source electrode 14a and the drain electrode 14b.
  • a metal film of Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, Cr or the like and a metal film having a laminated structure in which these are laminated and combined can be employed. .
  • the material of the source electrode 14a and the drain electrode 14b is Al (work function: about 4.3 eV).
  • the electron injection barrier height is small (about ⁇ 0.2 eV)
  • electrons can be easily injected from the source electrode 14a to the organic semiconductor layer 19a, and a large current flows through the organic thin film transistor 1.
  • an adhesion layer such as Ti or Cr may be formed between the gate insulating layer 13 and the source electrode 14a and drain electrode 14b. Good.
  • the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
  • the source electrode 14a and the drain electrode 14b are formed by sputtering, first, the metal film (source / drain electrode film) is formed over the entire main surface of the gate insulating layer 13. Then, a photosensitive resist is applied on the source / drain electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a and the drain electrode 14b are patterned by performing wet etching or dry etching on the gate electrode film using the photosensitive resist as a mask.
  • the pattern forming method of the source electrode 14a and the drain electrode 14b is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste can be employed.
  • FIGS. 9A, 9B, 10A, and 10B show the first and second steps of the process of forming the body electrode of the thin film transistor substrate shown in FIGS. 2A and 2B.
  • FIG. 9A, 9B, 10A, and 10B show the first and second steps of the process of forming the body electrode of the thin film transistor substrate shown in FIGS. 2A and 2B.
  • FIG. 9A and 9B When the body electrode 17a is formed by using the sputtering method and the lift-off method, first, as shown in FIGS. 9A and 9B, the gate insulating layer 13 is formed so as to cover the source electrode 14a and the drain electrode 14b. After the positive photosensitive resist 15 is applied to the entire surface on the main surface, only the region where the body electrode 17a is to be formed is exposed and developed to remove the photosensitive resist 15.
  • the cross-sectional shape of the photosensitive resist 15 is desirably a reverse taper type so that the photosensitive resist 15 can be easily lifted off after the body electrode film 17 is formed. Other regions except the region where the body electrode 17a is to be formed are protected by the photosensitive resist 15.
  • the body electrode film 17 is formed to a thickness of about 100 to 400 nm on the entire surface of the substrate on which the photosensitive resist 15 has been formed by sputtering. Subsequently, as shown in FIGS. 10A and 10B, the body resist 17 is formed on the gate insulating layer 13 by removing the photosensitive resist 15 used as the deposition mask by lifting off with a stripping solution.
  • an adhesion layer such as Ti or Cr may be formed between the gate insulating layer 13 and the body electrode 17a.
  • the material of the body electrode 17a can be selected according to the type of the organic semiconductor layer 19a and the material of the source electrode 14a and the drain electrode 14b.
  • the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b. It is desirable to use a material having a small work function, and a laminated structure in which metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr are laminated and combined. The metal film can be used.
  • pentacene (HOMO level: about 5.3 eV) is adopted as the material of the p-type organic semiconductor layer 19a
  • Au work function: about 5.0 eV
  • Ca (work function: about 2.9 eV) can be used as the material of the body electrode 17a.
  • the organic semiconductor layer is interposed via the body electrode 17a.
  • the electrons accumulated in 19a can be easily extracted.
  • stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b in order to extract holes accumulated in the n-type organic semiconductor layer 19a by light irradiation. It is desirable to use a material having a large work function, such as Pt, Rh, Au, Cu, Ag, Ta, Al, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc.
  • a metal film having a laminated structure in which the layers are stacked and combined can be employed.
  • C60 fullerene (HOMO level: about 6.2 eV, LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, and Al is used as the material of the source electrode 14a and the drain electrode 14b.
  • Pt (work function: about 5.7 eV) can be employed as the material of the body electrode 17a.
  • the organic semiconductor layer is interposed via the body electrode 17a.
  • the holes accumulated in 19a can be easily extracted.
  • stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
  • the pattern formation method of the body electrode 17a is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste can be employed.
  • FIGS. 11A and 11B and FIGS. 12A and 12B show the first step of forming the organic semiconductor layer, protective layer, and mask layer of the thin film transistor substrate shown in FIGS. It is a figure which shows a 2nd process.
  • first, spin coating, slit coating is performed.
  • the organic semiconductor film 19 is formed on the entire substrate on which the source electrode 14a, the drain electrode 14b, and the body electrode 17a are formed using a method, an inkjet method, a printing method, a vapor deposition method, or the like.
  • the organic semiconductor film 19 is formed with a thickness of about 40 to 200 nm.
  • a protective film 20 made of an inorganic insulating film, an organic insulating film, or a laminated film combining these is formed on the organic semiconductor film 19 using the above method.
  • the organic insulating film 21 for forming the mask layer 21A is formed on the protective film 20 using the above method.
  • the protective film 20 and the organic insulating film 21 are each formed with a thickness of about 40 to 1000 nm.
  • pentacene As a material for the p-type organic semiconductor film 19 (organic semiconductor layer 19a), pentacene, soluble pentacene, TIPS pentacene, P3HT (Poly [3-hexyltiophene-2,5-diyl]), copper phthalocyanine, or the like may be employed. It can.
  • examples of the material of the n-type organic semiconductor film 19 (organic semiconductor layer 19a) include perylene diimide derivatives, C60 fullerene, fullerene derivatives, PCBM ([6,6] -Phenyl-C61-Butyric Acid Methyl Ester), SIMEF (Silylmethyl [ 60] fullerene) etc. can be adopted.
  • a nitride film, an oxide film, a nitrided oxide film, or the like can be employed when an inorganic insulating film is used, and when an organic insulating film is used.
  • Parylene, CYTOP (registered trademark) manufactured by Asahi Glass Co., Ltd., or the like can be used.
  • CYTOP registered trademark manufactured by Asahi Glass Co., Ltd., or the like
  • the organic insulating film 21 for example, a negative organic insulating film can be adopted.
  • the organic insulating film 21 has photosensitivity, and a part thereof functions as a mask.
  • the organic insulating film 21 is exposed and developed using a light shielding mask 82. At this time, the portion of the organic insulating film 21 that has been exposed to light that has passed through the opening 82a provided in the light shielding mask 82 is cured to become the mask layer 21A and remains on the protective film 20 after development.
  • the portion 21B of the organic insulating film 21 that has not been exposed to light is melted by development.
  • the organic semiconductor film 19 and the protective film 20 are collectively etched and patterned, whereby the organic semiconductor layer 19a, the protective layer 20a, and the mask are formed in an island shape as shown in FIGS. Layer 21A is formed.
  • the stacked body of the organic semiconductor layer 19a, the protective layer 20a, and the mask layer 21A is separated from the source electrode 14a and the drain electrode 14b that are arranged to face each other. It is formed so as to cover a part of the formed body electrode 17a.
  • Dry etching is performed using SF6, CHF3, CF4, O2, Ar, or a combination of these gases.
  • the protective layer 20a and the mask layer 21A are left as they are without ashing or the like in order to avoid damage to the organic semiconductor layer 19a due to ashing or the like.
  • the organic thin film transistor 1 according to the present embodiment can be manufactured through the above steps.
  • FIGS. 13A and 13B and FIGS. 14A and 14B show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 2A and 2B. It is a figure which shows a 2nd process. As shown in FIGS. 13A and 13B and FIGS.
  • the interlayer protective layer 22 and the interlayer mask layer 23A when forming the interlayer protective layer 22 and the interlayer mask layer 23A, first, spin coating, slit coating, Interlayer protection composed of an inorganic insulating film, an organic insulating film, or a laminated film combining these over the entire substrate on which the organic semiconductor layer 19a, the protective layer 20a, and the mask layer 21A are formed using an inkjet method, a printing method, a vapor deposition method, or the like. Layer 22 is formed. Subsequently, the organic insulating film 23 for forming the interlayer mask layer 23A is formed on the interlayer protective layer 22 by using the above method.
  • the interlayer protective layer 22 and the organic insulating film 23 are each formed with a thickness of about 200 to 1000 nm.
  • the interlayer protective layer 22 As a material for forming the interlayer protective layer 22, when using an inorganic insulating film, a nitride film, an oxide film, a nitrided oxide film, or the like can be adopted. When using an organic insulating film, parylene, Asahi Glass Co., Ltd. CYTOP (registered trademark) or the like can be used, and a combination of these inorganic insulating films and organic insulating films can also be used.
  • the organic insulating film 23 for example, a negative organic insulating film can be adopted.
  • the organic insulating film 23 has photosensitivity, and a part thereof functions as a mask.
  • the organic insulating film 23 is exposed and developed using a light shielding mask 81.
  • the portion of the organic insulating film 23 that has been exposed to light that has passed through the opening 81a provided in the light shielding mask 81 is cured to become the interlayer mask layer 23A, and remains on the interlayer protective layer 22 after development.
  • the portion 23B of the organic insulating film 23 that was not exposed to light is melted by development.
  • the light shielding mask 81 shields the region of the organic insulating film 23 where the contact holes 24a, 24b, 24c are formed and the region where the contact hole (not shown) reaching the gate electrode 12 is formed.
  • FIGS. 15A and 15B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIGS. 2A and 2B.
  • a source electrode terminal 25a, a pixel electrode 25b, and a body electrode terminal 25c are formed by vacuum deposition, sputtering, or the like.
  • the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c may be formed of the same material or different materials.
  • a conductive film such as Au, Ag, Cu, Al, or Mo, or a transparent conductive film such as IZO, ITO, CNT, or graphene can be used.
  • a transparent conductive film such as IZO, ITO, ZnO, or SnO for the pixel electrode 25b in order to extract light from the opening.
  • a reflective electrode such as Al, Al alloy, Ag, or Ag alloy is used for the pixel electrode 25b in order to extract light from the upper portion, or IZO, ITO, or the like is used as an upper layer.
  • a laminated structure electrode in which a transparent conductive film and a reflective electrode made of Al, Al alloy, Ag, Ag alloy, Mo, Cr or the like are combined in the lower layer.
  • the transparent conductive film is formed on the entire substrate on which the interlayer mask layer 23A is formed, and the transparent conductive film is patterned into a predetermined pattern, whereby the source electrode terminal 25a and the pixel electrode are formed. 25b and body electrode terminal 25c are formed.
  • a separate patterning process is not required by depositing the metal film using a metal mask.
  • the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c are formed by using a spin coating method, a slit coating method, an ink jet method, a printing method, or the like, as materials for forming these, Au, An ink containing nanoparticles such as Ag, Cu, Al, ITO, CNT, and graphene can be employed.
  • the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c are each formed with a thickness of about 100 to 600 nm.
  • a gate electrode terminal (not shown) may be formed simultaneously with the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c so as to cover the surface of the contact hole reaching the gate electrode 12 with the same material. .
  • the thin film transistor substrate 2 including the organic thin film transistor 1 having a bottom gate-bottom contact structure can be manufactured.
  • the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, so that the source electrode 14a and the drain electrode 14b are formed.
  • the work function and the work function of the body electrode 17a are different.
  • liquid crystal display panel or an organic EL panel using the thin film transistor substrate 2, a liquid crystal panel or an organic EL panel having a stable display quality that is hardly affected by light such as backlight, external light, and self-light emission. Can be obtained.
  • the organic thin film transistor 1 according to the present embodiment has a bottom contact structure in which the source electrode 14a and the drain electrode 14b are formed before the organic semiconductor layer 19a is formed, the source electrode 14a and the drain electrode 14b are formed.
  • photolithography can be used instead of the lift-off method. For this reason, the organic thin-film transistor 1 with a short channel length can be manufactured, and a high-definition display and a fine device can be manufactured using this.
  • FIGS. 16A and 16B are a cross-sectional view and a body electrode extending direction when the thin film transistor substrate including the organic thin film transistor according to the second embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along.
  • FIGS. 16A and 16B an organic thin film transistor 1A according to the present embodiment and a thin film transistor substrate 2A including the same will be described.
  • 16A shows a portion corresponding to FIG. 2A
  • FIG. 16B shows a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1A according to the present embodiment and the thin film transistor substrate 2A having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same.
  • the body electrode 17b When the body electrode 17b is subjected to a surface treatment, the body electrode 17b has a work function different from that of the source electrode 14a and the drain electrode 14b. It is the same.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and an SAM (Self Align Monolayer) film (self) is formed on the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • An organized monolayer 93) is formed. Even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b.
  • the work function of the drain electrode 14b and the work function of the body electrode 17b can be made different.
  • the self-assembled monolayer 93 can be selected according to the type of the organic semiconductor layer 19a.
  • MBT 4-Methyl Benzene Thiol
  • a metal material having a work function close to the HOMO (Highest Occupied Molecular Orbital) level of the organic semiconductor material is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b.
  • the work function of the body electrode 17b is the same as that of the source electrode 14a and It becomes smaller than the work function of the drain electrode 14b.
  • HBT 4-Hydroxy Benzene Thiol
  • FBT Fluoro Benzene Thiol
  • a metal material having a work function close to the LUMO (Lowest Unoccupied Molecular Orbital) level of the organic semiconductor material is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b.
  • the work function of the body electrode 17b Becomes larger than the work functions of the source electrode 14a and the drain electrode 14b.
  • the surface of the body electrode 17b is subjected to plasma treatment and UV treatment.
  • the work function of the body electrode 17b can be made different from that of the source electrode 14a and the drain electrode 14b.
  • the method for manufacturing the thin film transistor substrate according to the present embodiment basically conforms to the method for manufacturing the thin film transistor substrate 2 according to the first embodiment, and has a surface treatment step, so that the thin film transistor substrate 2 according to the first embodiment. This is different from the manufacturing method.
  • the method of manufacturing the organic thin film transistor 1A according to the present embodiment first, in the step of forming the base coat layer, the step of forming the gate electrode, and the step of forming the gate insulating layer, the thin film transistor substrate according to the first embodiment
  • the base coat layer 11, the gate electrode 12, and the gate insulating layer 13 are formed on the substrate 10 by performing the same process as in the manufacturing method 2.
  • FIGS. 17A and 17B are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 16A and 16B.
  • a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are gated to a thickness of about 100 to 400 nm. It is formed on the insulating layer 13.
  • the materials of the source electrode 14a, the drain electrode 14b, and the body electrode 17b are the same material, and can be selected according to the type of the organic semiconductor layer 19a.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of a material having a high work function and a small hole injection barrier to the p-type organic semiconductor layer 19a.
  • the metal film can be used.
  • the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: about 5.0 eV) can be employed.
  • the hole injection barrier height is small (about 0.3 eV)
  • holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and the organic thin film transistor 1A can be injected. A large current can flow.
  • the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b is a material having a small work function and a small barrier for electron injection into the n-type organic semiconductor layer 19a. It is preferable to adopt metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr, and a metal film having a laminated structure in which these are stacked and combined. can do.
  • the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 4.5 eV) can be employed.
  • the electron injection barrier height is small (about 0.5 eV)
  • electrons can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current flows into the organic thin film transistor 1A. Can flow.
  • Ti, Cr are interposed between the gate insulating layer 13 and the source electrode 14a, drain electrode 14b, and body electrode 17b.
  • An adhesive layer such as
  • the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed by sputtering, first, the above metal film (source / drain / body electrode film) is formed over the entire main surface of the gate insulating layer 13. ), A photosensitive resist is applied on the source / drain / body electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
  • the dry etching is performed using SF 6 , CHF 3 , CF 4 , Ar gas, and a combination thereof. After the etching, the photosensitive resist used as a mask is removed with a stripping solution. Thereby, the source electrode 14a and the drain electrode 14b are formed.
  • the pattern forming method of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste may be employed. it can.
  • FIGS. 18 (A) and 18 (B) are diagrams showing a step of performing a surface treatment on the body electrode shown in FIGS. 17 (A) and 17 (B).
  • the step of performing the surface treatment on the body electrode 17b first, the entire surface of the substrate 10 on which the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed is exposed to light. After the application of the resist 16, the resist is patterned by photolithography (exposure / development) so that only the surface of the body electrode 17b is exposed. Subsequently, a self-assembled monolayer 93 is applied to the entire surface of the substrate 10 on which the patterned photosensitive resist 16 is formed, and only the work function of the body electrode 17b is changed.
  • the resist is stripped with a stripping solution to remove the photosensitive resist 16 and the self-assembled monolayer 93 applied on the photosensitive resist 16.
  • the self-assembled monomolecular film 93 is formed so as to cover the surface of the body electrode 17b, and the work function of the body electrode 17b can be changed.
  • only the work function of the body electrode 17b may be changed by dropping the self-assembled monolayer 93 only in the body electrode 17b region by an ink jet method instead of the photolithography method.
  • resist coating or patterning by photolithography is not required, and the self-assembled monomolecular film can be directly formed so as to cover the surface of the body electrode 17b, so that the number of masks can be reduced. Thereby, manufacturing cost can be reduced.
  • the work function of the body electrode 17b is desirably smaller than the work functions of the source electrode 14a and the drain electrode 14b in order to extract accumulated electrons.
  • MBT 4-Methyl Benzene Thiol
  • the self-assembled monolayer 93 that reduces the work function.
  • the work function of the electrode (Au) can be reduced from about 5.0 eV to about 4.3 eV.
  • the work function of the body electrode (Cu) can be reduced from 4.7 eV to about 4.0 eV.
  • the work function of the body electrode 17b can be reduced to a value close to the LUMO level (about 3.5 eV) of pentacene, which is the p-type organic semiconductor layer 19a, so that the organic semiconductor layer 19a is interposed via the body electrode 17b.
  • the electrons accumulated inside can be easily extracted. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the work function of the body electrode 17b is preferably larger than the work functions of the source electrode 14a and the drain electrode 14b in order to extract accumulated holes.
  • HBT 4-Hydroxy Benzene Thiol
  • FBT Fluoro Benzene Thiol
  • the drain electrode 14b and the body electrode 17b HBT or FBT is applied to the surface of the body electrode 17b.
  • the work function of the body electrode (Au) can be increased from about 5.0 eV to about 5.2 eV.
  • the body electrode 17b when C60 fullerene is used as the n-type organic semiconductor material and Al is used as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, HBT or FBT is used as the surface of the body electrode 17b.
  • the work function of the body electrode (Al) can be increased from 4.3 eV to 4.5 eV.
  • the work function of the body electrode 17b can be brought close to the HOMO level (about 6.2 eV) of C60 fullerene, which is the n-type organic semiconductor layer 19a, so that it is accumulated in the organic semiconductor layer 19a via the body electrode 17b. Holes can be easily extracted. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the same process as that of the method for manufacturing the thin film transistor substrate according to the first embodiment is performed, thereby providing the organic thin film transistor 1A according to the present embodiment. Can be manufactured.
  • the same process as the method for manufacturing the thin film transistor substrate 2 according to the first embodiment is performed.
  • the thin film transistor substrate 2A including the organic thin film transistor 1A having the bottom gate-bottom contact structure can be manufactured.
  • the surface is formed only on the surface of the body electrode 17b.
  • the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
  • the body electrode 17b can be formed from the same material as the source electrode 14a and the drain electrode 14b, thereby reducing the number of processes and material costs. Manufacturing cost can be reduced.
  • FIGS. 19A and 19B are a cross-sectional view and a body electrode extending direction when the thin film transistor substrate including the organic thin film transistor according to the third embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along.
  • FIGS. 19A and 19B an organic thin film transistor 1B according to the present embodiment and a thin film transistor including the same will be described.
  • FIG. 19A shows a portion corresponding to FIG. 2A
  • FIG. 19B shows a portion corresponding to FIG.
  • the organic thin film transistor 1B according to the present embodiment and the thin film transistor substrate 2B having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same. Is different in that the source electrode 14a and the drain electrode 14b have a top contact structure instead of a bottom contact structure, and a protective layer and a mask layer are not formed accordingly. It is almost the same.
  • the organic thin film transistor 1B includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, a gate electrode 12 formed on the base coat layer 11, A gate insulating layer 13 formed on the base coat layer 11 so as to cover the gate electrode 12; an organic semiconductor layer 19a disposed on the gate insulating layer 13 so as to face the gate electrode 12 so as to sandwich the gate insulating layer 13; A source electrode 14a, a drain electrode 14b, and a body electrode 17a formed on the gate insulating layer 13 so as to be connected to the upper surface of the organic semiconductor layer 19a.
  • the source electrode 14 a and the drain electrode 14 b are arranged side by side along a direction that is spaced apart from each other and intersects the direction in which the gate electrode 12 extends, and at least a part of the source electrode 14 a and the drain electrode 14 b sandwich the gate insulating layer 13. Are provided to overlap.
  • the source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
  • the body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12.
  • the body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
  • the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
  • the manufacturing method of the thin film transistor substrate 2B according to the present embodiment is basically the same as the manufacturing method of the thin film transistor substrate 2 according to the first embodiment, and the organic semiconductor is formed before the step of forming the source electrode 14a and the drain electrode 14b.
  • the difference is that the step of forming the layer 19a is provided and the step of forming a protective layer and a mask layer on the organic semiconductor layer 19a is not provided.
  • the method of manufacturing the organic thin film transistor 1B according to the present embodiment first, in the step of forming the base coat layer, the step of forming the gate electrode, and the step of forming the gate insulating layer, the thin film transistor substrate according to the first embodiment
  • the base coat layer 11, the gate electrode 12, and the gate insulating layer 13 are formed on the substrate 10 by performing the same process as in the manufacturing method 2.
  • FIGS. 20A and 20B and FIGS. 21A and 21B are a first step and a second step of the step of forming the organic semiconductor layer of the thin film transistor substrate shown in FIGS. FIG.
  • a source electrode is formed using a spin coating method, a slit coating method, an ink jet method, a printing method, a vapor deposition method, or the like.
  • the organic semiconductor film 19 is formed to a thickness of 40 to 200 nm on the entire substrate on which the drain electrode 14b, the body electrode 17a, and the drain electrode 14b are formed.
  • the p-type organic semiconductor film 19 (organic semiconductor layer 19a)
  • pentacene for example, pentacene, soluble pentacene, TIPS pentacene, P3HT (Poly [3-hexyltiophene-2,5-diyl]), copper phthalocyanine, or the like is employed.
  • P3HT Poly [3-hexyltiophene-2,5-diyl]
  • copper phthalocyanine or the like is employed.
  • Examples of the material of the n-type organic semiconductor film 19 (organic semiconductor layer 19a) include perylene diimide derivatives, C60 fullerene, fullerene derivatives, PCBM ([6,6] -Phenyl-C61-Butyric Acid Methyl Ester), SIMEF (Silylmethyl [ 60] fullerene) etc. can be adopted. In the present embodiment, for example, it is preferable to employ C60 fullerene having excellent chemical resistance.
  • the photosensitive resist 26 is applied to the entire substrate 10 on which the organic semiconductor film 19 is formed, the photosensitive resist 26 is patterned by photolithography (exposure / development), and the region where the organic semiconductor film 19 is to be islanded is formed.
  • the photosensitive resist 26 is formed only on the top.
  • the organic semiconductor layer 19 is formed in an island shape on the gate insulating layer 13 by performing patterning by etching the organic semiconductor film 19.
  • Dry etching is performed using a gas such as SF 6 , CHF 3 , CF 4 , Cl 2 , O 2 , Ar, or a combination thereof. Subsequently, the entire substrate 10 is immersed in a stripping solution, and the upper surface of the organic semiconductor layer 19a is exposed by removing the photosensitive resist 26 on the organic semiconductor layer 19a.
  • a gas such as SF 6 , CHF 3 , CF 4 , Cl 2 , O 2 , Ar, or a combination thereof.
  • 22A, 22B, 23A, and 23B show a first step and a first step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIGS. 19A and 19B. It is a figure which shows 2 processes.
  • a positive type photosensitive film is formed on the entire substrate 10 on which the organic semiconductor layer 19a is formed.
  • a conductive resist 27 is applied.
  • the cross-sectional shape of the photosensitive resist 27 is desirably a reverse taper type so that the photosensitive resist 27 can be easily lifted off after the source / drain electrode film 14 is formed.
  • Other regions except the region where the source electrode 14a and the drain electrode 14b are formed are protected with a photosensitive resist 27.
  • the source / drain electrode film 14 is formed to a thickness of about 100 to 400 nm on the entire substrate 10 patterned with the photosensitive resist 27 by sputtering. At this time, a part of the source / drain electrode film 14 is cut by the step of the photosensitive resist pattern, so that the source / drain electrode film 14 is in contact with the end of the upper surface of the organic semiconductor layer 19a.
  • the photosensitive resist 27 used as a deposition mask is removed by lifting off with a stripping solution. Thereby, the source electrode 14a and the drain electrode 14b are formed.
  • the present invention is not limited to this, and is not limited thereto.
  • the source electrode 14a and the drain electrode 14b may be formed using a method or the like.
  • the organic semiconductor layer 19a is p-type
  • a material having a large work function and a small hole injection barrier to the p-type organic semiconductor layer 19a is adopted as a material for the source electrode 14a and the drain electrode 14b.
  • Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO2, MnO3, Ni, Ti, Cr, etc., and a metal film having a laminated structure in which these are laminated are employed. be able to.
  • a material having a small work function and a small barrier for injecting electrons into the n-type organic semiconductor layer 19a may be employed as the material for the source electrode 14a and the drain electrode 14b.
  • a metal film of Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, Cr or the like and a metal film having a laminated structure in which these are laminated and combined can be employed. .
  • the material of the source electrode 14a and the drain electrode 14b is Al (work function: about 4.3 eV).
  • the electron injection barrier height is small (about ⁇ 0.2 eV)
  • electrons can be easily injected from the source electrode 14a and the drain electrode 14b into the organic semiconductor layer 19a, which is large in the organic thin film transistor 1B. Current can flow.
  • a thin oxide film layer of about several nm is formed between the source electrode 14a and the drain electrode 14b and the organic semiconductor layer 19a. May be.
  • FIGS. 24A, 24B, 25A, and 25B show the first and second steps of forming the body electrode of the thin film transistor substrate shown in FIGS. 19A and 19B.
  • FIG. As shown in FIGS. 24A and 24B and FIGS. 25A and 25B, in the first step and the second step of forming the body electrode 17a, the thin film transistor according to the first embodiment is manufactured.
  • the body electrode 17a whose tip is in contact with the upper surface of the organic semiconductor layer 19a is formed by performing a process substantially similar to the method. Thereby, the organic thin-film transistor 1B which concerns on this Embodiment can be manufactured.
  • the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b. It is desirable to use a material having a small work function, and a laminated structure in which metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr are laminated and combined. The metal film can be used.
  • copper phthalocyanine (HOMO level: about 5.0 eV) is adopted as the material of the p-type organic semiconductor layer 19a
  • Au work function: about 5.0 eV
  • Ca (work function: about 2.9 eV) can be adopted as the material of the body electrode 17a.
  • the work function (about 2.9 eV) of the body electrode 17a is lower than the LUMO level (about 3.5 eV) of the organic semiconductor layer, the electrons accumulated in the organic semiconductor layer 19a are transferred to the body electrode 17a. Can be easily removed from the side.
  • stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b in order to extract holes accumulated in the n-type organic semiconductor layer 19a by light irradiation. It is desirable to use a material having a large work function, such as Pt, Rh, Au, Cu, Ag, Ta, Al, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc.
  • a metal film having a laminated structure in which the layers are stacked and combined can be employed.
  • C60 fullerene (HOMO level: about 6.2 eV, LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, and Al (work function :) is used as the material of the source electrode 14a and the drain electrode 14b.
  • Pt (work function: about 5.7 eV) can be adopted as the material of the body electrode 17a.
  • the work function (about 5.7 eV) of the body electrode 17a is close to the HOMO level (about 6.2 eV) of the organic semiconductor layer 19a, the holes accumulated in the organic semiconductor layer 19a are used as the body electrode. It can be easily extracted from the 17a side. As a result, in the organic thin film transistor 1B according to the present embodiment, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • a thin oxide film layer of about several nm may be formed between the body electrode 17a and the organic semiconductor layer 19a.
  • FIGS. 27 (A), (B) show the first step of forming the interlayer protective layer and interlayer mask layer of the thin film transistor substrate shown in FIGS. 19 (A), (B). It is a figure which shows a 2nd process.
  • 28A and 28B are diagrams showing a process of forming the pixel electrode, source electrode terminal, and body electrode terminal of the thin film transistor substrate shown in FIGS. 19A and 19B.
  • the step of forming the interlayer protective layer 22 and the interlayer mask layer 23A, the pixel electrode 25b, the source electrode terminal 25a, and the body electrode In the step of forming the terminals, the thin film transistor substrate 2B including the organic thin film transistor 1B having the bottom gate-top contact structure can be manufactured by performing substantially the same process as the manufacturing method of the thin film transistor substrate according to the first embodiment. .
  • the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, thereby forming the source electrode 14a and the drain electrode 14b.
  • the work function and the work function of the body electrode 17a are different.
  • the source electrode 14a and the drain electrode 14b are formed after the organic semiconductor layer 19a is formed, so that the organic semiconductor film 19 is applied and baked.
  • the source electrode 14a and the drain electrode 14b can be prevented from being oxidized.
  • the contact resistance defect can be reduced, and at the same time, the options for the source electrode and the drain electrode can be expanded.
  • FIGS. 29A and 29B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the fourth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along.
  • FIGS. 29A and 29B an organic thin film transistor 1C according to the present embodiment and a thin film transistor substrate 2C including the same will be described. Note that FIG. 29A illustrates a portion corresponding to FIG. 2A, and FIG. 29B illustrates a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1C according to the present embodiment and the thin film transistor substrate 2C having the same are the organic thin film transistor 1B according to the third embodiment and the thin film transistor substrate 2B having the same. Is different in that the body electrode 17b has a work function different from that of the source electrode and the drain electrode by subjecting the body electrode 17b to a surface treatment, and the other configurations are substantially the same. .
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b.
  • the work function of the drain electrode 14b and the work function of the body electrode 17b can be made different.
  • materials similar to those in the second embodiment can be employed as the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material for the organic semiconductor layer 19a, and the material for the self-assembled monolayer.
  • the surface of the body electrode 17b is subjected to plasma treatment and UV treatment.
  • the work function of the body electrode 17b can be made different from that of the source electrode 14a and the drain electrode 14b.
  • the method of manufacturing the thin film transistor substrate 2C according to the present embodiment basically conforms to the method of manufacturing the thin film transistor substrate 2B according to the third embodiment, and has a surface treatment process, and thus the thin film transistor substrate according to the third embodiment. It is different from the manufacturing method of 2B.
  • the step of forming the base coat layer first, in the step of forming the base coat layer, the step of forming the gate electrode, the step of forming the gate insulating layer, and the step of forming the organic semiconductor layer
  • the base coat layer 11, the gate electrode 12, the gate insulating layer 13, and the organic semiconductor layer 19 a are formed on the substrate 10 by performing the same process as in the method for manufacturing the thin film transistor substrate according to the third embodiment.
  • FIGS. 30 (A) and 30 (B) are diagrams showing a process of forming the source electrode, the drain electrode, and the body electrode of the thin film transistor substrate shown in FIGS. 29 (A) and 29 (B).
  • a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm. To do.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed by the sputtering method, after forming the source / drain / body electrode film on the entire substrate 10 on which the organic semiconductor layer 19a is formed, the source / drain / body electrode film is formed. A photosensitive resist is applied on the drain / body electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
  • the source electrode 14a and the drain electrode 14b that are in contact with the end of the upper surface of the organic semiconductor layer 19a, respectively, and the body electrode 17b whose tip is in contact with the upper surface of the organic semiconductor layer 19a are formed.
  • the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of a material having a high work function and a small hole injection barrier to the p-type organic semiconductor layer 19a.
  • the metal film can be used.
  • the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 5.0 eV) can be employed.
  • the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 5.0 eV) can be employed.
  • the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b is a material having a small work function and a small barrier for electron injection into the n-type organic semiconductor layer 19a. It is preferable to adopt metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr, and a metal film having a laminated structure in which these are stacked and combined. can do.
  • the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 5.0 eV) can be employed.
  • the electron injection barrier height is small (about 0.5 eV)
  • electrons can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current flows into the organic thin film transistor 1C. Can flow.
  • FIGS. 31 (A) and 31 (B) are views showing a step of performing surface treatment on the body electrode shown in FIGS. 30 (A) and 30 (B).
  • a self-assembled monolayer 93 is formed so as to cover the surface.
  • the self-assembled monolayer 93 the same material as that in Embodiment 2 can be used.
  • the work function of the body electrode (Au) can be reduced from about 5.0 eV to about 4.3 eV.
  • the work function of the body electrode (Cu) can be reduced from 4.7 eV to about 4.0 eV.
  • the work function of the body electrode 17b can be reduced to a value close to the LUMO level (about 3.5 eV) of copper phthalocyanine which is the p-type organic semiconductor layer 19a, the work function of the body electrode 17b is introduced into the organic semiconductor layer 19a via the body electrode 17b. Accumulated electrons can be easily extracted. As a result, in the organic thin film transistor 1C according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the drain electrode 14b and the body electrode 17b HBT or FBT is applied to the surface of the body electrode 17b.
  • the work function of the body electrode (Au) can be increased from about 5.0 eV to about 5.2 eV.
  • the work function of the body electrode (Al) can be increased from 4.3 eV to 4.5 eV.
  • the work function of the body electrode 17b can be brought close to the HOMO level (about 6.2 eV) of C60 fullerene, which is the n-type organic semiconductor layer 19a, the work function is accumulated in the organic semiconductor layer 19a via the body electrode 17b. Holes can be easily extracted. As a result, in the organic thin film transistor 1C according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
  • the same method as the method of manufacturing the thin film transistor substrate 2 according to the first embodiment the same method as the method of manufacturing the thin film transistor substrate 2 according to the first embodiment.
  • the thin film transistor substrate 2C including the organic thin film transistor 1C having the bottom gate-top contact structure can be manufactured.
  • the surface is formed only on the surface of the body electrode 17b.
  • the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
  • the body electrode 17b can be formed with the same material as the source electrode 14a and the drain electrode 14b, thereby reducing the number of steps and material cost, Manufacturing cost can be reduced.
  • 32A and 32B are cross-sectional views when the thin film transistor substrate including the organic thin film transistor according to the fifth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged, and in the extending direction of the body electrode. It is sectional drawing at the time of dividing along.
  • FIGS. 32A and 32B an organic thin film transistor 1D according to the present embodiment and a thin film transistor substrate 2D including the same will be described.
  • 32A shows a portion corresponding to FIG. 2A
  • FIG. 32B shows a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1D according to the present embodiment and the thin film transistor substrate 2D having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same. Is different from the bottom gate-bottom contact structure in that it is a top gate-bottom contact structure, and the other configurations are substantially the same.
  • the organic thin film transistor 1D includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and a source disposed on the base coat layer 11 so as to be separated from each other.
  • the base coat layer 11 located between the electrode 14a and the drain electrode 14b, the body electrode 17a disposed on the base coat layer 11 separately from the source electrode 14a and the drain electrode 14b, and the source electrode 14a and the drain electrode 14b.
  • an organic semiconductor layer 19a in contact with at least a part of the upper surface of each of the source electrode 14a, the drain electrode 14b, and the body electrode 17a.
  • the organic thin film transistor 1D includes a base coat layer 11 so as to cover the first protective layer 20a and the mask layer 21A provided to overlap the organic semiconductor layer 19a, and the mask layer 21A, the source electrode 14a, the drain electrode 14b, and the body electrode 17a.
  • the second protective layer 30 provided above, the gate insulating layer 13 provided so as to cover the second protective layer 30, and the organic semiconductor layer 19a provided on the gate insulating layer 13 so as to face each other.
  • the source electrode 14a and the drain electrode 14b are provided so that at least a part thereof overlaps the gate electrode 12 with the gate insulating layer 13 interposed therebetween.
  • the source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
  • the body electrode 17a is provided so as not to overlap the gate electrode 12.
  • the body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
  • the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
  • the thin film transistor substrate 2D includes an organic thin film transistor 1D, an interlayer protective layer 22 provided so as to cover the organic thin film transistor 1D, and an interlayer mask layer 23A provided so as to cover the interlayer protective layer 22.
  • a source electrode terminal 25a connected to the source electrode 14a of the organic thin film transistor 1 through the contact hole 24a, a pixel electrode 25b connected to the drain electrode 14b of the organic thin film transistor 1 through the contact hole 24b, and a contact hole 24c.
  • a body electrode terminal 25c connected to the body electrode 17a of the organic thin film transistor 1 via
  • Contact holes 24a, 24b, and 24c are formed in the interlayer mask layer 23A, the interlayer protection layer 22, the gate insulating layer 13, and the second protection layer 30.
  • the contact hole 24a is provided so as to reach the source electrode 14a from the surface side of the interlayer mask layer 23A.
  • the contact hole 24b is provided so as to reach the drain electrode 14b from the surface side of the interlayer mask layer 23A.
  • the contact hole 24c is provided so as to reach the body electrode 17a from the surface side of the interlayer mask layer 23A.
  • the manufacturing method of the thin film transistor substrate 2D according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate according to the first embodiment, and before the step of forming the gate insulating layer and the step of forming the gate electrode. , And a step of forming a source electrode and a drain electrode, a step of forming a body electrode, a step of forming an organic semiconductor layer, a protective layer and a mask layer, and a step of forming a second protective film.
  • the substrate 10 is subjected to the same processing as the method of manufacturing the thin film transistor substrate according to the first embodiment.
  • Base coat layer 11 is formed.
  • FIGS. 33 (A) and 33 (B) are diagrams showing a process of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B).
  • a process substantially similar to the method for manufacturing the thin film transistor substrate according to Embodiment 1 is performed, so that the base coat layer 11 is formed.
  • a source electrode 14a and a drain electrode 14b that are spaced apart from each other are formed.
  • FIGS. 34A and 34B and FIGS. 35A and 35B show the first step and the second step of the step of forming the body electrode of the thin film transistor substrate shown in FIGS. 32A and 32B.
  • FIG. As shown in FIGS. 34A and 34B and FIGS. 35A and 35B, in the first and second steps of forming the body electrode, the thin film transistor substrate according to the first embodiment is manufactured.
  • a body electrode 17a separated from the source electrode 14a and the drain electrode 14b is formed on the base coat layer 11 by performing a process substantially similar to the method.
  • This step is different from Embodiment 1 in that a photosensitive resist 15 is applied on the main surface of the base coat layer 11 so as to cover the source electrode 14a and the drain electrode 14b.
  • an adhesion layer such as Ti or Cr may be formed between the base coat layer 11 and the source electrode 14a and drain electrode 14b.
  • FIGS. 36 (A), (B) and FIGS. 37 (A), (B) are steps for forming the organic semiconductor layer, the first protective layer, and the mask layer of the thin film transistor substrate shown in FIGS. 32 (A), (B). It is a figure which shows the 1st process and 2nd process.
  • the organic semiconductor in the first embodiment is used in the step of forming the organic semiconductor layer, the first protective layer, and the mask layer.
  • the base coat layer 11 located between the source electrode 14a and the drain electrode 14b is covered by performing substantially the same process as the step of forming the layer, the protective layer, and the mask layer, and the source electrode 14a and the drain electrode 14b are covered.
  • an organic semiconductor layer 19a in contact with at least a part of the upper surface of each of the body electrodes 17a, a first protective layer 20a and a mask layer 21A formed so as to overlap the organic semiconductor layer 19a are formed.
  • FIGS. 38 (A) and 38 (B) are diagrams showing a process of forming the second protective layer and the gate insulating layer of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B).
  • FIGS. 38A and 38B in the step of forming the second protective layer 30 and the gate insulating layer 13, first, the organic semiconductor layer 19a, the first protective layer 20a, and the mask layer 21A are formed.
  • a second protective layer 30 made of an inorganic insulating film, an organic insulating film, or a combination film of these is formed on the entire formed substrate by using a spin coating method, a slit coating method, an ink jet method, a printing method, or the like. To do.
  • a nitride film, an oxide film, a nitrided oxide film or the like can be adopted as the inorganic insulating film, and a CYTOP manufactured by Parylene, Asahi Glass Co., Ltd. can be used as the organic insulating film. (Registered trademark) or the like can be adopted. Note that the step of forming the second protective layer 30 may be omitted.
  • the gate insulating layer 13 is formed with a thickness of about 200 nm to 1000 nm by applying an organic insulating material such as polyvinylphenol (PVP) or polystyrene (PS) to the entire substrate and then baking it.
  • PVP polyvinylphenol
  • PS polystyrene
  • FIGS. 39 (A) and 39 (B) are diagrams showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B).
  • a process substantially similar to the method for manufacturing the thin film transistor substrate 2 according to the first embodiment is performed, so that the gate electrode 13 is formed.
  • the gate electrode 12 is formed to face the organic semiconductor layer 19a. Thereby, the organic thin film transistor 1D according to the present embodiment is manufactured.
  • FIGS. 40 (A), (B) and FIGS. 41 (A), (B) show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 32 (A), (B). It is a figure which shows a 2nd process.
  • FIGS. 40A and 40B in the first step of forming the interlayer protective layer 22 and the interlayer mask layer 23A, the same process as the method for manufacturing the thin film transistor according to the first embodiment is performed.
  • the interlayer protection layer 22 is formed on the gate insulating layer 13 so as to cover the gate electrode 12, and the organic insulating film 23 for forming the interlayer mask layer 23 ⁇ / b> A is formed so as to cover the interlayer protection layer 22.
  • the organic insulating film 23 for example, a negative type organic insulating film can be adopted. By exposing and developing the organic insulating film 23 other than the region where the contact holes 24a, 24b, and 24c are formed, the contact is obtained. An interlayer mask layer 23A is formed in a region other than the region where the holes 24a, 24b, and 24c are to be formed.
  • FIGS. 42A and 42B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIGS. 32A and 32B.
  • the pixel electrode 25b, the source electrode terminal 25a, and the body electrode terminal 25c are formed by performing substantially the same process as the manufacturing method of the thin film transistor substrate 2 according to the first embodiment. Form.
  • a thin film transistor substrate including the organic thin film transistor 1D having a top gate-bottom contact structure can be manufactured.
  • the same material as that of the first embodiment is adopted as the material of the source electrode 14a and the drain electrode 14b, the material of the body electrode 17a, and the material of the organic semiconductor layer 19a. Can do.
  • the hole injection barrier height can be reduced by making the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow in the organic thin film transistor 1D.
  • the work function of the body electrode 17a is lower than the LUMO level of the organic semiconductor layer 19a, electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1D.
  • the work function of the body electrode 17a is close to the HOMO level of the organic semiconductor layer 19a, holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the light is irradiated or light is turned off regardless of whether the organic semiconductor layer 19a is p-type or n-type.
  • Stable TFT characteristics can be realized by suppressing a shift in TFT characteristics at the time.
  • the organic thin film transistor 1D according to the present embodiment and the thin film transistor substrate 2D having the same can obtain substantially the same effects as the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same.
  • FIGS. 43A and 43B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the sixth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along.
  • FIGS. 43A and 43B an organic thin film transistor 1E according to the present embodiment and a thin film transistor substrate 2E including the same will be described.
  • 43A shows a portion corresponding to FIG. 2A
  • FIG. 43B shows a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the same are the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same. Is different in that a body electrode 17b having a work function different from that of the source electrode 14a and the drain electrode 14b is provided by subjecting the body electrode 17b to a surface treatment, and the other configurations are substantially the same. It is.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b.
  • the work function of the drain electrode 14b and the work function of the body electrode 17b can be made different.
  • the same materials as those in Embodiment 2 can be employed. .
  • the method for manufacturing the thin film transistor substrate 2E according to the present embodiment is basically in accordance with the method for manufacturing the thin film transistor substrate 2D according to the fifth embodiment, and has a surface treatment step, and thus the thin film transistor substrate according to the fifth embodiment. It is different from the 2D manufacturing method.
  • the same process as that of the method of manufacturing the thin film transistor substrate 2D according to the fifth embodiment is performed.
  • the base coat layer 11 is formed.
  • FIGS. 44 (A) and 44 (B) are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 43 (A) and 43 (B).
  • a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material.
  • FIGS. 45 (A) and 45 (B) are diagrams showing a step of performing a surface treatment on the body electrode shown in FIGS. 43 (A) and 43 (B).
  • the body electrode 17b is subjected to substantially the same treatment as that of the thin film transistor substrate 2A according to the second embodiment.
  • a self-assembled monolayer 93 is formed so as to cover the surface. Thereby, the work function of the body electrode 17b can be changed.
  • the photosensitive resist 16 is applied on the base coat layer 11 on which the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed so that only the surface of the body electrode 17b is exposed.
  • the step of forming the organic semiconductor layer, the first protective layer and the mask layer, the step of forming the second protective layer and the gate insulating layer, the step of forming the gate electrode, the interlayer protective layer and the interlayer mask layer are formed.
  • the thin film transistor substrate according to the present embodiment is performed by performing the same process as the manufacturing method of the thin film transistor substrate 2D according to the fifth embodiment. 2E is formed.
  • the thin film transistor substrate 2E including the organic thin film transistor 1E having a top gate-bottom contact structure can be manufactured.
  • the surface is formed only on the surface of the body electrode 17b.
  • the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
  • the same materials as those in the second embodiment are employed. be able to.
  • the hole injection barrier height can be reduced by bringing the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow in the organic thin film transistor 1E.
  • the self-assembled monomolecular film 93 for example, MBT is applied on the surface of the body electrode 17b, so that the work function of the body electrode can be reduced to approach the LUMO level of the organic semiconductor layer 19a. Thereby, the electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1E.
  • the work function of the body electrode can be increased to approach the HOMO level of the organic semiconductor layer 19a.
  • the holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the organic thin film transistor 1E even when the organic semiconductor layer 19a is p-type or n-type, the light irradiation or light OFF is performed. Stable TFT characteristics can be realized by suppressing a shift in TFT characteristics at the time.
  • the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the same can obtain substantially the same effects as the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same.
  • the body electrode 17b can be formed using the same material as the source electrode 14a and the drain electrode 14b. Cost can be reduced.
  • FIGS. 46A and 46B are a cross-sectional view when the thin film transistor substrate including the organic thin film transistor according to the seventh embodiment is divided along the direction in which the source electrode and the drain electrode are arranged, and in the extending direction of the body electrode. It is sectional drawing at the time of dividing along.
  • FIGS. 46A and 46B an organic thin film transistor 1F according to the present embodiment and a thin film transistor substrate 2F including the same will be described.
  • 46A shows a portion corresponding to FIG. 2A
  • FIG. 46B shows a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1F according to the present embodiment and the thin film transistor substrate 2F having the same are the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same.
  • the source electrode 14a and the drain electrode 14b are different in that the first protective layer 20a and the mask layer 21A are not formed. Other configurations are almost the same.
  • the organic thin film transistor 1F includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and an organic semiconductor layer 19a formed on the base coat layer 11.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17a provided on the base coat layer 11 so as to be in contact with the end of the upper surface of the organic semiconductor layer 19a, and the organic semiconductor layer 19a, the source electrode 14a, the drain electrode 14b, and the body.
  • a gate insulating layer 13 provided on the base coat layer 11 so as to cover the electrode 17a and a gate electrode 12 provided so as to face the organic semiconductor layer 19a with the gate insulating layer 13 interposed therebetween are provided.
  • the source electrode 14a and the drain electrode 14b are disposed so as to be separated from each other, and are provided so that at least a part thereof overlaps the gate electrode 12 with the gate insulating layer 13 interposed therebetween.
  • the source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
  • the body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12.
  • the body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
  • the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
  • the manufacturing method of the thin film transistor substrate 2F according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate 2D according to the fifth embodiment, and is partially applied to the manufacturing method of the thin film transistor substrate 2B according to the third embodiment.
  • the manufacturing method of the thin film transistor substrate 2F according to the present embodiment includes a step of forming the organic semiconductor layer 19a before the step of forming the source electrode 14a and the drain electrode 14b, and a protective layer and a mask on the organic semiconductor layer 19a.
  • the method is different from the method of manufacturing the thin film transistor substrate 2D according to the fifth embodiment in that the layer forming step is not provided.
  • the base coat is applied to the substrate 10 by performing the same process as the method of manufacturing the thin film transistor substrate according to the fifth embodiment in the step of forming the base coat layer.
  • Layer 11 is formed.
  • FIGS. 47 (A), (B) and FIGS. 48 (A), (B) show the first step and the second step in the step of forming the organic semiconductor layer of the thin film transistor substrate shown in FIGS. 46 (A), (B).
  • FIG. 47 (A), (B) and FIGS. 48 (A), (B) substantially the same processing as the first step and the second step of the step of forming the organic semiconductor layer according to the third embodiment.
  • an organic semiconductor layer 19 a patterned in an island shape is formed on the base coat layer 11.
  • 49A, 49B, 50A, and 50B show the first step and the first step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIGS. 46A and 46B. It is a figure which shows 2 processes. As shown in FIGS. 49A and 49B and FIGS. 50A and 50B, substantially the same as the first step and the second step in the step of forming the source electrode and the drain electrode according to the third embodiment. By performing this process, the source electrode 14a and the drain electrode 14b are formed on the base coat layer 11 so as to be separated from each other and in contact with the end portion of the upper surface of the organic semiconductor layer 19a.
  • FIGS. 51A and 51B and FIGS. 52A and 52B show the first step and the second step of forming the body electrode of the thin film transistor substrate shown in FIGS. 46A and 46B.
  • FIG. As shown in FIGS. 51 (A), (B) and FIGS. 52 (A), (B), substantially the same processing as the first step and the second step of the step of forming the body electrode according to the third embodiment is performed.
  • the body electrode 17a is formed on the base coat layer 11 so as to be separated from the source electrode 14a and the drain electrode 14b and so that a part of the tip is in contact with the upper surface of the organic semiconductor layer 19a.
  • FIGS. 53 (A) and 53 (B) are views showing a process of forming a gate insulating layer of the thin film transistor substrate shown in FIGS. 46 (A) and 46 (B).
  • an organic semiconductor layer 19a, a source electrode 14a, a drain electrode 14b, and a process similar to those in the step of forming the gate insulating layer according to the fifth embodiment are performed.
  • Gate insulating layer 13 is formed on base coat layer 11 so as to cover body electrode 17a.
  • FIGS. 54 (A) and 54 (B) are views showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 46 (A) and 46 (B).
  • the organic semiconductor layer 19a is opposed to the gate insulating layer 13 by performing almost the same process as the step of forming the gate electrode according to the fifth embodiment.
  • the gate electrode 12 is formed on the gate insulating layer 13.
  • the organic thin film transistor 1F according to the present embodiment is formed.
  • FIGS. 55A and 55B and FIGS. 56A and 56B show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 46A and 46B. It is a figure which shows a 2nd process.
  • FIGS. 57A and 57B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. As shown in FIGS. 55A and 55B to FIGS.
  • the step of forming the interlayer protective layer and the interlayer mask layer according to the fifth embodiment, the pixel electrode, the source electrode terminal, and the body By performing substantially the same process as the step of forming the electrode terminals, the interlayer protective layer 22, the interlayer mask layer 23A, the pixel electrode 25b, the source electrode terminal 25a, and the body electrode terminal 25c are formed.
  • the thin film transistor substrate 2F including the organic thin film transistor 1F having a top gate-top contact structure can be manufactured.
  • the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, thereby forming the source electrode 14a and the drain electrode 14b.
  • the work function and the work function of the body electrode 17a are different.
  • the material similar to Embodiment 3 can be employ
  • the source electrode 14a and the drain electrode 14b are formed after the organic semiconductor layer 19a is formed. This can prevent the source electrode 14a and the drain electrode 14b from being oxidized when the organic semiconductor film 19 is applied and baked. As a result, in the method for manufacturing the thin film transistor substrate according to the present embodiment, contact resistance defects can be reduced, and at the same time, options for the source electrode and the drain electrode can be expanded.
  • 58A and 58B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the eighth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along.
  • FIGS. 58A and 58B an organic thin film transistor 1G according to the present embodiment and a thin film transistor substrate 2G including the same will be described.
  • 58A shows a portion corresponding to FIG. 2A
  • FIG. 58B shows a portion corresponding to FIG. 2B.
  • the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate 2G having the same are the organic thin film transistor 1F according to the seventh embodiment and the thin film transistor substrate 2F having the same.
  • the body electrode 17b is subjected to a surface treatment, the body electrode 17b has a work function different from that of the source electrode 14a and the drain electrode 14b. It is the same.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a.
  • the source electrode 14a and the drain are formed by forming the self-assembled monolayer so as to cover the surface of the body electrode 17b.
  • the work function of the electrode 14b and the work function of the body electrode 17b can be made different.
  • the same materials as those in Embodiment 4 can be employed. .
  • the manufacturing method of the thin film transistor substrate 2G according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment, and is partially applied to the manufacturing method of the thin film transistor substrate 2C according to the fourth embodiment. It conforms.
  • the manufacturing method of the thin film transistor substrate 2G according to the present embodiment is different from the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment in that it includes a surface treatment process.
  • the manufacturing method of the thin film transistor substrate 2G according to the present embodiment first, in the step of forming the base coat layer and the step of forming the organic semiconductor layer, substantially the same as the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment. By performing the treatment, the base coat layer 11 and the organic semiconductor layer 19a are formed on the substrate 10.
  • FIGS. 59A and 59B are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 58A and 58B.
  • a source electrode 14a, a drain electrode 14b, and a body electrode 17b that are patterned into a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material.
  • 60 (A) and 60 (B) are diagrams showing a process of performing a surface treatment on the body electrode shown in FIGS. 59 (A) and 59 (B).
  • the body electrode 17b is subjected to substantially the same treatment as that of the thin film transistor substrate 2C according to the fourth embodiment.
  • a self-assembled monolayer 93 is formed so as to cover the surface. Thereby, the work function of the body electrode 17b can be changed.
  • the photosensitive resist 29 is applied on the base coat layer 11 so that the surface of the body electrode 17b is exposed.
  • the step of forming the organic semiconductor layer, the first protective layer and the mask layer, the step of forming the second protective layer and the gate insulating layer, the step of forming the gate electrode, the interlayer protective layer and the interlayer mask layer are formed.
  • the thin film transistor substrate according to the present embodiment is performed by performing the same process as the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment. 2G is formed.
  • the thin film transistor substrate 2G including the organic thin film transistor 1G having a top gate-top contact structure can be manufactured.
  • the surface is formed only on the surface of the body electrode 17b.
  • the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
  • the same materials as those in the fourth embodiment are employed. be able to.
  • the hole injection barrier height can be reduced by bringing the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected from the source electrode 14a and the drain electrode 14b into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1G.
  • the self-assembled monomolecular film 93 for example, MBT is applied on the surface of the body electrode 17b, so that the work function of the body electrode can be reduced to approach the LUMO level of the organic semiconductor layer 19a. Thereby, the electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1G.
  • the self-assembled monomolecular film 93 for example, HBT or FBT is applied to the surface of the body electrode 17b, so that the work function of the body electrode can be increased to approach the HOMO level of the organic semiconductor layer 19a. Thereby, the holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
  • the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate having the organic thin film transistor 1G even when the organic semiconductor layer 19a is p-type or n-type, the light is irradiated or the light is turned off. Stable TFT characteristics can be realized by suppressing the TFT characteristic shift.
  • the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate 2G having the same can obtain substantially the same effects as the organic thin film transistor 1F according to the seventh embodiment and the thin film transistor substrate 2F having the same.
  • the body electrode 17b can be formed using the same material as the source electrode 14a and the drain electrode 14b. Cost can be reduced.
  • FIG. 61 is a plan view of an organic thin film transistor according to the ninth embodiment.
  • 62 is a diagram showing energy levels of the organic thin film transistor shown in FIG.
  • An organic thin film transistor 1H according to the present embodiment will be described with reference to FIGS.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material.
  • the source electrode 14a, the drain electrode 14b, and the body electrode 17b have the same work function, and the other configurations are substantially the same.
  • the body electrode 17b is applied to the source electrode 14a.
  • the charge accumulated in the organic semiconductor layer 19a can be extracted.
  • the organic semiconductor layer 19a is p-type and electrons are accumulated in the organic semiconductor layer 19a, a positive high voltage is applied to the body electrode 17b, so that electrons are extracted from the organic semiconductor layer 19a. Can be pulled out.
  • FIG. 64 is a diagram showing a first example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63.
  • a liquid crystal display device 100 according to the present embodiment will be described with reference to FIGS.
  • the case where the organic thin film transistor 1 according to the first embodiment is used as a switching element in the liquid crystal display device 100 will be described as an example, but instead of the organic thin film transistor 1 according to the first embodiment.
  • Any of the organic thin film transistors according to the second to ninth embodiments may be used as a switching element.
  • the liquid crystal display device 100 includes a liquid crystal display panel 90 and a backlight unit 45 that irradiates light toward the liquid crystal display panel 90.
  • the liquid crystal display panel 90 is provided between the thin film transistor substrate 2 disposed on the backlight unit 45 side, the counter substrate 42 disposed to face the thin film transistor substrate 2, and the thin film transistor substrate 2 and the counter substrate 42. And a liquid crystal layer 43.
  • the liquid crystal layer 43 is sealed between the thin film transistor substrate 2 and the counter substrate 42 by an annular sealing material (not shown) that bonds the thin film transistor substrate 2 and the counter substrate 42 to each other.
  • the liquid crystal layer 43 is made of a nematic liquid crystal material having electro-optical characteristics.
  • the counter substrate 42 includes a transparent substrate 40 such as a glass substrate, a color filter layer 41 formed on the main surface disposed on the liquid crystal layer 43 side, and a common electrode (not shown) formed on the color filter layer 41. Including. An alignment film for aligning the liquid crystal constituting the liquid crystal layer 43 is provided on the common electrode. An alignment film (not shown) is also provided on the thin film transistor substrate 2 so as to cover the entire surface on the pixel electrode 25b side.
  • the backlight unit 45 includes a light source 44 that emits light toward the liquid crystal display panel 90.
  • a light source 44 an LED, a cold cathode tube, or the like can be employed.
  • the thin film transistor substrate 2 has a plurality of scanning signal lines GL provided so as to extend in parallel to each other, and extend in parallel to each other in a direction intersecting the scanning signal lines GL.
  • a plurality of video signal lines DL provided and a plurality of constant potential lines VL provided so as to extend in parallel with the video signal lines DL are disposed between the adjacent video signal lines DL.
  • auxiliary capacitance lines are arranged between the adjacent scanning signal lines GL so as to extend in parallel with the scanning signal lines GL.
  • the organic thin film transistor 1 is provided in the vicinity of a portion where the plurality of scanning signal lines GL and the plurality of video signal lines DL intersect, and the organic thin film transistor 1 is provided for each pixel.
  • the gate electrode 12 (gate electrode G) of the organic thin film transistor 1 is connected to the scanning signal wiring GL.
  • the source electrode 14a (source electrode S) of the organic thin film transistor 1 is connected to the video signal wiring DL.
  • the drain electrode 14b (drain electrode D) of the organic thin film transistor 1 is connected to the pixel electrode 25b and the auxiliary capacitance electrode.
  • the body electrode 17a (body electrode BD) of the organic thin film transistor 1 is connected to the constant potential wiring VL.
  • the liquid crystal display device 100 includes a vertical operation circuit 50, a horizontal drive circuit 51, and a constant potential power circuit 52.
  • the vertical operation circuit 50 is connected to the scanning signal wiring GL via a gate terminal (not shown) provided at the end of the scanning signal wiring GL.
  • the horizontal drive circuit 51 is connected to the video signal line DL via a source electrode terminal 25a provided at the end of the video signal line DL.
  • the constant potential power circuit 52 is connected to the constant potential wiring VL via a body electrode terminal 25c provided at the end of the constant potential wiring VL.
  • the vertical operation circuit 50, the horizontal drive circuit 51, and the constant potential power supply circuit 52 function as drive circuits that drive a plurality of pixels in units of pixels.
  • the liquid crystal display device in each pixel, when the scanning signal is sent from the vertical operation circuit 50 to the gate electrode G via the scanning signal wiring GL, and the organic thin film transistor 1 is turned on, the image from the horizontal driving circuit 51 is displayed. A signal is sent to the source electrode S through the video signal wiring DL, and a predetermined charge is written into the pixel electrode 25b through the organic semiconductor layer 19a and the drain electrode D.
  • the light transmittance of the liquid crystal layer 43 is adjusted by changing the alignment state of the liquid crystal layer 43 according to the magnitude of the voltage applied to the liquid crystal layer 43 in each pixel. As a result, an image is displayed on the liquid crystal display device 100.
  • the liquid crystal display device 100 can realize a stable TFT characteristic by suppressing a shift of a threshold voltage during light irradiation or light OFF. As a result, the liquid crystal display device 100 can obtain a stable display quality that is not easily affected by light such as external light and backlight light.
  • the scanning signal wiring GL is preferably formed of the same material as the gate electrode in the step of forming the gate electrode of the organic thin film transistor 1.
  • the video signal line DL is preferably formed of the same material as the source electrode and the drain electrode in the step of forming the source electrode and the drain electrode of the organic thin film transistor 1.
  • the constant potential wiring VL is preferably formed of the same material as the body electrode in the step of forming the body electrode.
  • the source electrode, the drain electrode, and the body electrode are formed of the same material in the step of forming the source electrode, the drain electrode, and the body electrode.
  • FIG. 65 is a diagram showing a second example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63.
  • a liquid crystal display device 100A according to the present embodiment will be described with reference to FIG.
  • the liquid crystal display device 100A according to the present embodiment does not include the constant potential power supply circuit and the constant potential wiring, and the body electrode 17a is connected to the auxiliary capacitance wiring. In other respects, the configuration is substantially the same.
  • the body electrode 17a is configured to have the same potential as the auxiliary capacitance electrode and the common electrode, the charges (electrons or holes) accumulated in the organic semiconductor layer 19a by the light irradiation pass through the body electrode 17a. Sucked out of the auxiliary capacity wiring. Thereby, even in the liquid crystal display device 100 according to the present embodiment, substantially the same effect as the liquid crystal display device 100 according to the tenth embodiment can be obtained.
  • the body electrode 17a may be connected to the common electrode of the counter substrate 42.
  • FIG. 12 is a schematic cross-sectional view showing a first embodiment of an organic EL display device including the thin film transistor substrate shown in FIG.
  • FIG. 67 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG.
  • An organic EL display device 200 according to the present embodiment will be described with reference to FIGS. 66 and 67.
  • FIG. In the present embodiment the case where the organic thin film transistor 1 according to the first embodiment is used as an organic thin film transistor for driving EL in the organic EL display device 200 will be described as an example.
  • any one of the organic thin film transistors according to the second to ninth embodiments may be used as an organic thin film transistor for driving an EL.
  • a partition wall layer 31 provided on the thin film transistor substrate 2 an organic EL layer 32 provided on the pixel electrode 25b, a counter electrode 33 corresponding to a cathode electrode provided on the organic EL layer 32, and a counter electrode 33
  • a passivation layer 34 is provided so as to cover it, and a counter substrate 60 is disposed on the passivation layer 34.
  • the pixel electrode 25b corresponding to the anode electrode, the organic EL layer 32, and the counter electrode 33 corresponding to the cathode electrode constitute an organic light emitting diode OLED.
  • a transparent conductive film such as IZO, ITO, ZnO, or SnO can be used.
  • a reflective electrode such as Al, Al alloy, Ag or Ag alloy is used, or a transparent conductive film such as IZO or ITO is used as an upper layer, and Al, Al alloy or Ag is used as a lower layer. It is possible to use a laminated structure electrode in which reflective electrodes such as Ag alloy, Mo, and Cr are combined.
  • the organic EL layer 32 is configured by stacking a hole transport layer (HTL), an EL light emitting layer (EM), and an electron transport layer (ETL) in this order.
  • HTL hole transport layer
  • EM EL light emitting layer
  • ETL electron transport layer
  • TPD triphenyldiamine
  • the EL light emitting layer is preferably configured to be capable of color display by a red light emitting layer, a blue light emitting layer, and a green light emitting layer.
  • a red light emitting layer for example, tris (8-hydroxyquinoline) aluminum (Alq3) blended with DCJBT and rubrene can be employed.
  • the blue light emitting layer for example, DPVBi doped with BCzVBi can be employed.
  • the green light emitting layer for example, Alq3 doped with coumarin 540 can be employed.
  • a reflective electrode such as Al, Al alloy, Ag, or Ag alloy can be employed.
  • a transparent conductive film such as IZO, ITO, ZnO, SnO or a thin metal film such as Au, Ag, Mg, Mg—Ag is used (as a transparent counter electrode).
  • the passivation layer 34 is formed to prevent intrusion of moisture, oxygen, and the like.
  • an inorganic film such as SiN, SiO 2 , Al 2 O 3 , an organic film such as a resin, and a laminated film thereof are used. A combination of these can be used.
  • the counter substrate 60 a glass substrate or a plastic substrate such as PEN, PES, or PET can be employed.
  • the counter substrate 60 is bonded to the thin film transistor substrate on which the organic EL layer 32, the counter electrode 33, and the passivation layer 34 are formed with an adhesive or the like.
  • the thin film transistor substrate 2 has a plurality of scanning signal lines GL provided so as to extend in parallel to each other, and extend in parallel to each other in a direction intersecting the scanning signal lines GL.
  • a plurality of video signal lines DL provided and a plurality of anode current supply lines An provided between the adjacent video signal lines DL so as to extend in parallel to the video signal lines DL are provided. ing.
  • the anode current supply line An and the video signal line DL positioned away from the anode current supply line An are provided.
  • a region partitioned by is equivalent to a pixel.
  • an organic thin film transistor Ts for switching a charge storage capacitor Cs, an organic thin film transistor Td for driving an EL (organic thin film transistor 1), and an organic light emitting diode OLED are formed.
  • the gate electrode G of the organic thin film transistor Ts is connected to the scanning signal wiring GL.
  • the source electrode S of the organic thin film transistor Ts is connected to the video signal wiring.
  • the drain electrode D of the organic thin film transistor Ts is connected to one end side of the charge storage capacitor Cs and the gate electrode 12 of the organic thin film transistor Td for driving EL.
  • the source electrode 14a and the body electrode 17a of the organic thin film transistor Td are connected to the anode current supply wiring An.
  • the drain electrode 14b of the organic thin film transistor Td is connected to the anode electrode (pixel electrode 25b) of the organic light emitting diode OLED.
  • the other end side of the charge storage capacitor Cs is connected to the anode current supply wiring An.
  • the organic EL display device 200 includes a vertical operation circuit 50, a horizontal drive circuit 51, and an anode power supply circuit 53.
  • the vertical operation circuit 50 is connected to the scanning signal wiring GL via a gate terminal (not shown) provided at the end of the scanning signal wiring GL.
  • the horizontal drive circuit 51 is connected to the video signal line DL via a source electrode terminal 25a provided at the end of the video signal line DL.
  • the anode power supply circuit 53 is connected to the anode current supply wiring An via a terminal portion provided at the end of the anode current supply wiring An.
  • the vertical operation circuit 50, the horizontal drive circuit 51, and the anode power supply circuit 53 function as a drive circuit that drives a plurality of pixels in units of pixels.
  • each pixel when the scanning signal is sent from the vertical operation circuit 50 to the gate electrode G of the switching organic thin film transistor Ts via the scanning signal wiring GL, the horizontal driving circuit 51 is turned on.
  • the video signal is supplied to the source electrode S of the organic thin film transistor Ts through the video signal wiring DL.
  • the signal supplied to the source electrode S is held in the charge storage capacitor Cs.
  • the holding voltage of the charge storage capacitor Cs is a voltage between the gate electrode 12 and the source electrode 14a of the EL driving organic thin film transistor Td.
  • a constant current corresponding to the voltage between the gate electrode 12 and the source electrode 14a is supplied from the anode power supply circuit 53 to the organic light emitting diode OLED via the anode current supply wiring An and the organic thin film transistor Td for driving EL.
  • the organic light emitting diode OLED emits light and an image is displayed on the organic EL display device 200.
  • the body electrode 17a is connected to the anode current supply wiring An, so that the organic semiconductor is irradiated by light irradiation. Excess electrons accumulated in the layer 19a are sucked out from the anode current supply wiring An through the body electrode 17a.
  • the organic EL display device 200 can realize a stable TFT characteristic by suppressing a shift of a threshold voltage at the time of light irradiation or light OFF. As a result, in the organic EL display device 200, a stable display quality that is hardly affected by light such as external light or self-light emission can be obtained.
  • the organic EL display device 200 can be used for a display medium such as a display, and can be diverted to a light emitting device such as an illumination.
  • FIG. 68 is a diagram showing a second example of an equivalent circuit diagram of the organic EL display device shown in FIG. With reference to FIG. 68, an organic EL display device 200A according to the present embodiment will be described.
  • the organic EL display device 200A when compared with the organic EL display device 200 according to the twelfth embodiment, includes a constant potential power supply circuit 54 and a constant potential wiring HL. The difference is that the body electrode 17a is connected to the constant potential wiring HL, and the other configurations are substantially the same.
  • a plurality of constant potential wirings HL are provided between the adjacent scanning signal wirings GL so as to extend in parallel to the scanning signal wirings GL.
  • the organic semiconductor layer 19a included in the organic thin film transistor 1 When a p-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1, a positive high voltage is applied to the body electrode via the constant potential wiring HL. Thereby, surplus electrons accumulated in the organic semiconductor layer 19a by light irradiation are sucked out from the constant potential wiring HL through the body electrode 17a. Since the constant potential wiring HL is a separate system from the anode current supply wiring An, it is possible to apply a voltage more suitable for extracting surplus electrons. Thereby, even in the organic EL display device 200A according to the present embodiment, an effect equal to or higher than that of the organic EL display device 200 according to the twelfth embodiment is obtained.
  • FIG. 69 is a diagram showing a third example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. With reference to FIG. 69, an organic EL display device 200B according to the present embodiment will be described.
  • the body electrode 17a of the organic thin film transistor Td is the cathode electrode (counter electrode 33) of the organic light emitting diode OLED. Or it is different in that it is connected to the cathode current supply wiring CA and in that the organic semiconductor layer 19a is formed of an n-type organic semiconductor layer, and the other configurations are substantially the same.
  • the body electrode 17a is connected to the cathode electrode (counter electrode 33) or the cathode current supply wiring CA.
  • the excess holes accumulated in the organic semiconductor layer 19a by the light irradiation are sucked out from the cathode current supply wiring CA through the body electrode 17a.
  • FIG. 70 is a schematic cross-sectional view showing a second embodiment of the organic EL display device including the thin film transistor substrate shown in FIG. 71 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG.
  • An organic EL display device 200C according to the present embodiment will be described with reference to FIGS.
  • the organic EL display device 200C according to the present embodiment differs from the organic EL display device 200 according to the twelfth embodiment in the configuration of the organic EL layer 36. Accordingly, the pixel electrode 25b is an anode electrode.
  • the counter electrode 35 formed on the organic EL layer 36 functions not as a cathode electrode but as an anode electrode, and instead of the anode power supply circuit and the anode current supply wiring, the cathode power supply circuit 55 and the cathode current are used.
  • the supply wiring CA is provided, and the other configurations are substantially the same.
  • the organic EL layer 36 is configured by laminating an electron transport layer (ETL), an EL light emitting layer (EM), and a hole transport layer (HTL) in this order.
  • ETL electron transport layer
  • EM EL light emitting layer
  • HTL hole transport layer
  • a reflective electrode such as Al, Al alloy, Ag, or Ag alloy can be employed as the material of the cathode electrode (pixel electrode 25b).
  • a transparent conductive film such as IZO, ITO, CNT, or graphene, or a thin metal film such as Au or Ag can be used (as a transparent counter electrode).
  • an ink containing nanoparticles such as Au, Ag, Cu, Al, IZO, ITO, CNT, and graphene can be employed.
  • a scanning signal is sent from the vertical operation circuit 50 to the gate electrode G of the switching organic thin film transistor Ts via the scanning signal wiring GL.
  • a video signal is supplied from the horizontal drive circuit 51 to the source electrode S of the organic thin film transistor Ts via the video signal wiring DL.
  • the signal supplied to the source electrode S is held in the charge storage capacitor Cs.
  • the holding voltage of the charge storage capacitor Cs is a voltage between the gate electrode 12 and the source electrode 14a of the EL driving organic thin film transistor Td.
  • a constant current corresponding to the voltage between the gate electrode 12 and the source electrode 14a is supplied from the anode electrode (counter electrode 35) to the organic light emitting diode OLED via the organic thin film transistor Td for driving EL.
  • the organic light emitting diode OLED emits light and an image is displayed on the organic EL display device 200C.
  • any of a p-type semiconductor layer and an n-type semiconductor layer can be used as the organic semiconductor layer 19a included in the organic thin film transistor 1 (organic thin film transistor Td for driving EL), as shown in FIG.
  • this is particularly effective when an n-type semiconductor layer is used. That is, even if the performance of the organic EL layer deteriorates due to long-term energization or moisture and the voltage at the anode end changes, the current between the gate electrode 12 and the source electrode 14a that determines the current flowing in the organic thin film transistor Td for driving the EL is changed. This is because the voltage is not affected, and a constant current can flow through the organic thin film transistor Td and the organic EL layer. Thereby, the organic EL display device 200C having uniform and stable luminance (display quality) is obtained.
  • the body electrode 17a is connected to the cathode current supply wiring CA, so that excess holes accumulated in the organic semiconductor layer 19a due to light irradiation pass through the body electrode 17a. Sucked from the cathode current supply wiring CA.
  • the organic EL display device 200C can realize a stable TFT characteristic by suppressing a shift of a threshold voltage during light irradiation or light OFF. As a result, in the organic EL display device 200C, it is possible to obtain a stable display quality that is hardly affected by light such as external light or self-light emission.
  • the surface treatment is performed only on the body electrode when the source electrode, the drain electrode, and the body electrode are made of the same material.
  • the present invention is not limited to this, and even in the first, third, fifth, and seventh embodiments, the surface treatment may be performed only on the body electrode even when the body electrode is formed of a material different from that of the source electrode and the drain electrode.
  • the source electrode, the drain electrode, and the body electrode are made of the same metal material, and only the body electrode is subjected to a surface treatment, whereby the source electrode and the drain electrode are formed.
  • the present invention is not limited to this, and the source electrode, the drain electrode, and the body electrode are made of the same metal material, and the n-type organic semiconductor layer and p
  • the work function of the source and drain electrodes and the body electrode is formed by forming body electrodes having different surface orientations from the surface orientation of the source and drain electrodes, regardless of which type of organic semiconductor layer is used. May be adjusted.
  • Table 1 shows the work function for each plane orientation and the work function of polycrystalline in each electrode material.
  • the value of the work function is a value disclosed in various documents and may vary depending on the experimental environment or the like, but is known to be approximately the value shown in Table 1 below.
  • the plane orientation of the main surfaces of the source electrode 4a and the drain electrode 14b is mainly used. It is formed so as to be (100), and the surface orientation of the main surface of the body electrode 17b is mainly (110).
  • the work function of the body electrode 17b is approximately 4.8 eV, and the work function of the body electrode 17b is a value close to the LUMO level (about 3.5 eV) of pentacene, which is the p-type organic semiconductor layer 19a. Can be made smaller.
  • the surfaces of the main surfaces of the source electrode 4a and the drain electrode 14b It is formed so that the orientation is mainly (100), and the surface orientation of the main surface of the body electrode 17b is mainly (111).
  • the work function of the body electrode 17b is approximately 5.3 eV, and the work function of the body electrode 17b is brought close to the HOMO level (about 6.2 eV) of the C60 fullerene that is the n-type organic semiconductor layer 19a. be able to.
  • the materials of the source electrode 14a, the drain electrode 14b, and the body electrode 17b and their plane orientations are not limited to the above description, and are appropriately selected based on Table 1 within a range that does not depart from the spirit of the present invention. can do. Similarly, even when the material of the source and drain electrodes and the material of the body electrode are different, those materials and plane orientations can be appropriately selected based on Table 1.

Abstract

This organic thin film transistor (1) is provided with: a gate electrode (12); an organic semiconductor layer (19a) that is arranged so as to face the gate electrode (12); a gate insulating film that is interposed between the gate electrode (12) and the organic semiconductor layer (19a); a source electrode (14a) and a drain electrode (14b), which are connected to the organic semiconductor layer (19a) for the purpose of supplying an electric current to the organic semiconductor layer (19a); and a body electrode (17a) which is connected to the organic semiconductor layer (19a) for the purpose of extracting charges stored in the organic semiconductor layer (19a).

Description

有機薄膜トランジスタOrganic thin film transistor
 本発明は、有機薄膜トランジスタに関し、特に、半導体層として有機半導体層を備える有機薄膜トランジスタに関する。 The present invention relates to an organic thin film transistor, and more particularly to an organic thin film transistor including an organic semiconductor layer as a semiconductor layer.
 従来、薄型のディスプレイや薄型のタブレット型ディスプレイ、電子ペーパーといった薄型の表示デバイスには、ディスプレイ表示を行うために、スイッチング素子を格子状に配置したアクティブマトリクス型のバックプレーンが広く使用されている。 Conventionally, for thin display devices such as thin displays, thin tablet displays, and electronic paper, active matrix backplanes in which switching elements are arranged in a grid are widely used for display display.
 また、薄膜トランジスタ基板では、画像の最小単位である画素毎に、スイッチング素子として、例えば、薄膜トランジスタが設けられている。そして、スイッチング素子に使用される薄膜トランジスタの半導体層(活性層)には、例えば、アモルファスシリコンやポリシリコン、酸化インジウムガリウム亜鉛などの酸化物半導体など、主に、無機半導体材料が使用されている。 In the thin film transistor substrate, for example, a thin film transistor is provided as a switching element for each pixel which is the minimum unit of an image. For the semiconductor layer (active layer) of the thin film transistor used for the switching element, an inorganic semiconductor material is mainly used, such as an oxide semiconductor such as amorphous silicon, polysilicon, or indium gallium zinc oxide.
 しかし、無機半導体材料を用いた薄膜トランジスタを作製する場合、真空系の装置を使用し、更に、高温プロセス処理が必要であるため、製造コストが高くなり、また、耐熱性を有する基板が必要になる等の制約が生じる。また、無機半導体材料が使用されているため、例えば、基板を曲げた場合に、クラックが発生し易くなり、フレキシブルな表示デバイスには不向きであるという問題がある。 However, in the case of manufacturing a thin film transistor using an inorganic semiconductor material, a vacuum system is used, and further, high-temperature process treatment is required, which increases the manufacturing cost and requires a heat-resistant substrate. And other restrictions occur. In addition, since an inorganic semiconductor material is used, for example, when the substrate is bent, cracks are likely to occur, which is unsuitable for flexible display devices.
 そこで、近年、有機半導体材料により形成された有機半導体層を備えた有機薄膜トランジスタが提案されている。この有機薄膜トランジスタは、低温(200℃未満)で形成することができるため、基板の選択性が向上する。また、塗布系のプロセスを使用して有機半導体層を形成することができるため、製造コストを低下させることができる。さらに、デバイスを構成する有機材料(有機半導体や有機絶縁膜など)の可撓性により、フレキシブルな表示デバイスにも適している。 Therefore, in recent years, an organic thin film transistor having an organic semiconductor layer formed of an organic semiconductor material has been proposed. Since the organic thin film transistor can be formed at a low temperature (less than 200 ° C.), the selectivity of the substrate is improved. In addition, since the organic semiconductor layer can be formed using a coating process, the manufacturing cost can be reduced. Furthermore, due to the flexibility of organic materials (such as organic semiconductors and organic insulating films) constituting the device, it is also suitable for flexible display devices.
 このような有機薄膜トランジスタが開示された文献として、たとえば特開2004-55654号公報(特許文献1)および特開2010-161312号公報(特許文献2)が挙げられる。 For example, JP-A-2004-55654 (Patent Document 1) and JP-A-2010-161312 (Patent Document 2) disclose such organic thin film transistors.
 特許文献1に開示された有機薄膜トランジスタは、互いに離間して対峙するように配置されるソース電極およびドレイン電極と、ソース電極およびドレイン電極の間に成膜されたキャリア移動性を有する有機半導体層とを備える。当該ソース電極と当該ドレイン電極とは互いに異なる仕事関数を有する材料から構成される。 An organic thin film transistor disclosed in Patent Document 1 includes a source electrode and a drain electrode arranged so as to be opposed to each other, and an organic semiconductor layer having carrier mobility formed between the source electrode and the drain electrode. Is provided. The source electrode and the drain electrode are made of materials having different work functions.
 このような構成とすることにより、有機半導体への電荷注入障壁の小さい電気特性に優れる有機半導体トランジスタを実現することができる。 By adopting such a configuration, it is possible to realize an organic semiconductor transistor excellent in electrical characteristics with a small charge injection barrier to the organic semiconductor.
 特許文献2に開示された有機薄膜トランジスタは、互いに離間して対峙するように配置されるソース電極およびドレイン電極と、ソース電極およびドレイン電極の間に成膜されたキャリア移動性を有する有機半導体層とを備える。ソース電極およびドレイン電極のうち有機半導体層と電気的に接する部分に、ベンゼン環に結合した電子供与性基を有するベンゼンチオール化合物からなるチオール化合物層が形成されている。 An organic thin film transistor disclosed in Patent Document 2 includes a source electrode and a drain electrode that are arranged so as to be opposed to each other, and an organic semiconductor layer having carrier mobility formed between the source electrode and the drain electrode. Is provided. A thiol compound layer made of a benzenethiol compound having an electron donating group bonded to a benzene ring is formed on a portion of the source electrode and the drain electrode that are in electrical contact with the organic semiconductor layer.
 このように構成することにより、ソース電極から有機半導体層中へのキャリア注入の程度を変化させることができ、この結果、閾値電圧のみを選択的に制御することができる。 With this configuration, the degree of carrier injection from the source electrode into the organic semiconductor layer can be changed, and as a result, only the threshold voltage can be selectively controlled.
特開2004-55654号公報JP 2004-55654 A 特開2010-161312号公報JP 2010-161312 A
 一般的に、無機半導体材料を使用した無機薄膜トランジスタにあっては、当該無機薄膜トランジスタに光を照射した状態(Photo状態)にてTFT(Thin Film Transistor)特性を測定した場合には、暗状態(Dark状態)にてTFT特性を測定した場合と比較して、閾値電圧のシフトやオフ電流の増加が瞬時に起こり、TFT特性が一時的に変動する事がよく知られている。一方、光照射を止めて再び暗状態にてTFT特性を測定した場合には、TFT特性のシフトは瞬時に元に戻り、元の暗状態での特性を示すようになる。すなわち、無機薄膜トランジスタでは、光のON/OFFに対して、TFT特性は可逆的に、かつ、瞬時に応答する事が知られている。 Generally, in the case of an inorganic thin film transistor using an inorganic semiconductor material, when the TFT (Thin Film Transistor) characteristics are measured in a state where the inorganic thin film transistor is irradiated with light (Photo state), the dark state (Dark It is well known that the threshold voltage shift and off-current increase occur instantaneously and the TFT characteristics fluctuate temporarily compared to the case where the TFT characteristics are measured in the state). On the other hand, when the TFT characteristics are measured again in the dark state after the light irradiation is stopped, the shift of the TFT characteristics is instantaneously restored to show the characteristics in the original dark state. That is, it is known that an inorganic thin film transistor responds reversibly and instantaneously to ON / OFF of light.
 一方、有機半導体材料を使用した有機薄膜トランジスタにあっては、当該有機薄膜トランジスタに光を照射した状態(Photo状態)でTFT特性を測定した場合には、無機薄膜トランジスタの場合と同じように、閾値電圧のシフトやオフ電流の増加が瞬時に起こる。しかしながら、光照射を止めて再び暗状態にてTFT特性を測定した場合には、閾値電圧のシフトはすぐには元に戻らず、数時間から1日程度かけて、ゆっくりと元の暗状態の特性に戻る。 On the other hand, in the case of an organic thin film transistor using an organic semiconductor material, when the TFT characteristics are measured in a state where the organic thin film transistor is irradiated with light (Photo state), as in the case of the inorganic thin film transistor, the threshold voltage is reduced. Shifts and off current increases instantly. However, when the TFT characteristics are measured again in the dark state after the light irradiation is stopped, the threshold voltage shift does not immediately return to the original state, but slowly takes a few hours to a day to return to the original dark state. Return to characteristics.
 また、Photo状態で電圧を印加せずに光をON/OFFさせた後にDark状態でTFT特性を測定した場合には、TFT特性の変動はほとんど見られない。すなわち、有機薄膜トランジスタでは、光を当てながら電圧を印加した時のみ特性のシフトが起こり、かつ、その後の光の遮断に対してTFT特性は非常に緩慢に変化する。 Also, when the TFT characteristics are measured in the dark state after the light is turned on / off without applying a voltage in the photo state, the TFT characteristics hardly change. That is, in the organic thin film transistor, the characteristic shift occurs only when a voltage is applied while applying light, and the TFT characteristic changes very slowly with respect to the subsequent light blocking.
 この現象は、有機薄膜トランジスタを液晶表示装置のバックプレーンとして用いる上で非常に問題となる。なぜなら、液晶表示装置ではバックライトからの光によって、電圧が印加された状態の有機薄膜トランジスタに強い光が当たるからである。同様に、有機EL(Electro Luminescence)表示装置でも、自発光によって、電圧が印加された状態の有機薄膜トランジスタに光が当たる。 This phenomenon is very problematic when the organic thin film transistor is used as a backplane of a liquid crystal display device. This is because, in a liquid crystal display device, strong light hits an organic thin film transistor in a state where a voltage is applied by light from a backlight. Similarly, in an organic EL (Electro Luminescence) display device, light hits an organic thin film transistor in a state where a voltage is applied by self-luminescence.
 バックライトまたは自発光による光が有機薄膜トランジスタに当たることによってTFT特性が大きくシフトし、当該特性の変動が長時間戻らない場合には、液晶表示装置または有機EL表示装置の画素が正しく駆動されず、所望の映像が得られなくなるという問題が生じる。このため、上記の光によって有機半導体層に蓄積した電荷(電子または正孔)を抜き取ることが重要となる。 When the TFT characteristics are greatly shifted due to the light from the backlight or the self-emission light hitting the organic thin film transistor, and the fluctuation of the characteristics does not return for a long time, the pixels of the liquid crystal display device or the organic EL display device are not driven correctly, and the desired The problem arises that the video cannot be obtained. For this reason, it is important to extract charges (electrons or holes) accumulated in the organic semiconductor layer by the light.
 ここで、特許文献1に開示の有機薄膜トランジスタにあっては、ソース電極の材料としてドレイン電極と仕事関数が異なる材料を用いるため、ソース電極の仕事関数がイオン化ポテンシャルからある程度離れた場合には外部からの光によって有機半導体層に蓄積した電荷(例えば、p型半導体の場合、電子)を抜き取る効果は得られるが、逆にソース電極と有機半導体層との注入障壁が大きくなり、有機半導体層に蓄積した電荷(例えば、電子)と反対の極性を有する電荷(例えば、正孔)が注入されにくくなることが生じ得る。この場合には、電流が流れにくくなり、画素点灯に必要な電圧の書き込み不足による表示品位の低下が懸念される。 Here, in the organic thin film transistor disclosed in Patent Document 1, since a material having a work function different from that of the drain electrode is used as a material of the source electrode, when the work function of the source electrode is separated from the ionization potential to some extent, it is externally applied. The effect of extracting the charge (for example, electrons in the case of a p-type semiconductor) accumulated in the organic semiconductor layer by the light can be obtained, but conversely, the injection barrier between the source electrode and the organic semiconductor layer is increased and accumulated in the organic semiconductor layer. It may be difficult to inject charges (for example, holes) having the opposite polarity to the generated charges (for example, electrons). In this case, it becomes difficult for the current to flow, and there is a concern that display quality may be deteriorated due to insufficient writing of a voltage necessary for pixel lighting.
 特許文献2に開示の有機薄膜トランジスタ基板にあっては、有機半導体層に外部から当てられた光によって有機半導体層に蓄積した電荷を取り除くことについては、十分に考慮されていない。また、ソース電極の材料としてドレイン電極と仕事関数が異なる材料を用いる場合には、上述同様に電流が流れにくくなることが懸念される。 In the organic thin film transistor substrate disclosed in Patent Document 2, it is not sufficiently considered to remove charges accumulated in the organic semiconductor layer by light applied to the organic semiconductor layer from the outside. In addition, when a material having a work function different from that of the drain electrode is used as the material of the source electrode, there is a concern that it is difficult for current to flow as described above.
 本発明は、上記のような問題に鑑みてなされたものであり、本発明の目的は、有機半導体層中に蓄積した電荷を容易に抜き取ることができ、安定したTFT特性を有する有機薄膜トランジスタを提供することにある。 The present invention has been made in view of the above problems, and an object of the present invention is to provide an organic thin film transistor that can easily extract charges accumulated in an organic semiconductor layer and has stable TFT characteristics. There is to do.
 本発明に基づく有機薄膜トランジスタは、ゲート電極と、上記ゲート電極に対向して配置される有機半導体層と、上記ゲート電極と上記有機半導体層との間に位置するゲート絶縁層と、上記有機半導体層に接続され、上記有機半導体層に電流を流すためのソース電極およびドレイン電極と、上記有機半導体層に接続され、上記有機半導体層に蓄積された電荷を抜くためのボディ電極とを備える。 An organic thin film transistor according to the present invention includes a gate electrode, an organic semiconductor layer disposed to face the gate electrode, a gate insulating layer positioned between the gate electrode and the organic semiconductor layer, and the organic semiconductor layer. Connected to the organic semiconductor layer, and a body electrode connected to the organic semiconductor layer and for removing charges accumulated in the organic semiconductor layer.
 上記本発明に基づく有機薄膜トランジスタにあっては、上記ボディ電極の仕事関数は、上記ソース電極および上記ドレイン電極の仕事関数と異なることが好ましい。 In the organic thin film transistor according to the present invention, the work function of the body electrode is preferably different from the work functions of the source electrode and the drain electrode.
 上記本発明に基づく有機薄膜トランジスタにあっては、上記ボディ電極は、上記ソース電極および上記ドレイン電極と異なる材料によって構成されていることが好ましい。 In the organic thin film transistor according to the present invention, the body electrode is preferably made of a material different from that of the source electrode and the drain electrode.
 上記本発明に基づく有機薄膜トランジスタにあっては上記ボディ電極と上記有機半導体層との界面には、単分子膜が形成されていることが好ましい。 In the organic thin film transistor according to the present invention, a monomolecular film is preferably formed at the interface between the body electrode and the organic semiconductor layer.
 上記本発明に基づく有機薄膜トランジスタにあっては、上記有機半導体層は、p型有機半導体層であることが好ましく、この場合には、上記ボディ電極の仕事関数は、上記ソース電極または上記ドレイン電極の仕事関数よりも小さいことが好ましい。 In the organic thin film transistor according to the present invention, the organic semiconductor layer is preferably a p-type organic semiconductor layer. In this case, the work function of the body electrode is the same as that of the source electrode or the drain electrode. It is preferably smaller than the work function.
 上記本発明に基づく有機薄膜トランジスタにあっては、上記有機半導体層は、n型有機半導体層であることが好ましく、上記ボディ電極の仕事関数は、上記ソース電極または上記ドレイン電極の仕事関数よりも大きいことが好ましい。 In the organic thin film transistor according to the present invention, the organic semiconductor layer is preferably an n-type organic semiconductor layer, and the work function of the body electrode is larger than the work function of the source electrode or the drain electrode. It is preferable.
 本発明によれば、有機半導体層中に蓄積した電荷を容易に抜き取ることができ、安定したTFT特性を有する有機薄膜トランジスタを提供することができる。 According to the present invention, it is possible to easily extract charges accumulated in the organic semiconductor layer and to provide an organic thin film transistor having stable TFT characteristics.
実施の形態1に係る有機薄膜トランジスタの平面図である。1 is a plan view of an organic thin film transistor according to Embodiment 1. FIG. 図1に示す有機薄膜トランジスタを具備する薄膜トランジスタ基板における図1に示すII(A)-II(A)線に対応する断面図およびII(B)-II(B)線に対応する断面図である。2 is a cross-sectional view corresponding to line II (A) -II (A) and a cross-sectional view corresponding to line II (B) -II (B) shown in FIG. 1 in a thin film transistor substrate including the organic thin film transistor shown in FIG. 図1に示す有機薄膜トランジスタがp型の有機半導体層を有する場合のエネルギー準位の一例を示す図である。It is a figure which shows an example of an energy level in case the organic thin-film transistor shown in FIG. 1 has a p-type organic-semiconductor layer. 図1に示す有機薄膜トランジスタがn型の有機半導体層を有する場合のエネルギー準位の一例を示す図である。It is a figure which shows an example of an energy level in case the organic thin-film transistor shown in FIG. 1 has an n-type organic-semiconductor layer. 図2に示す薄膜トランジスタ基板のベースコート層を形成する工程を示す図である。It is a figure which shows the process of forming the basecoat layer of the thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。It is a figure which shows the process of forming the gate electrode of the thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板のゲート絶縁層を形成する工程を示す図である。It is a figure which shows the process of forming the gate insulating layer of the thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程を示す図である。It is a figure which shows the process of forming the source electrode and drain electrode of a thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板のボディ電極を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板の有機半導体層、保護層およびマスク層を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the organic-semiconductor layer, protective layer, and mask layer of a thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板の有機半導体層、保護層およびマスク層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the organic-semiconductor layer, protective layer, and mask layer of a thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the interlayer protective layer and interlayer mask layer of a thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the interlayer protective layer and interlayer mask layer of a thin-film transistor substrate shown in FIG. 図2に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。FIG. 3 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 実施の形態2に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。It is sectional drawing at the time of dividing | segmenting along the extending direction of a body electrode, and the sectional view at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor which concerns on Embodiment 2 along the direction where a source electrode and a drain electrode are arranged. 図16に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。It is a figure which shows the process of forming the source electrode of the thin film transistor substrate shown in FIG. 16, a drain electrode, and a body electrode. 図17に示すボディ電極に表面処理を施す工程を示す図である。It is a figure which shows the process of surface-treating to the body electrode shown in FIG. 実施の形態3に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。It is sectional drawing at the time of dividing | segmenting along the extending direction of a body electrode, and the sectional view at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor which concerns on Embodiment 3 along the direction where a source electrode and a drain electrode are arranged. 図19に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the organic-semiconductor layer of the thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the organic-semiconductor layer of the thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the source electrode and drain electrode of a thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the source electrode and drain electrode of a thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板のボディ電極を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the interlayer protective layer and interlayer mask layer of a thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the interlayer protective layer and interlayer mask layer of a thin-film transistor substrate shown in FIG. 図19に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。FIG. 20 is a diagram illustrating a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate illustrated in FIG. 19. 実施の形態4に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。FIG. 6 is a cross-sectional view when a thin film transistor substrate including an organic thin film transistor according to a fourth embodiment is divided along a direction in which source and drain electrodes are arranged, and a cross-sectional view when divided along an extending direction of a body electrode. 図29に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。It is a figure which shows the process of forming the source electrode of the thin-film transistor substrate shown in FIG. 29, a drain electrode, and a body electrode. 図30に示すボディ電極に表面処理を施す工程を示す図である。It is a figure which shows the process of surface-treating to the body electrode shown in FIG. 実施の形態5に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。It is sectional drawing at the time of dividing along the extending direction of a body electrode, and sectional drawing at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor which concerns on Embodiment 5 along the direction where a source electrode and a drain electrode are arranged. 図32に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程を示す図である。It is a figure which shows the process of forming the source electrode and drain electrode of a thin-film transistor substrate shown in FIG. 図32に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程を示す図である。FIG. 33 is a diagram showing a first step of forming a body electrode of the thin film transistor substrate shown in FIG. 32. 図32に示す薄膜トランジスタ基板のボディ電極を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the body electrode of the thin-film transistor substrate shown in FIG. 図32示す薄膜トランジスタ基板の有機半導体層、第1の保護層およびマスク層を形成する工程の第1工程を示す図である。It is a figure which shows the 1st process of the process of forming the organic-semiconductor layer of the thin-film transistor substrate shown in FIG. 32, a 1st protective layer, and a mask layer. 図32示す薄膜トランジスタ基板の有機半導体層、第1の保護層およびマスク層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the organic-semiconductor layer of the thin-film transistor substrate shown in FIG. 32, a 1st protective layer, and a mask layer. 図32に示す薄膜トランジスタ基板の第2の保護層およびゲート絶縁層を形成する工程を示す図である。FIG. 33 is a diagram showing a step of forming a second protective layer and a gate insulating layer of the thin film transistor substrate shown in FIG. 32. 図32に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。FIG. 33 is a diagram showing a step of forming a gate electrode of the thin film transistor substrate shown in FIG. 32. 図32に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程を示す図である。FIG. 33 is a diagram showing a first step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 32. 図32に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第2工程を示す図である。FIG. 33 is a diagram showing a second step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 32. 図32に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。FIG. 33 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 32. 実施の形態6に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。It is sectional drawing at the time of dividing along the extending direction of a body electrode, and sectional drawing at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor which concerns on Embodiment 6 along the direction where a source electrode and a drain electrode are arranged. 図43に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。FIG. 44 is a diagram showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIG. 43. 図43に示すボディ電極に表面処理を施す工程を示す図である。FIG. 44 is a diagram showing a step of performing a surface treatment on the body electrode shown in FIG. 43. 実施の形態7に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。It is sectional drawing at the time of dividing along the extending direction of a body electrode, and sectional drawing at the time of dividing the thin-film transistor substrate which comprises the organic thin-film transistor concerning Embodiment 7 along the direction where a source electrode and a drain electrode are arranged. 図46に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第1工程を示す図である。FIG. 47 is a diagram showing a first step of forming an organic semiconductor layer of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第2工程を示す図である。It is a figure which shows the 2nd process of the process of forming the organic-semiconductor layer of the thin-film transistor substrate shown in FIG. 図46に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第1工程を示す図である。FIG. 47 is a diagram showing a first step of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第2工程を示す図である。FIG. 47 is a diagram showing a second step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程を示す図である。FIG. 47 is a diagram showing a first step of forming a body electrode of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板のボディ電極を形成する工程の第2工程を示す図である。FIG. 47 is a diagram showing a second step of forming the body electrode of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板のゲート絶縁層を形成する工程を示す図である。FIG. 47 is a diagram showing a step of forming a gate insulating layer of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。FIG. 47 is a diagram showing a step of forming a gate electrode of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程を示す図である。FIG. 47 is a diagram showing a first step of forming an interlayer protective layer and an interlayer mask layer of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第2工程を示す図である。FIG. 47 is a diagram showing a second step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIG. 46. 図46に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。FIG. 47 is a diagram showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. 46. 実施の形態8に示す有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。FIG. 9 is a cross-sectional view when a thin film transistor substrate including an organic thin film transistor shown in Embodiment 8 is divided along a direction in which a source electrode and a drain electrode are arranged, and a cross-sectional view when divided along an extending direction of a body electrode. 図58に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。FIG. 59 is a diagram showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIG. 58. 図59に示すボディ電極に表面処理を施す工程を示す図である。FIG. 60 is a diagram showing a step of performing a surface treatment on the body electrode shown in FIG. 59. 実施の形態9に係る有機薄膜トランジスタの平面図を示す図である。It is a figure which shows the top view of the organic thin-film transistor which concerns on Embodiment 9. FIG. 図61に示す有機薄膜トランジスタのエネルギー準位を示す図である。It is a figure which shows the energy level of the organic thin-film transistor shown in FIG. 図2に示す薄膜トランジスタ基板を具備する液晶表示装置を示す概略断面図である。It is a schematic sectional drawing which shows the liquid crystal display device which comprises the thin-film transistor substrate shown in FIG. 図63に示す液晶表示装置の等価回路図の第1例を示す図である。FIG. 64 is a diagram showing a first example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63. 図63に示す液晶表示装置の等価回路図の第2例を示す図である。FIG. 64 is a diagram showing a second example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63. 図2に示す薄膜トランジスタ基板を具備する有機EL表示装置の第1の形態を示す概略断面図である。It is a schematic sectional drawing which shows the 1st form of the organic electroluminescence display which comprises the thin-film transistor substrate shown in FIG. 図66に示す有機EL表示装置の等価回路図の第1例を示す図である。FIG. 67 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. 図66に示す有機EL表示装置の等価回路図の第2例を示す図である。FIG. 67 is a diagram showing a second example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. 図66に示す有機EL表示装置の等価回路図の第3例を示す図である。FIG. 67 is a diagram showing a third example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. 図2に示す薄膜トランジスタ基板を具備する有機EL表示装置の第2の形態を示す概略断面図である。It is a schematic sectional drawing which shows the 2nd form of the organic electroluminescence display which comprises the thin-film transistor substrate shown in FIG. 図70に示す有機EL表示装置の等価回路図の第1例を示す図である。FIG. 71 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. 70.
 以下、本発明の実施の形態について、図を参照して詳細に説明する。なお、以下に示す実施の形態においては、同一のまたは共通する部分について図中同一の符号を付し、その説明は繰り返さない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. In the following embodiments, the same or common parts are denoted by the same reference numerals in the drawings, and description thereof will not be repeated.
 (実施の形態1)
 図1は、実施の形態1に係る有機薄膜トランジスタの平面図である。図2(A),(B)は、図1に示す有機薄膜トランジスタを具備する薄膜トランジスタ基板における図1に示すII(A)-II(A)線に対応する断面図およびII(B)-II(B)線に対応する断面図である。図1および図2(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタおよびこれを具備する薄膜トランジスタ基板について説明する。
(Embodiment 1)
FIG. 1 is a plan view of the organic thin film transistor according to the first embodiment. 2A and 2B are cross-sectional views corresponding to the line II (A) -II (A) shown in FIG. 1 and II (B) -II (II) in the thin film transistor substrate having the organic thin film transistor shown in FIG. B) It is sectional drawing corresponding to a line. With reference to FIG. 1, FIG. 2 (A), and (B), the organic thin-film transistor which concerns on this Embodiment, and the thin-film transistor substrate provided with the same are demonstrated.
 図1および図2(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1は、基板10と、基板10の主表面を覆うように形成されたベースコート層11と、ベースコート層11上に形成されたゲート電極12と、ゲート電極12を覆うようにベースコート層11上に形成されたゲート絶縁層13と、ゲート絶縁層13上に形成されたソース電極14a、ドレイン電極14bおよびボディ電極17aと、ソース電極14a、ドレイン電極14bおよびボディ電極17aに接続された有機半導体層19aとを備える。 As shown in FIG. 1 and FIGS. 2A and 2B, an organic thin film transistor 1 according to the present embodiment includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and a base coat. A gate electrode 12 formed on the layer 11, a gate insulating layer 13 formed on the base coat layer 11 so as to cover the gate electrode 12, a source electrode 14a, a drain electrode 14b formed on the gate insulating layer 13, and A body electrode 17a and an organic semiconductor layer 19a connected to the source electrode 14a, the drain electrode 14b, and the body electrode 17a are provided.
 ソース電極14aおよびドレイン電極14bは、互いに離間してゲート電極12の延在する方向に交差する方向に沿って並んで配置されるとともに、ゲート絶縁層13を挟んでゲート電極12に少なくともその一部が重なるように設けられている。ソース電極14aおよびドレイン電極14bは有機半導体層19aに電流を流すための部位である。 The source electrode 14 a and the drain electrode 14 b are arranged side by side along a direction that is spaced apart from each other and intersects the direction in which the gate electrode 12 extends, and at least a part of the source electrode 14 a and the drain electrode 14 b sandwich the gate insulating layer 13. Are provided to overlap. The source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
 ボディ電極17aは、ソース電極14aおよびドレイン電極14bから分離して配置され、ゲート電極12と重ならないように設けられている。ボディ電極17aは、有機半導体層19a内に蓄積された電荷を抜くための部位である。 The body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12. The body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
 有機半導体層19aは、ボディ電極17aと、ソース電極14aとドレイン電極14bとの間に位置する部分のゲート絶縁層13を覆うとともに、ソース電極14a、ドレイン電極14bおよびボディ電極17aのそれぞれの上面の少なくとも一部に接する。有機半導体層19aのうちソース電極14aとドレイン電極14bとの間に位置する部分は、ゲート絶縁層13を挟み込むようにゲート電極12と対向する。 The organic semiconductor layer 19a covers the body electrode 17a and a portion of the gate insulating layer 13 located between the source electrode 14a and the drain electrode 14b, and on the upper surface of each of the source electrode 14a, the drain electrode 14b, and the body electrode 17a. At least partly touches. A portion of the organic semiconductor layer 19a located between the source electrode 14a and the drain electrode 14b faces the gate electrode 12 so as to sandwich the gate insulating layer 13 therebetween.
 さらに有機薄膜トランジスタ1は、有機半導体層19a上に設けられた保護層20aおよび当該保護層20a上に設けられたマスク層21Aを含む。 The organic thin film transistor 1 further includes a protective layer 20a provided on the organic semiconductor layer 19a and a mask layer 21A provided on the protective layer 20a.
 図2(A),(B)に示すように、薄膜トランジスタ基板2は、有機薄膜トランジスタ1と、有機薄膜トランジスタ1を覆うように設けられた層間保護層22と、層間保護層22を覆うように設けられた層間マスク層23Aと、有機薄膜トランジスタ1のソース電極14aに接続されるソース電極端子25aと、有機薄膜トランジスタ1のドレイン電極14bに接続される画素電極25bと、有機薄膜トランジスタ1のボディ電極17aに接続されるボディ電極端子25cとを備える。 As shown in FIGS. 2A and 2B, the thin film transistor substrate 2 is provided so as to cover the organic thin film transistor 1, the interlayer protective layer 22 provided so as to cover the organic thin film transistor 1, and the interlayer protective layer 22. The interlayer mask layer 23A, the source electrode terminal 25a connected to the source electrode 14a of the organic thin film transistor 1, the pixel electrode 25b connected to the drain electrode 14b of the organic thin film transistor 1, and the body electrode 17a of the organic thin film transistor 1 are connected. Body electrode terminal 25c.
 層間マスク層23Aおよび層間保護層22には、コンタクトホール24a,24b,24cが形成されている。コンタクトホール24aは、層間マスク層23Aの表面側からソース電極14aに達するように設けられている。コンタクトホール24bは、層間マスク層23Aの表面側からドレイン電極14bに達するように設けられている。コンタクトホール24cは、層間マスク層23Aの表面側からボディ電極17aに達するように設けられている。 Contact holes 24a, 24b, and 24c are formed in the interlayer mask layer 23A and the interlayer protection layer 22. The contact hole 24a is provided so as to reach the source electrode 14a from the surface side of the interlayer mask layer 23A. The contact hole 24b is provided so as to reach the drain electrode 14b from the surface side of the interlayer mask layer 23A. The contact hole 24c is provided so as to reach the body electrode 17a from the surface side of the interlayer mask layer 23A.
 ソース電極端子25aは、コンタクトホール24aを介してソース電極14aに接続されており、画素電極25bは、コンタクトホール24bを介してドレイン電極14bに接続されており、ボディ電極端子25cは、コンタクトホール24cを介してボディ電極17aに接続されている。 The source electrode terminal 25a is connected to the source electrode 14a via the contact hole 24a, the pixel electrode 25b is connected to the drain electrode 14b via the contact hole 24b, and the body electrode terminal 25c is connected to the contact hole 24c. Is connected to the body electrode 17a.
 有機半導体層19aとしては、p型の有機半導体層またはn型の有機半導体層を採用することができる。有機半導体層19aの材料に応じて、ソース電極、ドレイン電極およびボディ電極の材料を適宜選択することができる。その詳細については、後述する。 As the organic semiconductor layer 19a, a p-type organic semiconductor layer or an n-type organic semiconductor layer can be employed. Depending on the material of the organic semiconductor layer 19a, the material of the source electrode, the drain electrode, and the body electrode can be appropriately selected. Details thereof will be described later.
 図3は、図1に示す有機薄膜トランジスタがp型の有機半導体層を有する場合のエネルギー準位の一例を示す図である。図3に示すように、有機半導体層19aがp型である場合には、有機半導体材料のHOMO(Highest Occupied Molecular Orbital:最高被占軌道)準位に近い仕事関数W,Wを有する金属材料を用いてソース電極S(ソース電極14a)およびドレイン電極D(ドレイン電極14b)を形成する。また、有機半導体材料のLUMO(Lowest Unoccupied Molecular Orbital:最低空軌道)レベルに近い仕事関数WBDを有する金属材料を用いてボディ電極BD(ボディ電極17a)を形成する。すなわち、ボディ電極BDは、ソース電極Sおよびドレイン電極Dと異なる金属材料によって形成され、ボディ電極BDの仕事関数WBDは、ソース電極Sおよびドレイン電極Dの仕事関数W,Wよりも小さくなる。 FIG. 3 is a diagram illustrating an example of energy levels when the organic thin film transistor illustrated in FIG. 1 includes a p-type organic semiconductor layer. As shown in FIG. 3, when the organic semiconductor layer 19a is p-type, HOMO of the organic semiconductor material (Highest Occupied Molecular Orbital: highest occupied molecular orbital) level close to the work function W S, a metal having a W D The source electrode S (source electrode 14a) and the drain electrode D (drain electrode 14b) are formed using the material. Further, LUMO of the organic semiconductor material: forming a body electrode BD (body electrode 17a) using (Lowest Unoccupied Molecular Orbital lowest unoccupied molecular orbital) metallic material having a work function close W BD level. That is, the body electrode BD is formed by a different metal material as a source electrode S and the drain electrode D, the work function W BD of body electrode BD is the work function W S of the source electrode S and the drain electrode D, smaller than W D Become.
 このように構成することにより、本実施の形態に係る有機薄膜トランジスタ1にあっては、ソース電極Sの仕事関数Wが有機半導体層19aのHOMOレベルと近いため、正孔をp型の有機半導体層19a中へ容易に注入することができる。このため、有機薄膜トランジスタ1内に大電流を流すことができる。また、ボディ電極BDの仕事関数WBDは有機半導体層19aのLUMOレベルよりも低いため、ボディ電極BDを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。これらの結果、本実施の形態に係る有機薄膜トランジスタ1にあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 With this configuration, in the organic thin-film transistor 1 of the present embodiment, since the work function W S of the source electrode S is close to HOMO level of the organic semiconductor layer 19a, the hole of the p-type organic semiconductor It can be easily injected into the layer 19a. For this reason, a large current can flow in the organic thin film transistor 1. Further, since the work function W BD of the body electrode BD is lower than the LUMO level of the organic semiconductor layer 19a, electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode BD. As a result, in the organic thin film transistor 1 according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 図4は、図1に示す有機薄膜トランジスタがn型の有機半導体層を有する場合のエネルギー準位の一例を示す図である。図4に示すように、有機半導体層19aがn型である場合には、有機半導体材料のLUMO(Lowest Unoccupied Molecular Orbital:最低空軌道)レベルに近い仕事関数W,Wを有する金属材料を用いてソース電極S(ソース電極14a)およびドレイン電極D(ドレイン電極14b)を形成する。また、有機半導体材料のHOMO(Highest Occupied Molecular Orbital:最高被占軌道)準位に近い仕事関数WBDを有する金属材料を用いてボディ電極BD(ボディ電極17a)を形成する。すなわち、ボディ電極BDは、ソース電極Sおよびドレイン電極Dと異なる金属材料によって形成され、ボディ電極BDの仕事関数WBDは、ソース電極Sおよびドレイン電極Dの仕事関数W,Wよりも大きくなる。 FIG. 4 is a diagram illustrating an example of energy levels when the organic thin film transistor illustrated in FIG. 1 includes an n-type organic semiconductor layer. As shown in FIG. 4, when the organic semiconductor layer 19a is n-type, LUMO of the organic semiconductor material (Lowest Unoccupied Molecular Orbital: lowest unoccupied molecular orbital) close to the level work function W S, a metal material having a W D The source electrode S (source electrode 14a) and the drain electrode D (drain electrode 14b) are formed by using them. The organic HOMO of the semiconductor material: forming a body electrode BD (body electrode 17a) using a metal material having a (Highest Occupied Molecular Orbital highest occupied molecular orbital) near the level the work function W BD. That is, the body electrode BD is formed by a different metal material as a source electrode S and the drain electrode D, the work function W BD of body electrode BD is the work function W S of the source electrode S and the drain electrode D, greater than W D Become.
 このように構成することにより、本実施の形態に係る有機薄膜トランジスタ1にあっては、ソース電極Sの仕事関数Wが有機半導体層19aのLUMOレベルより小さくすることにより、電子をn型の有機半導体層19a中へ容易に注入することができる。このため、有機薄膜トランジスタ1内に大電流を流すことができる。また、ボディ電極BDの仕事関数WBDが、有機半導体層19aのHOMOレベルに近いため、ボディ電極BDを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。これらの結果、本実施の形態に係る有機薄膜トランジスタ1にあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 With this configuration, in the organic thin-film transistor 1 according to this embodiment, by the work function W S of the source electrode S is smaller than the LUMO level of the organic semiconductor layer 19a, an electron of an n-type organic It can be easily injected into the semiconductor layer 19a. For this reason, a large current can flow in the organic thin film transistor 1. Moreover, since the work function W BD of the body electrode BD is close to the HOMO level of the organic semiconductor layer 19a, holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode BD. As a result, in the organic thin film transistor 1 according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 図5(A),(B)から図15(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板を製造するための各工程を示す図である。図5(A),(B)から図15(A),(B)を参照して、図2(A),(B)に示す薄膜トランジスタ基板2の製造方法について説明する。 FIGS. 5A and 5B to FIGS. 15A and 15B are diagrams showing respective steps for manufacturing the thin film transistor substrate shown in FIGS. 2A and 2B. With reference to FIGS. 5A and 5B to FIGS. 15A and 15B, a method of manufacturing the thin film transistor substrate 2 shown in FIGS. 2A and 2B will be described.
 図5(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板2のベースコート層形成工程を示す図である。図5(A),(B)に示すように、基板10上に水分や酸素等のバリア性を目的として、無機絶縁膜又は有機絶縁膜、あるいは両者の組み合わせたものからなるベースコート層11を形成する。 FIGS. 5A and 5B are diagrams showing a base coat layer forming step of the thin film transistor substrate 2 shown in FIGS. 2A and 2B. As shown in FIGS. 5A and 5B, a base coat layer 11 made of an inorganic insulating film, an organic insulating film, or a combination of both is formed on the substrate 10 for the purpose of barrier properties such as moisture and oxygen. To do.
 基板10としては、ガラス基板や、PEN、PES、PET等のプラスチック基板や、あるいは支持基板としてのガラス基板上にPEN、PES、PET、PI、アラミドなどのフィルム材料や有機絶縁膜を形成した基板などを採用することができる。 As the substrate 10, a glass substrate, a plastic substrate such as PEN, PES, or PET, or a substrate in which a film material such as PEN, PES, PET, PI, or aramid or an organic insulating film is formed on a glass substrate as a support substrate Etc. can be adopted.
 ベースコート層11としては、無機絶縁膜を用いる場合には、たとえばCVD法によって窒化膜、酸化膜、窒化酸化膜等を成膜することにより形成することができる。また、有機絶縁膜を用いる場合には、たとえばスピンコート法、スリットコート法等によってポリイミド、ゼオノアなどの樹脂を塗布することにより形成することができる。 When using an inorganic insulating film, the base coat layer 11 can be formed by forming a nitride film, an oxide film, a nitrided oxide film or the like by, for example, a CVD method. Moreover, when using an organic insulating film, it can form by apply | coating resin, such as a polyimide and zeonore, for example by a spin coat method, a slit coat method, etc.
 図6(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。図6(A),(B)に示すように、真空蒸着法、スパッタ法等によってゲート電極12を100~400nm程度の厚さで形成する。ゲート電極12は、Al、Al-Si、Cu、W、Mo、MoW、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を成膜することにより形成することができる。また、ベースコート層とゲート電極の密着性を高めるために、界面にTi、Crなどの密着層を形成することが望ましい。 6 (A) and 6 (B) are diagrams showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 2 (A) and 2 (B). As shown in FIGS. 6A and 6B, the gate electrode 12 is formed to a thickness of about 100 to 400 nm by vacuum deposition, sputtering, or the like. The gate electrode 12 can be formed by forming a metal film of Al, Al—Si, Cu, W, Mo, MoW, Ti, Cr, or the like and a metal film having a laminated structure in which these are laminated. . In order to improve the adhesion between the base coat layer and the gate electrode, it is desirable to form an adhesion layer such as Ti or Cr at the interface.
 真空蒸着法を用いてゲート電極12を形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。 When the gate electrode 12 is formed using a vacuum evaporation method, a separate patterning step is not required by depositing the metal film using a metal mask.
 スパッタ法を用いてゲート電極12を形成する場合には、まず、ベースコート層11の主表面全面に上記金属膜(ゲート電極膜)を成膜した後、ゲート電極膜上に感光性レジストを塗布する。その後、フォトリソグラフィ(露光・現像)によって感光性レジストをパターニングする。続いて、感光性レジストをマスクとしてゲート電極膜をウェットエッチング又はドライエッチングすることにより、ゲート電極12をパターニングする。 In the case of forming the gate electrode 12 using the sputtering method, first, the metal film (gate electrode film) is formed on the entire main surface of the base coat layer 11, and then a photosensitive resist is applied on the gate electrode film. . Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the gate electrode 12 is patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
 ウェットエッチングは、SLAエッチャント(組成;HPO(リン酸):HO:HNO(硝酸):CHCOOH(酢酸)=16:2:1:1)、硝酸、リン酸、酢酸、フッ酸およびこれらを組み合わせたエッチャントを用いて行う。ドライエッチングは、SF、CHF、CF、Cl、O、Arのガスおよびこれらを組み合わせたガスを用いて行う。エッチングの後にマスクとして用いた感光性レジストを剥離液によって除去する。これにより、ゲート電極12が形成される。 Wet etching is performed using SLA etchant (composition: H 3 PO 4 (phosphoric acid): H 2 O: HNO 3 (nitric acid): CH 3 COOH (acetic acid) = 16: 2: 1: 1), nitric acid, phosphoric acid, acetic acid , Using hydrofluoric acid and an etchant combining these. Dry etching is performed using a gas of SF 6 , CHF 3 , CF 4 , Cl 2 , O 2 , Ar, or a combination thereof. After the etching, the photosensitive resist used as a mask is removed with a stripping solution. Thereby, the gate electrode 12 is formed.
 また、ゲート電極12のパターン形成方法は、上記の方法に限定されず、導電性ペーストを用いた印刷法や電解メッキ法や無電解メッキ法等を採用することができる。 Further, the pattern forming method of the gate electrode 12 is not limited to the above method, and a printing method using an electrically conductive paste, an electrolytic plating method, an electroless plating method, or the like can be employed.
 図7(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板のゲート絶縁層を形成する工程を示す図である。図7に示すように、スピンコート法、スリットコート法、インクジェット法、印刷法等によって、ゲート電極12を覆うようにポリビニルフェノール(PVP)、ポリスチレン(PS)等の有機絶縁性材料を塗布した後に焼成することにより、200nm~1000nm程度の厚さでゲート絶縁層13を形成する。 FIGS. 7A and 7B are views showing a process of forming a gate insulating layer of the thin film transistor substrate shown in FIGS. 2A and 2B. As shown in FIG. 7, after applying an organic insulating material such as polyvinylphenol (PVP) or polystyrene (PS) so as to cover the gate electrode 12 by spin coating, slit coating, ink jetting, printing, or the like. By baking, the gate insulating layer 13 is formed with a thickness of about 200 nm to 1000 nm.
 図8(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程を示す図である。図8(A),(B)に示すように、真空蒸着法、スパッタ法等によってソース電極14aおよびドレイン電極14bをゲート絶縁層13上に100~400nm程度の厚さで形成する。 8A and 8B are diagrams showing a process of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIGS. 2A and 2B. As shown in FIGS. 8A and 8B, the source electrode 14a and the drain electrode 14b are formed on the gate insulating layer 13 to a thickness of about 100 to 400 nm by vacuum deposition, sputtering, or the like.
 ソース電極14aおよびドレイン電極14bの材料は、同一の材料であり、後工程で形成する有機半導体層19aの種類に応じて選択することができる。 The materials of the source electrode 14a and the drain electrode 14b are the same material, and can be selected according to the type of the organic semiconductor layer 19a formed in a later process.
 有機半導体層19aがp型となる場合には、ソース電極14aおよびドレイン電極14bの材料としては、仕事関数が大きくp型の有機半導体層19aへの正孔の注入障壁が小さい材料を採用することが好ましく、Pt、Rh、Au、Cu、Ag、Ta、W、Mo、MoW、MnO、MnO、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is p-type, a material having a large work function and a small hole injection barrier to the p-type organic semiconductor layer 19a is adopted as a material for the source electrode 14a and the drain electrode 14b. A metal film of Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, or the like, and a metal film having a laminated structure in which these are laminated are combined. Can be adopted.
 たとえば、p型の有機半導体層19aの材料としてペンタセン(HOMOレベル:約5.3eV)を採用する場合には、ソース電極14aおよびドレイン電極14bの材料として、Au(仕事関数:約5.0eV)を採用することができる。この場合には、正孔の注入障壁高さが小さい(約0.3eV)ので、ソース電極14aから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1に大きな電流を流すことができる。 For example, when pentacene (HOMO level: about 5.3 eV) is adopted as the material of the p-type organic semiconductor layer 19a, Au (work function: about 5.0 eV) is used as the material of the source electrode 14a and the drain electrode 14b. Can be adopted. In this case, since the hole injection barrier height is small (about 0.3 eV), holes can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current flows through the organic thin film transistor 1. be able to.
 有機半導体層19aがn型となる場合には、ソース電極14aおよびドレイン電極14bの材料としては、仕事関数が小さくn型の有機半導体層19aへの電子の注入障壁が小さい材料を採用することが好ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is n-type, a material having a small work function and a small barrier for injecting electrons into the n-type organic semiconductor layer 19a may be employed as the material for the source electrode 14a and the drain electrode 14b. Preferably, a metal film of Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, Cr or the like and a metal film having a laminated structure in which these are laminated and combined can be employed. .
 たとえば、n型の有機半導体層19aの材料としてC60フラーレン(LUMOレベル:約4.5eV)を採用する場合には、ソース電極14aおよびドレイン電極14bの材料として、Al(仕事関数:約4.3eV)を採用することができる。この場合には、電子の注入障壁高さが小さい(約-0.2eV)ので、ソース電極14aから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1に大きな電流を流すことができる。 For example, when C60 fullerene (LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, the material of the source electrode 14a and the drain electrode 14b is Al (work function: about 4.3 eV). ) Can be adopted. In this case, since the electron injection barrier height is small (about −0.2 eV), electrons can be easily injected from the source electrode 14a to the organic semiconductor layer 19a, and a large current flows through the organic thin film transistor 1. Can do.
 また、ゲート絶縁層13とソース電極14aおよびドレイン電極14bの密着性を高めるために、ゲート絶縁層13とソース電極14aおよびドレイン電極14bとの間にTi、Cr等の密着層を形成してもよい。 Further, in order to improve the adhesion between the gate insulating layer 13 and the source electrode 14a and drain electrode 14b, an adhesion layer such as Ti or Cr may be formed between the gate insulating layer 13 and the source electrode 14a and drain electrode 14b. Good.
 なお、真空蒸着法を用いてソース電極14aおよびドレイン電極14bを形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。 In addition, when forming the source electrode 14a and the drain electrode 14b using a vacuum evaporation method, the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
 スパッタ法を用いてソース電極14aおよびドレイン電極14bを形成する場合には、まず、ゲート絶縁層13の主表面上の全面に亘って上記の金属膜(ソース・ドレイン電極膜)を成膜した後、ソース・ドレイン電極膜上に感光性レジストを塗布する。その後、フォトリソグラフィ(露光・現像)によって感光性レジストをパターニングする。続いて、感光性レジストをマスクとしてゲート電極膜をウェットエッチング又はドライエッチングすることにより、ソース電極14aおよびドレイン電極14bをパターニングする。 When the source electrode 14a and the drain electrode 14b are formed by sputtering, first, the metal film (source / drain electrode film) is formed over the entire main surface of the gate insulating layer 13. Then, a photosensitive resist is applied on the source / drain electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a and the drain electrode 14b are patterned by performing wet etching or dry etching on the gate electrode film using the photosensitive resist as a mask.
 ウェットエッチングは、王水、SLAエッチャント(組成;HPO(リン酸):HO:HNO(硝酸):CHCOOH(酢酸)=16:2:1:1)、硝酸、リン酸、酢酸、フッ酸およびこれらを組み合わせたエッチャントを用いて行う。ドライエッチングは、SF、CHF、CF、Cl、O、Arのガスおよびこれらを組み合わせたガスを用いて行う。エッチングの後にマスクとして用いた感光性レジストを剥離液によって除去する。これにより、ソース電極14aおよびドレイン電極14bが形成される。 Wet etching is aqua regia, SLA etchant (composition; H 3 PO 4 (phosphoric acid): H 2 O: HNO 3 (nitric acid): CH 3 COOH (acetic acid) = 16: 2: 1: 1), nitric acid, phosphorus An acid, acetic acid, hydrofluoric acid, and an etchant that combines these are used. Dry etching is performed using a gas of SF 6 , CHF 3 , CF 4 , Cl 2 , O 2 , Ar, or a combination thereof. After the etching, the photosensitive resist used as a mask is removed with a stripping solution. Thereby, the source electrode 14a and the drain electrode 14b are formed.
 また、ソース電極14aおよびドレイン電極14bのパターン形成方法は、上記の方法に限定されず、導電性ペーストを用いた印刷法や電解メッキ法や無電解メッキ法等を採用することができる。 Further, the pattern forming method of the source electrode 14a and the drain electrode 14b is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste can be employed.
 図9(A),(B)および図10(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程および第2工程を示す図である。スパッタ法およびリフトオフ法を用いてボディ電極17aを形成する場合には、まず、図9(A),(B)に示すように、ソース電極14aおよびドレイン電極14bを覆うようにゲート絶縁層13の主表面上の全面にポジ型の感光性レジスト15を塗布した後、ボディ電極17aを形成したい領域のみ露光、現像して感光性レジスト15を除去する。この際、感光性レジスト15の断面形状は、ボディ電極膜17を成膜後に感光性レジスト15をリフトオフしやすいように逆テーパー型が望ましい。ボディ電極17aを形成したい領域を除くその他の領域は、感光性レジスト15で保護されている。 9A, 9B, 10A, and 10B show the first and second steps of the process of forming the body electrode of the thin film transistor substrate shown in FIGS. 2A and 2B. FIG. When the body electrode 17a is formed by using the sputtering method and the lift-off method, first, as shown in FIGS. 9A and 9B, the gate insulating layer 13 is formed so as to cover the source electrode 14a and the drain electrode 14b. After the positive photosensitive resist 15 is applied to the entire surface on the main surface, only the region where the body electrode 17a is to be formed is exposed and developed to remove the photosensitive resist 15. At this time, the cross-sectional shape of the photosensitive resist 15 is desirably a reverse taper type so that the photosensitive resist 15 can be easily lifted off after the body electrode film 17 is formed. Other regions except the region where the body electrode 17a is to be formed are protected by the photosensitive resist 15.
 次に、スパッタ法により、上記の感光性レジスト15が形成された基板全面にボディ電極膜17を100~400nm程度の厚さで成膜する。続いて、図10(A),(B)に示すように、デポマスクとして用いた感光性レジスト15を剥離液でリフトオフし除去することにより、ボディ電極17aがゲート絶縁層13上に形成される。 Next, the body electrode film 17 is formed to a thickness of about 100 to 400 nm on the entire surface of the substrate on which the photosensitive resist 15 has been formed by sputtering. Subsequently, as shown in FIGS. 10A and 10B, the body resist 17 is formed on the gate insulating layer 13 by removing the photosensitive resist 15 used as the deposition mask by lifting off with a stripping solution.
 また、ゲート絶縁層13とボディ電極17aの密着性を高めるために、ゲート絶縁層13とボディ電極17aとの間にTi、Crなどの密着層を形成してもよい。 Further, in order to improve the adhesion between the gate insulating layer 13 and the body electrode 17a, an adhesion layer such as Ti or Cr may be formed between the gate insulating layer 13 and the body electrode 17a.
 ボディ電極17aの材料は、有機半導体層19aの種類およびソース電極14aとドレイン電極14bとの材料に応じて選択することができる。 The material of the body electrode 17a can be selected according to the type of the organic semiconductor layer 19a and the material of the source electrode 14a and the drain electrode 14b.
 有機半導体層19aがp型となる場合において、光照射によりp型の有機半導体層19a内に蓄積した電子を抜き取るためには、ボディ電極17aの材料としては、ソース電極14aおよびドレイン電極14bよりも仕事関数が小さい材料を用いる事が望ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 In the case where the organic semiconductor layer 19a is p-type, in order to extract the electrons accumulated in the p-type organic semiconductor layer 19a by light irradiation, the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b. It is desirable to use a material having a small work function, and a laminated structure in which metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr are laminated and combined. The metal film can be used.
 たとえば、上述のようにp型の有機半導体層19aの材料としてペンタセン(HOMOレベル:約5.3eV)を採用し、ソース電極14aおよびドレイン電極14bの材料として、Au(仕事関数:約5.0eV)を採用する場合には、ボディ電極17aの材料としてCa(仕事関数:約2.9eV)を採用することができる。 For example, as described above, pentacene (HOMO level: about 5.3 eV) is adopted as the material of the p-type organic semiconductor layer 19a, and Au (work function: about 5.0 eV) is used as the material of the source electrode 14a and the drain electrode 14b. ), Ca (work function: about 2.9 eV) can be used as the material of the body electrode 17a.
 この場合には、Caで構成されるボディ電極17aの仕事関数(約2.9eV)が、有機半導体層のLUMOレベル(約3.5eV)よりも低いため、ボディ電極17aを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1にあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 In this case, since the work function (about 2.9 eV) of the body electrode 17a made of Ca is lower than the LUMO level (about 3.5 eV) of the organic semiconductor layer, the organic semiconductor layer is interposed via the body electrode 17a. The electrons accumulated in 19a can be easily extracted. As a result, in the organic thin film transistor 1 according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 有機半導体層19aがn型となる場合において、光照射によりn型の有機半導体層19a内に蓄積した正孔を抜き取るためには、ボディ電極17aの材料としては、ソース電極14aおよびドレイン電極14bよりも仕事関数が大きい材料を用いる事が望ましく、Pt、Rh、Au、Cu、Ag、Ta、Al、W、Mo、MoW、MnO、MnO、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 In the case where the organic semiconductor layer 19a is n-type, the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b in order to extract holes accumulated in the n-type organic semiconductor layer 19a by light irradiation. It is desirable to use a material having a large work function, such as Pt, Rh, Au, Cu, Ag, Ta, Al, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc. A metal film having a laminated structure in which the layers are stacked and combined can be employed.
 たとえば、上述のようにn型の有機半導体層19aの材料としてC60フラーレン(HOMOレベル:約6.2eV、LUMOレベル:約4.5eV)を採用し、ソース電極14aおよびドレイン電極14bの材料としてAl(仕事関数:約4.3eV)を採用する場合には、ボディ電極17aの材料としてPt(仕事関数:約5.7eV)を採用することができる。 For example, as described above, C60 fullerene (HOMO level: about 6.2 eV, LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, and Al is used as the material of the source electrode 14a and the drain electrode 14b. When (work function: about 4.3 eV) is employed, Pt (work function: about 5.7 eV) can be employed as the material of the body electrode 17a.
 この場合には、Ptで構成されるボディ電極17aの仕事関数(約5.7eV)が、有機半導体層19aのHOMOレベル(約6.2eV)に近いため、ボディ電極17aを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1にあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 In this case, since the work function (about 5.7 eV) of the body electrode 17a made of Pt is close to the HOMO level (about 6.2 eV) of the organic semiconductor layer 19a, the organic semiconductor layer is interposed via the body electrode 17a. The holes accumulated in 19a can be easily extracted. As a result, in the organic thin film transistor 1 according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 なお、真空蒸着法を用いてボディ電極17aを形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。また、ボディ電極17aのパターン形成方法は、上記の方法に限定されず、導電性ペーストを用いた印刷法や電解メッキ法や無電解メッキ法等を採用することができる。 In addition, when forming the body electrode 17a using a vacuum evaporation method, the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary. Moreover, the pattern formation method of the body electrode 17a is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste can be employed.
 図11(A),(B)および図12(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板の有機半導体層、保護層およびマスク層を形成する第1工程および第2工程を示す図である。図11(A),(B)および図12(A),(B)に示すように有機半導体層19a、保護層20aおよびマスク層21Aを形成する場合には、まず、スピンコート法、スリットコート法、インクジェット法、印刷法、蒸着法などを用いて、ソース電極14a、ドレイン電極14bおよびボディ電極17aが形成された基板全体に有機半導体膜19を形成する。有機半導体膜19は、40~200nm程度の厚さで形成される。 FIGS. 11A and 11B and FIGS. 12A and 12B show the first step of forming the organic semiconductor layer, protective layer, and mask layer of the thin film transistor substrate shown in FIGS. It is a figure which shows a 2nd process. When forming the organic semiconductor layer 19a, the protective layer 20a, and the mask layer 21A as shown in FIGS. 11A and 11B and FIGS. 12A and 12B, first, spin coating, slit coating is performed. The organic semiconductor film 19 is formed on the entire substrate on which the source electrode 14a, the drain electrode 14b, and the body electrode 17a are formed using a method, an inkjet method, a printing method, a vapor deposition method, or the like. The organic semiconductor film 19 is formed with a thickness of about 40 to 200 nm.
 続いて、上記の方法を用いて、無機絶縁膜若しくは有機絶縁膜またはこれらを組み合わせた積層膜から成る保護膜20を有機半導体膜19上に形成する。次に、上記の方法を用いて、マスク層21Aを形成するための有機絶縁膜21を保護膜20上に形成する。保護膜20および有機絶縁膜21は、それぞれ40~1000nm程度の厚さで形成される。 Subsequently, a protective film 20 made of an inorganic insulating film, an organic insulating film, or a laminated film combining these is formed on the organic semiconductor film 19 using the above method. Next, the organic insulating film 21 for forming the mask layer 21A is formed on the protective film 20 using the above method. The protective film 20 and the organic insulating film 21 are each formed with a thickness of about 40 to 1000 nm.
 p型の有機半導体膜19(有機半導体層19a)の材料としては、ペンタセン、可溶性ペンタセン、TIPSペンタセン、P3HT(Poly[3-hexyltiophene-2,5-diyl])、銅フタロシアニン等を採用することができる。n型の有機半導体膜19(有機半導体層19a)の材料としては、ペリレンジイミド誘導体、C60フラーレン、フラーレン誘導体、PCBM([6,6]-Phenyl-C61-Butyric Acid Methyl Ester)、SIMEF(Silylmethyl[60]fullerene)等を採用することができる。 As a material for the p-type organic semiconductor film 19 (organic semiconductor layer 19a), pentacene, soluble pentacene, TIPS pentacene, P3HT (Poly [3-hexyltiophene-2,5-diyl]), copper phthalocyanine, or the like may be employed. it can. Examples of the material of the n-type organic semiconductor film 19 (organic semiconductor layer 19a) include perylene diimide derivatives, C60 fullerene, fullerene derivatives, PCBM ([6,6] -Phenyl-C61-Butyric Acid Methyl Ester), SIMEF (Silylmethyl [ 60] fullerene) etc. can be adopted.
 保護層20aを形成するための保護膜20の材料としては、無機絶縁膜を用いる場合には、窒化膜、酸化膜、窒化酸化膜等を採用することができ、有機絶縁膜を用いる場合には、パリレン、旭硝子社製のCYTOP(登録商標)等を採用することができる。また、保護膜20の材料としては、上述の無機絶縁膜と有機絶縁膜とを組み合わせたものを採用することができる。 As the material of the protective film 20 for forming the protective layer 20a, a nitride film, an oxide film, a nitrided oxide film, or the like can be employed when an inorganic insulating film is used, and when an organic insulating film is used. Parylene, CYTOP (registered trademark) manufactured by Asahi Glass Co., Ltd., or the like can be used. Moreover, as a material of the protective film 20, what combined the above-mentioned inorganic insulating film and organic insulating film is employable.
 有機絶縁膜21としては、たとえば、ネガ型の有機絶縁膜を採用することができる。有機絶縁膜21は感光性を有し、その一部がマスクとして機能する。有機絶縁膜21は、遮光マスク82を用いて露光および現像される。この際、有機絶縁膜21のうち、遮光マスク82に設けられた開口部82aを通過した光が当った部分は、硬化してマスク層21Aとなり、現像後も保護膜20上に残る。一方、有機絶縁膜21のうち、光が当たらなかった部分21Bは、現像により溶ける。 As the organic insulating film 21, for example, a negative organic insulating film can be adopted. The organic insulating film 21 has photosensitivity, and a part thereof functions as a mask. The organic insulating film 21 is exposed and developed using a light shielding mask 82. At this time, the portion of the organic insulating film 21 that has been exposed to light that has passed through the opening 82a provided in the light shielding mask 82 is cured to become the mask layer 21A and remains on the protective film 20 after development. On the other hand, the portion 21B of the organic insulating film 21 that has not been exposed to light is melted by development.
 続いて、マスク層21Aをマスクとしてドライエッチングを行なう。この際、有機半導体膜19および保護膜20を一括してエッチングしパターニングを行なうことにより、図12(A),(B)に示すように、アイランド状に有機半導体層19a、保護層20aおよびマスク層21Aを形成する。なお、有機半導体層19a、保護層20aおよびマスク層21Aの積層体は、図1に示すように、互いに対峙して配置されたソース電極14aおよびドレイン電極14bの一部と、これらと分離して形成されたボディ電極17aの一部とを覆うように形成される。 Subsequently, dry etching is performed using the mask layer 21A as a mask. At this time, the organic semiconductor film 19 and the protective film 20 are collectively etched and patterned, whereby the organic semiconductor layer 19a, the protective layer 20a, and the mask are formed in an island shape as shown in FIGS. Layer 21A is formed. As shown in FIG. 1, the stacked body of the organic semiconductor layer 19a, the protective layer 20a, and the mask layer 21A is separated from the source electrode 14a and the drain electrode 14b that are arranged to face each other. It is formed so as to cover a part of the formed body electrode 17a.
 ドライエッチングは、SF6、CHF3、CF4、O2、Arのガスおよびこれらを組み合わせたガスを用いて行う。保護層20aおよびマスク層21Aは、アッシング等による有機半導体層19aへのダメージを避けるため、アッシング等は行わずそのまま残しておく。 Dry etching is performed using SF6, CHF3, CF4, O2, Ar, or a combination of these gases. The protective layer 20a and the mask layer 21A are left as they are without ashing or the like in order to avoid damage to the organic semiconductor layer 19a due to ashing or the like.
 以上のような工程を経ることにより、本実施の形態に係る有機薄膜トランジスタ1を製造することができる。 The organic thin film transistor 1 according to the present embodiment can be manufactured through the above steps.
 図13(A),(B)および図14(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程および第2工程を示す図である。図13(A),(B)および図14(A),(B)に示すように、層間保護層22および層間マスク層23Aを形成する場合には、まず、スピンコート法、スリットコート法、インクジェット法、印刷法、蒸着法などを用いて、有機半導体層19a、保護層20aおよびマスク層21Aが形成された基板全体に無機絶縁膜若しくは有機絶縁膜またはこれらを組み合わせた積層膜から成る層間保護層22を形成する。続いて、上記の方法を用いて、層間保護層22上に層間マスク層23Aを形成するための有機絶縁膜23を形成する。層間保護層22および有機絶縁膜23は、それぞれ200~1000nm程度の厚さで形成される。 FIGS. 13A and 13B and FIGS. 14A and 14B show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 2A and 2B. It is a figure which shows a 2nd process. As shown in FIGS. 13A and 13B and FIGS. 14A and 14B, when forming the interlayer protective layer 22 and the interlayer mask layer 23A, first, spin coating, slit coating, Interlayer protection composed of an inorganic insulating film, an organic insulating film, or a laminated film combining these over the entire substrate on which the organic semiconductor layer 19a, the protective layer 20a, and the mask layer 21A are formed using an inkjet method, a printing method, a vapor deposition method, or the like. Layer 22 is formed. Subsequently, the organic insulating film 23 for forming the interlayer mask layer 23A is formed on the interlayer protective layer 22 by using the above method. The interlayer protective layer 22 and the organic insulating film 23 are each formed with a thickness of about 200 to 1000 nm.
 層間保護層22を形成するための材料としては、無機絶縁膜を用いる場合には、窒化膜、酸化膜、窒化酸化膜等を採用することができ、有機絶縁膜を用いる場合には、パリレン、旭硝子社製のCYTOP(登録商標)等を採用することができ、これら無機絶縁膜と有機絶縁膜を組み合わせたものも採用することができる。 As a material for forming the interlayer protective layer 22, when using an inorganic insulating film, a nitride film, an oxide film, a nitrided oxide film, or the like can be adopted. When using an organic insulating film, parylene, Asahi Glass Co., Ltd. CYTOP (registered trademark) or the like can be used, and a combination of these inorganic insulating films and organic insulating films can also be used.
 有機絶縁膜23としては、たとえば、ネガ型の有機絶縁膜を採用することができる。有機絶縁膜23は感光性を有し、その一部がマスクとして機能する。有機絶縁膜23は、遮光マスク81を用いて露光および現像される。この際、有機絶縁膜23のうち、遮光マスク81に設けられた開口部81aを通過した光が当った部分は、硬化して層間マスク層23Aとなり、現像後も層間保護層22上に残る。一方、有機絶縁膜23のうち、光が当たらなかった部分23Bは、現像により溶ける。 As the organic insulating film 23, for example, a negative organic insulating film can be adopted. The organic insulating film 23 has photosensitivity, and a part thereof functions as a mask. The organic insulating film 23 is exposed and developed using a light shielding mask 81. At this time, the portion of the organic insulating film 23 that has been exposed to light that has passed through the opening 81a provided in the light shielding mask 81 is cured to become the interlayer mask layer 23A, and remains on the interlayer protective layer 22 after development. On the other hand, the portion 23B of the organic insulating film 23 that was not exposed to light is melted by development.
 このため、有機絶縁膜23のうちコンタクトホール24a,24b,24cを形成する領域およびゲート電極12に達するコンタクトホール(不図示)を形成する領域に対して遮光マスク81で遮光する。 Therefore, the light shielding mask 81 shields the region of the organic insulating film 23 where the contact holes 24a, 24b, 24c are formed and the region where the contact hole (not shown) reaching the gate electrode 12 is formed.
 続いて、層間マスク層23Aをマスクとしてドライエッチングを行い、図14(A),(B)に示すように、コンタクトホール24a,24b,24cを形成する。この際、有機半導体層19aによって覆われていないゲート電極12上に位置する層間保護層22およびゲート絶縁層13の一部も同様にエッチングされることにより、ゲート電極12に達するコンタクトホール(不図示)を形成してもよい。 Subsequently, dry etching is performed using the interlayer mask layer 23A as a mask to form contact holes 24a, 24b, and 24c as shown in FIGS. At this time, a part of the interlayer protective layer 22 and the gate insulating layer 13 located on the gate electrode 12 that is not covered with the organic semiconductor layer 19a is also etched in the same manner, so that a contact hole (not shown) reaching the gate electrode 12 is formed. ) May be formed.
 図15(A),(B)は、図2(A),(B)に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。図15(A),(B)に示すように、真空蒸着法、スパッタ法等により、ソース電極端子25a、画素電極25b、ボディ電極端子25cを形成する。ソース電極端子25a、画素電極25b、ボディ電極端子25cは同一の材料によって形成してもよいし、異なる材料によって形成してもよい。これらを形成する材料としては、Au、Ag、Cu、Al、Moなどの導電膜や、IZO、ITO、CNT、グラフェンなどの透明導電膜を採用することができる。液晶表示装置や、ボトムエミッション型のOLED表示装置では、開口部から光を取り出すために画素電極25bには、IZO、ITO、ZnO、SnOなどの透明導電膜を用いることが望ましい。一方、トップエミッション型のOLED表示装置では、上部から光を取り出すために画素電極25bには、Al、Al合金、Ag、Ag合金などの反射電極を用いるか、あるいは、上層にIZO、ITOなどの透明導電膜、下層にAl、Al合金、Ag、Ag合金、Mo、Crなどの反射電極を組み合わせた積層構造電極を用いることが望ましい。本実施例では、一例として、ソース電極端子25a、画素電極25b、ボディ電極端子25cを同一材料で形成し、材料として透明導電膜を用いた場合について述べる。 FIGS. 15A and 15B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIGS. 2A and 2B. As shown in FIGS. 15A and 15B, a source electrode terminal 25a, a pixel electrode 25b, and a body electrode terminal 25c are formed by vacuum deposition, sputtering, or the like. The source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c may be formed of the same material or different materials. As a material for forming these, a conductive film such as Au, Ag, Cu, Al, or Mo, or a transparent conductive film such as IZO, ITO, CNT, or graphene can be used. In a liquid crystal display device or a bottom emission type OLED display device, it is desirable to use a transparent conductive film such as IZO, ITO, ZnO, or SnO for the pixel electrode 25b in order to extract light from the opening. On the other hand, in a top emission type OLED display device, a reflective electrode such as Al, Al alloy, Ag, or Ag alloy is used for the pixel electrode 25b in order to extract light from the upper portion, or IZO, ITO, or the like is used as an upper layer. It is desirable to use a laminated structure electrode in which a transparent conductive film and a reflective electrode made of Al, Al alloy, Ag, Ag alloy, Mo, Cr or the like are combined in the lower layer. In this embodiment, as an example, a case where the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c are formed of the same material and a transparent conductive film is used as the material will be described.
 スパッタ法を用いる場合には、層間マスク層23Aが形成された基板全体に上記の透明導電膜を成膜し、所定のパターンに当該透明導電膜をパターニングすることにより、ソース電極端子25a、画素電極25b、ボディ電極端子25cが形成される。真空蒸着法を用いてソース電極端子25a、画素電極25b、ボディ電極端子25cを形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。 When the sputtering method is used, the transparent conductive film is formed on the entire substrate on which the interlayer mask layer 23A is formed, and the transparent conductive film is patterned into a predetermined pattern, whereby the source electrode terminal 25a and the pixel electrode are formed. 25b and body electrode terminal 25c are formed. In the case of forming the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c by using a vacuum evaporation method, a separate patterning process is not required by depositing the metal film using a metal mask.
 また、スピンコート法、スリットコート法、インクジェット法、印刷法などを用いて、ソース電極端子25a、画素電極25b、ボディ電極端子25cを形成する場合には、これらを形成する材料としては、Au、Ag、Cu、Al、ITO、CNT、グラフェンなどのナノ粒子を含むインクを採用することができる。 Further, when the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c are formed by using a spin coating method, a slit coating method, an ink jet method, a printing method, or the like, as materials for forming these, Au, An ink containing nanoparticles such as Ag, Cu, Al, ITO, CNT, and graphene can be employed.
 ソース電極端子25a、画素電極25bおよびボディ電極端子25cは、それぞれ100~600nm程度の厚さで形成される。なお、ソース電極端子25a、画素電極25bおよびボディ電極端子25cと同時に、これらと同一の材料によってゲート電極12に達するコンタクトホールの表面を覆うようにゲート電極端子(不図示)が形成されてもよい。 The source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c are each formed with a thickness of about 100 to 600 nm. A gate electrode terminal (not shown) may be formed simultaneously with the source electrode terminal 25a, the pixel electrode 25b, and the body electrode terminal 25c so as to cover the surface of the contact hole reaching the gate electrode 12 with the same material. .
 以上のような工程を経て、ボトムゲート-ボトムコンタクト構造の有機薄膜トランジスタ1を具備する薄膜トランジスタ基板2を製造することができる。 Through the above-described steps, the thin film transistor substrate 2 including the organic thin film transistor 1 having a bottom gate-bottom contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2にあっては、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1 and the thin film transistor substrate 2 having the same according to the present embodiment, the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, so that the source electrode 14a and the drain electrode 14b are formed. The work function and the work function of the body electrode 17a are different.
 このような構成とすることにより、有機薄膜トランジスタ1およびこれを備えた薄膜トランジスタ基板2にあっては、上述のようにボディ電極17aを介して有機半導体層19a中に蓄積した電荷(電子または正孔)を容易に取り除くことができる。これにより、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 By adopting such a configuration, in the organic thin film transistor 1 and the thin film transistor substrate 2 having the organic thin film transistor 1, charges (electrons or holes) accumulated in the organic semiconductor layer 19a through the body electrode 17a as described above. Can be easily removed. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 また、当該薄膜トランジスタ基板2を用いて液晶表示パネルや有機ELパネルを製造することにより、バックライト光、外光、自発光など光の影響を受けにくい、安定した表示品位の液晶パネル、有機ELパネルを得ることができる。 In addition, by manufacturing a liquid crystal display panel or an organic EL panel using the thin film transistor substrate 2, a liquid crystal panel or an organic EL panel having a stable display quality that is hardly affected by light such as backlight, external light, and self-light emission. Can be obtained.
 また、本実施の形態に係る有機薄膜トランジスタ1は、ソース電極14aおよびドレイン電極14bを有機半導体層19aの成膜前に形成するボトムコンタクト構造を有するため、ソース電極14aおよびドレイン電極14bを形成する際に、リフトオフ法ではなくフォトリソグラフィーが使える。このため、チャネル長の短い有機薄膜トランジスタ1を製造できることになり、これを用いて高精細なディスプレイや微細なデバイスを製造することができる。 Moreover, since the organic thin film transistor 1 according to the present embodiment has a bottom contact structure in which the source electrode 14a and the drain electrode 14b are formed before the organic semiconductor layer 19a is formed, the source electrode 14a and the drain electrode 14b are formed. In addition, photolithography can be used instead of the lift-off method. For this reason, the organic thin-film transistor 1 with a short channel length can be manufactured, and a high-definition display and a fine device can be manufactured using this.
 (実施の形態2)
 図16(A),(B)は、実施の形態2に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図16(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Aおよびこれを具備する薄膜トランジスタ基板2Aについて説明する。なお、図16(A)は、図2(A)に対応する部分を示しており、図16(B)は、図2(B)に対応する部分を示している。
(Embodiment 2)
16A and 16B are a cross-sectional view and a body electrode extending direction when the thin film transistor substrate including the organic thin film transistor according to the second embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along. With reference to FIGS. 16A and 16B, an organic thin film transistor 1A according to the present embodiment and a thin film transistor substrate 2A including the same will be described. 16A shows a portion corresponding to FIG. 2A, and FIG. 16B shows a portion corresponding to FIG. 2B.
 図16(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Aおよびこれを具備する薄膜トランジスタ基板2Aは、実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2と比較した場合に、ボディ電極17bに表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数と異なる仕事関数を有するボディ電極17bを備える点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 16A and 16B, the organic thin film transistor 1A according to the present embodiment and the thin film transistor substrate 2A having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same. When the body electrode 17b is subjected to a surface treatment, the body electrode 17b has a work function different from that of the source electrode 14a and the drain electrode 14b. It is the same.
 具体的には、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の金属材料によって構成されており、ボディ電極17bと有機半導体層19aの界面には、SAM(Self Align Monolayer)膜(自己組織化単分子膜93)が形成されている。ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の金属材料によって構成した場合であっても自己組織化単分子膜93をボディ電極17bの表面を覆うように形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17bの仕事関数とを異ならせることができる。自己組織化単分子膜93は、有機半導体層19aの種類に応じて選択することができる。 Specifically, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and an SAM (Self Align Monolayer) film (self) is formed on the interface between the body electrode 17b and the organic semiconductor layer 19a. An organized monolayer 93) is formed. Even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b. The work function of the drain electrode 14b and the work function of the body electrode 17b can be made different. The self-assembled monolayer 93 can be selected according to the type of the organic semiconductor layer 19a.
 有機半導体層19aがp型の場合には、自己組織化単分子膜93の材料として、MBT(4-Methyl Benzene Thiol)を採用することができる。 When the organic semiconductor layer 19a is p-type, MBT (4-Methyl Benzene Thiol) can be used as the material of the self-assembled monolayer 93.
 この場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、有機半導体材料のHOMO(Highest Occupied Molecular Orbital:最高被占軌道)レベルに近い仕事関数を有する金属材料を採用する。 In this case, a metal material having a work function close to the HOMO (Highest Occupied Molecular Orbital) level of the organic semiconductor material is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b.
 上記のMBT(4-Methyl Benzene Thiol)によって構成される自己組織化単分子膜93が、ボディ電極17bの表面を覆うように形成されることにより、ボディ電極17bの仕事関数は、ソース電極14aおよびドレイン電極14bの仕事関数よりも小さくなる。 By forming the self-assembled monolayer 93 composed of the above MBT (4-Methyl Benzene Thiol) so as to cover the surface of the body electrode 17b, the work function of the body electrode 17b is the same as that of the source electrode 14a and It becomes smaller than the work function of the drain electrode 14b.
 また、有機半導体層19aがn型の場合には、自己組織化単分子膜93の材料として、HBT(4-Hydroxy Benzene Thiol)またはFBT(Fluoro Benzene Thiol)を採用することができる。 Further, when the organic semiconductor layer 19a is n-type, HBT (4-Hydroxy Benzene Thiol) or FBT (Fluoro Benzene Thiol) can be adopted as the material of the self-assembled monolayer 93.
 この場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、有機半導体材料のLUMO(Lowest Unoccupied Molecular Orbital:最低空軌道)レベルに近い仕事関数を有する金属材料を採用する。 In this case, a metal material having a work function close to the LUMO (Lowest Unoccupied Molecular Orbital) level of the organic semiconductor material is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b.
 上記のHBT(4-Hydroxy Benzene Thiol)またはFBT(Fluoro Benzene Thiol)によって構成される自己組織化単分子膜93がボディ電極17bの表面を覆うように形成されることにより、ボディ電極17bの仕事関数は、ソース電極14aおよびドレイン電極14bの仕事関数よりも大きくなる。 By forming the self-assembled monolayer 93 composed of the above-mentioned HBT (4-Hydroxy Benzene Thiol) or FBT (Fluoro Benzene Thiol) so as to cover the surface of the body electrode 17b, the work function of the body electrode 17b Becomes larger than the work functions of the source electrode 14a and the drain electrode 14b.
 なお、n型の有機半導体層およびp型の有機半導体層のいずれを用いる場合であっても自己組織化単分子膜93を形成する代わりに、ボディ電極17bの表面にプラズマ処理、UV処理を施すことにより、ボディ電極17bの仕事関数をソース電極14aおよびドレイン電極14bの仕事関数に対して異ならせることができる。 Note that, regardless of whether an n-type organic semiconductor layer or a p-type organic semiconductor layer is used, instead of forming the self-assembled monolayer 93, the surface of the body electrode 17b is subjected to plasma treatment and UV treatment. Thus, the work function of the body electrode 17b can be made different from that of the source electrode 14a and the drain electrode 14b.
 本実施の形態に係る薄膜トランジスタ基板の製造方法は、基本的に実施の形態1に係る薄膜トランジスタ基板2の製造方法に準じており、表面処理工程を有する点において、実施の形態1に係る薄膜トランジスタ基板2の製造方法と相違する。 The method for manufacturing the thin film transistor substrate according to the present embodiment basically conforms to the method for manufacturing the thin film transistor substrate 2 according to the first embodiment, and has a surface treatment step, so that the thin film transistor substrate 2 according to the first embodiment. This is different from the manufacturing method.
 本実施の形態に係る有機薄膜トランジスタ1Aの製造方法にあっては、まず、ベースコート層を形成する工程、ゲート電極を形成する工程およびゲート絶縁層を形成する工程において、実施の形態1に係る薄膜トランジスタ基板2の製造方法と同様の処理を施すことにより、基板10にベースコート層11、ゲート電極12、ゲート絶縁層13を形成する。 In the method of manufacturing the organic thin film transistor 1A according to the present embodiment, first, in the step of forming the base coat layer, the step of forming the gate electrode, and the step of forming the gate insulating layer, the thin film transistor substrate according to the first embodiment The base coat layer 11, the gate electrode 12, and the gate insulating layer 13 are formed on the substrate 10 by performing the same process as in the manufacturing method 2.
 図17(A),(B)は、図16(A),(B)に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。図17(A),(B)に示すように、真空蒸着法、スパッタ法等によって所定の形状にパターニングされたソース電極14a、ドレイン電極14bおよびボディ電極17bを100~400nm程度の厚さでゲート絶縁層13上に形成する。 FIGS. 17A and 17B are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 16A and 16B. As shown in FIGS. 17A and 17B, a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are gated to a thickness of about 100 to 400 nm. It is formed on the insulating layer 13.
 ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料は、同一の材料であり、有機半導体層19aの種類に応じて選択することができる。 The materials of the source electrode 14a, the drain electrode 14b, and the body electrode 17b are the same material, and can be selected according to the type of the organic semiconductor layer 19a.
 有機半導体層19aがp型となる場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、仕事関数が大きくp型の有機半導体層19aへの正孔の注入障壁が小さい材料を採用することが好ましく、Pt、Rh、Au、Cu、Ag、Ta、W、Mo、MoW、MnO、MnO、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is p-type, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of a material having a high work function and a small hole injection barrier to the p-type organic semiconductor layer 19a. Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc., and a laminated structure in which these are laminated and combined The metal film can be used.
 たとえば、p型の有機半導体層19aの材料としてペンタセン(HOMOレベル:約5.3eV)を採用する場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料として、Au(仕事関数:約5.0eV)を採用することができる。この場合には、正孔の注入障壁高さが小さい(約0.3eV)ので、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1Aに大きな電流を流すことができる。 For example, when pentacene (HOMO level: about 5.3 eV) is adopted as the material of the p-type organic semiconductor layer 19a, the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: about 5.0 eV) can be employed. In this case, since the hole injection barrier height is small (about 0.3 eV), holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and the organic thin film transistor 1A can be injected. A large current can flow.
 有機半導体層19aがn型となる場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、仕事関数が小さくn型の有機半導体層19aへの電子の注入障壁が小さい材料を採用することが好ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is n-type, the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b is a material having a small work function and a small barrier for electron injection into the n-type organic semiconductor layer 19a. It is preferable to adopt metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr, and a metal film having a laminated structure in which these are stacked and combined. can do.
 たとえば、n型の有機半導体層19aの材料としてC60フラーレン(LUMOレベル:約4.5eV)を採用する場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料として、Au(仕事関数:約4.5eV)を採用することができる。この場合には、電子の注入障壁高さが小さい(約0.5eV)ので、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1Aに大きな電流を流すことができる。 For example, when C60 fullerene (LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 4.5 eV) can be employed. In this case, since the electron injection barrier height is small (about 0.5 eV), electrons can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current flows into the organic thin film transistor 1A. Can flow.
 また、ゲート絶縁層13とソース電極14a、ドレイン電極14bおよびボディ電極17bとの密着性を高めるために、ゲート絶縁層13とソース電極14a、ドレイン電極14bおよびボディ電極17bとの間にTi、Cr等の密着層を形成してもよい。 Further, in order to improve the adhesion between the gate insulating layer 13 and the source electrode 14a, drain electrode 14b, and body electrode 17b, Ti, Cr are interposed between the gate insulating layer 13 and the source electrode 14a, drain electrode 14b, and body electrode 17b. An adhesive layer such as
 なお、真空蒸着法を用いてソース電極14a、ドレイン電極14bおよびボディ電極17bを形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。 In addition, when forming the source electrode 14a, the drain electrode 14b, and the body electrode 17b using a vacuum evaporation method, the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
 スパッタ法を用いてソース電極14a、ドレイン電極14bおよびボディ電極17bを形成する場合には、まず、ゲート絶縁層13の主表面上の全面に亘って上記の金属膜(ソース・ドレイン・ボディ電極膜)を成膜した後、ソース・ドレイン・ボディ電極膜上に感光性レジストを塗布する。その後、フォトリソグラフィ(露光・現像)によって感光性レジストをパターニングする。続いて、感光性レジストをマスクとしてゲート電極膜をウェットエッチング又はドライエッチングすることにより、ソース電極14a、ドレイン電極14bおよびボディ電極17bをパターニングする。 When the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed by sputtering, first, the above metal film (source / drain / body electrode film) is formed over the entire main surface of the gate insulating layer 13. ), A photosensitive resist is applied on the source / drain / body electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
 ウェットエッチングは、王水、SLAエッチャント(組成;HPO(リン酸):HO:HNO(硝酸):CHCOOH(酢酸)=16:2:1:1)、硝酸、リン酸、酢酸、フッ酸およびこれらを組み合わせたエッチャントを用いて行う。ドライエッチングは、SF、CHF、CF、Arのガスおよびこれらを組み合わせたガスを用いて行う。エッチングの後にマスクとして用いた感光性レジストを剥離液によって除去する。これにより、ソース電極14aおよびドレイン電極14bが形成される。 Wet etching is aqua regia, SLA etchant (composition; H 3 PO 4 (phosphoric acid): H 2 O: HNO 3 (nitric acid): CH 3 COOH (acetic acid) = 16: 2: 1: 1), nitric acid, phosphorus An acid, acetic acid, hydrofluoric acid, and an etchant combining these are used. The dry etching is performed using SF 6 , CHF 3 , CF 4 , Ar gas, and a combination thereof. After the etching, the photosensitive resist used as a mask is removed with a stripping solution. Thereby, the source electrode 14a and the drain electrode 14b are formed.
 また、ソース電極14a、ドレイン電極14bおよびボディ電極17bのパターン形成方法は、上記の方法に限定されず、導電性ペーストを用いた印刷法や電解メッキ法や無電解メッキ法等を採用することができる。 The pattern forming method of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is not limited to the above method, and a printing method, an electroplating method, an electroless plating method, or the like using a conductive paste may be employed. it can.
 図18(A),(B)は、図17(A),(B)に示すボディ電極に表面処理を施す工程を示す図である。図18(A),(B)に示すように、ボディ電極17bに表面処理を施す工程にあっては、まず、ソース電極14a、ドレイン電極14bおよびボディ電極17bが形成された基板10全面に感光性レジスト16を塗布した後、フォトリソグラフィ(露光・現像)によってレジストをパターニングし、これによりボディ電極17bの表面のみが露出するようにする。続いて、パターニングされた感光性レジスト16が形成された基板10全面に自己組織化単分子膜93を塗布して、ボディ電極17bの仕事関数のみを変える。最後に剥離液でレジストを剥離することにより、感光性レジスト16と当該感光性レジスト16上に塗布された自己組織化単分子膜93とを除去する。これにより、ボディ電極17bの表面を覆うように自己組織化単分子膜93が形成され、ボディ電極17bの仕事関数を変更することができる。 18 (A) and 18 (B) are diagrams showing a step of performing a surface treatment on the body electrode shown in FIGS. 17 (A) and 17 (B). As shown in FIGS. 18A and 18B, in the step of performing the surface treatment on the body electrode 17b, first, the entire surface of the substrate 10 on which the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed is exposed to light. After the application of the resist 16, the resist is patterned by photolithography (exposure / development) so that only the surface of the body electrode 17b is exposed. Subsequently, a self-assembled monolayer 93 is applied to the entire surface of the substrate 10 on which the patterned photosensitive resist 16 is formed, and only the work function of the body electrode 17b is changed. Finally, the resist is stripped with a stripping solution to remove the photosensitive resist 16 and the self-assembled monolayer 93 applied on the photosensitive resist 16. Thereby, the self-assembled monomolecular film 93 is formed so as to cover the surface of the body electrode 17b, and the work function of the body electrode 17b can be changed.
 なお、図示はしないが、フォトリソグラフィー法の代わりに、インクジェット法によって、ボディ電極17b領域にのみ自己組織化単分子膜93を滴下して、ボディ電極17bの仕事関数のみを変更してもよい。この場合には、レジスト塗布やフォトリソグラフィー法によるパターニングが不要になり、ボディ電極17bの表面を覆うように直接自己組織化単分子膜を形成できるため、マスク枚数を削減することができる。これにより、製造コストを削減することができる。 Although not shown, only the work function of the body electrode 17b may be changed by dropping the self-assembled monolayer 93 only in the body electrode 17b region by an ink jet method instead of the photolithography method. In this case, resist coating or patterning by photolithography is not required, and the self-assembled monomolecular film can be directly formed so as to cover the surface of the body electrode 17b, so that the number of masks can be reduced. Thereby, manufacturing cost can be reduced.
 上述のように、有機半導体層がp型の場合、ボディ電極17bの仕事関数は、蓄積した電子を抜き取るためにソース電極14aおよびドレイン電極14bの仕事関数よりも小さいことが望ましい。仕事関数を小さくする自己組織化単分子膜93としては、たとえば、MBT(4-Methyl Benzene Thiol)を採用することができる。 As described above, when the organic semiconductor layer is p-type, the work function of the body electrode 17b is desirably smaller than the work functions of the source electrode 14a and the drain electrode 14b in order to extract accumulated electrons. For example, MBT (4-Methyl Benzene Thiol) can be employed as the self-assembled monolayer 93 that reduces the work function.
 たとえば、p型有機半導体材料としてペンタセンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、MBTをボディ電極17bの表面上に塗布することにより、ボディ電極(Au)の仕事関数を、5.0eVから4.3eV程度まで小さくすることができる。 For example, when pentacene is adopted as the p-type organic semiconductor material and Au is adopted as the material of the source electrode 14a, the drain electrode 14b and the body electrode 17b, MBT is applied on the surface of the body electrode 17b to The work function of the electrode (Au) can be reduced from about 5.0 eV to about 4.3 eV.
 あるいは、別の一例として、p型有機半導体材料としてペンタセンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてCuを採用する場合には、MBTをボディ電極17bの表面上に塗布することにより、ボディ電極(Cu)の仕事関数を、4.7eVから4.0eV程度まで小さくすることができる。 Alternatively, as another example, when pentacene is used as the p-type organic semiconductor material and Cu is used as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, MBT is applied on the surface of the body electrode 17b. By doing so, the work function of the body electrode (Cu) can be reduced from 4.7 eV to about 4.0 eV.
 この結果、ボディ電極17bの仕事関数をp型の有機半導体層19aであるペンタセンのLUMOレベル(約3.5eV)に近い値まで小さくすることができるので、ボディ電極17bを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。これにより、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, the work function of the body electrode 17b can be reduced to a value close to the LUMO level (about 3.5 eV) of pentacene, which is the p-type organic semiconductor layer 19a, so that the organic semiconductor layer 19a is interposed via the body electrode 17b. The electrons accumulated inside can be easily extracted. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 上述のように、有機半導体層がn型の場合、ボディ電極17bの仕事関数は、蓄積した正孔を抜き取るためにソース電極14aおよびドレイン電極14bの仕事関数よりも大きいことが望ましい。仕事関数を大きくする自己組織化単分子膜としては、たとえば、HBT(4-Hydroxy Benzene Thiol)や、FBT(Fluoro Benzene Thiol)を採用することができる。 As described above, when the organic semiconductor layer is n-type, the work function of the body electrode 17b is preferably larger than the work functions of the source electrode 14a and the drain electrode 14b in order to extract accumulated holes. For example, HBT (4-Hydroxy Benzene Thiol) or FBT (Fluoro Benzene Thiol) can be employed as the self-assembled monolayer that increases the work function.
 たとえば、n型有機半導体材料としてC60フラーレンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、HBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極(Au)の仕事関数を、5.0eVから5.2eV程度まで大きくすることができる。 For example, when C60 fullerene is adopted as the n-type organic semiconductor material and Au is adopted as the material of the source electrode 14a, the drain electrode 14b and the body electrode 17b, HBT or FBT is applied to the surface of the body electrode 17b. The work function of the body electrode (Au) can be increased from about 5.0 eV to about 5.2 eV.
 あるいは、別の一例として、n型有機半導体材料としてC60フラーレンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAlを採用する場合には、HBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極(Al)の仕事関数を、4.3eVから4.5eV程度まで大きくすることができる。 Alternatively, as another example, when C60 fullerene is used as the n-type organic semiconductor material and Al is used as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, HBT or FBT is used as the surface of the body electrode 17b. The work function of the body electrode (Al) can be increased from 4.3 eV to 4.5 eV.
 この結果、ボディ電極17bの仕事関数をn型の有機半導体層19aであるC60フラーレンのHOMOレベル(約6.2eV)に近づけられるので、ボディ電極17bを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。これにより、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, the work function of the body electrode 17b can be brought close to the HOMO level (about 6.2 eV) of C60 fullerene, which is the n-type organic semiconductor layer 19a, so that it is accumulated in the organic semiconductor layer 19a via the body electrode 17b. Holes can be easily extracted. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 続いて、有機半導体層、第1の保護層およびマスク層を形成する工程において、実施の形態1に係る薄膜トランジスタ基板の製造方法と同様の処理を施すことにより、本実施の形態に係る有機薄膜トランジスタ1Aを製造することができる。 Subsequently, in the step of forming the organic semiconductor layer, the first protective layer, and the mask layer, the same process as that of the method for manufacturing the thin film transistor substrate according to the first embodiment is performed, thereby providing the organic thin film transistor 1A according to the present embodiment. Can be manufactured.
 次に、層間保護層および層間マスク層を形成する工程、ならびに、画素電極、ソース電極端子およびボディ電極端子を形成する工程において、実施の形態1に係る薄膜トランジスタ基板2の製造方法と同様の処理を施すことにより、ボトムゲート-ボトムコンタクト構造の有機薄膜トランジスタ1Aを具備する薄膜トランジスタ基板2Aを製造することができる。 Next, in the step of forming the interlayer protective layer and the interlayer mask layer, and the step of forming the pixel electrode, the source electrode terminal, and the body electrode terminal, the same process as the method for manufacturing the thin film transistor substrate 2 according to the first embodiment is performed. By applying, the thin film transistor substrate 2A including the organic thin film transistor 1A having the bottom gate-bottom contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Aおよびこれを具備する薄膜トランジスタ基板2Aにあっては、ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の材料で形成した後に、ボディ電極17bの表面にのみ表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1A according to the present embodiment and the thin film transistor substrate 2A including the same, after the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed of the same material, the surface is formed only on the surface of the body electrode 17b. By performing the treatment, the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
 これにより、本実施の形態に係る有機薄膜トランジスタ1Aおよびこれを具備する薄膜トランジスタ基板2Aにおいても実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2とほぼ同様の効果が得られる。 Thereby, also in the organic thin film transistor 1A according to the present embodiment and the thin film transistor substrate 2A including the organic thin film transistor 1A, substantially the same effects as the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 including the same are obtained.
 また、本実施の形態に係る薄膜トランジスタ基板2Aの製造方法にあっては、ソース電極14aおよびドレイン電極14bと同じ材料でボディ電極17bを形成することができるため、工程数や材料費を削減し、製造コストを削減することできる。 Further, in the method of manufacturing the thin film transistor substrate 2A according to the present embodiment, the body electrode 17b can be formed from the same material as the source electrode 14a and the drain electrode 14b, thereby reducing the number of processes and material costs. Manufacturing cost can be reduced.
 (実施の形態3)
 図19(A),(B)は、実施の形態3に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図19(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタについて説明する。なお、図19(A)は、図2(A)に対応する部分を示しており、図19(B)は、図2(B)に対応する部分を示している。
(Embodiment 3)
19A and 19B are a cross-sectional view and a body electrode extending direction when the thin film transistor substrate including the organic thin film transistor according to the third embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along. With reference to FIGS. 19A and 19B, an organic thin film transistor 1B according to the present embodiment and a thin film transistor including the same will be described. FIG. 19A shows a portion corresponding to FIG. 2A, and FIG. 19B shows a portion corresponding to FIG.
 図19(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタ基板2Bは、実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2と比較した場合に、ソース電極14aおよびドレイン電極14bがボトムコンタクト構造ではなくトップコンタクト構造である点およびこれに伴い保護層とマスク層とが形成されていない点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 19A and 19B, the organic thin film transistor 1B according to the present embodiment and the thin film transistor substrate 2B having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same. Is different in that the source electrode 14a and the drain electrode 14b have a top contact structure instead of a bottom contact structure, and a protective layer and a mask layer are not formed accordingly. It is almost the same.
 具体的には、本実施の形態に係る有機薄膜トランジスタ1Bは、基板10と、基板10の主表面を覆うように形成されたベースコート層11と、ベースコート層11上に形成されたゲート電極12と、ゲート電極12を覆うようにベースコート層11上に形成されたゲート絶縁層13と、ゲート絶縁層13を挟み込むようにゲート電極12と対向してゲート絶縁層13上に配置された有機半導体層19aと、有機半導体層19aの上面に接続されるようにゲート絶縁層13上に形成されたソース電極14a、ドレイン電極14bおよびボディ電極17aとを備える。 Specifically, the organic thin film transistor 1B according to the present embodiment includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, a gate electrode 12 formed on the base coat layer 11, A gate insulating layer 13 formed on the base coat layer 11 so as to cover the gate electrode 12; an organic semiconductor layer 19a disposed on the gate insulating layer 13 so as to face the gate electrode 12 so as to sandwich the gate insulating layer 13; A source electrode 14a, a drain electrode 14b, and a body electrode 17a formed on the gate insulating layer 13 so as to be connected to the upper surface of the organic semiconductor layer 19a.
 ソース電極14aおよびドレイン電極14bは、互いに離間してゲート電極12の延在する方向に交差する方向に沿って並んで配置されるとともに、ゲート絶縁層13を挟んでゲート電極12に少なくともその一部が重なるように設けられている。ソース電極14aおよびドレイン電極14bは有機半導体層19aに電流を流すための部位である。 The source electrode 14 a and the drain electrode 14 b are arranged side by side along a direction that is spaced apart from each other and intersects the direction in which the gate electrode 12 extends, and at least a part of the source electrode 14 a and the drain electrode 14 b sandwich the gate insulating layer 13. Are provided to overlap. The source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
 ボディ電極17aは、ソース電極14aおよびドレイン電極14bから分離して配置され、ゲート電極12と重ならないように設けられている。ボディ電極17aは、有機半導体層19a内に蓄積された電荷を抜くための部位である。 The body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12. The body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
 また、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 Further, by forming the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
 本実施の形態に係る薄膜トランジスタ基板2Bの製造方法は、基本的に実施の形態1に係る薄膜トランジスタ基板2の製造方法に準じており、ソース電極14aおよびドレイン電極14bを形成する工程の前に有機半導体層19aを形成する工程を備える点および有機半導体層19a上に保護層およびマスク層を形成する工程を備えていない点において相違する。 The manufacturing method of the thin film transistor substrate 2B according to the present embodiment is basically the same as the manufacturing method of the thin film transistor substrate 2 according to the first embodiment, and the organic semiconductor is formed before the step of forming the source electrode 14a and the drain electrode 14b. The difference is that the step of forming the layer 19a is provided and the step of forming a protective layer and a mask layer on the organic semiconductor layer 19a is not provided.
 本実施の形態に係る有機薄膜トランジスタ1Bの製造方法にあっては、まず、ベースコート層を形成する工程、ゲート電極を形成する工程およびゲート絶縁層を形成する工程において、実施の形態1に係る薄膜トランジスタ基板2の製造方法と同様の処理を施すことにより、基板10にベースコート層11、ゲート電極12、ゲート絶縁層13を形成する。 In the method of manufacturing the organic thin film transistor 1B according to the present embodiment, first, in the step of forming the base coat layer, the step of forming the gate electrode, and the step of forming the gate insulating layer, the thin film transistor substrate according to the first embodiment The base coat layer 11, the gate electrode 12, and the gate insulating layer 13 are formed on the substrate 10 by performing the same process as in the manufacturing method 2.
 図20(A),(B)および図21(A),(B)は、図19(A),(B)に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第1工程および第2工程を示す図である。図20(A),(B)に示すように、有機半導体層を形成する工程の第1工程において、スピンコート法、スリットコート法、インクジェット法、印刷法、蒸着法などを用いて、ソース電極14a、ドレイン電極14bおよびボディ電極17aが形成された基板全体に有機半導体膜19を40~200nmの厚さで形成する。 FIGS. 20A and 20B and FIGS. 21A and 21B are a first step and a second step of the step of forming the organic semiconductor layer of the thin film transistor substrate shown in FIGS. FIG. As shown in FIGS. 20A and 20B, in the first step of forming the organic semiconductor layer, a source electrode is formed using a spin coating method, a slit coating method, an ink jet method, a printing method, a vapor deposition method, or the like. The organic semiconductor film 19 is formed to a thickness of 40 to 200 nm on the entire substrate on which the drain electrode 14b, the body electrode 17a, and the drain electrode 14b are formed.
 p型の有機半導体膜19(有機半導体層19a)の材料としては、たとえばペンタセン、可溶性ペンタセン、TIPSペンタセン、P3HT(Poly[3-hexyltiophene-2,5-diyl])、銅フタロシアニン等を採用することができる。本実施の形態においては、たとえば耐薬液性に優れた銅フタロシアニンを採用することが好ましい。 As a material of the p-type organic semiconductor film 19 (organic semiconductor layer 19a), for example, pentacene, soluble pentacene, TIPS pentacene, P3HT (Poly [3-hexyltiophene-2,5-diyl]), copper phthalocyanine, or the like is employed. Can do. In the present embodiment, for example, it is preferable to employ copper phthalocyanine having excellent chemical resistance.
 n型の有機半導体膜19(有機半導体層19a)の材料としては、ペリレンジイミド誘導体、C60フラーレン、フラーレン誘導体、PCBM([6,6]-Phenyl-C61-Butyric Acid Methyl Ester)、SIMEF(Silylmethyl[60]fullerene)等を採用することができる。本実施の形態においては、たとえば耐薬液性に優れたC60フラーレンを採用することが好ましい。 Examples of the material of the n-type organic semiconductor film 19 (organic semiconductor layer 19a) include perylene diimide derivatives, C60 fullerene, fullerene derivatives, PCBM ([6,6] -Phenyl-C61-Butyric Acid Methyl Ester), SIMEF (Silylmethyl [ 60] fullerene) etc. can be adopted. In the present embodiment, for example, it is preferable to employ C60 fullerene having excellent chemical resistance.
 続いて、有機半導体膜19が形成された基板10全体に感光性レジスト26を塗布した後、フォトリソグラフィ(露光・現像)によって感光性レジスト26をパターニングし、有機半導体膜19をアイランド化したい領域の上にのみ感光性レジスト26を形成する。 Subsequently, after the photosensitive resist 26 is applied to the entire substrate 10 on which the organic semiconductor film 19 is formed, the photosensitive resist 26 is patterned by photolithography (exposure / development), and the region where the organic semiconductor film 19 is to be islanded is formed. The photosensitive resist 26 is formed only on the top.
 次に、図21(A),(B)に示すように、有機半導体層を形成する工程の第2工程において、感光性レジスト26をマスクとしてドライエッチングを行う。この際、有機半導体膜19をエッチングしてパターニングを行なうことにより、ゲート絶縁層13上にアイランド状に有機半導体層19aを形成する。 Next, as shown in FIGS. 21A and 21B, in the second step of forming the organic semiconductor layer, dry etching is performed using the photosensitive resist 26 as a mask. At this time, the organic semiconductor layer 19 is formed in an island shape on the gate insulating layer 13 by performing patterning by etching the organic semiconductor film 19.
 ドライエッチングは、SF、CHF、CF、Cl、O、Ar等のガスおよびこれらを組み合わせたガスを用いて行う。続いて、基板10全体を剥離液に浸漬させ、有機半導体層19a上の感光性レジスト26を除去することにより、有機半導体層19aの上面を露出させる。 Dry etching is performed using a gas such as SF 6 , CHF 3 , CF 4 , Cl 2 , O 2 , Ar, or a combination thereof. Subsequently, the entire substrate 10 is immersed in a stripping solution, and the upper surface of the organic semiconductor layer 19a is exposed by removing the photosensitive resist 26 on the organic semiconductor layer 19a.
 図22(A),(B)および図23(A),(B)は、図19(A),(B)に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第1工程および第2工程を示す図である。 22A, 22B, 23A, and 23B show a first step and a first step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIGS. 19A and 19B. It is a figure which shows 2 processes.
 図22(A),(B)に示すように、ソース電極14aおよびドレイン電極14bを形成する工程の第1工程にあっては、有機半導体層19aが形成された基板10全体にポジ型の感光性レジスト27を塗布する。続いて、ソース電極14aおよびドレイン電極14bを形成したい部分のみ露光をした後、現像して感光性レジスト27を除去する。この際、感光性レジスト27の断面形状は、ソース・ドレイン電極膜14を成膜後に感光性レジスト27をリフトオフしやすいように逆テーパー型が望ましい。ソース電極14aおよびドレイン電極14bを形成した領域を除くその他の領域は、感光性レジスト27で保護されている。 As shown in FIGS. 22A and 22B, in the first step of forming the source electrode 14a and the drain electrode 14b, a positive type photosensitive film is formed on the entire substrate 10 on which the organic semiconductor layer 19a is formed. A conductive resist 27 is applied. Subsequently, only the portions where the source electrode 14a and the drain electrode 14b are to be formed are exposed, and then developed to remove the photosensitive resist 27. At this time, the cross-sectional shape of the photosensitive resist 27 is desirably a reverse taper type so that the photosensitive resist 27 can be easily lifted off after the source / drain electrode film 14 is formed. Other regions except the region where the source electrode 14a and the drain electrode 14b are formed are protected with a photosensitive resist 27.
 次に、スパッタ法により、感光性レジスト27がパターニングされた基板10全体にソース・ドレイン電極膜14を100~400nm程度の厚さで成膜する。この際、感光性レジストパターンの段差によってソース・ドレイン電極膜14の一部が切断されることにより、ソース・ドレイン電極膜14は、有機半導体層19aの上面の端部に接する。 Next, the source / drain electrode film 14 is formed to a thickness of about 100 to 400 nm on the entire substrate 10 patterned with the photosensitive resist 27 by sputtering. At this time, a part of the source / drain electrode film 14 is cut by the step of the photosensitive resist pattern, so that the source / drain electrode film 14 is in contact with the end of the upper surface of the organic semiconductor layer 19a.
 続いて、図23(A),(B)に示すように、ソース電極およびドレイン電極を形成する工程の第2工程おいて、デポマスクとして用いた感光性レジスト27を剥離液でリフトオフして除去することにより、ソース電極14aおよびドレイン電極14bが形成される。 Subsequently, as shown in FIGS. 23A and 23B, in the second step of forming the source electrode and the drain electrode, the photosensitive resist 27 used as a deposition mask is removed by lifting off with a stripping solution. Thereby, the source electrode 14a and the drain electrode 14b are formed.
 なお、スパッタ法およびリフトオフ法を用いることによりソース電極14aおよびドレイン電極14bを形成する場合を例示して説明したが、これに限定されず、真空蒸着法、印刷法、電解メッキ法や無電解メッキ法等を用いてソース電極14aおよびドレイン電極14bを形成してもよい。 In addition, although the case where the source electrode 14a and the drain electrode 14b are formed by using a sputtering method and a lift-off method has been described as an example, the present invention is not limited to this, and is not limited thereto. The source electrode 14a and the drain electrode 14b may be formed using a method or the like.
 有機半導体層19aがp型となる場合には、ソース電極14aおよびドレイン電極14bの材料としては、仕事関数が大きくp型の有機半導体層19aへの正孔の注入障壁が小さい材料を採用することが好ましく、Pt、Rh、Au、Cu、Ag、Ta、W、Mo、MoW、MnO2、MnO3、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is p-type, a material having a large work function and a small hole injection barrier to the p-type organic semiconductor layer 19a is adopted as a material for the source electrode 14a and the drain electrode 14b. Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO2, MnO3, Ni, Ti, Cr, etc., and a metal film having a laminated structure in which these are laminated are employed. be able to.
 たとえば、p型の有機半導体層19aの材料として銅フタロシアニン(HOMOレベル:約5.0eV)を採用する場合には、ソース電極14aおよびドレイン電極14bの材料として、Au(仕事関数:約5.0eV)を採用することができる。この場合には、正孔の注入障壁がほとんどないため、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1Bに大きな電流を流すことができる。 For example, when copper phthalocyanine (HOMO level: about 5.0 eV) is adopted as the material of the p-type organic semiconductor layer 19a, Au (work function: about 5.0 eV) is used as the material of the source electrode 14a and the drain electrode 14b. ) Can be adopted. In this case, since there is almost no hole injection barrier, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow through the organic thin film transistor 1B. .
 有機半導体層19aがn型となる場合には、ソース電極14aおよびドレイン電極14bの材料としては、仕事関数が小さくn型の有機半導体層19aへの電子の注入障壁が小さい材料を採用することが好ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is n-type, a material having a small work function and a small barrier for injecting electrons into the n-type organic semiconductor layer 19a may be employed as the material for the source electrode 14a and the drain electrode 14b. Preferably, a metal film of Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, Cr or the like and a metal film having a laminated structure in which these are laminated and combined can be employed. .
 たとえば、n型の有機半導体層19aの材料としてC60フラーレン(LUMOレベル:約4.5eV)を採用する場合には、ソース電極14aおよびドレイン電極14bの材料として、Al(仕事関数:約4.3eV)を採用することができる。この場合には、電子の注入障壁高さが小さい(約-0.2eV)ので、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1Bに大きな電流を流すことができる。 For example, when C60 fullerene (LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, the material of the source electrode 14a and the drain electrode 14b is Al (work function: about 4.3 eV). ) Can be adopted. In this case, since the electron injection barrier height is small (about −0.2 eV), electrons can be easily injected from the source electrode 14a and the drain electrode 14b into the organic semiconductor layer 19a, which is large in the organic thin film transistor 1B. Current can flow.
 また、ソース電極14aおよびドレイン電極14bから有機半導体層19aへのキャリア注入量を高めるために、ソース電極14aおよびドレイン電極14bと有機半導体層19aの間に、数nm程度の薄い酸化膜層を形成してもよい。 Further, in order to increase the amount of carriers injected from the source electrode 14a and the drain electrode 14b to the organic semiconductor layer 19a, a thin oxide film layer of about several nm is formed between the source electrode 14a and the drain electrode 14b and the organic semiconductor layer 19a. May be.
 図24(A),(B)および図25(A),(B)は、図19(A),(B)に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程および第2工程を示す図である。図24(A),(B)および図25(A),(B)に示すように、ボディ電極17aを形成する工程の第1工程および第2工程において、実施の形態1に係る薄膜トランジスタの製造方法とほぼ同様の処理を施すことにより、有機半導体層19aの上面にその先端が接するボディ電極17aを形成する。これにより、本実施の形態に係る有機薄膜トランジスタ1Bを製造することができる。 24A, 24B, 25A, and 25B show the first and second steps of forming the body electrode of the thin film transistor substrate shown in FIGS. 19A and 19B. FIG. As shown in FIGS. 24A and 24B and FIGS. 25A and 25B, in the first step and the second step of forming the body electrode 17a, the thin film transistor according to the first embodiment is manufactured. The body electrode 17a whose tip is in contact with the upper surface of the organic semiconductor layer 19a is formed by performing a process substantially similar to the method. Thereby, the organic thin-film transistor 1B which concerns on this Embodiment can be manufactured.
 有機半導体層19aがp型となる場合において、光照射によりp型の有機半導体層19a内に蓄積した電子を抜き取るためには、ボディ電極17aの材料としては、ソース電極14aおよびドレイン電極14bよりも仕事関数が小さい材料を用いる事が望ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 In the case where the organic semiconductor layer 19a is p-type, in order to extract the electrons accumulated in the p-type organic semiconductor layer 19a by light irradiation, the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b. It is desirable to use a material having a small work function, and a laminated structure in which metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr are laminated and combined. The metal film can be used.
 たとえば、p型の有機半導体層19aの材料として銅フタロシアニン(HOMOレベル:約5.0eV)を採用し、ソース電極14aおよびドレイン電極14bの材料として、Au(仕事関数:約5.0eV)を採用する場合には、ボディ電極17aの材料としてCa(仕事関数:約2.9eV)を採用することができる。 For example, copper phthalocyanine (HOMO level: about 5.0 eV) is adopted as the material of the p-type organic semiconductor layer 19a, and Au (work function: about 5.0 eV) is adopted as the material of the source electrode 14a and the drain electrode 14b. In this case, Ca (work function: about 2.9 eV) can be adopted as the material of the body electrode 17a.
 この場合には、ボディ電極17aの仕事関数(約2.9eV)が、有機半導体層のLUMOレベル(約3.5eV)よりも低いため、有機半導体層19a中に蓄積された電子をボディ電極17a側から容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1Bにあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 In this case, since the work function (about 2.9 eV) of the body electrode 17a is lower than the LUMO level (about 3.5 eV) of the organic semiconductor layer, the electrons accumulated in the organic semiconductor layer 19a are transferred to the body electrode 17a. Can be easily removed from the side. As a result, in the organic thin film transistor 1B according to the present embodiment, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 有機半導体層19aがn型となる場合において、光照射によりn型の有機半導体層19a内に蓄積した正孔を抜き取るためには、ボディ電極17aの材料としては、ソース電極14aおよびドレイン電極14bよりも仕事関数が大きい材料を用いる事が望ましく、Pt、Rh、Au、Cu、Ag、Ta、Al、W、Mo、MoW、MnO、MnO、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 In the case where the organic semiconductor layer 19a is n-type, the material of the body electrode 17a is selected from the source electrode 14a and the drain electrode 14b in order to extract holes accumulated in the n-type organic semiconductor layer 19a by light irradiation. It is desirable to use a material having a large work function, such as Pt, Rh, Au, Cu, Ag, Ta, Al, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc. A metal film having a laminated structure in which the layers are stacked and combined can be employed.
 たとえば、n型の有機半導体層19aの材料としてC60フラーレン(HOMOレベル:約6.2eV、LUMOレベル:約4.5eV)を採用し、ソース電極14aおよびドレイン電極14bの材料としてAl(仕事関数:約4.3eV)を採用する場合には、ボディ電極17aの材料としてPt(仕事関数:約5.7eV)を採用することができる。 For example, C60 fullerene (HOMO level: about 6.2 eV, LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, and Al (work function :) is used as the material of the source electrode 14a and the drain electrode 14b. When adopting about 4.3 eV), Pt (work function: about 5.7 eV) can be adopted as the material of the body electrode 17a.
 この場合には、ボディ電極17aの仕事関数(約5.7eV)が、有機半導体層19aのHOMOレベル(約6.2eV)に近いため、有機半導体層19a中に蓄積された正孔をボディ電極17a側から容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1Bにあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 In this case, since the work function (about 5.7 eV) of the body electrode 17a is close to the HOMO level (about 6.2 eV) of the organic semiconductor layer 19a, the holes accumulated in the organic semiconductor layer 19a are used as the body electrode. It can be easily extracted from the 17a side. As a result, in the organic thin film transistor 1B according to the present embodiment, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 また、有機半導体層19aからボディ電極17aへのキャリアの抜き取りを高めるために、ボディ電極17aと有機半導体層19aの間に、数nm程度の薄い酸化膜層を形成してもよい。 Further, in order to enhance extraction of carriers from the organic semiconductor layer 19a to the body electrode 17a, a thin oxide film layer of about several nm may be formed between the body electrode 17a and the organic semiconductor layer 19a.
 図26(A),(B)および図27(A),(B)は、図19(A),(B)に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程および第2工程を示す図である。図28(A),(B)は、図19(A),(B)に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。 26 (A), (B) and FIGS. 27 (A), (B) show the first step of forming the interlayer protective layer and interlayer mask layer of the thin film transistor substrate shown in FIGS. 19 (A), (B). It is a figure which shows a 2nd process. 28A and 28B are diagrams showing a process of forming the pixel electrode, source electrode terminal, and body electrode terminal of the thin film transistor substrate shown in FIGS. 19A and 19B.
 図26(A),(B)から図28(A),(B)に示すように、層間保護層22および層間マスク層23Aを形成する工程、ならびに画素電極25b、ソース電極端子25aおよびボディ電極端子を形成する工程において、実施の形態1に係る薄膜トランジスタ基板の製造方法とほぼ同様の処理を施すことにより、ボトムゲート-トップコンタクト構造の有機薄膜トランジスタ1Bを具備する薄膜トランジスタ基板2Bを製造することができる。 As shown in FIGS. 26A and 26B to FIGS. 28A and 28B, the step of forming the interlayer protective layer 22 and the interlayer mask layer 23A, the pixel electrode 25b, the source electrode terminal 25a, and the body electrode In the step of forming the terminals, the thin film transistor substrate 2B including the organic thin film transistor 1B having the bottom gate-top contact structure can be manufactured by performing substantially the same process as the manufacturing method of the thin film transistor substrate according to the first embodiment. .
 本実施の形態に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタ基板2Bにあっては、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1B according to the present embodiment and the thin film transistor substrate 2B including the organic thin film transistor 1B, the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, thereby forming the source electrode 14a and the drain electrode 14b. The work function and the work function of the body electrode 17a are different.
 このような構成とすることにより、ボディ電極17bを介して有機半導体層19a中に蓄積した電荷(電子または正孔)を容易に取り除くことができる。この結果、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができ、本実施の形態に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタ基板2Bおいても実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2とほぼ同様の効果が得られる。 With such a configuration, charges (electrons or holes) accumulated in the organic semiconductor layer 19a can be easily removed via the body electrode 17b. As a result, a stable TFT characteristic can be realized by suppressing a shift of the TFT characteristic at the time of light irradiation or light OFF, and this is also implemented in the organic thin film transistor 1B according to the present embodiment and the thin film transistor substrate 2B having the same. The same effects as those of the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 including the same are obtained.
 また、本実施の形態に係る薄膜トランジスタ基板2Bの製造方法にあっては、有機半導体層19aの形成後にソース電極14aおよびドレイン電極14bを形成するため、有機半導体膜19を塗布してベークする際に、ソース電極14aおよびドレイン電極14bが酸化することを防止できる。この結果、本実施の形態に係る薄膜トランジスタ基板2Bの製造方法にあっては、コンタクト抵抗不良を低減できると同時にソース電極およびドレイン電極の選択肢を広げることができる。 Further, in the method of manufacturing the thin film transistor substrate 2B according to the present embodiment, the source electrode 14a and the drain electrode 14b are formed after the organic semiconductor layer 19a is formed, so that the organic semiconductor film 19 is applied and baked. The source electrode 14a and the drain electrode 14b can be prevented from being oxidized. As a result, in the method of manufacturing the thin film transistor substrate 2B according to the present embodiment, the contact resistance defect can be reduced, and at the same time, the options for the source electrode and the drain electrode can be expanded.
 (実施の形態4)
 図29(A),(B)は、実施の形態4に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図29(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Cおよびこれを具備する薄膜トランジスタ基板2Cについて説明する。なお、図29(A)は、図2(A)に対応する部分を示しており、図29(B)は、図2(B)に対応する部分を示している。
(Embodiment 4)
29A and 29B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the fourth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along. With reference to FIGS. 29A and 29B, an organic thin film transistor 1C according to the present embodiment and a thin film transistor substrate 2C including the same will be described. Note that FIG. 29A illustrates a portion corresponding to FIG. 2A, and FIG. 29B illustrates a portion corresponding to FIG. 2B.
 図29(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Cおよびこれを具備する薄膜トランジスタ基板2Cは、実施の形態3に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタ基板2Bと比較した場合に、ボディ電極17bに表面処理を施すことによりソース電極およびドレイン電極の仕事関数と異なる仕事関数を有するボディ電極17bを備える点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 29A and 29B, the organic thin film transistor 1C according to the present embodiment and the thin film transistor substrate 2C having the same are the organic thin film transistor 1B according to the third embodiment and the thin film transistor substrate 2B having the same. Is different in that the body electrode 17b has a work function different from that of the source electrode and the drain electrode by subjecting the body electrode 17b to a surface treatment, and the other configurations are substantially the same. .
 具体的には、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の金属材料によって構成されており、ボディ電極17bと有機半導体層19aの界面には、自己組織化単分子膜93が形成されている。ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の金属材料によって構成した場合であっても自己組織化単分子膜93をボディ電極17bの表面を覆うように形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17bの仕事関数とを異ならせることができる。 Specifically, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a. Has been. Even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b. The work function of the drain electrode 14b and the work function of the body electrode 17b can be made different.
 なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料、有機半導体層19aの材料および自己組織化単分子膜の材料としては、実施の形態2とほぼ同様のものを採用することができる。 Note that materials similar to those in the second embodiment can be employed as the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material for the organic semiconductor layer 19a, and the material for the self-assembled monolayer.
 なお、n型の有機半導体層およびp型の有機半導体層のいずれを用いる場合であっても自己組織化単分子膜93を形成する代わりに、ボディ電極17bの表面にプラズマ処理、UV処理を施すことにより、ボディ電極17bの仕事関数をソース電極14aおよびドレイン電極14bの仕事関数に対して異ならせることができる。 Note that, regardless of whether an n-type organic semiconductor layer or a p-type organic semiconductor layer is used, instead of forming the self-assembled monolayer 93, the surface of the body electrode 17b is subjected to plasma treatment and UV treatment. Thus, the work function of the body electrode 17b can be made different from that of the source electrode 14a and the drain electrode 14b.
 本実施の形態に係る薄膜トランジスタ基板2Cの製造方法は、基本的に実施の形態3に係る薄膜トランジスタ基板2Bの製造方法に準じており、表面処理工程を有する点において、実施の形態3に係る薄膜トランジスタ基板2Bの製造方法と相違する。 The method of manufacturing the thin film transistor substrate 2C according to the present embodiment basically conforms to the method of manufacturing the thin film transistor substrate 2B according to the third embodiment, and has a surface treatment process, and thus the thin film transistor substrate according to the third embodiment. It is different from the manufacturing method of 2B.
 本実施の形態に係る薄膜トランジスタ基板2Cの製造方法にあっては、まず、ベースコート層を形成する工程、ゲート電極を形成する工程およびゲート絶縁層を形成する工程、および有機半導体層を形成する工程において、実施の形態3に係る薄膜トランジスタ基板の製造方法と同様の処理を施すことにより、基板10にベースコート層11、ゲート電極12、ゲート絶縁層13および有機半導体層19aを形成する。 In the method of manufacturing the thin film transistor substrate 2C according to the present embodiment, first, in the step of forming the base coat layer, the step of forming the gate electrode, the step of forming the gate insulating layer, and the step of forming the organic semiconductor layer The base coat layer 11, the gate electrode 12, the gate insulating layer 13, and the organic semiconductor layer 19 a are formed on the substrate 10 by performing the same process as in the method for manufacturing the thin film transistor substrate according to the third embodiment.
 図30(A),(B)は、図29(A),(B)に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。図30(A),(B)に示すように、真空蒸着法やスパッタ法等によって所定の形状にパターニングされたソース電極14a、ドレイン電極14bおよびボディ電極17bを100~400nm程度の厚さで形成する。 30 (A) and 30 (B) are diagrams showing a process of forming the source electrode, the drain electrode, and the body electrode of the thin film transistor substrate shown in FIGS. 29 (A) and 29 (B). As shown in FIGS. 30A and 30B, a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm. To do.
 スパッタ法を用いてソース電極14a、ドレイン電極14bおよびボディ電極17bを形成する場合には、有機半導体層19aが形成された基板10全体にソース・ドレイン・ボディ電極膜を成膜した後、ソース・ドレイン・ボディ電極膜上に感光性レジストを塗布する。その後、フォトリソグラフィ(露光・現像)によって感光性レジストをパターニングする。続いて、感光性レジストをマスクとしてゲート電極膜をウェットエッチング又はドライエッチングすることにより、ソース電極14a、ドレイン電極14bおよびボディ電極17bをパターニングする。 When the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed by the sputtering method, after forming the source / drain / body electrode film on the entire substrate 10 on which the organic semiconductor layer 19a is formed, the source / drain / body electrode film is formed. A photosensitive resist is applied on the drain / body electrode film. Thereafter, the photosensitive resist is patterned by photolithography (exposure / development). Subsequently, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are patterned by wet etching or dry etching of the gate electrode film using the photosensitive resist as a mask.
 これにより、有機半導体層19aの上面の端部にそれぞれ接するソース電極14aおよびドレイン電極14bならびに有機半導体層19aの上面に先端が接するボディ電極17bが形成される。 Thereby, the source electrode 14a and the drain electrode 14b that are in contact with the end of the upper surface of the organic semiconductor layer 19a, respectively, and the body electrode 17b whose tip is in contact with the upper surface of the organic semiconductor layer 19a are formed.
 なお、真空蒸着法を用いてソース電極14a、ドレイン電極14bおよびボディ電極17bを形成する場合には、メタルマスクを用いて上記金属膜を蒸着することにより別途パターニングする工程が不要となる。 In addition, when forming the source electrode 14a, the drain electrode 14b, and the body electrode 17b using a vacuum evaporation method, the process of patterning separately by evaporating the said metal film using a metal mask becomes unnecessary.
 有機半導体層19aがp型となる場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、仕事関数が大きくp型の有機半導体層19aへの正孔の注入障壁が小さい材料を採用することが好ましく、Pt、Rh、Au、Cu、Ag、Ta、W、Mo、MoW、MnO、MnO、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is p-type, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of a material having a high work function and a small hole injection barrier to the p-type organic semiconductor layer 19a. Pt, Rh, Au, Cu, Ag, Ta, W, Mo, MoW, MnO 2 , MnO 3 , Ni, Ti, Cr, etc., and a laminated structure in which these are laminated and combined The metal film can be used.
 たとえば、p型の有機半導体層19aの材料として銅フタロシアニン(HOMOレベル:約5.0eV)を採用する場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料として、Au(仕事関数:約5.0eV)を採用することができる。この場合には、正孔の注入障壁がほとんどないため、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1Cに大きな電流を流すことができる。 For example, when copper phthalocyanine (HOMO level: about 5.0 eV) is adopted as the material of the p-type organic semiconductor layer 19a, the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 5.0 eV) can be employed. In this case, since there is almost no hole injection barrier, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow through the organic thin film transistor 1C. .
 有機半導体層19aがn型となる場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としては、仕事関数が小さくn型の有機半導体層19aへの電子の注入障壁が小さい材料を採用することが好ましく、Na、Mg、Ca、Al、Ag、Cu、Au、W、Mo、MoW、Ni、Ti、Cr等の金属膜およびこれらを積層して組み合わせた積層構造の金属膜を採用することができる。 When the organic semiconductor layer 19a is n-type, the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b is a material having a small work function and a small barrier for electron injection into the n-type organic semiconductor layer 19a. It is preferable to adopt metal films such as Na, Mg, Ca, Al, Ag, Cu, Au, W, Mo, MoW, Ni, Ti, and Cr, and a metal film having a laminated structure in which these are stacked and combined. can do.
 たとえば、n型の有機半導体層19aの材料としてC60フラーレン(LUMOレベル:約4.5eV)を採用する場合には、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料として、Au(仕事関数:約5.0eV)を採用することができる。この場合には、電子の注入障壁高さが小さい(約0.5eV)ので、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1Cに大きな電流を流すことができる。 For example, when C60 fullerene (LUMO level: about 4.5 eV) is adopted as the material of the n-type organic semiconductor layer 19a, the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b is Au (work function: About 5.0 eV) can be employed. In this case, since the electron injection barrier height is small (about 0.5 eV), electrons can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current flows into the organic thin film transistor 1C. Can flow.
 図31(A),(B)は、図30(A),(B)に示すボディ電極に表面処理を施す工程を示す図である。図31(A),(B)に示すように、ボディ電極17bに表面処理を施す工程にあっては、実施の形態2に係る薄膜トランジスタ基板とほぼ同様の処理を施すことにより、ボディ電極17bの表面を覆うように自己組織化単分子膜93を形成する。なお、自己組織化単分子膜93としては、実施の形態2と同様の材料を採用することができる。 FIGS. 31 (A) and 31 (B) are views showing a step of performing surface treatment on the body electrode shown in FIGS. 30 (A) and 30 (B). As shown in FIGS. 31A and 31B, in the step of subjecting the body electrode 17b to the surface treatment, by performing substantially the same treatment as that of the thin film transistor substrate according to the second embodiment, A self-assembled monolayer 93 is formed so as to cover the surface. As the self-assembled monolayer 93, the same material as that in Embodiment 2 can be used.
 たとえば、p型有機半導体材料として銅フタロシアニンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、MBTをボディ電極17bの表面上に塗布することにより、ボディ電極(Au)の仕事関数を、5.0eVから4.3eV程度まで小さくすることができる。 For example, when copper phthalocyanine is adopted as the p-type organic semiconductor material and Au is adopted as the material of the source electrode 14a, the drain electrode 14b and the body electrode 17b, MBT is applied on the surface of the body electrode 17b, The work function of the body electrode (Au) can be reduced from about 5.0 eV to about 4.3 eV.
 あるいは、別の1例として、p型有機半導体材料としてペンタセンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてCuを採用する場合には、MBTをボディ電極17bの表面上に塗布することにより、ボディ電極(Cu)の仕事関数を、4.7eVから4.0eV程度まで小さくすることができる。 Alternatively, as another example, when pentacene is adopted as the p-type organic semiconductor material and Cu is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, MBT is placed on the surface of the body electrode 17b. By applying, the work function of the body electrode (Cu) can be reduced from 4.7 eV to about 4.0 eV.
 ボディ電極17bの仕事関数をp型の有機半導体層19aである銅フタロシアニンのLUMOレベル(約3.5eV)に近い値まで小さくすることができるので、ボディ電極17bを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1Cにあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 Since the work function of the body electrode 17b can be reduced to a value close to the LUMO level (about 3.5 eV) of copper phthalocyanine which is the p-type organic semiconductor layer 19a, the work function of the body electrode 17b is introduced into the organic semiconductor layer 19a via the body electrode 17b. Accumulated electrons can be easily extracted. As a result, in the organic thin film transistor 1C according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 たとえば、n型有機半導体材料としてC60フラーレンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、HBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極(Au)の仕事関数を、5.0eVから5.2eV程度まで大きくすることができる。 For example, when C60 fullerene is adopted as the n-type organic semiconductor material and Au is adopted as the material of the source electrode 14a, the drain electrode 14b and the body electrode 17b, HBT or FBT is applied to the surface of the body electrode 17b. The work function of the body electrode (Au) can be increased from about 5.0 eV to about 5.2 eV.
 あるいは、別の1例として、n型有機半導体材料としてC60フラーレンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAlを採用する場合には、HBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極(Al)の仕事関数を、4.3eVから4.5eV程度まで大きくすることができる。 Alternatively, as another example, when C60 fullerene is used as the n-type organic semiconductor material and Al is used as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, HBT or FBT is used for the body electrode 17b. By applying to the surface, the work function of the body electrode (Al) can be increased from 4.3 eV to 4.5 eV.
 ボディ電極17bの仕事関数をn型の有機半導体層19aであるC60フラーレンのHOMOレベル(約6.2eV)に仕事関数を近づけられるので、ボディ電極17bを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。この結果、本実施の形態に係る有機薄膜トランジスタ1Cにあっては、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 Since the work function of the body electrode 17b can be brought close to the HOMO level (about 6.2 eV) of C60 fullerene, which is the n-type organic semiconductor layer 19a, the work function is accumulated in the organic semiconductor layer 19a via the body electrode 17b. Holes can be easily extracted. As a result, in the organic thin film transistor 1C according to the present embodiment, stable TFT characteristics can be realized by suppressing a shift in TFT characteristics during light irradiation or light OFF.
 続いて、層間保護層22および層間マスク層23Aを形成する工程並びに画素電極25b、ソース電極端子25aおよびボディ電極端子25cを形成する工程において、実施の形態1に係る薄膜トランジスタ基板2の製造方法と同様の処理を施すことにより、ボトムゲート-トップコンタクト構造の有機薄膜トランジスタ1Cを具備する薄膜トランジスタ基板2Cを製造することができる。 Subsequently, in the step of forming the interlayer protective layer 22 and the interlayer mask layer 23A and the step of forming the pixel electrode 25b, the source electrode terminal 25a, and the body electrode terminal 25c, the same method as the method of manufacturing the thin film transistor substrate 2 according to the first embodiment. By performing this process, the thin film transistor substrate 2C including the organic thin film transistor 1C having the bottom gate-top contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Cおよびこれを具備する薄膜トランジスタ基板2Cにあっては、ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の材料で形成した後に、ボディ電極17bの表面にのみ表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1C according to the present embodiment and the thin film transistor substrate 2C including the same, after the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed of the same material, the surface is formed only on the surface of the body electrode 17b. By performing the treatment, the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
 このような構成とすることにより、ボディ電極17bを介して有機半導体層19a中に蓄積した電荷(電子または正孔)を容易に取り除くことができる。この結果、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができ、本実施の形態に係る有機薄膜トランジスタ1Cおよびこれを具備する薄膜トランジスタ基板2Cにおいても実施の形態3に係る有機薄膜トランジスタ1Bおよびこれを具備する薄膜トランジスタ基板2Bとほぼ同様の効果が得られる。 With such a configuration, charges (electrons or holes) accumulated in the organic semiconductor layer 19a can be easily removed via the body electrode 17b. As a result, a stable TFT characteristic can be realized by suppressing the shift of the TFT characteristic at the time of light irradiation or light OFF, and the organic thin film transistor 1C according to the present embodiment and the thin film transistor substrate 2C having the same are also implemented. Effects substantially similar to those of the organic thin film transistor 1B according to the third embodiment and the thin film transistor substrate 2B including the same are obtained.
 また、本実施の形態に係る薄膜トランジスタ基板2Cの製造方法にあっては、ソース電極14aおよびドレイン電極14bと同じ材料でボディ電極17bを形成することができるため、工程数や材料費を削減し、製造コストを削減することできる。 Further, in the method of manufacturing the thin film transistor substrate 2C according to the present embodiment, the body electrode 17b can be formed with the same material as the source electrode 14a and the drain electrode 14b, thereby reducing the number of steps and material cost, Manufacturing cost can be reduced.
 (実施の形態5)
 図32(A),(B)は、実施の形態5に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図32(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dについて説明する。なお、図32(A)は、図2(A)に対応する部分を示しており、図32(B)は、図2(B)に対応する部分を示している。
(Embodiment 5)
32A and 32B are cross-sectional views when the thin film transistor substrate including the organic thin film transistor according to the fifth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged, and in the extending direction of the body electrode. It is sectional drawing at the time of dividing along. With reference to FIGS. 32A and 32B, an organic thin film transistor 1D according to the present embodiment and a thin film transistor substrate 2D including the same will be described. 32A shows a portion corresponding to FIG. 2A, and FIG. 32B shows a portion corresponding to FIG. 2B.
 図32(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dは、実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2と比較した場合に、ボトムゲート-ボトムコンタクト構造ではなく、トップゲート-ボトムコンタクト構造である点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 32A and 32B, the organic thin film transistor 1D according to the present embodiment and the thin film transistor substrate 2D having the same are the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same. Is different from the bottom gate-bottom contact structure in that it is a top gate-bottom contact structure, and the other configurations are substantially the same.
 具体的には、本実施の形態に係る有機薄膜トランジスタ1Dは、基板10と、基板10の主表面を覆うように形成されたベースコート層11と、ベースコート層11上に互いに離間して配置されたソース電極14aおよびドレイン電極14bと、ベースコート層11上においてソース電極14aおよびドレイン電極14bから分離して配置されるボディ電極17aと、ソース電極14aとドレイン電極14bとの間に位置する部分のベースコート層11を覆うとともに、ソース電極14a、ドレイン電極14bおよびボディ電極17aのそれぞれの上面の少なくとも一部に接する有機半導体層19aとを備える。 Specifically, the organic thin film transistor 1D according to the present embodiment includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and a source disposed on the base coat layer 11 so as to be separated from each other. The base coat layer 11 located between the electrode 14a and the drain electrode 14b, the body electrode 17a disposed on the base coat layer 11 separately from the source electrode 14a and the drain electrode 14b, and the source electrode 14a and the drain electrode 14b. And an organic semiconductor layer 19a in contact with at least a part of the upper surface of each of the source electrode 14a, the drain electrode 14b, and the body electrode 17a.
 有機薄膜トランジスタ1Dは、有機半導体層19aに重なるように設けられた第1の保護層20aおよびマスク層21Aと、マスク層21A、ソース電極14a、ドレイン電極14bおよびボディ電極17aを覆うようにベースコート層11上に設けられた第2の保護層30と、第2の保護層30を覆うように設けられたゲート絶縁層13と、ゲート絶縁層13上に有機半導体層19aと対向するように設けられたゲート電極12とをさらに備える。 The organic thin film transistor 1D includes a base coat layer 11 so as to cover the first protective layer 20a and the mask layer 21A provided to overlap the organic semiconductor layer 19a, and the mask layer 21A, the source electrode 14a, the drain electrode 14b, and the body electrode 17a. The second protective layer 30 provided above, the gate insulating layer 13 provided so as to cover the second protective layer 30, and the organic semiconductor layer 19a provided on the gate insulating layer 13 so as to face each other. And a gate electrode 12.
 ソース電極14aおよびドレイン電極14bは、ゲート絶縁層13を挟んでゲート電極12に少なくともその一部が重なるように設けられている。ソース電極14aおよびドレイン電極14bは有機半導体層19aに電流を流すための部位である。 The source electrode 14a and the drain electrode 14b are provided so that at least a part thereof overlaps the gate electrode 12 with the gate insulating layer 13 interposed therebetween. The source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
 ボディ電極17aは、ゲート電極12と重ならないように設けられている。ボディ電極17aは、有機半導体層19a内に蓄積された電荷を抜くための部位である。 The body electrode 17a is provided so as not to overlap the gate electrode 12. The body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
 また、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 Further, by forming the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
 また、本実施の形態に係る薄膜トランジスタ基板2Dは、有機薄膜トランジスタ1Dと、有機薄膜トランジスタ1Dを覆うように設けられた層間保護層22と、当該層間保護層22を覆うように設けられた層間マスク層23Aと、コンタクトホール24aを介して有機薄膜トランジスタ1のソース電極14aに接続されるソース電極端子25aと、コンタクトホール24bを介して有機薄膜トランジスタ1のドレイン電極14bに接続される画素電極25bと、コンタクトホール24cを介して有機薄膜トランジスタ1のボディ電極17aに接続されるボディ電極端子25cとを備える。 The thin film transistor substrate 2D according to the present embodiment includes an organic thin film transistor 1D, an interlayer protective layer 22 provided so as to cover the organic thin film transistor 1D, and an interlayer mask layer 23A provided so as to cover the interlayer protective layer 22. A source electrode terminal 25a connected to the source electrode 14a of the organic thin film transistor 1 through the contact hole 24a, a pixel electrode 25b connected to the drain electrode 14b of the organic thin film transistor 1 through the contact hole 24b, and a contact hole 24c. A body electrode terminal 25c connected to the body electrode 17a of the organic thin film transistor 1 via
 層間マスク層23A、層間保護層22、ゲート絶縁層13および第2の保護層30には、コンタクトホール24a,24b,24cが形成されている。コンタクトホール24aは、層間マスク層23Aの表面側からソース電極14aに達するように設けられている。コンタクトホール24bは、層間マスク層23Aの表面側からドレイン電極14bに達するように設けられている。コンタクトホール24cは、層間マスク層23Aの表面側からボディ電極17aに達するように設けられている。 Contact holes 24a, 24b, and 24c are formed in the interlayer mask layer 23A, the interlayer protection layer 22, the gate insulating layer 13, and the second protection layer 30. The contact hole 24a is provided so as to reach the source electrode 14a from the surface side of the interlayer mask layer 23A. The contact hole 24b is provided so as to reach the drain electrode 14b from the surface side of the interlayer mask layer 23A. The contact hole 24c is provided so as to reach the body electrode 17a from the surface side of the interlayer mask layer 23A.
 本実施の形態に係る薄膜トランジスタ基板2Dの製造方法は、基本的に実施の形態1に係る薄膜トランジスタ基板の製造方法に準じており、ゲート絶縁層を形成する工程およびゲート電極を形成する工程の前に、ソース電極およびドレイン電極を形成する工程、ボディ電極を形成する工程、有機半導体層、保護層およびマスク層を形成する工程、第2保護膜を形成する工程を備える点において相違する。 The manufacturing method of the thin film transistor substrate 2D according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate according to the first embodiment, and before the step of forming the gate insulating layer and the step of forming the gate electrode. , And a step of forming a source electrode and a drain electrode, a step of forming a body electrode, a step of forming an organic semiconductor layer, a protective layer and a mask layer, and a step of forming a second protective film.
 本実施の形態に係る薄膜トランジスタ基板2Dの製造方法にあっては、まず、ベースコート層を形成する工程において、実施の形態1に係る薄膜トランジスタ基板の製造方法と同様の処理を施すことにより、基板10にベースコート層11を形成する。 In the method of manufacturing the thin film transistor substrate 2D according to the present embodiment, first, in the step of forming the base coat layer, the substrate 10 is subjected to the same processing as the method of manufacturing the thin film transistor substrate according to the first embodiment. Base coat layer 11 is formed.
 図33(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程を示す図である。図33(A),(B)に示すように、ソース電極およびドレイン電極を形成する工程において、実施の形態1に係る薄膜トランジスタ基板の製造方法とほぼ同様の処理を行なうことにより、ベースコート層11上に互いに離間したソース電極14aおよびドレイン電極14bを形成する。 33 (A) and 33 (B) are diagrams showing a process of forming a source electrode and a drain electrode of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B). As shown in FIGS. 33A and 33B, in the step of forming the source electrode and the drain electrode, a process substantially similar to the method for manufacturing the thin film transistor substrate according to Embodiment 1 is performed, so that the base coat layer 11 is formed. A source electrode 14a and a drain electrode 14b that are spaced apart from each other are formed.
 図34(A),(B)および図35(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程および第2工程を示す図である。図34(A),(B)および図35(A),(B)に示すように、ボディ電極を形成する工程の第1工程および第2工程において、実施の形態1に係る薄膜トランジスタ基板の製造方法とほぼ同様の処理を行なうことにより、ベースコート層11上にソース電極14aおよびドレイン電極14bから分離されたボディ電極17aを形成する。なお、本工程は、ソース電極14aおよびドレイン電極14bを覆うようにベースコート層11の主表面上に、感光性レジスト15が塗布される点において実施の形態1と相違する。 34A and 34B and FIGS. 35A and 35B show the first step and the second step of the step of forming the body electrode of the thin film transistor substrate shown in FIGS. 32A and 32B. FIG. As shown in FIGS. 34A and 34B and FIGS. 35A and 35B, in the first and second steps of forming the body electrode, the thin film transistor substrate according to the first embodiment is manufactured. A body electrode 17a separated from the source electrode 14a and the drain electrode 14b is formed on the base coat layer 11 by performing a process substantially similar to the method. This step is different from Embodiment 1 in that a photosensitive resist 15 is applied on the main surface of the base coat layer 11 so as to cover the source electrode 14a and the drain electrode 14b.
 また、ベースコート層11とソース電極14aおよびドレイン電極14bとの密着性を高めるために、ベースコート層11とソース電極14aおよびドレイン電極14bとの間にTi、Crなどの密着層を形成してもよい。 Further, in order to improve the adhesion between the base coat layer 11 and the source electrode 14a and drain electrode 14b, an adhesion layer such as Ti or Cr may be formed between the base coat layer 11 and the source electrode 14a and drain electrode 14b. .
 図36(A),(B)および図37(A),(B)は、図32(A),(B)示す薄膜トランジスタ基板の有機半導体層、第1の保護層およびマスク層を形成する工程の第1工程および第2工程を示す図である。図36(A),(B)および図37(A),(B)に示すように、有機半導体層、第1の保護層およびマスク層を形成する工程においては、実施の形態1における有機半導体層、保護層およびマスク層を形成する工程とほぼ同様の処理を行なうことにより、ソース電極14aとドレイン電極14bとの間に位置する部分のベースコート層11を覆うとともに、ソース電極14a、ドレイン電極14bおよびボディ電極17aのそれぞれの上面の少なくとも一部に接する有機半導体層19aと、有機半導体層19aと重なるように形成される第1の保護層20aおよびマスク層21Aを形成する。 36 (A), (B) and FIGS. 37 (A), (B) are steps for forming the organic semiconductor layer, the first protective layer, and the mask layer of the thin film transistor substrate shown in FIGS. 32 (A), (B). It is a figure which shows the 1st process and 2nd process. As shown in FIGS. 36A and 36B and FIGS. 37A and 37B, in the step of forming the organic semiconductor layer, the first protective layer, and the mask layer, the organic semiconductor in the first embodiment is used. The base coat layer 11 located between the source electrode 14a and the drain electrode 14b is covered by performing substantially the same process as the step of forming the layer, the protective layer, and the mask layer, and the source electrode 14a and the drain electrode 14b are covered. Then, an organic semiconductor layer 19a in contact with at least a part of the upper surface of each of the body electrodes 17a, a first protective layer 20a and a mask layer 21A formed so as to overlap the organic semiconductor layer 19a are formed.
 図38(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板の第2の保護層およびゲート絶縁層を形成する工程を示す図である。図38(A),(B)に示すように、第2の保護層30およびゲート絶縁層13を形成する工程においては、まず、有機半導体層19a、第1の保護層20aおよびマスク層21Aが形成された基板の全体に、スピンコート法、スリットコート法、インクジェット法、印刷法などを用いて、無機絶縁膜若しくは有機絶縁膜またはこれらを組み合わせた積層膜から成る第2の保護層30を形成する。第2の保護層30を形成するための材料として、無機絶縁膜としては、窒化膜、酸化膜、窒化酸化膜等を採用することができ、有機絶縁膜としては、パリレン、旭硝子社製のCYTOP(登録商標)等を採用することができる。なお、第2の保護層30を形成する工程は、省略してもよい。 38 (A) and 38 (B) are diagrams showing a process of forming the second protective layer and the gate insulating layer of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B). As shown in FIGS. 38A and 38B, in the step of forming the second protective layer 30 and the gate insulating layer 13, first, the organic semiconductor layer 19a, the first protective layer 20a, and the mask layer 21A are formed. A second protective layer 30 made of an inorganic insulating film, an organic insulating film, or a combination film of these is formed on the entire formed substrate by using a spin coating method, a slit coating method, an ink jet method, a printing method, or the like. To do. As a material for forming the second protective layer 30, a nitride film, an oxide film, a nitrided oxide film or the like can be adopted as the inorganic insulating film, and a CYTOP manufactured by Parylene, Asahi Glass Co., Ltd. can be used as the organic insulating film. (Registered trademark) or the like can be adopted. Note that the step of forming the second protective layer 30 may be omitted.
 続いて、基板全面に対して大気圧プラズマ、酸素プラズマなどの表面処理を行った後、スピンコート法、スリットコート法、インクジェット法、印刷法などを用いて、第2の保護層30が形成された基板全体にポリビニルフェノール(PVP)、ポリスチレン(PS)等の有機絶縁性材料を塗布した後に焼成することにより、200nm~1000nm程度の厚さでゲート絶縁層13を形成する。 Subsequently, surface treatment such as atmospheric pressure plasma or oxygen plasma is performed on the entire surface of the substrate, and then the second protective layer 30 is formed by using a spin coating method, a slit coating method, an ink jet method, a printing method, or the like. The gate insulating layer 13 is formed with a thickness of about 200 nm to 1000 nm by applying an organic insulating material such as polyvinylphenol (PVP) or polystyrene (PS) to the entire substrate and then baking it.
 図39(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。図39(A),(B)に示すように、ゲート電極を形成する工程においては、実施の形態1に係る薄膜トランジスタ基板2の製造方法とほぼ同様の処理を行なうことにより、ゲート絶縁層13上に有機半導体層19aに対向するようにゲート電極12が形成される。これにより、本実施の形態に係る有機薄膜トランジスタ1Dが製造される。 39 (A) and 39 (B) are diagrams showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 32 (A) and 32 (B). As shown in FIGS. 39A and 39B, in the step of forming the gate electrode, a process substantially similar to the method for manufacturing the thin film transistor substrate 2 according to the first embodiment is performed, so that the gate electrode 13 is formed. The gate electrode 12 is formed to face the organic semiconductor layer 19a. Thereby, the organic thin film transistor 1D according to the present embodiment is manufactured.
 図40(A),(B)および図41(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程および第2工程を示す図である。図40(A),(B)に示すように、層間保護層22および層間マスク層23Aを形成する工程の第1工程において、実施の形態1に係る薄膜トランジスタの製造方法と同様の処理を行なうことにより、ゲート電極12を覆うようにゲート絶縁層13上に層間保護層22を形成するとともに、層間保護層22を覆うように層間マスク層23Aを形成するための有機絶縁膜23を形成する。 40 (A), (B) and FIGS. 41 (A), (B) show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 32 (A), (B). It is a figure which shows a 2nd process. As shown in FIGS. 40A and 40B, in the first step of forming the interlayer protective layer 22 and the interlayer mask layer 23A, the same process as the method for manufacturing the thin film transistor according to the first embodiment is performed. Thus, the interlayer protection layer 22 is formed on the gate insulating layer 13 so as to cover the gate electrode 12, and the organic insulating film 23 for forming the interlayer mask layer 23 </ b> A is formed so as to cover the interlayer protection layer 22.
 有機絶縁膜23としては、たとえば、ネガ型の有機絶縁膜を採用することができ、有機絶縁膜23のうちコンタクトホール24a,24b,24cを形成する領域以外を露光して現像することにより、コンタクトホール24a,24b,24cを形成する領域以外に層間マスク層23Aを形成する。 As the organic insulating film 23, for example, a negative type organic insulating film can be adopted. By exposing and developing the organic insulating film 23 other than the region where the contact holes 24a, 24b, and 24c are formed, the contact is obtained. An interlayer mask layer 23A is formed in a region other than the region where the holes 24a, 24b, and 24c are to be formed.
 続いて、層間マスク層23Aをマスクとしてドライエッチングを行い、図41(A),(B)に示すように、層間保護層22、ゲート絶縁層13および第2の保護層30を貫通するコンタクトホール24a,24b,24cを形成する。 Subsequently, dry etching is performed using the interlayer mask layer 23A as a mask, and as shown in FIGS. 41A and 41B, a contact hole penetrating the interlayer protective layer 22, the gate insulating layer 13, and the second protective layer 30 is formed. 24a, 24b, and 24c are formed.
 図42(A),(B)は、図32(A),(B)に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。図42(A),(B)に示すように、実施の形態1に係る薄膜トランジスタ基板2の製造方法とほぼ同様の処理を行なうことにより、画素電極25b、ソース電極端子25aおよびボディ電極端子25cを形成する。 42A and 42B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIGS. 32A and 32B. As shown in FIGS. 42A and 42B, the pixel electrode 25b, the source electrode terminal 25a, and the body electrode terminal 25c are formed by performing substantially the same process as the manufacturing method of the thin film transistor substrate 2 according to the first embodiment. Form.
 以上のような工程を経てトップゲート-ボトムコンタクト構造の有機薄膜トランジスタ1Dを具備する薄膜トランジスタ基板を製造することができる。 Through the above steps, a thin film transistor substrate including the organic thin film transistor 1D having a top gate-bottom contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Dにあっては、ソース電極14aおよびドレイン電極14bの材料、ボディ電極17aの材料ならびに有機半導体層19aの材料は、実施の形態1と同様の材料を採用することができる。 In the organic thin film transistor 1D according to the present embodiment, the same material as that of the first embodiment is adopted as the material of the source electrode 14a and the drain electrode 14b, the material of the body electrode 17a, and the material of the organic semiconductor layer 19a. Can do.
 有機半導体層がp型の場合には、ソース電極14aの仕事関数を有機半導体層19aのHOMOレベルに近くすることにより、正孔の注入障壁高さを小さくすることができる。このため、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1D内に大きな電流を流すことができる。 When the organic semiconductor layer is p-type, the hole injection barrier height can be reduced by making the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow in the organic thin film transistor 1D.
 また、ボディ電極17aの仕事関数が、有機半導体層19aのLUMOレベルよりも低くなることにより、ボディ電極17aを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。 In addition, since the work function of the body electrode 17a is lower than the LUMO level of the organic semiconductor layer 19a, electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 有機半導体層19aがn型の場合には、ソース電極14aの仕事関数を有機半導体層19aのLUMOレベルに近くすることにより、電子の注入障壁をほぼなくすことができる。このため、ソース電極14aから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1D内に大きな電流を流すことができる。 When the organic semiconductor layer 19a is n-type, the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1D.
 また、ボディ電極17aの仕事関数が、有機半導体層19aのHOMOレベルに近くなることにより、ボディ電極17aを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。 Further, since the work function of the body electrode 17a is close to the HOMO level of the organic semiconductor layer 19a, holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 これらの結果、本実施の形態に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dにあっては、有機半導体層19aがp型またはn型のいずれの場合であっても光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, in the organic thin film transistor 1D and the thin film transistor substrate 2D having the organic thin film transistor 1D according to the present embodiment, the light is irradiated or light is turned off regardless of whether the organic semiconductor layer 19a is p-type or n-type. Stable TFT characteristics can be realized by suppressing a shift in TFT characteristics at the time.
 これにより、本実施の形態に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dは、実施の形態1に係る有機薄膜トランジスタ1およびこれを具備する薄膜トランジスタ基板2とほぼ同様の効果が得られる。 Thereby, the organic thin film transistor 1D according to the present embodiment and the thin film transistor substrate 2D having the same can obtain substantially the same effects as the organic thin film transistor 1 according to the first embodiment and the thin film transistor substrate 2 having the same.
 (実施の形態6)
 図43(A),(B)は、実施の形態6に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図43(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Eおよびこれを具備する薄膜トランジスタ基板2Eについて説明する。なお、図43(A)は、図2(A)に対応する部分を示しており、図43(B)は、図2(B)に対応する部分を示している。
(Embodiment 6)
43A and 43B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the sixth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along. With reference to FIGS. 43A and 43B, an organic thin film transistor 1E according to the present embodiment and a thin film transistor substrate 2E including the same will be described. 43A shows a portion corresponding to FIG. 2A, and FIG. 43B shows a portion corresponding to FIG. 2B.
 図43(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Eおよびこれを具備する薄膜トランジスタ基板2Eは、実施の形態5に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dと比較した場合に、ボディ電極17bに表面処理を施すことによりソース電極14aおよびドレイン電極14bの仕事関数と異なる仕事関数を有するボディ電極17bを備える点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 43A and 43B, the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the same are the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same. Is different in that a body electrode 17b having a work function different from that of the source electrode 14a and the drain electrode 14b is provided by subjecting the body electrode 17b to a surface treatment, and the other configurations are substantially the same. It is.
 具体的には、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の金属材料によって構成されており、ボディ電極17bと有機半導体層19aの界面には、自己組織化単分子膜93が形成されている。ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の金属材料によって構成した場合であっても自己組織化単分子膜93をボディ電極17bの表面を覆うように形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17bの仕事関数とを異ならせることができる。 Specifically, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a. Has been. Even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, the source electrode 14a and the self-assembled monolayer 93 are formed so as to cover the surface of the body electrode 17b. The work function of the drain electrode 14b and the work function of the body electrode 17b can be made different.
 なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料、有機半導体層19aの材料および自己組織化単分子膜93の材料としては、実施の形態2とほぼ同様のものを採用することができる。 In addition, as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material of the organic semiconductor layer 19a, and the material of the self-assembled monolayer 93, the same materials as those in Embodiment 2 can be employed. .
 本実施の形態に係る薄膜トランジスタ基板2Eの製造方法は、基本的に実施の形態5に係る薄膜トランジスタ基板2Dの製造方法に準じており、表面処理工程を有する点において、実施の形態5に係る薄膜トランジスタ基板2Dの製造方法と相違する。 The method for manufacturing the thin film transistor substrate 2E according to the present embodiment is basically in accordance with the method for manufacturing the thin film transistor substrate 2D according to the fifth embodiment, and has a surface treatment step, and thus the thin film transistor substrate according to the fifth embodiment. It is different from the 2D manufacturing method.
 本実施の形態に係る薄膜トランジスタ基板2Eの製造方法にあっては、まず、ベースコート層を形成する工程において、実施の形態5に係る薄膜トランジスタ基板2Dの製造方法と同様の処理を施すことにより、基板10にベースコート層11を形成する。 In the method of manufacturing the thin film transistor substrate 2E according to the present embodiment, first, in the step of forming the base coat layer, the same process as that of the method of manufacturing the thin film transistor substrate 2D according to the fifth embodiment is performed. The base coat layer 11 is formed.
 図44(A),(B)は、図43(A),(B)に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。図44(A),(B)に示すように、真空蒸着法やスパッタ法等によって所定の形状にパターニングされたソース電極14a、ドレイン電極14bおよびボディ電極17bを100~400nm程度の厚さで形成する。なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の材料によって構成されている。 44 (A) and 44 (B) are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 43 (A) and 43 (B). As shown in FIGS. 44A and 44B, a source electrode 14a, a drain electrode 14b, and a body electrode 17b patterned in a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm. To do. The source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material.
 図45(A),(B)は、図43(A),(B)に示すボディ電極に表面処理を施す工程を示す図である。図45(A),(B)に示すように、ボディ電極17bに表面処理を施す工程にあっては、実施の形態2に係る薄膜トランジスタ基板2Aとほぼ同様の処理を施すことにより、ボディ電極17bの表面を覆うように自己組織化単分子膜93を形成する。これにより、ボディ電極17bの仕事関数を変更することができる。なお、感光性レジスト16は、ボディ電極17bの表面のみが露出するようにソース電極14a、ドレイン電極14bおよびボディ電極17bが形成されたベースコート層11上に塗布される。 45 (A) and 45 (B) are diagrams showing a step of performing a surface treatment on the body electrode shown in FIGS. 43 (A) and 43 (B). As shown in FIGS. 45A and 45B, in the step of subjecting the body electrode 17b to the surface treatment, the body electrode 17b is subjected to substantially the same treatment as that of the thin film transistor substrate 2A according to the second embodiment. A self-assembled monolayer 93 is formed so as to cover the surface. Thereby, the work function of the body electrode 17b can be changed. The photosensitive resist 16 is applied on the base coat layer 11 on which the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed so that only the surface of the body electrode 17b is exposed.
 続いて、有機半導体層、第1の保護層およびマスク層を形成する工程、第2の保護層およびゲート絶縁層を形成する工程、ゲート電極を形成する工程、層間保護層および層間マスク層を形成する工程、ならびに、画素電極、ソース電極端子およびボディ電極端子を形成する工程において、実施の形態5に係る薄膜トランジスタ基板2Dの製造方法と同様の処理を施すことにより、本実施の形態に係る薄膜トランジスタ基板2Eを形成する。 Subsequently, the step of forming the organic semiconductor layer, the first protective layer and the mask layer, the step of forming the second protective layer and the gate insulating layer, the step of forming the gate electrode, the interlayer protective layer and the interlayer mask layer are formed. In the step of forming the pixel electrode, the source electrode terminal, and the body electrode terminal, the thin film transistor substrate according to the present embodiment is performed by performing the same process as the manufacturing method of the thin film transistor substrate 2D according to the fifth embodiment. 2E is formed.
 以上のような工程を経てトップゲート-ボトムコンタクト構造の有機薄膜トランジスタ1Eを具備する薄膜トランジスタ基板2Eを製造することができる。 Through the steps described above, the thin film transistor substrate 2E including the organic thin film transistor 1E having a top gate-bottom contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Eおよびこれを具備する薄膜トランジスタ基板2Eにあっては、ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の材料で形成した後に、ボディ電極17bの表面にのみ表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the same, after the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed of the same material, the surface is formed only on the surface of the body electrode 17b. By performing the treatment, the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
 上述のように、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料、有機半導体層19aの材料および自己組織化単分子膜93の材料としては、実施の形態2とほぼ同様のものを採用することができる。 As described above, as the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material for the organic semiconductor layer 19a, and the material for the self-assembled monolayer 93, the same materials as those in the second embodiment are employed. be able to.
 有機半導体層19aがp型の場合には、ソース電極14aの仕事関数を有機半導体層19aのHOMOレベルに近くすることにより、正孔の注入障壁高さを小さくすることができる。このため、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1E内に大きな電流を流すことができる。 When the organic semiconductor layer 19a is p-type, the hole injection barrier height can be reduced by bringing the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected into the organic semiconductor layer 19a from the source electrode 14a and the drain electrode 14b, and a large current can flow in the organic thin film transistor 1E.
 また、自己組織化単分子膜93として、たとえばMBTをボディ電極17bの表面上に塗布することにより、ボディ電極の仕事関数を小さくして有機半導体層19aのLUMOレベルに近づけることができる。これにより、ボディ電極17aを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。 Also, as the self-assembled monomolecular film 93, for example, MBT is applied on the surface of the body electrode 17b, so that the work function of the body electrode can be reduced to approach the LUMO level of the organic semiconductor layer 19a. Thereby, the electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 有機半導体層19aがn型の場合には、ソース電極14aの仕事関数を有機半導体層19aのLUMOレベルに近くすることにより、電子の注入障壁をほぼなくすことができる。このため、ソース電極14aから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1E内に大きな電流を流すことができる。 When the organic semiconductor layer 19a is n-type, the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1E.
 また、自己組織化単分子膜として、たとえばHBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極の仕事関数を大きくして有機半導体層19aのHOMOレベルに近づけることができる。これにより、ボディ電極17aを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。 Also, as a self-assembled monomolecular film, for example, by applying HBT or FBT to the surface of the body electrode 17b, the work function of the body electrode can be increased to approach the HOMO level of the organic semiconductor layer 19a. Thereby, the holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 これらの結果、本実施の形態に係る有機薄膜トランジスタ1Eおよびこれを具備する薄膜トランジスタ基板2Eにあっては、有機半導体層19aがp型またはn型のいずれの場合であっても光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, in the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the organic thin film transistor 1E, even when the organic semiconductor layer 19a is p-type or n-type, the light irradiation or light OFF is performed. Stable TFT characteristics can be realized by suppressing a shift in TFT characteristics at the time.
 これにより、本実施の形態に係る有機薄膜トランジスタ1Eおよびこれを具備する薄膜トランジスタ基板2Eは、実施の形態5に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dとほぼ同様の効果が得られる。 Thereby, the organic thin film transistor 1E according to the present embodiment and the thin film transistor substrate 2E having the same can obtain substantially the same effects as the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same.
 また、本実施の形態に係る薄膜トランジスタ基板の製造方法にあっては、ソース電極14aおよびドレイン電極14bと同じ材料でボディ電極17bを形成することができるため、工程数や材料費を削減し、製造コストを削減することできる。 Further, in the method of manufacturing the thin film transistor substrate according to the present embodiment, the body electrode 17b can be formed using the same material as the source electrode 14a and the drain electrode 14b. Cost can be reduced.
 (実施の形態7)
 図46(A),(B)は、実施の形態7に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図46(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Fおよびこれを具備する薄膜トランジスタ基板2Fについて説明する。なお、図46(A)は、図2(A)に対応する部分を示しており、図46(B)は、図2(B)に対応する部分を示している。
(Embodiment 7)
46A and 46B are a cross-sectional view when the thin film transistor substrate including the organic thin film transistor according to the seventh embodiment is divided along the direction in which the source electrode and the drain electrode are arranged, and in the extending direction of the body electrode. It is sectional drawing at the time of dividing along. With reference to FIGS. 46A and 46B, an organic thin film transistor 1F according to the present embodiment and a thin film transistor substrate 2F including the same will be described. 46A shows a portion corresponding to FIG. 2A, and FIG. 46B shows a portion corresponding to FIG. 2B.
 図46(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Fおよびこれを具備する薄膜トランジスタ基板2Fは、実施の形態5に係る有機薄膜トランジスタ1Dおよびこれを具備する薄膜トランジスタ基板2Dと比較した場合に、ソース電極14aおよびドレイン電極14bがボトムコンタクト構造ではなくトップコンタクト構造である点およびこれに伴い第1の保護層20aとマスク層21Aとが形成されていない点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 46A and 46B, the organic thin film transistor 1F according to the present embodiment and the thin film transistor substrate 2F having the same are the organic thin film transistor 1D according to the fifth embodiment and the thin film transistor substrate 2D having the same. And the source electrode 14a and the drain electrode 14b are different in that the first protective layer 20a and the mask layer 21A are not formed. Other configurations are almost the same.
 具体的には、本実施の形態に係る有機薄膜トランジスタ1Fは、基板10と、基板10の主表面を覆うように形成されたベースコート層11と、ベースコート層11上に形成された有機半導体層19aと、有機半導体層19aの上面の端部にそれぞれ接するようにベースコート層11上に設けられたソース電極14a、ドレイン電極14bおよびボディ電極17aと、有機半導体層19a、ソース電極14a、ドレイン電極14bおよびボディ電極17aを覆うようにベースコート層11上に設けられたゲート絶縁層13と、当該ゲート絶縁層13を挟んで有機半導体層19aと対向するように設けられたゲート電極12とを備える。 Specifically, the organic thin film transistor 1F according to the present embodiment includes a substrate 10, a base coat layer 11 formed so as to cover the main surface of the substrate 10, and an organic semiconductor layer 19a formed on the base coat layer 11. The source electrode 14a, the drain electrode 14b, and the body electrode 17a provided on the base coat layer 11 so as to be in contact with the end of the upper surface of the organic semiconductor layer 19a, and the organic semiconductor layer 19a, the source electrode 14a, the drain electrode 14b, and the body. A gate insulating layer 13 provided on the base coat layer 11 so as to cover the electrode 17a and a gate electrode 12 provided so as to face the organic semiconductor layer 19a with the gate insulating layer 13 interposed therebetween are provided.
 ソース電極14aおよびドレイン電極14bは、互いに離間して配置されるとともに、ゲート絶縁層13を挟んでゲート電極12に少なくともその一部が重なるように設けられている。ソース電極14aおよびドレイン電極14bは有機半導体層19aに電流を流すための部位である。 The source electrode 14a and the drain electrode 14b are disposed so as to be separated from each other, and are provided so that at least a part thereof overlaps the gate electrode 12 with the gate insulating layer 13 interposed therebetween. The source electrode 14a and the drain electrode 14b are parts for allowing a current to flow through the organic semiconductor layer 19a.
 ボディ電極17aは、ソース電極14aおよびドレイン電極14bから分離して配置され、ゲート電極12と重ならないように設けられている。ボディ電極17aは、有機半導体層19a内に蓄積された電荷を抜くための部位である。 The body electrode 17a is disposed separately from the source electrode 14a and the drain electrode 14b, and is provided so as not to overlap the gate electrode 12. The body electrode 17a is a part for removing charges accumulated in the organic semiconductor layer 19a.
 また、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 Further, by forming the body electrode 17a with a material different from that of the source electrode 14a and the drain electrode 14b, the work function of the source electrode 14a and the drain electrode 14b is different from the work function of the body electrode 17a.
 本実施の形態に係る薄膜トランジスタ基板2Fの製造方法は、基本的に実施の形態5に係る薄膜トランジスタ基板2Dの製造方法に準じており、部分的に実施の形態3に係る薄膜トランジスタ基板2Bの製造方法にも準じている。本実施の形態に係る薄膜トランジスタ基板2Fの製造方法は、ソース電極14aおよびドレイン電極14bを形成する工程の前に有機半導体層19aを形成する工程を備える点および有機半導体層19a上に保護層およびマスク層を形成する工程を備えていない点において実施の形態5に係る薄膜トランジスタ基板2Dの製造方法と相違する。 The manufacturing method of the thin film transistor substrate 2F according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate 2D according to the fifth embodiment, and is partially applied to the manufacturing method of the thin film transistor substrate 2B according to the third embodiment. The same applies. The manufacturing method of the thin film transistor substrate 2F according to the present embodiment includes a step of forming the organic semiconductor layer 19a before the step of forming the source electrode 14a and the drain electrode 14b, and a protective layer and a mask on the organic semiconductor layer 19a. The method is different from the method of manufacturing the thin film transistor substrate 2D according to the fifth embodiment in that the layer forming step is not provided.
 本実施の形態に係る薄膜トランジスタ基板2Fの製造方法にあっては、まず、ベースコート層を形成する工程において実施の形態5に係る薄膜トランジスタ基板の製造方法と同様の処理を施すことにより、基板10にベースコート層11を形成する。 In the method of manufacturing the thin film transistor substrate 2F according to the present embodiment, first, the base coat is applied to the substrate 10 by performing the same process as the method of manufacturing the thin film transistor substrate according to the fifth embodiment in the step of forming the base coat layer. Layer 11 is formed.
 図47(A),(B)および図48(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板の有機半導体層を形成する工程の第1工程および第2工程を示す図である。図47(A),(B)および図48(A),(B)に示すように、実施の形態3に係る有機半導体層を形成する工程の第1工程および第2工程とほぼ同様の処理を施すことにより、ベースコート層11上に島状にパターニングされた有機半導体層19aを形成する。 47 (A), (B) and FIGS. 48 (A), (B) show the first step and the second step in the step of forming the organic semiconductor layer of the thin film transistor substrate shown in FIGS. 46 (A), (B). FIG. 47 (A), (B) and FIGS. 48 (A), (B), substantially the same processing as the first step and the second step of the step of forming the organic semiconductor layer according to the third embodiment. As a result, an organic semiconductor layer 19 a patterned in an island shape is formed on the base coat layer 11.
 図49(A),(B)および図50(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板のソース電極およびドレイン電極を形成する工程の第1工程および第2工程を示す図である。図49(A),(B)および図50(A),(B)に示すように、実施の形態3に係るソース電極およびドレイン電極を形成する工程の第1工程および第2工程とほぼ同様の処理を施すことにより、互いに離間して有機半導体層19aの上面の端部にそれぞれ接するようにソース電極14aおよびドレイン電極14bをベースコート層11上に形成する。 49A, 49B, 50A, and 50B show the first step and the first step of forming the source electrode and the drain electrode of the thin film transistor substrate shown in FIGS. 46A and 46B. It is a figure which shows 2 processes. As shown in FIGS. 49A and 49B and FIGS. 50A and 50B, substantially the same as the first step and the second step in the step of forming the source electrode and the drain electrode according to the third embodiment. By performing this process, the source electrode 14a and the drain electrode 14b are formed on the base coat layer 11 so as to be separated from each other and in contact with the end portion of the upper surface of the organic semiconductor layer 19a.
 図51(A),(B)および図52(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板のボディ電極を形成する工程の第1工程および第2工程を示す図である。図51(A),(B)および図52(A),(B)に示すように、実施の形態3に係るボディ電極を形成する工程の第1工程および第2工程とほぼ同様の処理を施すことにより、ソース電極14aおよびドレイン電極14bから分離して配置されるとともに先端の一部が有機半導体層19aの上面に接するようにボディ電極17aをベースコート層11上に形成する。 51A and 51B and FIGS. 52A and 52B show the first step and the second step of forming the body electrode of the thin film transistor substrate shown in FIGS. 46A and 46B. FIG. As shown in FIGS. 51 (A), (B) and FIGS. 52 (A), (B), substantially the same processing as the first step and the second step of the step of forming the body electrode according to the third embodiment is performed. By applying, the body electrode 17a is formed on the base coat layer 11 so as to be separated from the source electrode 14a and the drain electrode 14b and so that a part of the tip is in contact with the upper surface of the organic semiconductor layer 19a.
 図53(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板のゲート絶縁層を形成する工程を示す図である。図53(A),(B)に示すように、実施の形態5に係るゲート絶縁層を形成する工程とほぼ同様の処理を施すことにより、有機半導体層19a、ソース電極14a、ドレイン電極14bおよびボディ電極17aを覆うようにゲート絶縁層13をベースコート層11上に形成する。 53 (A) and 53 (B) are views showing a process of forming a gate insulating layer of the thin film transistor substrate shown in FIGS. 46 (A) and 46 (B). As shown in FIGS. 53A and 53B, an organic semiconductor layer 19a, a source electrode 14a, a drain electrode 14b, and a process similar to those in the step of forming the gate insulating layer according to the fifth embodiment are performed. Gate insulating layer 13 is formed on base coat layer 11 so as to cover body electrode 17a.
 図54(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板のゲート電極を形成する工程を示す図である。図54(A),(B)に示すように、実施の形態5に係るゲート電極を形成する工程とほぼ同様の処理を施すことにより、ゲート絶縁層13を挟んで有機半導体層19aと対向するようにゲート電極12をゲート絶縁層13上に形成する。これにより、本実施の形態に係る有機薄膜トランジスタ1Fが形成される。 54 (A) and 54 (B) are views showing a process of forming the gate electrode of the thin film transistor substrate shown in FIGS. 46 (A) and 46 (B). As shown in FIGS. 54A and 54B, the organic semiconductor layer 19a is opposed to the gate insulating layer 13 by performing almost the same process as the step of forming the gate electrode according to the fifth embodiment. Thus, the gate electrode 12 is formed on the gate insulating layer 13. Thereby, the organic thin film transistor 1F according to the present embodiment is formed.
 図55(A),(B)および図56(A),(B)は、図46(A),(B)に示す薄膜トランジスタ基板の層間保護層および層間マスク層を形成する工程の第1工程および第2工程を示す図である。図57(A),(B)は、図46に示す薄膜トランジスタ基板の画素電極、ソース電極端子およびボディ電極端子を形成する工程を示す図である。図55(A),(B)から図57(A),(B)に示すように、実施の形態5に係る層間保護層および層間マスク層を形成する工程および画素電極、ソース電極端子およびボディ電極端子を形成する工程とほぼ同様の処理を施すことにより、層間保護層22、層間マスク層23A、画素電極25b、ソース電極端子25aおよびボディ電極端子25cを形成する。 FIGS. 55A and 55B and FIGS. 56A and 56B show the first step of forming the interlayer protective layer and the interlayer mask layer of the thin film transistor substrate shown in FIGS. 46A and 46B. It is a figure which shows a 2nd process. FIGS. 57A and 57B are diagrams showing a process of forming a pixel electrode, a source electrode terminal, and a body electrode terminal of the thin film transistor substrate shown in FIG. As shown in FIGS. 55A and 55B to FIGS. 57A and 57B, the step of forming the interlayer protective layer and the interlayer mask layer according to the fifth embodiment, the pixel electrode, the source electrode terminal, and the body By performing substantially the same process as the step of forming the electrode terminals, the interlayer protective layer 22, the interlayer mask layer 23A, the pixel electrode 25b, the source electrode terminal 25a, and the body electrode terminal 25c are formed.
 以上のような工程を経てトップゲート-トップコンタクト構造の有機薄膜トランジスタ1Fを具備する薄膜トランジスタ基板2Fを製造することができる。 Through the above process, the thin film transistor substrate 2F including the organic thin film transistor 1F having a top gate-top contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Fおよびこれを具備する薄膜トランジスタ基板2Fにあっては、ソース電極14aおよびドレイン電極14bと異なる材料でボディ電極17aを形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1F and the thin film transistor substrate 2F having the same according to the present embodiment, the body electrode 17a is formed of a material different from that of the source electrode 14a and the drain electrode 14b, thereby forming the source electrode 14a and the drain electrode 14b. The work function and the work function of the body electrode 17a are different.
 なお、ソース電極14aおよびドレイン電極14bの材料、ボディ電極17aの材料ならびに有機半導体層19aの材料は、実施の形態3と同様の材料を採用することができる。 In addition, the material similar to Embodiment 3 can be employ | adopted for the material of the source electrode 14a and the drain electrode 14b, the material of the body electrode 17a, and the material of the organic-semiconductor layer 19a.
 このような構成とすることにより、ボディ電極17bを介して有機半導体層19a中に蓄積した電荷(電子または正孔)を容易に取り除くことができる。この結果、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができ、本実施の形態においても実施の形態3とほぼ同様の効果が得られる。 With such a configuration, charges (electrons or holes) accumulated in the organic semiconductor layer 19a can be easily removed via the body electrode 17b. As a result, it is possible to realize a stable TFT characteristic by suppressing the shift of the TFT characteristic at the time of light irradiation or at the time of light OFF, and this embodiment can provide substantially the same effect as that of the third embodiment.
 また、本実施の形態に係る薄膜トランジスタ基板の製造方法にあっては、有機半導体層19aの形成後にソース電極14aおよびドレイン電極14bを形成する。これにより、有機半導体膜19を塗布してベークする際に、ソース電極14aおよびドレイン電極14bが酸化することを防止できる。この結果、本実施の形態に係る薄膜トランジスタ基板の製造方法にあっては、コンタクト抵抗不良を低減できると同時にソース電極およびドレイン電極の選択肢を広げることができる。 Further, in the method of manufacturing the thin film transistor substrate according to the present embodiment, the source electrode 14a and the drain electrode 14b are formed after the organic semiconductor layer 19a is formed. This can prevent the source electrode 14a and the drain electrode 14b from being oxidized when the organic semiconductor film 19 is applied and baked. As a result, in the method for manufacturing the thin film transistor substrate according to the present embodiment, contact resistance defects can be reduced, and at the same time, options for the source electrode and the drain electrode can be expanded.
 (実施の形態8)
 図58(A),(B)は、実施の形態8に係る有機薄膜トランジスタを具備する薄膜トランジスタ基板をソース電極およびドレイン電極の並ぶ方向に沿って分断した場合の断面図およびボディ電極の延在方向に沿って分断した場合の断面図である。図58(A),(B)を参照して、本実施の形態に係る有機薄膜トランジスタ1Gおよびこれを具備する薄膜トランジスタ基板2Gについて説明する。なお、図58(A)は、図2(A)に対応する部分を示しており、図58(B)は、図2(B)に対応する部分を示している。
(Embodiment 8)
58A and 58B are a cross-sectional view and a body electrode extending direction when a thin film transistor substrate including the organic thin film transistor according to the eighth embodiment is divided along the direction in which the source electrode and the drain electrode are arranged. It is sectional drawing at the time of dividing along. With reference to FIGS. 58A and 58B, an organic thin film transistor 1G according to the present embodiment and a thin film transistor substrate 2G including the same will be described. 58A shows a portion corresponding to FIG. 2A, and FIG. 58B shows a portion corresponding to FIG. 2B.
 図58(A),(B)に示すように、本実施の形態に係る有機薄膜トランジスタ1Gおよびこれを具備する薄膜トランジスタ基板2Gは、実施の形態7に係る有機薄膜トランジスタ1Fおよびこれを具備する薄膜トランジスタ基板2Fと比較した場合に、ボディ電極17bに表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数と異なる仕事関数を有するボディ電極17bを備える点において相違し、その他の構成については、ほぼ同様である。 As shown in FIGS. 58A and 58B, the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate 2G having the same are the organic thin film transistor 1F according to the seventh embodiment and the thin film transistor substrate 2F having the same. When the body electrode 17b is subjected to a surface treatment, the body electrode 17b has a work function different from that of the source electrode 14a and the drain electrode 14b. It is the same.
 具体的には、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の金属材料によって構成されており、ボディ電極17bと有機半導体層19aの界面には、自己組織化単分子膜93が形成されている。ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の金属材料によって構成した場合であっても自己組織化単分子膜をボディ電極17bの表面を覆うように形成することにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17bの仕事関数とを異ならせることができる。 Specifically, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, and a self-assembled monolayer 93 is formed at the interface between the body electrode 17b and the organic semiconductor layer 19a. Has been. Even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same metal material, the source electrode 14a and the drain are formed by forming the self-assembled monolayer so as to cover the surface of the body electrode 17b. The work function of the electrode 14b and the work function of the body electrode 17b can be made different.
 なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料、有機半導体層19aの材料および自己組織化単分子膜93の材料としては、実施の形態4とほぼ同様のものを採用することができる。 In addition, as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material of the organic semiconductor layer 19a, and the material of the self-assembled monolayer 93, the same materials as those in Embodiment 4 can be employed. .
 本実施の形態に係る薄膜トランジスタ基板2Gの製造方法は、基本的に実施の形態7に係る薄膜トランジスタ基板2Fの製造方法に準じており、部分的に実施の形態4に係る薄膜トランジスタ基板2Cの製造方法に準じている。本実施の形態に係る薄膜トランジスタ基板2Gの製造方法は、表面処理工程を有する点において、実施の形態7に係る薄膜トランジスタ基板2Fの製造方法と相違する。 The manufacturing method of the thin film transistor substrate 2G according to the present embodiment basically conforms to the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment, and is partially applied to the manufacturing method of the thin film transistor substrate 2C according to the fourth embodiment. It conforms. The manufacturing method of the thin film transistor substrate 2G according to the present embodiment is different from the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment in that it includes a surface treatment process.
 本実施の形態に係る薄膜トランジスタ基板2Gの製造方法にあっては、まず、ベースコート層を形成する工程および有機半導体層を形成する工程において実施の形態7に係る薄膜トランジスタ基板2Fの製造方法とほぼ同様の処理を施すことにより、基板10にベースコート層11および有機半導体層19aを形成する。 In the manufacturing method of the thin film transistor substrate 2G according to the present embodiment, first, in the step of forming the base coat layer and the step of forming the organic semiconductor layer, substantially the same as the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment. By performing the treatment, the base coat layer 11 and the organic semiconductor layer 19a are formed on the substrate 10.
 図59(A),(B)は、図58(A),(B)に示す薄膜トランジスタ基板のソース電極、ドレイン電極およびボディ電極を形成する工程を示す図である。図59(A),(B)に示すように、真空蒸着法やスパッタ法等によって所定の形状にパターニングされたソース電極14a、ドレイン電極14bおよびボディ電極17bを100~400nm程度の厚さで形成する。なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bは、同一の材料によって構成されている。 FIGS. 59A and 59B are diagrams showing a process of forming a source electrode, a drain electrode, and a body electrode of the thin film transistor substrate shown in FIGS. 58A and 58B. As shown in FIGS. 59A and 59B, a source electrode 14a, a drain electrode 14b, and a body electrode 17b that are patterned into a predetermined shape by a vacuum deposition method, a sputtering method, or the like are formed with a thickness of about 100 to 400 nm. To do. The source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material.
 図60(A),(B)は、図59(A),(B)に示すボディ電極に表面処理を施す工程を示す図である。図60(A),(B)に示すように、ボディ電極17bに表面処理を施す工程にあっては、実施の形態4に係る薄膜トランジスタ基板2Cとほぼ同様の処理を施すことにより、ボディ電極17bの表面を覆うように自己組織化単分子膜93を形成する。これにより、ボディ電極17bの仕事関数を変更することができる。なお、感光性レジスト29は、ボディ電極17bの表面が露出するようにベースコート層11上に塗布される。 60 (A) and 60 (B) are diagrams showing a process of performing a surface treatment on the body electrode shown in FIGS. 59 (A) and 59 (B). As shown in FIGS. 60A and 60B, in the step of subjecting the body electrode 17b to the surface treatment, the body electrode 17b is subjected to substantially the same treatment as that of the thin film transistor substrate 2C according to the fourth embodiment. A self-assembled monolayer 93 is formed so as to cover the surface. Thereby, the work function of the body electrode 17b can be changed. The photosensitive resist 29 is applied on the base coat layer 11 so that the surface of the body electrode 17b is exposed.
 続いて、有機半導体層、第1の保護層およびマスク層を形成する工程、第2の保護層およびゲート絶縁層を形成する工程、ゲート電極を形成する工程、層間保護層および層間マスク層を形成する工程、ならびに、画素電極、ソース電極端子およびボディ電極端子を形成する工程において、実施の形態7に係る薄膜トランジスタ基板2Fの製造方法と同様の処理を施すことにより、本実施の形態に係る薄膜トランジスタ基板2Gを形成する。 Subsequently, the step of forming the organic semiconductor layer, the first protective layer and the mask layer, the step of forming the second protective layer and the gate insulating layer, the step of forming the gate electrode, the interlayer protective layer and the interlayer mask layer are formed. In the step of forming the pixel electrode, the source electrode terminal, and the body electrode terminal, the thin film transistor substrate according to the present embodiment is performed by performing the same process as the manufacturing method of the thin film transistor substrate 2F according to the seventh embodiment. 2G is formed.
 以上のような工程を経てトップゲート-トップコンタクト構造の有機薄膜トランジスタ1Gを具備する薄膜トランジスタ基板2Gを製造することができる。 Through the steps described above, the thin film transistor substrate 2G including the organic thin film transistor 1G having a top gate-top contact structure can be manufactured.
 本実施の形態に係る有機薄膜トランジスタ1Gおよびこれを具備する薄膜トランジスタ基板2Gにあっては、ソース電極14a、ドレイン電極14bおよびボディ電極17bを同一の材料で形成した後に、ボディ電極17bの表面にのみ表面処理を施すことにより、ソース電極14aおよびドレイン電極14bの仕事関数とボディ電極17aの仕事関数とが異なる。 In the organic thin film transistor 1G and the thin film transistor substrate 2G including the organic thin film transistor 1G according to the present embodiment, after the source electrode 14a, the drain electrode 14b, and the body electrode 17b are formed of the same material, the surface is formed only on the surface of the body electrode 17b. By performing the treatment, the work functions of the source electrode 14a and the drain electrode 14b are different from the work function of the body electrode 17a.
 上述のように、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料、有機半導体層19aの材料および自己組織化単分子膜93の材料としては、実施の形態4とほぼ同様のものを採用することができる。 As described above, as the material for the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the material for the organic semiconductor layer 19a, and the material for the self-assembled monolayer 93, the same materials as those in the fourth embodiment are employed. be able to.
 有機半導体層19aがp型の場合には、ソース電極14aの仕事関数を有機半導体層19aのHOMOレベルに近くすることにより、正孔の注入障壁高さを小さくすることができる。このため、ソース電極14aおよびドレイン電極14bから有機半導体層19aへ正孔を容易に注入することができ、有機薄膜トランジスタ1G内に大きな電流を流すことができる。 When the organic semiconductor layer 19a is p-type, the hole injection barrier height can be reduced by bringing the work function of the source electrode 14a close to the HOMO level of the organic semiconductor layer 19a. For this reason, holes can be easily injected from the source electrode 14a and the drain electrode 14b into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1G.
 また、自己組織化単分子膜93として、たとえばMBTをボディ電極17bの表面上に塗布することにより、ボディ電極の仕事関数を小さくして有機半導体層19aのLUMOレベルに近づけることができる。これにより、ボディ電極17aを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。 Also, as the self-assembled monomolecular film 93, for example, MBT is applied on the surface of the body electrode 17b, so that the work function of the body electrode can be reduced to approach the LUMO level of the organic semiconductor layer 19a. Thereby, the electrons accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 有機半導体層19aがn型の場合には、ソース電極14aの仕事関数を有機半導体層19aのLUMOレベルに近くすることにより、電子の注入障壁をほぼなくすことができる。このため、ソース電極14aから有機半導体層19aへ電子を容易に注入することができ、有機薄膜トランジスタ1G内に大きな電流を流すことができる。 When the organic semiconductor layer 19a is n-type, the electron injection barrier can be almost eliminated by bringing the work function of the source electrode 14a close to the LUMO level of the organic semiconductor layer 19a. For this reason, electrons can be easily injected from the source electrode 14a into the organic semiconductor layer 19a, and a large current can flow in the organic thin film transistor 1G.
 また、自己組織化単分子膜93として、たとえばHBTやFBTをボディ電極17bの表面に塗布することにより、ボディ電極の仕事関数を大きくして有機半導体層19aのHOMOレベルに近づけることができる。これにより、ボディ電極17aを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。 Also, as the self-assembled monomolecular film 93, for example, HBT or FBT is applied to the surface of the body electrode 17b, so that the work function of the body electrode can be increased to approach the HOMO level of the organic semiconductor layer 19a. Thereby, the holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17a.
 これらの結果、本実施の形態に係る有機薄膜トランジスタ1Gおよびこれを具備する薄膜トランジスタ基板にあっては、有機半導体層19aがp型またはn型のいずれの場合であっても光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, in the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate having the organic thin film transistor 1G, even when the organic semiconductor layer 19a is p-type or n-type, the light is irradiated or the light is turned off. Stable TFT characteristics can be realized by suppressing the TFT characteristic shift.
 これにより、本実施の形態に係る有機薄膜トランジスタ1Gおよびこれを具備する薄膜トランジスタ基板2Gは、実施の形態7に係る有機薄膜トランジスタ1Fおよびこれを具備する薄膜トランジスタ基板2Fとほぼ同様の効果が得られる。 Thereby, the organic thin film transistor 1G according to the present embodiment and the thin film transistor substrate 2G having the same can obtain substantially the same effects as the organic thin film transistor 1F according to the seventh embodiment and the thin film transistor substrate 2F having the same.
 また、本実施の形態に係る薄膜トランジスタ基板の製造方法にあっては、ソース電極14aおよびドレイン電極14bと同じ材料でボディ電極17bを形成することができるため、工程数や材料費を削減し、製造コストを削減することできる。 Further, in the method of manufacturing the thin film transistor substrate according to the present embodiment, the body electrode 17b can be formed using the same material as the source electrode 14a and the drain electrode 14b. Cost can be reduced.
 (実施の形態9)
 図61は、実施の形態9に係る有機薄膜トランジスタの平面図を示す図である。図62は、図61に示す有機薄膜トランジスタのエネルギー準位を示す図である。図61および図62を参照して本実施の形態に係る有機薄膜トランジスタ1Hについて説明する。
(Embodiment 9)
FIG. 61 is a plan view of an organic thin film transistor according to the ninth embodiment. 62 is a diagram showing energy levels of the organic thin film transistor shown in FIG. An organic thin film transistor 1H according to the present embodiment will be described with reference to FIGS.
 図61に示すように、本実施の形態に係る有機薄膜トランジスタ1Hは、実施の形態1に可係る有機薄膜トランジスタ1と比較した場合に、ソース電極14a、ドレイン電極14bおよびボディ電極17bが同一の材料で構成されており、ソース電極14a、ドレイン電極14bおよびボディ電極17bの仕事関数が同一である点において相違し、その他の構成についてはほぼ同様である。 As shown in FIG. 61, when the organic thin film transistor 1H according to the present embodiment is compared with the organic thin film transistor 1 according to the first embodiment, the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material. The source electrode 14a, the drain electrode 14b, and the body electrode 17b have the same work function, and the other configurations are substantially the same.
 図62に示すように、ソース電極14a、ドレイン電極14bおよびボディ電極17bが同一の材料で構成され、これらの仕事関数が同一となる場合であっても、ボディ電極17bにソース電極14aに印加される電圧と異なる電圧を印加することにより、有機半導体層19a中に蓄積された電荷を引き抜くことができる。 As shown in FIG. 62, even when the source electrode 14a, the drain electrode 14b, and the body electrode 17b are made of the same material and their work functions are the same, the body electrode 17b is applied to the source electrode 14a. By applying a voltage different from the first voltage, the charge accumulated in the organic semiconductor layer 19a can be extracted.
 たとえば、有機半導体層19aがp型であり、有機半導体層19a中に電子が蓄積されていている場合には、ボディ電極17bに正の高い電圧を印加することにより、有機半導体層19aから電子を引き抜くことができる。 For example, when the organic semiconductor layer 19a is p-type and electrons are accumulated in the organic semiconductor layer 19a, a positive high voltage is applied to the body electrode 17b, so that electrons are extracted from the organic semiconductor layer 19a. Can be pulled out.
 一方、有機半導体層19aがn型であり、有機半導体層19a中に正孔が蓄積されている場合には、ボディ電極17bに負の高い電圧を印加することにより、有機半導体層19aから正孔を引き抜くことができる。 On the other hand, when the organic semiconductor layer 19a is n-type and holes are accumulated in the organic semiconductor layer 19a, a negative high voltage is applied to the body electrode 17b, so that holes are generated from the organic semiconductor layer 19a. Can be pulled out.
 このように、ボディ電極17bにソース電極14aよりも高い電圧を印加することにより、ソース電極14a、ドレイン電極14bおよびボディ電極17bの仕事関数が同一であっても有機半導体層19aに蓄積された電荷を引き抜くことができる。この結果、本実施の形態に係る有機薄膜トランジスタ1Hにあっても光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 Thus, by applying a voltage higher than that of the source electrode 14a to the body electrode 17b, even if the work functions of the source electrode 14a, the drain electrode 14b, and the body electrode 17b are the same, the charge accumulated in the organic semiconductor layer 19a Can be pulled out. As a result, even in the organic thin film transistor 1H according to the present embodiment, a stable TFT characteristic can be realized by suppressing a shift of the TFT characteristic at the time of light irradiation or light OFF.
 なお、実施の形態1~8で述べたように、ボディ電極17bの仕事関数と、ソース電極14aおよびドレイン電極14bの仕事関数とを異ならせる場合には、より低い電圧をボディ電極に印加することで有機半導体層19aから容易に電荷を引き抜くことができる。 As described in the first to eighth embodiments, when the work function of the body electrode 17b is different from that of the source electrode 14a and the drain electrode 14b, a lower voltage is applied to the body electrode. Thus, charges can be easily extracted from the organic semiconductor layer 19a.
 (実施の形態10)
 図63は、図2に示す薄膜トランジスタ基板を具備する液晶表示装置を示す概略断面図である。図64は、図63に示す液晶表示装置の等価回路図の第1例を示す図である。図63および図64を参照して、本実施の形態に係る液晶表示装置100について説明する。なお、本実施の形態においては、液晶表示装置100に実施の形態1に係る有機薄膜トランジスタ1をスイッチング素子として用いた場合を例示して説明するが、実施の形態1に係る有機薄膜トランジスタ1の代わりに、実施の形態2から9に係る有機薄膜トランジスタのいずれかをスイッチング素子として用いてもよい。
(Embodiment 10)
63 is a schematic sectional view showing a liquid crystal display device including the thin film transistor substrate shown in FIG. FIG. 64 is a diagram showing a first example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63. A liquid crystal display device 100 according to the present embodiment will be described with reference to FIGS. In the present embodiment, the case where the organic thin film transistor 1 according to the first embodiment is used as a switching element in the liquid crystal display device 100 will be described as an example, but instead of the organic thin film transistor 1 according to the first embodiment. Any of the organic thin film transistors according to the second to ninth embodiments may be used as a switching element.
 図63に示すように、本実施の形態に係る液晶表示装置100は、液晶表示パネル90と、当該液晶表示パネル90に向けて光を照射するバックライトユニット45とを備える。 As shown in FIG. 63, the liquid crystal display device 100 according to the present embodiment includes a liquid crystal display panel 90 and a backlight unit 45 that irradiates light toward the liquid crystal display panel 90.
 液晶表示パネル90は、バックライトユニット45側に配置された薄膜トランジスタ基板2と、当該薄膜トランジスタ基板2に対向配置される対向基板42と、当該薄膜トランジスタ基板2と当該対向基板42との間に設けられた液晶層43とを含む。液晶層43は、薄膜トランジスタ基板2と対向基板42とを互いに接着する環状のシール材(不図示)によって薄膜トランジスタ基板2と対向基板42との間に封止されている。液晶層43は、電気光学特性を有するネマチックの液晶材料などにより構成されている。 The liquid crystal display panel 90 is provided between the thin film transistor substrate 2 disposed on the backlight unit 45 side, the counter substrate 42 disposed to face the thin film transistor substrate 2, and the thin film transistor substrate 2 and the counter substrate 42. And a liquid crystal layer 43. The liquid crystal layer 43 is sealed between the thin film transistor substrate 2 and the counter substrate 42 by an annular sealing material (not shown) that bonds the thin film transistor substrate 2 and the counter substrate 42 to each other. The liquid crystal layer 43 is made of a nematic liquid crystal material having electro-optical characteristics.
 対向基板42は、ガラス基板等の透明基板40と、液晶層43側に配置される主表面上に形成されたカラーフィルタ層41と、カラーフィルタ層41上に形成された共通電極(不図示)とを含む。共通電極上には液晶層43を構成する液晶を配向させるための配向膜が設けられている。薄膜トランジスタ基板2においても画素電極25b側の全面を覆うように配向膜(不図示)が設けられている。 The counter substrate 42 includes a transparent substrate 40 such as a glass substrate, a color filter layer 41 formed on the main surface disposed on the liquid crystal layer 43 side, and a common electrode (not shown) formed on the color filter layer 41. Including. An alignment film for aligning the liquid crystal constituting the liquid crystal layer 43 is provided on the common electrode. An alignment film (not shown) is also provided on the thin film transistor substrate 2 so as to cover the entire surface on the pixel electrode 25b side.
 バックライトユニット45は、液晶表示パネル90に向けて光を照射する光源44を含む。光源44としては、LEDや冷陰極管等を採用することができる。 The backlight unit 45 includes a light source 44 that emits light toward the liquid crystal display panel 90. As the light source 44, an LED, a cold cathode tube, or the like can be employed.
 図64に示すように、薄膜トランジスタ基板2には、互いに平行に延在するように設けられた複数の走査信号配線GLと、当該走査信号配線GLに交差する方向に互いに平行に延在するように設けられた複数の映像信号配線DLと、隣接する映像信号配線DLの間のそれぞれに当該映像信号配線DLに平行に延在するように設けられた複数の定電位配線VLとが配設されている。また、隣接する走査信号配線GLの間のそれぞれに当該走査信号配線GLに平行に延在するように補助容量配線(不図示)が配設されている。 As shown in FIG. 64, the thin film transistor substrate 2 has a plurality of scanning signal lines GL provided so as to extend in parallel to each other, and extend in parallel to each other in a direction intersecting the scanning signal lines GL. A plurality of video signal lines DL provided and a plurality of constant potential lines VL provided so as to extend in parallel with the video signal lines DL are disposed between the adjacent video signal lines DL. Yes. In addition, auxiliary capacitance lines (not shown) are arranged between the adjacent scanning signal lines GL so as to extend in parallel with the scanning signal lines GL.
 複数の走査信号配線GLと複数の映像信号配線DLとが交差する部分の近傍のそれぞれに有機薄膜トランジスタ1が設けられており、画素ごとに有機薄膜トランジスタ1が設けられている。有機薄膜トランジスタ1のゲート電極12(ゲート電極G)は、走査信号配線GLに接続されている。有機薄膜トランジスタ1のソース電極14a(ソース電極S)は、映像信号配線DLに接続されている。有機薄膜トランジスタ1のドレイン電極14b(ドレイン電極D)は、画素電極25bおよび上記の補助容量電極に接続されている。有機薄膜トランジスタ1のボディ電極17a(ボディ電極BD)は、定電位配線VLに接続されている。 The organic thin film transistor 1 is provided in the vicinity of a portion where the plurality of scanning signal lines GL and the plurality of video signal lines DL intersect, and the organic thin film transistor 1 is provided for each pixel. The gate electrode 12 (gate electrode G) of the organic thin film transistor 1 is connected to the scanning signal wiring GL. The source electrode 14a (source electrode S) of the organic thin film transistor 1 is connected to the video signal wiring DL. The drain electrode 14b (drain electrode D) of the organic thin film transistor 1 is connected to the pixel electrode 25b and the auxiliary capacitance electrode. The body electrode 17a (body electrode BD) of the organic thin film transistor 1 is connected to the constant potential wiring VL.
 液晶表示装置100は、垂直動作回路50、水平駆動回路51および定電位電源回路52とを含む。垂直動作回路50は、走査信号配線GLの端部に設けられたゲート端子(不図示)を介して走査信号配線GLに接続されている。水平駆動回路51は、映像信号配線DLの端部に設けられたソース電極端子25aを介して映像信号配線DLに接続されている。定電位電源回路52は、定電位配線VLの端部に設けられたボディ電極端子25cを介して定電位配線VLに接続されている。垂直動作回路50、水平駆動回路51および定電位電源回路52は、複数の画素を画素単位に駆動する駆動回路として機能する。 The liquid crystal display device 100 includes a vertical operation circuit 50, a horizontal drive circuit 51, and a constant potential power circuit 52. The vertical operation circuit 50 is connected to the scanning signal wiring GL via a gate terminal (not shown) provided at the end of the scanning signal wiring GL. The horizontal drive circuit 51 is connected to the video signal line DL via a source electrode terminal 25a provided at the end of the video signal line DL. The constant potential power circuit 52 is connected to the constant potential wiring VL via a body electrode terminal 25c provided at the end of the constant potential wiring VL. The vertical operation circuit 50, the horizontal drive circuit 51, and the constant potential power supply circuit 52 function as drive circuits that drive a plurality of pixels in units of pixels.
 液晶表示装置では、各画素において、垂直動作回路50から走査信号が走査信号配線GLを介してゲート電極Gに送られて、有機薄膜トランジスタ1がオン状態になったときに、水平駆動回路51から映像信号が映像信号配線DLを介してソース電極Sに送られて、有機半導体層19aおよびドレイン電極Dを介して、画素電極25bに所定の電荷が書き込まれる。 In the liquid crystal display device, in each pixel, when the scanning signal is sent from the vertical operation circuit 50 to the gate electrode G via the scanning signal wiring GL, and the organic thin film transistor 1 is turned on, the image from the horizontal driving circuit 51 is displayed. A signal is sent to the source electrode S through the video signal wiring DL, and a predetermined charge is written into the pixel electrode 25b through the organic semiconductor layer 19a and the drain electrode D.
 この際、薄膜トランジスタ基板2の各画素電極と、対向基板42の共通電極との間に電位差が生じ、液晶層43(各画素の液晶容量)および当該液晶容量に並列に接続された電荷蓄積容量(補助容量)Csに所定の電圧が印加される。 At this time, a potential difference is generated between each pixel electrode of the thin film transistor substrate 2 and the common electrode of the counter substrate 42, and a liquid crystal layer 43 (liquid crystal capacitor of each pixel) and a charge storage capacitor (in parallel with the liquid crystal capacitor) A predetermined voltage is applied to the auxiliary capacitor Cs.
 液晶表示装置100では、各画素において、液晶層43に印加する電圧の大きさによって液晶層43の配向状態を変えることにより、液晶層43の光透過率を調整する。この結果、液晶表示装置100に映像が表示される。 In the liquid crystal display device 100, the light transmittance of the liquid crystal layer 43 is adjusted by changing the alignment state of the liquid crystal layer 43 according to the magnitude of the voltage applied to the liquid crystal layer 43 in each pixel. As a result, an image is displayed on the liquid crystal display device 100.
 有機薄膜トランジスタ1に含まれる有機半導体層19aとして、p型有機半導体層を用いる場合には、定電位配線VLを介してボディ電極に正の高い電圧を印加する。これにより、光照射によって有機半導体層19aに蓄積された余剰の電子は、ボディ電極17aを介して定電位配線VLから吸い出される。 When a p-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1, a positive high voltage is applied to the body electrode via the constant potential wiring VL. Thereby, surplus electrons accumulated in the organic semiconductor layer 19a by light irradiation are sucked out from the constant potential wiring VL through the body electrode 17a.
 一方、有機薄膜トランジスタ1に含まれる有機半導体層19aとして、n型有機半導体層を用いる場合には、定電位配線VLに負の高い電圧を印加する。これにより、光照射によって有機半導体層19aに蓄積された余剰の正孔は、ボディ電極17aを介して定電位配線VLから吸い出される。 On the other hand, when an n-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1, a high negative voltage is applied to the constant potential wiring VL. Thereby, surplus holes accumulated in the organic semiconductor layer 19a by light irradiation are sucked out from the constant potential wiring VL through the body electrode 17a.
 このように、本実施の形態に係る液晶表示装置100は、光照射時や光OFF時の閾値電圧のシフト等を抑えて安定したTFT特性を実現することができる。これにより、液晶表示装置100にあっては、外光やバックライト光など光の影響を受けにくい、安定した表示品位が得られる。 As described above, the liquid crystal display device 100 according to the present embodiment can realize a stable TFT characteristic by suppressing a shift of a threshold voltage during light irradiation or light OFF. As a result, the liquid crystal display device 100 can obtain a stable display quality that is not easily affected by light such as external light and backlight light.
 なお、走査信号配線GLは、有機薄膜トランジスタ1のゲート電極を形成する工程においてゲート電極と同一の材料で形成することが好ましい。映像信号配線DLは、有機薄膜トランジスタ1のソース電極およびドレイン電極を形成する工程において、ソース電極およびドレイン電極と同一の材料で形成することが好ましい。定電位配線VLは、ソース電極およびドレイン電極と異なる材料でボディ電極を形成する場合には、ボディ電極を形成する工程においてボディ電極と同一の材料で形成することが好ましく、ソース電極、ドレイン電極およびボディ電極を同一の材料で形成する場合には、ソース電極、ドレイン電極およびボディ電極を形成する工程において、ソース電極、ドレイン電極およびボディ電極と同一の材料で形成することが好ましい。 Note that the scanning signal wiring GL is preferably formed of the same material as the gate electrode in the step of forming the gate electrode of the organic thin film transistor 1. The video signal line DL is preferably formed of the same material as the source electrode and the drain electrode in the step of forming the source electrode and the drain electrode of the organic thin film transistor 1. In the case where the body electrode is formed of a material different from that of the source electrode and the drain electrode, the constant potential wiring VL is preferably formed of the same material as the body electrode in the step of forming the body electrode. When the body electrode is formed of the same material, it is preferable that the source electrode, the drain electrode, and the body electrode are formed of the same material in the step of forming the source electrode, the drain electrode, and the body electrode.
 (実施の形態11)
 図65は、図63に示す液晶表示装置の等価回路図の第2例を示す図である。図65を参照して、本実施の形態に係る液晶表示装置100Aについて説明する。本実施の形態に係る液晶表示装置100Aは、実施の形態10に係る液晶表示装置と比較した場合に、定電位電源回路および定電位配線を備えておらず、ボディ電極17aが補助容量配線に接続されている点において相違し、その他の構成についてはほぼ同様である。
(Embodiment 11)
FIG. 65 is a diagram showing a second example of an equivalent circuit diagram of the liquid crystal display device shown in FIG. 63. A liquid crystal display device 100A according to the present embodiment will be described with reference to FIG. When compared with the liquid crystal display device according to the tenth embodiment, the liquid crystal display device 100A according to the present embodiment does not include the constant potential power supply circuit and the constant potential wiring, and the body electrode 17a is connected to the auxiliary capacitance wiring. In other respects, the configuration is substantially the same.
 このようにボディ電極17aを補助容量電極および共通電極と同電位とする構成であっても、光照射により有機半導体層19a内に蓄積された電荷(電子または正孔)は、ボディ電極17aを介して補助容量配線から吸い出される。これにより、本実施の形態に係る液晶表示装置100にあっても、実施の形態10に係る液晶表示装置100とほぼ同様の効果が得られる。なお、ボディ電極17aが対向基板42の共通電極に接続されてもよい。 Thus, even if the body electrode 17a is configured to have the same potential as the auxiliary capacitance electrode and the common electrode, the charges (electrons or holes) accumulated in the organic semiconductor layer 19a by the light irradiation pass through the body electrode 17a. Sucked out of the auxiliary capacity wiring. Thereby, even in the liquid crystal display device 100 according to the present embodiment, substantially the same effect as the liquid crystal display device 100 according to the tenth embodiment can be obtained. The body electrode 17a may be connected to the common electrode of the counter substrate 42.
 (実施の形態12)
 図66は、図2に示す薄膜トランジスタ基板を具備する有機EL表示装置の第1の形態を示す概略断面図である。図67は、図66に示す有機EL表示装置の等価回路図の第1例を示す図である。図66および図67を参照して本実施の形態に係る有機EL表示装置200について説明する。なお、本実施の形態においては、有機EL表示装置200に実施の形態1に係る有機薄膜トランジスタ1をEL駆動用の有機薄膜トランジスタとして用いた場合を例示して説明するが、実施の形態1に係る有機薄膜トランジスタ1の代わりに、実施の形態2から9に係る有機薄膜トランジスタのいずれかをEL駆動用の有機薄膜トランジスタとして用いてもよい。
(Embodiment 12)
66 is a schematic cross-sectional view showing a first embodiment of an organic EL display device including the thin film transistor substrate shown in FIG. FIG. 67 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. An organic EL display device 200 according to the present embodiment will be described with reference to FIGS. 66 and 67. FIG. In the present embodiment, the case where the organic thin film transistor 1 according to the first embodiment is used as an organic thin film transistor for driving EL in the organic EL display device 200 will be described as an example. Instead of the thin film transistor 1, any one of the organic thin film transistors according to the second to ninth embodiments may be used as an organic thin film transistor for driving an EL.
 図66に示すように、本実施の形態に係る有機EL表示装置200は、アノード電極に相当する画素電極25bが形成された薄膜トランジスタ基板2と、画素を区画するとともに隣接する画素が短絡しないように薄膜トランジスタ基板2上に設けられた隔壁層31と、画素電極25b上に設けられた有機EL層32と、有機EL層32上に設けられたカソード電極に相当する対向電極33と、対向電極33を覆うように設けられたパッシベーション層34と、パッシベーション層34上に配置された対向基板60とを備える。 As shown in FIG. 66, in the organic EL display device 200 according to the present embodiment, the thin film transistor substrate 2 on which the pixel electrode 25b corresponding to the anode electrode is formed and the pixels are partitioned and adjacent pixels are not short-circuited. A partition wall layer 31 provided on the thin film transistor substrate 2, an organic EL layer 32 provided on the pixel electrode 25b, a counter electrode 33 corresponding to a cathode electrode provided on the organic EL layer 32, and a counter electrode 33 A passivation layer 34 is provided so as to cover it, and a counter substrate 60 is disposed on the passivation layer 34.
 アノード電極に相当する画素電極25b、有機EL層32およびカソード電極に相当する対向電極33によって、有機発光ダイオードOLEDが構成される。 The pixel electrode 25b corresponding to the anode electrode, the organic EL layer 32, and the counter electrode 33 corresponding to the cathode electrode constitute an organic light emitting diode OLED.
 画素電極25bとしては、たとえば、ボトムエミッション型の有機EL表示装置では、IZO、ITO、ZnO、SnOなどの透明導電膜を用いることができる。一方、トップエミッション型の有機EL表示装置では、Al、Al合金、Ag、Ag合金などの反射電極を用いるか、あるいは、上層にIZO、ITOなどの透明導電膜、下層にAl、Al合金、Ag、Ag合金、Mo、Crなどの反射電極を組み合わせた積層構造電極を用いることができる。 As the pixel electrode 25b, for example, in a bottom emission type organic EL display device, a transparent conductive film such as IZO, ITO, ZnO, or SnO can be used. On the other hand, in a top emission type organic EL display device, a reflective electrode such as Al, Al alloy, Ag or Ag alloy is used, or a transparent conductive film such as IZO or ITO is used as an upper layer, and Al, Al alloy or Ag is used as a lower layer. It is possible to use a laminated structure electrode in which reflective electrodes such as Ag alloy, Mo, and Cr are combined.
 有機EL層32は、正孔輸送層(HTL)、EL発光層(EM)および電子輸送層(ETL)がこの順に積層されることによって構成される。正孔輸送層(HTL)としては、たとえばトリフェニルジアミン(TPD)などを採用することができる。 The organic EL layer 32 is configured by stacking a hole transport layer (HTL), an EL light emitting layer (EM), and an electron transport layer (ETL) in this order. As the hole transport layer (HTL), for example, triphenyldiamine (TPD) can be employed.
 EL発光層(EM)は、好ましくは、赤色発光層、青色発光層、緑色発光層により、カラー表示出来るように構成されている。赤色発光層としては、たとえばDCJBTとルブレンをブレンドしたトリス(8-ハイドロオキシキノリン)アルミニウム(Alq3)などを採用することができる。青色発光層としては、たとえばBCzVBiをドープしたDPVBiなどを採用することができる。緑色発光層としては、たとえばクマリン540をドープしたAlq3などを採用することができる。また、電子輸送層(ETL)としては、たとえばAlq3を採用することができる。 The EL light emitting layer (EM) is preferably configured to be capable of color display by a red light emitting layer, a blue light emitting layer, and a green light emitting layer. As the red light emitting layer, for example, tris (8-hydroxyquinoline) aluminum (Alq3) blended with DCJBT and rubrene can be employed. As the blue light emitting layer, for example, DPVBi doped with BCzVBi can be employed. As the green light emitting layer, for example, Alq3 doped with coumarin 540 can be employed. Moreover, as an electron carrying layer (ETL), Alq3 can be employ | adopted, for example.
 対向電極33としては、たとえば、ボトムエミッション型の有機EL表示装置では、Al、Al合金、Ag、Ag合金などの反射電極を採用することができる。一方、トップエミッション型の有機EL表示装置では、IZO、ITO、ZnO、SnOなどの透明導電膜、あるいは、薄膜のAu、Ag、Mg、Mg-Agなどの金属膜を(透明な対向電極として)用いることができる。また、パッシベーション層34は、水分や酸素等の侵入を防止するために形成され、材料としては、SiN、SiO、Alなどの無機膜、樹脂などの有機膜、およびこれらの積層膜を組み合わせたものを採用することができる。 As the counter electrode 33, for example, in a bottom emission type organic EL display device, a reflective electrode such as Al, Al alloy, Ag, or Ag alloy can be employed. On the other hand, in a top emission type organic EL display device, a transparent conductive film such as IZO, ITO, ZnO, SnO or a thin metal film such as Au, Ag, Mg, Mg—Ag is used (as a transparent counter electrode). Can be used. The passivation layer 34 is formed to prevent intrusion of moisture, oxygen, and the like. As materials, an inorganic film such as SiN, SiO 2 , Al 2 O 3 , an organic film such as a resin, and a laminated film thereof are used. A combination of these can be used.
 対向基板60としては、ガラス基板や、PEN、PES、PET等のプラスチック基板を採用することができる。対向基板60は、有機EL層32、対向電極33およびパッシベーション層34が形成された薄膜トランジスタ基板に接着剤等によりに貼り合わされる。 As the counter substrate 60, a glass substrate or a plastic substrate such as PEN, PES, or PET can be employed. The counter substrate 60 is bonded to the thin film transistor substrate on which the organic EL layer 32, the counter electrode 33, and the passivation layer 34 are formed with an adhesive or the like.
 図67に示すように、薄膜トランジスタ基板2には、互いに平行に延在するように設けられた複数の走査信号配線GLと、当該走査信号配線GLに交差する方向に互いに平行に延在するように設けられた複数の映像信号配線DLと、隣接する映像信号配線DLの間のそれぞれに当該映像信号配線DLに平行に延在するように設けられた複数のアノード電流供給配線Anとが配設されている。 As shown in FIG. 67, the thin film transistor substrate 2 has a plurality of scanning signal lines GL provided so as to extend in parallel to each other, and extend in parallel to each other in a direction intersecting the scanning signal lines GL. A plurality of video signal lines DL provided and a plurality of anode current supply lines An provided between the adjacent video signal lines DL so as to extend in parallel to the video signal lines DL are provided. ing.
 隣接する2本の走査信号配線GLと、隣接する2本の映像信号配線DLとによって区画される領域のうち、アノード電流供給配線Anと当該アノード電流供給配線Anから離れて位置する映像信号配線DLによって区画される領域が画素に相当する。 Of the region partitioned by the two adjacent scanning signal lines GL and the two adjacent video signal lines DL, the anode current supply line An and the video signal line DL positioned away from the anode current supply line An are provided. A region partitioned by is equivalent to a pixel.
 画素の内部には、スイッチング用の有機薄膜トランジスタTsと、電荷蓄積容量Csと、EL駆動用の有機薄膜トランジスタTd(有機薄膜トランジスタ1)と、有機発光ダイオードOLEDが形成されている。 In the pixel, an organic thin film transistor Ts for switching, a charge storage capacitor Cs, an organic thin film transistor Td for driving an EL (organic thin film transistor 1), and an organic light emitting diode OLED are formed.
 有機薄膜トランジスタTsのゲート電極Gは、走査信号配線GLに接続されている。有機薄膜トランジスタTsのソース電極Sは、映像信号配線に接続されている。有機薄膜トランジスタTsのドレイン電極Dは、電荷蓄積容量Csの一端側および、EL駆動用の有機薄膜トランジスタTdのゲート電極12に接続されている。 The gate electrode G of the organic thin film transistor Ts is connected to the scanning signal wiring GL. The source electrode S of the organic thin film transistor Ts is connected to the video signal wiring. The drain electrode D of the organic thin film transistor Ts is connected to one end side of the charge storage capacitor Cs and the gate electrode 12 of the organic thin film transistor Td for driving EL.
 有機薄膜トランジスタTdのソース電極14aおよびボディ電極17aは、アノード電流供給配線Anに接続されている。有機薄膜トランジスタTdのドレイン電極14bは、有機発光ダイオードOLEDのアノード電極(画素電極25b)に接続されている。また、電荷蓄積容量Csの他端側は、アノード電流供給配線Anに接続されている。 The source electrode 14a and the body electrode 17a of the organic thin film transistor Td are connected to the anode current supply wiring An. The drain electrode 14b of the organic thin film transistor Td is connected to the anode electrode (pixel electrode 25b) of the organic light emitting diode OLED. The other end side of the charge storage capacitor Cs is connected to the anode current supply wiring An.
 有機EL表示装置200は、垂直動作回路50、水平駆動回路51およびアノード電源回路53とを含む。垂直動作回路50は、走査信号配線GLの端部に設けられたゲート端子(不図示)を介して走査信号配線GLに接続されている。水平駆動回路51は、映像信号配線DLの端部に設けられたソース電極端子25aを介して映像信号配線DLに接続されている。アノード電源回路53は、アノード電流供給配線Anの端部に設けられた端子部を介してアノード電流供給配線Anに接続されている。垂直動作回路50、水平駆動回路51およびアノード電源回路53は、複数の画素を画素単位に駆動する駆動回路として機能する。 The organic EL display device 200 includes a vertical operation circuit 50, a horizontal drive circuit 51, and an anode power supply circuit 53. The vertical operation circuit 50 is connected to the scanning signal wiring GL via a gate terminal (not shown) provided at the end of the scanning signal wiring GL. The horizontal drive circuit 51 is connected to the video signal line DL via a source electrode terminal 25a provided at the end of the video signal line DL. The anode power supply circuit 53 is connected to the anode current supply wiring An via a terminal portion provided at the end of the anode current supply wiring An. The vertical operation circuit 50, the horizontal drive circuit 51, and the anode power supply circuit 53 function as a drive circuit that drives a plurality of pixels in units of pixels.
 各画素において、垂直動作回路50から走査信号が走査信号配線GLを介してスイッチング用の有機薄膜トランジスタTsのゲート電極Gに送られて、有機薄膜トランジスタTsがオン状態になったときに、水平駆動回路51から映像信号が映像信号配線DLを介して有機薄膜トランジスタTsのソース電極Sに供給される。 In each pixel, when the scanning signal is sent from the vertical operation circuit 50 to the gate electrode G of the switching organic thin film transistor Ts via the scanning signal wiring GL, the horizontal driving circuit 51 is turned on. The video signal is supplied to the source electrode S of the organic thin film transistor Ts through the video signal wiring DL.
 当該ソース電極Sに供給された信号は、電荷蓄積容量Csに保持される。このとき、電荷蓄積容量Csの保持電圧は、EL駆動用の有機薄膜トランジスタTdのゲート電極12-ソース電極14a間の電圧となる。このゲート電極12-ソース電極14a間の電圧に応じた一定電流が、アノード電源回路53からアノード電流供給配線AnとEL駆動用の有機薄膜トランジスタTdを介して、有機発光ダイオードOLEDに供給される。この結果、有機発光ダイオードOLEDが発光して、有機EL表示装置200に映像が表示される。 The signal supplied to the source electrode S is held in the charge storage capacitor Cs. At this time, the holding voltage of the charge storage capacitor Cs is a voltage between the gate electrode 12 and the source electrode 14a of the EL driving organic thin film transistor Td. A constant current corresponding to the voltage between the gate electrode 12 and the source electrode 14a is supplied from the anode power supply circuit 53 to the organic light emitting diode OLED via the anode current supply wiring An and the organic thin film transistor Td for driving EL. As a result, the organic light emitting diode OLED emits light and an image is displayed on the organic EL display device 200.
 有機薄膜トランジスタ1(有機薄膜トランジスタTd)に含まれる有機半導体層19aとして、p型有機半導体層を用いる場合には、ボディ電極17aがアノード電流供給配線Anに接続されていることにより、光照射によって有機半導体層19aに蓄積された余剰の電子がボディ電極17aを介してアノード電流供給配線Anから吸い出される。 When a p-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1 (organic thin film transistor Td), the body electrode 17a is connected to the anode current supply wiring An, so that the organic semiconductor is irradiated by light irradiation. Excess electrons accumulated in the layer 19a are sucked out from the anode current supply wiring An through the body electrode 17a.
 これにより、本実施の形態に係る有機EL表示装置200は、光照射時や光OFF時の閾値電圧のシフト等を抑えて安定したTFT特性を実現することができる。この結果、有機EL表示装置200にあっては、外光や自発光など光の影響を受けにくい、安定した表示品位が得られる。 Thereby, the organic EL display device 200 according to the present embodiment can realize a stable TFT characteristic by suppressing a shift of a threshold voltage at the time of light irradiation or light OFF. As a result, in the organic EL display device 200, a stable display quality that is hardly affected by light such as external light or self-light emission can be obtained.
 なお、有機EL表示装置200は、ディスプレイのような表示媒体に使用することができるし、照明のような発光装置に転用することができる。 The organic EL display device 200 can be used for a display medium such as a display, and can be diverted to a light emitting device such as an illumination.
 (実施の形態13)
 図68は、図66に示す有機EL表示装置の等価回路図の第2例を示す図である。図68を参照して、本実施の形態に係る有機EL表示装置200Aについて説明する。
(Embodiment 13)
FIG. 68 is a diagram showing a second example of an equivalent circuit diagram of the organic EL display device shown in FIG. With reference to FIG. 68, an organic EL display device 200A according to the present embodiment will be described.
 図68に示すように、本実施の形態に係る有機EL表示装置200Aは、実施の形態12に係る有機EL表示装置200と比較した場合に、定電位電源回路54および定電位配線HLを備え、当該定電位配線HLにボディ電極17aが接続されている点において相違し、その他の構成についてはほぼ同様である。 As shown in FIG. 68, when compared with the organic EL display device 200 according to the twelfth embodiment, the organic EL display device 200A according to the present embodiment includes a constant potential power supply circuit 54 and a constant potential wiring HL. The difference is that the body electrode 17a is connected to the constant potential wiring HL, and the other configurations are substantially the same.
 定電位配線HLは、隣接する走査信号配線GLの間のそれぞれに当該走査信号配線GLに平行に延在するように複数設けられている。 A plurality of constant potential wirings HL are provided between the adjacent scanning signal wirings GL so as to extend in parallel to the scanning signal wirings GL.
 有機薄膜トランジスタ1に含まれる有機半導体層19aとして、p型有機半導体層を用いる場合には、定電位配線HLを介してボディ電極に正の高い電圧を印加する。これにより、光照射によって有機半導体層19aに蓄積された余剰の電子は、ボディ電極17aを介して定電位配線HLから吸い出される。定電位配線HLがアノード電流供給配線Anと別系統なので、余剰電子を引き抜くのにより適した電圧を印加することができる。これにより本実施の形態に係る有機EL表示装置200Aにあっても、実施の形態12に係る有機EL表示装置200と同等以上の効果が得られる。 When a p-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1, a positive high voltage is applied to the body electrode via the constant potential wiring HL. Thereby, surplus electrons accumulated in the organic semiconductor layer 19a by light irradiation are sucked out from the constant potential wiring HL through the body electrode 17a. Since the constant potential wiring HL is a separate system from the anode current supply wiring An, it is possible to apply a voltage more suitable for extracting surplus electrons. Thereby, even in the organic EL display device 200A according to the present embodiment, an effect equal to or higher than that of the organic EL display device 200 according to the twelfth embodiment is obtained.
 (実施の形態14)
 図69は、図66に示す有機EL表示装置の等価回路図の第3例を示す図である。図69を参照して、本実施の形態に係る有機EL表示装置200Bについて説明する。
(Embodiment 14)
FIG. 69 is a diagram showing a third example of an equivalent circuit diagram of the organic EL display device shown in FIG. 66. With reference to FIG. 69, an organic EL display device 200B according to the present embodiment will be described.
 本実施の形態に係る有機EL表示装置200Bは、実施の形態11に係る有機EL表示装置200と比較した場合に、有機薄膜トランジスタTdのボディ電極17aが有機発光ダイオードOLEDのカソード電極(対向電極33)またはカソード電流供給配線CAに接続されている点および有機半導体層19aがn型有機半導体層によって構成されている点において相違し、その他の構成については、ほぼ同様である。 In the organic EL display device 200B according to the present embodiment, when compared with the organic EL display device 200 according to the eleventh embodiment, the body electrode 17a of the organic thin film transistor Td is the cathode electrode (counter electrode 33) of the organic light emitting diode OLED. Or it is different in that it is connected to the cathode current supply wiring CA and in that the organic semiconductor layer 19a is formed of an n-type organic semiconductor layer, and the other configurations are substantially the same.
 このように有機薄膜トランジスタ1に含まれる有機半導体層19aとして、n型有機半導体層を用いる場合には、ボディ電極17aがカソード電極(対向電極33)またはカソード電流供給配線CAに接続されていることにより、光照射によって有機半導体層19aに蓄積された余剰の正孔がボディ電極17aを介してカソード電流供給配線CAから吸い出される。これにより本実施の形態に係る有機EL表示装置200Bにあっても、実施の形態12に係る有機EL表示装置200とほぼ同様の効果が得られる。 As described above, when an n-type organic semiconductor layer is used as the organic semiconductor layer 19a included in the organic thin film transistor 1, the body electrode 17a is connected to the cathode electrode (counter electrode 33) or the cathode current supply wiring CA. The excess holes accumulated in the organic semiconductor layer 19a by the light irradiation are sucked out from the cathode current supply wiring CA through the body electrode 17a. Thereby, even in the organic EL display device 200B according to the present embodiment, substantially the same effects as those of the organic EL display device 200 according to the twelfth embodiment are obtained.
 (実施の形態15)
 図70は、図2に示す薄膜トランジスタ基板を具備する有機EL表示装置の第2の形態を示す概略断面図である。図71は、図70に示す有機EL表示装置の等価回路図の第1例を示す図である。図70および図71を参照して本実施の形態に係る有機EL表示装置200Cについて説明する。
(Embodiment 15)
FIG. 70 is a schematic cross-sectional view showing a second embodiment of the organic EL display device including the thin film transistor substrate shown in FIG. 71 is a diagram showing a first example of an equivalent circuit diagram of the organic EL display device shown in FIG. An organic EL display device 200C according to the present embodiment will be described with reference to FIGS.
 本実施の形態に係る有機EL表示装置200Cは、実施の形態12に係る有機EL表示装置200と比較した場合に、有機EL層36の構成が異なり、これに伴い、画素電極25bがアノード電極ではなくカソード電極として機能し、有機EL層36上に形成された対向電極35がカソード電極ではなくアノード電極として機能する点と、アノード電源回路およびアノード電流供給配線に代えてカソード電源回路55およびカソード電流供給配線CAを備える点において相違し、その他の構成についてはほぼ同様である。 The organic EL display device 200C according to the present embodiment differs from the organic EL display device 200 according to the twelfth embodiment in the configuration of the organic EL layer 36. Accordingly, the pixel electrode 25b is an anode electrode. The counter electrode 35 formed on the organic EL layer 36 functions not as a cathode electrode but as an anode electrode, and instead of the anode power supply circuit and the anode current supply wiring, the cathode power supply circuit 55 and the cathode current are used. The difference is that the supply wiring CA is provided, and the other configurations are substantially the same.
 具体的には、有機EL層36は、電子輸送層(ETL)、EL発光層(EM)および正孔輸送層(HTL)がこの順に積層されることによって構成される。 Specifically, the organic EL layer 36 is configured by laminating an electron transport layer (ETL), an EL light emitting layer (EM), and a hole transport layer (HTL) in this order.
 これにより、カソード電極(画素電極25b)の材料として、Al、Al合金、Ag、Ag合金などの反射電極を採用することができる。アノード電極(対向電極35)の材料として、IZO、ITO、CNT、グラフェンなどの透明導電膜、あるいは、薄膜のAu、Agなどの金属膜を(透明な対向電極として)用いることができる。あるいは、Au、Ag、Cu、Al、IZO、ITO、CNT、グラフェンなどのナノ粒子を含むインクを採用することができる。 Thereby, a reflective electrode such as Al, Al alloy, Ag, or Ag alloy can be employed as the material of the cathode electrode (pixel electrode 25b). As a material for the anode electrode (counter electrode 35), a transparent conductive film such as IZO, ITO, CNT, or graphene, or a thin metal film such as Au or Ag can be used (as a transparent counter electrode). Alternatively, an ink containing nanoparticles such as Au, Ag, Cu, Al, IZO, ITO, CNT, and graphene can be employed.
 本実施の形態に係る有機EL表示装置200Cにあっては、各画素において、垂直動作回路50から走査信号が走査信号配線GLを介してスイッチング用の有機薄膜トランジスタTsのゲート電極Gに送られて、有機薄膜トランジスタTsがオン状態になったときに、水平駆動回路51から映像信号が映像信号配線DLを介して有機薄膜トランジスタTsのソース電極Sに供給される。 In the organic EL display device 200C according to the present embodiment, in each pixel, a scanning signal is sent from the vertical operation circuit 50 to the gate electrode G of the switching organic thin film transistor Ts via the scanning signal wiring GL. When the organic thin film transistor Ts is turned on, a video signal is supplied from the horizontal drive circuit 51 to the source electrode S of the organic thin film transistor Ts via the video signal wiring DL.
 当該ソース電極Sに供給された信号は、電荷蓄積容量Csに保持される。このとき、電荷蓄積容量Csの保持電圧は、EL駆動用の有機薄膜トランジスタTdのゲート電極12-ソース電極14a間の電圧となる。このゲート電極12-ソース電極14a間の電圧に応じた一定電流が、アノード電極(対向電極35)からEL駆動用の有機薄膜トランジスタTdを介して、有機発光ダイオードOLEDに供給される。この結果、有機発光ダイオードOLEDが発光して、有機EL表示装置200Cに映像が表示される。 The signal supplied to the source electrode S is held in the charge storage capacitor Cs. At this time, the holding voltage of the charge storage capacitor Cs is a voltage between the gate electrode 12 and the source electrode 14a of the EL driving organic thin film transistor Td. A constant current corresponding to the voltage between the gate electrode 12 and the source electrode 14a is supplied from the anode electrode (counter electrode 35) to the organic light emitting diode OLED via the organic thin film transistor Td for driving EL. As a result, the organic light emitting diode OLED emits light and an image is displayed on the organic EL display device 200C.
 本実施の形態では、有機薄膜トランジスタ1(EL駆動用の有機薄膜トランジスタTd)に含まれる有機半導体層19aとして、p型半導体層、n型半導体層のいずれも用いることが出来るが、図71に示すように、n型半導体層を用いる場合に特に効果を発揮する。即ち、有機EL層が長期間の通電や水分などにより性能が劣化してアノード端の電圧が変化しても、EL駆動用の有機薄膜トランジスタTdに流れる電流を決めるゲート電極12-ソース電極14a間の電圧は影響を受けないため、有機薄膜トランジスタTd及び有機EL層に一定の電流を流す事が出来るためである。これにより、均一で安定な輝度(表示品位)を有する有機EL表示装置200Cが得られる。 In the present embodiment, any of a p-type semiconductor layer and an n-type semiconductor layer can be used as the organic semiconductor layer 19a included in the organic thin film transistor 1 (organic thin film transistor Td for driving EL), as shown in FIG. In particular, this is particularly effective when an n-type semiconductor layer is used. That is, even if the performance of the organic EL layer deteriorates due to long-term energization or moisture and the voltage at the anode end changes, the current between the gate electrode 12 and the source electrode 14a that determines the current flowing in the organic thin film transistor Td for driving the EL is changed. This is because the voltage is not affected, and a constant current can flow through the organic thin film transistor Td and the organic EL layer. Thereby, the organic EL display device 200C having uniform and stable luminance (display quality) is obtained.
 n型有機半導体層を用いる場合には、ボディ電極17aがカソード電流供給配線CAに接続されていることにより、光照射によって有機半導体層19aに蓄積された余剰の正孔がボディ電極17aを介してカソード電流供給配線CAから吸い出される。これにより、本実施の形態に係る有機EL表示装置200Cは、光照射時や光OFF時の閾値電圧のシフト等を抑えて安定したTFT特性を実現することができる。この結果、有機EL表示装置200Cにあっては、外光や自発光など光の影響を受けにくい、安定した表示品位が得られる。 When the n-type organic semiconductor layer is used, the body electrode 17a is connected to the cathode current supply wiring CA, so that excess holes accumulated in the organic semiconductor layer 19a due to light irradiation pass through the body electrode 17a. Sucked from the cathode current supply wiring CA. Thereby, the organic EL display device 200C according to the present embodiment can realize a stable TFT characteristic by suppressing a shift of a threshold voltage during light irradiation or light OFF. As a result, in the organic EL display device 200C, it is possible to obtain a stable display quality that is hardly affected by light such as external light or self-light emission.
 上述の実施の形態2,4,6,8においては、ソース電極、ドレイン電極およびボディ電極が同一材料で構成される際に、ボディ電極のみに表面処理を施す場合を例示して説明したが、これに限定されず、実施の形態1,3,5,7においてボディ電極がソース電極およびドレイン電極と異なる材料で形成される場合であってもボディ電極のみに表面処理を施してもよい。 In the above-described Embodiments 2, 4, 6, and 8, the case where the surface treatment is performed only on the body electrode when the source electrode, the drain electrode, and the body electrode are made of the same material has been described as an example. The present invention is not limited to this, and even in the first, third, fifth, and seventh embodiments, the surface treatment may be performed only on the body electrode even when the body electrode is formed of a material different from that of the source electrode and the drain electrode.
 また、上述の実施の形態2,4,6,8においては、ソース電極、ドレイン電極およびボディ電極を同一の金属材料で構成し、ボディ電極のみに表面処理を施すことにより、ソース電極およびドレイン電極と、ボディ電極との仕事関数を調整する場合を例示して説明したがこれに限定されず、ソース電極、ドレイン電極およびボディ電極を同一の金属材料で構成し、n型の有機半導体層およびp型の有機半導体層のいずれを用いる場合であってもソース電極およびドレイン電極の面方位と、異なる面方位を有するボディ電極を形成することにより、ソース電極およびドレイン電極と、ボディ電極との仕事関数を調整してもよい。 In the above-described Embodiments 2, 4, 6, and 8, the source electrode, the drain electrode, and the body electrode are made of the same metal material, and only the body electrode is subjected to a surface treatment, whereby the source electrode and the drain electrode are formed. However, the present invention is not limited to this, and the source electrode, the drain electrode, and the body electrode are made of the same metal material, and the n-type organic semiconductor layer and p The work function of the source and drain electrodes and the body electrode is formed by forming body electrodes having different surface orientations from the surface orientation of the source and drain electrodes, regardless of which type of organic semiconductor layer is used. May be adjusted.
 表1は、各電極材料における、面方位ごとの仕事関数および多結晶の仕事関数を示すものである。仕事関数の値は、各種文献に開示された値であり、実験環境等により異なる場合があるが、概ね以下の表1に示す値程度になることが知られている。 Table 1 shows the work function for each plane orientation and the work function of polycrystalline in each electrode material. The value of the work function is a value disclosed in various documents and may vary depending on the experimental environment or the like, but is known to be approximately the value shown in Table 1 below.
Figure JPOXMLDOC01-appb-T000001
 たとえば、p型有機半導体材料としてペンタセンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、ソース電極4aおよびドレイン電極14bの主面の面方位が主として(100)となるように形成し、ボディ電極17bの主面の面方位が主として(110)となるように形成する。
Figure JPOXMLDOC01-appb-T000001
For example, when pentacene is used as the p-type organic semiconductor material and Au is used as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the plane orientation of the main surfaces of the source electrode 4a and the drain electrode 14b is mainly used. It is formed so as to be (100), and the surface orientation of the main surface of the body electrode 17b is mainly (110).
 このように構成することにより、ボディ電極17bの仕事関数は略4.8eVとなり、ボディ電極17bの仕事関数をp型の有機半導体層19aであるペンタセンのLUMOレベル(約3.5eV)に近い値まで小さくすることができる。 With this configuration, the work function of the body electrode 17b is approximately 4.8 eV, and the work function of the body electrode 17b is a value close to the LUMO level (about 3.5 eV) of pentacene, which is the p-type organic semiconductor layer 19a. Can be made smaller.
 この結果、ボディ電極17bを介して有機半導体層19a中に蓄積された電子を容易に抜き取ることができる。これにより、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, electrons accumulated in the organic semiconductor layer 19a can be easily extracted via the body electrode 17b. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 また、たとえば、n型有機半導体材料としてC60フラーレンを採用し、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料としてAuを採用する場合には、ソース電極4aおよびドレイン電極14bの主面の面方位が主として(100)となるように形成し、ボディ電極17bの主面の面方位が主として(111)となるように形成する。 For example, when C60 fullerene is adopted as the n-type organic semiconductor material and Au is adopted as the material of the source electrode 14a, the drain electrode 14b, and the body electrode 17b, the surfaces of the main surfaces of the source electrode 4a and the drain electrode 14b It is formed so that the orientation is mainly (100), and the surface orientation of the main surface of the body electrode 17b is mainly (111).
 このように構成することにより、ボディ電極17bの仕事関数は略5.3eVとなり、ボディ電極17bの仕事関数をn型の有機半導体層19aであるC60フラーレンのHOMOレベル(約6.2eV)に近づけることができる。 With this configuration, the work function of the body electrode 17b is approximately 5.3 eV, and the work function of the body electrode 17b is brought close to the HOMO level (about 6.2 eV) of the C60 fullerene that is the n-type organic semiconductor layer 19a. be able to.
 この結果、ボディ電極17bを介して有機半導体層19a中に蓄積された正孔を容易に抜き取ることができる。これにより、光照射時や光OFF時のTFT特性のシフトを抑えて安定したTFT特性を実現することができる。 As a result, holes accumulated in the organic semiconductor layer 19a can be easily extracted through the body electrode 17b. Thereby, stable TFT characteristics can be realized while suppressing a shift in TFT characteristics during light irradiation or light OFF.
 なお、ソース電極14a、ドレイン電極14bおよびボディ電極17bの材料ならびに、これらの面方位については、上述の記載に限定されず、表1に基づいて、本発明の趣旨を逸脱しない範囲内において適宜選択することができる。同様に、ソース電極およびドレイン電極の材料とボディ電極の材料とが異なる場合であっても、表1に基づいて、それらの材料および面方位を適宜選択することができる。 Note that the materials of the source electrode 14a, the drain electrode 14b, and the body electrode 17b and their plane orientations are not limited to the above description, and are appropriately selected based on Table 1 within a range that does not depart from the spirit of the present invention. can do. Similarly, even when the material of the source and drain electrodes and the material of the body electrode are different, those materials and plane orientations can be appropriately selected based on Table 1.
 以上、本発明の実施の形態について説明したが、今回開示された実施の形態はすべての点で例示であって制限的なものではない。本発明の範囲は請求の範囲によって示され、請求の範囲と均等の意味および範囲内でのすべての変更が含まれる。 As mentioned above, although embodiment of this invention was described, embodiment disclosed this time is an illustration and restrictive at no points. The scope of the present invention is defined by the terms of the claims, and includes meanings equivalent to the terms of the claims and all changes within the scope.
 1,1A,1B,1C,1D,1F,1G,1H 有機薄膜トランジスタ、2,2A,2B,2C,2D,2F,2G 薄膜トランジスタ基板、10 基板、11 ベースコート層、12 ゲート電極、13 ゲート絶縁層、14 ドレイン電極膜、14a ソース電極、14b ドレイン電極、15,16,26,27,28,29 感光性レジスト、17 ボディ電極膜、17a,17b ボディ電極、19 有機半導体膜、19a 有機半導体層、20 保護膜、20a 保護層、21,23 有機絶縁膜、21A マスク層、22 層間保護層、23A 層間マスク層、24a,24b,24c コンタクトホール、25a ソース電極端子、25b 画素電極、25c ボディ電極端子、30 保護層、31 隔壁層、33,35 対向電極、34 パッシベーション層、40 透明基板、41 カラーフィルタ層、42,60 対向基板、43 液晶層、44 光源、45 バックライトユニット、50 垂直動作回路、51 水平駆動回路、52,54 定電位電源回路、53 アノード電源回路、55 カソード電源回路、81,82 遮光マスク、81a,82a 開口部、90 液晶表示パネル、93 自己組織化単分子膜、100,100A 液晶表示装置、200,200A,200B,200C 有機EL表示装置。 1, 1A, 1B, 1C, 1D, 1F, 1G, 1H organic thin film transistor, 2, 2A, 2B, 2C, 2D, 2F, 2G thin film transistor substrate, 10 substrate, 11 base coat layer, 12 gate electrode, 13 gate insulating layer, 14 drain electrode film, 14a source electrode, 14b drain electrode, 15, 16, 26, 27, 28, 29 photosensitive resist, 17 body electrode film, 17a, 17b body electrode, 19 organic semiconductor film, 19a organic semiconductor layer, 20 Protective film, 20a protective layer, 21, 23 organic insulating film, 21A mask layer, 22 interlayer protective layer, 23A interlayer mask layer, 24a, 24b, 24c contact hole, 25a source electrode terminal, 25b pixel electrode, 25c body electrode terminal, 30 protective layers, 31 partition layers, 33, 3 Counter electrode, 34 passivation layer, 40 transparent substrate, 41 color filter layer, 42, 60 counter substrate, 43 liquid crystal layer, 44 light source, 45 backlight unit, 50 vertical operation circuit, 51 horizontal drive circuit, 52, 54 constant potential power supply Circuit, 53 anode power circuit, 55 cathode power circuit, 81, 82 shading mask, 81a, 82a opening, 90 liquid crystal display panel, 93 self-assembled monolayer, 100, 100A liquid crystal display, 200, 200A, 200B, 200C organic EL display.

Claims (5)

  1.  ゲート電極と、
     前記ゲート電極に対向して配置される有機半導体層と、
     前記ゲート電極と前記有機半導体層との間に位置するゲート絶縁層と、
     前記有機半導体層に接続され、前記有機半導体層に電流を流すためのソース電極およびドレイン電極と、
     前記有機半導体層に接続され、前記有機半導体層に蓄積された電荷を抜くためのボディ電極とを備えた、有機薄膜トランジスタ。
    A gate electrode;
    An organic semiconductor layer disposed opposite to the gate electrode;
    A gate insulating layer located between the gate electrode and the organic semiconductor layer;
    A source electrode and a drain electrode connected to the organic semiconductor layer and configured to pass a current through the organic semiconductor layer;
    An organic thin film transistor, comprising: a body electrode connected to the organic semiconductor layer and for removing charges accumulated in the organic semiconductor layer.
  2.  前記ボディ電極は、前記ソース電極および前記ドレイン電極と異なる材料によって構成されている、請求項1に記載の有機薄膜トランジスタ。 The organic thin film transistor according to claim 1, wherein the body electrode is made of a material different from that of the source electrode and the drain electrode.
  3.  前記ボディ電極と前記有機半導体層との界面には、単分子膜が形成されている、請求項1または2に記載の有機薄膜トランジスタ。 The organic thin film transistor according to claim 1 or 2, wherein a monomolecular film is formed at an interface between the body electrode and the organic semiconductor layer.
  4.  前記有機半導体層は、p型有機半導体層であり、
     前記ボディ電極の仕事関数は、前記ソース電極および前記ドレイン電極の仕事関数よりも小さい、請求項1から請求項3のいずれか1項に記載の有機薄膜トランジスタ。
    The organic semiconductor layer is a p-type organic semiconductor layer,
    The organic thin film transistor according to any one of claims 1 to 3, wherein a work function of the body electrode is smaller than a work function of the source electrode and the drain electrode.
  5.  前記有機半導体層は、n型有機半導体層であり、
     前記ボディ電極の仕事関数は、前記ソース電極および前記ドレイン電極の仕事関数よりも大きい、請求項1から請求項3のいずれか1項に記載の有機薄膜トランジスタ。
    The organic semiconductor layer is an n-type organic semiconductor layer,
    4. The organic thin film transistor according to claim 1, wherein a work function of the body electrode is larger than work functions of the source electrode and the drain electrode. 5.
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