WO2015025530A1

WO2015025530A1 - Organic semiconductor device

Info

Publication number: WO2015025530A1
Application number: PCT/JP2014/052140
Authority: WO
Inventors: 宜範松浦
Original assignee: 三井金属鉱業株式会社
Priority date: 2013-08-23
Filing date: 2014-01-30
Publication date: 2015-02-26
Also published as: JP2015041566A; TW201508965A

Abstract

　Provided is an organic semiconductor device of simplified structure without an interlayer insulating film. This organic semiconductor device is provided with: an electrode foil including at least a metal foil; an organic semiconductor layer partially provided on the surface of the electrode foil; an upper electrode layer provided on the organic semiconductor layer; a sealing layer provided on the electrode foil, the organic semiconductor layer, and the upper electrode layer, the sealing layer covering the exposed portions of the electrode foil, the organic semiconductor layer and the upper electrode layer; and at least one contact hole provided so as to pass through the sealing layer, the contact hole enabling electrical connectivity with the upper electrode layer.

Description

Organic semiconductor device

The present invention relates to organic semiconductor devices such as organic EL elements, organic EL lighting, and organic solar cells.

In recent years, light-emitting elements such as organic EL lighting have attracted attention as environmentally friendly green devices. Features of organic EL lighting include 1) low power consumption compared to incandescent lamps, 2) thin and lightweight, and 3) flexibility. Currently, organic EL lighting is being developed to realize the features 2) and 3). In this regard, it is impossible to realize the characteristics 2) and 3) above with a glass substrate that has been conventionally used in flat panel displays (FPD) or the like.

Therefore, research on a substrate as a support for organic EL lighting (hereinafter referred to as a support base material) is underway, and ultrathin glass, resin film, metal foil, and the like have been proposed as candidates. Ultra-thin glass is excellent in heat resistance, barrier properties, and light transmission properties, and has good flexibility, but handling properties are slightly inferior, thermal conductivity is low, and material cost is high. In addition, the resin film is excellent in handling properties and flexibility, has a low material cost, and has good light transmittance, but has poor heat resistance and barrier properties, and has low thermal conductivity.

On the other hand, the metal foil has excellent characteristics such as excellent heat resistance, barrier properties, handling properties, thermal conductivity, good flexibility, and low material cost, except that it has no light transmittance. . In particular, the thermal conductivity of a typical flexible glass or film is as low as 1 W / m ° C. or less, whereas in the case of a copper foil, it is extremely high as about 400 W / m ° C.

In order to realize a light emitting element using a metal substrate, in Patent Document 1 (Japanese Patent Laid-Open No. 2009-152113), the surface of the metal substrate is smoothed by polishing treatment or plating treatment, and an organic layer is formed thereon. Has been proposed. Patent Document 2 (Japanese Patent Laid-Open No. 2008-243772) proposes that a nickel plating layer is provided on a metal substrate so that a smooth surface is formed without polishing and an organic EL element is formed thereon. Has been. In these techniques, smoothing the surface of the metal substrate is an important issue in order to prevent a short circuit between the electrodes. As a technique for coping with this problem, Patent Document 3 (International Application No. 2011-152091) and Patent Document 4 (International Application No. 2011-152092) have an extremely low arithmetic average roughness Ra of 10.0 nm or less. It has been proposed to use a metal foil having a surface as a supporting substrate and electrode.

JP 2009-152113 A JP 2008-243772 A International Publication No. 2011-152091 International Publication No. 2011-152092

Patent Documents 3 and 4 also disclose organic EL elements using electrode foils. An example of an organic EL element having such a conventional configuration is shown in FIG. In the organic EL element shown in FIG. 4, an organic semiconductor layer 118 and an upper electrode layer 120 are laminated on an electrode foil 100 including a metal foil 112, a reflective layer 114, and a buffer layer 116, thereby forming a light emitting region. An interlayer insulating film 117 is provided in a bank shape (bank shape) at or near the end of the light emitting region. The end portions of the organic semiconductor layer 118 and the upper electrode layer 120 extend to the end portion of the bank-like interlayer insulating film 117 or the vicinity thereof. The exposed portions of the upper electrode layer 120 and the interlayer insulating film 117 are covered with a sealing layer 124 including a sealing material 124 a and a glass substrate 124 b, but one end of the upper electrode layer 120 is not covered with the sealing layer 124. The extraction electrode can be formed by being exposed.

As described above, in the conventional organic EL device, the interlayer insulating film 117 is provided in a bank shape at or near the end of the organic semiconductor layer 118 constituting the light emitting region, and the light emitting region is thereby defined. It has become. The interlayer insulating film 117 provided in a bank shape is formed by masking a non-formed region of the interlayer insulating film 117 to form a film, and then removing the masking. The formation of the interlayer insulating film 117 is preferably performed by a coating method when a roll-to-roll process, which is a manufacturing process with high mass productivity, is employed. However, in this case, due to the bank-like shape, the coating accuracy is reduced at the outer edge of the interlayer insulating film 117 and uneven coating tends to occur. As a result, there is a concern that leakage current is generated at the outer edge of the element constituting the light emitting region, carriers are not easily distributed uniformly in the light emitting region, and light emission may be uneven.

The present inventors have now provided a contact hole in a sealing layer covering the upper electrode layer and the like, and ensuring electrical connection with the upper electrode layer through the contact hole from above the upper electrode layer. It was found that an interlayer insulating film that can cause this problem can be eliminated. In addition, it has also been found that by eliminating the need for an interlayer insulating film, an organic semiconductor device having a simplified configuration suitable for a roll-to-roll process, which is a mass-productive manufacturing process, can be provided.

Therefore, an object of the present invention is to provide an organic semiconductor device having a simplified configuration that is suitable for a roll-to-roll process without requiring an interlayer insulating film.

According to one aspect of the invention, an electrode foil comprising at least a metal foil;
An organic semiconductor layer partially provided on the surface of the electrode foil;
An upper electrode layer provided on the organic semiconductor layer;
A sealing layer provided on the electrode foil, the organic semiconductor layer, and the upper electrode layer, and covering an exposed portion of the electrode foil, the organic semiconductor layer, and the upper electrode layer;
At least one contact hole provided to penetrate the sealing layer and enabling electrical connection with the upper electrode layer;
An organic semiconductor device is provided.

It is a schematic sectional drawing which shows one form of the organic-semiconductor device by this invention. It is a schematic perspective view which shows one form of the organic-semiconductor device by this invention. It is a schematic perspective view which shows one form of the organic-semiconductor layer and auxiliary wiring by this invention. It is a schematic sectional drawing which shows the organic EL element by a prior art.

Organic Semiconductor Device The organic semiconductor device of the present invention uses an electrode foil. The electrode foil is a foil comprising at least a metal foil as described in Patent Documents 3 and 4, and can be preferably used as an electrode (that is, an anode or a cathode) for various organic semiconductor devices. The electrode foil is particularly preferably used as an electrode for a flexible organic semiconductor device because it is generally low stress and easy to bend, but may be used for an organic semiconductor device having poor flexibility or rigidity. Examples of such organic semiconductor devices (mainly flexible organic semiconductor devices) include i) light emitting elements such as organic EL elements, organic EL lighting, organic EL displays, electronic paper, liquid crystal displays, ii) photoelectric elements such as thin film solar. Examples of the battery include organic EL elements, organic EL lighting, organic EL displays, organic solar cells, and dye-sensitized solar cells, and more preferably organic EL lighting in that ultra-thin and high-luminance emission can be obtained. It is. In the case of an organic solar cell, many of the characteristics required for the electrode material are in common with the characteristics required for the organic EL element, so that the electrode foil can be preferably used as the anode or cathode of the organic solar battery. That is, the organic semiconductor device can be configured as either an organic EL element or an organic solar cell by appropriately selecting the type of the organic semiconductor functional layer to be laminated on the electrode foil according to a known technique.

1 and 2 are schematic perspective views of an organic semiconductor device according to an embodiment of the present invention. In addition, although the organic semiconductor device of the example of illustration assumes the organic EL element, it is as above-mentioned that the structure is applicable also to other organic semiconductor devices, such as an organic solar cell. The organic semiconductor device shown in FIGS. 1 and 2 includes an electrode foil 10 including at least a metal foil, an organic semiconductor layer 18, an upper electrode layer 20, and a sealing layer 24 stacked in this order. Note that a plurality of organic semiconductor layers 18 may be arranged on the electrode foil 10, and the organic semiconductor layers 18 may be configured to be separated from each other. Then, at least one contact hole 26 that enables electrical connection with the upper electrode layer 20 is provided so as to penetrate the sealing layer 24. According to this configuration, since the electrical connection with the upper electrode layer 20 can be secured from above the upper electrode layer 20 through the contact hole 26, the conventionally required interlayer insulating film is eliminated. Can do.

The organic semiconductor device of the present invention can have flexibility because the flexible electrode foil 10 can be used as a supporting substrate and electrode. For this reason, at least a part, preferably most, ideally all of the manufacturing process of the organic semiconductor device can be performed by a roll-to-roll process. The roll-to-roll process is an extremely advantageous process for efficiently mass-producing electronic devices in which a long foil wound in a roll shape is drawn out and subjected to a predetermined process and then wound up again. This is a key process for realizing mass production of organic semiconductor devices. When employing a roll-to-roll process, it is desirable from the viewpoint of improving productivity that the layer is formed by a coating method. In this respect, in the layer structure of the present invention having no interlayer insulating film, the outer edge of the interlayer insulating film avoids a decrease in coating accuracy that tends to occur due to the bank-like shape, and as a result, the light emitting region It is possible to suppress the occurrence of leakage current at the outer edge of the element constituting the light emission and the occurrence of uneven light emission. That is, by reducing the leakage current, carriers can be easily spread uniformly in the light emitting region, and uniform light emission can be realized. Further, since there is no bank-like interlayer insulating film, the organic semiconductor layer 18 and the upper electrode layer 20 can be provided parallel to the electrode foil 10 over the entire surface thereof, thereby greatly simplifying the layer configuration. be able to. That is, by eliminating the need for an interlayer insulating film, it is possible to provide an organic semiconductor device having a simplified configuration suitable for a roll-to-roll process, which is a mass-productive manufacturing process.

The electrode foil 10 has a region where the organic semiconductor layer 18 is not formed along the outer edge of the organic semiconductor layer 18, and the sealing layer 24 is bonded to the electrode foil 10 in the region where the organic semiconductor layer is not formed. preferable. That is, according to the layer structure of the present invention, in the conventional organic semiconductor device, the interlayer insulating film does not exist at a position where the interlayer insulating film should exist, and instead, the sealing layer 24 is formed on the outer edge of the organic semiconductor layer 18. It will be arranged along. For this reason, the sealing layer 24 is joined to the electrode foil 10 in the region where the organic semiconductor layer is not formed, and the insulation required near the outer edge of the organic semiconductor layer 18 can be ensured. Similarly, the organic semiconductor layer 18 has a region where the upper electrode layer 20 is not formed along the outer edge of the upper electrode layer 20, and the sealing layer 24 is joined to the organic semiconductor layer 18 in the region where the upper electrode layer is not formed. It is preferable. That is, the upper electrode layer 20 preferably has an area smaller than that of the organic semiconductor layer 18, and the outer edge of the upper electrode layer 20 is preferably located on the inner side of the outer edge of the organic semiconductor layer 18. By doing so, since the sealing layer 24 is bonded to the organic semiconductor layer 18 in the region where the upper electrode layer is not formed, it easily occurs when the end portion of the upper electrode layer 20 reaches the outer edge of the organic semiconductor layer 18. It is possible to more reliably prevent the occurrence of leak current.

The organic semiconductor layer 18 typically has a function of excitation light emission or photoexcitation power generation, whereby the organic semiconductor device can function as a light emitting element or a photoelectric element. The organic semiconductor layer 18 may have a known layer configuration employed in various organic semiconductor devices such as organic EL elements, and is not particularly limited. For example, in the case of an organic EL element, a hole injection layer and / or a hole transport layer, a light-emitting layer, and an electron transport layer and / or an electron injection layer, as desired, from the electrode foil 10 toward the upper electrode layer 20 as desired. Or it can be laminated | stacked sequentially in the reverse direction. As the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer, layers having various known configurations and compositions can be appropriately used and are not particularly limited.

The upper electrode layer 20 may have a known electrode configuration employed in various organic semiconductor devices such as an organic EL element, and is not particularly limited. Further, the upper electrode layer 20 may be configured as either a cathode or an anode. When the upper electrode layer 20 is configured as a cathode, a 0.5 to 50 nm thick layer is formed on a buffer layer made of a material having a low work function (<3 eV) such as Ca, Ba, LiF, Cs, Mg, and Mg—Ag. The upper electrode layer 20 is preferably formed by laminating metal films such as Al and Ag by vacuum deposition. Alternatively, IZO (indium zinc oxide), ITO (indium tin oxide), ITZO (indium tin zinc oxide), IGO (indium germanium oxide), ZTO (zinc tin oxide), AZO (aluminum doped zinc oxide) A transparent conductive film such as the above may be formed on the buffer layer made of the above-described material having a low work function (<3 eV) with a counter cathode sputtering apparatus. Although it is desirable to increase the thickness of the transparent conductive film in order to reduce the sheet resistance, in consideration of transmittance and refractive index, it is preferably 200 nm or less, more preferably 150 nm or less, and its lower limit is Considering the sheet resistance, 30 nm or more is preferable. On the other hand, when the upper electrode layer 20 is configured as an anode, a metal film or a transparent conductive film is formed on a buffer layer made of a material having a high work function (> 4.5 eV) such as MoO ₃ , V ₂ O ₅ , C, and the like. The upper electrode layer 20 is preferably formed by laminating films. Moreover, you may use highly conductive polymer materials, such as PEDOT: PSS, instead of a metal film and a transparent conductive film.

In consideration of the light emission uniformity, it is preferable to select the laminated material and / or film thickness of the upper electrode layer 20 so that the electrical conductivity is 0.01 S / cm or more. More preferable conductivity is 0.1 S / cm or more. As the film thickness of the upper electrode layer 20 increases, the influence of the cavity increases, making optical design difficult, and as a result, the external quantum efficiency decreases. For this reason, optimization of electrical conductivity and optical characteristics is important.

In order to optimize the conductivity over the entire upper electrode layer 20 in order to ensure the light emission uniformity, it is considered effective to form the auxiliary wiring 22 on the upper electrode layer 20 in a mesh pattern. However, since the auxiliary wiring 22 can block light, the area of the auxiliary wiring 22 is preferably 20% or less of the light emitting region, more preferably 15% or less, and further preferably 10% or less. The lower limit value may be determined in consideration of the sheet resistance of the upper electrode layer 20, but may be, for example, 0.1% or more of the light emitting region.

That is, it is preferable that at least one auxiliary wiring 22 is directly provided on the upper electrode layer 20. The auxiliary wiring 22 is effective in reducing the unevenness of the sheet resistance of the upper electrode layer 20 and improving the light emission uniformity, and is a very effective means particularly for emitting light uniformly over a large area. The auxiliary wiring 22 is made of a known conductive material such as Cu, Al, Ni, Ag, Zn, Sn, Au, or Ti, and a known method such as a vacuum deposition method, an inkjet method, a screen printing method, or a nozzle jet method. What is necessary is just to form using. The thickness of the auxiliary wiring 22 is preferably 50 nm or more. Although there is no problem with the auxiliary wiring 22 being thick, it is preferably 5 μm or less in view of mass productivity. However, when the scrubbing method (Scrabble method) is used to form the contact hole 26 described later, the auxiliary wiring 22 is preferably thicker from the viewpoint of preventing scratches.

Since the auxiliary wiring 22 can block light, it is preferable that the auxiliary wiring 22 is provided on at least a part of the outer edge of the upper electrode layer 20 and / or the vicinity thereof. For example, as shown in FIG. 2, when the upper electrode layer 20 is formed in a rectangular shape, the auxiliary wiring 22 constitutes the outer edge of the rectangular upper electrode layer 20 and / or at least one side in the vicinity thereof. More preferably, two sides that are parallel to each other, more preferably four sides may be configured. Alternatively, when the light emitting element is formed in a circular shape as shown in FIG. 3, the auxiliary wiring 22 "may be formed along the circumference of the upper electrode layer 20 '. However, when the light emitting area is large, particularly when the area of the light emitting region is 30 mm square or more, the auxiliary wiring 22 may be formed in the light emitting surface. In that case, the width of the auxiliary wiring 22 is preferably 500 μm or less, more preferably 300 μm or less, and still more preferably 150 μm or less. The minimum width of the auxiliary wiring 22 is preferably determined by appropriately calculating from the sheet resistance considering the thickness of the auxiliary wiring 22, but is preferably 10 μm or more, and more preferably 50 μm or more.

As shown in FIG. 1, the auxiliary wiring 22 extends to the vicinity of the outer edge of the upper electrode layer 20 on the organic semiconductor layer 18, thereby at least part of the boundary line between the organic semiconductor layer 18 and the upper electrode layer 20. May be covered with the auxiliary wiring 22. According to this configuration, since the auxiliary wiring 22 is also contacted at the side end surface of the upper electrode layer 20, the electrical connection with the upper electrode layer 20 can be further ensured. However, in this embodiment, since it is desired that carriers are spread over the entire upper electrode layer 20 without causing light emission at the contact portion between the auxiliary wiring 22 and the organic semiconductor layer 18, such light emission is caused. It is desirable to configure the auxiliary wiring 22 using a material having a work function that does not occur. In this case, as an example of a preferable material constituting the auxiliary wiring 22, when the upper electrode layer 20 is a cathode, a material having a high work function (> 4.5 eV) such as Cu, Ni, Au is used. In the case where 20 is an anode, materials having a low work function (<4.0 eV) such as Al, Ag, Zn, Sn, and Ti can be used.

The sealing layer 24 is a layer that is provided on the electrode foil 10, the organic semiconductor layer 18, and the upper electrode layer 20 and covers the exposed portions of the electrode foil 10, the organic semiconductor layer 18, and the upper electrode layer 20, and preferably has an insulating property. Have The sealing layer 24 is desirably transparent, but irregularities may be formed on the surface in order to increase the light extraction efficiency. The sealing layer 24 may have any known material and configuration, but a laminated structure of SiNx or SiOx is preferable from the viewpoint of environmental resistance. The formation of the sealing layer 24 may be performed according to a known method, but is preferably performed by a PE-CVD method (plasma CVD method). Further, an acrylic resin layer or the like may be inserted into the sealing layer 24 in order to prevent generation of cracks in the SiNx or SiOx layer. In addition, a resin film 24b such as PEN (polyethylene naphthalate), PET (polyethylene terephthalate), PC (polycarbonate), etc. is disposed on the sealing material 24a made of SiNx, SiOx layer, or the like using an acrylic adhesive. Also good. Even when the sealing layer 24 is formed using the sealing material 24a and the resin film 24b, the contact hole 26 can be easily formed according to a conventional method. In particular, when the resin film 24b exists, it is desirable to form the contact hole 26 using a laser or an ion beam.

The contact hole 26 is a hole that is provided so as to penetrate the sealing layer 24 and enables electrical connection with the upper electrode layer 20. Since electrical connection with the upper electrode layer 20 can be ensured from above the upper electrode layer 20 through the contact hole 26, the conventionally required interlayer insulating film can be eliminated. It is sufficient that at least one contact hole is formed in one place, but a plurality of contact holes may be formed in one place in order to increase the reliability of electrical contact. In addition, when the auxiliary wiring 22 is present, the contact hole 26 is preferably disposed on the auxiliary wiring 22, whereby electrical contact with the upper electrode layer 20 can be made more reliable.

The formation of the contact hole 26 may be performed according to a known method. Examples of preferable methods include a dry etching method, a laser etching method, a reactive ion beam etching method, and a scrubbing method (Scrabble method). The dry etching method is a method of etching a sealing film with plasma using a fluorine-based gas such as CF ₄ or SF _6. For example, an RIE apparatus (reactive ion etching apparatus) (manufactured by Samco, RIE10NR) is used. It can be preferably carried out under the conditions of RF plasma: 0.1 to 0.5 W / cm ² , gas type: CH ₄ / O ₂ = 40/10 sccm, and pressure: 10 Pa. Examples of the laser that can be used for the laser etching method include a carbon dioxide gas laser and a YAG laser. The Scrabble method (Scrabble method) is a method in which a scratch is formed at a necessary location with a needle having a tip of 0.1 mm to 2 mm in diameter. The tip of the needle comprises a DLC (diamond-like carbon) coated alloy, nitride or oxide containing Al, Cu, Mo, C, Si, Ti, Ta, Fe, Ni or the like as a main component. It is desirable that the processing is performed so as to have an angle of 10 ° to 170 °. The tip of the needle need not be a single point, and there may be a plurality of points. Further, like the tip of a minus driver, the tip may be formed in a linear shape. From the viewpoint of durability, it is desirable that the tip of the needle is coated with DLC, but the tip hardness may be increased by other methods such as oxidation treatment and nitriding treatment. Further, during the scrubbing process, it is desirable that a nozzle for sucking the generated particles is attached, and more desirably, a blow nozzle for removing the particles from the element may be separately provided.

The extraction electrode 28 is an electrode for ensuring electrical connection with the upper electrode layer 20 through the contact hole 26. When the contact hole 26 exists on the auxiliary wiring 22, the extraction electrode 28 contacts the auxiliary wiring 22 through the contact hole 26, and the electrical connection with the upper electrode layer 20 is ensured through the auxiliary wiring 22. Is preferable. The extraction electrode 28 may be formed by a known technique such as vacuum deposition, ink jet, screen printing, or nozzle jet. However, a method that does not use a vacuum process is more desirable from the viewpoint of productivity and cost. Examples of the constituent material of the extraction electrode 28 include solder (eg, Sn or Zn alloy), Ag ink, Ni ink, Cu ink, Al, Ag, Ni, Zn, Zn, Ti, Ta, Au, Cu, and the like. It is done. In order to ensure electrical connection, the contact hole 26 is preferably filled with the constituent material of the extraction electrode 28.

The electrode foil electrode foil 10 only needs to include at least the metal foil 12, and known electrode foils described in Patent Documents 3 and 4 can be used and are not particularly limited. However, as shown in FIG. 1, the electrode foil 10 is provided directly on the metal foil 12, the reflection layer 14 provided on at least one surface of the metal foil as required, and on the metal foil 12 or the reflection layer 14 as required. The buffer layer 16 is preferably provided. That is, the electrode foil 10 shown in FIG. 1 has a three-layer configuration including the metal foil 12, the reflective layer 14, and the buffer layer 16, but the electrode foil of the present invention is not limited to this, and only the metal foil 12 is 1 A layer structure may be sufficient, and the two-layer structure of the metal foil 12 and the reflection layer 14 may be sufficient.

By using the metal foil 12 as an electrode as well as a support substrate, an electrode foil having the functions of a support substrate, an electrode, and a reflective layer can be provided. In addition, by using a metal foil 12 of typically 1 to 250 μm instead of a metal plate, it can be used as an electrode that also serves as a support substrate for a flexible organic semiconductor device. Regarding the manufacture of such a flexible organic semiconductor device, since the electrode foil 10 is based on a metal foil, it can be efficiently manufactured by, for example, a roll-to-roll process without particularly requiring a supporting substrate. Can do. The roll-to-roll process is an extremely advantageous process for efficiently mass-producing electronic devices in which a long foil wound in a roll shape is drawn out and subjected to a predetermined process and then wound up again. This is a key process for realizing mass production of organic semiconductor devices. Thus, the electrode foil 10 can eliminate the support base material and the reflective layer. For this reason, it is preferable that the electrode foil 10 does not have an insulating layer at least in a part where an electronic device is constructed, and more preferably does not have an insulating layer in any part.

The metal foil 12 is not particularly limited as long as it is a foil-like metal material having strength as a supporting substrate and electrical characteristics necessary as an electrode. A preferred metal foil is a nonmagnetic metal foil from the viewpoint of preventing adhesion of particulate matter generated during processing due to magnetism. Preferred examples of the nonmagnetic metal include copper, aluminum, nonmagnetic stainless steel, titanium, tantalum, and molybdenum, and more preferred are copper, aluminum, and nonmagnetic stainless steel. The most preferred metal foil is a copper foil. Copper foil is excellent in strength, flexibility, electrical characteristics and the like while being relatively inexpensive.

The outermost surface on the reflective layer side of the electrode foil 10 is preferably an ultra-flat surface having an arithmetic average roughness Ra of 60.0 nm or less, more preferably 30.0 nm or less, still more preferably 20.0 nm or less, particularly The thickness is preferably 10.0 nm or less, more preferably 7.0 nm or less, and the roughness may be appropriately determined according to the application and performance required for the electrode foil. The lower limit of the arithmetic average roughness Ra is not particularly limited and may be zero. However, in consideration of the efficiency of the flattening process, 0.5 nm is cited as a guideline for the lower limit value. This arithmetic average roughness Ra can be measured using a commercially available roughness measuring device in accordance with JIS B 0601-2001.

As described above, the outermost surface on the reflective layer side of the electrode foil 10 means the surface of the reflective layer 14 or the buffer layer 16 located on the outermost side. However, in the case of such a multi-layer configuration, the arithmetic average roughness Ra is realized by setting the arithmetic average roughness Ra of the surface of the metal foil 12 on which the reflective layer 14 and the buffer layer 16 are formed as the case may be. The same range, that is, 60.0 nm or less, preferably 30.0 nm or less, more preferably 20.0 nm or less, further preferably 10.0 nm or less, particularly preferably 7.0 nm or less, and most preferably 5.0 nm or less. In addition, the reflection layer 14 and optionally the buffer layer 16 may be formed thereon. As described above, it is preferable that an arithmetic average roughness Ra that is equal to or slightly smaller than the arithmetic average roughness Ra to be applied on the outermost surface is provided on the surface of the lower layer or foil. The arithmetic average roughness Ra of the surface of the metal foil that does not constitute the outermost surface due to the laminated state is evaluated by creating a cross section from the surface of the metal foil by FIB (Focused Ion Beam) processing, and using the transmission electron microscope ( TEM), and the arithmetic average roughness Ra of the reflective layer surface that does not constitute the outermost surface due to the laminated state can be evaluated in the same manner.

The ultra-flat surface of the metal foil 12 can also be realized by polishing the metal foil 12 using an electrolytic polishing method, a buff polishing method, a chemical polishing method, a physicochemical polishing method, or a combination thereof. The chemical polishing method is not particularly limited as long as the chemical solution, the chemical solution temperature, the chemical solution immersion time, etc. are appropriately adjusted. For example, the chemical polishing of copper foil uses a mixture of 2-aminoethanol and ammonium chloride. Can be performed. The temperature of the chemical solution is preferably room temperature, and it is preferable to use an immersion method (Dip method). Further, since the chemical solution immersion time tends to deteriorate the flatness as it becomes longer, it is preferably 10 to 120 seconds, and more preferably 30 to 90 seconds. The metal foil after chemical polishing is preferably washed with running water. According to such a flattening process, a surface having an arithmetic average roughness Ra of about 12 nm can be flattened to a Ra of 10.0 nm or less, for example, about 3.0 nm. The ultra-flat surface of the metal foil 12 can be realized by a method of polishing the surface of the metal foil 12 by blasting, a method of rapidly cooling the surface of the metal foil 12 after being melted by a technique such as laser, resistance heating, or lamp heating. You can also

The thickness of the metal foil 12 is not particularly limited as long as it is a thickness that can be handled alone as a foil without impairing flexibility, but is typically 1 to 250 μm, preferably 5 to 200 μm, more The thickness is preferably 10 to 150 μm, more preferably 15 to 100 μm, but the thickness may be appropriately determined according to the application and performance required for the electrode foil. Therefore, the upper limit of the thickness is particularly preferably 50 μm, 35 μm, or 25 μm when reduction of the amount of metal used or weight reduction is desired, while the lower limit of the thickness is 25 μm when strength is more desired. , 35 μm or 50 μm is particularly preferable. With such a thickness, it is possible to easily cut using a commercially available cutting machine. In addition, unlike the glass substrate, the metal foil 12 has no problems such as cracking and chipping, and has advantages such as less generation of particles during cutting. The metal foil 12 can have various shapes other than a quadrangle, for example, a circle, a triangle, a polygon, and can be cut and welded. It is also possible to manufacture an electronic device. In this case, it is preferable not to form the organic semiconductor layer at the cut portion or welded portion of the metal foil 12.

A reflective layer 14 may be provided on the surface of the metal foil 12. The reflective layer 14 is preferably composed of at least one selected from the group consisting of aluminum, aluminum-based alloys, silver, and silver-based alloys. These materials are suitable for the reflective layer because of their high light reflectivity, and also have excellent flatness when thinned. In particular, aluminum or an aluminum-based alloy is preferable because it is an inexpensive material. As an aluminum alloy and a silver alloy, those having a general alloy composition used as an anode or a cathode in a light emitting element or a photoelectric element can be widely used. Examples of preferable aluminum-based alloy compositions include Al—Ni, Al—Cu, Al—Ag, Al—Ce, Al—Zn, Al—B, Al—Ta, Al—Nd, Al—Si, Al—La, Examples include Al—Co, Al—Ge, Al—Fe, Al—Li, Al—Mg, Al—Mn, and Al—Ti alloys. Any element constituting these alloys can be arbitrarily combined according to the required characteristics. Examples of preferable silver alloy compositions include Ag—Pd, Ag—Cu, Ag—Al, Ag—Zn, Ag—Mg, Ag—Mn, Ag—Cr, Ag—Ti, Ag—Ta, and Ag—Co. , Ag—Si, Ag—Ge, Ag—Li, Ag—B, Ag—Pt, Ag—Fe, Ag—Nd, Ag—La, and Ag—Ce alloy. Any element constituting these alloys can be arbitrarily combined according to the required characteristics. The thickness of the reflective layer 14 is not particularly limited, but preferably has a thickness of 30 to 500 nm, more preferably 50 to 300 nm, and still more preferably 100 to 250 nm.

A buffer layer 16 may be provided on the surface of the metal foil 12 or the reflective layer 14. The buffer layer 16 is not particularly limited as long as it provides a desired work function in contact with the organic semiconductor layer. The buffer layer 16 is preferably transparent or translucent in order to ensure a sufficient light scattering effect. The buffer layer 16 is preferably at least one selected from a conductive amorphous carbon film, a conductive oxide film, a magnesium-based alloy film, and a fluoride film. What is necessary is just to select suitably according to a characteristic.

The thickness of the electrode foil 10 is preferably 1 to 300 μm, more preferably 1 to 250 μm, still more preferably 5 to 200 μm, particularly preferably 10 to 150 μm, and most preferably 15 to 100 μm. What is necessary is just to determine thickness suitably according to the use, performance, etc. which are calculated | required by foil. Therefore, the upper limit of the thickness is particularly preferably 50 μm, 35 μm, or 25 μm when reduction of the amount of metal used or weight reduction is desired, while the lower limit of the thickness is 25 μm when strength is more desired. , 35 μm or 50 μm is particularly preferable. The thicknesses of these electrode foils are all the same as the thickness of the metal foil 12 described above, but this is usually the thickness of the reflective layer 14 and / or the buffer layer 16 that may be formed on the metal foil 12. This is because the thickness of the metal foil 12 is small enough to be ignored.

The back surface of the electrode foil 10 or the metal foil 12 (the surface on which the organic semiconductor layer 18 is not formed) is measured with respect to a rectangular area of 181 μm × 136 μm in accordance with JIS B 0601-2001. It is desirable that the surface has a recess-dominant surface where the Pv / Pp ratio of the maximum valley depth Pv of the cross-sectional curve with respect to the depth Pp is a predetermined value or more. The maximum peak height Pp represents the height of the convex portion, while the maximum valley depth Pv represents the depth of the concave portion. Therefore, a Pv / Pp ratio equal to or greater than a predetermined value means a specific surface profile having a concave portion preferentially over a convex portion. Specifically, the Pv / Pp ratio of the concave dominant surface is preferably 1.10 or more, more preferably 1.20 or more, more preferably 1.30 or more, and further preferably 1.40 or more. . As a result, it is possible to reduce dark spots that may be problematic when a light emitting element such as an organic EL is used. That is, the surface of the electrode foil 10 or the metal foil 12 (the surface on the side where the organic semiconductor layer 18 is formed) has a deep scratch, particularly a scratch (a deep scratch, not a shallow scratch, for example, a depth of 0. When there is a scratch of 1 μm or more, a protrusion may be generated around the scratch due to the generation of the scratch, and the protrusion is a portion where light emission called a dark spot is deteriorated in a light emitting element such as an organic EL. May occur. In this respect, when the Pv / Pp ratio of the recess-dominant surface is 1.10 or more, the occurrence of the above-mentioned blemishes on the foil surface drawn out from the roll state is significantly suppressed, and thereby dark spots are significantly reduced. High-performance light-emitting elements can be provided. A concave dominant surface with a Pv / Pp ratio of 1.10 or more can be conveniently realized by setting the back surface processing conditions of the metal foil to a level at which gloss occurs on the back surface according to the initial back surface roughness. it can. The Pv / Pp ratio is preferably as high as possible and is not particularly limited. However, the upper limit value is practically around 10.0. The maximum peak height Pp and the maximum valley depth Pv can be measured in accordance with JIS B 0601-2001 using a commercially available non-contact surface shape measuring machine. In this embodiment, Ra on the foil back surface (recess dominant surface) is preferably 80 nm or less, more preferably 70 nm or less, further preferably 60 nm or less, particularly preferably 50 nm or less, and particularly preferably 40 nm or less. Yes, most preferably 30 nm or less.

The present invention will be described more specifically with reference to the following examples.

Example 1 Production of Cu / Al Alloy / C Electrode Foil An electrode foil composed of 50 mm square Cu foil / Al reflective film / C buffer layer was produced as follows. As a metal foil, a commercially available double-sided flat electrolytic copper foil having a thickness of 64 μm (DFF (Dual Flat Foil) manufactured by Mitsui Mining & Smelting Co., Ltd.) was prepared. ) Was measured according to JIS B 0601-2001, and the arithmetic average roughness Ra was 12.20 nm, and this measurement was performed in a taping mode AFM in the range of 10 μm square.

This copper foil was subjected to a CMP treatment using a polishing machine manufactured by MTT. This CMP treatment was performed using a polishing pad with XY grooves and a colloidal silica-based polishing liquid under the conditions of pad rotation speed: 30 rpm, load: 200 gf / cm ² , and liquid supply amount: 100 cc / min. The roughness of the copper foil surface thus treated with CMP was measured in accordance with JIS B 0601-2001 using a scanning probe microscope (Veeco, Nano Scope V). The arithmetic average roughness Ra was 0.7 nm. Met. This measurement was performed in a taping mode AFM for a 10 μm square range. The thickness of the copper foil after the CMP treatment was 48 μm.

A 150 nm-thick Al alloy reflective layer was formed on the surface of the CMP-treated copper foil by sputtering. This sputtering is performed by a magnetron sputtering apparatus (MSL-) in which an aluminum alloy target (diameter 203.2 mm × 8 mm thickness) having a composition of Al-0.2B-3.2Ni (at.%) Is connected to a Cryo pump. 464, manufactured by Tokki Co., Ltd.), input power (DC): 1000 W (3.1 W / cm ² ), ultimate vacuum: <5 × 10 ⁻⁵ Pa, sputtering pressure: 0.5 Pa, Ar flow rate: The measurement was performed under the conditions of 100 sccm and substrate temperature: room temperature.

A carbon buffer layer having a film thickness of 3.5 nm was formed on the surface of the aluminum alloy reflective layer thus obtained by sputtering. As a carbon target for sputtering, a carbon target having a purity of 5N (99.999%) prepared by subjecting a carbon material (IGS743 material, manufactured by Tokai Carbon Co., Ltd.) to a purification treatment with a halogen gas was prepared. A carbon buffer layer was formed by sputtering using each of these targets. In this sputtering, each carbon target (diameter 203.2 mm × 8 mm thickness) was mounted on a magnetron sputtering apparatus (multi-chamber single-wafer type film forming apparatus MSL-464, manufactured by Tokki Co., Ltd.) connected to a cryo pump. Input power (DC): 250 W (0.8 W / cm ² ), ultimate vacuum: <5 × 10 ⁻⁵ Pa, sputtering pressure: 0.5 Pa, Ar flow rate: 100 sccm, substrate temperature: room temperature. The film thickness was controlled by controlling the discharge time. When the roughness of the surface of the buffer layer thus obtained was measured in the same manner as described above, the arithmetic average roughness Ra was 2.45 nm. The total thickness of the obtained electrode foil was 48 μm.

Example 2 Production of Organic EL Element An organic EL element having a structure as shown in FIG. 2 was prepared using the electrode foil made of 50 mm square Cu foil / Al reflective film / C buffer layer produced in Example 1 as an anode. Produced. Specifically, a 1.3% by mass PEDOT: PSS dispersion solution (manufactured by Heraeus) was spin coated at 5000 rpm on the surface of the buffer layer of the electrode foil 10 to form a 30 nm thick film as a hole injection layer. Thereafter, the area from the end of the electrode foil 10 to about 1 cm inside is wiped off with a dust-free cloth soaked with pure water to define a 30 mm square area coated with PEDOT: PPS, and then on the hot plate. The hole injection layer was obtained by baking at 120 ° C. for 20 minutes. Next, using a metal mask having the same size as the hole injection layer (30 mm square), 4,4′-bis (N, N ′-(3-tolyl) amino) -3,3 is formed on the hole injection layer. A 40 nm thick hole transport layer made of '-dimethylbiphenyl (HMTPD), a 30 nm thick light emitting layer in which tris (2-phenylpyridine) iridium complex (Ir (ppy) ₃ ) is doped in the host material, An electron transport layer made of Alq3 and having a thickness of 30 nm was sequentially laminated by a vacuum deposition method.

A LiF layer (thickness 0.8 nm) / Al layer (thickness 0. 5 mm) is formed on the 30 mm square organic semiconductor layer 18 formed in this manner using a metal mask having a 25 mm square opening having a smaller area. An upper electrode layer 20 having a laminated structure of 8 nm) / Ag layer (thickness 20 nm) was produced. At this time, the outer edge of the upper electrode layer 20 was positioned inside the outer edge of the organic semiconductor layer 18. Using an auxiliary wiring mask, as shown in FIG. 2, Al was deposited in the vicinity of the four sides constituting the outer edge of the upper electrode layer 20 to form an auxiliary wiring 22 ′ having a thickness of 0.5 μm. Thus, the PEN film in which the surface on which the upper electrode layer 20 and the auxiliary wiring 22 ′ are provided is coated with the SiNx layer (thickness 300 nm), the adhesive layer (thickness 2000 nm), and the SiNx layer (thickness 200 nm) by CVD. Sealing was performed with a sealing layer 24 (thickness: 200 μm). A carbon dioxide laser was irradiated from above the PEN film of the sealing layer 24 at a position where the auxiliary wiring 22 'was formed, thereby forming a contact hole 26 having a diameter of 1.0 mm reaching the auxiliary wiring 22'. An extraction electrode 28 was formed with silver paste ink so as to extend in and from the contact hole 26, and left at room temperature to evaporate the solvent in the paste. Thus, an organic EL element was formed. When the obtained organic EL element was operated, no leak current was generated, and uniform light emission was observed over the entire pixel region.

Claims

An electrode foil comprising at least a metal foil;
An organic semiconductor layer partially provided on the surface of the electrode foil;
An upper electrode layer provided on the organic semiconductor layer;
A sealing layer provided on the electrode foil, the organic semiconductor layer, and the upper electrode layer, and covering an exposed portion of the electrode foil, the organic semiconductor layer, and the upper electrode layer;
At least one contact hole provided to penetrate the sealing layer and enabling electrical connection with the upper electrode layer;
An organic semiconductor device comprising:
The electrode foil has a region where the organic semiconductor layer is not formed along an outer edge of the organic semiconductor layer, and the sealing layer is bonded to the electrode foil in the region where the organic semiconductor layer is not formed. Item 10. The organic semiconductor device according to Item 1.
The organic semiconductor device according to claim 1 or 2, wherein the organic semiconductor layer and the upper electrode layer are provided in parallel to the electrode foil over the entire surface thereof.
The organic semiconductor layer has a region where the upper electrode layer is not formed along an outer edge of the upper electrode layer, and the sealing layer is bonded to the organic semiconductor layer in the region where the upper electrode layer is not formed The organic semiconductor device according to any one of claims 1 to 3.
The organic semiconductor device according to any one of claims 1 to 4, further comprising at least one auxiliary wiring provided directly on the upper electrode layer.
The organic semiconductor device according to claim 5, wherein the contact hole is disposed on the auxiliary wiring.
The organic semiconductor device according to claim 5 or 6, wherein the auxiliary wiring is provided on at least a part of the outer edge of the upper electrode layer and / or the vicinity thereof on the upper electrode layer.
The auxiliary wiring extends to the vicinity of the outer edge of the upper electrode layer on the organic semiconductor layer, whereby at least part of the boundary line between the organic semiconductor layer and the upper electrode layer is covered with the auxiliary wiring. The organic-semiconductor device of Claim 7.
The organic semiconductor device according to claim 7 or 8, wherein the upper electrode layer is formed in a rectangular shape, and the auxiliary wiring constitutes at least one side of the outer edge of the rectangular upper electrode layer and / or the vicinity thereof. .
The organic semiconductor device according to any one of claims 1 to 9, wherein a plurality of the organic semiconductor layers are arranged on the electrode foil, and the organic semiconductor layers are separated from each other.
The organic semiconductor device according to any one of claims 1 to 10, wherein the metal foil has a thickness of 1 to 250 µm.
The electrode foil or the back surface of the electrode foil is measured with respect to a rectangular area of 181 μm × 136 μm according to JIS B 0601-2001, Pv of the maximum valley depth Pv of the cross-sectional curve with respect to the maximum peak height Pp of the cross-sectional curve The organic semiconductor device according to any one of claims 1 to 11, which has a / Pp ratio of 1.10 or more.
The organic semiconductor device according to any one of claims 1 to 12, wherein the surface of the electrode foil has an arithmetic average roughness Ra of 60.0 nm or less as measured in accordance with JIS B 0601-2001.
The organic semiconductor device according to any one of claims 1 to 13, wherein the metal foil is a copper foil.
The organic semiconductor device according to any one of claims 1 to 14, wherein the electrode foil further comprises a reflective layer on the metal foil.
The organic semiconductor device according to any one of claims 1 to 14, wherein the electrode foil further comprises a transparent or translucent buffer layer on the metal foil.
The organic semiconductor device according to claim 15, wherein the electrode foil further includes a transparent or translucent buffer layer on the reflective layer.
The organic semiconductor device according to any one of claims 1 to 17, wherein the organic semiconductor layer has a function of excitation light emission or photoexcitation power generation, whereby the organic semiconductor device functions as a light emitting element or a photoelectric element.
The organic semiconductor device according to any one of claims 1 to 18, which has flexibility.