WO2014203829A1 - Transparent conductive film composition, transparent electrode, semiconductor light-emitting element, solar cell - Google Patents

Abstract

Provided is a transparent conductive film that has excellent short wavelength light transmissivity without using In. This transparent conductive film composition is characterized by being represented by formula (1) below. Al_xGa_yB_zM_1-x-y-zN (Formula 1) Herein, 0 < x < 1, 0 < y < 1, 0 ≦ z < 1, 0.001 ≦ 1-x-y-z ≦ 0.1, and M includes any one or more of Si and Ge.

Description

Composition for transparent conductive film, transparent electrode, semiconductor light emitting device, solar cell

The present invention relates to a composition for a transparent conductive film mainly containing Al and Ga, a transparent electrode comprising the composition, a semiconductor light emitting device, and a solar cell.

A light-transmitting conductive material (hereinafter referred to as “transparent conductive film”) is excellent in conductivity and light transmittance, and is therefore used as a transparent electrode in various devices. Conventionally, as such a transparent conductive film, tin oxide (SnO ₂ ) containing antimony (Sb) or fluorine (F) as a dopant, zinc oxide (ZnO) containing aluminum (Al) or gallium (Ga) as a dopant, And oxides such as indium oxide (In ₂ O ₃ ) containing Sn as a dopant are known. Among them, an indium oxide film containing Sn as a dopant is called an ITO (Indium-Tin-Oxide) film, and is widely used because a low-resistance oxide transparent conductive film can be easily obtained (for example, Patent Document 1).

In general, a direct current sputtering method is used to form the ITO film. An ITO film formed at room temperature exhibits a low specific resistance of about 5 × 10 ⁻⁴ Ω · cm. The ITO film has good light transmittance in the visible region, and exhibits an average light transmittance of 80% or more. Moreover, it is excellent in chemical and thermal stability.

By the way, in recent years, for example, light emitting materials and light emitting devices (for example, LEDs, lasers, organic or inorganic EL) having functions of blue light emission and near ultraviolet light emission (for example, wavelength 300 to 400 nm) have become widespread and are being developed. These electronic devices require transparent electrodes.

JP 2007-1113026 A

However, conventional transparent oxide conductive films such as ITO films have excellent average transmittance in the visible light range of 400 to 800 nm, but near ultraviolet light having a wavelength of around 400 nm or near ultraviolet light having a shorter wavelength. Absorption occurs with respect to light and deep ultraviolet light, and thus cannot be sufficiently transmitted. Therefore, when a conventional oxide transparent conductive film is used as an electrode of a device that emits light of such a wavelength, light absorption occurs at this electrode, and the light extraction efficiency is greatly reduced.

Another problem is that ITO, which is a rare metal, is required for the ITO film, but the price of In is rising and the supply is unstable due to the influence of social conditions in resource-rich countries. . Therefore, there is a possibility that a transparent conductive film not using In will be required in the future.

In view of the above problems, an object of the present invention is to realize a transparent conductive film excellent in light transmittance at a short wavelength without using In. Moreover, an object of this invention is to implement | achieve the transparent electrode, semiconductor light-emitting device, and solar cell containing such a transparent conductive film.

The composition for transparent conductive films of the present invention is represented by the following formula (1).
Al _x Ga _y B _z M _1-xyz N (formula 1)
However, in the formula, 0 <x <1, 0 <y <1, 0 ≦ z <1, 0.001 ≦ 1-xyz ≦ 0.1, and M is either Si or Ge Including one or more.

According to the composition for a transparent conductive film, a transparent conductive film having a small specific resistance, that is, a high conductivity can be realized without containing In. In addition, as will be described later in the “Mode for Carrying Out the Invention” section, the absorption edge can be set in the near ultraviolet region or the deep ultraviolet region depending on the composition ratio of Al. Thus, high transparency can be secured even for short-wavelength light such as near ultraviolet light and deep ultraviolet light. Moreover, since the transmittance | permeability exceeding 90% can be implement | achieved also about the transmittance | permeability with respect to visible light, the high transmittance | permeability can be ensured compared with the case where an ITO film | membrane is used.

Even if boron (B) is not contained or contained to a certain extent, according to the transparent conductive film made of the composition for transparent conductive film, high translucency and conductivity can be realized in an In-free manner. .

In the above composition for transparent conductive film, the composition ratio of Si or Ge may be 0.005 or more and 0.05 or less. By setting the composition ratio within this range, extremely high conductivity can be realized.

The transparent electrode of the present invention is characterized by comprising the above composition for transparent conductive film.

Further, the semiconductor light emitting device of the present invention is characterized by comprising the above transparent electrode. Thereby, it can function as an electrode for supplying current while suppressing absorption of light emitted from the light emitting element.

The semiconductor light-emitting device of the present invention comprises the above-described composition for a transparent conductive film, and is characterized by being configured as a light-emitting device having a short wavelength of 400 nm or less. As the specific configuration, various configurations are assumed.

As an example, the semiconductor light emitting device of the present invention has a light emitting layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer,
A transparent electrode formed on the p-type nitride semiconductor layer, the transparent electrode comprising the transparent conductive film composition;
A reflective electrode formed on an upper layer of the transparent electrode;
The light emitting layer may be composed of a nitride semiconductor layer having an emission peak wavelength of 400 nm or less.

As another example, the semiconductor light emitting device of the present invention has a light emitting layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer,
A transparent electrode formed on the entire upper surface of the n-type nitride semiconductor layer, the transparent electrode comprising the composition for transparent conductive film,
A power supply terminal formed on the upper layer of the transparent electrode,
The light emitting layer can be formed of a nitride semiconductor layer having an emission peak wavelength of 400 nm or less.

By forming a transparent electrode including the composition for transparent conductive film, a transparent electrode having a small specific resistance can be realized. As a result, ohmic connection is realized even if an In-free transparent electrode is formed on the p-type nitride semiconductor layer or the n-type nitride semiconductor layer, so that light-emitting elements in which absorption of light of short wavelengths is suppressed Can be realized.

As another example, the semiconductor light emitting device of the present invention has a light emitting layer between an n-type nitride semiconductor layer and a p-type nitride semiconductor layer, and the n-type nitride semiconductor layer is the transparent conductive film. The composition for use can be constituted.

According to this configuration, since the n-type nitride semiconductor layer is configured by including the composition for the transparent conductive film, the n-type nitride semiconductor layer can be realized with a low specific resistance value, and can emit light even at a low operating voltage. A necessary amount of current can be passed through the light emitting layer, and the light emission efficiency can be improved. Further, even if the upper surface of the n-type nitride semiconductor layer is formed of an electrode made of a metal material (for example, Ni) having a relatively large work function, ohmic connection can be realized by non-annealing. This eliminates the need for annealing at a temperature exceeding the melting point of the solder even in a vertical semiconductor light emitting element that requires a substrate bonding process via solder such as an Au—Sn alloy in the manufacturing process.

According to the composition for transparent conductive film of the present invention, it is possible to realize a transparent conductive film particularly excellent in light transmittance at a short wavelength without using In.

Is a graph showing the _{Al X Ga y Si 1-x} -y N Si composition ratio of the specific resistance relationship. Is a graph showing the relationship between the _{Al x Ga y Si 1-x} -y N of the Al composition ratio and the absorption edge. It is a schematic sectional drawing of the semiconductor light-emitting device of 1st Embodiment. It is a schematic sectional drawing of the conventional semiconductor light-emitting device. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 1st Embodiment. It is a schematic sectional drawing of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a part of process sectional drawing for demonstrating the manufacturing method of the semiconductor light-emitting device of 2nd Embodiment. It is a schematic sectional drawing of the semiconductor light-emitting device of 3rd Embodiment. Is a diagram for explaining ohmic characteristics between the nitride semiconductor layer and the _{Al x Ga y Si 1-x} -y N layer. It is sectional drawing which shows the typical structure of a photovoltaic cell.

[Composition for transparent conductive film]
FIG. 1 is a graph showing the relationship between the Si composition ratio and the specific resistance of Al _X Ga _y Si _1-xy N (0 <x <1, 0 <y <1). The specific resistance was measured while changing the composition ratio of Si by fixing the Al composition to 6% and 40% and adjusting the ratio of Ga and Si. The specific resistance is measured using a Hall measuring device.

According to FIG. 1, in Al _0.06 Ga _y Si _0.94-y N, when the Si composition is 0.16%, that is, Al _0.06 Ga _0.9384 Si _0.0016 N, it is substantially omitted. It is 1 × 10 ⁻³ Ω · cm, and it can be seen that the specific resistance decreases as the Si composition ratio increases. For example, when the Si composition is 0.5%, that is, Al _0.06 Ga _0.935 Si _0.005 N, the specific resistance is 4 × 10 ⁻⁴ Ω · cm, the Si composition is 5%, That is, when Al _0.06 Ga _0.89 Si _0.05 N is used, the specific resistance is 6 × 10 ⁻⁵ Ω · cm.

By the way, GaN generally used as a nitride semiconductor material is also doped with Si at a high concentration in order to reduce its specific resistance. However, it is known that when the concentration of dopant implanted into GaN is 1 × 10 ¹⁹ / cm ³ or more, film roughness occurs due to the deterioration of the state of atomic bonds. (See, for example, Non-Patent Document 1 above). Due to the deterioration of the crystal state caused by the film roughness, even if Si is doped at an extremely high concentration, the specific resistance is not sufficiently lowered, and the surface becomes rough and clouded.

For GaN, when the Si doping concentration is 9 × 10 ¹⁸ / cm ^{3, which} is almost in the vicinity of 1 × 10 ¹⁹ / cm ³ , which is the upper limit value that does not cause film roughness, the specific resistance is 5 × 10 ⁻³ Ω · cm. That is, it can be said that the specific resistance of about 5 × 10 ⁻³ Ω · cm is the lower limit value in Ga _y Si _1-y N formed by doping Si with GaN.

On the other hand, as shown in FIG. 1, when Al _0.06 Ga _y Si _0.94-y N is used, the Si composition is changed from 0.16% (Si composition ratio 0.0016) to 10% (Si composition ratio). It can be seen that even when the voltage is increased to 0.1), a specific resistance lower than that of Ga _y Si _1-y N can be realized.

In FIG. 1, the Al composition is fixed at 40% and the Si composition is 0.5% and 5%, that is, Al _0.4 Ga _0.595 Si _0.005 N and Al. The specific resistance in _0.4 Ga _0.55 Si _0.05 N is also shown. In Al _0.4 Ga _0.595 Si _0.005 N, the specific resistance is about 1 × 10 ⁻³ Ω · cm, and in Al _0.4 Ga _0.55 Si _0.05 N, the specific resistance is about 1.5. × 10 ⁻⁴ Ω · cm. As a result, even when the Al composition is varied, the specific resistance can be reduced by increasing the Si composition, and a specific resistance lower than that of Ga _y Si _1-y N can be realized. I understand that. That is, it is supported that the specific resistance value can be lowered by increasing the Si composition of Al _X Ga _y Si _1-xy N regardless of the Al composition.

In FIG. 1, when the Al composition is 6%, the specific resistance is 6.5 × when the Si composition is 10%, that is, Al _0.06 Ga _0.84 Si _0.1 N. 10 ⁻⁵ Ω · cm, and the resistivity is slightly higher than when the Si composition is 5%, that is, Al _0.06 Ga _0.89 Si _0.05 N. This is presumed to be caused by the same phenomenon that the crystallinity deteriorates and the specific resistance increases when the Si concentration in GaN is increased. That is, if the Si composition of Al _X Ga _y Si _1-xy N is further increased to more than 10%, the specific resistance is expected to increase further than Al _0.06 Ga _0.84 Si _0.1 N. .

Therefore, according to FIG. 1, the composition of at least Si is not less than 0.1% and not more than 10%, that is, Al _X Ga _y Si _1-xy N (0 <x <1, 0 <y <1, 0. If 001 ≦ 1-xy ≦ 0.1), it can be seen that an element having a specific resistance smaller than that of the conventional GaN can be realized. In particular, the composition of Si is 0.5% or more and 5% or less, that is, Al _X Ga _y Si _1-xy N (0 <x <1, 0 <y <1, 0.005 ≦ 1-xy ≦ 0.05), it can be seen that an element having a specific resistance much smaller than that of conventional GaN can be realized.

FIG. 2 is a graph showing the relationship between the Al composition ratio of Al _x Ga _y Si _1-xy N and the absorption edge. In FIG. 2, the absorption edge was obtained while changing the Al composition ratio by fixing the Si composition at 1% and adjusting the ratio of Al to Ga. The absorption edge is derived by calculation using the Vegard law.

FIG. 2 shows that the absorption edge can be shifted to the short wavelength side by increasing the Al composition ratio. For example, if the Al composition ratio is 0.06, the absorption edge is about 350 nm, and if the composition ratio is 0.4, the absorption edge is about 300 nm. That is, according to Al _x Ga _y Si _1-xy N, by adjusting the Al composition ratio according to the wavelength of light to be transmitted, a material in which absorption of light of a short wavelength is suppressed can be realized. . In addition, since the absorption edge has a wavelength far away from the visible light region, extremely high translucency can be achieved for light in the visible light region as compared with ITO or the like.

That is, according to FIGS. 1 and 2, the Al _x Ga _y Si _1-xy N of the present invention can realize a conductive material excellent in light transmittance at a short wavelength without using In. In FIG. 1, even when the Si composition is the same, Al ₀ whose Al composition is 40% than Al _0.06 Ga _y Si _0.94-yN whose Al composition is 6%. _.4 Ga _y Si _0.6-y N has a higher specific resistance value. This suggests that, when the Si ratio is constant, the absorption edge can be shifted to the short wavelength side by increasing the Al composition, while the specific resistance increases. However, according to Al _0.4 Ga _0.595 Si _0.005 N formed with an Al composition of 40% and an Si composition of 0.5%, the value is lower than the minimum value of the specific resistance of GaN. 1 × 10 ⁻³ Ω · cm, the absorption edge can be about 300 nm, and both high transparency to deep ultraviolet light and low specific resistance are compatible. In order to further reduce the specific resistance, the composition ratio of Si may be increased.

Although the above description has been made assuming a quaternary compound of Al _X Ga _y Si _1-xy N, impurities are mixed to such an extent that the specific resistance is not affected. This is true even when a compound of a system or higher is constituted. That is, the _{Al X Ga y Si 1-x} -y N boron respect (B) is formed by addition _{of, Al x Ga y B z Si} 1-x-y-z N (0 <x <1,0 <Y <1, 0 ≦ z <1, 0.001 ≦ 1-xyz ≦ 0.1) can also realize a specific resistance smaller than that of conventional GaN.

Furthermore, in the above description, the description has been made assuming Al _X Ga _y Si _1-xy N containing Si in the compound, but by using Ge instead of Si, which is chemically similar to Si, Similar discussion is possible even when Al _X Ga _y Ge _1-xy N is realized. That is, in this case, the specific resistance can be reduced by increasing the Ge composition ratio. Furthermore, a compound containing both Si and Ge may be used. In this case, it is considered that the specific resistance can be reduced by increasing the total composition ratio of both Si and Ge.

That is, the electrical conductivity σ and the resistivity ρ are expressed by σ = 1 / ρ = qnμ depending on the mobility μ, the carrier density n, and the carrier charge, and therefore, tetravalent with respect to the trivalent elements Al and Ga. By doping an element containing either Si or Ge among the elements, the mobility μ increases, so it is considered that the specific resistance 1 / ρ has decreased. Of the tetravalent elements, Si and Ge are preferable because of low activation energy as a donor, and Si is particularly preferable.

In summary, the composition of the present invention is Al _x Ga _y B _z M _1-xyz N (0 <x <1, 0 <y <1, 0 ≦ z <1, 0.001 ≦ 1- xyz = 0.1, and M includes at least one of Si and Ge), and without using In, a conductive material having excellent light transmittance at a short wavelength is realized. it can.

[Light emitting element]
The composition of the present invention described above Al _x Ga _y B _z M _1-xyz N (0 <x <1, 0 <y <1, 0 ≦ z <1, 0.001 ≦ 1-xy) An embodiment of a light-emitting element including -z ≦ 0.1 and M includes one or more of Si and Ge will be described with reference to the drawings. In the following, a layer composed of this composition is referred to as an “Al _X Ga _y Si _1-xy N layer”.

(First embodiment)
A first embodiment of a semiconductor light emitting device will be described with reference to the drawings. FIG. 3 is a schematic cross-sectional view of the semiconductor light emitting device of the first embodiment. In the following drawings, the dimensional ratios in the drawings do not necessarily match the actual dimensional ratios.

The semiconductor light emitting device 1 includes a support substrate 11, an undoped layer 13, a semiconductor layer 20, a transparent electrode 21, a transparent electrode 23, a power supply terminal 25, a power supply terminal 27, a reflective electrode 31, and a reflective electrode 33. The semiconductor layer 20 is formed by laminating an n-type nitride semiconductor layer 15, a light emitting layer 17, and a p-type nitride semiconductor layer 19 in this order from the bottom.

The transparent electrode 21 and the transparent electrode 23 are formed of an Al _x Ga _y Si _1-xy N layer. A power supply terminal 25 is formed on the transparent electrode 21 via a reflective electrode 31. Similarly, a power supply terminal 27 is formed above the transparent electrode 23 via a reflective electrode 33.

The semiconductor light emitting element 1 shown in FIG. 3 is an element assumed to extract light downward in the drawing. Of the light emitted from the light emitting layer 17, the light traveling upward is applied to the reflective electrode 33 through the transparent electrode 23, reflected from the reflective electrode 33, and emitted toward the support substrate 11. Here, under the influence of the difference in refractive index between the support substrate 11 and air realized by sapphire or the like, a part of the light is not emitted from the support substrate 11 to the outside, but is reflected at the interface thereof, and the inside of the semiconductor light emitting device 1 Repeat multiple reflection at. At this time, part of the light travels to the transparent electrode 21 side. Here, since the light transmitted through the transparent electrode 21 is irradiated to the reflective electrode 31, it can be reflected from the reflective electrode 31 and guided again to the support substrate 11 side.

FIG. 4 is a schematic cross-sectional view of a conventional semiconductor light emitting device. A conventional semiconductor light emitting device 90 includes contact electrodes 91 and 93 made of ITO. This is because when a reflective electrode 33 made of a highly reflective metal material is directly formed on the upper surface of the p-type nitride semiconductor layer 19, a good contact resistance is not formed, so that a degenerate semiconductor is used for the purpose of improving contact characteristics. In this case, ITO or Ni as a thin film contact electrode 93 is provided, and a reflective electrode 33 made of Ag or Al is further provided on the contact electrode 93. The same applies to the contact electrode 91.

However, ITO has an absorption edge near 365 nm, and Ni has an absorption edge on the longer wavelength side than ITO. Therefore, since the contact electrodes 91 and 93 made of ITO or Ni absorb short wavelength light, the light extraction efficiency of short wavelength is lowered. On the other hand, the semiconductor light emitting device 1 shown in FIG. 3 includes the transparent electrodes 21 and 23 formed of the Al _X Ga _y Si _1-xy N layer, thereby realizing a low specific resistance. However, since a material whose absorption edge is located on the shorter wavelength side than ITO or Ni can be used, the light extraction efficiency on the shorter wavelength side can be particularly improved.

Hereinafter, a detailed configuration of the semiconductor light emitting device 1 shown in FIG. 3 and a manufacturing method thereof will be described. The following description is merely an example.

The support substrate 11 is composed of a sapphire substrate. In addition to sapphire, Si, SiC, GaN, YAG, or the like may be used. The reflective electrode 31 and the reflective electrode 33 are made of, for example, an Ag-based metal, Al, Rh, or the like.

The undoped layer 13 is made of, for example, GaN. More specifically, it is formed of a low-temperature buffer layer made of GaN and an underlying layer made of GaN on the upper layer.

The transparent electrode 21 and the transparent electrode 23 are formed of an Al _x Ga _y Si _1-xy N layer. As shown in FIG. 3, the transparent electrode 21 and the transparent electrode 23 are arranged with a gap 5 in the horizontal direction. Thereby, the effect which suppresses that a leak current flows into the horizontal direction between the transparent electrode 23 and the transparent electrode 21 is acquired. The transparent electrode 23 is formed on the p-type nitride semiconductor layer 19, the p-type nitride semiconductor layer 19 is formed on the light emitting layer 17, and the light emitting layer 17 is n-type nitrided like the transparent electrode 21. It is formed in the upper layer of the physical semiconductor layer 15. Therefore, as shown in FIG. 3, the light emitting layer 17 and the transparent electrode 21 are formed in the upper layer of the n-type nitride semiconductor layer 15 with a gap 5 in the horizontal direction.

The feeding terminal 25 is formed in the upper layer of the reflective electrode 31, and the feeding terminal 27 is formed in the upper layer of the reflective electrode 33, and is made of, for example, Cr—Au. The power supply terminal 25 is electrically connected to the substrate 41 via the bonding metal 37, and the power supply terminal 27 is electrically connected to the substrate 41 via the bonding metal 39.

The semiconductor layer 20 is formed by laminating an n-type nitride semiconductor layer 15, a light emitting layer 17, and a p-type nitride semiconductor layer 19 in this order from the bottom.

The n-type nitride semiconductor layer 15 is made of GaN or AlGaN, and may have a multilayer structure thereof. For example, a layer (protective layer) composed of GaN is included in a region in contact with the undoped layer 13, and a layer composed of Al _n Ga _1-n N (0 <n ≦ 1) in a region in contact with the transparent electrode 21 ( A multilayer structure including an electron supply layer). At least the protective layer is doped with an n-type impurity such as Si, Ge, S, Se, Sn, or Te, and is preferably doped with Si.

The light emitting layer 17 is formed of a semiconductor layer having a multiple quantum well structure in which, for example, a well layer made of InGaN and a barrier layer made of AlGaN are repeated. These layers may be non-doped or p-type or n-type doped.

The p-type nitride semiconductor layer 19 is made of, for example, GaN or AlGaN, and is doped with p-type impurities such as Mg, Be, Zn, and C.

Next, an example of a method for manufacturing the semiconductor light emitting device 1 shown in FIG. 3 will be described with reference to the process cross-sectional views of FIGS. 5A to 5G.

(Step S1)
As shown in FIG. 5A, the semiconductor layer 20 is formed on the support substrate 11. In more detail, it is as follows.

<Preparation of support substrate 11>
First, when a sapphire substrate is used as the support substrate 11, the c-plane sapphire substrate is cleaned. More specifically, for this cleaning, for example, a c-plane sapphire substrate is placed in a processing furnace of a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and hydrogen gas with a flow rate of 10 slm is placed in the processing furnace. The temperature in the furnace is raised to, for example, 1150 ° C. while flowing.

<Formation of undoped layer 13>
Next, a low-temperature buffer layer made of GaN is formed on the surface of the support substrate 11 (c-plane sapphire substrate), and a base layer made of GaN is further formed thereon. These low-temperature buffer layer and underlayer correspond to the undoped layer 13.

For example, a more specific method of forming the undoped layer 13 is as follows. First, the furnace pressure of the МОCVD apparatus is 100 kPa, and the furnace temperature is 480 ° C. Then, while flowing nitrogen gas and hydrogen gas with a flow rate of 5 slm respectively as carrier gas into the processing furnace, trimethylgallium (TMG) with a flow rate of 50 μmol / min and ammonia with a flow rate of 250,000 μmol / min are used as the raw material gas in the processing furnace. For 68 seconds. Thereby, a low-temperature buffer layer made of GaN having a thickness of 20 nm is formed on the surface of the support substrate 11.

Next, the furnace temperature of the MOCVD apparatus is raised to 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas in the processing furnace, TMG having a flow rate of 100 μmol / min and ammonia having a flow rate of 250,000 μmol / min are introduced into the processing furnace as source gases. Feed for 30 minutes. As a result, a base layer made of GaN having a thickness of 1.7 μm is formed on the surface of the first buffer layer.

<Formation of n-type Nitride Semiconductor Layer 15>
Next, an electron supply layer having a composition of Al _n Ga _1-n N (0 <n ≦ 1) is formed on the undoped layer 13. This electron supply layer corresponds to the n-type nitride semiconductor layer 15.

A more specific method for forming the n-type nitride semiconductor layer 15 is, for example, as follows. Subsequently, the furnace pressure of the MOCVD apparatus is set to 30 kPa in a state where the furnace temperature is 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, Ammonia with a flow rate of 250,000 μmol / min and tetraethylsilane with a flow rate of 0.025 μmol / min are supplied into the treatment furnace for 60 minutes. Thereby, the n-type nitride semiconductor layer 15 (electron supply layer) having a composition of Al _0.06 Ga _0.94 N, a Si concentration of 3 × 10 ¹⁹ / cm ³ and a thickness of 2 μm is formed of the undoped layer 13. It is formed in the upper layer.

Thereafter, the supply of TMA is stopped, and another source gas is supplied for 6 seconds to form a protective layer made of n-type GaN having a thickness of 5 nm on the electron supply layer. .

In the above example, the case where Si is used as the n-type impurity has been described, but other impurities such as Ge, S, Se, Sn, and Te can be used.

<Formation of the light emitting layer 17>
Next, a light emitting layer 17 having a multiple quantum well structure in which a well layer made of InGaN and a barrier layer made of n-type AlGaN are periodically repeated is formed on the n-type nitride semiconductor layer 15.

For example, a more specific method for forming the light emitting layer 17 is as follows. First, the furnace pressure of the MOCVD apparatus is 100 kPa, and the furnace temperature is 830 ° C. Then, while flowing nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 1 slm as a carrier gas in the processing furnace, TMG having a flow rate of 10 μmol / min, trimethylindium (TMI) having a flow rate of 12 μmol / min, and A step of supplying ammonia at a flow rate of 300,000 μmol / min into the processing furnace for 48 seconds is performed. Thereafter, TMG having a flow rate of 10 μmol / min, TMA having a flow rate of 1.6 μmol / min, tetraethylsilane having a flow rate of 0.002 μmol / min, and ammonia having a flow rate of 300,000 μmol / min are supplied into the processing furnace for 120 seconds. Hereinafter, by repeating these two steps, the light-emitting layer 17 having a 15-cycle multiple quantum well structure composed of a well layer made of InGaN having a thickness of 2 nm and a barrier layer made of n-type AlGaN having a thickness of 7 nm is obtained as an n-type. It is formed on the upper surface of the nitride semiconductor layer 15.

<Formation of p-type nitride semiconductor layer 19>
Next, a hole supply layer having a composition of, for example, Al _m Ga _1-m N (0 ≦ m <1) is formed on the light emitting layer 17. This hole supply layer corresponds to the p-type nitride semiconductor layer 19.

A more specific method for forming the p-type nitride semiconductor layer 19 is, for example, as follows. First, the furnace pressure of the MOCVD apparatus is maintained at 100 kPa, and the furnace temperature is raised to 1025 ° C. while nitrogen gas having a flow rate of 15 slm and hydrogen gas having a flow rate of 25 slm are allowed to flow into the processing furnace. Thereafter, as source gases, TMG with a flow rate of 35 μmol / min, TMA with a flow rate of 20 μmol / min, ammonia with a flow rate of 250,000 μmol / min, and biscyclopentadiene with a flow rate of 0.1 μmol / min for doping p-type impurities. Enilmagnesium is fed into the processing furnace for 60 seconds. Thereby, a hole supply layer having a composition of Al _0.3 Ga _0.7 N having a thickness of 20 nm is formed on the surface of the light emitting layer 17. After that, by changing the flow rate of TMG to 9 μmol / min and supplying the source gas for 360 seconds, a hole supply layer having a composition of Al _0.13 Ga _0.87 N having a thickness of 120 nm is formed. A p-type nitride semiconductor layer 19 is formed by these hole supply layers.

Thereafter, the flow rate of biscyclopentadienyl magnesium is changed to 0.2 μmol / min and a source gas is supplied for 20 seconds to form a high-concentration layer (contact layer) made of p-type GaN having a thickness of 5 nm. .

In the above example, the case where Mg is used as the p-type impurity has been described. However, Be, Zn, C, or the like can be used as another impurity.

(Step S2)
Next, an activation process is performed on the wafer obtained in step S1. More specifically, activation is performed at 650 ° C. for 15 minutes in a nitrogen atmosphere using an RTA (Rapid Thermal Anneal) device.

(Step S3)
As shown in FIG. 5B, the p-type nitride semiconductor layer 19 and the light emitting layer 17 are removed by dry etching using an ICP device until a partial upper surface of the n-type nitride semiconductor layer 15 is exposed.

(Step S4)
As shown in FIG. 5C, a resist 35 is formed on the upper surface of the n-type nitride semiconductor layer 15 in the region where the reflective electrode is not formed.

(Step S5)
As shown in FIG. 5D, an Al _X Ga _y Si _1-xy N layer 26 is formed on the entire surface.

Specifically, the Al _0.1 Ga _0.89 Si _0.01 N layer 26 having a thickness of 50 nm is formed using reactive sputtering.

Thereafter, the resist and the Al _x Ga _y B _z M _1-xyz N layer 26 located immediately above the resist are removed by lift-off of the resist using a chemical such as acetone. As a result, as shown in FIG. 5E, the Al _x Ga _y B _z M _1-xyz N layer 26 is separated into two, and the transparent electrode 21 and the transparent electrode 23 are formed. At this time, a gap 5 in the horizontal direction is formed between the transparent electrode 21 and the transparent electrode 23.

(Step S6)
Using an electron beam evaporation apparatus (EB apparatus), a reflective electrode 31 made of Al or Ag is formed on the upper surface of the transparent electrode 21, and a reflective electrode 33 made of Al or Ag is formed on the upper surface of the transparent electrode 23, for example, with a film thickness of about 120 nm. Evaporate (see FIG. 5F).

(Step S7)
The power supply terminal 25 is formed on the upper surface of the reflective electrode 31, and the power supply terminal 27 is formed on the upper surface of the reflective electrode 33 by forming a material film made of Cr having a thickness of 100 nm and Au having a thickness of 3 μm (see FIG. 5G). Thereafter, the power supply terminal 25 and the support substrate 41 are connected by the bonding metal 37, and the power supply terminal 27 and the support substrate 41 are connected by the bonding metal 39. Thereby, the semiconductor light emitting device 1 shown in FIG. 3 is formed.

In the above example, the case where both the transparent electrode 23 formed on the upper surface of the p-type nitride semiconductor layer 19 and the transparent electrode 21 formed on the upper surface of the n-type nitride semiconductor layer 15 has been described. A configuration including only the transparent electrode 23 may be used.

(Second Embodiment)
A second embodiment of the semiconductor light emitting device will be described with reference to the drawings. In the following embodiments, portions that are the same as those in the first embodiment may be denoted by the same reference numerals and description thereof may be omitted.

FIG. 6 is a schematic cross-sectional view of the semiconductor light emitting device of the second embodiment. The semiconductor light emitting element 1 a includes a support substrate 12, a conductive layer 44, an insulating layer 48, a semiconductor layer 20, and a power supply terminal 42. The semiconductor layer 20 is formed by stacking a p-type nitride semiconductor layer 19, a light emitting layer 17, and an n-type nitride semiconductor layer 16 in this order from the bottom.

In the present embodiment, the n-type nitride semiconductor layer 16 is formed of an Al _x Ga _y Si _1-xy N layer. As described above, since the Al _X Ga _y Si _1-xy N layer can realize an extremely low specific resistance, the resistance value of the n layer can be lowered as compared with the light emitting element of the conventional configuration, and the operating voltage is low. Also, the amount of current required for light emission can be passed through the light emitting layer, and the light emission efficiency is improved.

Hereinafter, a detailed configuration of the semiconductor light emitting device 1 shown in FIG. 6 and a manufacturing method thereof will be described. The following description is merely an example.

The support substrate 12 is made of, for example, a conductive substrate such as CuW, W, or Mo, or a semiconductor substrate such as Si. A conductive layer 44 having a multilayer structure is formed on the support substrate 12. In the present embodiment, the conductive layer 44 includes a solder layer 43, a protective layer 45, and a reflective electrode 47.

The solder layer 43 is made of, for example, Au—Sn, Au—In, Au—Cu—Sn, Cu—Sn, Pd—Sn, Sn, or the like. The solder layer 43 is used when the sapphire substrate and the support substrate 12 are bonded as described later in the section of the manufacturing method.

The protective layer 45 is made of, for example, a Pt-based metal (an alloy of Ti and Pt), W, Mo, Ni, or the like. As will be described later, when two substrates are bonded to each other through a solder layer during the process, the material constituting the solder diffuses to the reflective electrode 47 side, which will be described later, and prevents a decrease in luminous efficiency due to a drop in reflectance. Plays a function.

The reflective electrode 47 is made of, for example, an Ag-based metal, Al, Rh, or the like. It is assumed that the semiconductor light emitting element 1a takes out the light emitted from the light emitting layer 17 in the upward direction of FIG. 6 (on the n-type nitride semiconductor layer 16 side), and the reflective electrode 47 faces downward from the light emitting layer 17. It has the function of increasing the light emission efficiency by reflecting the light emitted to the top upward.

The conductive layer 44 is partially in contact with the semiconductor layer 20, more specifically the p-type nitride semiconductor layer 19, and when a voltage is applied between the support substrate 12 and the power supply terminal 42, the support substrate 44 12, a current path that flows to the power supply terminal 42 through the conductive layer 44 and the semiconductor layer 20 is formed.

Insulating layer 48 is composed for example _{SiO 2, SiN, Zr 2 O} 3, AlN, etc. _Al 2 _{O 3.} The insulating layer 48 is in contact with the bottom surface of the p-type nitride semiconductor layer 19 at the top surface. As will be described later, the insulating layer 48 has a function as an etching stopper layer at the time of element isolation, and also has a function of spreading current in a direction parallel to the substrate surface of the support substrate 12.

The power supply terminal 42 is formed on the upper surface of the n-type nitride semiconductor layer 16 and is made of, for example, Cr—Au. The power supply terminal 42 is connected to a wire made of, for example, Au or Cu (not shown), and the other wire is connected to a power supply pattern on the substrate on which the semiconductor light emitting element 1a is disposed. (Not shown).

Next, a method for manufacturing the semiconductor light emitting device 1a shown in FIG. 6 will be described with reference to process cross-sectional views in FIGS. 7A to 7G.

(Step S11)
As shown in FIG. 7A, the semiconductor layer 20 is formed on the sapphire substrate 11. In more detail, it is as follows.

First, the undoped layer 13 is formed on the sapphire substrate 11 as in step S1 of the first embodiment. Thereafter, an n-type nitridation composed of an Al _X Ga _y Si _1-xy N layer is performed in the same manner as the Al _X Ga _y Si _1-xy N layer 26 is formed in step S5 of the first embodiment. The physical semiconductor layer 16 is formed.

More specifically, the furnace pressure of the MOCVD apparatus is set to 30 kPa in a state where the furnace temperature is 1150 ° C. Then, while flowing nitrogen gas having a flow rate of 20 slm and hydrogen gas having a flow rate of 15 slm as a carrier gas into the processing furnace, TMG having a flow rate of 94 μmol / min, trimethylaluminum (TMA) having a flow rate of 6 μmol / min, A step of supplying ammonia having a flow rate of 250,000 μmol / min and tetraethylsilane having a flow rate of 3.5 μmol / min into the processing furnace for 30 minutes is performed. As a result, an Al _0.1 Ga _0.89 Si _0.01 N n-type nitride semiconductor layer 16 having a thickness of 1000 nm is formed.

Thereafter, the light emitting layer 17 and the p-type nitride semiconductor layer 19 are formed by the same method as in the first embodiment.

(Step S12)
The activation process similar to step S2 of the first embodiment is performed.

(Step S13)
As shown in FIG. 7B, an insulating layer 48 is formed at a predetermined position on the p-type nitride semiconductor layer 19. More specifically, it is preferable to form the insulating layer 48 at a position located below a region where the power supply terminal 42 is formed in a later step. As the insulating layer 48, for example, SiO ₂ is formed to a thickness of about 200 nm. Note that the material for forming the film may be an insulating material, such as SiN or Al ₂ O ₃ .

(Step S14)
As shown in FIG. 7C, the conductive layer 44 is formed so as to cover the upper surfaces of the p-type nitride semiconductor layer 19 and the insulating layer 48. Here, the conductive layer 44 having a multilayer structure including the reflective electrode 47, the protective layer 45, and the solder layer 43 is formed.

For example, a more specific method for forming the conductive layer 44 is as follows. First, a reflective electrode 47 is formed by depositing 0.7 nm-thickness Ni and 120 nm-thickness Ag on the entire surface so as to cover the upper surfaces of the p-type nitride semiconductor layer 19 and the insulating layer 48 by a sputtering apparatus. To do. Next, contact annealing is performed at 400 ° C. for 2 minutes in a dry air atmosphere using an RTA apparatus.

Next, the protective layer 45 is formed by depositing 100 nm of Ti and 200 nm of Pt on the upper surface (Ag surface) of the reflective electrode 47 with an electron beam evaporation apparatus (EB apparatus) for three periods. . Further, after depositing Ti with a thickness of 10 nm on the upper surface (Pt surface) of the protective layer 45, Au-Sn solder composed of Au 80% Sn 20% is deposited with a thickness of 3 μm to form the solder layer 43. Form.

In the step of forming the solder layer 43, as shown in FIG. 7D, the solder layer 46 may be formed on the upper surface of the support substrate 12 prepared separately from the sapphire substrate 11. This solder layer may be made of the same material as the solder layer 43. For example, CuW is used as the support substrate 12 as described above.

(Step S15)
Next, as shown in FIG. 7E, the sapphire substrate 11 and the support substrate 12 are bonded together. More specifically, the solder layer 43 and the support substrate 12 are bonded together at a temperature of 280 ° C. and a pressure of 0.2 MPa.

(Step S16)
Next, as shown in FIG. 7F, the sapphire substrate 11 is peeled off. More specifically, the interface between the sapphire substrate 11 and the semiconductor layer 20 is decomposed by irradiating a KrF excimer laser from the sapphire substrate 11 side with the sapphire substrate 11 facing upward and the support substrate 12 facing downward. The sapphire substrate is peeled off. While sapphire passes through the laser, GaN (undoped layer) under the sapphire absorbs the laser, and this interface is heated to decompose GaN. As a result, the sapphire substrate 11 is peeled off.

Thereafter, GaN (undoped layer) remaining on the wafer is removed by wet etching using hydrochloric acid or the like, and dry etching using an ICP apparatus, and the n-type nitride semiconductor layer 16 is exposed.

(Step S17)
Next, as shown in FIG. 7G, adjacent elements are separated from each other. Specifically, the semiconductor layer 20 is etched using an ICP device until the upper surface of the insulating layer 48 is exposed to the boundary region with the adjacent element. Thereby, the semiconductor layers 20 in the adjacent regions are separated from each other. At this time, the insulating layer 48 functions as an etching stopper layer.

In this etching step, it is preferable that the side surface of the element is not vertical but is an inclined surface having a taper angle of 10 ° or more. By doing in this way, when forming an insulating layer in a later process, the insulating layer is easily attached to the side surface of the semiconductor layer 20, and current leakage can be prevented.

Further, after step S17, an uneven surface may be formed on the upper surface of the semiconductor layer 20 with an alkaline solution such as KOH. Thereby, the light extraction area can be increased and the light extraction efficiency can be improved.

(Step S18)
Next, the power supply terminal 42 is formed on the upper surface of the n-type nitride semiconductor layer 16. More specifically, the power supply terminal 42 made of Ni having a thickness of 10 nm and Au having a thickness of 10 nm is formed. As described above, since the n-type nitride semiconductor layer 16 is formed of an Al _x Ga _y Si _1-xy N layer having a small specific resistance, the annealing process is not performed after this step. An ohmic connection is formed between the n-type nitride semiconductor layer 16 and the power supply terminal 42. Thereby, the semiconductor light emitting element 1a shown in FIG. 6 is formed.

Although not shown in the semiconductor light emitting device 1a shown in FIG. 6, as a subsequent process, the exposed device side surface and the device upper surface other than the power supply terminal 42 may be covered with an insulating layer. More specifically, an SiO ₂ film is formed by an EB apparatus. An SiN film may be formed. Then, the elements are separated from each other by, for example, a laser dicing apparatus, the back surface of the support substrate 11 is joined to the package by, for example, Ag paste, and wire bonding is performed to the power supply terminal 42.

(Third embodiment)
A semiconductor light emitting device according to a third embodiment will be described with reference to the drawings. FIG. 8 is a schematic cross-sectional view of the semiconductor light emitting device of the third embodiment. The semiconductor light emitting element 1 b includes a support substrate 12, a conductive layer 44, an insulating layer 48, a semiconductor layer 20, a transparent electrode 24, and a power supply terminal 42. The semiconductor layer 20 is formed by stacking a p-type nitride semiconductor layer 19, a light emitting layer 17, and an n-type nitride semiconductor layer 15 in this order from the bottom.

In the present embodiment, a transparent electrode 24 formed of an Al _X Ga _y Si _1-xy N layer is provided on the upper surface of the n-type nitride semiconductor layer 15 having the same configuration as that of the first embodiment, and the upper surface thereof is provided. The power supply terminal 42 is formed. By providing such a transparent electrode 24, both high translucency and low specific resistance can be achieved. Thereby, even if it is formed on the entire upper surface of the n-type nitride semiconductor layer 15, the light extraction efficiency is not lowered, and the current path can be expanded in the horizontal direction on the substrate surface of the support substrate 12. A current can be passed through a wide area of the light emitting layer 17 to realize a wide light emitting area.

Further, as described above, since the Al _X Ga _y Si _1-xy N layer has a very small specific resistance, good ohmic characteristics can be realized between the n-type nitride semiconductor layer 15 and the transparent electrode 24. FIG. 9 is a diagram for explaining the ohmic property between the n-type nitride semiconductor layer 15 and the transparent electrode 24.

FIG. 9A is a diagram showing the configuration of the evaluation element. An undoped layer 13 and an n-type nitride semiconductor layer 15 are formed on the sapphire substrate 11, and 2 on the upper surface of the n-type nitride semiconductor layer 15. A transparent electrode 24 made of an Al _X Ga _y Si _1-xy N layer is formed at a location. FIG. 9B is a graph showing the current-voltage characteristics (IV characteristics) obtained by applying a prober to the transparent electrodes 24 at two locations and applying current to the evaluation element of FIG. 9A. It is a thing.

In FIG. 9B, an evaluation element (Example 1) in which the transparent electrode 24 is formed of Al _0.06 Ga _0.935 Si _0.005 N with a Si composition of 0.5%, and the Si composition IV characteristics were measured for the evaluation element (Example 2) in which the transparent electrode 24 was formed of Al _0.06 Ga _0.89 Si _0.05 N with 5% of Al. According to FIG. 9B, it can be seen that in both Example 1 and Example 2, the IV characteristic shows a linear shape, and good ohmic characteristics can be realized.

Regarding the detailed configuration of the present embodiment, the n-type nitride having the same configuration as that of the first embodiment is used instead of the n-type nitride semiconductor layer 16 formed by the Al _X Ga _y Si _1-xy N layer. The semiconductor light emitting device 1a of the second embodiment except that the semiconductor layer 15 is used, and that the transparent electrode 24 formed of an Al _X Ga _y Si _1-xy N layer is provided on the entire upper surface of the semiconductor layer 15. Because it is almost the same, I will omit the explanation.

As for the manufacturing method, after passing through the same method as steps S11 to S17 described in the second embodiment, Al _{X is formed on the} entire upper surface of the n-type nitride semiconductor layer 15 by the same method as in step S5 of the first embodiment. The transparent electrode 24 formed of the Ga _y Si _1-xy N layer is formed, and the power supply terminal 42 is formed on the upper surface of the transparent electrode 24 by the same method as Step S18 of the second embodiment. The subsequent steps are the same as in the second embodiment.

[Solar cell]
Composition of the Invention Al _x Ga _y B _z M _1-xyz N (0 <x <1, 0 <y <1, 0 ≦ z <1, 0.001 ≦ 1-xyz) An embodiment of a solar cell including ≦ 0.1 and M including one or more of Si and Ge will be described with reference to the drawings. In the following, a layer composed of this composition will be referred to as an “Al _X Ga _y Si _1-xy N layer”.

FIG. 10 is a cross-sectional view showing a schematic configuration of a solar battery cell. The solar cell 2 includes a glass substrate 71, a transparent electrode 29 formed of an Al _X Ga _y Si _1-xy N layer, a semiconductor layer 75, and a back electrode 76. In this embodiment, a pin diode type including p-type amorphous silicon 72, i-type amorphous silicon 73, and n-type amorphous silicon 74 is employed as the semiconductor layer 75.

Conventional solar cells used ITO as a transparent electrode. As shown in FIG. 10, by using the solar battery cell 2 including the transparent electrode 29 formed of an Al _X Ga _y Si _1-xy N layer, the visible light transmission efficiency can be improved as compared with ITO. Therefore, the amount of light that irradiates the semiconductor layer 75 with visible light incident through the glass substrate 71 is increased, and the power generation efficiency is improved.

When the solar battery cell 2 shown in FIG. 10 is manufactured, the transparent electrode 29 may be formed by depositing an Al _X Ga _y Si _1-xy N layer on the glass substrate 71 by a sputtering method. Thereafter, amorphous silicon is grown on the upper surface of the transparent electrode 29 to form the semiconductor layer 75, and then a back electrode 76 made of Al or the like is formed on the upper surface of the semiconductor layer 75 and patterned into a predetermined circuit pattern.

Moreover, the structure of the photovoltaic cell 2 shown in FIG. 10 is an example to the last. Regardless of the type of solar cell, the transparent electrode comprising the Al _x Ga _y Si _1-xy N layer of the present invention should be used where the ITO film has been conventionally used as the transparent conductive film. Therefore, power generation efficiency is expected to improve.

1, 1a, 1b: Semiconductor light emitting element 2: Solar battery cell 5: Gap 11: Support substrate (sapphire substrate)
12: support substrate 13: undoped layer 15: n-type nitride semiconductor layer 16: n-type nitride semiconductor layer formed of Al _x Ga _y B _z M _1-xyz N 17: light emitting layer 19: p type nitride semiconductor layer 20: semiconductor layer 21: in _{Al x Ga y B z M 1} -x-y-z N: Al x Ga y B z M 1-x-y-z N the formed transparent electrodes 23 Formed transparent electrode 24: Transparent electrode formed of Al _x Ga _y B _z M _1-xyz N 25: Feed terminal 26: Al _x Ga _y B _z M _1-xyz N layer 27: power supply terminals _{29: Al x Ga y B z} M 1-x-y-z N transparent formed in the electrode 31: reflection electrode 33: reflection electrode 35: resist 37: Bonde Metal 39: Bonding metal 41: Substrate 42: Feeding terminal 43: Solder layer 44: Conductive layer 45: Protective layer 46: Solder layer 47: Reflective electrode 48: Insulating layer 71: Glass substrate 72: p-type amorphous silicon 73: i-type Amorphous silicon 74: n-type amorphous silicon 75: semiconductor layer 76: back electrode 90: conventional semiconductor light emitting device 91: contact electrode made of ITO 93: contact electrode made of ITO

Claims (8)

1. Following formula (1)
   Al _x Ga _y B _z M _1-xyz N (formula 1)
   (Wherein 0 <x <1, 0 <y <1, 0 ≦ z <1, 0.001 ≦ 1-xyz ≦ 0.1, and M is one or more of Si and Ge) The composition for transparent conductive films characterized by being represented by these.
2. The composition for transparent conductive film according to claim 1, wherein 0.005 ≦ 1-xyz ≦ 0.05 in the formula (1).
3. A transparent electrode comprising the transparent conductive film composition according to claim 1 or 2.
4. A semiconductor light emitting device comprising the transparent electrode according to claim 3.
5. A semiconductor light emitting device having a light emitting layer between an n type nitride semiconductor layer and a p type nitride semiconductor layer,
   A transparent electrode comprising the transparent conductive film composition according to claim 2, wherein the transparent electrode is formed on an upper layer of the p-type nitride semiconductor layer.
   A reflective electrode formed on an upper layer of the transparent electrode;
   The light emitting layer is composed of a nitride semiconductor layer having an emission peak wavelength of 400 nm or less.
6. A semiconductor light emitting device having a light emitting layer between an n type nitride semiconductor layer and a p type nitride semiconductor layer,
   A transparent electrode comprising the transparent conductive film composition according to claim 2, wherein the transparent electrode is formed on the entire upper surface of the n-type nitride semiconductor layer.
   A power supply terminal formed on the upper layer of the transparent electrode,
   The light emitting layer is composed of a nitride semiconductor layer having an emission peak wavelength of 400 nm or less.
7. A semiconductor light emitting device having a light emitting layer between an n type nitride semiconductor layer and a p type nitride semiconductor layer,
   The said n-type nitride semiconductor layer is comprised including the said composition for transparent conductive films of Claim 2, The semiconductor light-emitting device characterized by the above-mentioned.
8. A solar cell comprising the transparent electrode according to claim 3.

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