WO2014200473A1 - Reglage de sensibilite dynamique pour mesures de convertisseur analogique-numerique - Google Patents

Reglage de sensibilite dynamique pour mesures de convertisseur analogique-numerique Download PDF

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Publication number
WO2014200473A1
WO2014200473A1 PCT/US2013/045380 US2013045380W WO2014200473A1 WO 2014200473 A1 WO2014200473 A1 WO 2014200473A1 US 2013045380 W US2013045380 W US 2013045380W WO 2014200473 A1 WO2014200473 A1 WO 2014200473A1
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WO
WIPO (PCT)
Prior art keywords
reference voltage
adc
signal
scale
pdu
Prior art date
Application number
PCT/US2013/045380
Other languages
English (en)
Inventor
Steven M. WATSON
Original Assignee
Schneider Electric It Corporation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Schneider Electric It Corporation filed Critical Schneider Electric It Corporation
Priority to CN201380078467.1A priority Critical patent/CN105408753B/zh
Priority to US14/897,465 priority patent/US10371727B2/en
Priority to EP13886732.0A priority patent/EP3008477A4/fr
Priority to PCT/US2013/045380 priority patent/WO2014200473A1/fr
Publication of WO2014200473A1 publication Critical patent/WO2014200473A1/fr

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Classifications

    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/257Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques using analogue/digital converters of the type with comparison of different reference values with the value of voltage or current, e.g. using step-by-step method
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/625Regulating voltage or current wherein it is irrelevant whether the variable actually regulated is ac or dc
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power
    • G06F1/3203Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234Power saving characterised by the action undertaken
    • G06F1/3296Power saving characterised by the action undertaken by lowering the supply or operating voltage
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R21/00Arrangements for measuring electric power or power factor
    • G01R21/133Arrangements for measuring electric power or power factor by using digital technique
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

Definitions

  • Embodiments of the present disclosure relate generally to analog to digital conversion. More specifically, embodiments relate to systems and methods for dynamic sensitivity adjustment for analog to digital conversion in power distribution units.
  • Datacenters often include multiple power distribution units (PDUs) contained within equipment racks.
  • Rack-mounted power distribution units sometimes referred to as rack PDUs, typically provide power to various devices such as servers and networking components contained within the equipment racks.
  • ADCs analog to digital converters
  • a typical approach to measuring small and large signals involves using separate ADCs.
  • Each ADC may be optimized to handle measurement of small, low level signals or large, high level signals, but typically not both.
  • the use of multiple ADCs adds cost and complexity to the sampling circuit.
  • Another approach requires using signal conditioning circuitry that amplifies the signal applied to the ADC.
  • this approach requires one or more amplifiers to accommodate each input channel to the ADC and affects the signal being measured as variations in amplifier gain must be accounted for, thereby also increasing both complexity and cost.
  • At least some aspects and embodiments are directed to providing dynamic ADC measurement sensitivity adjustment for PDUs having one or more outlets.
  • Various embodiments may include an ADC configured to allow accurate measurement of both high and low levels of outlet currents. This may be achieved by providing a plurality of ADC reference voltages to measure both high outlet currents and low outlet currents. Using a large ADC voltage reference will allow measurement of high outlet current without clipping of ADC measurements. Using a small ADC voltage reference will allow measurement of low outlet currents by effectively increasing the resolution of the signal measurement at lower levels. This also increases the signal to noise ratio when measuring lower current levels. Various embodiments may not require additional signal conditioning circuitry to affect the signal being measured.
  • the method comprises acts of associating a plurality of outlets of the PDU with a plurality of channels of the ADC, providing a plurality of reference voltages, measuring a scale of a signal output from a first channel of the ADC, comparing the scale of the signal to a sensitivity threshold, and selecting, for a first outlet corresponding to the first channel, a reference voltage of the plurality of reference voltages for input to the ADC based on a result of the comparing.
  • the signal may correspond to a value of current through the first outlet.
  • the method may further comprise, after selecting a reference voltage, determining a measured value from the signal output from the first channel and applying a calibration value to the measured value based on the reference voltage.
  • the method may further comprise providing a plurality of sensitivity thresholds, each sensitivity threshold corresponding to a respective reference voltage of the plurality of reference voltages.
  • the sensitivity threshold may be based on a current reference voltage of the plurality of reference voltages.
  • the method may further comprise measuring the scale of the signal output from the first channel of the ADC based on the current reference voltage.
  • the sensitivity threshold may include a threshold range and comparing may further include determining whether the scale of the signal is within the threshold range.
  • the method may further comprise switching from using the current reference voltage to a different reference voltage in response to a determination that the scale of the signal is outside the threshold range.
  • the method may further comprise switching from using the current reference voltage to a different reference voltage that is lower than the current reference voltage in response to a determination that the scale of the signal is less than or equal to a lower bound of the threshold range.
  • the method may further comprise switching from using the current reference voltage to a different reference voltage that is higher than the current reference voltage in response to a determination that the scale of the signal is greater than or equal to an upper bound of the threshold range.
  • the method may further comprise providing a
  • the method may further comprise calibrating the microprocessor based on the reference voltage and measuring the scale of a second signal output from the first channel of the ADC based on the reference voltage using the calibrated microprocessor.
  • a power distribution unit comprises an input configured to receive input power from an input power source, a plurality of outlets configured to provide output power, an analog to digital converter (ADC) including a plurality of channels, and a microprocessor coupled to the ADC.
  • the microprocessor may be configured to measure a scale of a signal output from a first channel of the ADC, compare the scale of the signal to a sensitivity threshold, and select, for a first outlet corresponding to the first channel, a reference voltage of a plurality of reference voltages for input to the ADC based on a result of comparing.
  • the signal may correspond to a value of current through the first outlet.
  • the microprocessor may be further configured to measure the scale of the signal based on a current reference voltage of the plurality of reference voltages.
  • the sensitivity threshold may be based on the current reference voltage.
  • the sensitivity threshold may include a threshold range and the microprocessor may be further configured to determine whether the scale of the signal is within the threshold range, and switch from the current reference voltage to a different reference voltage in response to a determination that the scale of the signal is outside the threshold range.
  • the different reference voltage may be lower than the current reference voltage in response to a determination that the scale of the signal is less than or equal to a lower bound of the threshold range.
  • the different reference voltage may be higher than the current reference voltage in response to a determination that the scale of the signal is greater than or equal to an upper bound of the threshold range.
  • the PDU may further comprise a reference voltage switch configured to receive the plurality of reference voltages and a control signal indicative of the selected reference voltage and to provide the selected reference voltage to the ADC.
  • the PDU may further comprise a memory configured to store a plurality of sets of calibration values. Each set of calibration values may correspond to a respective reference voltage of the plurality of reference voltages and the microprocessor may be further configured to receive a set of calibration values corresponding to the selected reference voltage.
  • a power distribution unit comprises an input configured to receive input power from an input power source, a plurality of outlets configured to provide output power, and an analog to digital converter (ADC) including a plurality of channels.
  • the PDU further comprises means for measuring, for each outlet of the plurality of outlets, a value output by a respective channel of the ADC and corresponding to a value of current through the outlet and for selecting a reference voltage of the ADC based on the value measured.
  • the means for measuring may be configured to switch from a current reference voltage to the selected reference voltage in response to a determination that the value measured is outside a threshold range of the current reference voltage.
  • the selected reference voltage may be lower than the current reference voltage in response to a determination that the value measured is less than or equal to a lower bound of the threshold range.
  • the selected reference voltage may be higher than the current reference voltage in response to a determination that the value measured is greater than or equal to an upper bound of the threshold range.
  • the PDU may further comprise means for calibrating the means for measuring based on the reference voltage.
  • FIG. 1 illustrates one embodiment of a system for dynamic sensitivity adjustment for ADC measurements according to aspects of the present disclosure
  • FIG. 2 illustrates another embodiment of a system for dynamic sensitivity adjustment for ADC measurements according to aspects of the present disclosure
  • FIG. 3 illustrates a rack PDU including a system for dynamic sensitivity adjustment for ADC measurements according to aspects of the present disclosure
  • FIG. 4 is a flow diagram of one example of a method of dynamic sensitivity adjustment for ADC measurements according to aspects of the present disclosure.
  • FIG. 5 is a block diagram of one example of a computer system upon which various aspects of the present embodiments may be implemented.
  • an ADC circuit When designing an ADC circuit, it is difficult to offer a system that is able to measure large signals while also being able to measure very small signals with a high level of precision.
  • an ADC circuit having an output of n bits When an ADC circuit having an output of n bits is designed, it is typically designed to tolerate the largest magnitude signal that would be applied to it. When this largest magnitude signal is applied to the ADC, the output would be at or near the full n bits that describe the signal. When a small signal is applied to the same ADC circuit, the output would be n-x bits which describe the small signal with less detail.
  • various embodiments disclosed herein include an ADC having dynamic sensitivity to handle dynamic signals of various scales, while keeping components, board space, complexity and cost to a minimum.
  • FIG. 1 shows one embodiment of a system 100 for measuring dynamic signals.
  • the system 100 includes an ADC 102 having a first input 104 configured to receive an analog signal and a second input 106 configured to receive a reference voltage.
  • the ADC 102 has an output 108 configured to provide a digital signal corresponding to the analog signal at input 104 based on the reference voltage provided at the second input 106.
  • the system 100 further includes a microprocessor 110 coupled to the ADC 102 and configured to receive the signal output from the ADC.
  • the microprocessor 110 may be configured to measure the signal output from the ADC.
  • the microprocessor 110 may further be configured to measure the scale of the signal output from the ADC and to compare the scale of the signal to a sensitivity threshold.
  • the sensitivity threshold may be a threshold range.
  • the microprocessor 110 may further be configured to select a reference voltage from a plurality of reference voltages based on a result of the comparison.
  • the microprocessor 110 is shown to provide a control signal 112 indicative of the selected reference voltage to a reference voltage switch 114.
  • the reference voltage switch 114 is configured to receive a plurality of reference voltages 116 (Vref 1, Vref 2,..., Vref n) and to provide the selected reference voltage to the ADC 102 based on the control signal 112.
  • the system 100 further includes a non-volatile memory 118 configured to store a plurality of sets of calibration values 120.
  • Each set of calibration values may correspond to a respective reference voltage of the plurality of reference voltages 116.
  • the microprocessor 110 may be calibrated using a set of calibration values corresponding to the selected reference voltage input to the ADC 102 at input 106.
  • the system 100 allows measurement of dynamic signals, ranging in scale from small to large magnitudes, without requiring additional signal conditioning circuitry or separate ADCs for each signal scale.
  • By changing the voltage reference between one of two or more predetermined and calibrated states, such as the plurality of reference voltages 116 it is possible to sample small signals with higher resolution, as well as to sample larger signals based on the output of the same ADC.
  • selection of the appropriate reference voltage to apply to the ADC may be accomplished using simple switching circuitry.
  • control signal 112 may be generated by the microprocessor to select the appropriate reference voltage applied to the ADC without any additional comparison or feedback circuitry required to affect the reference voltage selection.
  • various embodiments of the present disclosure do not require a separate microprocessor or data processor to facilitate the data collection and analysis as well as reference voltage selection.
  • data collection, data processing and reference voltage selection may be performed by a single microprocessor, such as the microprocessor 110 of the system 100.
  • DAC digital to analog converter
  • pre-defined or predetermined reference voltages may be generated by semiconductor band gap devices, power supply output voltages, resistive dividers or other method that would allow precise derivation of reference voltages.
  • a reference voltage may be selected or applied to the ADC based on control signals provided by the microprocessor to semiconductor or other type switches.
  • the reference voltage switch 114 of the system 100 may include a semiconductor switch.
  • the switch may include a transistor switch.
  • two or more voltage references to be applied to the ADC may be provided, in contrast to a typical ADC system which would have a single fixed reference voltage across which all applied signals would be compared.
  • Embodiments may provide various systems and methods for selecting the individual voltage references for application to the ADC.
  • separate switching circuitry may be configured to allow selection of a reference voltage from two or more reference voltages by application of a control signal applied to the switching circuitry.
  • the reference voltage switch 114 in FIG. 1 may include one or more switching circuits.
  • each switching circuit may include one or more transistor switches.
  • the ADC 102 in FIG. 1 is a 10 bit ADC, which corresponds to 1024 steps or counts 0 to 1023.
  • a first reference voltage, Vref 1, is 5V, which corresponds to about 4.9mV/step for the 10 bit ADC.
  • the smallest measurable signal based on the first reference voltage is about 5mV.
  • a second reference voltage, Vref 2, is IV, which corresponds to about 0.98mV/step for the 10 bit ADC.
  • the smallest measurable signal based on the second reference voltage is about lmV.
  • Table II shows the output of the ADC corresponding to the signal applied at the input of the ADC using the IV reference voltage.
  • an input signal of l-5mV applied to the ADC cannot be accurately measured based on the resulting output when using the 5V reference voltage.
  • input signals up to 5V may be measured based on the 5V reference voltage.
  • using the IV reference voltage allows for unique outputs when input signals of l-5mV are applied to the ADC.
  • signals above IV cannot be measured based on the IV reference voltage.
  • the microprocessor 110 may be configured to select the appropriate reference voltage to use based on the output read from the ADC.
  • the microprocessor firmware may be configured to select the reference voltage.
  • the microprocessor may be configured to measure the scale of a signal output from the ADC. This measurement may be based on a currently used reference voltage. For example, if the current reference voltage is 5V, the output of the ADC may be as shown in Table I and if the current reference voltage is IV, the output of the ADC may be as shown in Table II.
  • the microprocessor 110 may further be configured to compare the output signal or the scale of the output signal to a sensitivity threshold and select the reference voltage based on the comparison.
  • the sensitivity threshold may be a threshold range.
  • Each reference voltage of a plurality of reference voltages may have a corresponding sensitivity threshold range.
  • the 5V reference voltage may have a threshold range [205, 1023] having a lower bound of 205 counts and an upper bound of 1023 counts.
  • the IV reference voltage may have a threshold range [0, 1023[, with a lower bound of zero and an upper bound non-inclusive of 1023.
  • the microprocessor may be configured to compare the ADC output to the sensitivity threshold corresponding to the current voltage reference. More specifically, the microprocessor may be configured to determine whether the ADC output is outside the sensitivity threshold range. For example, if the current reference voltage is 5V, the microprocessor may be configured to compare the ADC output to the [205, 1023] threshold range corresponding to the 5V reference voltage.
  • microprocessor may further be configured to select a next reference voltage for application to the ADC based on a result of the comparison. For example, if the microprocessor determines that the ADC output is below 205 counts, which is below the lower bound of the [205, 1023] range, the microprocessor may select the lower IV reference voltage and generate a control signal to switch the reference voltage from 5V to IV.
  • the microprocessor may be configured to compare the ADC output to the [0, 1023[ threshold range corresponding to the IV reference voltage. If the microprocessor determines that the ADC output reached 1023 counts, which is greater than the upper bound of the [0, 1023[ range, the microprocessor may select the higher reference voltage of 5V and generate a control signal to switch the reference voltage from IV to 5V.
  • the microprocessor may be configured to determine whether the scale of the signal output from the ADC is within or outside the threshold range corresponding to the current reference voltage used to read the output.
  • the microprocessor may be configured to switch from the current reference voltage to a different reference voltage based on a determination that the scale of the signal is outside the threshold range. More specifically, as described in the examples above, the microprocessor may be configured to switch to a different reference voltage that is lower than the current reference voltage in response to a determination that the scale of the signal is less than (or in some embodiments equal to) a lower bound of the threshold range corresponding to the current reference voltage.
  • the microprocessor may also be configured to switch to a different reference voltage that is higher than the current reference voltage in response to a determination that the scale of the signal is greater than (or in some embodiments equal to) an upper bound of the threshold range corresponding to the current reference voltage.
  • the newly selected reference voltage applied to the ADC may then be used for one or more subsequent measurements.
  • the microprocessor may be configured to maintain the same reference voltage or to switch to a new reference voltage following each measurement.
  • the system 100 may be configured to calibrate the microprocessor 110 based on the selected reference voltage. A signal output from the ADC may then be measured by the calibrated microprocessor.
  • the microprocessor 110 may be configured to select appropriate calibration values depending on the selected reference voltage. The microprocessor 110 may be configured to calibrate a signal output from the ADC using calibration values corresponding to the selected reference voltage. This allows for accurate reporting of the physical
  • the measured signal information from the microprocessor 110 is an 8 bit byte with a value of 0 - 50 that represents the voltage applied to the ADC with a resolution of 0. IV. This output value may be derived from comparing the ADC resulting output to a calibration value.
  • non-volatile memory 118 stores a plurality of calibration values or parameters, such as zero, scale factor and range of calibration. Calibrating may include applying a known signal level, reading the ADC output and associating the resulting ADC output with the known signal level. For a linear system, this allows for interpolation and extrapolation of measurements below and beyond the known calibration signal, corresponding to a range of calibration.
  • the non-volatile memory 118 is an electrically erasable programmable read-only memory (EEPROM).
  • Each set of calibration values or parameters may correspond to a respective reference voltage of the plurality of reference voltages 116 supported by the system 100.
  • the microprocessor 110 may be configured to obtain calibration values corresponding to the new reference voltage and to apply the calibration values to signals output from the ADC 102, for example after the reference voltage switch 114 provides the new reference voltage to the ADC.
  • a microprocessor coupled to the ADC to read the ADC output conversions to determine the appropriate reference voltage to use eliminates the need for additional feedback or amplification circuitry.
  • Some embodiments may include a switch configured to receive a control signal to switch between reference voltages.
  • the switch may be separate from the microprocessor and the ADC as shown for example by the reference voltage switch 114 in FIG. 1. In other embodiments, the switch may be included in the microprocessor or the ADC.
  • an ADC may have a single input for receiving a reference voltage. In other embodiments, an ADC may have multiple inputs for receiving multiple reference voltages and may further be configured to switch reference voltages. In various embodiments, the ADC may be any type of ADC, such as a Sigma- Delta ADC or a successive approximation ADC.
  • Various embodiments of measurement systems disclosed herein may be configured to couple to a PDU or may be included in a PDU, for example as shown and described below with reference to FIG. 3.
  • the system 100 in FIG. 1 may be included in a PDU having one or more electrical outlets.
  • the system 100 may be configured to measure outlet currents.
  • the ADC 102 may have one or more input and output channels, each being associated with a respective outlet of the PDU.
  • Systems and methods disclosed herein provide the ability to switch between two or more ADC reference voltages on a per outlet basis. Each outlet may have a respective reference voltage selected depending on the required sensitivity of current measurement.
  • calibration values such as bias and scale factors may be selected per outlet depending on the selected reference voltage or current measurement sensitivity required for that outlet.
  • the microprocessor firmware may be calibrated to correctly interpret the ADC output based on the known ADC reference voltage selected to read a signal.
  • the calibration may be performed on a per outlet basis.
  • separate calibration values may correspond to separate reference voltages.
  • each reference voltage or sensitivity mode may have a respective no load bias point, a respective current calibration scale factor and a respective power calibration scale factor.
  • a respective bias point, calibration scale factor and power calibration scale factor may be applied to a respective outlet depending on the reference voltage selected or applied to that outlet.
  • a set of calibration values may correspond to a respective reference voltage and at least one outlet.
  • Each outlet of a plurality of outlets may have a corresponding plurality of sets of calibration values, each set of calibration values corresponding to a respective reference voltage that may be applied to that outlet.
  • a normal or default reference voltage is 5V
  • a high sensitivity reference voltage is IV
  • a first bias point per outlet is provided for the normal 5V reference voltage
  • a second bias point per outlet is provided for the high sensitivity reference voltage of IV.
  • a first current calibration scale factor per outlet is provided for the normal 5V reference voltage and a second calibration scale factor per outlet is provided for the high sensitivity reference voltage of IV.
  • a first power calibration scale factor per outlet is provided for the normal 5V reference voltage and a second power calibration scale factor per outlet is provided for the high sensitivity reference voltage of IV.
  • These calibration values such as bias and scale factors are stored in a memory such as EEPROM.
  • the microprocessor firmware is configured to provide functions for bias, current scale and power scale auto calibration for both normal and high sensitivity modes of operation.
  • ADC ADC
  • Other embodiments may allow application of multiple selected reference voltages to an ADC.
  • a microprocessor or microcontroller may be configured to allow two or more reference voltages to be applied to a single ADC.
  • Some embodiments may include a firmware register that allows for selection of the reference voltage to be used.
  • FIG. 2 shows one embodiment of a microcontroller 200 configured to switch between a primary reference voltage Vref 1 and a secondary reference voltage Vref 2 for dynamic sensitivity adjustment for ADC measurements.
  • switching between the reference voltages is accomplished with a register such as a reference control register.
  • the reference voltage may be switched between a 5V/ground reference and separate references on Aref+/- pins to provide high and low sensitivity modes for measuring dynamic signals.
  • the microcontroller 200 is configured to switch from a 5V reference voltage to the Aref+/- pins for the reference voltage. For a 10-bit ADC, the sensitivity thus switches from approximately 4.88mV/count to approximately 1.56mV/count, which may further reduce low level noise.
  • the schematic example in FIG. 2 uses a resistive divider 202 to center the secondary voltage reference around approximately 2.5V. Basing the secondary reference voltage off Vdd/Vref 1 allows the secondary reference voltage Vref 2 to scale with any fluctuations in the primary voltage supply.
  • FIG. 3 illustrates a rack 300 configured to house one or more equipment such as data center equipment.
  • the rack 300 houses a rack PDU 302 including a plurality of electrical outlets 304.
  • the rack PDU 302 may be configured according to one or more aspects disclosed herein.
  • the rack PDU 302 may include a measurement system 306, for example for measuring currents for one or more outlets 304.
  • the rack PDU 302 may include the system 100 of FIG. 1 or the microprocessor of FIG. 2.
  • the ADC 102 in the embodiment of FIG. 1 may be included in the measurement system 306 and may have one or more input and output channels, each being associated with a respective outlet 304 of the rack PDU 302.
  • Each outlet 304 may be measured independently and may have a respective reference voltage selected based on a scale of a signal measured at that outlet.
  • FIG. 4 shows a flow diagram of one example of a method 400 of measuring dynamic signals using an ADC.
  • the method 400 may be performed for example by the system 100 of FIG. 1.
  • the method 400 includes initially setting the ADC reference voltage to a previous value or to a wide range reference voltage as shown at block 402.
  • the ADC may be the ADC 102 of the embodiment in FIG. 1 and the reference voltage may initially be 5V.
  • the method 400 further includes requesting ADC acquisition at block 404 and providing, at block 406, the output from the ADC to a microprocessor, such as the microprocessor 110 of FIG. 1.
  • the method 400 further includes measuring the scale of the signal output from the ADC and comparing the scale of the signal to a threshold range corresponding to the current reference voltage applied to the ADC, as shown at block 408.
  • the current reference voltage may be the initial reference voltage for a first acquisition.
  • the act of block 408 may be performed by a microprocessor as shown and described above with reference to FIG. 1.
  • the method 400 further includes determining at block 410 whether the signal is within or outside the sensitivity threshold range corresponding to the current reference voltage. If the signal is not within the threshold range of the current reference voltage, the method 400 proceeds to block 412, which includes determining or selecting a new reference voltage and providing a control signal to set the selected reference voltage.
  • the acts at block 412 may be performed for example by a microprocessor. In one
  • control signal may be provided by the microprocessor to a reference voltage switch configured to apply the selected reference voltage to the ADC.
  • the control signal may be applied by the microprocessor to the ADC.
  • the method 400 may proceed to block 414.
  • the method 400 includes applying calibration values corresponding to the selected reference voltage at block 414 and outputting a calibrated measurement at block 416.
  • Calibration values may be retrieved from a non-volatile memory and applied by a microprocessor to an output signal of the ADC to generate a calibrated measurement output by the microprocessor.
  • the method 400 may include different acts, additional acts or fewer acts than shown in FIG. 4.
  • the method may further include an act of determining whether the scale of the signal is less than (or in some embodiments equal to) a lower bound of the range corresponding to the current reference voltage.
  • the method may further include an act of switching from the current reference voltage to a different reference voltage that is less than the current reference voltage in response to determining that the scale of the signal is less than (or equal to) a lower bound of the range corresponding to the current reference voltage. This allows measuring smaller signals with higher resolution.
  • the method may further include an act of determining whether the scale of the signal is greater than (or in some embodiments equal to) an upper bound of the range corresponding to the current reference voltage.
  • the method may further include an act of switching from the current reference voltage to a different reference voltage that is greater than the current reference voltage in response to determining that the scale of the signal is greater than (or equal to) an upper bound of the range corresponding to the current reference voltage. This allows measuring larger signals.
  • Various systems and methods according to aspects disclosed herein address the need to accurately measure dynamic signals, for example dynamic alternating current (AC) loads in a PDU.
  • Alternating currents may be coupled to the ADC through a current transformer, Hall Effect sensor or shunt.
  • the resulting signal applied to the ADC may be an AC voltage that is proportional to the current being measured.
  • an AC voltage of 50mV P-P may be applied to the ADC for every 1A of current being measured.
  • many discrete samples from the AC sine wave may be obtained.
  • a fixed reference voltage may allow accurate measurement of larger values of alternating current (for example around 1A to around 20A).
  • alternating currents below 0.5A are challenging to measure with enough ADC resolution to allow for accurate calculation of the alternating current being measured.
  • Aspects of the present disclosure use a dynamic reference voltage to accurately measure small values of alternating current such as alternating currents below around 1A, 0.5A and 0.3A while still being capable of measuring larger amounts of alternating current such as greater than around 1A.
  • Table III shows one example of a data set obtained for readings of alternating current through a Hall Effect sensor coupled to an ADC input at around 40mV/A.
  • a reference voltage of 1.66V is used.
  • the measurement system of this example also includes a nominal 5V reference voltage which may be applied to the ADC.
  • the 5V reference voltage may not be used to read below around 0.5A.
  • Table III illustrates that in one example, using the secondary reference voltage of 1.66V applied to the ADC according to aspects disclosed herein allows reading alternating currents down to around 50mA.
  • One or more features disclosed herein may be implemented in one or more PDUs or rack PDUs. In other embodiments, various aspects and functions described herein may be implemented in one or more apparatuses separate from a PDU or a rack PDU. An apparatus configured according to one or more features disclosed herein may be configured to couple to a PDU or a rack PDU to allow measurement of dynamic signals.
  • aspects and functions described herein in accord with the present disclosure may be implemented as hardware, software, firmware or any combination thereof. Aspects in accord with the present disclosure may be implemented within methods, acts, systems, system elements and components using a variety of hardware, software or firmware configurations. Furthermore, aspects in accord with the present disclosure may be implemented as specially-programmed hardware and/or software.
  • FIG. 5 there is illustrated a block diagram of one example of computing components forming a system 500 which may be configured to implement one or more aspects disclosed herein.
  • the system 500 may be configured to implement the measurement system 100 as illustrated and described above with reference to FIG. 1.
  • the system 500 may include for example a general-purpose computing platform such as those based on Intel PENTIUM-type processor, Motorola PowerPC, Sun
  • UltraSPARC Hewlett-Packard PA-RISC processors, or any other type of processor.
  • System 500 may include specially-programmed, special-purpose hardware, for example, an application-specific integrated circuit (ASIC).
  • ASIC application-specific integrated circuit
  • Various aspects of the present disclosure may be implemented as specialized software executing on the system 500 such as that shown in FIG. 5.
  • the system 500 may include a processor/ASIC 506 connected to one or more memory devices 510, such as a disk drive, memory, flash memory or other device for storing data.
  • Memory 510 may be used for storing programs and data during operation of the system 500.
  • Components of the computer system 500 may be coupled by an interconnection mechanism 508, which may include one or more buses (e.g., between components that are integrated within a same machine) and/or a network (e.g., between components that reside on separate machines).
  • the interconnection mechanism 508 enables communications (e.g., data, instructions) to be exchanged between components of the system 500. Further, in some embodiments the interconnection mechanism 508 may be disconnected during servicing of a PDU.
  • the system 500 also includes one or more input devices 504, which may include for example, a keyboard or a touch screen. An input device may be used for example to configure the measurement system or to provide input parameters.
  • the system 500 includes one or more output devices 502, which may include for example a display.
  • the computer system 500 may contain one or more interfaces (not shown) that may connect the computer system 500 to a communication network, in addition or as an alternative to the interconnection mechanism 508.
  • the system 500 may include a storage system 512, which may include a computer readable and/or writeable nonvolatile medium in which signals may be stored to provide a program to be executed by the processor or to provide information stored on or in the medium to be processed by the program.
  • the medium may, for example, be a disk or flash memory and in some examples may include RAM or other non- volatile memory such as EEPROM.
  • the processor may cause data to be read from the nonvolatile medium into another memory 510 that allows for faster access to the information by the processor/ASIC than does the medium.
  • This memory 510 may be a volatile, random access memory such as a dynamic random access memory (DRAM) or static memory (SRAM). It may be located in storage system 512 or in memory system 510.
  • DRAM dynamic random access memory
  • SRAM static memory
  • the processor 506 may manipulate the data within the integrated circuit memory 510 and then copy the data to the storage 512 after processing is completed.
  • a variety of mechanisms are known for managing data movement between storage 512 and the integrated circuit memory element 510, and the disclosure is not limited thereto. The disclosure is not limited to a particular memory system 510 or a storage system 512.
  • the system 500 may include a general-purpose computer platform that is programmable using a high-level computer programming language.
  • the system 500 may be also implemented using specially programmed, special purpose hardware, e.g. an ASIC.
  • the system 500 may include a processor 506, which may be a commercially available processor such as the well-known Pentium class processor available from the Intel Corporation. Many other processors are available.
  • the processor 506 may execute an operating system which may be, for example, a Windows operating system available from the Microsoft Corporation, MAC OS System X available from Apple Computer, the Solaris Operating System available from Sun Microsystems, or UNIX and/or LINUX available from various sources. Many other operating systems may be used.
  • the processor and operating system together may form a computer platform for which application programs in high-level programming languages may be written. It should be understood that the disclosure is not limited to a particular computer system platform, processor, operating system, or network. Also, it should be apparent to those skilled in the art that the present disclosure is not limited to a specific programming language or computer system. Further, it should be appreciated that other appropriate programming languages and other appropriate computer systems could also be used.

Abstract

La présente invention porte sur des systèmes et des procédés de mesure de signaux dynamiques pour unités de distribution de puissance. Selon un mode de réalisation, une unité de distribution de puissance (PDU) comprend un convertisseur analogique-numérique (CAN) comprenant une pluralité de canaux, chaque canal correspondant à une sortie respective d'une pluralité de sorties de la PDU. La PDU comprend en outre un microprocesseur couplé au CAN et configuré pour mesurer une échelle d'une sortie de signal provenant d'un premier canal du CAN, comparer l'échelle du signal à un seuil de sensibilité, et sélectionner, pour une première sortie correspondant au premier canal, une tension de référence d'une pluralité de tensions de référence pour une entrée au CAN sur la base d'un résultat de comparaison. Différents modes de réalisation permettent l'utilisation d'un CAN pour mesurer des courants de sortie de faible niveau inférieurs à environ 300 mA en plus de courants de niveau élevé tels qu'environ 20 A.
PCT/US2013/045380 2013-06-12 2013-06-12 Reglage de sensibilite dynamique pour mesures de convertisseur analogique-numerique WO2014200473A1 (fr)

Priority Applications (4)

Application Number Priority Date Filing Date Title
CN201380078467.1A CN105408753B (zh) 2013-06-12 2013-06-12 用于adc测量的动态灵敏度调整
US14/897,465 US10371727B2 (en) 2013-06-12 2013-06-12 Dynamic sensitivity adjustment for ADC measurements
EP13886732.0A EP3008477A4 (fr) 2013-06-12 2013-06-12 Reglage de sensibilite dynamique pour mesures de convertisseur analogique-numerique
PCT/US2013/045380 WO2014200473A1 (fr) 2013-06-12 2013-06-12 Reglage de sensibilite dynamique pour mesures de convertisseur analogique-numerique

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CN112532242A (zh) * 2020-12-18 2021-03-19 中国电子科技集团公司第四十七研究所 一种adc基准电压的动态校准方法和装置
CN113848440A (zh) * 2021-09-30 2021-12-28 珠海黑石电气自动化科技有限公司 一种基于超声波传感器的局部放电检测系统
EP4262161A1 (fr) 2022-04-13 2023-10-18 Abb Schweiz Ag Module d'entrée binaire universel

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EP3008477A4 (fr) 2017-03-01
CN105408753A (zh) 2016-03-16
US20160139185A1 (en) 2016-05-19
EP3008477A1 (fr) 2016-04-20
US10371727B2 (en) 2019-08-06
CN105408753B (zh) 2018-11-16

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