WO2014190664A1 - Lcd面板及显示装置 - Google Patents

Lcd面板及显示装置 Download PDF

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Publication number
WO2014190664A1
WO2014190664A1 PCT/CN2013/085991 CN2013085991W WO2014190664A1 WO 2014190664 A1 WO2014190664 A1 WO 2014190664A1 CN 2013085991 W CN2013085991 W CN 2013085991W WO 2014190664 A1 WO2014190664 A1 WO 2014190664A1
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WO
WIPO (PCT)
Prior art keywords
tft
output port
unit
signal output
signal line
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/CN2013/085991
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English (en)
French (fr)
Inventor
王峥
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
Original Assignee
BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Application filed by BOE Technology Group Co Ltd, Beijing BOE Display Technology Co Ltd filed Critical BOE Technology Group Co Ltd
Priority to US14/422,540 priority Critical patent/US9664970B2/en
Publication of WO2014190664A1 publication Critical patent/WO2014190664A1/zh
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/13306—Circuit arrangements or driving methods for the control of single liquid crystal cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611—Control of matrices with row and column drivers
    • G09G3/3674—Details of drivers for scan electrodes
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2300/00—Aspects of the constitution of display devices
    • G09G2300/04—Structural and physical details of display devices
    • G09G2300/0404—Matrix technologies
    • G09G2300/0408—Integration of the drivers onto the display substrate
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0283—Arrangement of drivers for different directions of scanning
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00—Command of the display device
    • G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264—Details of driving circuits
    • G09G2310/0286—Details of a shift registers arranged for use in a driving circuit
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0223—Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes

Definitions

  • the present invention relates to a liquid crystal display (LCD) panel and a method of fabricating the same. Background technique
  • a liquid crystal display (LCD) design uses a Gate Drive on Array (GOA) technology, and a GOA technology integrates a gate driver on an array substrate to form a GOA unit.
  • the gate driver usually adopts a bilateral driving design, that is, the gate driver is disposed on both sides of the liquid crystal display panel, because the large liquid crystal display panel has large size, long wiring, and high resolution. Will bring a large load (such as large resistance and large parasitic capacitance), which will cause the gate signal delay (RC delay), and the gate signal delay will further adversely affect the pixel electrode charging, such as pixels.
  • the prior art generally adopts a bilateral driving method, that is, the gate drivers are disposed on both sides of the liquid crystal display panel, Can weaken the negative effects caused by the RC delay.
  • the bilateral driver is to design the same two sets of integrated circuits at both ends of the gate signal, that is, the gate driver is disposed on both sides of the liquid crystal display panel, as shown in FIG. 1 , including the GOA region.
  • a GOA unit 1, a second GOA unit 2, a third GOA unit 3, and a fourth GOA unit 4 are taken as an example.
  • the signal lines are four, that is, the first signal line 5, the second signal line 6, and the third signal line. 7 and the fourth signal line 8;
  • the signal output port is four; that is, the first signal output port 9, the second signal output port 10, the third signal output port 11 and the fourth signal output port 12, as can be seen from FIG. Out
  • a GOA area (the GOA area includes a gate driver) is disposed on both sides of the display area 13;
  • the gate driver in the GOA region is used to shift and transmit the gate signal; however, the design of the bilateral driver causes the gate driver to occupy a large space, squeezing the area of the display area, and reducing the space of the peripheral design of the LCD. Summary of the invention
  • An embodiment of the present invention provides an LCD panel, the LCD panel includes a display area, and a first signal line, a second signal line to an Nth signal line connected to the display area, and the LCD panel further includes a TFT area.
  • One side of the display area is provided with a first signal output port, a second signal output port to an Nth signal output port;
  • the TFT region includes a first TFT unit, a second TFT unit to an N+1th TFT unit;
  • the first TFT unit and the N+1th TFT unit each include a TFT, and the second TFT unit to the Nth TFT unit each include two TFTs, that is, a first TFT and a second TFT; wherein, the first a gate of the TFT in the TFT unit is connected to the first signal output port, and a source thereof is connected to the first signal line;
  • a gate of the first TFT in the second TFT unit is connected to the first signal output port, and a source thereof
  • the pole is connected to the second signal line
  • the LCD panel further includes a GOA area, the GOA area including a first GOA unit, a second GOA unit to an Nth GOA unit, wherein the first GOA unit is connected to the first signal line and passes through the display area Connecting with the first signal output port; the second GOA unit is connected to the second signal line, and is connected to the second signal output port through the display area; the Nth GOA unit is connected to the Nth signal line, and passes The display area is connected to the Nth signal output port.
  • Embodiments of the present invention also provide a display device including the above-described LCD display panel.
  • FIG. 1 is a schematic structural view of an LCD panel in the prior art
  • FIG. 2 is a schematic structural view of an LCD panel of Embodiment 1;
  • Figure 3 is a signal line waveform diagram.
  • First GOA unit Description of the reference numerals 1. First GOA unit, 2. Second GOA unit, 3. Third G0A unit, 4. Fourth GOA unit, 5. First signal line, 6. Second signal line, 7. Third signal line, 8 Fourth signal line, 9, first signal output port, 10, second signal output port, 11, third signal output port, 12, fourth signal output port, 13, display area, 14, first TFT unit, 15.
  • the first TFT, 16-2, the second TFT in the third TFT unit, 17, the fourth TFT unit, 17-1, the first TFT in the fourth TFT unit, 17-2, and the fourth TFT unit The second TFT, 18, the fifth TFT unit.
  • An LCD panel comprising: a display area, and a first signal line, a second signal line to an Nth signal line connected to the display area; wherein the LCD panel further includes a TFT area; the display One side of the area is provided with a first signal output port, a second signal output port to an Nth signal output port; the TFT region includes a first TFT unit, a second TFT unit to an (N+1)th TFT unit; The TFT unit and the N+1th TFT unit each include a TFT, and the second TFT unit to the Nth TFT unit each include two TFTs, that is, a first TFT and a second TFT; wherein, in the first TFT unit a gate of the TFT is connected to the first signal output port, and a source thereof is connected to the first signal line;
  • a gate of the first TFT in the second TFT unit is connected to the first signal output port, a source thereof is connected to the second signal line, and a drain thereof is connected to the second signal output port; in the second TFT unit The gate of the second TFT is connected to the second signal output port, the source thereof is connected to the first signal line, and the drain thereof is connected to the first signal output port;
  • a gate of the first TFT in the Nth TFT unit is connected to the N-1th signal output port, a source thereof is connected to the Nth signal line, and a drain thereof is connected to the Nth signal output port;
  • the Nth TFT a gate of the second TFT in the unit is connected to the Nth signal output port, a source thereof is connected to the N-1th signal line, and a drain thereof is connected to the N-1th signal output port;
  • the gate of the TFT in the (N+1)th TFT unit is connected to the Nth signal output port, and the source thereof is connected to the Nth signal line.
  • the LCD panel further includes a GOA area, and the GOA area includes the first a GOA unit, a second GOA unit to an Nth GOA unit;
  • the first GOA unit is connected to the first signal line, and is connected to the first signal output port through the display area;
  • the second GOA unit is connected to the second signal line, and is connected to the second signal output port through the display area;
  • the Nth GOA unit is connected to the Nth signal line, and is connected to the Nth signal output port through the display area.
  • the embodiment of the invention further provides a display device, which comprises the LCD display panel described above.
  • the GOA area includes four GOA units, six GOA units, or eight GOA units, and the corresponding signal lines are four, six, or eight; and the GOA area includes four GOA units as an example to further illustrate the structure of the LCD panel;
  • an LCD panel includes a display area 13 and a first signal line 5 and a second signal line connected to the display area 13. 6.
  • the TFT region includes a first TFT unit 14, a second TFT unit 15, a third TFT unit 16, a fourth TFT unit 17, and a fifth TFT unit 18;
  • Each of the TFT unit and the fifth TFT unit includes a TFT, and the second TFT unit to the fourth TFT unit each include two TFTs, that is, a first TFT and a second TFT; the first TFT unit 14 and the fifth TFT unit 18
  • the broken line in the middle represents the same subsequent connection as the corresponding connection in the second TFT unit 15, the third TFT
  • the gate of the TFT in the first TFT unit 14 is connected to the first signal output port 9, and the source thereof is connected to the first signal line 5;
  • a gate of the first TFT 15-1 of the second TFT unit is connected to the first signal output port 9, a source thereof is connected to the second signal line 6, and a drain thereof is connected to the second signal output port 10;
  • a gate of the second TFT 15-2 in the second TFT unit is connected to the second signal output port 10, a source thereof is connected to the first signal line 5, and a drain thereof is connected to the first signal output port 9;
  • a gate of the first TFT 16-1 in the third TFT unit is connected to the second signal output port 10
  • the source is connected to the third signal line 7 and the drain thereof is connected to the third signal output port 11
  • the gate of the second TFT 16-2 in the third TFT unit is connected to the third signal output port 11
  • the source is connected to the second signal line 6, and the drain thereof is connected to the second signal output port 10;
  • the gate of the first TFT 17-1 in the fourth TFT unit is connected to the third signal output port 11, the source thereof is connected to the fourth signal line 8, and the drain thereof is connected to the fourth signal output port 12;
  • the gate of the second TFT 17-2 in the fourth TFT unit is connected to the fourth signal output port 12, the source thereof is connected to the third signal line 7, and the drain thereof is connected to the third signal output port 11;
  • the gate of the TFT in the fifth TFT unit 18 is connected to the fourth signal output port 12, and the source thereof is connected to the fourth signal line 8.
  • first GOA unit 1 is connected to the first signal line 5, and is connected to the first signal output port 9 through the display area 13;
  • the second GOA unit 2 is connected to the second signal line 6 and connected to the second signal output port 10 through the display area 13;
  • the third GOA unit 3 is connected to the third signal line 7 and connected to the third signal output port 11 through the display area 13;
  • the fourth GOA unit 4 is connected to the fourth signal line 8 and is connected to the fourth signal output port 12 through the display area 13.
  • the first GOA unit 1 is connected to the first signal line 5, and the first GOA unit 1 is connected to the first signal output port 9 through the display area 13, and the first signal output port 9 and the first one of the second TFT units The gate of the TFT 15-1 is connected.
  • the first GOA unit 1 is connected to the gate of the first TFT 15-1 in the second TFT unit through the display region 13, the first of the second TFT units
  • the source of the TFT 15-1 is connected to the second signal line 6, and the drain thereof is connected to the second signal output port 10.
  • Port 10 is connected, therefore, at this stage, the signal from the second signal line 6 can be sent A second signal output port 10 to form an output signal, which can reduce the delay of the rising edge of the second signal output port;
  • the third GOA unit 3 is connected to the third signal line 7, and the third GOA unit 3
  • the display area 13 is connected to the third signal output port 11, and the third signal output port 11 is connected to the gate of the second TFT 16-2 in the third TFT unit. Therefore, the third GOA unit 3 passes through the display area.
  • the output port 10 is connected, such that when the third signal line 6 is at an intermediate time of the second phase, since the phase is a high voltage, the second TFT 16-2 in the third TFT unit is turned on, and The source of the second TFT 16-2 in the TFT unit is connected to the second signal line 6, and the drain thereof is connected to the second signal output port 10. Therefore, at this stage, the signal from the second signal line 6 can be transmitted. To the second signal output port 10, a signal output is formed, so that the delay of the falling edge of the second signal output port can be reduced.
  • the double-sided gate driver is improved without changing the characteristics of the existing gate signal, thereby reducing the size of the gate driver; therefore, the inventive concept of the present invention can be used without change
  • the substrate size the area of the effective display area is increased, or in the case of the same effective display area, the size of the substrate can be reduced by the inventive concept of the present invention, and the frame width of the LCD panel can be reduced.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Nonlinear Science (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Optics & Photonics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

公开了一种LCD面板。该LCD面板包括显示区域（13），以及与该显示区域（13）连接的第一信号线、第二信号线至第N信号线。其中，该LCD面板还包括TFT区域（14）。该显示区域（13）的一侧设置有第一信号输出口、第二信号输出口至第N信号输出口。该TFT区域（13）包括第一TFT单元、第二TFT单元至第N+1TFT单元；所述第一TFT单元和第N+1TFT单元均包括一个TFT，第二TFT单元至第NTFT单元包括两个TFT，即第一TFT和第二TFT。还公开了一种显示装置。采用该LCD面板，能在栅极信号特征不变得基础上，使栅极驱动器的电路更简单，占用空间更少。

Description

LCD面板及显示装置 技术领域
本发明涉及液晶显示屏（Liquid Crystal Display, LCD )面板及其制造方 法。 背景技术
现有技术中， 液晶显示屏（ Liquid Crystal Display, LCD )设计中多采用 阵列基板行驱动 （Gate Drive on Array, GOA )技术， GOA技术是将栅极驱 动器集成在阵列基板上以形成 GOA单元，一般，大于 19英寸的液晶显示屏， 栅极驱动器通常采用双边驱动设计， 即栅极驱动器设置在液晶显示面板的两 侧， 其原因为大型液晶显示面板由于尺寸大、 布线长、 分辨率高， 会带来较 大的负荷（如较大的电阻和较大的寄生电容），这样，会导致栅信号延迟（RC delay ) , 而栅信号延迟进一步会对像素电极充电带来不利影响， 如像素电极 充电不足、 画面均匀性不良等， 因此， 为解决上述问题， 对于大于 19英寸的 液晶显示屏， 现有技术通常采用双边驱动的方式， 即栅极驱动器设置在液晶 显示面板的两侧， 如此， 能削弱栅信号延迟（RC delay )造成的负面影响。
对于 GOA技术而言， 双边驱动就是在栅极信号的两端设计出完全相同 的两组集成电路， 即将栅极驱动器设置在液晶显示面板的两侧，如图 1所示， 以 GOA区域包括第一 GOA单元 1、 第二 GOA单元 2、 第三 GOA单元 3以 及第四 GOA单元 4为例， 相应地， 信号线为四条， 即第一信号线 5、 第二信 号线 6、第三信号线 7和第四信号线 8; 信号输出口为四个； 即第一信号输出 口 9、 第二信号输出口 10、 第三信号输出口 11和第四信号输出口 12,从图 1 中可以看出， GOA区域（所述 GOA区域中包含有栅极驱动器）设置在显示 区域 13的两侧；
这里， 所述 GOA区域中的栅极驱动器用于移位并传输栅信号； 但是， 双边驱动的设计会使得栅极驱动器占用较大空间， 挤占显示区域的面积， 减 少 LCD周边设计的空间。 发明内容
本发明实施例提供了一种 LCD面板， 所述 LCD面板包括显示区域、 以 及与所述显示区域连接的第一信号线、 第二信号线至第 N信号线； 所述 LCD 面板还包括 TFT区域； 所述显示区域的一侧设置有第一信号输出口、 第二信 号输出口至第 N信号输出口； 所述 TFT区域包括第一 TFT单元、 第二 TFT 单元至第 N+1 TFT单元； 所述第一 TFT单元和第 N+1 TFT单元均包括一个 TFT , 所述第二 TFT单元至第 N TFT单元均包括两个 TFT , 即第一 TFT和 第二 TFT; 其中， 所述第一 TFT单元中的 TFT的栅极与第一信号输出口连 接， 其源极与第一信号线连接； 所述第二 TFT单元中的第一 TFT的栅极与 第一信号输出口连接， 其源极与第二信号线连接， 其漏极与第二信号输出口 连接； 所述第二 TFT单元中的第二 TFT的栅极与第二信号输出口连接， 其 源极与第一信号线连接， 其漏极与第一信号输出口连接； 所述第 N TFT单元 中的第一 TFT的栅极与第 N-1信号输出口连接， 其源极与第 N信号线连接， 其漏极与第 N信号输出口连接； 所述第 N TFT单元中的第二 TFT的栅极与 第 N信号输出口连接， 其源极与第 N-1信号线连接， 其漏极与第 N-1信号输 出口连接； 所述第 N+1 TFT单元中的 TFT的栅极与第 N信号输出口连接， 其源极与第 N信号线连接。
所述 LCD面板还包括 GOA区域， 所述 GOA区域包括第一 GOA单元， 第二 GOA单元至第 N GOA单元； 其中， 所述第一 GOA单元与第一信号线 连接， 并通过所述显示区域与第一信号输出口连接； 所述第二 GOA单元与 第二信号线连接， 并通过所述显示区域与第二信号输出口连接； 所述第 N GOA单元与第 N信号线连接，并通过所述显示区域与第 N信号输出口连接。
本发明实施例还提供一种显示装置， 该显示装置包括上述的 LCD显示 面板。 附图说明
图 1为现有技术中 LCD面板的结构示意图；
图 2为实施例 1的 LCD面板的结构示意图；
图 3为信号线波形图。
附图标记说明 1、 第一 GOA单元， 2、 第二 GOA单元， 3、 第三 G0A单元， 4、 第四 GOA单元， 5、 第一信号线， 6、 第二信号线， 7、 第三信号线， 8、 第四信号 线， 9、 第一信号输出口， 10、 第二信号输出口， 11、 第三信号输出口， 12、 第四信号输出口， 13、 显示区域， 14、 第一 TFT单元， 15、 第二 TFT单元， 15-1、第二 TFT单元中的第一 TFT, 15-2、第二 TFT单元中的第二 TFT, 16、 第三 TFT单元， 16-1、 第三 TFT单元中的第一 TFT, 16-2、 第三 TFT单元 中的第二 TFT, 17、第四 TFT单元， 17-1、第四 TFT单元中的第一 TFT, 17-2、 第四 TFT单元中的第二 TFT, 18、 第五 TFT单元。 具体实施方式
下面将结合具体实施例及附图对本发明的实施方式进行详细描述。
一种 LCD面板， 所述 LCD面板包括显示区域、 以及与所述显示区域连 接的第一信号线、 第二信号线至第 N信号线； 其中， 所述 LCD 面板还包括 TFT区域； 所述显示区域的一侧设置有第一信号输出口、 第二信号输出口至 第 N信号输出口； 所述 TFT区域包括第一 TFT单元、 第二 TFT单元至第 N+1 TFT单元； 所述第一 TFT单元和第 N+1 TFT单元均包括一个 TFT, 所 述第二 TFT单元至第 N TFT单元均包括两个 TFT,即第一 TFT和第二 TFT; 其中， 所述第一 TFT单元中的 TFT的栅极与第一信号输出口连接， 其 源极与第一信号线连接；
所述第二 TFT单元中的第一 TFT的栅极与第一信号输出口连接， 其源 极与第二信号线连接， 其漏极与第二信号输出口连接； 所述第二 TFT单元中 的第二 TFT的栅极与第二信号输出口连接， 其源极与第一信号线连接， 其漏 极与第一信号输出口连接；
所述第 N TFT单元中的第一 TFT的栅极与第 N-1信号输出口连接， 其 源极与第 N信号线连接， 其漏极与第 N信号输出口连接； 所述第 N TFT单 元中的第二 TFT的栅极与第 N信号输出口连接， 其源极与第 N-1信号线连 接， 其漏极与第 N-1信号输出口连接；
所述第 N+1 TFT单元中的 TFT的栅极与第 N信号输出口连接， 其源极 与第 N信号线连接。
进一步的， 所述 LCD面板还包括 GOA区域， 所述 GOA区域包括第一 GOA单元， 第二 GOA单元至第 N GOA单元； 其中，
所述第一 GOA单元与第一信号线连接， 并通过所述显示区域与第一信 号输出口连接；
所述第二 GOA单元与第二信号线连接， 并通过所述显示区域与第二信 号输出口连接；
所述第 N GOA单元与第 N信号线连接， 并通过所述显示区域与第 N信 号输出口连接。
本发明实施例还提供了一种显示装置， 所述显示装置包括以上所述的 LCD显示面板。
实施例 1
通常 GOA区域包括四个 GOA单元、六个 GOA单元或八个 GOA单元， 相应的信号线为四条、六条或八条；选用 GOA区域包括四个 GOA单元为例， 进一步说明本 LCD面板的结构；
图 2为实施例 1LCD面板的结构示意图， 如图 2所示， 一种 LCD面板， 所述 LCD面板包括显示区域 13、以及与所述显示区域 13连接的第一信号线 5、 第二信号线 6、 第三信号线 7和第四信号线 8; 其中， 所述 LCD面板还 包括 TFT区域； 所述显示区域 13的一侧设置有第一信号输出口 9、 第二信 号输出口 10第三信号输出口 11和第四信号输出口 12; 所述 TFT区域包括 第一 TFT单元 14、 第二 TFT单元 15、 第三 TFT单元 16、 第四 TFT单元 17 和第五 TFT单元 18; 所述第一 TFT单元和第五 TFT单元均包括一个 TFT, 所述第二 TFT单元至第四 TFT单元均包括两个 TFT,即第一 TFT和第二 TFT; 第一 TFT单元 14、第五 TFT单元 18中的虚线代表与第二 TFT单元 15、 第三 TFT单元 16、第四 TFT单元 17中相应连接的连接方式相同的后续连接。
其中，所述第一 TFT单元 14中的 TFT的栅极与第一信号输出口 9连接， 其源极与第一信号线 5连接；
所述第二 TFT单元中的第一 TFT 15-1的栅极与第一信号输出口 9连接， 其源极与第二信号线 6连接， 其漏极与第二信号输出口 10连接； 所述第二 TFT单元中的第二 TFT 15-2的栅极与第二信号输出口 10连接， 其源极与第 一信号线 5连接， 其漏极与第一信号输出口 9连接；
所述第三 TFT单元中的第一 TFT 16-1的栅极与第二信号输出口 10连接， 其源极与第三信号线 7连接， 其漏极与第三信号输出口 11连接； 所述第三 TFT单元中的第二 TFT 16-2的栅极与第三信号输出口 11连接， 其源极与第 二信号线 6连接， 其漏极与第二信号输出口 10连接；
所述第四 TFT单元中的第一 TFT 17- 1的栅极与第三信号输出口 11连接， 其源极与第四信号线 8连接， 其漏极与第四信号输出口 12连接； 所述第四 TFT单元中的第二 TFT 17-2的栅极与第四信号输出口 12连接， 其源极与第 三信号线 7连接， 其漏极与第三信号输出口 11连接；
所述第五 TFT单元 18中的 TFT的栅极与第四信号输出口 12连接， 其 源极与第四信号线 8连接。
进一步的， 所述第一 GOA单元 1与第一信号线 5连接， 并通过所述显 示区域 13与第一信号输出口 9连接；
所述第二 GOA单元 2与第二信号线 6连接， 并通过所述显示区域 13与 第二信号输出口 10连接；
所述第三 GOA单元 3与第三信号线 7连接， 并通过所述显示区域 13与 第三信号输出口 11连接；
所述第四 GOA单元 4与第四信号线 8连接， 并通过所述显示区域 13与 第四信号输出口 12连接。
图 3为信号线波形图， 即第一信号线 5、 第二信号线 6、 第三信号线 7 和第四信号线 8所对应的波形图， 结合图 3, 本发明 LCD的工作原理为： 第一 GOA单元 1与第一信号线 5连接，且所述第一 GOA单元 1通过显 示区域 13与第一信号输出口 9连接， 而第一信号输出口 9与第二 TFT单元 中的第一 TFT 15-1的栅极连接， 因此， 所述第一 GOA单元 1通过显示区域 13与第二 TFT单元中的第一 TFT 15-1的栅极连接， 所述第二 TFT单元中的 第一 TFT 15-1的源极与第二信号线 6连接， 其漏极与第二信号输出口 10连 接， 如此， 第一信号线 5在第一阶段的中间时刻时， 由于此阶段为高电压， 所述第二 TFT单元中的第一 TFT 15-1打开， 又由于所述第二 TFT单元中的 第一 TFT 15-1的源极与第二信号线连接，其漏极与第二信号输出口 10连接， 因此， 在此阶段， 第二信号线 6所发出的信号能发送至第二信号输出口 10, 形成信号输出， 从而能减小第二信号输出口上升沿的延迟；
同理， 第三 GOA单元 3与第三信号线 7连接， 且所述第三 GOA单元 3 通过显示区域 13与第三信号输出口 11连接， 而第三信号输出口 11与第三 TFT单元中的第二 TFT 16-2的栅极连接， 因此， 所述第三 GOA单元 3通过 显示区域 13与第三 TFT单元中的第二 TFT 16-2的栅极连接； 所述第三 TFT 单元中的第二 TFT 16-2的源极第二信号线 6连接，其漏极与第二信号输出口 10连接， 如此， 第三信号线 6在第二阶段的中间时刻时， 由于此阶段为高电 压， 所述第三 TFT单元中的第二 TFT 16-2打开， 又由于所述第三 TFT单元 中的第二 TFT 16-2的源极与第二信号线 6连接， 其漏极与第二信号输出口 10连接， 因此， 在此阶段， 第二信号线 6所发出的信号能发送至第二信号输 出口 10, 形成信号输出， 从而能减小第二信号输出口下降沿的延迟。
根据本发明的实施例， 在不改变现有栅信号特性的基础上， 对双边栅级 驱动器进行改善， 进而减小了栅极驱动器的大小； 因此， 采用本发明的发明 构思， 能在不改变基板大小的情况下， 增加有效的显示区域的面积， 或者在 相同有效显示区域的情况下， 采用本发明的发明构思能减小基板的大小， 能 减小 LCD面板的边框宽度。
以上所述， 仅为本发明的较佳实施例而已， 并非用于限定本发明的保护 范围。

Claims

权利要求书
1、 一种 LCD面板， 所述 LCD面板包括显示区域、 以及与所述显示区 域连接的第一信号线、 第二信号线至第 N信号线； 其中， 所述 LCD 面板还 包括 TFT区域； 所述显示区域的一侧设置有第一信号输出口、 第二信号输出 口至第 N信号输出口； 所述 TFT区域包括第一 TFT单元、 第二 TFT单元至 第 N+1 TFT单元； 所述第一 TFT单元和第 N+1 TFT单元均包括一个 TFT, 所述第二 TFT单元至第 N TFT单元均包括两个 TFT，即第一 TFT和第二 TFT; 其中， 所述第一 TFT单元中的 TFT的栅极与第一信号输出口连接， 其 源极与第一信号线连接；
所述第二 TFT单元中的第一 TFT的栅极与第一信号输出口连接， 其源 极与第二信号线连接， 其漏极与第二信号输出口连接； 所述第二 TFT单元中 的第二 TFT的栅极与第二信号输出口连接， 其源极与第一信号线连接， 其漏 极与第一信号输出口连接；
所述第 N TFT单元中的第一 TFT的栅极与第 N-1信号输出口连接， 其 源极与第 N信号线连接， 其漏极与第 N信号输出口连接； 所述第 N TFT单 元中的第二 TFT的栅极与第 N信号输出口连接， 其源极与第 N-1信号线连 接， 其漏极与第 N-1信号输出口连接；
所述第 N+1 TFT单元中的 TFT的栅极与第 N信号输出口连接， 其源极 与第 N信号线连接。
2、根据权利要求 1所述的 LCD面板，其中，所述 LCD面板还包括 GOA 区域， 所述 GOA区域包括第一 GOA单元， 第二 GOA单元至第 N GOA单 元； 其中，
所述第一 GOA单元与第一信号线连接， 并通过所述显示区域与第一信 号输出口连接；
所述第二 GOA单元与第二信号线连接， 并通过所述显示区域与第二信 号输出口连接；
所述第 N GOA单元与第 N信号线连接， 并通过所述显示区域与第 N信 号输出口连接。
3、 一种显示装置， 包括权利要求 1至 2任一项所述的 LCD面板。
PCT/CN2013/085991 2013-05-31 2013-10-25 Lcd面板及显示装置 Ceased WO2014190664A1 (zh)

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Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105118430B (zh) * 2015-08-31 2018-05-25 上海和辉光电有限公司 像素驱动电路及其驱动方法和显示装置
KR102479918B1 (ko) * 2016-04-05 2022-12-22 삼성디스플레이 주식회사 표시 장치

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN201828742U (zh) * 2010-10-14 2011-05-11 京东方科技集团股份有限公司 驱动电路和液晶显示器
CN102290040A (zh) * 2011-09-13 2011-12-21 深圳市华星光电技术有限公司 一种液晶面板、液晶显示装置及液晶面板栅极驱动方法
US20120050633A1 (en) * 2010-08-27 2012-03-01 Au Optronics Corp. Lcd panel and fabricating method thereof

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3594131B2 (ja) * 2000-07-28 2004-11-24 シャープ株式会社 画像表示装置
KR100796787B1 (ko) * 2001-01-04 2008-01-22 삼성전자주식회사 게이트 신호 지연 보상 액정 디스플레이 장치, 패널 및 방법
TWI330820B (en) * 2006-01-26 2010-09-21 Au Optronics Corp Flat panel display and display panel thereof
KR101261450B1 (ko) 2006-02-06 2013-05-10 삼성디스플레이 주식회사 액정 표시 장치와 그 제조 방법
KR101154338B1 (ko) * 2006-02-15 2012-06-13 삼성전자주식회사 쉬프트 레지스터와, 이를 갖는 스캔 구동 회로 및 표시장치
KR101298094B1 (ko) * 2006-09-25 2013-08-20 삼성디스플레이 주식회사 게이트 구동회로 및 이를 갖는 표시장치
CN1959799A (zh) * 2006-10-30 2007-05-09 友达光电股份有限公司 显示器及其显示面板
TWI356377B (en) * 2006-11-27 2012-01-11 Chimei Innolux Corp Liquid crystal display device and driving circuit
CN201000518Y (zh) * 2006-11-29 2008-01-02 上海广电光电子有限公司 可降低修复线信号延迟的液晶显示装置
CN101408684B (zh) * 2007-10-12 2010-08-25 群康科技(深圳)有限公司 液晶显示装置及其驱动方法
US7884891B2 (en) * 2008-01-21 2011-02-08 Beijing Boe Optoelectronics Technology Co., Ltd. Thin film transistor liquid crystal display
JP2010224438A (ja) * 2009-03-25 2010-10-07 Seiko Epson Corp 電気光学装置の駆動回路、電気光学装置、及び電子機器
CN101510416B (zh) * 2009-04-03 2012-02-08 友达光电股份有限公司 高可靠度栅极驱动电路
CN101963724B (zh) * 2009-07-22 2012-07-18 北京京东方光电科技有限公司 液晶显示驱动装置
WO2011070836A1 (ja) * 2009-12-11 2011-06-16 シャープ株式会社 表示パネル、液晶表示装置、および、駆動方法
KR101710661B1 (ko) * 2010-04-29 2017-02-28 삼성디스플레이 주식회사 게이트 구동회로 및 이를 갖는 표시장치
US8773413B2 (en) * 2011-09-13 2014-07-08 Shenzhen China Star Optoelectronics Technology Co., Ltd. Liquid crystal display panel, liquid crystal display device, and gate driving method of liquid crystal display panel
US9449567B2 (en) * 2013-02-26 2016-09-20 Au Optronics Corporation Common voltage compensation in display apparatus
CN103400559B (zh) * 2013-07-31 2015-05-13 京东方科技集团股份有限公司 显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20120050633A1 (en) * 2010-08-27 2012-03-01 Au Optronics Corp. Lcd panel and fabricating method thereof
CN201828742U (zh) * 2010-10-14 2011-05-11 京东方科技集团股份有限公司 驱动电路和液晶显示器
CN102290040A (zh) * 2011-09-13 2011-12-21 深圳市华星光电技术有限公司 一种液晶面板、液晶显示装置及液晶面板栅极驱动方法

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CN104217688A (zh) 2014-12-17
US20150234246A1 (en) 2015-08-20
CN104217688B (zh) 2016-08-10

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