WO2014104332A1 - Dispositif d'alimentation en énergie - Google Patents

Dispositif d'alimentation en énergie Download PDF

Info

Publication number
WO2014104332A1
WO2014104332A1 PCT/JP2013/085190 JP2013085190W WO2014104332A1 WO 2014104332 A1 WO2014104332 A1 WO 2014104332A1 JP 2013085190 W JP2013085190 W JP 2013085190W WO 2014104332 A1 WO2014104332 A1 WO 2014104332A1
Authority
WO
WIPO (PCT)
Prior art keywords
fet
circuit
voltage
power supply
type fet
Prior art date
Application number
PCT/JP2013/085190
Other languages
English (en)
Japanese (ja)
Inventor
宮澤　明
Original Assignee
アルプス電気株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アルプス電気株式会社 filed Critical アルプス電気株式会社
Publication of WO2014104332A1 publication Critical patent/WO2014104332A1/fr

Links

Images

Classifications

    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02J—CIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J1/00—Circuit arrangements for dc mains or dc distribution networks
    • H02J1/10—Parallel operation of dc sources

Definitions

  • the present invention relates to a power supply device, and more particularly to a power supply device connected to an in-vehicle battery.
  • the power supply device is configured to supply and control power for driving a load circuit using an FET (Field Effect Transistor).
  • FET Field Effect Transistor
  • enhancement-type FETs can be easily switched, so that they are used for power supply devices in in-vehicle electronic devices.
  • a booster circuit is used for driving the FET.
  • Patent Document 1 discloses an in-vehicle electronic device that uses a booster circuit to drive an FET of a power supply device.
  • FIG. 5 shows a power supply device 900 for the electronic control device 941 disclosed in Patent Document 1 as a first conventional example.
  • an appropriate voltage is applied to the gate of the FET, and the voltage drop between the drain and source of the FET is about 0.4 V. Proceed as if there is. Further, the discussion will be made assuming that the FET is in an off state when substantially the same voltage is applied to the drain and the gate of the FET or when the voltage drop between the drain and the source of the FET is about 2V.
  • the power supply apparatus 900 includes a power supply terminal 905 connected to the battery 903 and an FET 921 connected to the power supply terminal 905.
  • the gate voltage needs to be higher than the source voltage by a predetermined voltage (about 3 V).
  • the output terminal of the booster circuit 943 is connected to the gate of the FET 921.
  • the booster circuit 943 is configured to generate a voltage higher than the voltage VB of the battery 903 by a predetermined voltage or more and apply the generated boosted voltage to the gate of the FET 921 to turn on the FET 921.
  • a conventional on-vehicle power supply device 800 includes an input terminal 811 connected to a battery 851, an FET circuit 801, an output terminal 812 connected to a load circuit 852, and a booster circuit 803. And a control circuit 804.
  • the anode of the protective diode 801c is connected to the input terminal 811
  • the cathode of the protective diode 801c is connected to the drain D0 of the FET 801a
  • the source S0 of the FET 801a is connected to the output terminal 812. Yes.
  • a resistor 801b and a protective diode 801d are connected in series, and are connected between the gate G0 of the FET 801a and the input terminal 811.
  • the booster circuit 803 is supplied with the output voltage Vout from the output terminal 812 as a power supply voltage, and its output terminal is connected to the gate G0 of the FET 801a. Note that the booster circuit 803 is designed to operate at 7 V or higher so that internal loss during operation does not become excessive.
  • the control circuit 804 is provided for controlling the operation of the booster circuit 803 and controlling the operation of the load circuit 852. Note that an enhancement type FET is used as the FET 801a, and a circuit through which a current of about 3 A or more flows is assumed as the load circuit 852.
  • the voltage of the gate G of the FET 801a needs to be higher than the voltage of the source S by a predetermined voltage (about 3V) or more. Therefore, the booster circuit 803 is operated, and the voltage output from the booster circuit 803 is applied to the gate of the FET 801a.
  • the booster circuit 803 is configured to boost the voltage supplied to the booster circuit 803 to a voltage approximately twice as large as the voltage output.
  • FIG. 7A shows a state before the FET 801a is turned on.
  • 9V is supplied to the booster circuit 803 as the power supply voltage, 18V, which is twice 9V, is output to the output terminal of the booster circuit 803 which is a voltage doubler generation circuit. Accordingly, when the voltage of the gate G0 with respect to the source S0 becomes 9V, the FET 801a can be turned on.
  • FIG. 7B shows a state when the FET 801a is turned on.
  • the output voltage Vout at the output terminal 812 is 10.6V.
  • the FET 801a since 21.2 V is applied to the gate G0 of the FET 801a, the FET 801a can be kept on.
  • the output voltage (Vout) at which the load circuit 852 can operate is assumed to be 7 V or more and less than 13 V. As described above, there is no particular problem if the voltage Vin at the input terminal 811 is the normal voltage 12V.
  • the conventional power supply apparatus 900 or 800 shown in FIG. 5 or 6 has the following problem when the voltage at the input terminal 811 drops to, for example, 9V.
  • FIG. 7C shows the state before and after the start of power supply to the load circuit 852 when the voltage Vin at the input terminal 811 is lowered to 9 V in the power supply apparatus 800 shown in FIG.
  • the booster circuit 803 is designed to operate with a voltage of Vout of 7V or higher.
  • the output voltage Vout at the output terminal 812 that is, the power supply voltage of the booster circuit 803 decreases to 6V. Since the booster circuit 803 is designed to operate at 7 V or higher, the booster circuit 803 cannot operate when Vout decreases to 6 V. Therefore, the voltage necessary for turning on the FET 801a from the booster circuit 803 is not applied to the gate G0 of the FET 801a, and the state of the FET 801a remains unchanged and remains as shown in FIG. Therefore, the FET 801a cannot be turned on.
  • the FET 801a cannot be turned on. Therefore, when the voltage Vin at the input terminal 811 decreases, the conventional power supply apparatus 800 has a problem in that power cannot be supplied to the load circuit 852.
  • the present invention has been made in view of the actual situation of the prior art, and an object of the present invention is to stably supply power for driving the load circuit even when the voltage output from the battery is lowered. It is an object of the present invention to provide a power supply device that can perform the above-described operation.
  • the power supply device of the present invention includes an input terminal to which power is supplied from a battery, an output terminal to which a load circuit is connected, a drain connected to the input terminal, and the output terminal.
  • the 1FET is an element that is turned off when the same voltage is supplied to the drain and gate of the first FET, and a voltage boosted by the booster circuit is applied to the gate of the first FET.
  • the drain of T is connected to the drain of the first FET
  • the source of the second FET is connected to the source of the first FET
  • the second FET has the same voltage supplied to the drain and gate of the second FET Is an element that can be turned on, and before turning on the power supply to the load circuit, the second FET is turned on, and when the power supply is started, the booster circuit is connected to the load circuit via the second FET. It has a feature that voltage is supplied.
  • the power supply device configured as described above turns on the second FET when power supply to the load circuit is started and supplies the voltage to the booster circuit via the second FET. A sufficiently high voltage can be obtained. Therefore, even when the voltage output from the battery decreases, the first FET can be turned on, so that it is possible to stably supply power for driving the load circuit.
  • the voltage is supplied from the battery to the first FET and the second FET before the start of power supply to the load circuit, and the control is performed when the power supply to the load circuit is started.
  • the booster circuit is operated by a first control signal from the circuit to turn on the first FET, and the load circuit can be operated.
  • the power supply device configured as described above controls the booster circuit and the load circuit with the first control signal from the control circuit when the power supply to the load circuit is started. Can be determined.
  • the second FET is turned off by a second control signal from the control circuit after the first FET is turned on.
  • the first FET is an enhancement type FET
  • the second FET is a depletion type FET
  • the drain and gate of the enhancement type FET are connected via a resistor
  • the drain and gate of the depletion type FET have a resistance. It has the characteristic that it is connected via.
  • the second FET can be turned on when the power supply to the load circuit is started, and the voltage drop of the second FET is reduced. A voltage can be supplied to the booster circuit in a small state.
  • the depletion type FET is characterized by being a MOS • FET.
  • the power supply device configured as described above uses a MOS • FET as a depletion type FET, the gate voltage with respect to the source can be used from a negative voltage to a positive voltage. For this reason, since the ON / OFF of the second FET can be controlled with a low voltage, it is easy to use, and power can be easily supplied to the booster circuit when power supply to the load circuit is started.
  • the above configuration has a feature that it is connected to a battery mounted on the vehicle.
  • the power supply device configured as described above can operate the electronic devices in the vehicle without any trouble even when the voltage of the battery mounted on the vehicle decreases at a low temperature or the like.
  • the power supply device of the present invention can stably supply power for driving the load circuit even when the voltage output from the battery drops.
  • FIG. 1 is a circuit diagram showing a configuration of a power supply device according to a first embodiment of the present invention. It is a circuit diagram which shows the structure of the power supply apparatus which concerns on 2nd Embodiment of this invention. It is a circuit diagram for showing operation of a power supply device concerning a 2nd embodiment of the present invention. It is a circuit diagram for showing operation of a power supply device concerning a 2nd embodiment of the present invention. It is a circuit diagram which shows the structure of the power supply apparatus which concerns on a 1st prior art example. It is a circuit diagram for demonstrating the structure of the power supply apparatus which concerns on a 2nd prior art example. It is a circuit diagram for demonstrating operation
  • the voltage drop between the drain and the source is about 0.4 V under the condition that power is supplied to the drain of the enhancement type FET and an appropriate voltage is applied to the gate. Let's talk about time as if the enhancement FET is on.
  • the enhancement type FET is off regardless of the drain and source voltage values.
  • the depletion type FET is supplied with power to its drain and the appropriate voltage for turning off the FET is not applied to the gate, the depletion type FET is turned on. .
  • the case where power is supplied to the drain and an appropriate voltage for turning off the FET is applied to the gate is assumed to be that the depletion type FET is turned off.
  • the battery output voltage is assumed to be a normal output voltage of 12V, but the voltage value will change from 9V to about 16V. Further, it is assumed that the load circuit and the booster circuit can operate at a power supply voltage of 7V to 13V, and that the power supply voltage from 7V to 13V is supplied to the load circuit and the booster circuit.
  • the power supply to the load circuit refers to the power supply when the load circuit is driven by the control signal from the control circuit. In the state where the voltage is simply supplied to the output terminal, It does not say that it is supplying power to the circuit.
  • the names of the standby signal SG1off and the standby release signal SG1on are used as the first control signal SG1 from the control circuit to the booster circuit and the load circuit.
  • the standby signal SG1off is a control signal for stopping the operation of the target circuit
  • the standby release signal SG1on is a signal for starting up and operating the target circuit whose operation is stopped.
  • the name of the second control signal SG2 is used as a control signal from the control circuit to the depletion type FET.
  • the second control signal SG2 is a control signal for turning off the depletion type FET.
  • the second control signal SG2 is not output, and the description will be made on the assumption that the connection between the control circuit and the depletion type FET can be opened.
  • FIG. 1 is a circuit diagram showing a configuration of a power supply apparatus 100 according to the first embodiment of the present invention.
  • the first FET circuit 1, the second FET circuit 2, and these circuits according to the first embodiment It is a circuit diagram which shows the relationship with a block.
  • the power supply device 100 includes an input terminal 11 to which power is supplied from a battery 51, an output terminal 12 to which a load circuit 52 is connected, a drain D1 connected to the input terminal 11, and an output terminal.
  • 12 includes a first FET 1a to which a source S1 is connected.
  • a resistor 1b is connected between the drain D1 and the gate G1 of the first FET 1a, and the first FET circuit 1 is constituted by the first FET 1a and the resistor 1b.
  • the first FET 1a is an enhancement type FET.
  • the second FET 2a is connected to the first FET 1a.
  • the second FET 2a is a depletion type FET.
  • the drain D2 of the depletion type FET that is the second FET 2a is connected to the drain D1 of the enhancement type FET that is the first FET 1a, and the source S2 of the depletion type FET is connected to the source S1 of the enhancement type FET.
  • a resistor 2b is connected between the drain D2 and the gate G2 of the second FET 2a, and the second FET 2a and the resistor 2b constitute the second FET circuit 2.
  • the first FET 1a will be referred to as an enhancement type FET 1a
  • the second FET 2a will be referred to as a depletion type FET 2a.
  • the power supply apparatus 100 includes a booster circuit 3 that is connected to the output terminal 12 and boosts an output voltage from the output terminal 12, and a control circuit 4 that controls the booster circuit 3. .
  • the booster circuit 3 has its output terminal connected to the gate G1 of the enhancement type FET 1a so that the boosted voltage is applied to the gate G1 of the enhancement type FET 1a.
  • the control circuit 4 is connected to the booster circuit 3 in order to control the booster circuit 3, and is also connected to the gate G2 of the depletion type FET 2a in order to control the depletion type FET 2a.
  • the control circuit 4 is also connected to the load circuit 52, and is configured to control the load circuit 52 simultaneously with controlling the booster circuit 3.
  • the power supply voltage of the control circuit 4 is always supplied from the battery 51 via a regulator (not shown) in a separate system. Further, the power supply voltage value of the control circuit 4 is configured to use 5V.
  • the enhancement type FET 1a is an element that is turned off when the same voltage is supplied to the drain D1 and the gate G1 of the enhancement type FET 1a.
  • the depletion type FET 2a is an element that can be turned on when the same voltage is supplied to the drain D2 and the gate G2 of the depletion type FET 2a. In this state, when the second control signal SG2 is not applied from the control circuit 4 to the gate G2 of the depletion type FET 2a, that is, when the connection between the gate G2 of the depletion type FET 2a and the control circuit 4 is open, the depletion type FET 2a Is on.
  • the same voltage is supplied from the battery 51 to the drain D1 and the gate G1 of the enhancement type FET 1a, and at the same time, the same is applied to the drain D2 and the gate G2 of the depletion type FET 2a. Voltage is being supplied.
  • the second control signal SG2 from the control circuit 4 is not applied to the gate G2 of the depletion type FET 2a. Therefore, the enhancement type FET 1a is in an off state and the depletion type FET 2a is in an on state.
  • the standby signal SG1off is supplied from the control circuit 4 to the booster circuit 3 as the first control signal SG1.
  • the control circuit 4 supplies the first control signal SG1 to the booster circuit 3 and the same first control signal SG1 to the load circuit 52 at the same time. Therefore, before the start of power supply to the load circuit 52, the standby signal SG1off is supplied to the booster circuit 3 and the load circuit 52, and the operations of the booster circuit 3 and the load circuit 52 are stopped.
  • the standby release signal SG1on is output as the first control signal SG1 from the control circuit 4, and the booster circuit 3 and the load circuit 52 are made operable.
  • the depletion type FET 2a is in an on state, a voltage is supplied to the booster circuit 3 via the depletion type FET 2a. In this state, the standby release signal SG1on is supplied from the control circuit 4 to the booster circuit 3.
  • the booster circuit 3 to which the standby release signal SG1on is supplied boosts the voltage supplied via the depletion type FET 2a and applies it to the gate G1 of the enhancement type FET 1a to turn on the enhancement type FET.
  • the booster circuit 3 is configured by a circuit called a charge pump circuit, and has a function of boosting the supplied voltage to twice the voltage.
  • the charge pump circuit includes an oscillation circuit (not shown) and a multistage capacitor group (not shown) that is sequentially charged and discharged by the oscillation of the oscillation circuit.
  • the voltage stored in the last capacitor of the capacitor group is output from the output terminal of the booster circuit 3. Since such a circuit configuration is a well-known circuit configuration, detailed description thereof is omitted.
  • the output voltage Vout is output to the output terminal 12 via the enhancement type FET 1a.
  • the output voltage Vout is supplied to the load circuit 52 to which the standby release signal SG1on is supplied, and the load circuit 52 starts its operation. Further, a voltage is supplied to the booster circuit 3 via the enhancement type FET 1a, and the supplied voltage is boosted and continuously applied to the gate G1 of the enhancement type FET 1a.
  • the depletion type FET 2a is turned off by the second control signal SG2 from the control circuit 4.
  • the depletion type FET 2a can be turned off.
  • the power supply device 100 supplies the voltage to the booster circuit 3 via the depletion type FET 2a that is already turned on when the power supply to the load circuit 52 is started. .
  • the voltage drop when the depletion type FET 2a is on is about 0.4V. Therefore, the power supply apparatus 100 according to the first embodiment of the present invention has a booster circuit 803 of the second conventional example, which is approximately the same as when the output voltage of the enhancement type FET 801a having a voltage drop of approximately 2 V is supplied.
  • a voltage higher by 1.6 V can be supplied to the booster circuit 3. Therefore, even when the voltage output from the battery 51 decreases, the voltage supplied to the booster circuit can be set to the required voltage, and the enhancement FET 1a can be turned on. Therefore, the power to the load circuit 52 can be stably supplied.
  • FIG. 2 is a circuit diagram showing the configuration of the third FET circuit 21 and the fourth FET circuit 22 of the power supply apparatus 200 according to the second embodiment of the present invention, and the relationship between these circuits and other blocks.
  • the booster circuit 3 the control circuit 4, and the like, the same reference numerals as those in the first embodiment are used for those having the same functions as those in the first embodiment.
  • the block configuration of the power supply apparatus 200 according to the second embodiment of the present invention will be described with reference to FIG.
  • the power supply device 200 according to the second embodiment of the present invention is an embodiment having a configuration closer to the actual product configuration than the power supply device 100 according to the first embodiment of the present invention.
  • the power supply device 200 includes an input terminal 11 to which a battery 51 is connected, a third FET circuit 21, an output terminal 12 to which a load circuit 52 is connected, a fourth FET circuit 22, and a booster circuit. 3, a control circuit 4, and a protection circuit 31.
  • the third FET circuit 21 is connected between the input terminal 11 and the output terminal 12.
  • the booster circuit 3 is connected to the output terminal 12 and the output voltage Vout from the output terminal 12 is supplied as a power supply voltage.
  • the booster circuit 3 boosts the output voltage Vout from the output terminal 12 to the third FET circuit 21. It is configured to supply.
  • a protection circuit 31 is connected between the output terminal 12, the third FET circuit 21, and the ground.
  • a control circuit 4 is provided to control the operation of the circuit in the apparatus.
  • the control circuit 4 is connected to the booster circuit 3 in order to control the booster circuit 3.
  • the control circuit 4 is also connected to the load circuit 52, and is configured to control the load circuit 52 simultaneously with controlling the booster circuit 3.
  • the power supply voltage of the control circuit 4 is always supplied from the battery 51 via a regulator (not shown) in a separate system. Further, the power supply voltage value of the control circuit 4 is configured to use 5V.
  • the fourth FET circuit 22 is connected in parallel to the third FET circuit 21.
  • the control circuit 4 is also connected to the fourth FET circuit 22 in order to control the fourth FET circuit 22.
  • the circuit configuration of the power supply device 200 will be described in detail with reference to FIG. 2, focusing on the third FET circuit 21 and the fourth FET circuit 22.
  • the third FET circuit 21 includes an enhancement type FET 21a connected between the input terminal 11 and the output terminal 12, a resistor 21b, a diode 21c, and a diode 21d.
  • the protection circuit 31 is connected between the output terminal 12 and the gate G1 of the enhancement type FET 1a and the ground.
  • the protection circuit 31 is configured using a Zener diode (not shown), and is a circuit for controlling the output voltage Vout at the output terminal 12 so as not to exceed a predetermined voltage.
  • a Zener diode not shown
  • omitted since the structure of the protection circuit 31 in 2nd Embodiment is known, detailed description is abbreviate
  • the anode of the diode 21c is connected to the input terminal 11
  • the drain D3 of the enhancement type FET 21a is connected to the cathode of the diode 21c
  • the source S3 of the enhancement type FET 21a is connected to the output terminal 12.
  • a gate G3 of the enhancement type FET 21a is connected to the input terminal 11 through a series connection circuit of a diode 21d and a resistor 21b, and is connected to the output terminal of the booster circuit 3.
  • the diode 21c and the diode 21d are diodes for preventing reverse connection. These diodes break down the power supply device 200 and the load circuit 52 when the power output terminal and the ground terminal of the battery 51 are connected to the input terminal 11 and the ground terminal of the power supply device 200 in reverse. Has been inserted so as not to. When the voltage from the battery 51 is supplied to the input terminal 11, a voltage drop of about 1 V occurs between the anode and cathode of the diode 21c and the diode 21d.
  • the voltage output from the booster circuit 3 is applied to the gate G3 of the FET 21a.
  • the booster circuit 3 is connected to the control circuit 4 and is controlled by the first control signal SG1 from the control circuit 4. Prior to the start of the supply of drive power to the load circuit 52, the booster circuit 3 receives the standby signal SG1off from the control circuit 4 as the first control signal SG1, and stops the operation of the circuit.
  • the booster circuit 3 is set to perform a boost operation after the power supply voltage supplied to the booster circuit 3 is 7 V or more and the standby release signal SG1on from the control circuit 4 is input.
  • the fourth FET circuit 22 has a depletion type FET 22a, a resistor 22b, and a Zener diode 22c.
  • the depletion type FET 22a has a drain D4 connected to the drain D3 of the enhancement type FET 21a and a source S4 connected to the source S3 of the enhancement type FET 21a.
  • a depletion type FET has an operation region that is turned on even when the gate voltage is lower than the source voltage. For example, it is turned on even if the gate voltage is about 2 V lower than the source voltage. Therefore, the depletion type FET can be turned off by setting the gate voltage to be lower than the source voltage by a predetermined voltage (about 3 V) or more. For example, when the source voltage of the depletion type FET is equal to or higher than a predetermined voltage (about 3 V), the gate voltage can be set to 0 V to turn it off.
  • a depletion type FET has few elements capable of flowing a large current of several A or more like an enhancement type FET, and can only supply a current of about 1 A. Therefore, a method of using a large current through the depletion type FET is rarely used. Further, such a depletion type FET is likely to be very expensive even if it exists, and is not generally used.
  • a depletion type MOS • FET Metal • Oxide • Semiconductor • Field • Effect • Transistor
  • the depletion type MOS • FET can be used from a negative voltage to a positive voltage as a gate voltage with respect to the source, and is therefore easy to use.
  • the resistor 22b is connected between the drain D4 and the gate G4 of the depletion type FET 22a.
  • the zener diode 22c is connected between the gate G4 of the depletion type FET 22a and the ground.
  • the Zener diode 22c has a Zener voltage value set so that a voltage higher than the threshold is not applied to the gate G4 of the depletion type FET 22a even when a high voltage higher than a certain threshold (Zener voltage) is externally applied to the gate G4. ing.
  • the Zener voltage value is set to 17.5V.
  • the output terminal of the control circuit 4 is connected to the gate G4 of the depletion type FET 22a.
  • the control circuit 4 is configured to output a second control signal SG2 for turning off the depletion type FET 22a. For example, when 0V is applied to the gate G2 of the depletion type FET 22a as the second control signal SG2 from the control circuit 4, the depletion type FET 22a is turned off.
  • the control circuit 4 and the gate G2 of the depletion type FET 2a are disconnected. Since the resistor 22b is connected between the drain D4 and the gate G4 of the depletion type FET 22a, the same voltage as the drain D4 is applied to the gate G4, and the depletion type FET 2a is turned on.
  • FIG. 2 The operation of the power supply apparatus 200 shown in FIG. 2 from when the power supply to the load circuit 52 is started until the power is supplied when the voltage of the battery 51 is in a normal state (about 12 V) is shown in FIG. This will be described with reference to 3 (a) and FIG. 3 (b).
  • the operation of the power supply device 200 when the voltage of the battery 51 is lowered will be described with reference to FIGS. 4 (a) and 4 (b).
  • the required output voltage (Vout) is assumed to be 7V or more and less than 13V.
  • the enhancement type FET 21a is supplied with the voltage Vin via the diode 21c. Since there is a voltage drop of about 1V between both ends of the diode 21c, the voltage 11V is applied to the drain D3 of the enhancement type FET 21a, but the standby signal SG1off is input from the control circuit 4 to the booster circuit 3. Therefore, no voltage is applied from the booster circuit 3 to the gate G3 of the enhancement type FET 21a, and the enhancement type FET 21a is turned off.
  • the control circuit 4 does not output a signal for turning off the depletion type FET 22a, and is disconnected from the gate G4 of the depletion type FET 22a. Therefore, since the voltage of the gate G4 of the depletion type FET 22a is the same as the voltage of the drain D4 of the depletion type FET 22a, the depletion type FET 22a is on.
  • the output terminal 12 outputs a voltage of 10.6 V via the depletion type FET 22a as the output voltage Vout.
  • the standby signal SG1off is input from the control circuit 4 to the booster circuit 3 and the load circuit 52 as described above. Therefore, an appropriate voltage for turning on the enhancement type FET 21a is not applied to the gate G3 of the enhancement type FET 21a. Therefore, the enhancement type FET 21a is still off.
  • FIG. 3B shows a state after the standby release signal SG1on is input from the control circuit 4 to the booster circuit 3 and the load circuit 52.
  • the booster circuit 3 outputs 21.2V, which is twice the voltage of 10.6V, and is applied to the gate G3 of the enhancement type FET 21a.
  • 21.2 V is applied to the gate G1
  • the enhancement type FET 21a is turned on, and a voltage is output to the output terminal 12 via the enhancement type FET 21a. Since the voltage drop is 0.4V after the enhancement type FET 21a is turned on, 10.6V is output to the output terminal 12.
  • the depletion type FET 22a is turned off after the booster circuit 3 has been started. Although the depletion type FET 2a cannot flow a large current of several A, it can flow a necessary current to the booster circuit 3. Therefore, there is no problem in using it for starting up the booster circuit 3. .
  • the second control signal SG2 is applied to the gate G4 of the depletion type FET 22a. Specifically, 0 V is applied from the control circuit 4 to the gate G2 of the depletion type FET 2a. For this reason, a voltage 10.6V lower than the source S2 is applied to the gate G2 of the depletion type FET 2a. Therefore, the depletion type FET 2a is turned off.
  • the operation of the power supply device 200 when the voltage Vin at the input terminal 11, that is, the voltage from the battery 51 is lowered to a voltage lower than the normal voltage 12 V, for example, 9 V, for example, due to low temperature or the like will be described.
  • 4A and 4B show the states before and after the start of power supply for driving the load circuit 52 when the voltage at the input terminal 11 is lowered to 9 V in the power supply apparatus 200 shown in FIG. Show.
  • the enhancement type FET 21a is supplied with the voltage Vin via the diode 21c. Since there is a voltage drop of about 1V across the diode 21c, a voltage of 8V is applied to the drain D3 of the enhancement type FET 21a. However, since the standby signal SG1off is input from the control circuit 4 to the booster circuit 3 and the load circuit 52, no voltage is applied from the booster circuit 3 to the gate G3 of the enhancement type FET 21a, and the enhancement type FET 21a is turned off. ing.
  • a voltage is supplied to the drain D4 of the depletion type FET 22a through the diode 21c, and a voltage is supplied to the gate G4 through the diode 21c and the resistor 22b. Accordingly, the voltage 8V is applied to the drain D4 and the gate G4 of the depletion type FET 22a, similarly to the enhancement type FET 21a.
  • the control circuit 4 does not output a signal for turning off the depletion type FET 22a, and is disconnected from the gate G4 of the depletion type FET 22a. Therefore, since the voltage of the gate G4 of the depletion type FET 22a is the same as the voltage of the drain D4 of the depletion type FET 22a, the depletion type FET 22a is on.
  • the output terminal 12 outputs a voltage 7.6 V via the depletion type FET 22a as the output voltage Vout.
  • the standby signal SG1off is input from the control circuit 4 to the booster circuit 3 and the load circuit 52. Therefore, an appropriate voltage for turning on the enhancement type FET 21a is not applied to the gate of the enhancement type FET 21a. Therefore, the enhancement type FET 21a is still off.
  • FIG. 4B shows a state after the standby release signal SG1on is input from the control circuit 4 to the booster circuit 3 and the load circuit 52.
  • the booster circuit 3 outputs 15.2V, which is twice the voltage of 7.6V, and is applied to the gate G3 of the enhancement type FET 21a.
  • 15.2 V is applied to the gate G3
  • the enhancement type FET 21a is turned on, and a voltage is output to the output terminal 12 via the enhancement type FET 21a. Note that, after the enhancement type FET 21a is turned on, the voltage drop is 0.4V, so 7.6V is output to the output terminal 12.
  • the output voltage Vout at the output terminal 12 is 7.6V, which is the voltage at which the booster circuit 3 can operate. It can be. Therefore, even when the voltage from the battery 51 drops to 9V, the same operation as when the voltage from the battery 51 is 12V can be expected.
  • the discussion has been made assuming that the voltage at which the booster circuit 3 can operate is 7 V or more. However, when the operating voltage of the booster circuit 3 is from a lower voltage, for example, the voltage from the battery 51 can of course correspond to a lower voltage.
  • the power supply apparatus 200 can stably supply power to the load circuit 52 even when the voltage from the battery 51 decreases.
  • the voltage from the battery 51 is normally 12V and the case where the voltage is lowered to 9V has been described.
  • the voltage from the battery 51 may rise over 12V to about 16V even in normal times. For example, when the engine is started, since the battery is charged, its output voltage rises. In recent vehicles such as hybrid cars, charging is performed even during deceleration, and the output voltage of the battery increases.
  • the protection circuit 31 provided in the power supply device 200 can prevent a voltage higher than a predetermined output voltage from being supplied to the load circuit 52.
  • the protection circuit 31 includes a transistor (not shown) and a Zener diode (not shown). By setting the Zener voltage of the Zener diode to an appropriate value, the output voltage at the output terminal 12 is regulated. The voltage value (13V) is not exceeded.
  • the power supply device 200 of the present invention described so far has been described on the assumption that the battery 51 is mounted on the vehicle. Therefore, the power supply device 200 configured in this way can operate the electronic devices in the vehicle without any trouble even at low temperatures.
  • the power supply device 200 of the present invention is not limited to a battery mounted on a vehicle, but can be applied to a battery mounted on various devices other than the vehicle.
  • the power supply device 100 according to the first embodiment of the present invention or the power supply device 200 according to the second embodiment supplies the booster circuit 3 even when the voltage output from the battery 51 decreases. To a sufficiently high voltage. Therefore, even when the voltage output from the battery 51 is reduced, the power for driving the load circuit 52 can be stably supplied.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)

Abstract

Le problème décrit par la présente invention est de pourvoir à un dispositif d'alimentation en énergie susceptible d'alimenter un circuit de charge en énergie de manière fiable, y compris dans un cas dans lequel la tension de sortie de la batterie a diminué. La solution selon l'invention porte sur un dispositif équipé : d'un premier FET (1a) dans lequel un drain (D1) est connecté à une borne d'entrée (11), une source (S1) est connectée à une borne de sortie (12), et qui est hors tension dans un état dans lequel la même tension est fournie au drain (D1) et à une grille (G1) ; d'un circuit d'amplification (3) qui amplifie la tension de sortie en provenance de la borne de sortie (12) ; et d'un circuit de commande (4) qui est connecté au circuit d'amplification (3) et à un circuit de charge (52). Il est possible de mettre sous tension le dispositif de l'invention dans un état dans lequel la même tension est fournie à un drain (D2) et à une grille (G2), et ledit dispositif est établi de sorte : qu'un second FET (2a), qui peut être commandé au moyen du circuit de commande (4), soit connecté au premier FET (1a) ; qu'au moment du démarrage de l'alimentation en énergie du circuit de charge (52), le second FET (2a) soit mis sous tension ; et que la tension soit fournie au circuit d'amplification (3) par l'intermédiaire du second FET (2a).
PCT/JP2013/085190 2012-12-28 2013-12-27 Dispositif d'alimentation en énergie WO2014104332A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012287165A JP2016033691A (ja) 2012-12-28 2012-12-28 電源供給装置
JP2012-287165 2012-12-28

Publications (1)

Publication Number Publication Date
WO2014104332A1 true WO2014104332A1 (fr) 2014-07-03

Family

ID=51021396

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2013/085190 WO2014104332A1 (fr) 2012-12-28 2013-12-27 Dispositif d'alimentation en énergie

Country Status (2)

Country Link
JP (1) JP2016033691A (fr)
WO (1) WO2014104332A1 (fr)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109286237A (zh) * 2018-11-12 2019-01-29 艾体威尔电子技术(北京)有限公司 一种用于控制低功耗后备电池接入或脱离的电路

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003108243A (ja) * 2001-09-11 2003-04-11 Semikron Elektron Gmbh 電圧制御用回路装置
JP2007082374A (ja) * 2005-09-16 2007-03-29 Denso Corp 電源逆接続保護回路
JP2009199435A (ja) * 2008-02-22 2009-09-03 Nec Corp レギュレータ回路

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003108243A (ja) * 2001-09-11 2003-04-11 Semikron Elektron Gmbh 電圧制御用回路装置
JP2007082374A (ja) * 2005-09-16 2007-03-29 Denso Corp 電源逆接続保護回路
JP2009199435A (ja) * 2008-02-22 2009-09-03 Nec Corp レギュレータ回路

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109286237A (zh) * 2018-11-12 2019-01-29 艾体威尔电子技术(北京)有限公司 一种用于控制低功耗后备电池接入或脱离的电路
CN109286237B (zh) * 2018-11-12 2024-03-22 艾体威尔电子技术(北京)有限公司 一种用于控制低功耗后备电池接入或脱离的电路

Also Published As

Publication number Publication date
JP2016033691A (ja) 2016-03-10

Similar Documents

Publication Publication Date Title
US7560904B2 (en) Method and system of managing power distribution in switch based circuits
JP4479797B2 (ja) 電子制御装置
US9214824B2 (en) Charging control circuit
US9843184B2 (en) Voltage conversion apparatus
JP4855153B2 (ja) 電源装置、レギュレータ回路、チャージポンプ回路およびそれらを用いた電子機器
WO2017169395A1 (fr) Système d'alimentation électrique
WO2007010801A1 (fr) Régulateur à découpage élévateur/abaisseur, son circuit de commande et appareil électronique les utilisant
US20080203984A1 (en) Step-up switching power supply device, and electronic device provided therewith
US9762116B2 (en) Voltage conversion apparatus
JP5309535B2 (ja) 電動パワーステアリング装置
CN103226369A (zh) 电源电路
US11052771B2 (en) Vehicle-mounted power supply device
US10410815B2 (en) Driver circuit for the operation of a relay
JP6109410B2 (ja) 車載機器
WO2020195257A1 (fr) Dispositif d'alimentation électrique embarqué
WO2013187269A1 (fr) Dispositif de source d'alimentation de commutation
JP6112004B2 (ja) 補助電源装置
WO2014104332A1 (fr) Dispositif d'alimentation en énergie
WO2020008732A1 (fr) Circuit d'alimentation électrique d'amplification
JP6652035B2 (ja) 電子制御装置
JP6375977B2 (ja) 電源装置
JP6031672B2 (ja) 車載用電源装置およびこれを用いた車載電源ユニット
JP2013247823A (ja) 半導体装置
JP2017216799A (ja) 電源装置
WO2022054145A1 (fr) Dispositif d'alimentation électrique

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13867494

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13867494

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: JP