WO2014094538A1 - Deep silicon etch method - Google Patents

Deep silicon etch method Download PDF

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Publication number
WO2014094538A1
WO2014094538A1 PCT/CN2013/088450 CN2013088450W WO2014094538A1 WO 2014094538 A1 WO2014094538 A1 WO 2014094538A1 CN 2013088450 W CN2013088450 W CN 2013088450W WO 2014094538 A1 WO2014094538 A1 WO 2014094538A1
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Prior art keywords
etching
deep silicon
etch
smoothing step
deposition
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PCT/CN2013/088450
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French (fr)
Chinese (zh)
Inventor
蒋中伟
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北京北方微电子基地设备工艺研究中心有限责任公司
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Publication of WO2014094538A1 publication Critical patent/WO2014094538A1/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching
    • H01L21/30655Plasma etching; Reactive-ion etching comprising alternated and repeated etching and passivation steps, e.g. Bosch process
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065Plasma etching; Reactive-ion etching

Definitions

  • the present invention relates to the field of semiconductor fabrication, and more particularly to a deep silicon etching method. Background technique
  • MEMS Micro-Electro-Mechanical Systems
  • MEMS systems are increasingly used in automotive and consumer electronics, as well as TSV (Through Silicon Etch) technology in future packaging applications.
  • TSV Through Silicon Etch
  • dry plasma deep silicon etching process has gradually become one of the mainstream processes in the field of MEMS processing and TSV technology.
  • the main difference between the deep silicon etching process and the general silicon etching process is that the etching depth of the deep silicon etching process is much larger than that of the general silicon etching process, and the etching depth of the deep silicon etching process is generally several tens of micrometers. Even hundreds of microns, and the etching depth of the general etch process is less than 1 micron.
  • a deep silicon etching process is required to have a faster etching rate, a higher selectivity ratio, and a larger aspect ratio.
  • the typical deep silicon etching process is the Bosch process.
  • the entire etching process is an alternating cycle of the etching step and the deposition step.
  • 1 shows a flow chart of the Bosch process.
  • the Bosch process includes: step S1, a deposition step; step S2, an etching step; step S3, determining whether the etching reaches a predetermined depth, and if so, ending Etching; if no, go to step S1 and repeat steps S1 to S3.
  • the process gas in the etching step S2 is usually SF 6 (sulfur hexafluoride). Although the gas has a high etching rate in etching the silicon substrate, it is difficult to be characterized by isotropic etching.
  • the process is added to the deposition step S1, the process gas of the deposition step S1 is usually C 4 F 8 (carbon tetrafluoride), and the deposition step S1 deposits a polymer protective layer on the sidewalls.
  • the protective sidewalls are not etched, thereby enabling etching only on the vertical plane.
  • F (fluorine) radicals and 8 plasmas are generated, of which The etching of silicon is mainly performed by the process of reacting F radicals and silicon to form SiF 4 to complete the wind, 3 ⁇ 4 ⁇ T chemical etching; at the same time, SF X plasma has physical bombardment effect on silicon, that is, physical etching The etching of silicon is only a small contribution to the silicon etching compared to the chemical etching of the F radical.
  • a higher process pressure (usually between 50 and 500 mT) is usually employed.
  • the etching of silicon is mainly based on the chemical etching of F radicals, and higher density F radicals can be obtained under higher process pressure, and more F radicals lead to higher silicon.
  • Etching rate is usually employed.
  • the etching of the polymer produced in the deposition step S1 is mainly based on the bombardment of ions, and the collision of various particles increases under a high process pressure, and the energy of the ions is significantly lower, thereby This results in a significantly lower etch rate of the polymer.
  • the etching step is usually performed at a lower process pressure, but the lower process pressure causes a decrease in the etching rate of the silicon, which in turn leads to etching.
  • the choice is lower than the ratio.
  • the invention provides a deep silicon etching method for suppressing the gradual increase of the etched bottom polymer during the deep silicon etching process, thereby suppressing the generation of the micromask or the silicon grass, thereby improving the etching rate of the deep silicon etching. And choose the ratio and improve the roughness of the etched bottom.
  • an embodiment of the present invention provides a deep silicon etching method, the method comprising:
  • a deposition step of forming a protective layer to protect the etched sidewalls Etching step of etching the etched bottom and the etched sidewall;
  • the bottom smoothing step further includes: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and, the bottom smoothing step adopts a process pressure less than The process pressure used in the etching step,
  • the bottom smoothing step is performed at least once throughout the deep silicon etch process.
  • the bottom smoothing step is performed once every N deposition steps and etching steps, N being a positive integer.
  • the bottom smoothing step is performed after the etching step.
  • the process pressure used in the etching step is 40 to 500 mT.
  • the process pressure is 50 to 300 mT.
  • the process pressure used in the bottom smoothing step is 2 to 50 mT.
  • the upper radio frequency power used in the bottom smoothing step is 50 ⁇ 1000W
  • the lower radio frequency power is 0 ⁇ 50W
  • the flow rate of the fluorine-containing gas is 5 ⁇ 500sccm.
  • the fluorine-containing gas used in the bottom smoothing step is CF 4 , SF 6 , NF 3 , or
  • the process time of the bottom smoothing step is 0.5 ⁇ 10S.
  • the deep silicon etching method provided by the embodiment of the present invention has a bottom smoothing step, and a smaller process pressure is used in the step, so that the energy of the plasma increases, and the energy increase of the plasma can improve the deposition.
  • the etching rate of the polymer produced in the step is etched, which in turn enhances the etching of the polymer and inhibits the increase of the polymer at the bottom of the etching.
  • the deep silicon etching method provided by the embodiment of the present invention can remove the residual polymer at the bottom of the etching in time due to the introduction of the bottom smoothing step, and effectively improve the excessive etching under the high process pressure.
  • the bottom unevenness caused by the rate can suppress the increase of the roughness of the bottom of the etching and improve the smoothness of the bottom of the etching.
  • the deep silicon etching method provided by the embodiment of the present invention can suppress the increase of the etched bottom polymer and improve the roughness of the etched bottom, thereby suppressing the etching due to the introduction of the bottom ⁇ ⁇ .
  • the increase in the bottom polymer leads to the formation of micro-masks and even silice.
  • the deep silicon etching method provided by the embodiment of the present invention can effectively suppress the formation of the micro-mask or even the silicon grass by introducing the bottom smoothing step, so that a higher process pressure can be adopted in the etching step.
  • the etching rate and the etching selectivity ratio are improved.
  • Figure 1 is a flow chart of a Bosch process in the prior art
  • FIG. 3 is a flowchart of a deep silicon etching method according to an embodiment of the present invention.
  • FIG. 4 is an effect diagram of deep silicon etching according to an embodiment of the present invention. detailed description
  • Embodiments of the present invention provide a deep silicon etching method, the method comprising: a deposition step of forming a protective layer to protect an etched sidewall; and an etching step of etching the etched bottom and the etched sidewall; The deposition step and the etching step are repeated until the entire deep silicon etching process is completed.
  • a bottom smoothing step is further included, the bottom smoothing step is: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and the bottom smoothing step is adopted
  • the process pressure is less than the process pressure used in the etching step, and the bottom smoothing step is performed at least once throughout the deep silicon etching process.
  • the sinking can be performed each time After the stacking step and the etching step, the bottom smoothing step is performed once; the bottom smoothing step may also be interlaced by one ,1, for example, after each N deposition steps and etching steps, the bottom smoothing step is performed, N It is a positive integer; in addition, the bottom smoothing step may be performed at non-fixed intervals depending on the degree of bottom roughness of the entire process or the amount of polymer remaining at the bottom of the etch.
  • the size of N may be set according to actual etching needs, for example, according to the amount of polymer remaining at the bottom of the etching, for example, setting N to 2, and performing the above after each deposition step and etching step is performed.
  • Bottom smoothing step For example, if N is set to 3, the deposition step and the etching step are performed three times, and the bottom smoothing step is performed once.
  • the bottom smoothing step for the bottom smoothing step for reducing the bottom roughness, is preferably performed after the etching step. In order to better achieve smoothness of the etched bottom, more preferably, a bottom smoothing step is performed after each deposition step and etching step.
  • the deep silicon etching method provided by the embodiment of the present invention will be described below with reference to a specific example. Referring to FIG. 3, a flow chart of a deep silicon etching method according to an embodiment of the present invention is shown.
  • the deep silicon etching method includes:
  • Step S101 a deposition step.
  • the depositing step is: creating a protective layer to protect the etched sidewalls.
  • Step S102 an etching step.
  • the etching step is: etching the etched bottom and the etched sidewall.
  • Step S103 a bottom smoothing step.
  • the bottom smoothing step is: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and, the bottom smoothing step employs a process pressure lower than a process pressure employed in the etching step.
  • Step S104 determining whether the etching reaches a predetermined depth, and if yes, ending the etching; if not, proceeding to step S101, and repeating steps S101 to S104.
  • the residual polymer is removed in time due to the introduction of the bottom smoothing step.
  • the micro-mask or the silicon grass formed by the polymer of the A field is not smoothed by the higher process pressure in the prior art, so that a higher process pressure can be used in the etching step.
  • the process pressure used in the etching step is 40-500 mT, and preferably, the process pressure is 50-300 mT.
  • the deep silicon etching method provided by the embodiment of the present invention adopts a high process pressure in the etching step. It is possible to increase the etching rate and the etching selectivity while suppressing the formation of the micro-mask or the silicon grass.
  • the process pressure used is 2 to 50 mT.
  • the bottom irregularities due to the higher etch rate can be removed by the fluorine-containing gas, so that better uniformity can be obtained at lower process pressures.
  • the energy of the plasma is higher, and the etching effect on the polymer is stronger, and the formation of the micro-mask or the silicon grass caused by the polymer residue can be effectively suppressed.
  • the power of the upper radio frequency power source used is
  • the lower RF power supply is 0 ⁇ 50W
  • the flow rate of the fluorine-containing gas is 5 ⁇ 500sccm.
  • the fluorine-containing gas used in the bottom smoothing step may be one of CF 4 , SF 6 , NF 3 , or CHF 3 , or may be another fluorine-containing gas.
  • the fluorine-containing gas can effectively react with C (carbon), so that the fluorine-containing gas in the bottom smoothing step can effectively remove the residual polymer and improve the smoothness of the bottom of the etching.
  • the process time for the bottom smoothing step is 0.5 ⁇ 10S.
  • the etching time and deposition process are both 0.5 to 20 seconds.
  • the process time of the bottom smoothing step can be adjusted according to the length of the process time of the etching step. The adjustment principle is as follows: If the process time of the bottom smoothing step is too short, the bottom smoothing effect is affected; If the process time of the step is too long, it will affect the production efficiency of the entire deep silicon etching process.
  • FIG. 4 illustrates an effect diagram of deep silicon etching provided by an embodiment of the present invention.
  • the deep silicon etching method is performed by the deep silicon etching method provided by the embodiment of the present invention, and the etching bottom is smooth, and no silicon grass phenomenon occurs.
  • the deep silicon etching method provided by the embodiment of the invention has the following advantages:
  • the deep silicon etching method provided by the embodiment of the present invention can suppress the increase of the polymer at the bottom of the etching during the deep silicon etching process. This is because: a smaller process pressure is used in the bottom smoothing step, so the energy of the plasma increases, and the energy increase of the plasma can increase the etching rate of the polymer produced in the deposition step, thereby enhancing The etching of the polymer and the increase in the polymer at the bottom of the etch.
  • the deep silicon etching method provided by the embodiment of the invention can improve the roughness of the bottom of the etching.
  • the residual polymer in the deposition step will cause the bottom of the etching to be unsmooth, and cause uneven etching of the silicon at the bottom of the etching, thereby increasing the roughness of the bottom of the etching.
  • the increased roughness of the etched bottom will make it possible to: even if the polymer formed at the bottom of the etch step in the deposition step is etched by extending the process time of the etching step, the etched bottom is not uniformly etched due to the silicon surface. However, it still has a large roughness.
  • the introduction of the bottom smoothing step can remove the residual polymer at the bottom of the etching in time, and effectively improve the bottom unevenness caused by the excessive etching rate under a high process pressure. Thereby, it is possible to suppress an increase in the roughness of the bottom of the etching and maintain the smoothness of the bottom of the etching. Therefore, the deep silicon etching method provided by the embodiment of the present invention can improve the roughness of the etching bottom at a lower process pressure.
  • the deep silicon etching method provided by the embodiment of the present invention can suppress the formation of a micromask or even a silicon grass. Since the introduction of the bottom smoothing step can suppress the increase of the etched bottom polymer and improve the roughness of the etched bottom, the formation of the micro-mask or even the silice due to the increase of the etched bottom polymer is suppressed.
  • the deep silicon etching method provided by the embodiment of the invention can improve the etching rate and the etching selectivity.
  • deep silicon etching is required at a lower process pressure, thereby causing a decrease in etching rate and etching selectivity.
  • a higher process pressure can be used in the etching step, thereby improving the etching rate and etching selection. Choose ratio.

Abstract

A deep silicon etch method comprises: a deposition step (S101), generating a protection layer to protect an etch side wall; an etch step (S102), etching an etch bottom and the etch side wall; and repeating the deposition step (S101) and the etch step (S102) until the whole deep silicon etch process is finished; and further comprises a bottom smoothing step (S103), the bottom smoothing step (S103) being: performing plasma processing by using a fluoride gas to remove polymers generated on the etch bottom because of deposition, a process pressure used in the bottom smoothing step (S103) being less than a process pressure used in the etch step (S102), and the bottom smoothing step (S103) being performed at least once in the whole deep silicon etch process. By means of the deep silicon etch method, in the deep silicon etch process, polymers on the etch bottom are suppressed from gradually increasing, and micro masks or silicon grass is suppressed from generating, so as to improve an etch speed and a selection ratio of the deep silicon etch, and improve the roughness of the etch bottom.

Description

深硅刻蚀方法  Deep silicon etching method
技术领域  Technical field
本发明涉及半导体制造领域, 特别是涉及一种深硅刻蚀方法。 背景技术  The present invention relates to the field of semiconductor fabrication, and more particularly to a deep silicon etching method. Background technique
随着 MEMS (微机电系统, Micro-Electro-Mechanical Systems )器件和 MEMS 系统被越来越广泛的应用于汽车和消费电子领域, 以及 TSV (通孔 刻蚀, Through Silicon Etch )技术在未来封装领域的广阔前景, 干法等离子 体深硅刻蚀工艺逐渐成为 MEMS加工领域及 TSV技术中的主流工艺之一。  MEMS (Micro-Electro-Mechanical Systems) devices and MEMS systems are increasingly used in automotive and consumer electronics, as well as TSV (Through Silicon Etch) technology in future packaging applications. The broad prospects, dry plasma deep silicon etching process has gradually become one of the mainstream processes in the field of MEMS processing and TSV technology.
深硅刻蚀工艺相对于一般的硅刻蚀工艺的主要区别在于:深硅刻蚀工艺 的刻蚀深度远大于一般的娃刻蚀工艺,深娃刻蚀工艺的刻蚀深度一般为几十 微米甚至上百微米, 而一般娃刻蚀工艺的刻蚀深度则小于 1微米。 为了刻蚀 厚度为几十微米的硅材料, 要求深硅刻蚀工艺具有更快的刻蚀速率、 更高的 选择比及更大的深宽比。  The main difference between the deep silicon etching process and the general silicon etching process is that the etching depth of the deep silicon etching process is much larger than that of the general silicon etching process, and the etching depth of the deep silicon etching process is generally several tens of micrometers. Even hundreds of microns, and the etching depth of the general etch process is less than 1 micron. In order to etch a silicon material having a thickness of several tens of micrometers, a deep silicon etching process is required to have a faster etching rate, a higher selectivity ratio, and a larger aspect ratio.
目前典型的深硅刻蚀工艺为 Bosch工艺。在 Bosch工艺中,整个刻蚀过 程为刻蚀步骤与沉积步骤的交替循环。 图 1示出了 Bosch工艺的流程图, 如 图 1所示, Bosch工艺包括: 步骤 Sl、 沉积步骤; 步骤 S2、 刻蚀步骤; 步 骤 S3、 判断刻蚀是否达到预定的深度, 若是, 则结束刻蚀; 若否, 则转到 步骤 S1 ,重复执行步骤 S1至 S3。其中,刻蚀步骤 S2的工艺气体通常为 SF6 (六氟化硫), 尽管该气体在刻蚀硅基底方面具有很高的刻蚀速率, 但由于 其各向同性刻蚀的特点, 很难控制侧壁形貌。 为了减少对侧壁的刻蚀, 该工 艺加入了沉积步骤 S1 , 沉积步骤 S1的工艺气体通常为 C4F8 (四氟化碳), 沉积步骤 S1在侧壁沉积一层聚合物保护层来保护侧壁不被刻蚀, 从而实现 只在垂直面上的刻蚀。 The typical deep silicon etching process is the Bosch process. In the Bosch process, the entire etching process is an alternating cycle of the etching step and the deposition step. 1 shows a flow chart of the Bosch process. As shown in FIG. 1, the Bosch process includes: step S1, a deposition step; step S2, an etching step; step S3, determining whether the etching reaches a predetermined depth, and if so, ending Etching; if no, go to step S1 and repeat steps S1 to S3. The process gas in the etching step S2 is usually SF 6 (sulfur hexafluoride). Although the gas has a high etching rate in etching the silicon substrate, it is difficult to be characterized by isotropic etching. Control the sidewall morphology. In order to reduce the etching of the sidewalls, the process is added to the deposition step S1, the process gas of the deposition step S1 is usually C 4 F 8 (carbon tetrafluoride), and the deposition step S1 deposits a polymer protective layer on the sidewalls. The protective sidewalls are not etched, thereby enabling etching only on the vertical plane.
等离子体深硅刻蚀过程中, 会产生 F (氟) 自由基和 8 等离子, 其中 对硅的刻蚀主要是通过 F自由基和硅反应生成 SiF4的过程来完风的, ¾ 禹 T 化学刻蚀; 同时 SFX等离子对硅有物理轰击作用, 也即通过物理刻蚀的方式 对硅进行刻蚀, 只是与 F自由基的化学刻蚀相比, 物理刻蚀对硅刻蚀的贡献 较小。 During plasma deep silicon etching, F (fluorine) radicals and 8 plasmas are generated, of which The etching of silicon is mainly performed by the process of reacting F radicals and silicon to form SiF 4 to complete the wind, 3⁄4 禹T chemical etching; at the same time, SF X plasma has physical bombardment effect on silicon, that is, physical etching The etching of silicon is only a small contribution to the silicon etching compared to the chemical etching of the F radical.
在刻蚀步骤 S2中, 为了获得更快的硅刻蚀速率, 通常采用较高的工艺 压力(通常在 50 ~ 500mT之间)。 这是因为对于硅的刻蚀, 主要是以 F自由 基的化学刻蚀为主,在较高的工艺压力下可以获得更高密度的 F自由基, 更 多的 F自由基导致更高的硅刻蚀速率。 然而, 对沉积步骤 S1中产生的聚合 物的刻蚀, 主要是以离子的轰击作用为主, 在较高的工艺压力下各种粒子的 碰撞增加, 离子所具有的能量显著变低, 从而会导致聚合物的刻蚀速率显著 低。 由于聚合物的刻蚀速率的降低, 沉积步骤 S1中的产生聚合物难以完 全刻蚀去除, 并在后续工艺步骤中逐渐地增加, 经过多次沉积步骤 S1和刻 蚀步骤 S2循环后, 会形成类似"微掩膜 "(micro-mask )的形态, 严重时甚至 会形成硅草, 图 2示出了深硅刻蚀中产生的硅草的电镜图。微掩膜或者硅草 的产生会增大刻蚀底部的粗糙度, 并且降低深硅刻蚀的质量。  In the etching step S2, in order to obtain a faster silicon etching rate, a higher process pressure (usually between 50 and 500 mT) is usually employed. This is because the etching of silicon is mainly based on the chemical etching of F radicals, and higher density F radicals can be obtained under higher process pressure, and more F radicals lead to higher silicon. Etching rate. However, the etching of the polymer produced in the deposition step S1 is mainly based on the bombardment of ions, and the collision of various particles increases under a high process pressure, and the energy of the ions is significantly lower, thereby This results in a significantly lower etch rate of the polymer. Due to the decrease of the etching rate of the polymer, the polymer produced in the deposition step S1 is difficult to be completely etched and removed, and gradually increases in the subsequent process steps. After a plurality of deposition steps S1 and etching steps S2, a polymer is formed. Similar to the "micro-mask" morphology, even in the case of severe siliceous, Figure 2 shows an electron micrograph of the silicon grass produced in deep silicon etching. The generation of a micromask or silica will increase the roughness of the etched bottom and reduce the quality of the deep silicon etch.
为了避免微掩膜或者硅草的产生,在现有技术中,通常在较低的工艺压 力下进行刻蚀步骤, 但是较低的工艺压力会导致硅刻蚀速率的降低, 进而导 致刻蚀的选择比降低。 发明内容  In order to avoid the generation of micro-mask or silicon grass, in the prior art, the etching step is usually performed at a lower process pressure, but the lower process pressure causes a decrease in the etching rate of the silicon, which in turn leads to etching. The choice is lower than the ratio. Summary of the invention
本发明提供一种深硅刻蚀方法,从而在深硅刻蚀过程中抑制刻蚀底部聚 合物的逐渐增加, 以抑制微掩膜或者硅草的产生, 从而提高深硅刻蚀的刻蚀 速率以及选择比, 并改善刻蚀底部的粗糙度。  The invention provides a deep silicon etching method for suppressing the gradual increase of the etched bottom polymer during the deep silicon etching process, thereby suppressing the generation of the micromask or the silicon grass, thereby improving the etching rate of the deep silicon etching. And choose the ratio and improve the roughness of the etched bottom.
为了实现上述发明目的,本发明实施例提供了一种深硅刻蚀方法,该方 法包括:  In order to achieve the above object, an embodiment of the present invention provides a deep silicon etching method, the method comprising:
沉积步骤, 生成保护层以对刻蚀侧壁进行保护; 刻蚀步骤, 对刻蚀底部和刻蚀侧壁进行刻蚀; a deposition step of forming a protective layer to protect the etched sidewalls; Etching step of etching the etched bottom and the etched sidewall;
重复所述沉积步骤和刻蚀步骤至整个深硅刻蚀过程结束;  Repeating the deposition step and the etching step until the end of the entire deep silicon etching process;
其中, 还包括底部平滑步骤, 所述底部平滑步骤为: 利用含氟气体执行 等离子体处理, 以去除刻蚀底部由于沉积产生的聚合物; 并且, 所述底部平 滑步骤采用的工艺压力小于所述刻蚀步骤采用的工艺压力,  The bottom smoothing step further includes: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and, the bottom smoothing step adopts a process pressure less than The process pressure used in the etching step,
在整个深硅刻蚀过程中执行所述底部平滑步骤至少一次。  The bottom smoothing step is performed at least once throughout the deep silicon etch process.
优选地, 在每执行 N次沉积步骤和刻蚀步骤之后, 执行一次所述底部 平滑步骤, N为正整数。  Preferably, the bottom smoothing step is performed once every N deposition steps and etching steps, N being a positive integer.
优选地, 在所述刻蚀步骤之后执行所述底部平滑步骤。  Preferably, the bottom smoothing step is performed after the etching step.
优选地, 所述刻蚀步骤中采用的工艺压力为 40 ~ 500mT。  Preferably, the process pressure used in the etching step is 40 to 500 mT.
优选地, 所述工艺压力为 50 ~ 300mT。  Preferably, the process pressure is 50 to 300 mT.
优选地, 所述底部平滑步骤中采用的工艺压力为 2 ~ 50mT。  Preferably, the process pressure used in the bottom smoothing step is 2 to 50 mT.
优选地, 所述底部平滑步骤中采用的上射频电源功率为 50 ~ 1000W、 下射频电源功率为 0 ~ 50W, 所述含氟气体的流量为 5 ~ 500sccm。  Preferably, the upper radio frequency power used in the bottom smoothing step is 50 ~ 1000W, the lower radio frequency power is 0 ~ 50W, and the flow rate of the fluorine-containing gas is 5 ~ 500sccm.
优选地, 所述底部平滑步骤中采用的含氟气体为 CF4、 SF6、 NF3、 或Preferably, the fluorine-containing gas used in the bottom smoothing step is CF 4 , SF 6 , NF 3 , or
CHF3中的一种。 One of CHF 3 .
优选地, 所述底部平滑步骤的工艺时间为 0.5 ~ 10S。  Preferably, the process time of the bottom smoothing step is 0.5 ~ 10S.
本发明的有益效果包括:  Advantageous effects of the present invention include:
其一, 本发明实施例提供的深硅刻蚀方法, 由于引入了底部平滑步骤, 且在该步骤中采用了较小的工艺压力, 因此等离子的能量增加, 而等离子的 能量增加能够提高对沉积步骤中所产生的聚合物进行刻蚀的刻蚀速率,进而 能够加强对聚合物的刻蚀作用, 并抑制刻蚀底部聚合物的增加。  In one embodiment, the deep silicon etching method provided by the embodiment of the present invention has a bottom smoothing step, and a smaller process pressure is used in the step, so that the energy of the plasma increases, and the energy increase of the plasma can improve the deposition. The etching rate of the polymer produced in the step is etched, which in turn enhances the etching of the polymer and inhibits the increase of the polymer at the bottom of the etching.
其二, 本发明实施例提供的深硅刻蚀方法, 由于引入了底部平滑步骤, 因而能够及时去除刻蚀底部残留的聚合物,并且有效地改善因较高的工艺压 力下的过快刻蚀速率而导致的底部不平整现象,从而能够抑制刻蚀底部的粗 糙程度的增加, 提高刻蚀底部的平滑程度。 其三, 本发明实施例提供的深硅刻蚀方法, 由于引入了底 ^于 'Τ ^, 因而能够抑制刻蚀底部聚合物的增加且改善刻蚀底部的粗糙度,进而抑制了 由于刻蚀底部聚合物的增加所导致的微掩膜甚至硅草的形成。 Secondly, the deep silicon etching method provided by the embodiment of the present invention can remove the residual polymer at the bottom of the etching in time due to the introduction of the bottom smoothing step, and effectively improve the excessive etching under the high process pressure. The bottom unevenness caused by the rate can suppress the increase of the roughness of the bottom of the etching and improve the smoothness of the bottom of the etching. Thirdly, the deep silicon etching method provided by the embodiment of the present invention can suppress the increase of the etched bottom polymer and improve the roughness of the etched bottom, thereby suppressing the etching due to the introduction of the bottom Τ ^. The increase in the bottom polymer leads to the formation of micro-masks and even silice.
其四, 本发明实施例提供的深硅刻蚀方法, 由于引入了底部平滑步骤, 能够有效抑制微掩膜甚至硅草的形成,因此在刻蚀步骤中可以采用较高的工 艺压力, 由此而提高了刻蚀速率和刻蚀选择比。 附图说明  Fourthly, the deep silicon etching method provided by the embodiment of the present invention can effectively suppress the formation of the micro-mask or even the silicon grass by introducing the bottom smoothing step, so that a higher process pressure can be adopted in the etching step. The etching rate and the etching selectivity ratio are improved. DRAWINGS
本发明的上述和 /或附加的方面和优点从结合下面附图对实施例的描述 中将变得明显和容易理解, 其中:  The above and/or additional aspects and advantages of the present invention will become apparent and readily understood from
图 1为现有技术中 Bosch工艺的流程图;  Figure 1 is a flow chart of a Bosch process in the prior art;
图 2为现有技术的深硅刻蚀中产生的硅草的电镜图;  2 is an electron micrograph of a silicon grass produced in a prior art deep silicon etching;
图 3为本发明实施例提供的深硅刻蚀方法的流程图;  3 is a flowchart of a deep silicon etching method according to an embodiment of the present invention;
图 4为本发明实施例提供的深硅刻蚀的效果图。 具体实施方式  FIG. 4 is an effect diagram of deep silicon etching according to an embodiment of the present invention. detailed description
为使本领域的技术人员更好地理解本发明的技术方案,下面结合附图对 本发明实施例提供的深硅刻蚀方法进行详细描述。  In order to enable those skilled in the art to better understand the technical solutions of the present invention, the deep silicon etching method provided by the embodiments of the present invention will be described in detail below with reference to the accompanying drawings.
本发明实施例提供了一种深硅刻蚀方法, 该方法包括: 沉积步骤, 生成 保护层以对刻蚀侧壁进行保护;刻蚀步骤,对刻蚀底部和刻蚀侧壁进行刻蚀; 重复所述沉积步骤和刻蚀步骤至整个深硅刻蚀过程结束。在该深硅刻蚀方法 中, 还包括底部平滑步骤, 该底部平滑步骤为: 利用含氟气体执行等离子体 处理, 以去除刻蚀底部由于沉积产生的聚合物; 并且, 所述底部平滑步骤采 用的工艺压力小于所述刻蚀步骤采用的工艺压力,在整个深硅刻蚀过程中执 行所述底部平滑步骤至少一次。  Embodiments of the present invention provide a deep silicon etching method, the method comprising: a deposition step of forming a protective layer to protect an etched sidewall; and an etching step of etching the etched bottom and the etched sidewall; The deposition step and the etching step are repeated until the entire deep silicon etching process is completed. In the deep silicon etching method, a bottom smoothing step is further included, the bottom smoothing step is: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and the bottom smoothing step is adopted The process pressure is less than the process pressure used in the etching step, and the bottom smoothing step is performed at least once throughout the deep silicon etching process.
在上述交替循环执行沉积步骤和刻蚀步骤的过程中,可以在每次执行沉 积步骤和刻蚀步骤之后, 执行一次上述底部平滑步骤; 也可以以一疋 1 隔 行上述底部平滑步骤, 例如, 在每执行 N次沉积步骤和刻蚀步骤之后, 执 行一次所述底部平滑步骤, N为正整数; 另夕卜, 根据整个工艺过程的底部粗 糙度程度的不同或者刻蚀底部残留的聚合物多少的不同,也可以以非固定的 间隔执行上述底部平滑步骤。 During the above-described alternate cycle of performing the deposition step and the etching step, the sinking can be performed each time After the stacking step and the etching step, the bottom smoothing step is performed once; the bottom smoothing step may also be interlaced by one ,1, for example, after each N deposition steps and etching steps, the bottom smoothing step is performed, N It is a positive integer; in addition, the bottom smoothing step may be performed at non-fixed intervals depending on the degree of bottom roughness of the entire process or the amount of polymer remaining at the bottom of the etch.
其中,可以根据实际刻蚀需要,例如根据刻蚀底部残留的聚合物的多少, 对 N的大小进行设置, 例如, 设置 N为 2, 在每执行两次沉积步骤和刻蚀步 骤之后执行一次上述底部平滑步骤。 例如, 设置 N为 3, 则沉积步骤和刻蚀 步骤执行三次, 底部平滑步骤执行一次。  Wherein, the size of N may be set according to actual etching needs, for example, according to the amount of polymer remaining at the bottom of the etching, for example, setting N to 2, and performing the above after each deposition step and etching step is performed. Bottom smoothing step. For example, if N is set to 3, the deposition step and the etching step are performed three times, and the bottom smoothing step is performed once.
本发明实施例中,对于用于减小底部粗糙度的底部平滑步骤,优选地在 所述刻蚀步骤之后执行所述底部平滑步骤。 为了更好地实现刻蚀底部的平 滑, 更优选地, 在每执行一次沉积步骤和刻蚀步骤之后, 即执行一次底部平 滑步骤。  In the embodiment of the present invention, for the bottom smoothing step for reducing the bottom roughness, the bottom smoothing step is preferably performed after the etching step. In order to better achieve smoothness of the etched bottom, more preferably, a bottom smoothing step is performed after each deposition step and etching step.
下面结合一个具体的示例对本发明实施例提供的深硅刻蚀方法进行说 明。请参阅图 3,其示出了本发明实施例提供的一种深硅刻蚀方法的流程图, 该深硅刻蚀方法包括:  The deep silicon etching method provided by the embodiment of the present invention will be described below with reference to a specific example. Referring to FIG. 3, a flow chart of a deep silicon etching method according to an embodiment of the present invention is shown. The deep silicon etching method includes:
步骤 S101、 沉积步骤。 所述沉积步骤为: 生成保护层以对刻蚀侧壁进 行保护。  Step S101, a deposition step. The depositing step is: creating a protective layer to protect the etched sidewalls.
步骤 S102、 刻蚀步骤。 所述刻蚀步骤为: 对刻蚀底部和刻蚀侧壁进行 刻蚀。  Step S102, an etching step. The etching step is: etching the etched bottom and the etched sidewall.
步骤 S103、 底部平滑步骤。 所述底部平滑步骤为: 利用含氟气体执行 等离子体处理, 以去除刻蚀底部由于沉积产生的聚合物; 并且, 所述底部平 滑步骤采用的工艺压力小于所述刻蚀步骤采用的工艺压力。  Step S103, a bottom smoothing step. The bottom smoothing step is: performing a plasma treatment using a fluorine-containing gas to remove a polymer generated by deposition at the bottom of the etching; and, the bottom smoothing step employs a process pressure lower than a process pressure employed in the etching step.
步骤 S104、 判断刻蚀是否达到预定的深度, 若是, 则结束刻蚀; 若否, 则转到步骤 S101 , 重复执行步骤 S101至 S104。  Step S104: determining whether the etching reaches a predetermined depth, and if yes, ending the etching; if not, proceeding to step S101, and repeating steps S101 to S104.
本发明实施例中,由于底部平滑步骤的引入,及时去除了残留的聚合物, 避免了现有技术中较高的工艺压力导致的刻蚀底部的不平滑以 A田" 的聚合物所形成的微掩膜或硅草, 因此, 可以在刻蚀步骤中采用较高的工艺 压力, 刻蚀步骤中采用的工艺压力为 40 ~ 500mT, 优选地, 采用的工艺压力 为 50 ~ 300mT。本发明实施例提供的深硅刻蚀方法,通过在刻蚀步骤中采用 较高的工艺压力, 能够在抑制微掩膜或硅草形成的同时, 提高刻蚀速率以及 刻蚀选择比。 In the embodiment of the present invention, the residual polymer is removed in time due to the introduction of the bottom smoothing step. The micro-mask or the silicon grass formed by the polymer of the A field is not smoothed by the higher process pressure in the prior art, so that a higher process pressure can be used in the etching step. The process pressure used in the etching step is 40-500 mT, and preferably, the process pressure is 50-300 mT. The deep silicon etching method provided by the embodiment of the present invention adopts a high process pressure in the etching step. It is possible to increase the etching rate and the etching selectivity while suppressing the formation of the micro-mask or the silicon grass.
对于本发明实施例提供的底部平滑步骤, 所采用的工艺压力为 2 ~ 50mT。 在底部平滑步骤中采用较低的工艺压力下, 可以通过含氟气体去除 由于较高的刻蚀速率所导致的底部不平整现象, 因此在较低的工艺压力下可 以获得更好的均匀性, 同时在较低压力下, 等离子的能量更高, 对于聚合物 的刻蚀作用较强, 能够有效抑制聚合物残留导致的微掩膜或硅草的形成。  For the bottom smoothing step provided by the embodiment of the present invention, the process pressure used is 2 to 50 mT. At lower process pressures in the bottom smoothing step, the bottom irregularities due to the higher etch rate can be removed by the fluorine-containing gas, so that better uniformity can be obtained at lower process pressures. At the same time, at lower pressure, the energy of the plasma is higher, and the etching effect on the polymer is stronger, and the formation of the micro-mask or the silicon grass caused by the polymer residue can be effectively suppressed.
本发明实施例提供的底部平滑步骤中, 所采用的上射频电源功率为 In the bottom smoothing step provided by the embodiment of the present invention, the power of the upper radio frequency power source used is
50 ~ 1000W, 下射频电源功率为 0 ~ 50W, 所述含氟气体的流量为 5 ~ 500sccm。 50 ~ 1000W, the lower RF power supply is 0 ~ 50W, and the flow rate of the fluorine-containing gas is 5 ~ 500sccm.
另夕卜,底部平滑步骤中采用的含氟气体可以是 CF4、 SF6、 NF3、或 CHF3 中的一种, 也可以是其它的含氟气体。 含氟气体能够有效地和 C (碳)发生 反应, 因此在底部平滑步骤采用含氟气体能够有效的去除残留的聚合物, 并 改善刻蚀底部的平滑度。 Further, the fluorine-containing gas used in the bottom smoothing step may be one of CF 4 , SF 6 , NF 3 , or CHF 3 , or may be another fluorine-containing gas. The fluorine-containing gas can effectively react with C (carbon), so that the fluorine-containing gas in the bottom smoothing step can effectively remove the residual polymer and improve the smoothness of the bottom of the etching.
底部平滑步骤的工艺时间为 0.5 ~ 10S。一般来说,刻蚀步骤和沉积步骤 的工艺时间均为 0.5 ~ 20S。在实际工艺中, 可以根据刻蚀步骤的工艺时间的 长短来调整底部平滑步骤的工艺时间, 其调整原则是: 若底部平滑步骤的工 艺时间过短, 则会影响底部平滑的效果; 若底部平滑步骤的工艺时间过长, 则又会影响整个深硅刻蚀过程的生产效率。  The process time for the bottom smoothing step is 0.5 ~ 10S. Generally, the etching time and deposition process are both 0.5 to 20 seconds. In the actual process, the process time of the bottom smoothing step can be adjusted according to the length of the process time of the etching step. The adjustment principle is as follows: If the process time of the bottom smoothing step is too short, the bottom smoothing effect is affected; If the process time of the step is too long, it will affect the production efficiency of the entire deep silicon etching process.
请参阅图 4, 其示出了本发明实施例提供的深硅刻蚀的效果图。 如图 4 所示, 通过本发明实施例提供的深硅刻蚀方法进行深硅刻蚀, 其刻蚀底部是 平滑的, 没有硅草现象的出现。 本发明实施例提供的深硅刻蚀方法具有下述优点: Please refer to FIG. 4 , which illustrates an effect diagram of deep silicon etching provided by an embodiment of the present invention. As shown in FIG. 4, the deep silicon etching method is performed by the deep silicon etching method provided by the embodiment of the present invention, and the etching bottom is smooth, and no silicon grass phenomenon occurs. The deep silicon etching method provided by the embodiment of the invention has the following advantages:
其一,采用本发明实施例提供的深硅刻蚀方法, 能够在深硅刻蚀过程中 抑制刻蚀底部的聚合物的增加。这是因为: 在底部平滑步骤中采用了较小的 工艺压力, 因此等离子的能量增加, 而等离子的能量增加能够提高对沉积步 骤中所产生的聚合物进行刻蚀的刻蚀速率,进而能够加强对聚合物的刻蚀作 用, 并抑制刻蚀底部聚合物的增加。  First, the deep silicon etching method provided by the embodiment of the present invention can suppress the increase of the polymer at the bottom of the etching during the deep silicon etching process. This is because: a smaller process pressure is used in the bottom smoothing step, so the energy of the plasma increases, and the energy increase of the plasma can increase the etching rate of the polymer produced in the deposition step, thereby enhancing The etching of the polymer and the increase in the polymer at the bottom of the etch.
其二,采用本发明实施例提供的深硅刻蚀方法, 能够改善刻蚀底部的粗 糙度。 如现有技术中所述, 在沉积步骤中残留的聚合物将造成刻蚀底部不平 滑, 并导致对刻蚀底部的硅的刻蚀不均匀, 进而使得刻蚀底部的粗糙程度增 大, 而刻蚀底部的粗糙程度增大, 将使得: 即使通过延长刻蚀步骤的工艺时 间将沉积步骤中形成在刻蚀底部的聚合物刻蚀干净,刻蚀底部也会因硅表面 未被均匀刻蚀而依然具有较大的粗糙度, 这种情况下, 即使继续刻蚀, 也依 然不能使得刻蚀底部的硅表面变得平滑。 而本发明实施例中, 通过底部平滑 步骤的引入, 能够及时去除刻蚀底部残留的聚合物, 并且有效地改善因较高 的工艺压力下的过快刻蚀速率而导致的底部不平整现象,从而能够抑制刻蚀 底部的粗糙程度的增加, 保持刻蚀底部的平滑程度。 因而, 本发明实施例提 供的深硅刻蚀方法, 能够在较低的工艺压力下改善刻蚀底部的粗糙度。  Secondly, the deep silicon etching method provided by the embodiment of the invention can improve the roughness of the bottom of the etching. As described in the prior art, the residual polymer in the deposition step will cause the bottom of the etching to be unsmooth, and cause uneven etching of the silicon at the bottom of the etching, thereby increasing the roughness of the bottom of the etching. The increased roughness of the etched bottom will make it possible to: even if the polymer formed at the bottom of the etch step in the deposition step is etched by extending the process time of the etching step, the etched bottom is not uniformly etched due to the silicon surface. However, it still has a large roughness. In this case, even if the etching is continued, the silicon surface at the bottom of the etching cannot be made smooth. In the embodiment of the present invention, the introduction of the bottom smoothing step can remove the residual polymer at the bottom of the etching in time, and effectively improve the bottom unevenness caused by the excessive etching rate under a high process pressure. Thereby, it is possible to suppress an increase in the roughness of the bottom of the etching and maintain the smoothness of the bottom of the etching. Therefore, the deep silicon etching method provided by the embodiment of the present invention can improve the roughness of the etching bottom at a lower process pressure.
其三,采用本发明实施例提供的深硅刻蚀方法, 能够抑制微掩膜甚至硅 草的形成。由于底部平滑步骤的引入能够抑制刻蚀底部聚合物的增加且改善 刻蚀底部的粗糙度,因而也就抑制了由于刻蚀底部聚合物的增加所导致的微 掩膜甚至硅草的形成。  Thirdly, the deep silicon etching method provided by the embodiment of the present invention can suppress the formation of a micromask or even a silicon grass. Since the introduction of the bottom smoothing step can suppress the increase of the etched bottom polymer and improve the roughness of the etched bottom, the formation of the micro-mask or even the silice due to the increase of the etched bottom polymer is suppressed.
其四,采用本发明实施例提供的深硅刻蚀方法, 能够提高刻蚀速率和刻 蚀选择比。 在现有技术中, 为了避免微掩膜甚至硅草的形成, 需要在较低的 工艺压力下进行深硅刻蚀, 由此导致了刻蚀速率和刻蚀选择比的下降。 而本 发明实施例中, 由于底部平滑步骤能够有效抑制微掩膜甚至硅草的形成, 因 此在刻蚀步骤中可以采用较高的工艺压力, 由此而提高了刻蚀速率和刻蚀选 择比。 Fourthly, the deep silicon etching method provided by the embodiment of the invention can improve the etching rate and the etching selectivity. In the prior art, in order to avoid the formation of a micromask or even a silicon grass, deep silicon etching is required at a lower process pressure, thereby causing a decrease in etching rate and etching selectivity. In the embodiment of the present invention, since the bottom smoothing step can effectively suppress the formation of the micro-mask or even the silicon grass, a higher process pressure can be used in the etching step, thereby improving the etching rate and etching selection. Choose ratio.
可以理解的是,以上实施方式仅仅是为了说明本发明的原理而采用的示 例性实施方式, 然而本发明并不局限于此。对于本领域内的普通技术人员而 言, 在不脱离本发明的精神和实质的情况下, 可以做出各种变型和改进, 这 些变型和改进也视为本发明的保护范围。  It is to be understood that the above embodiments are merely illustrative embodiments employed to illustrate the principles of the invention, but the invention is not limited thereto. Various modifications and improvements can be made by those skilled in the art without departing from the spirit and scope of the invention. These modifications and improvements are also considered to be within the scope of the invention.

Claims

权 利 要 求 书 claims
1、 一种深硅刻蚀方法, 其特征在于, 该方法包括: 1. A deep silicon etching method, characterized in that the method includes:
沉积步骤, 生成保护层以对刻蚀侧壁进行保护; Deposition step, generating a protective layer to protect the etched sidewalls;
刻蚀步骤, 对刻蚀底部和刻蚀侧壁进行刻蚀; Etching step: etching the etching bottom and etching sidewalls;
重复所述沉积步骤和刻蚀步骤至整个深硅刻蚀过程结束; Repeat the deposition step and the etching step until the entire deep silicon etching process is completed;
其中, 还包括底部平滑步骤, 所述底部平滑步骤为: 利用含氟气体执行 等离子体处理, 以去除刻蚀底部由于沉积产生的聚合物; 并且, 所述底部平 滑步骤采用的工艺压力小于所述刻蚀步骤采用的工艺压力, Wherein, a bottom smoothing step is also included, and the bottom smoothing step is: using fluorine-containing gas to perform plasma treatment to remove the polymer produced by deposition at the bottom of the etching; and, the process pressure used in the bottom smoothing step is less than the The process pressure used in the etching step,
在整个深硅刻蚀过程中执行所述底部平滑步骤至少一次。 Perform the bottom smoothing step at least once throughout the deep silicon etch process.
2、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 在每执行 N次沉 积步骤和刻蚀步骤之后, 执行一次所述底部平滑步骤, N为正整数。 2. The deep silicon etching method according to claim 1, wherein the bottom smoothing step is performed once every N times of deposition steps and etching steps, where N is a positive integer.
3、 如权利要求 2所述的深硅刻蚀方法, 其特征在于, 在所述刻蚀步骤 之后执行所述底部平滑步骤。 3. The deep silicon etching method according to claim 2, wherein the bottom smoothing step is performed after the etching step.
4、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 所述刻蚀步骤中 采用的工艺压力为 40 ~ 500mT。 4. The deep silicon etching method according to claim 1, characterized in that the process pressure used in the etching step is 40 ~ 500mT.
5、 如权利要求 4所述的深硅刻蚀方法, 其特征在于, 所述工艺压力为 50 ~ 300mT。 5. The deep silicon etching method according to claim 4, wherein the process pressure is 50 ~ 300mT.
6、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 所述底部平滑步 骤中采用的工艺压力为 2 ~ 50mT。 6. The deep silicon etching method according to claim 1, wherein the process pressure used in the bottom smoothing step is 2 ~ 50mT.
7、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 所述底部平滑步 骤中采用的上射频电源功率为 50~ 1000W、 下射频电源功率为 U~5UW, 述含氟气体的流量为 5 ~ 500sccm。 7. The deep silicon etching method according to claim 1, wherein the bottom smoothing step The power of the upper RF power supply used in this step is 50~1000W, the power of the lower RF power supply is U~5UW, and the flow rate of the fluorine-containing gas is 5~500sccm.
8、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 所述底部平滑步 骤中采用的含氟气体为 CF4、 SF6、 NF3、 或 CHF3中的一种。 8. The deep silicon etching method according to claim 1, wherein the fluorine-containing gas used in the bottom smoothing step is one of CF 4 , SF 6 , NF 3 , or CHF3.
9、 如权利要求 1所述的深硅刻蚀方法, 其特征在于, 所述底部平滑步 骤的工艺时间为 0.5~10S。 9. The deep silicon etching method according to claim 1, wherein the process time of the bottom smoothing step is 0.5~10S.
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CN105336671B (en) * 2014-07-15 2018-08-24 北京北方华创微电子装备有限公司 The deep hole bottom windowing lithographic method of silicon hole
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1848383A (en) * 2005-12-02 2006-10-18 北京北方微电子基地设备工艺研究中心有限责任公司 Method for removing residual polymer in polysilicon etching technology
CN101958244A (en) * 2009-07-21 2011-01-26 中微半导体设备(上海)有限公司 Deep reactive ion etching method and gas flow control device thereof

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4221859B2 (en) * 1999-02-12 2009-02-12 株式会社デンソー Manufacturing method of semiconductor device
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US9039908B2 (en) * 2008-08-27 2015-05-26 Applied Materials, Inc. Post etch reactive plasma milling to smooth through substrate via sidewalls and other deeply etched features
US8049327B2 (en) * 2009-01-05 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Through-silicon via with scalloped sidewalls
TWI416624B (en) * 2009-12-11 2013-11-21 Advanced Micro Fab Equip Inc An etching method for deep - through - hole
CN102693911A (en) * 2011-03-23 2012-09-26 上海华虹Nec电子有限公司 Dry etching method

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1848383A (en) * 2005-12-02 2006-10-18 北京北方微电子基地设备工艺研究中心有限责任公司 Method for removing residual polymer in polysilicon etching technology
CN101958244A (en) * 2009-07-21 2011-01-26 中微半导体设备(上海)有限公司 Deep reactive ion etching method and gas flow control device thereof

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