WO2014050623A1 - Directional coupling circuit device - Google Patents

Directional coupling circuit device Download PDF

Info

Publication number
WO2014050623A1
WO2014050623A1 PCT/JP2013/074967 JP2013074967W WO2014050623A1 WO 2014050623 A1 WO2014050623 A1 WO 2014050623A1 JP 2013074967 W JP2013074967 W JP 2013074967W WO 2014050623 A1 WO2014050623 A1 WO 2014050623A1
Authority
WO
WIPO (PCT)
Prior art keywords
coupling
circuit device
port
coupling circuit
low
Prior art date
Application number
PCT/JP2013/074967
Other languages
French (fr)
Japanese (ja)
Inventor
寿博 安田
Original Assignee
太陽誘電株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 太陽誘電株式会社 filed Critical 太陽誘電株式会社
Publication of WO2014050623A1 publication Critical patent/WO2014050623A1/en

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports
    • H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01P—WAVEGUIDES; RESONATORS, LINES, OR OTHER DEVICES OF THE WAVEGUIDE TYPE
    • H01P5/00—Coupling devices of the waveguide type
    • H01P5/12—Coupling devices having more than two ports
    • H01P5/16—Conjugate devices, i.e. devices having at least one port decoupled from one other port
    • H01P5/18—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers
    • H01P5/184—Conjugate devices, i.e. devices having at least one port decoupled from one other port consisting of two coupled guides, e.g. directional couplers the guides being strip lines or microstrips
    • H01P5/187—Broadside coupled lines

Definitions

  • the present invention relates to a directional coupling circuit device, and more particularly, to a directional coupling circuit device in which a coupling degree in a high band in an adaptive frequency band is brought close to a coupling degree in a low band.
  • This directional coupling circuit device 8 is a parallel line composed of a main line 82 and a sub line 83 on or in a dielectric 81. And adjusting the line width, gap between lines, and line length of these parallel lines to obtain a desired degree of coupling.
  • one end 82a of the main line 82 is an input terminal
  • the other end 82b is an output terminal
  • one end 83a of the sub-line 83 is a coupling output terminal
  • the other end 83b is an isolation terminal.
  • the degree of coupling is represented by the ratio of the output power from the coupled output terminal 83a to the input power to the input terminal 82a.
  • the isolation is expressed as a ratio of output power from the isolation terminal 83b to input power to the input terminal 82a.
  • the directivity is expressed as a ratio between the output power from the isolation terminal 83b and the output power from the combined output terminal 83a.
  • the frequency characteristics of the degree of coupling of the directional coupling circuit device 8 are as shown in FIG. That is, the coupling degree changes to -35 dB at 500 MHz, -29 dB at 1000 MHz, -26 dB at 1500 MHz, -24 dB at 2000 MHz, -22 dB at 2500 MHz, and -20 dB at 3000 MHz.
  • Patent Document 1 Japanese Patent Laid-Open No. 5-152814
  • Patent Document 2 Japanese Patent Laid-Open No. 7-131211
  • JP-A-5-152814 Japanese Patent Laid-Open No. 7-1311
  • an object of the present invention is to provide a directional coupling circuit device in which the degree of coupling in the high frequency band in the adaptive frequency band is close to the degree of coupling in the low frequency band.
  • the present invention is formed along a main line having one end connected to an input port and the other end connected to an output port, and one end connected to the input port side.
  • a coupling sub-line connected to the port and having the other end connected to the isolation port on the output port side, a directional coupling circuit used in a predetermined adaptive frequency band, and a high frequency in the adaptive frequency band
  • the present invention proposes a directional coupling circuit device including a low-pass filter having a predetermined attenuation amount in a band portion and interposed in series between the coupling port and one end of the sub-line.
  • the induced electromotive force induced in the coupling sub line is the attenuation frequency of the low pass filter. Attenuated according to the characteristics and output to the coupling port.
  • the power on the high frequency band side output to the coupling port approaches the power on the low frequency band side, so the degree of coupling on the high frequency band side approaches the degree of coupling on the low frequency band side, and coupling within the adaptive frequency band
  • the difference between the maximum value and the minimum value of the degree is reduced as compared with the conventional case.
  • FIG. 1 is an external perspective view showing a directional coupling circuit device according to a first embodiment of the present invention.
  • 1 is an exploded perspective view showing a directional coupling circuit device according to a first embodiment of the present invention.
  • External appearance perspective view which shows the directional coupling circuit apparatus in 2nd Embodiment of this invention.
  • the disassembled perspective view which shows the directional coupling circuit apparatus in 2nd Embodiment of this invention.
  • External appearance perspective view which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention.
  • the circuit diagram which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention.
  • the disassembled perspective view which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention.
  • External perspective view showing a conventional directional coupling circuit device The figure which shows the frequency characteristic of the coupling degree of the directional coupling circuit apparatus of a prior art example
  • FIG. 1 is an external perspective view showing a directional coupling circuit device according to a first embodiment of the present invention
  • FIG. 2 is a circuit diagram showing the directional coupling circuit device according to the first embodiment of the present invention
  • FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 1 embodiment.
  • reference numeral 1 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 10 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer.
  • External terminals 11 to 16 are formed so as to extend from the upper surface side to the upper surface side.
  • the external terminal 11 is a coupling port and is connected to one end of a low-pass filter LF1 described later.
  • the other end of the low-pass filter LF1 is connected to one end of the coupling subline P2.
  • a capacitor C5 is connected in parallel between the external terminal 11 and the external terminal 13.
  • the external terminals 12 and 15 are ground terminals.
  • the external terminal 13 is an isolation port and is connected to the other end of a low-pass filter LF2 described later.
  • One end of the low-pass filter LF2 is connected to the other end of the coupling subline P2.
  • the external terminal 14 is an input port, and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7.
  • the external terminal 16 is an output port, and is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6.
  • a directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
  • the low-pass filter LF1 is a ⁇ -type low-pass filter including an inductor L1 and two capacitors C1 and C2, and one end of the inductor L1 is connected to a coupling port (external terminal) 11 and a capacitor C1. It is connected to the ground terminal via The other end of the inductor L1 is connected to one end of the coupling sub-line P2 and is connected to the ground terminal via the capacitor C2.
  • the low-pass filter LF2 is a ⁇ -type low-pass filter composed of an inductor L2 and two capacitors C3 and C4. One end of the inductor L2 is connected to the other end of the coupling subline P2 and connected to the ground terminal via the capacitor C3. It is connected. The other end of the inductor L2 is connected to an isolation port (external terminal) 13 and connected to a ground terminal via a capacitor C4.
  • isolation is improved by providing the capacitor C5. It seems that the isolation improvement by the capacitor C5 depends on the change of the resonance frequency of the LC resonance circuit by providing the capacitor C5.
  • the capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
  • the directional coupling circuit device 1 is configured by laminating a plurality of dielectric layers (insulator layers) 101 to 119 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
  • the uppermost dielectric layer 101 is a dummy layer, and the microstrip line 201 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 102.
  • a track 202 is provided.
  • One end 201a of the microstrip line 201 is connected to the external terminal 14 constituting the input port, and the other end 201b is connected to the external terminal 16 constituting the output port.
  • One end 202a of the microstrip line 202 is formed in the sixth dielectric layer 106 via via conductors and via conductors 203, 206, and 207 provided in the third to fifth dielectric layers 103 to 105, respectively.
  • the microstrip line 209 is connected to one end 209a.
  • the other end 202b of the microstrip line 202 is connected to the microstrip formed in the fourth dielectric layer 104 via the via conductor and the via conductor 204 formed in the third dielectric layer 103.
  • the line 205 is connected to one end 205a.
  • the second via conductors 203 and 204 are formed in the third dielectric layer 103.
  • the via conductor 206 and the microstrip line 205 are formed in the fourth dielectric layer 104, and the other end 205b of the microstrip line 205 is a via formed in the via conductor and the fifth dielectric layer 105.
  • the conductor 208 is connected to one end 210 a of the microstrip line 210 formed on the sixth dielectric layer 106.
  • the second via conductors 207 and 208 are formed in the fifth dielectric layer 105.
  • the two microstrip lines 209 and 210 and the two capacitor electrodes 211 and 212 are formed on the sixth dielectric layer 106.
  • the capacitor electrode 211 is connected to the external terminal 14, and the capacitor electrode 212 is connected to the external terminal 16.
  • the capacitor electrode 211 and the ground electrode 215 described later constitute a capacitor C7
  • the capacitor electrode 212 and the ground electrode 215 constitute a capacitor C6.
  • the other end 209b of the microstrip line 209 is connected to the tenth dielectric layer via via conductors and via conductors 213, 216, and 218 formed in the seventh to ninth dielectric layers 107 to 109, respectively.
  • the capacitor electrode 220 formed on 110 is connected.
  • the other end 210b of the microstrip line 210 is formed in the tenth dielectric layer 110 via via conductors 214, 217, and 219 formed in the seventh to ninth dielectric layers 107 to 109, respectively.
  • the capacitor electrode 221 is connected.
  • the capacitor electrode 220 and the ground electrode 215 constitute a capacitor C2
  • the capacitor electrode 221 and the ground electrode 215 constitute a capacitor C3.
  • the second via conductors 213 and 214 are formed in the seventh dielectric layer 107.
  • a ground electrode 215 is formed on almost the entire surface of the dielectric layer, and the ground electrode 215 is connected to the external terminals 12 and 15.
  • two openings 215a and 215b are formed in the ground electrode 215, a via conductor 216 insulated from the ground electrode 215 is formed in the center of one opening 215a, and the center of the other opening 215b is formed.
  • a via conductor 217 insulated from the ground electrode 215 is formed.
  • the two via conductors 218 and 219 are formed.
  • the tenth dielectric layer 110 has the two capacitor electrodes 220 and 221 formed thereon.
  • One capacitor electrode 220 is connected to one end 224a of the microstrip line 224 formed in the twelfth dielectric layer 112 via the via conductor 220a and the via conductor 222 formed in the eleventh dielectric layer 111. It is connected.
  • the other capacitor electrode 221 is one end of a microstrip line 225 formed on the twelfth dielectric layer 112 via a via conductor 221a and a via conductor 223 formed on the eleventh dielectric layer 111. Connected to 225a.
  • the two via conductors 222 and 223 are formed.
  • Two microstrip lines 224 and 225 are formed on the twelfth dielectric layer 112.
  • the other end 224b of one microstrip line 224 is connected to the microstrip line 228 formed in the 14th dielectric layer 114 via the via conductor and the via conductor 226 formed in the 13th dielectric layer 113. Is connected to one end 228a.
  • the other end 225b of the other microstrip line 225 is connected to the microstrip formed in the 14th dielectric layer 114 via the via conductor and the via conductor 227 formed in the 13th dielectric layer 113. It is connected to one end 229a of the track 229.
  • the above-mentioned two via conductors 226 and 227 are formed in the thirteenth dielectric layer 113.
  • the above-mentioned two microstrip lines 228 and 229 are formed on the 14th dielectric layer 114.
  • the other end 228b of one microstrip line 228 is connected to the microstrip line 232 formed in the 16th dielectric layer 116 via the via conductor 230 and the via conductor 230 formed in the 15th dielectric layer 115. Is connected to one end 232a.
  • the other end 229b of the other microstrip line 229 has a microstrip formed on the 16th dielectric layer 116 via a via conductor and a via conductor 231 formed on the 15th dielectric layer 115.
  • the line 233 is connected to one end 233a.
  • the two via conductors 230 and 231 are formed in the fifteenth dielectric layer 115.
  • the sixteenth dielectric layer 116 has the two microstrip lines 232 and 233 formed thereon.
  • the other end 232 b of one microstrip line 232 is connected to the external terminal 11, and the other end 233 b of the other microstrip line 233 is connected to the external terminal 13.
  • the three microstrip lines 224, 228, and 232 constitute an inductor L1
  • the three microstrip lines 225, 229, and 233 constitute an inductor L2.
  • a capacitor electrode 234 is formed on the 17th dielectric layer 117.
  • the 18th dielectric layer 118 has a capacitor electrode 235 arranged to face one end 234a of the capacitor electrode 234 and a capacitor electrode 236 arranged to face the other end 234b of the capacitor electrode 234. Is formed.
  • One capacitor electrode 235 forms a capacitor C1 together with a ground electrode 237 described later.
  • the other capacitor electrode 236 and the ground electrode 237 constitute a capacitor C4.
  • the capacitor electrode 234, the capacitor electrode 235, and the capacitor electrode 236 constitute a capacitor C5.
  • a ground electrode 237 is formed on almost the entire surface of the dielectric layer 119 of the 19th layer, and the ground electrode 237 is connected to the external terminals 12 and 15.
  • the attenuation frequency characteristics of the low-pass filters LF1 and LF2 are set as shown in FIG. 4, and the cutoff frequency is set to 2500 MHz.
  • the adaptive frequency band of the directional coupling circuit device 1 in this embodiment is a band from 500 MHz to 2700 MHz.
  • the directional coupling circuit device 1 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band. It is sufficient if the difference between the maximum value and the minimum value is a predetermined value or less.
  • low-pass filters LF1 and LF2 having attenuation frequency characteristics such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 1 is 10 dB or less are used.
  • the degree of coupling of the directional coupling circuit device 1 is the ratio of the output power from the coupling port (external terminal) 11 to the input power to the input port (external terminal) 14.
  • the directional coupling circuit device 1 having the above configuration is provided with the low-pass filter LF1 interposed between the coupling subline P2 and the coupling port (external terminal) 11 as described above, it is induced in the coupling subline P2.
  • the induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF1 and output to the coupling port (external terminal) 11.
  • the degree of coupling of the directional coupling circuit device 1 of the present embodiment has the frequency characteristics shown in FIG. That is, in the directional coupling circuit device 1, the power value on the high frequency band side output to the coupling port 11 approaches the power value on the low frequency band side.
  • the difference between the maximum value and the minimum value of the coupling degree within the adaptive frequency band is reduced as compared with the conventional example.
  • the difference between the maximum value and the minimum value of the coupling degree in the adaptive frequency band is reduced as compared with the conventional case, but the coupling degree is lower than the conventional example.
  • the coupling degree is lower than the conventional example.
  • the distance between the main line P1 and the coupling subline P2 is reduced, or the main line P1 and the coupling subline P2 are reduced. It is conceivable to increase the distance of the part where the two are connected.
  • the length of the main line P1 is increased, so that the insertion loss increases, so that there is an increase in the distance between the main line P1 and the coupling subline P2. It is preferable to take a method of reducing the distance.
  • the isolation can be improved.
  • the isolation is expressed by the ratio of the output power from the isolation port (external terminal) 13 to the input power to the input port (external terminal) 14, and therefore the frequency of the low-pass filter LF2 is provided by providing the low-pass filter LF2. Since the output power from the isolation port 13 is reduced according to the characteristics, the isolation is improved.
  • the low-pass filter LF2 is provided compared to the case where the low-pass filter LF2 is not provided.
  • the directionality can be improved.
  • isolation and directivity can be improved even if an attenuator is provided instead of the low-pass filter LF2.
  • the inductance component increases by increasing the impedance of the coupling sub-line P1, it is possible to shift the cutoff frequency of the low-pass filters LF1 and LF2 to the low frequency side.
  • the directional coupling circuit device 1 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 102 to 107 in which the microstrip lines 201, 202, and 205 constituting the main line P1 and the coupling subline P2 are formed.
  • a dielectric layer 108 having a ground electrode 215 is provided between the directional coupling portion and the filter portion comprising the dielectric layers 109 to 119 on which the microstrip line and the capacitor electrodes constituting the low-pass filters LF1 and LF2 are formed. Therefore, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic field coupling between them can be prevented.
  • the multilayer body constituting the directional coupling circuit device 1 is formed to have a size of 1.6 mm ⁇ 0.80 mm ⁇ 0.65 mm. In this way, the directional coupling circuit device 1 can be formed in a small size by using the multilayer body.
  • the directional coupling circuit device 1 is formed of a laminated element body.
  • the present invention is not limited to this, and it is needless to say that the same effect as described above can be obtained with the above circuit configuration.
  • FIG. 6 is an external perspective view showing a directional coupling circuit device according to the second embodiment of the present invention
  • FIG. 7 is a circuit diagram showing the directional coupling circuit device according to the second embodiment of the present invention
  • FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 2 embodiment.
  • reference numeral 2 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 20 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer.
  • External terminals 21 to 26 are formed so as to extend from the upper surface side to the upper surface side.
  • the external terminal 21 is a coupling port and is connected to one end of a low-pass filter LF1 described later.
  • the other end of the low-pass filter LF1 is connected to one end of the coupling subline P2.
  • the external terminals 22 and 25 are ground terminals.
  • the external terminal 23 is an isolation port and is connected to the other end of the coupling subline P2.
  • the external terminal 24 is an input port and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7.
  • the external terminal 26 is an output port that is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6.
  • a directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
  • the low-pass filter LF1 is a ⁇ -type low-pass filter including an inductor L1 and two capacitors C1 and C2.
  • One end of the inductor L1 is connected to a coupling port (external terminal) 21 and a capacitor C1. It is connected to the ground terminal via The other end of the inductor L1 is connected to one end of the coupling sub-line P2 and is connected to the ground terminal via the capacitor C2.
  • the capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
  • the directional coupling circuit device 2 is configured by laminating a plurality of dielectric layers (insulator layers) 301 to 311 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
  • the uppermost dielectric layer 301 is a dummy layer, and the microstrip line 401 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 302.
  • a line 402 is provided.
  • One end 401a of the microstrip line 401 is connected to the external terminal 24 constituting the input port, and the other end 401b is connected to the external terminal 26 constituting the output port.
  • One end 402a of the microstrip line 402 is one end of the microstrip line 405 formed in the fourth dielectric layer 304 via the via conductor and the via conductor 404 provided in the third dielectric layer 303. Connected to 405a.
  • the other end 402b of the microstrip line 402 is connected to one end 403a of the microstrip line 403 formed in the third dielectric layer 303 via a via conductor.
  • the via conductor 404 and the microstrip line 403 are formed, and the other end 403b of the microstrip line 403 is connected to the external terminal 23 forming an isolation port.
  • the microstrip line 405 and two capacitor electrodes 406 and 407 are formed on the fourth dielectric layer 304.
  • the capacitor electrode 406 is connected to the external terminal 24, and the capacitor electrode 407 is connected to the external terminal 26.
  • the capacitor electrode 406 forms a capacitor C7 together with a ground electrode 408, which will be described later, and the capacitor electrode 407 forms a capacitor C6 together with the ground electrode 408.
  • the other end 405b of the microstrip line 405 is connected to the capacitor electrode 410 formed on the sixth dielectric layer 306 via the via conductor and the via conductor 409 formed on the fifth dielectric layer 305. It is connected.
  • the capacitor electrode 410 and the ground electrode 408 constitute a capacitor C2.
  • a ground electrode 408 is formed on almost the entire surface of the dielectric layer 305 of the fifth layer, and the ground electrode 408 is connected to the external terminals 22 and 25.
  • An opening 408a is formed in the ground electrode 408, and a via conductor 409 insulated from the ground electrode 408 is formed in the center of the opening 408a.
  • the capacitor electrode 410 is formed on the sixth dielectric layer 306, and the capacitor electrode 410 is one end of the microstrip line 411 formed on the seventh dielectric layer 307 via the via conductor 410a. Connected to 411a.
  • a microstrip line 411 is formed on the seventh dielectric layer 307, and the other end 411b of the microstrip line 411 is formed on the eighth dielectric layer 308 via a via conductor.
  • the line 412 is connected to one end 412a.
  • the microstrip line 412 is formed on the eighth dielectric layer 308, and the other end 412b of the microstrip line 412 is formed on the ninth dielectric layer 309 via a via conductor.
  • the strip line 413 is connected to one end 413a.
  • the microstrip line 413 is formed on the ninth dielectric layer 309, and the other end 413 b of the microstrip line 413 is connected to the external terminal 21.
  • the three microstrip lines 411, 412, and 413 constitute an inductor L1.
  • Capacitor electrodes 414 and 415 are formed on the tenth dielectric layer 310.
  • One capacitor electrode 414 forms a capacitor C1 together with a ground electrode 416 described later.
  • the other capacitor electrode 415 and the ground electrode 416 constitute a matching adjustment capacitor. Even if this matching adjustment capacitor is not provided, the predetermined function is achieved. Depending on the circuit, it may be better to provide a matching adjustment capacitor in order to obtain better isolation characteristics.
  • a ground electrode 416 is formed on almost the entire surface of the dielectric layer, and the ground electrode 416 is connected to the external terminals 22 and 25.
  • the attenuation frequency characteristic of the low-pass filter LF1 is the same as that of the first embodiment, and the cutoff frequency is set to 2500 MHz.
  • the adaptive frequency band of the directional coupling circuit device 2 in this embodiment is a band from 500 MHz to 2700 MHz.
  • the attenuation frequency characteristic of the low-pass filter LF1 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band of the directional coupling circuit device 2, and the maximum value of the coupling degree in the entire adaptive frequency band. As long as the difference between the minimum value and the minimum value is equal to or less than a predetermined value.
  • a low-pass filter LF1 having an attenuation frequency characteristic such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 2 is 10 dB or less is used.
  • the degree of coupling of the directional coupling circuit device 2 is a ratio of output power from the coupling port (external terminal) 21 to input power to the input port (external terminal) 24.
  • the directional coupling circuit device 2 having the above configuration is provided with the low-pass filter LF1 interposed between the coupling subline P2 and the coupling port (external terminal) 21 as described above, it is induced in the coupling subline P2.
  • the induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF1 and output to the coupling port (external terminal) 21.
  • the power value on the high frequency band side output to the coupling port 21 approaches the power value on the low frequency band side.
  • Approaches the degree of coupling on the low frequency band side, and the difference between the maximum value and the minimum value of the degree of coupling within the adaptive frequency band is reduced as compared with the prior art.
  • the inductance component increases by increasing the impedance of the coupling sub-line P1, it is possible to shift the cutoff frequency of the low-pass filters LF1 and LF2 to the low frequency side.
  • the directional coupling circuit device 2 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 302 to 304 are formed with the microstrip lines 401, 402, and 405 constituting the main line P1 and the coupling subline P2. Since the dielectric layer 305 having the ground electrode 408 is provided between the directional coupling portion and the filter portion including the dielectric layers 306 to 311 on which the microstrip line and the capacitor electrode constituting the low-pass filter LF1 are formed. In addition, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic coupling between them can be prevented.
  • the inductance L1 is set to 5 nH
  • the capacitor C1 is set to 1.5 pF
  • the capacitor C2 is set to 1.5 pF.
  • the directional coupling circuit device 2 since the directional coupling circuit device 2 is formed of the multilayer body as described above, the directional coupling circuit device 2 can be formed in a small size.
  • the directional coupling circuit device 2 is formed of a laminated body.
  • the present invention is not limited to this, and it is needless to say that the same effect as described above can be obtained with the above circuit configuration.
  • FIG. 9 is an external perspective view showing a directional coupling circuit device according to the third embodiment of the present invention
  • FIG. 10 is a circuit diagram showing the directional coupling circuit device according to the third embodiment of the present invention
  • FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 3 embodiment.
  • reference numeral 3 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 30 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer.
  • External terminals 31 to 36 are formed so as to extend from the upper surface side to the upper surface side.
  • the external terminal 31 is a coupling port and is connected to one end of a low-pass filter LF3 described later.
  • the other end of the low-pass filter LF3 is connected to one end of the coupling subline P2.
  • the external terminals 32 and 35 are ground terminals.
  • the external terminal 33 is an isolation port and is connected to the other end of the coupling subline P2.
  • the external terminal 34 is an input port, and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7.
  • the external terminal 26 is an output port that is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6.
  • a directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
  • the low-pass filter LF3 is a T-type low-pass filter composed of two inductors L3 and L4 and one capacitor C8.
  • One end of the inductor L3 is connected to a coupling port (external terminal) 31, and the inductor
  • the other end of L3 is connected to one end of an inductor L4 and is connected to the ground terminal via a capacitor C8.
  • the other end of the inductor L4 is connected to one end of the coupling subline P2.
  • the capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
  • the directional coupling circuit device 3 is configured by laminating a plurality of dielectric layers (insulator layers) 501 to 511 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
  • the uppermost dielectric layer 501 is a dummy layer, and the microstrip line 601 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 502.
  • a track 602 is provided.
  • One end 601a of the microstrip line 601 is connected to the external terminal 34 constituting the input port, and the other end 601b is connected to the external terminal 36 constituting the output port.
  • One end 602a of the microstrip line 602 is one end of the microstrip line 605 formed in the fourth dielectric layer 504 via the via conductor and the via conductor 604 provided in the third dielectric layer 503. Connected to 605a.
  • the other end 602b of the microstrip line 602 is connected to one end 603a of the microstrip line 603 formed in the third dielectric layer 503 via a via conductor.
  • the via conductor 604 and the microstrip line 603 are formed in the third dielectric layer 503, and the other end 603b of the microstrip line 603 is connected to the external terminal 33 forming an isolation port.
  • the microstrip line 605 and two capacitor electrodes 606 and 607 are formed on the fourth dielectric layer 504, the microstrip line 605 and two capacitor electrodes 606 and 607 are formed.
  • the capacitor electrode 606 is connected to the external terminal 34, and the capacitor electrode 607 is connected to the external terminal 36.
  • the capacitor electrode 606 constitutes a capacitor C7 together with a ground electrode 608 described later, and the capacitor electrode 607 constitutes a capacitor C6 together with the ground electrode 608.
  • the other end 605b of the microstrip line 605 is connected to a via conductor and a via conductor 609 formed in the fifth dielectric layer 505 and a via conductor 610 formed in the sixth dielectric layer 506.
  • the microstrip line 612 formed on the seventh dielectric layer 507 is connected to one end 612a.
  • a ground electrode 608 is formed on almost the entire surface of the dielectric layer, and the ground electrode 608 is connected to the external terminals 32 and 35.
  • An opening 608a is formed in the ground electrode 608, and a via conductor 609 insulated from the ground electrode 608 is formed in the center of the opening 608a.
  • the via conductor 610 and the capacitor electrode 611 are formed on the sixth dielectric layer 506, and the capacitor electrode 611 is a microstrip formed on the seventh dielectric layer 507 via the via conductor 611a.
  • a microstrip line connected to one end 613a of the line 613 and further formed in the ninth dielectric layer 509 via a via conductor and a via conductor 615 formed in the eighth dielectric layer 508. 617 is connected to the other end 617b.
  • the above-mentioned two microstrip lines 612 and 613 are formed on the seventh dielectric layer 507, and the other end 612b of one microstrip line 612 is connected to the eighth dielectric layer 508 via a via conductor. It is connected to one end 614a of the formed microstrip line 614. The other end 613b of the other microstrip line 613 is connected to one end 615a of the microstrip line 615 formed in the eighth dielectric layer 508 via a via conductor.
  • the eighth dielectric layer 508 is formed with the via conductor 615 and the two microstrip lines 614 and 616, and the other end 614b of one microstrip line 614 is connected to the ninth layer via the via conductor.
  • the microstrip line 617 formed on the dielectric layer 509 is connected to one end 617a.
  • the other end 616b of the other microstrip line 616 is connected to one end 618a of the microstrip line 618 formed on the ninth dielectric layer 509 via a via conductor.
  • the above-mentioned two microstrip lines 617 and 618 are formed on the ninth dielectric layer 509, and the other end 618 b of the microstrip line 618 is connected to the external terminal 31.
  • the two microstrip lines 612 and 614 constitute an inductor L4
  • the three microstrip lines 613, 616 and 618 constitute an inductor L3.
  • Capacitor electrodes 619 and 620 are formed on the tenth dielectric layer 510.
  • One capacitor electrode 619 constitutes a matching adjustment capacitor together with a ground electrode 621 described later.
  • the other capacitor electrode 620 forms a matching adjustment capacitor together with the ground electrode 621. Even if these matching adjustment capacitors are not provided, a predetermined function is achieved. Depending on the circuit, it may be better to provide a matching adjustment capacitor in order to obtain better isolation characteristics.
  • a ground electrode 621 is formed on almost the entire surface of the dielectric layer, and the ground electrode 621 is connected to the external terminals 32 and 35.
  • the attenuation frequency characteristic of the low-pass filter LF3 is the same as that of the first embodiment, and the cutoff frequency is set to 2500 MHz.
  • the adaptive frequency band of the directional coupling circuit device 3 in this embodiment is a band from 500 MHz to 2700 MHz.
  • the attenuation frequency characteristic of the low-pass filter LF3 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band of the directional coupling circuit device 3, and the maximum value of the coupling degree in the entire adaptive frequency band. As long as the difference between the minimum value and the minimum value is equal to or less than a predetermined value.
  • a low-pass filter LF3 having an attenuation frequency characteristic such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 3 is 10 dB or less is used.
  • the degree of coupling of the directional coupling circuit device 3 is a ratio of output power from the coupling port (external terminal) 31 to input power to the input port (external terminal) 34.
  • the directional coupling circuit device 3 having the above configuration is provided with the low pass filter LF3 interposed between the coupling subline P2 and the coupling port (external terminal) 31 as described above, it is induced in the coupling subline P2.
  • the induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF3 and output to the coupling port (external terminal) 31.
  • the power value on the high frequency band side output to the coupling port 31 approaches the power value on the low frequency band side.
  • Approaches the degree of coupling on the low frequency band side, and the difference between the maximum value and the minimum value of the degree of coupling within the adaptive frequency band is reduced as compared with the prior art.
  • the cutoff frequency of the low-pass filter LF3 can be shifted to the low frequency side.
  • the directional coupling circuit device 3 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 502 to 504 are formed with the microstrip lines 601, 602, 603, and 605 that constitute the main line P1 and the coupling subline P2. Since the dielectric layer 505 having the ground electrode 608 is provided between the directional coupling portion and the filter portion including the dielectric layers 506 to 511 on which the microstrip line and the capacitor electrode constituting the low-pass filter LF3 are formed. In addition, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic coupling between them can be prevented.
  • the inductance L3 is set to 2.4 nH
  • the inductor L4 is set to 2.4 nH
  • the capacitor C8 is set to 1.2 pF.
  • the directional coupling circuit device 3 since the directional coupling circuit device 3 is formed of the multilayer body as described above, the directional coupling circuit device 3 can be formed in a small size.
  • the directional coupling circuit device 3 is formed of a laminated body.
  • the present invention is not limited to this, and it is needless to say that the same effects as described above can be obtained with the circuit configuration described above.
  • the present invention relates to a directional coupling circuit device, and in particular, a difference between a maximum value and a minimum value is predetermined over a wide adaptive frequency band by bringing a coupling degree in a high band in an adaptive frequency band close to a coupling degree in a low band. It was made possible to provide a directional coupling circuit device having a degree of coupling that is less than the value.
  • SYMBOLS 1 DESCRIPTION OF SYMBOLS 1 ... Directional coupling circuit device, 10 ... Laminated body, 11 ... Coupling port (external terminal), 12 ... Grounding terminal, 13 ... Isolation port (external terminal), 14 ... Input port (external terminal), 15 ... Grounding Terminals, 16 ... Output port (external terminal), 2 ... Directional coupling circuit device, 20 ... Laminated body, 21 ... Coupling port (external terminal), 22 ... Ground terminal, 23 ... Isolation port (external terminal), 24 ... Input port (external terminal), 25 ... grounding terminal, 26 ... output port (external terminal), 3 ... directional coupling circuit device, 30 ...
  • dielectric layer (insulator layer), 401,402,403,405,411,412,413 ... microstrip line, 404,409,410a ... via conductor, 406,407,410,414,415 ... electrode Ground electrode, 501 to 511 ... dielectric layer (insulator layer), 601,602,605,612,613,614,616,617,618 ... microstrip line, 604,609,610a, 615 ... via conductor, 606,607,611,19,620 ... capacitor electrode, 608,621 ... ground electrode, CP ... directional coupling circuit, LF1 , LF2, LF3 ... Low pass filter.

Abstract

[Problem] To provide a directional coupling circuit device in which the coupling degree at a high-frequency band in an adaptive frequency band is made to approach the coupling degree at a low-frequency band. [Solution] A directional coupling circuit device (1) is provided with a main line (P1) in which one end is connected to an input port (14) and the other end is connected to an output port (16), and a coupling-use auxiliary line (P2) which is formed along the main line (P1) and in which one end is connected to a coupling port (11) at the input port (14) side and the other end is connected to an isolation port (13) at the output port (16) side. A low-pass filter (LF1) having a predetermined attenuation amount in a high-range portion of the adaptive frequency band is serially connected so as to be interposed between the coupling port (11) and one end of the coupling-use auxiliary line (P2).

Description

方向性結合回路装置Directional coupling circuit device
　本発明は、方向性結合回路装置に関するものであり、特に適応周波数帯域における高帯域での結合度を低帯域の結合度に近づけた方向性結合回路装置に関するものである。 The present invention relates to a directional coupling circuit device, and more particularly, to a directional coupling circuit device in which a coupling degree in a high band in an adaptive frequency band is brought close to a coupling degree in a low band.
　従来の方向性結合回路装置の一例としては、図１２に示すものが知られており、この方向性結合回路装置８は誘電体８１上もしくは内部に主線路８２と副線路８３とからなる平行線路を設け、これらの平行線路の線路幅、線路間ギャップ、線路長を調整して所望の結合度を得ている。図において主線路８２の一端８２ａが入力端子、他端８２ｂが出力端子、副線路８３の一端８３ａが結合出力端子、他端８３ｂがアイソレーション端子となる。結合度は入力端子８２ａへの入力電力に対する結合出力端子８３ａからの出力電力の割合で表される。また、アイソレーションは入力端子８２ａへの入力電力に対するアイソレーション端子８３ｂからの出力電力の割合で表される。また、方向性(Directivity)はアイソレーション端子８３ｂからの出力電力と結合出力端子８３ａからの出力電力の割合で表される。 As an example of a conventional directional coupling circuit device, the one shown in FIG. 12 is known. This directional coupling circuit device 8 is a parallel line composed of a main line 82 and a sub line 83 on or in a dielectric 81. And adjusting the line width, gap between lines, and line length of these parallel lines to obtain a desired degree of coupling. In the figure, one end 82a of the main line 82 is an input terminal, the other end 82b is an output terminal, one end 83a of the sub-line 83 is a coupling output terminal, and the other end 83b is an isolation terminal. The degree of coupling is represented by the ratio of the output power from the coupled output terminal 83a to the input power to the input terminal 82a. The isolation is expressed as a ratio of output power from the isolation terminal 83b to input power to the input terminal 82a. The directivity is expressed as a ratio between the output power from the isolation terminal 83b and the output power from the combined output terminal 83a.
　近年では携帯電話の普及に伴い広周波数帯域で使用可能な方向性結合回路装置の需要が高まり、上記方向性結合回路装置８の結合度の周波数特性は図１３に示すものとなる。すなわち、結合度は、５００ＭＨｚで－３５ｄＢ、１０００ＭＨｚで－２９ｄＢ、１５００ＭＨｚで－２６ｄＢ、２０００ＭＨｚで－２４ｄＢ、２５００ＭＨｚで－２２ｄＢ、３０００ＭＨｚで－２０ｄＢと変化する。 In recent years, with the widespread use of mobile phones, the demand for directional coupling circuit devices that can be used in a wide frequency band has increased, and the frequency characteristics of the degree of coupling of the directional coupling circuit device 8 are as shown in FIG. That is, the coupling degree changes to -35 dB at 500 MHz, -29 dB at 1000 MHz, -26 dB at 1500 MHz, -24 dB at 2000 MHz, -22 dB at 2500 MHz, and -20 dB at 3000 MHz.
　このような方向性結合回路装置としては、例えば特開平５－１５２８１４号公報（特許文献１）、特開平７－１３１２１１号公報（特許文献２）に開示されるものが知られている。 As such a directional coupling circuit device, for example, those disclosed in Japanese Patent Laid-Open No. 5-152814 (Patent Document 1) and Japanese Patent Laid-Open No. 7-131211 (Patent Document 2) are known.
特開平５－１５２８１４号公報JP-A-5-152814 特開平７－１３１２１１号公報Japanese Patent Laid-Open No. 7-1311
　しかしながら、前述した従来の方向性結合回路装置だと図１３に示したように周波数が高くなると平行線路間の電磁界結合が強まり結合度が増加する。この場合、周波数が７００～２７００ＭＨｚの範囲で結合度の最大値と最小値の差が１０ｄＢ以上となり使いにくい特性の方向性結合回路装置となってしまう。 However, in the conventional directional coupling circuit device described above, as shown in FIG. 13, when the frequency is increased, the electromagnetic field coupling between the parallel lines is strengthened and the degree of coupling is increased. In this case, when the frequency is in the range of 700 to 2700 MHz, the difference between the maximum value and the minimum value of the coupling degree is 10 dB or more, and the directional coupling circuit device has a characteristic that is difficult to use.
　本発明の目的は上記の問題点に鑑み、適応周波数帯域における高周波数帯域での結合度を低周波数帯域の結合度に近づけた方向性結合回路装置を提供することにある。 In view of the above problems, an object of the present invention is to provide a directional coupling circuit device in which the degree of coupling in the high frequency band in the adaptive frequency band is close to the degree of coupling in the low frequency band.
　本発明は上記の目的を達成するために、一端が入力ポートに接続され、他端が出力ポートに接続された主線路と、前記主線路に沿って形成され、一端が前記入力ポート側の結合ポートに接続されるとともに他端が前記出力ポート側のアイソレーションポートに接続された結合用副線路とを備え、所定の適応周波数帯域で使用される方向性結合回路と、前記適応周波数帯域の高域部に所定の減衰量を有し、前記結合ポートと前記副線路の一端との間に直列接続して介在されているローパスフィルタとを備えている方向性結合回路装置を提案する。 In order to achieve the above object, the present invention is formed along a main line having one end connected to an input port and the other end connected to an output port, and one end connected to the input port side. A coupling sub-line connected to the port and having the other end connected to the isolation port on the output port side, a directional coupling circuit used in a predetermined adaptive frequency band, and a high frequency in the adaptive frequency band The present invention proposes a directional coupling circuit device including a low-pass filter having a predetermined attenuation amount in a band portion and interposed in series between the coupling port and one end of the sub-line.
　本発明の方向性結合回路装置は、結合ポートと結合用副線路の一端との間にローパスフィルタが介在されているので、結合用副線路に誘起された誘導起電力は前記ローパスフィルタの減衰周波数特性に応じて減衰されて結合ポートに出力される。これにより、結合ポートに出力される高周波数帯域側の電力は低周波数帯域側の電力に近づくので、高周波数帯域側の結合度が低周波数帯域側の結合度に近づき、適応周波数帯域内における結合度の最大値と最小値の差が従来よりも低減される。 In the directional coupling circuit device according to the present invention, since the low pass filter is interposed between the coupling port and one end of the coupling sub line, the induced electromotive force induced in the coupling sub line is the attenuation frequency of the low pass filter. Attenuated according to the characteristics and output to the coupling port. As a result, the power on the high frequency band side output to the coupling port approaches the power on the low frequency band side, so the degree of coupling on the high frequency band side approaches the degree of coupling on the low frequency band side, and coupling within the adaptive frequency band The difference between the maximum value and the minimum value of the degree is reduced as compared with the conventional case.
本発明の第１実施形態における方向性結合回路装置を示す外観斜視図1 is an external perspective view showing a directional coupling circuit device according to a first embodiment of the present invention. 本発明の第１実施形態における方向性結合回路装置を示す回路図The circuit diagram which shows the directional coupling circuit apparatus in 1st Embodiment of this invention. 本発明の第１実施形態における方向性結合回路装置を示す分解斜視図1 is an exploded perspective view showing a directional coupling circuit device according to a first embodiment of the present invention. 本発明の第１実施形態における方向性結合回路装置に用いたローパスフィルタの周波数特性を示す図The figure which shows the frequency characteristic of the low pass filter used for the directional coupling circuit apparatus in 1st Embodiment of this invention. 本発明の第１実施形態における方向性結合回路装置の結合度の周波数特性を示す図The figure which shows the frequency characteristic of the coupling degree of the directional coupling circuit apparatus in 1st Embodiment of this invention. 本発明の第２実施形態における方向性結合回路装置を示す外観斜視図External appearance perspective view which shows the directional coupling circuit apparatus in 2nd Embodiment of this invention. 本発明の第２実施形態における方向性結合回路装置を示す回路図The circuit diagram which shows the directional coupling circuit apparatus in 2nd Embodiment of this invention. 本発明の第２実施形態における方向性結合回路装置を示す分解斜視図The disassembled perspective view which shows the directional coupling circuit apparatus in 2nd Embodiment of this invention. 本発明の第３実施形態における方向性結合回路装置を示す外観斜視図External appearance perspective view which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention. 本発明の第３実施形態における方向性結合回路装置を示す回路図The circuit diagram which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention. 本発明の第３実施形態における方向性結合回路装置を示す分解斜視図The disassembled perspective view which shows the directional coupling circuit apparatus in 3rd Embodiment of this invention. 従来例の方向性結合回路装置を示す外観斜視図External perspective view showing a conventional directional coupling circuit device 従来例の方向性結合回路装置の結合度の周波数特性を示す図The figure which shows the frequency characteristic of the coupling degree of the directional coupling circuit apparatus of a prior art example
　以下、図面を参照して本発明の一実施形態を説明する。 Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
　図１は本発明の第１実施形態における方向性結合回路装置を示す外観斜視図、図２は本発明の第１実施形態における方向性結合回路装置を示す回路図、図３は本発明の第１実施形態における方向性結合回路装置を示す分解斜視図である。 FIG. 1 is an external perspective view showing a directional coupling circuit device according to a first embodiment of the present invention, FIG. 2 is a circuit diagram showing the directional coupling circuit device according to the first embodiment of the present invention, and FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 1 embodiment.
　図において、１は方向性結合回路装置で、内部層にマイクロストリップ線路或いは導体電極或いは接地電極が形成された直方体形状の積層素体10からなり、該積層素体10の両側面には底面側から上面側に延びるように外部端子11～16が形成されている。外部端子11は結合ポートで、後述するローパスフィルタLF1の一端に接続されている。ローパスフィルタLF1の他端は結合用副線路P2の一端に接続されている。また、外部端子11と外部端子13との間にコンデンサC5が並列に接続されている。外部端子12,15は接地端子である。外部端子13はアイソレーションポートで、後述するローパスフィルタLF2の他端に接続されている。ローパスフィルタLF2の一端は結合用副線路P2の他端に接続されている。外部端子14は入力ポートで、主線路P1の一端に接続されると共にコンデンサC7を介して接地端子に接続されている。外部端子16は出力ポートで、主線路P1の他端に接続されると共にコンデンサC6を介して接地端子に接続されている。なお、主線路P1と結合用副線路P2によって方向性結合回路CPが構成されている。 In the figure, reference numeral 1 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 10 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer. External terminals 11 to 16 are formed so as to extend from the upper surface side to the upper surface side. The external terminal 11 is a coupling port and is connected to one end of a low-pass filter LF1 described later. The other end of the low-pass filter LF1 is connected to one end of the coupling subline P2. A capacitor C5 is connected in parallel between the external terminal 11 and the external terminal 13. The external terminals 12 and 15 are ground terminals. The external terminal 13 is an isolation port and is connected to the other end of a low-pass filter LF2 described later. One end of the low-pass filter LF2 is connected to the other end of the coupling subline P2. The external terminal 14 is an input port, and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7. The external terminal 16 is an output port, and is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6. A directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
　図２に示すように、ローパスフィルタLF1はインダクタL1と２つのコンデンサC1,C2から構成されたπ型ローパスフィルタであり、インダクタL1の一端は結合ポート（外部端子）11に接続されると共にコンデンサC1を介して接地端子に接続されている。インダクタL1の他端は結合用副線路P2の一端に接続されると共にコンデンサC2を介して接地端子に接続されている。 As shown in FIG. 2, the low-pass filter LF1 is a π-type low-pass filter including an inductor L1 and two capacitors C1 and C2, and one end of the inductor L1 is connected to a coupling port (external terminal) 11 and a capacitor C1. It is connected to the ground terminal via The other end of the inductor L1 is connected to one end of the coupling sub-line P2 and is connected to the ground terminal via the capacitor C2.
　ローパスフィルタLF2はインダクタL2と２つのコンデンサC3,C4から構成されたπ型ローパスフィルタであり、インダクタL2の一端は結合用副線路P2の他端に接続されると共にコンデンサC3を介して接地端子に接続されている。インダクタL2の他端はアイソレーションポート（外部端子）13に接続されると共にコンデンサC4を介して接地端子に接続されている。 The low-pass filter LF2 is a π-type low-pass filter composed of an inductor L2 and two capacitors C3 and C4. One end of the inductor L2 is connected to the other end of the coupling subline P2 and connected to the ground terminal via the capacitor C3. It is connected. The other end of the inductor L2 is connected to an isolation port (external terminal) 13 and connected to a ground terminal via a capacitor C4.
　なお、コンデンサC5を設けることによりアイソレーションが改善される。コンデンサC5によるアイソレーション改善に関しては、コンデンサC5を設けることによってＬＣ共振回路の共振周波数の変化に依存していると思われる。 Note that isolation is improved by providing the capacitor C5. It seems that the isolation improvement by the capacitor C5 depends on the change of the resonance frequency of the LC resonance circuit by providing the capacitor C5.
　また、コンデンサC6,C7は主線路P1の波長短縮用コンデンサである。 The capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
　方向性結合回路装置１は、図３に示すように、所定の厚さを有する複数の誘電体層（絶縁体層）101～119を積層して構成されており、所定層の誘電体層には表面にマイクロストリップ線路或いは導電体電極或いは接地電極が設けられている。 As shown in FIG. 3, the directional coupling circuit device 1 is configured by laminating a plurality of dielectric layers (insulator layers) 101 to 119 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
　図３において最上層の誘電体層101はダミー層であり、第２層目の誘電体層102の表面には主線路P1を構成するマイクロストリップ線路201と結合用副線路P2を構成するマイクロストリップ線路202が設けられている。マイクロストリップ線路201の一端201aは入力ポートを構成する外部端子14に接続され他端201bは出力ポートを構成する外部端子16に接続されている。 In FIG. 3, the uppermost dielectric layer 101 is a dummy layer, and the microstrip line 201 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 102. A track 202 is provided. One end 201a of the microstrip line 201 is connected to the external terminal 14 constituting the input port, and the other end 201b is connected to the external terminal 16 constituting the output port.
　マイクロストリップ線路202の一端202aはビア導体及び第３層目から第５層目のそれぞれの誘電体層103～105に設けられたビア導体203,206,207を介して第６層目の誘電体層106に形成されているマイクロストリップ線路209の一端209aに接続されている。また、マイクロストリップ線路202の他端202bはビア導体及び第３層目の誘電体層103に形成されたビア導体204を介して、第４層目の誘電体層104に形成されているマイクロストリップ線路205の一端205aに接続されている。 One end 202a of the microstrip line 202 is formed in the sixth dielectric layer 106 via via conductors and via conductors 203, 206, and 207 provided in the third to fifth dielectric layers 103 to 105, respectively. The microstrip line 209 is connected to one end 209a. The other end 202b of the microstrip line 202 is connected to the microstrip formed in the fourth dielectric layer 104 via the via conductor and the via conductor 204 formed in the third dielectric layer 103. The line 205 is connected to one end 205a.
　第３層目の誘電体層103には上記２つのビア導体203,204が形成されている。 The second via conductors 203 and 204 are formed in the third dielectric layer 103.
　第４層目の誘電体層104には上記ビア導体206とマイクロストリップ線路205が形成され、マイクロストリップ線路205の他端205bはビア導体及び第５層目の誘電体層105に形成されたビア導体208を介して第６層目の誘電体層106に形成されたマイクロストリップ線路210の一端210aに接続されている。 The via conductor 206 and the microstrip line 205 are formed in the fourth dielectric layer 104, and the other end 205b of the microstrip line 205 is a via formed in the via conductor and the fifth dielectric layer 105. The conductor 208 is connected to one end 210 a of the microstrip line 210 formed on the sixth dielectric layer 106.
　第５層目の誘電体層105には上記２つのビア導体207,208が形成されている。 The second via conductors 207 and 208 are formed in the fifth dielectric layer 105.
　第６層目の誘電体層106には上記２つのマイクロストリップ線路209,210と２つのコンデンサ電極211,212が形成されている。コンデンサ電極211は外部端子14に接続され、コンデンサ電極212は外部端子16に接続されている。ここで、コンデンサ電極211は後述する接地電極215と共にコンデンサC7を構成し、コンデンサ電極212は接地電極215と共にコンデンサC6を構成する。 On the sixth dielectric layer 106, the two microstrip lines 209 and 210 and the two capacitor electrodes 211 and 212 are formed. The capacitor electrode 211 is connected to the external terminal 14, and the capacitor electrode 212 is connected to the external terminal 16. Here, the capacitor electrode 211 and the ground electrode 215 described later constitute a capacitor C7, and the capacitor electrode 212 and the ground electrode 215 constitute a capacitor C6.
　また、マイクロストリップ線路209の他端209bはビア導体及び第７層目から第９層目のそれぞれの誘電体層107～109に形成されたビア導体213,216,218を介して第１０層目の誘電体層110に形成されたコンデンサ電極220に接続されている。マイクロストリップ線路210の他端210bは第７層目から第９層目のそれぞれの誘電体層107～109に形成されたビア導体214,217,219を介して第１０層目の誘電体層110に形成されたコンデンサ電極221に接続されている。ここで、コンデンサ電極220は接地電極215と共にコンデンサC2を構成し、コンデンサ電極221は接地電極215と共にコンデンサC3を構成する。 The other end 209b of the microstrip line 209 is connected to the tenth dielectric layer via via conductors and via conductors 213, 216, and 218 formed in the seventh to ninth dielectric layers 107 to 109, respectively. The capacitor electrode 220 formed on 110 is connected. The other end 210b of the microstrip line 210 is formed in the tenth dielectric layer 110 via via conductors 214, 217, and 219 formed in the seventh to ninth dielectric layers 107 to 109, respectively. The capacitor electrode 221 is connected. Here, the capacitor electrode 220 and the ground electrode 215 constitute a capacitor C2, and the capacitor electrode 221 and the ground electrode 215 constitute a capacitor C3.
　第７層目の誘電体層107には上記２つのビア導体213,214が形成されている。 The second via conductors 213 and 214 are formed in the seventh dielectric layer 107.
　第８層目の誘電体層108には誘電体層の表面のほぼ全面に接地電極215が形成され、接地電極215は外部端子12,15に接続されている。また、接地電極215には２つの開口部215a,215bが形成され、一方の開口部215aの中心には接地電極215から絶縁されたビア導体216が形成され、他方の開口部215bの中心には接地電極215から絶縁されたビア導体217が形成されている。 In the eighth dielectric layer 108, a ground electrode 215 is formed on almost the entire surface of the dielectric layer, and the ground electrode 215 is connected to the external terminals 12 and 15. In addition, two openings 215a and 215b are formed in the ground electrode 215, a via conductor 216 insulated from the ground electrode 215 is formed in the center of one opening 215a, and the center of the other opening 215b is formed. A via conductor 217 insulated from the ground electrode 215 is formed.
　第９層目の誘電体層109には上記２つのビア導体218,219が形成されている。 In the ninth dielectric layer 109, the two via conductors 218 and 219 are formed.
　第１０層目の誘電体層110には上記２つのコンデンサ電極220,221が形成されている。一方のコンデンサ電極220はビア導体220a及び第１１層目の誘電体層111に形成されたビア導体222を介して第１２層目の誘電体層112に形成されたマイクロストリップ線路224の一端224aに接続されている。また、他方のコンデンサ電極221はビア導体221a及び第１１層目の誘電体層111に形成されたビア導体223を介して第１２層目の誘電体層112に形成されたマイクロストリップ線路225の一端225aに接続されている。 The tenth dielectric layer 110 has the two capacitor electrodes 220 and 221 formed thereon. One capacitor electrode 220 is connected to one end 224a of the microstrip line 224 formed in the twelfth dielectric layer 112 via the via conductor 220a and the via conductor 222 formed in the eleventh dielectric layer 111. It is connected. The other capacitor electrode 221 is one end of a microstrip line 225 formed on the twelfth dielectric layer 112 via a via conductor 221a and a via conductor 223 formed on the eleventh dielectric layer 111. Connected to 225a.
　第１１層目の誘電体層111には上記２つのビア導体222,223が形成されている。 In the eleventh dielectric layer 111, the two via conductors 222 and 223 are formed.
　第１２層目の誘電体層112には２つのマイクロストリップ線路224,225が形成されている。一方のマイクロストリップ線路224の他端224bはビア導体及び第１３層目の誘電体層113に形成されたビア導体226を介して第１４層目の誘電体層114に形成されたマイクロストリップ線路228の一端228aに接続されている。また、他方のマイクロストリップ線路225の他端225bはビア導体及び第１３層目の誘電体層113に形成されたビア導体227を介して第１４層目の誘電体層114に形成されたマイクロストリップ線路229の一端229aに接続されている。 Two microstrip lines 224 and 225 are formed on the twelfth dielectric layer 112. The other end 224b of one microstrip line 224 is connected to the microstrip line 228 formed in the 14th dielectric layer 114 via the via conductor and the via conductor 226 formed in the 13th dielectric layer 113. Is connected to one end 228a. The other end 225b of the other microstrip line 225 is connected to the microstrip formed in the 14th dielectric layer 114 via the via conductor and the via conductor 227 formed in the 13th dielectric layer 113. It is connected to one end 229a of the track 229.
　第１３層目の誘電体層113には上記２つのビア導体226,227が形成されている。 The above-mentioned two via conductors 226 and 227 are formed in the thirteenth dielectric layer 113.
　第１４層目の誘電体層114には上記２つのマイクロストリップ線路228,229が形成されている。一方のマイクロストリップ線路228の他端228bはビア導体及び第１５層目の誘電体層115に形成されたビア導体230を介して第１６層目の誘電体層116に形成されたマイクロストリップ線路232の一端232aに接続されている。また、他方のマイクロストリップ線路229の他端229bはビア導体及び第１５層目の誘電体層115に形成されたビア導体231を介して第１６層目の誘電体層116に形成されたマイクロストリップ線路233の一端233aに接続されている。 The above-mentioned two microstrip lines 228 and 229 are formed on the 14th dielectric layer 114. The other end 228b of one microstrip line 228 is connected to the microstrip line 232 formed in the 16th dielectric layer 116 via the via conductor 230 and the via conductor 230 formed in the 15th dielectric layer 115. Is connected to one end 232a. The other end 229b of the other microstrip line 229 has a microstrip formed on the 16th dielectric layer 116 via a via conductor and a via conductor 231 formed on the 15th dielectric layer 115. The line 233 is connected to one end 233a.
　第１５層目の誘電体層115には上記２つのビア導体230,231が形成されている。 The two via conductors 230 and 231 are formed in the fifteenth dielectric layer 115.
　第１６層目の誘電体層116には上記２つのマイクロストリップ線路232,233が形成されている。一方のマイクロストリップ線路232の他端232bは外部端子11に接続され、他方のマイクロストリップ線路233の他端233bは外部端子13に接続されている。ここで、３つのマイクロストリップ線路224,228,232はインダクタL1を構成し、３つのマイクロストリップ線路225,229,233はインダクタL2を構成する。 The sixteenth dielectric layer 116 has the two microstrip lines 232 and 233 formed thereon. The other end 232 b of one microstrip line 232 is connected to the external terminal 11, and the other end 233 b of the other microstrip line 233 is connected to the external terminal 13. Here, the three microstrip lines 224, 228, and 232 constitute an inductor L1, and the three microstrip lines 225, 229, and 233 constitute an inductor L2.
　第１７層目の誘電体層117にはコンデンサ電極234が形成されている。 A capacitor electrode 234 is formed on the 17th dielectric layer 117.
　第１８層目の誘電体層118にはコンデンサ電極234の一端部234aに対向するように配置されたコンデンサ電極235と、コンデンサ電極234の他端部234bに対向するように配置されたコンデンサ電極236が形成されている。一方のコンデンサ電極235は後述する接地電極237と共にコンデンサC1を構成する。他方のコンデンサ電極236は接地電極237と共にコンデンサC4を構成する。また、コンデンサ電極234とコンデンサ電極235とコンデンサ電極236によってコンデンサC5が構成される。 The 18th dielectric layer 118 has a capacitor electrode 235 arranged to face one end 234a of the capacitor electrode 234 and a capacitor electrode 236 arranged to face the other end 234b of the capacitor electrode 234. Is formed. One capacitor electrode 235 forms a capacitor C1 together with a ground electrode 237 described later. The other capacitor electrode 236 and the ground electrode 237 constitute a capacitor C4. The capacitor electrode 234, the capacitor electrode 235, and the capacitor electrode 236 constitute a capacitor C5.
　第１９層目の誘電体層119には誘電体層の表面のほぼ全面に接地電極237が形成され、接地電極237は外部端子12,15に接続されている。 A ground electrode 237 is formed on almost the entire surface of the dielectric layer 119 of the 19th layer, and the ground electrode 237 is connected to the external terminals 12 and 15.
　また、ローパスフィルタLF1,LF2の減衰周波数特性は図４に示すように設定され、遮断周波数は２５００ＭＨｚに設定されている。本実施形態における方向性結合回路装置１の適応周波数帯域は５００ＭＨｚから２７００ＭＨｚの帯域である。なお、ローパスフィルタLF1,LF2の減衰周波数特性としては、方向性結合回路装置１の適応周波数帯域の高域部に減衰周波数特性の傾斜部を有するものであり、適応周波数帯域の全域において結合度の最大値と最小値の差が所定値以下となるものであれば良い。本実施形態では方向性結合回路装置１の結合度の最大値と最小値の差が１０ｄＢ以下となるような減衰周波数特性を有するローパスフィルタLF1,LF2を用いている。ここで、方向性結合回路装置１の結合度とは、入力ポート（外部端子）14への入力電力に対する結合ポート（外部端子）11からの出力電力の割合である。 The attenuation frequency characteristics of the low-pass filters LF1 and LF2 are set as shown in FIG. 4, and the cutoff frequency is set to 2500 MHz. The adaptive frequency band of the directional coupling circuit device 1 in this embodiment is a band from 500 MHz to 2700 MHz. As the attenuation frequency characteristics of the low-pass filters LF1 and LF2, the directional coupling circuit device 1 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band. It is sufficient if the difference between the maximum value and the minimum value is a predetermined value or less. In the present embodiment, low-pass filters LF1 and LF2 having attenuation frequency characteristics such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 1 is 10 dB or less are used. Here, the degree of coupling of the directional coupling circuit device 1 is the ratio of the output power from the coupling port (external terminal) 11 to the input power to the input port (external terminal) 14.
　上記構成の方向性結合回路装置１は、上記のように結合用副線路P2と結合ポート（外部端子）11との間にローパスフィルタLF1を介在して設けたので、結合用副線路P2に誘起された誘導起電力はローパスフィルタLF1の周波数特性に応じて減衰されて結合ポート（外部端子）11に出力される。これにより、本実施形態の方向性結合回路装置１の結合度は、図５に示す周波数特性を有する。すなわち、方向性結合回路装置１では、結合ポート11に出力される高周波数帯域側の電力の値は低周波数帯域側の電力の値に近づくので、高周波数帯域側の結合度が低周波数帯域側の結合度に近づき、適応周波数帯域内における結合度の最大値と最小値の差が従来よりも低減される。 Since the directional coupling circuit device 1 having the above configuration is provided with the low-pass filter LF1 interposed between the coupling subline P2 and the coupling port (external terminal) 11 as described above, it is induced in the coupling subline P2. The induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF1 and output to the coupling port (external terminal) 11. Thereby, the degree of coupling of the directional coupling circuit device 1 of the present embodiment has the frequency characteristics shown in FIG. That is, in the directional coupling circuit device 1, the power value on the high frequency band side output to the coupling port 11 approaches the power value on the low frequency band side. Thus, the difference between the maximum value and the minimum value of the coupling degree within the adaptive frequency band is reduced as compared with the conventional example.
　ここで、本願実施形態では上記のようにローパスフィルタLF1を設けることにより適応周波数帯域内における結合度の最大値と最小値の差が従来よりも低減されるが、結合度が従来例よりも低下する。これを改善するためには、主線路P1と結合用副線路P2との結合度を増すために主線路P1と結合用副線路P2と間の距離を縮める或いは主線路P1と結合用副線路P2とが結合する部分の距離を長くする等の方法が考えられる。主線路P1と結合用副線路P2とが結合する部分の距離を長くする場合、主線路P1の長さが長くなるため、挿入損失が増加するので、主線路P1と結合用副線路P2と間の距離を縮める方法をとることが好ましい。 Here, in the present embodiment, by providing the low-pass filter LF1 as described above, the difference between the maximum value and the minimum value of the coupling degree in the adaptive frequency band is reduced as compared with the conventional case, but the coupling degree is lower than the conventional example. To do. In order to improve this, in order to increase the degree of coupling between the main line P1 and the coupling subline P2, the distance between the main line P1 and the coupling subline P2 is reduced, or the main line P1 and the coupling subline P2 are reduced. It is conceivable to increase the distance of the part where the two are connected. When the distance between the main line P1 and the coupling subline P2 is increased, the length of the main line P1 is increased, so that the insertion loss increases, so that there is an increase in the distance between the main line P1 and the coupling subline P2. It is preferable to take a method of reducing the distance.
　また、結合用副線路P2の他端とアイソレーションポート（外部端子）13との間にローパスフィルタLF2を設けたので、アイソレーションを改善することができる。すなわち、アイソレーションは入力ポート（外部端子）14への入力電力に対するアイソレーションポート（外部端子）13からの出力電力の割合で表されるので、上記ローパスフィルタLF2を設けることによりローパスフィルタLF2の周波数特性に応じてアイソレーションポート13からの出力電力が低減されるため、アイソレーションが改善される。 Also, since the low pass filter LF2 is provided between the other end of the coupling sub-line P2 and the isolation port (external terminal) 13, the isolation can be improved. In other words, the isolation is expressed by the ratio of the output power from the isolation port (external terminal) 13 to the input power to the input port (external terminal) 14, and therefore the frequency of the low-pass filter LF2 is provided by providing the low-pass filter LF2. Since the output power from the isolation port 13 is reduced according to the characteristics, the isolation is improved.
　さらに、方向性(Directivity)はアイソレーションポート13からの出力電力と結合ポート11からの出力電力の割合で表されるので、ローパスフィルタLF2を設けない場合に比べてローパスフィルタLF2を設けた場合の方が方向性を改善することができる。 Furthermore, since the directivity is expressed as the ratio of the output power from the isolation port 13 and the output power from the coupling port 11, the low-pass filter LF2 is provided compared to the case where the low-pass filter LF2 is not provided. The directionality can be improved.
　なお、ローパスフィルタLF2に代えてアッテネータを設けてもアイソレーション及び方向性を改善することができる。 Note that isolation and directivity can be improved even if an attenuator is provided instead of the low-pass filter LF2.
　また、結合用副線路P1のインピーダンスを高くすることでインダクタンス成分が増加するので、ローパスフィルタLF1,LF2の遮断周波数を低域側にシフトすることが可能である。 Also, since the inductance component increases by increasing the impedance of the coupling sub-line P1, it is possible to shift the cutoff frequency of the low-pass filters LF1 and LF2 to the low frequency side.
　また、上記実施形態では方向性結合回路装置１を直方体形状の積層素体によって形成し、主線路P1及び結合用副線路P2を構成するマイクロストリップ線路201,202,205が形成された誘電体層102～107からなる方向性結合部とローパスフィルタLF1,LF2を構成するマイクロストリップ線路及びコンデンサ電極が形成された誘電体層109～119からなるフィルタ部との間に接地電極215を有する誘電体層108を設けているので、方向性結合部とフィルタ部との間のアイソレーションが向上しこれらの間の不要な電磁界結合の発生を防ぐことができる。 Further, in the above embodiment, the directional coupling circuit device 1 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 102 to 107 in which the microstrip lines 201, 202, and 205 constituting the main line P1 and the coupling subline P2 are formed. A dielectric layer 108 having a ground electrode 215 is provided between the directional coupling portion and the filter portion comprising the dielectric layers 109 to 119 on which the microstrip line and the capacitor electrodes constituting the low-pass filters LF1 and LF2 are formed. Therefore, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic field coupling between them can be prevented.
　上記実施形態においては方向性結合回路装置１をなす積層素体は1.6mm×0.80mm×0.65mmの寸法に形成されている。このように積層素体によって方向性結合回路装置１を形成することにより小型に形成することができる。 In the above embodiment, the multilayer body constituting the directional coupling circuit device 1 is formed to have a size of 1.6 mm × 0.80 mm × 0.65 mm. In this way, the directional coupling circuit device 1 can be formed in a small size by using the multilayer body.
　また、本実施形態では方向性結合回路装置１を積層素体によって形成したが、これに限定されることはなく、上記回路構成であれば上記と同様の効果を得ることができることは言うまでもない。 In the present embodiment, the directional coupling circuit device 1 is formed of a laminated element body. However, the present invention is not limited to this, and it is needless to say that the same effect as described above can be obtained with the above circuit configuration.
　次に、本発明の第２実施形態を説明する。 Next, a second embodiment of the present invention will be described.
　図６は本発明の第２実施形態における方向性結合回路装置を示す外観斜視図、図７は本発明の第２実施形態における方向性結合回路装置を示す回路図、図８は本発明の第２実施形態における方向性結合回路装置を示す分解斜視図である。 6 is an external perspective view showing a directional coupling circuit device according to the second embodiment of the present invention, FIG. 7 is a circuit diagram showing the directional coupling circuit device according to the second embodiment of the present invention, and FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 2 embodiment.
　図において、２は方向性結合回路装置で、内部層にマイクロストリップ線路或いは導体電極或いは接地電極が形成された直方体形状の積層素体20からなり、該積層素体20の両側面には底面側から上面側に延びるように外部端子21～26が形成されている。外部端子21は結合ポートで、後述するローパスフィルタLF1の一端に接続されている。ローパスフィルタLF1の他端は結合用副線路P2の一端に接続されている。外部端子22,25は接地端子である。外部端子23はアイソレーションポートで、結合用副線路P2の他端に接続されている。外部端子24は入力ポートで、主線路P1の一端に接続されると共にコンデンサC7を介して接地端子に接続されている。外部端子26は出力ポートで、主線路P1の他端に接続されると共にコンデンサC6を介して接地端子に接続されている。なお、主線路P1と結合用副線路P2によって方向性結合回路CPが構成されている。 In the figure, reference numeral 2 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 20 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer. External terminals 21 to 26 are formed so as to extend from the upper surface side to the upper surface side. The external terminal 21 is a coupling port and is connected to one end of a low-pass filter LF1 described later. The other end of the low-pass filter LF1 is connected to one end of the coupling subline P2. The external terminals 22 and 25 are ground terminals. The external terminal 23 is an isolation port and is connected to the other end of the coupling subline P2. The external terminal 24 is an input port and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7. The external terminal 26 is an output port that is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6. A directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
　図７に示すように、ローパスフィルタLF1はインダクタL1と２つのコンデンサC1,C2から構成されたπ型ローパスフィルタであり、インダクタL1の一端は結合ポート（外部端子）21に接続されると共にコンデンサC1を介して接地端子に接続されている。インダクタL1の他端は結合用副線路P2の一端に接続されると共にコンデンサC2を介して接地端子に接続されている。 As shown in FIG. 7, the low-pass filter LF1 is a π-type low-pass filter including an inductor L1 and two capacitors C1 and C2. One end of the inductor L1 is connected to a coupling port (external terminal) 21 and a capacitor C1. It is connected to the ground terminal via The other end of the inductor L1 is connected to one end of the coupling sub-line P2 and is connected to the ground terminal via the capacitor C2.
　また、コンデンサC6,C7は主線路P1の波長短縮用コンデンサである。 The capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
　方向性結合回路装置２は、図８に示すように、所定の厚さを有する複数の誘電体層（絶縁体層）301～311を積層して構成されており、所定層の誘電体層には表面にマイクロストリップ線路或いは導電体電極或いは接地電極が設けられている。 As shown in FIG. 8, the directional coupling circuit device 2 is configured by laminating a plurality of dielectric layers (insulator layers) 301 to 311 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
　図８において最上層の誘電体層301はダミー層であり、第２層目の誘電体層302の表面には主線路P1を構成するマイクロストリップ線路401と結合用副線路P2を構成するマイクロストリップ線路402が設けられている。マイクロストリップ線路401の一端401aは入力ポートを構成する外部端子24に接続され他端401bは出力ポートを構成する外部端子26に接続されている。 In FIG. 8, the uppermost dielectric layer 301 is a dummy layer, and the microstrip line 401 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 302. A line 402 is provided. One end 401a of the microstrip line 401 is connected to the external terminal 24 constituting the input port, and the other end 401b is connected to the external terminal 26 constituting the output port.
　マイクロストリップ線路402の一端402aはビア導体及び第３層目の誘電体層303に設けられたビア導体404を介して第４層目の誘電体層304に形成されているマイクロストリップ線路405の一端405aに接続されている。また、マイクロストリップ線路402の他端402bはビア導体を介して第３層目の誘電体層303に形成されているマイクロストリップ線路403の一端403aに接続されている。 One end 402a of the microstrip line 402 is one end of the microstrip line 405 formed in the fourth dielectric layer 304 via the via conductor and the via conductor 404 provided in the third dielectric layer 303. Connected to 405a. The other end 402b of the microstrip line 402 is connected to one end 403a of the microstrip line 403 formed in the third dielectric layer 303 via a via conductor.
　第３層目の誘電体層303には上記ビア導体404とマイクロストリップ線路403が形成され、マイクロストリップ線路403の他端403bはアイソレーションポートをなす外部端子23に接続されている。 In the third dielectric layer 303, the via conductor 404 and the microstrip line 403 are formed, and the other end 403b of the microstrip line 403 is connected to the external terminal 23 forming an isolation port.
　第４層目の誘電体層304には上記マイクロストリップ線路405と２つのコンデンサ電極406,407が形成されている。コンデンサ電極406は外部端子24に接続され、コンデンサ電極407は外部端子26に接続されている。ここで、コンデンサ電極406は後述する接地電極408と共にコンデンサC7を構成し、コンデンサ電極407は接地電極408と共にコンデンサC6を構成する。 The microstrip line 405 and two capacitor electrodes 406 and 407 are formed on the fourth dielectric layer 304. The capacitor electrode 406 is connected to the external terminal 24, and the capacitor electrode 407 is connected to the external terminal 26. Here, the capacitor electrode 406 forms a capacitor C7 together with a ground electrode 408, which will be described later, and the capacitor electrode 407 forms a capacitor C6 together with the ground electrode 408.
　また、マイクロストリップ線路405の他端405bはビア導体及び第５層目の誘電体層305に形成されたビア導体409を介して第６層目の誘電体層306に形成されたコンデンサ電極410に接続されている。ここで、コンデンサ電極410は接地電極408と共にコンデンサC2を構成する。 The other end 405b of the microstrip line 405 is connected to the capacitor electrode 410 formed on the sixth dielectric layer 306 via the via conductor and the via conductor 409 formed on the fifth dielectric layer 305. It is connected. Here, the capacitor electrode 410 and the ground electrode 408 constitute a capacitor C2.
　第５層目の誘電体層305には誘電体層の表面のほぼ全面に接地電極408が形成され、接地電極408は外部端子22,25に接続されている。また、接地電極408には開口部408aが形成され、開口部408aの中心には接地電極408から絶縁されたビア導体409が形成されている。 A ground electrode 408 is formed on almost the entire surface of the dielectric layer 305 of the fifth layer, and the ground electrode 408 is connected to the external terminals 22 and 25. An opening 408a is formed in the ground electrode 408, and a via conductor 409 insulated from the ground electrode 408 is formed in the center of the opening 408a.
　第６層目の誘電体層306には上記コンデンサ電極410が形成されており、コンデンサ電極410はビア導体410aを介して第７層目の誘電体層307に形成されたマイクロストリップ線路411の一端411aに接続されている。 The capacitor electrode 410 is formed on the sixth dielectric layer 306, and the capacitor electrode 410 is one end of the microstrip line 411 formed on the seventh dielectric layer 307 via the via conductor 410a. Connected to 411a.
　第７層目の誘電体層307にはマイクロストリップ線路411が形成されており、マイクロストリップ線路411の他端411bはビア導体を介して第８層目の誘電体層308に形成されたマイクロストリップ線路412の一端412aに接続されている。 A microstrip line 411 is formed on the seventh dielectric layer 307, and the other end 411b of the microstrip line 411 is formed on the eighth dielectric layer 308 via a via conductor. The line 412 is connected to one end 412a.
　第８層目の誘電体層308には上記マイクロストリップ線路412が形成されており、マイクロストリップ線路412の他端412bはビア導体を介して第９層目の誘電体層309に形成されたマイクロストリップ線路413の一端413aに接続されている。 The microstrip line 412 is formed on the eighth dielectric layer 308, and the other end 412b of the microstrip line 412 is formed on the ninth dielectric layer 309 via a via conductor. The strip line 413 is connected to one end 413a.
　第９層目の誘電体層309には上記マイクロストリップ線路413が形成されており、マイクロストリップ線路413の他端413bは外部端子21に接続されている。ここで、３つのマイクロストリップ線路411,412,413はインダクタL1を構成する。 The microstrip line 413 is formed on the ninth dielectric layer 309, and the other end 413 b of the microstrip line 413 is connected to the external terminal 21. Here, the three microstrip lines 411, 412, and 413 constitute an inductor L1.
　第１０層目の誘電体層310にはコンデンサ電極414,415が形成されている。一方のコンデンサ電極414は後述する接地電極416と共にコンデンサC1を構成する。他方のコンデンサ電極415は接地電極416と共にマッチング調整用のコンデンサを構成する。このマッチング調整のコンデンサは設けなくても、所定の機能は達成される。尚、回路によってはより良いアイソレーション特性を得るために、マッチング調整用のコンデンサを設けた方がよい場合がある。 Capacitor electrodes 414 and 415 are formed on the tenth dielectric layer 310. One capacitor electrode 414 forms a capacitor C1 together with a ground electrode 416 described later. The other capacitor electrode 415 and the ground electrode 416 constitute a matching adjustment capacitor. Even if this matching adjustment capacitor is not provided, the predetermined function is achieved. Depending on the circuit, it may be better to provide a matching adjustment capacitor in order to obtain better isolation characteristics.
　第１１層目の誘電体層311には誘電体層の表面のほぼ全面に接地電極416が形成され、接地電極416は外部端子22,25に接続されている。 In the eleventh dielectric layer 311, a ground electrode 416 is formed on almost the entire surface of the dielectric layer, and the ground electrode 416 is connected to the external terminals 22 and 25.
　また、ローパスフィルタLF1の減衰周波数特性は第１実施形態と同様であり、遮断周波数は２５００ＭＨｚに設定されている。本実施形態における方向性結合回路装置２の適応周波数帯域は５００ＭＨｚから２７００ＭＨｚの帯域である。なお、ローパスフィルタLF1の減衰周波数特性としては、方向性結合回路装置２の適応周波数帯域の高域部に減衰周波数特性の傾斜部を有するものであり、適応周波数帯域の全域において結合度の最大値と最小値の差が所定値以下となるものであれば良い。本実施形態では方向性結合回路装置２の結合度の最大値と最小値の差が１０ｄＢ以下となるような減衰周波数特性を有するローパスフィルタLF1を用いている。ここで、方向性結合回路装置２の結合度とは、入力ポート（外部端子）24への入力電力に対する結合ポート（外部端子）21からの出力電力の割合である。 The attenuation frequency characteristic of the low-pass filter LF1 is the same as that of the first embodiment, and the cutoff frequency is set to 2500 MHz. The adaptive frequency band of the directional coupling circuit device 2 in this embodiment is a band from 500 MHz to 2700 MHz. Note that the attenuation frequency characteristic of the low-pass filter LF1 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band of the directional coupling circuit device 2, and the maximum value of the coupling degree in the entire adaptive frequency band. As long as the difference between the minimum value and the minimum value is equal to or less than a predetermined value. In the present embodiment, a low-pass filter LF1 having an attenuation frequency characteristic such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 2 is 10 dB or less is used. Here, the degree of coupling of the directional coupling circuit device 2 is a ratio of output power from the coupling port (external terminal) 21 to input power to the input port (external terminal) 24.
　上記構成の方向性結合回路装置２は、上記のように結合用副線路P2と結合ポート（外部端子）21との間にローパスフィルタLF1を介在して設けたので、結合用副線路P2に誘起された誘導起電力はローパスフィルタLF1の周波数特性に応じて減衰されて結合ポート（外部端子）21に出力される。これにより、本実施形態の方向性結合回路装置２では、結合ポート21に出力される高周波数帯域側の電力の値は低周波数帯域側の電力の値に近づくので、高周波数帯域側の結合度が低周波数帯域側の結合度に近づき、適応周波数帯域内における結合度の最大値と最小値の差が従来よりも低減される。 Since the directional coupling circuit device 2 having the above configuration is provided with the low-pass filter LF1 interposed between the coupling subline P2 and the coupling port (external terminal) 21 as described above, it is induced in the coupling subline P2. The induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF1 and output to the coupling port (external terminal) 21. Thereby, in the directional coupling circuit device 2 of the present embodiment, the power value on the high frequency band side output to the coupling port 21 approaches the power value on the low frequency band side. Approaches the degree of coupling on the low frequency band side, and the difference between the maximum value and the minimum value of the degree of coupling within the adaptive frequency band is reduced as compared with the prior art.
　なお、結合用副線路P1のインピーダンスを高くすることでインダクタンス成分が増加するので、ローパスフィルタLF1,LF2の遮断周波数を低域側にシフトすることが可能である。 Since the inductance component increases by increasing the impedance of the coupling sub-line P1, it is possible to shift the cutoff frequency of the low-pass filters LF1 and LF2 to the low frequency side.
　また、上記実施形態では方向性結合回路装置２を直方体形状の積層素体によって形成し、主線路P1及び結合用副線路P2を構成するマイクロストリップ線路401,402,405が形成された誘電体層302～304からなる方向性結合部とローパスフィルタLF1を構成するマイクロストリップ線路及びコンデンサ電極が形成された誘電体層306～311からなるフィルタ部との間に接地電極408を有する誘電体層305を設けているので、方向性結合部とフィルタ部との間のアイソレーションが向上しこれらの間の不要な電磁界結合の発生を防ぐことができる。 In the above embodiment, the directional coupling circuit device 2 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 302 to 304 are formed with the microstrip lines 401, 402, and 405 constituting the main line P1 and the coupling subline P2. Since the dielectric layer 305 having the ground electrode 408 is provided between the directional coupling portion and the filter portion including the dielectric layers 306 to 311 on which the microstrip line and the capacitor electrode constituting the low-pass filter LF1 are formed. In addition, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic coupling between them can be prevented.
　また、本実施形態では、インダクタンスL1は５ｎＨ、コンデンサC1は１．５ｐＦ、コンデンサC2は１．５ｐＦに設定されている。 In this embodiment, the inductance L1 is set to 5 nH, the capacitor C1 is set to 1.5 pF, and the capacitor C2 is set to 1.5 pF.
　上記実施形態においては方向性結合回路装置２を上記のように積層素体によって形成したので、方向性結合回路装置２を小型に形成することができる。 In the above embodiment, since the directional coupling circuit device 2 is formed of the multilayer body as described above, the directional coupling circuit device 2 can be formed in a small size.
　また、本実施形態では方向性結合回路装置２を積層素体によって形成したが、これに限定されることはなく、上記回路構成であれば上記と同様の効果を得ることができることは言うまでもない。 In the present embodiment, the directional coupling circuit device 2 is formed of a laminated body. However, the present invention is not limited to this, and it is needless to say that the same effect as described above can be obtained with the above circuit configuration.
　次に、本発明の第３実施形態を説明する。 Next, a third embodiment of the present invention will be described.
　図９は本発明の第３実施形態における方向性結合回路装置を示す外観斜視図、図１０は本発明の第３実施形態における方向性結合回路装置を示す回路図、図１１は本発明の第３実施形態における方向性結合回路装置を示す分解斜視図である。 FIG. 9 is an external perspective view showing a directional coupling circuit device according to the third embodiment of the present invention, FIG. 10 is a circuit diagram showing the directional coupling circuit device according to the third embodiment of the present invention, and FIG. It is a disassembled perspective view which shows the directional coupling circuit apparatus in 3 embodiment.
　図において、３は方向性結合回路装置で、内部層にマイクロストリップ線路或いは導体電極或いは接地電極が形成された直方体形状の積層素体30からなり、該積層素体30の両側面には底面側から上面側に延びるように外部端子31～36が形成されている。外部端子31は結合ポートで、後述するローパスフィルタLF3の一端に接続されている。ローパスフィルタLF3の他端は結合用副線路P2の一端に接続されている。外部端子32,35は接地端子である。外部端子33はアイソレーションポートで、結合用副線路P2の他端に接続されている。外部端子34は入力ポートで、主線路P1の一端に接続されると共にコンデンサC7を介して接地端子に接続されている。外部端子26は出力ポートで、主線路P1の他端に接続されると共にコンデンサC6を介して接地端子に接続されている。なお、主線路P1と結合用副線路P2によって方向性結合回路CPが構成されている。 In the figure, reference numeral 3 denotes a directional coupling circuit device, which is composed of a rectangular parallelepiped laminated body 30 in which a microstrip line, a conductor electrode, or a ground electrode is formed in an inner layer. External terminals 31 to 36 are formed so as to extend from the upper surface side to the upper surface side. The external terminal 31 is a coupling port and is connected to one end of a low-pass filter LF3 described later. The other end of the low-pass filter LF3 is connected to one end of the coupling subline P2. The external terminals 32 and 35 are ground terminals. The external terminal 33 is an isolation port and is connected to the other end of the coupling subline P2. The external terminal 34 is an input port, and is connected to one end of the main line P1 and is connected to the ground terminal via the capacitor C7. The external terminal 26 is an output port that is connected to the other end of the main line P1 and is connected to the ground terminal via the capacitor C6. A directional coupling circuit CP is constituted by the main line P1 and the coupling subline P2.
　図１０に示すように、ローパスフィルタLF3は２つのインダクタL3,L4と１つのコンデンサC8から構成されたＴ型ローパスフィルタであり、インダクタL3の一端は結合ポート（外部端子）31に接続され、インダクタL3の他端はインダクタL4の一端に接続されると共にコンデンサC8を介して接地端子に接続されている。インダクタL4の他端は結合用副線路P2の一端に接続されている。 As shown in FIG. 10, the low-pass filter LF3 is a T-type low-pass filter composed of two inductors L3 and L4 and one capacitor C8. One end of the inductor L3 is connected to a coupling port (external terminal) 31, and the inductor The other end of L3 is connected to one end of an inductor L4 and is connected to the ground terminal via a capacitor C8. The other end of the inductor L4 is connected to one end of the coupling subline P2.
　また、コンデンサC6,C7は主線路P1の波長短縮用コンデンサである。 The capacitors C6 and C7 are capacitors for shortening the wavelength of the main line P1.
　方向性結合回路装置３は、図１１に示すように、所定の厚さを有する複数の誘電体層（絶縁体層）501～511を積層して構成されており、所定層の誘電体層には表面にマイクロストリップ線路或いは導電体電極或いは接地電極が設けられている。 As shown in FIG. 11, the directional coupling circuit device 3 is configured by laminating a plurality of dielectric layers (insulator layers) 501 to 511 having a predetermined thickness. Is provided with a microstrip line, a conductor electrode, or a ground electrode.
　図１１において最上層の誘電体層501はダミー層であり、第２層目の誘電体層502の表面には主線路P1を構成するマイクロストリップ線路601と結合用副線路P2を構成するマイクロストリップ線路602が設けられている。マイクロストリップ線路601の一端601aは入力ポートを構成する外部端子34に接続され他端601bは出力ポートを構成する外部端子36に接続されている。 In FIG. 11, the uppermost dielectric layer 501 is a dummy layer, and the microstrip line 601 constituting the main line P1 and the microstrip constituting the coupling subline P2 are formed on the surface of the second dielectric layer 502. A track 602 is provided. One end 601a of the microstrip line 601 is connected to the external terminal 34 constituting the input port, and the other end 601b is connected to the external terminal 36 constituting the output port.
　マイクロストリップ線路602の一端602aはビア導体及び第３層目の誘電体層503に設けられたビア導体604を介して第４層目の誘電体層504に形成されているマイクロストリップ線路605の一端605aに接続されている。また、マイクロストリップ線路602の他端602bはビア導体を介して第３層目の誘電体層503に形成されているマイクロストリップ線路603の一端603aに接続されている。 One end 602a of the microstrip line 602 is one end of the microstrip line 605 formed in the fourth dielectric layer 504 via the via conductor and the via conductor 604 provided in the third dielectric layer 503. Connected to 605a. The other end 602b of the microstrip line 602 is connected to one end 603a of the microstrip line 603 formed in the third dielectric layer 503 via a via conductor.
　第３層目の誘電体層503には上記ビア導体604とマイクロストリップ線路603が形成され、マイクロストリップ線路603の他端603bはアイソレーションポートをなす外部端子33に接続されている。 The via conductor 604 and the microstrip line 603 are formed in the third dielectric layer 503, and the other end 603b of the microstrip line 603 is connected to the external terminal 33 forming an isolation port.
　第４層目の誘電体層504には上記マイクロストリップ線路605と２つのコンデンサ電極606,607が形成されている。コンデンサ電極606は外部端子34に接続され、コンデンサ電極607は外部端子36に接続されている。ここで、コンデンサ電極606は後述する接地電極608と共にコンデンサC7を構成し、コンデンサ電極607は接地電極608と共にコンデンサC6を構成する。 On the fourth dielectric layer 504, the microstrip line 605 and two capacitor electrodes 606 and 607 are formed. The capacitor electrode 606 is connected to the external terminal 34, and the capacitor electrode 607 is connected to the external terminal 36. Here, the capacitor electrode 606 constitutes a capacitor C7 together with a ground electrode 608 described later, and the capacitor electrode 607 constitutes a capacitor C6 together with the ground electrode 608.
　また、マイクロストリップ線路605の他端605bはビア導体及び第５層目の誘電体層505に形成されたビア導体609及び第６層目の誘電体層506に形成されたビア導体610を介して第７層目の誘電体層507に形成されたマイクロストリップ線路612の一端612aに接続されている。 The other end 605b of the microstrip line 605 is connected to a via conductor and a via conductor 609 formed in the fifth dielectric layer 505 and a via conductor 610 formed in the sixth dielectric layer 506. The microstrip line 612 formed on the seventh dielectric layer 507 is connected to one end 612a.
　第５層目の誘電体層505には誘電体層の表面のほぼ全面に接地電極608が形成され、接地電極608は外部端子32,35に接続されている。また、接地電極608には開口部608aが形成され、開口部608aの中心には接地電極608から絶縁されたビア導体609が形成されている。 In the fifth dielectric layer 505, a ground electrode 608 is formed on almost the entire surface of the dielectric layer, and the ground electrode 608 is connected to the external terminals 32 and 35. An opening 608a is formed in the ground electrode 608, and a via conductor 609 insulated from the ground electrode 608 is formed in the center of the opening 608a.
　第６層目の誘電体層506には上記ビア導体610とコンデンサ電極611が形成されており、コンデンサ電極611はビア導体611aを介して第７層目の誘電体層507に形成されたマイクロストリップ線路613の一端613aに接続されていると共にさらにビア導体及び第８層目の誘電体層508に形成されたビア導体615を介して第９層目の誘電体層509に形成されたマイクロストリップ線路617の他端617bに接続されている。 The via conductor 610 and the capacitor electrode 611 are formed on the sixth dielectric layer 506, and the capacitor electrode 611 is a microstrip formed on the seventh dielectric layer 507 via the via conductor 611a. A microstrip line connected to one end 613a of the line 613 and further formed in the ninth dielectric layer 509 via a via conductor and a via conductor 615 formed in the eighth dielectric layer 508. 617 is connected to the other end 617b.
　第７層目の誘電体層507には上記２つのマイクロストリップ線路612,613が形成されており、一方のマイクロストリップ線路612の他端612bはビア導体を介して第８層目の誘電体層508に形成されたマイクロストリップ線路614の一端614aに接続されている。また、他方のマイクロストリップ線路613の他端613bはビア導体を介して第８層目の誘電体層508に形成されたマイクロストリップ線路615の一端615aに接続されている。 The above-mentioned two microstrip lines 612 and 613 are formed on the seventh dielectric layer 507, and the other end 612b of one microstrip line 612 is connected to the eighth dielectric layer 508 via a via conductor. It is connected to one end 614a of the formed microstrip line 614. The other end 613b of the other microstrip line 613 is connected to one end 615a of the microstrip line 615 formed in the eighth dielectric layer 508 via a via conductor.
　第８層目の誘電体層508には上記ビア導体615及び上記２つのマイクロストリップ線路614,616が形成されており、一方のマイクロストリップ線路614の他端614bはビア導体を介して第９層目の誘電体層509に形成されたマイクロストリップ線路617の一端617aに接続されている。他方のマイクロストリップ線路616の他端616bはビア導体を介して第９層目の誘電体層509に形成されたマイクロストリップ線路618の一端618aに接続されている。 The eighth dielectric layer 508 is formed with the via conductor 615 and the two microstrip lines 614 and 616, and the other end 614b of one microstrip line 614 is connected to the ninth layer via the via conductor. The microstrip line 617 formed on the dielectric layer 509 is connected to one end 617a. The other end 616b of the other microstrip line 616 is connected to one end 618a of the microstrip line 618 formed on the ninth dielectric layer 509 via a via conductor.
　第９層目の誘電体層509には上記２つのマイクロストリップ線路617,618が形成されており、マイクロストリップ線路618の他端618bは外部端子31に接続されている。ここで、２つのマイクロストリップ線路612,614はインダクタL4を構成し、３つのマイクロストリップ線路613,616,618はインダクタL3を構成する。 The above-mentioned two microstrip lines 617 and 618 are formed on the ninth dielectric layer 509, and the other end 618 b of the microstrip line 618 is connected to the external terminal 31. Here, the two microstrip lines 612 and 614 constitute an inductor L4, and the three microstrip lines 613, 616 and 618 constitute an inductor L3.
　第１０層目の誘電体層510にはコンデンサ電極619,620が形成されている。一方のコンデンサ電極619は後述する接地電極621と共にマッチング調整用のコンデンサを構成する。他方のコンデンサ電極620は接地電極621と共にマッチング調整用のコンデンサを構成する。これらのマッチング調整のコンデンサは設けなくても、所定の機能は達成される。尚、回路によってはより良いアイソレーション特性を得るために、マッチング調整用のコンデンサを設けた方がよい場合がある。 Capacitor electrodes 619 and 620 are formed on the tenth dielectric layer 510. One capacitor electrode 619 constitutes a matching adjustment capacitor together with a ground electrode 621 described later. The other capacitor electrode 620 forms a matching adjustment capacitor together with the ground electrode 621. Even if these matching adjustment capacitors are not provided, a predetermined function is achieved. Depending on the circuit, it may be better to provide a matching adjustment capacitor in order to obtain better isolation characteristics.
　第１１層目の誘電体層511には誘電体層の表面のほぼ全面に接地電極621が形成され、接地電極621は外部端子32,35に接続されている。 In the eleventh dielectric layer 511, a ground electrode 621 is formed on almost the entire surface of the dielectric layer, and the ground electrode 621 is connected to the external terminals 32 and 35.
　また、ローパスフィルタLF3の減衰周波数特性は第１実施形態と同様の特性であり、遮断周波数は２５００ＭＨｚに設定されている。本実施形態における方向性結合回路装置３の適応周波数帯域は５００ＭＨｚから２７００ＭＨｚの帯域である。なお、ローパスフィルタLF3の減衰周波数特性としては、方向性結合回路装置３の適応周波数帯域の高域部に減衰周波数特性の傾斜部を有するものであり、適応周波数帯域の全域において結合度の最大値と最小値の差が所定値以下となるものであれば良い。本実施形態では方向性結合回路装置３の結合度の最大値と最小値の差が１０ｄＢ以下となるような減衰周波数特性を有するローパスフィルタLF3を用いている。ここで、方向性結合回路装置３の結合度とは、入力ポート（外部端子）34への入力電力に対する結合ポート（外部端子）31からの出力電力の割合である。 The attenuation frequency characteristic of the low-pass filter LF3 is the same as that of the first embodiment, and the cutoff frequency is set to 2500 MHz. The adaptive frequency band of the directional coupling circuit device 3 in this embodiment is a band from 500 MHz to 2700 MHz. Note that the attenuation frequency characteristic of the low-pass filter LF3 has a slope part of the attenuation frequency characteristic in the high frequency part of the adaptive frequency band of the directional coupling circuit device 3, and the maximum value of the coupling degree in the entire adaptive frequency band. As long as the difference between the minimum value and the minimum value is equal to or less than a predetermined value. In the present embodiment, a low-pass filter LF3 having an attenuation frequency characteristic such that the difference between the maximum value and the minimum value of the degree of coupling of the directional coupling circuit device 3 is 10 dB or less is used. Here, the degree of coupling of the directional coupling circuit device 3 is a ratio of output power from the coupling port (external terminal) 31 to input power to the input port (external terminal) 34.
　上記構成の方向性結合回路装置３は、上記のように結合用副線路P2と結合ポート（外部端子）31との間にローパスフィルタLF3を介在して設けたので、結合用副線路P2に誘起された誘導起電力はローパスフィルタLF3の周波数特性に応じて減衰されて結合ポート（外部端子）31に出力される。これにより、本実施形態の方向性結合回路装置３では、結合ポート31に出力される高周波数帯域側の電力の値は低周波数帯域側の電力の値に近づくので、高周波数帯域側の結合度が低周波数帯域側の結合度に近づき、適応周波数帯域内における結合度の最大値と最小値の差が従来よりも低減される。 Since the directional coupling circuit device 3 having the above configuration is provided with the low pass filter LF3 interposed between the coupling subline P2 and the coupling port (external terminal) 31 as described above, it is induced in the coupling subline P2. The induced electromotive force is attenuated according to the frequency characteristic of the low-pass filter LF3 and output to the coupling port (external terminal) 31. Thereby, in the directional coupling circuit device 3 of the present embodiment, the power value on the high frequency band side output to the coupling port 31 approaches the power value on the low frequency band side. Approaches the degree of coupling on the low frequency band side, and the difference between the maximum value and the minimum value of the degree of coupling within the adaptive frequency band is reduced as compared with the prior art.
　なお、結合用副線路P1のインピーダンスを高くすることでインダクタンス成分が増加するので、ローパスフィルタLF3の遮断周波数を低域側にシフトすることが可能である。 In addition, since the inductance component increases by increasing the impedance of the coupling sub-line P1, the cutoff frequency of the low-pass filter LF3 can be shifted to the low frequency side.
　また、上記実施形態では方向性結合回路装置３を直方体形状の積層素体によって形成し、主線路P1及び結合用副線路P2を構成するマイクロストリップ線路601,602,603,605が形成された誘電体層502～504からなる方向性結合部とローパスフィルタLF3を構成するマイクロストリップ線路及びコンデンサ電極が形成された誘電体層506～511からなるフィルタ部との間に接地電極608を有する誘電体層505を設けているので、方向性結合部とフィルタ部との間のアイソレーションが向上しこれらの間の不要な電磁界結合の発生を防ぐことができる。 In the above embodiment, the directional coupling circuit device 3 is formed of a rectangular parallelepiped laminated body, and the dielectric layers 502 to 504 are formed with the microstrip lines 601, 602, 603, and 605 that constitute the main line P1 and the coupling subline P2. Since the dielectric layer 505 having the ground electrode 608 is provided between the directional coupling portion and the filter portion including the dielectric layers 506 to 511 on which the microstrip line and the capacitor electrode constituting the low-pass filter LF3 are formed. In addition, the isolation between the directional coupling portion and the filter portion is improved, and unnecessary electromagnetic coupling between them can be prevented.
　また、本実施形態では、インダクタンスL3は２．４ｎＨ、インダクタL4は２．４ｎＨ、コンデンサC8は１．２ｐＦに設定されている。 In this embodiment, the inductance L3 is set to 2.4 nH, the inductor L4 is set to 2.4 nH, and the capacitor C8 is set to 1.2 pF.
　上記実施形態においては方向性結合回路装置３を上記のように積層素体によって形成したので、方向性結合回路装置３を小型に形成することができる。 In the above embodiment, since the directional coupling circuit device 3 is formed of the multilayer body as described above, the directional coupling circuit device 3 can be formed in a small size.
　また、本実施形態では方向性結合回路装置３を積層素体によって形成したが、これに限定されることはなく、上記回路構成であれば上記と同様の効果を得ることができることは言うまでもない。 In the present embodiment, the directional coupling circuit device 3 is formed of a laminated body. However, the present invention is not limited to this, and it is needless to say that the same effects as described above can be obtained with the circuit configuration described above.
　本発明は方向性結合回路装置に関するものであり、特に適応周波数帯域における高帯域での結合度を低帯域の結合度に近づけることにより広い適応周波数帯域の全域において最大値と最小値の差が所定値以下となる結合度を有する方向性結合回路装置提供できるようにした。 The present invention relates to a directional coupling circuit device, and in particular, a difference between a maximum value and a minimum value is predetermined over a wide adaptive frequency band by bringing a coupling degree in a high band in an adaptive frequency band close to a coupling degree in a low band. It was made possible to provide a directional coupling circuit device having a degree of coupling that is less than the value.
　１…方向性結合回路装置、10…積層素体、11…結合ポート（外部端子）、12…接地端子、13…アイソレーションポート（外部端子）、14…入力ポート（外部端子）、15…接地端子、16…出力ポート（外部端子）、２…方向性結合回路装置、20…積層素体、21…結合ポート（外部端子）、22…接地端子、23…アイソレーションポート（外部端子）、24…入力ポート（外部端子）、25…接地端子、26…出力ポート（外部端子）、３…方向性結合回路装置、30…積層素体、31…結合ポート（外部端子）、32…接地端子、33…アイソレーションポート（外部端子）、34…入力ポート（外部端子）、35…接地端子、36…出力ポート（外部端子）、101～119…誘電体層（絶縁体層）、201,202,205,210,224,225,228,229,232,233,…マイクロストリップ線路、203,204,206,207,208,213,214216,217,220a,221a,222,223,226,227,230,231…ビア導体、211,212,220,221,234,235,236…コンデンサ電極、215,237…接地電極、301～311…誘電体層（絶縁体層）、401,402,403,405,411,412,413…マイクロストリップ線路、404,409,410a…ビア導体、406,407,410,414,415…コンデンサ電極、408,416…接地電極、501～511…誘電体層（絶縁体層）、601,602,605,612,613,614,616,617,618…マイクロストリップ線路、604,609,610a,615…ビア導体、606,607,611,19,620…コンデンサ電極、608,621…接地電極、CP…方向性結合回路、LF1,LF2,LF3…ローパスフィルタ。 DESCRIPTION OF SYMBOLS 1 ... Directional coupling circuit device, 10 ... Laminated body, 11 ... Coupling port (external terminal), 12 ... Grounding terminal, 13 ... Isolation port (external terminal), 14 ... Input port (external terminal), 15 ... Grounding Terminals, 16 ... Output port (external terminal), 2 ... Directional coupling circuit device, 20 ... Laminated body, 21 ... Coupling port (external terminal), 22 ... Ground terminal, 23 ... Isolation port (external terminal), 24 ... Input port (external terminal), 25 ... grounding terminal, 26 ... output port (external terminal), 3 ... directional coupling circuit device, 30 ... layered body, 31 ... coupling port (external terminal), 32 ... grounding terminal, 33 ... isolation port (external terminal), 34 ... input port (external terminal), 35 ... grounding terminal, 36 ... output port (external terminal), 101 to 119 ... dielectric layer (insulator layer), 201,202,205,210,224,225,228,229,232,233, ... micro Strip line, 203,204,206,207,208,213,214216,217,220a , 221a, 222,223,226,227,230,231 ... via conductor, 2111,212,220,221,234,235,236 ... capacitor electrode, 215,237 ... ground electrode, 301-311 ... dielectric layer (insulator layer), 401,402,403,405,411,412,413 ... microstrip line, 404,409,410a ... via conductor, 406,407,410,414,415 ... electrode Ground electrode, 501 to 511 ... dielectric layer (insulator layer), 601,602,605,612,613,614,616,617,618 ... microstrip line, 604,609,610a, 615 ... via conductor, 606,607,611,19,620 ... capacitor electrode, 608,621 ... ground electrode, CP ... directional coupling circuit, LF1 , LF2, LF3 ... Low pass filter.

Claims (6)

  1. 　一端が入力ポートに接続され、他端が出力ポートに接続された主線路と、前記主線路に沿って形成され、一端が前記入力ポート側の結合ポートに接続されるとともに他端が前記出力ポート側のアイソレーションポートに接続された結合用副線路とを備え、所定の適応周波数帯域で使用される方向性結合回路と、
    　前記適応周波数帯域の高域部に所定の減衰量を有し、前記結合ポートと前記副線路の一端との間に直列接続して介在されているローパスフィルタとを備えている
    　方向性結合回路装置。     One end is connected to the input port, the other end is connected to the output port, and the main line is formed along the main line. One end is connected to the input port side coupling port and the other end is the output port. A directional coupling circuit including a coupling sub-line connected to the side isolation port and used in a predetermined adaptive frequency band;
    A directional coupling circuit device comprising a low-pass filter having a predetermined attenuation amount in a high frequency portion of the adaptive frequency band and interposed in series between the coupling port and one end of the sub line .
  2. 　所定の周波数特性を有する第２のローパスフィルタが、前記アイソレーションポートと前記副線路の他端との間に直列接続して介在されている
    　請求項１に記載の方向性結合回路装置。     The directional coupling circuit device according to claim 1, wherein a second low-pass filter having a predetermined frequency characteristic is interposed in series between the isolation port and the other end of the sub line.
  3. 　前記結合ポートと前記アイソレーションポートとの間に所定の静電容量を有するコンデンサが接続されている
    　請求項１又は２に記載の方向性結合回路装置。     The directional coupling circuit device according to claim 1, wherein a capacitor having a predetermined capacitance is connected between the coupling port and the isolation port.
  4. 　前記ローパスフィルタがπ型ローパスフィルタである請求項１又は２に記載の方向性結合回路装置。 The directional coupling circuit device according to claim 1 or 2, wherein the low-pass filter is a π-type low-pass filter.
  5. 　前記ローパスフィルタがＴ型ローパスフィルタである請求項１又は２に記載の方向性結合回路装置。 The directional coupling circuit device according to claim 1 or 2, wherein the low-pass filter is a T-type low-pass filter.
  6. 　複数の絶縁体層を積層してなる装置本体と、
    　前記装置本体内部の所定層に設けられた複数のマイクロストリップ線路及び導電体電極と、
    　異なる所定層のマイクロストリップ線路或いは導電体電極間を導電接続する複数のビア導体と、
    　前記各ポートに対応して前記装置本体の表面に設けられるとともに所定のマイクロストリップ線路或いは導電体電極に接続された複数の端子電極とを有し、
    　前記主線路と副線路とローパスフィルタが前記導電体電極によって形成されている
    　請求項１乃至４の何れかに記載の方向性結合回路装置。     An apparatus body formed by laminating a plurality of insulator layers;
    A plurality of microstrip lines and conductor electrodes provided in a predetermined layer inside the device body;
    A plurality of via conductors for conductively connecting between microstrip lines or conductor electrodes of different predetermined layers;
    A plurality of terminal electrodes provided on the surface of the apparatus main body corresponding to the ports and connected to predetermined microstrip lines or conductor electrodes;
    The directional coupling circuit device according to claim 1, wherein the main line, the sub line, and the low-pass filter are formed by the conductor electrode.
PCT/JP2013/074967 2012-09-26 2013-09-17 Directional coupling circuit device WO2014050623A1 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2012212402A JP5814895B2 (en) 2012-09-26 2012-09-26 Directional coupling circuit device
JP2012-212402 2012-09-26

Publications (1)

Publication Number Publication Date
WO2014050623A1 true WO2014050623A1 (en) 2014-04-03

Family

ID=50388030

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2013/074967 WO2014050623A1 (en) 2012-09-26 2013-09-17 Directional coupling circuit device

Country Status (3)

Country Link
JP (1) JP5814895B2 (en)
TW (1) TWI532243B (en)
WO (1) WO2014050623A1 (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3928430A4 (en) * 2019-04-15 2022-04-27 Samsung Electronics Co., Ltd. Directional coupler and electronic device having the same
CN115428256A (en) * 2020-05-09 2022-12-02 株式会社村田制作所 Directional coupler
WO2023273391A1 (en) * 2021-06-30 2023-01-05 华为技术有限公司 Filtering-coupling integrated circuit, method, and device

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017098896A1 (en) * 2015-12-09 2017-06-15 株式会社村田製作所 Common mode choke coil and electronic device
JP2019062309A (en) 2017-09-25 2019-04-18 株式会社村田製作所 Directional coupler and communication unit

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141713A (en) * 2000-11-02 2002-05-17 Taise:Kk Directional coupler
EP1427053A1 (en) * 2002-12-06 2004-06-09 STMicroelectronics S.A. Directional coupler
WO2011074370A1 (en) * 2009-12-18 2011-06-23 株式会社村田製作所 Directional coupler
WO2012124374A1 (en) * 2011-03-14 2012-09-20 株式会社村田製作所 Directional coupler
JP2013030904A (en) * 2011-07-27 2013-02-07 Tdk Corp Directional coupler and wireless communication device

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002141713A (en) * 2000-11-02 2002-05-17 Taise:Kk Directional coupler
EP1427053A1 (en) * 2002-12-06 2004-06-09 STMicroelectronics S.A. Directional coupler
WO2011074370A1 (en) * 2009-12-18 2011-06-23 株式会社村田製作所 Directional coupler
WO2012124374A1 (en) * 2011-03-14 2012-09-20 株式会社村田製作所 Directional coupler
JP2013030904A (en) * 2011-07-27 2013-02-07 Tdk Corp Directional coupler and wireless communication device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3928430A4 (en) * 2019-04-15 2022-04-27 Samsung Electronics Co., Ltd. Directional coupler and electronic device having the same
US11374300B2 (en) 2019-04-15 2022-06-28 Samsung Electronics Co., Ltd Directional coupler and electronic device having the same
CN115428256A (en) * 2020-05-09 2022-12-02 株式会社村田制作所 Directional coupler
WO2023273391A1 (en) * 2021-06-30 2023-01-05 华为技术有限公司 Filtering-coupling integrated circuit, method, and device

Also Published As

Publication number Publication date
JP5814895B2 (en) 2015-11-17
JP2014068211A (en) 2014-04-17
TW201414074A (en) 2014-04-01
TWI532243B (en) 2016-05-01

Similar Documents

Publication Publication Date Title
US8629736B2 (en) Directional coupler
US9035717B2 (en) Balun transformer
KR100503956B1 (en) LC filter circuit, multilayered LC complex component, multiplexer and wireless communication apparatus
US7592885B2 (en) Stacked dielectric band-pass filter having a wider passband
WO2014050623A1 (en) Directional coupling circuit device
WO2015019722A1 (en) High frequency module
TWI521867B (en) Filter
US9413324B2 (en) Electronic component
KR20030014646A (en) LC filter circuit, multilayered LC complex component, multiplexer and wireless communication apparatus
JP2012019443A (en) Filter circuit and electronic component
TWI535204B (en) Electronic component
KR20010007016A (en) Lc filter
US10340575B2 (en) Directional coupler
JP5804076B2 (en) LC filter circuit and high frequency module
JP6315347B2 (en) Directional coupler and module using the same
US8400236B2 (en) Electronic component
WO2009107532A1 (en) Composite resonator, bandpass filter, diplexer, and wireless communication module and wireless communication device using composite resonator, bandpass filter and diplexer
JP7092239B2 (en) Matching circuit and communication equipment
US11108369B2 (en) Band pass filter
JP4432059B2 (en) Bandpass filter
JP2010011030A (en) Band-pass filter, radio communication module using the same, and radio communication apparatus
JP2003069362A (en) Diplexer
KR101221418B1 (en) Mono block dielectric filter including metamaterial structure and Communication relay apparatus using it
JP4873274B2 (en) Multilayer electronic components
JP4432060B2 (en) Bandpass filter

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 13842624

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 13842624

Country of ref document: EP

Kind code of ref document: A1