WO2014012405A1

WO2014012405A1 - Method and apparatus for processing vcg differential delay

Info

Publication number: WO2014012405A1
Application number: PCT/CN2013/077350
Authority: WO
Inventors: 莫裕超; 张创贞
Original assignee: 中兴通讯股份有限公司
Priority date: 2012-07-16
Filing date: 2013-06-17
Publication date: 2014-01-23
Also published as: CN103546226B; CN103546226A

Abstract

Disclosed are a method and an apparatus for processing a VCG differential delay. The method comprises: step 1: setting on a timer corresponding to each VCG member a differential transmission delay in transmitting a container frame by each VCG member; step 2: a container frame buffer unit buffering a container frame mapped by each VCG member, a delay unit informing a container frame transmission unit of a delay state of each VCG member according to the differential transmission delay set on the timer corresponding to each VCG member, and then proceeding to step 3; and step 3: for the VCG members in the delay state, the container frame transmission unit constructing an idle container frame and transmitting the idle container frame and for the VCG members not in the delay state, extracting a corresponding container frame from the container frame buffer unit and transmitting the container frame, and then proceeding to step 2. Through technical solutions of the present invention, the differential delay among the virtual concatenation groups can be reduced or eliminated, thereby avoiding a decapsulation failure for a destination end is unable to process the differential delay.

Description

VCG differential delay processing method and device

The present invention relates to the field of mobile communications, and in particular, to a method and apparatus for processing a differential delay of a Virtual Concatenation Group (VCG). Background technique

In the prior art, a VCG is composed of a plurality of adjacent or non-adjacent small virtual containers (Virtual Containers, referred to as VCs), which are composed of a single large virtual container, and these smaller virtual containers are in the process of being transmitted. Independent of each other, these smaller virtual containers are reassembled into an adjacent bandwidth at the endpoint of the transmission. In contrast to adjacent concatenation, it is only required to support the virtual concatenation function at the network element where the channel starts and ends, but not for the intermediate network element.

Because the virtual containers are independent of each other during the transfer process, the time for VCGs to reach the sinks varies, and differential delays occur between the different virtual containers at the sinks. In order to access adjacent payload areas, these delay differences must be compensated and individual VC members need to be reordered.

At the same time, for a virtual concatenation group consisting of VC-4/VC-3, each VC-3/VC-4 has its own channel overhead (Path OverHead, POH for short). Wherein, H4 in the POH byte is used as the virtual concatenation specific sequence number and multiframe indication defined below. For the virtual concatenation group composed of VC-12, the bit 2 of the POH byte K4 of the lower order channel VC-12 is used. The required information is transmitted between the transmitting end and the receiving end performing the VC-12 virtual concatenation signal reassembly. The maximum differential delay supported by VCG is 512 milliseconds (Microsecond, referred to as MS). At the same time, since the actual differential delay depends on the processing power of the sink, the differential delay allowed by different sinks also has a large gap.

Therefore, there is an urgent need for a technical solution to reduce or eliminate the virtual cascaded differential delay. Summary of the invention

The embodiment of the invention provides a method and a device for processing a differential delay of a VCG to solve the problem of large differential delay of each member of the virtual concatenation group in the prior art.

An embodiment of the present invention provides a method for processing a VCG differential delay, including: Step 1: Set a differential transmission delay of each VCG member sending container frame on a corresponding timer of each VCG member; Step 2, through a container frame buffer The unit caches the mapped container frames of each VCG member, and according to the differential transmission delay set on the corresponding timer of each VCG member, notifies the delay state of each VCG member of the container frame transmission unit by the delay unit, and performs step 3; Step 3: For the VCG member in the delayed state, the idle container frame is constructed and transmitted by the container frame transfer unit, and for the VCG member in the non-delay state, the corresponding container frame is taken out from the container frame buffer unit and transmitted. , go to step 2.

Preferably, the differential transmission delay is the difference between the minimum delay and the maximum delay of each VCG member reaching the sink.

Preferably, the differential transmission delay is an estimated differential delay value estimated by using a networking condition. Preferably, the differential transmission delay is an accurate differential delay value obtained by testing the tester. Preferably, in step 2, according to the differential transmission delay set on the corresponding timer of each VCG member, the delay state is notified by the delay unit to the delay status of each VCG member of the container frame transmission unit: if the corresponding timing of a VCG member is determined The delay count on the device is 0, then it is determined that the VCG member is in a non-delay state, and the VCG member of the container frame transmission unit is notified by the delay unit to be in a non-delay state; if it is determined that a certain VCG member is on the corresponding timer If the delay count is non-zero, it is determined that the VCG member is in a delay state, and the VCG member is notified to the container frame transmission unit by the delay unit after subtracting the corresponding delay count from the delay count on the corresponding timer of the VCG member. It is a delay state.

The embodiment of the present invention further provides a VCG differential delay processing device, including: a timer corresponding to each VCG member, configured to set a differential transmission time of each VCG member sending container frame a container frame buffer unit for buffering the mapped container frames of each VCG member, and calling the delay unit; and a delay unit for notifying the container according to the differential transmission delay set on the corresponding timer of each VCG member The delay state of each VCG member of the frame transfer unit, and the container frame transfer unit is called; the container frame transfer unit is configured to construct a free container frame and transmit the VCG member in the delayed state, for the non-delay state The VCG member takes the corresponding container frame from the container frame buffer unit and transmits it, and calls the container frame buffer unit.

Preferably, the differential transmission delay set by each timer is the difference between the minimum delay and the maximum delay of each VCG member reaching the sink end.

Preferably, the differential transmission delay set by each timer is an estimated differential delay value estimated by the networking condition.

Preferably, the differential transmission delay set by each timer is the exact differential delay value obtained by the tester.

Preferably, the delay unit is specifically configured to: if it is determined that the delay count on the corresponding timer of the VCG member is 0, determine that the VCG member is in a non-delay state, and notify the container frame transmission unit that the VCG member is non-extended Time state; if it is determined that the delay count on the corresponding timer of a VCG member is non-zero, it is determined that the VCG member is in a delay state, and the corresponding delay is subtracted from the delay count on the corresponding timer of the VCG member. After counting, the container frame transfer unit is notified that the VCG member is in a delayed state.

The beneficial effects of the present invention are as follows:

Notifying the delay state of each VCG member of the container frame transfer unit according to the differential transmission delay set on the corresponding timer of each VCG member, for the VCG member in the delayed state, the container frame transfer unit constructs the idle container frame and transmits the same. For the VCG member in the non-delay state, the corresponding container frame is taken out from the container frame buffer unit and transmitted, which solves the problem of large differential delay of each member of the virtual concatenation group in the prior art, and can reduce or eliminate The virtual cascaded differential delay prevents the sink from failing due to the differential delay exceeding the processing capability. 2 is a schematic structural diagram of a VCG differential delay processing system according to an embodiment of the present invention; FIG. 3 is a schematic diagram of a data flow on a transmitting side in the case where no transmission delay is introduced in the embodiment of the present invention;

4 is a flow chart showing the detailed processing of a VCG differential delay processing method according to an embodiment of the present invention;

FIG. 5 is a schematic diagram of data flow in a case of a transmission delay according to an embodiment of the present invention; FIG.

FIG. 6 is a schematic structural diagram of a VCG differential delay processing apparatus according to an embodiment of the present invention. A method and a device for processing a differential delay of a VCG are provided. By introducing a channel delay transmission device, the transmission delay between members of each virtual container (VC) in the VCG is adjusted, and the virtual delay is reduced or eliminated. Cascading group differential delay. The technical solution of the embodiment of the present invention can also solve the limitation that the VCG maximum differential delay is 512MS. The present invention will be further described in detail below with reference to the drawings and embodiments. It is understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

Method embodiment

According to an embodiment of the present invention, a method for processing a VCG differential delay is provided. FIG. 1 is a flowchart of a method for processing a VCG differential delay according to an embodiment of the present invention. As shown in FIG. 1, according to this step 101, The differential transmission delay of each VCG member sending container frame is set on the corresponding timer of each VCG member; wherein, the differential transmission delay is the difference between the minimum delay and the maximum delay of each VCG member reaching the sink end.

Preferably, in the embodiment of the present invention, the delay occurs mainly by line delay and network. Node device delay. The differential transmission delay may be an estimated differential delay value estimated by the networking condition, or may be an accurate differential delay value obtained by the tester.

Step 102: The container frame buffer unit buffers the mapped container frames of each VCG member, and according to the differential transmission delay set on the corresponding timer of each VCG member, notifies the VCG members of the container frame transmission unit by the delay unit. In the delay state, step 103 is performed, wherein the delay unit is mainly used for delay control;

Specifically, step 102 specifically includes the following processing:

If it is determined that the delay count on the corresponding timer of a VCG member is 0, it is determined that the VCG member is in a non-delay state, and the delay unit is used to notify the container frame transmission unit that the VCG member is in a non-delay state; The delay count on the corresponding timer of the VCG member is non-zero, then it is determined that the VCG member is in the delay state, and the delay count on the corresponding timer of the VCG member is subtracted from the corresponding delay count, and the delay is passed. The unit notifies the container frame transfer unit that the VCG member is in a delayed state.

Step 103: For the VCG member in the delayed state, construct a free container frame by the container frame transfer unit and transmit the same, and for the VCG member in the non-delay state, take the corresponding container frame from the container frame buffer unit and transmit the same. , go to step 102.

The technical solutions of the embodiments of the present invention are described in detail below with reference to the accompanying drawings.

2 is a schematic structural diagram of a VCG differential delay processing system according to an embodiment of the present invention. As shown in FIG. 2, the VCG differential delay processing device includes: a container frame buffer unit, a delay unit, and a container frame transfer unit. After the container frame of each VCG member is encapsulated and mapped, the device enters the VCG differential delay processing device, and the container frame buffer unit caches the container frame of each VCG member, and the delay unit sets the difference according to the corresponding timer of each VCG member. Sending a delay, notifying the delay status of each VCG member of the container frame transfer unit, the container frame transfer unit sequentially reads the container frame from the container frame buffer unit for transmission, and when the VCG member needs to delay, the container frame transmission of the corresponding VCG member The unit transmits the free container frame, temporarily does not read the container frame, and waits for the delay to be read. As shown in Figure 2, the channel delay transmission logic is introduced between the VC mapping and the cross-connection. The complexity of other functional logics is not increased due to the delay, and the corresponding relationship between the channel overhead and the payload of each channel is not affected. So, there is no need to introduce complex processing in order to maintain the correspondence between channel overhead and payload.

FIG. 3 is a schematic diagram of data flow on the transmitting side in the case where no transmission delay is introduced in the embodiment of the present invention. As shown in FIG. 3, the VCG is a virtual concatenation group of VC-12-3V, and the VCG includes three VC-12 members. . In the case where no transmission delay is introduced, the data flow diagram on the transmitting side is as shown in FIG. 3.

4 The member VC-12#2 reaches the sink end fastest, the delay to reach the sink end is 100 milliseconds, the delay of the member VC-12#3 reaching the sink end is 108 milliseconds, and the delay of the member VC-12#1 reaching the sink end The time is 116 milliseconds. The VCG has a differential delay of 16 milliseconds. To eliminate the differential delay of the VCG, let the different members of the VCG reach the sink at the same time, and set the transmission delay of the three members of the VCG. At the same time, in order not to introduce additional delay, the VC-12#1 transmission delay is set to 0 milliseconds, the member VC-12#2 transmission delay is 16 milliseconds, and the VC-12#3 transmission delay is 8 milliseconds. The VCG member channel shares a container frame buffer, which caches the mapped container frame. The container frame transfer unit of each member of the VCG sequentially reads the container frame from the cache for transmission. When the member needs to delay, the corresponding member channel transmitter transmits the free container frame, temporarily does not read the container frame, and waits for the delay to read again. take.

FIG. 4 is a flow chart showing the detailed processing of the VCG differential delay processing method according to the embodiment of the present invention. As shown in FIG. 4, the following processing is included:

Step 401, setting the delay count of the timer of VC-12#1 to 0, setting the delay count of the timer of VC-12#2 to 128 (16 milliseconds/125 microseconds), timing of VC-12#3 The delay count of the device is 64 (8 ms / 125 microseconds).

Step 402: The container frame buffer saves the mapped container frame of each member channel.

In step 403, the timer of the member VC-12#1 is counted as 0, and the corresponding transmitter state is notified to be a non-delay state. The counts of the members VC-12#2 and VC-12#3 timers are not 0, and the timers respectively decrement the counts by 1 to notify them that the corresponding transmitter state is the delay state. In step 404, each transmitter acquires a delay state and makes a determination.

Step 405: The transmitter state of the member VC-12#1 is a non-delay state, and the sender takes the container frame transmission from the container frame buffer.

Step 406: The transmitter state of the member VC-12#2 and the member VC-12#3 is a delay state, and the transmitter transmits the idle container frame.

In the embodiment of the present invention, each period is 125 microseconds, and steps 402 to 406 are repeated. After 8 milliseconds, the member VC-12#3 timer count becomes 0, and the transmitter status is notified to be non-delayed, at which point the transmitter begins to read the container frame from the cache for transmission. After another 8 milliseconds, the member VC-12#2 counter also becomes 0, and the transmitter state of VC-12#2 also becomes non-delayed state, at which time the transmitter of member VC-12#3 starts reading from the cache. The container frame is sent. The data flow diagram sent is shown in Figure 5.

In summary, by informing the delay state of each VCG member of the container frame transfer unit according to the differential transmission delay set on the corresponding timer of each VCG member, for the VCG member in the delayed state, the container frame transfer unit constructs the free container. The frame is transmitted and transmitted. For the VCG member in the non-delay state, the corresponding container frame is taken out from the container frame buffer unit and transmitted, which solves the joint differential delay, and avoids the sink end being out of the processing capability range due to the differential delay. , causing decapsulation to fail.

Device embodiment

According to an embodiment of the present invention, a processing device for a VCG differential delay is provided. FIG. 6 is a schematic structural diagram of a VCG differential delay processing device according to an embodiment of the present invention. The processing device of the VCG differential delay includes: a timer 60, a container frame buffer unit 62, a delay unit 64, and a container frame transfer unit 66. Hereinafter, each module of the embodiment of the present invention will be described in detail.

A timer 60 corresponding to each VCG member, configured to set each VCG member to send a container frame Differential transmission delay; where the differential transmission delay is the difference between the minimum delay and the maximum delay of each VCG member reaching the sink.

Preferably, in the embodiment of the present invention, the reason for the delay is mainly the line delay and the delay of the network node device. The differential transmission delay can be the estimated differential delay value estimated by the networking condition, or the exact differential delay value obtained by the tester.

The container frame buffer unit 62 is configured to cache the mapped container frame of each VCG member, and call the delay unit 64;

The delay unit 64 is mainly used for delay control: according to the differential transmission delay set on the corresponding timer 60 of each VCG member, by notifying the delay state of each VCG member of the container frame transfer unit 66, and calling the Container frame transfer unit 66;

The delay unit 64 is specifically configured to: if it is determined that the delay count on the timer 60 of a certain VCG member is 0, determine that the VCG member is in a non-delay state, and notify the container frame transfer unit 66 that the VCG member is Non-delay state; if it is determined that the delay count on the corresponding timer 60 of a VCG member is non-zero, it is determined that the VCG member is in a delayed state, and the delay count on the corresponding timer 60 of the VCG member is reduced. After the corresponding delay count is performed, the container frame transfer unit 66 is notified that the VCG member is in a delayed state.

The container frame transfer unit 66 is configured to: for a VCG member in a delayed state, construct a free container frame and transmit, and for a VCG member in a non-delay state, take out the corresponding from the container frame buffer unit 62. The container frame is transmitted and called, and the container frame buffer unit 62 is called.

2 is a schematic structural diagram of a VCG differential delay processing system according to an embodiment of the present invention, as shown in FIG. 2, and referring to FIG. 6, a VCG differential delay processing device in a VCG differential delay processing system includes: a timer 60. A container frame buffer unit 62, a delay unit 64, and a container frame transfer unit 66. After the container frame of each VCG member is encapsulated and mapped, it enters the VCG differential delay. The processing device buffers the container frames of the VCG members by the container frame buffer unit 62. The delay unit 64 notifies the extension of each VCG member of the container frame transfer unit 66 according to the differential transmission delay set on the corresponding timer 60 of each VCG member. In the state of time, the container frame transfer unit 66 sequentially reads the container frame from the container frame buffer unit 62 for transmission. When the VCG member needs to delay, the container frame transfer unit 66 of the corresponding VCG member transmits the free container frame, and temporarily does not read the container. Frame, wait until the delay is over.

As shown in Figure 2, the channel delay transmission logic is introduced between the VC mapping and the cross-connection. The complexity of other functional logics is not increased due to the delay, and the corresponding relationship between the channel overhead and the payload of each channel is not affected. So, there is no need to introduce complex processing in order to maintain the correspondence between channel overhead and payload.

Step 401: Set the delay count of the timer 60 of the VC-12#1 to 0, and set the VC-12#2. The timer 60 has a delay count of 128 (16 milliseconds/125 microseconds) and the VC-12#3 timer 60 has a delay count of 64 (8 milliseconds/125 microseconds).

Step 402: The container frame buffer unit 62 saves the mapped container frame of each member channel. In step 403, the timer 60 of the member VC-12#1 counts as 0, and the delay unit 64 notifies its corresponding container frame transfer unit 66 that the state is non-delayed. The counts of members VC-12#2 and VC-12#3 timers 60 are not 0, and the timers 60 respectively reduce the count by 1 processing, and the delay unit 64 passes.

Step 405, the container frame transfer unit 66 of the member VC-12#1 is in a non-delay state, and the transmitter takes the container frame transfer from the container frame buffer unit 62.

In step 406, the container frame transfer unit 66 of the member VC-12#2 and the member VC-12#3 is in a delayed state, and the container frame transfer unit 66 transmits the free container frame.

In summary, the delay status of each VCG member of the container frame transfer unit 66 is notified by the differential transmission delay set on the corresponding timer 60 of each VCG member. For the VCG member in the delayed state, the container frame transfer unit 66 The idle container frame is constructed and transmitted. For the VCG member in the non-delay state, the corresponding container frame is taken out from the container frame buffer unit 62 and the virtual cascaded differential delay is eliminated or less, thereby avoiding the differential delay of the sink. Exceeding the processing capability range, resulting in decapsulation failure. While the preferred embodiments of the present invention have been disclosed for purposes of illustration, those skilled in the art will recognize that various modifications, additions and substitutions are possible, and the scope of the invention should not be limited to the embodiments described above.

It should be noted that in the various components of the controller of the present invention, the components therein are logically divided according to the functions to be implemented, but the present invention is not limited thereto, and the respective components may be re-as needed as needed. Dividing or combining, for example, some components may be combined into a single component, or some components may be further broken down into more subcomponents.

The various component embodiments of the present invention may be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. Those skilled in the art will appreciate that a microprocessor or digital signal processor (DSP) may be used in practice to implement some or all of the functionality of some or all of the components of the controller in accordance with embodiments of the present invention. The invention can also be implemented as a device or device program (e.g., a computer program and a computer program product) for performing some or all of the methods described herein. Such a program implementing the present invention may be stored on a computer readable medium or may be in the form of one or more signals. Such signals may be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

It should be noted that the above-described embodiments are illustrative of the invention and are not intended to limit the invention, and that alternative embodiments can be devised without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses shall not be construed as a limitation. The word "comprising" does not exclude the presence of the elements or steps that are not recited in the claims. The word "a" or "an" preceding a component does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several distinct elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means can be embodied by the same hardware item. The use of the words first, second, and third does not indicate any order. These words can be interpreted as names.

Claims

claims

1. A method for processing virtual cascade group VCG differential delay, including:

Step 1. Set the differential transmission delay of each VCG member to send container frames on the corresponding timer of each VCG member;

Step 2: The container frame buffer unit caches the mapped container frames of each VCG member, and based on the differential transmission delay set on the corresponding timer of each VCG member, the container frame transmission unit is notified of the delay of each VCG member through the delay unit. In delayed state, perform step 3;

Step 3: For VCG members in the delayed state, construct an idle container frame through the container frame transmission unit and transmit it. For VCG members in the non-delayed state, retrieve the corresponding container from the container frame buffer unit frame and transmit it, go to step 2.

2. The method of claim 1, wherein the differential transmission delay is the difference between the minimum delay and the maximum delay of each VCG member arriving at the sink.

3. The method of claim 1, wherein the differential transmission delay is an estimated differential delay value obtained by estimating the networking situation.

4. The method of claim 1, wherein the differential transmission delay is an accurate differential delay value obtained by testing with a tester.

5. The method according to claim 1, wherein in step 2, according to the differential transmission delay set on the corresponding timer of each VCG member, the delay unit is notified to the container frame transmission unit of the delay of each VCG member. Status includes:

If it is determined that the delay count on the corresponding timer of a certain VCG member is 0, it is determined that the VCG member is in a non-delay state, and the container frame transmission unit is notified through the delay unit that the VCG member is in a non-delay state. ;

If it is determined that the delay count on the corresponding timer of a certain VCG member is non-0, it is determined that the VCG member is in the delay state, and the corresponding delay count is subtracted from the delay count on the corresponding timer of the VCG member. Afterwards, the delay unit notifies the container frame transmission unit of the VCG members are in delayed state.

6. A virtual concatenated group VCG differential delay processing device, including:

The timer corresponding to each VCG member is used to set the differential transmission delay for each VCG member to send container frames;

The container frame buffer unit is used to cache the mapped container frames of each VCG member and call the delay unit;

The delay unit is used to notify the container frame transmission unit of the delay status of each VCG member according to the differential transmission delay set on the corresponding timer of each VCG member, and call the container frame transmission unit;

The container frame transmission unit is configured to construct and transmit idle container frames for VCG members in a delayed state, and to retrieve corresponding containers from the container frame buffer unit for VCG members in a non-delayed state. The frame is transferred and the container framebuffer unit is called.

7. The device according to claim 6, wherein the differential transmission delay set by each timer is the difference between the minimum delay and the maximum delay of each VCG member arriving at the sink end.

8. The device according to claim 6, wherein the differential transmission delay set by each timer is an estimated differential delay value obtained by estimating the networking situation.

9. The device as claimed in claim 6, wherein the differential transmission delay set by each timer is an accurate differential delay value obtained by testing with a tester.

10. The device according to claim 6, wherein the delay unit is configured to: if it is determined that the delay count on the corresponding timer of a certain VCG member is 0, determine that the VCG member is in a non-delay state , notify the container frame transmission unit that the VCG member is in a non-delayed state;

If it is determined that the delay count on the corresponding timer of a certain VCG member is non-0, it is determined that the VCG member is in the delay state, and the delay count on the corresponding timer of the VCG member is determined to be non-zero. After subtracting the corresponding delay count from the count, the container frame transmission unit is notified that the VCG member is in a delayed state.