WO2014005391A1 - 伽码电压产生装置和方法 - Google Patents

伽码电压产生装置和方法 Download PDF

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Publication number
WO2014005391A1
WO2014005391A1 PCT/CN2012/084974 CN2012084974W WO2014005391A1 WO 2014005391 A1 WO2014005391 A1 WO 2014005391A1 CN 2012084974 W CN2012084974 W CN 2012084974W WO 2014005391 A1 WO2014005391 A1 WO 2014005391A1
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WIPO (PCT)
Prior art keywords
gamma
voltage
reference voltage
gamma reference
polarity
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Ceased
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PCT/CN2012/084974
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English (en)
French (fr)
Inventor
孙志华
张亮
许益祯
张斌
李卫海
侯帅
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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BOE Technology Group Co Ltd
Beijing BOE Display Technology Co Ltd
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Publication of WO2014005391A1 publication Critical patent/WO2014005391A1/zh
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Classifications

    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3685Details of drivers for data electrodes
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G2310/00Command of the display device
    • G09G2310/02Addressing, scanning or driving the display screen or processing steps related thereto
    • G09G2310/0264Details of driving circuits
    • G09G2310/027Details of drivers for data electrodes, the drivers handling digital grey scale data, e.g. use of D/A converters
    • GPHYSICS
    • G09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/34Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
    • G09G3/36Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
    • G09G3/3611Control of matrices with row and column drivers
    • G09G3/3614Control of polarity reversal in general

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to a gamma voltage generating apparatus and method. Background technique
  • a liquid crystal display device includes a liquid crystal display panel for image display, and the liquid crystal display panel includes an upper glass substrate, a lower glass substrate, and a liquid crystal cell; the liquid crystal cell is located between the upper glass substrate and the lower glass substrate.
  • each of the luminance gray scales corresponds to a gamma voltage.
  • the polarity flipping manner of the liquid crystal panel includes frame flipping, column flipping, row flipping, dot flipping, and the like.
  • the voltage applied to the liquid crystal cell is equal to the voltage difference between the common electrode and the pixel electrode.
  • the common electrode voltage (Vcom) is fixed, and the voltage of the pixel electrode is generated by the Gamma voltage.
  • Vcom common electrode voltage
  • the two sets of Gamma voltages are on both sides of the common electrode voltage, and a positive and negative voltage difference can be formed. Taking 18 Gamma voltages as an example, V1 V9 forms a positive voltage difference with Vcom, V10 ⁇ V18 forms a negative voltage difference, V1 ⁇ V18 are generated by V-REF resistors, and Vcom is near V9 and V10.
  • Source Driver IC Internal 256 positive voltage divider resistors R0 R255 divide V1 ⁇ V9 into 256 positive Gamma voltages; Source Driver IC internal 256 negative voltage divider resistors R0 R255 divides V10 ⁇ V18 into 256 negative Gamma voltages.
  • the polarity flip signal collected by the Source Driver IC controls each pixel to be charged with a positive or negative voltage.
  • the adjacent odd channel (Odd channel) and even channel (Even channel) in the Source Driver IC share a pair of digital-to-analog conversion devices (DACs): +DAC and -DAC, and then multiplexer (MUX) Switches the positive and negative polarity of the Odd channel and the Even channel.
  • DACs digital-to-analog conversion devices
  • MUX multiplexer
  • a primary object of the present invention is to provide a gamma voltage generating apparatus and method which can generate a gamma voltage using only a plurality of piezoelectric resistors.
  • an embodiment of the present invention provides a gamma voltage generating apparatus including a gamma reference voltage generating unit, a polarity inversion signal generating unit, and a gamma voltage generating unit, where
  • the gamma reference voltage generating unit is configured to provide a gamma reference voltage to the gamma voltage generating unit;
  • the gamma reference voltage includes a positive gamma reference voltage and a negative gamma reference voltage, and the absolute values of the positive gamma reference voltage and the negative gamma reference voltage are equal and opposite in polarity;
  • the polarity inversion signal generating unit is configured to provide a polarity flipping signal to the gamma voltage generating unit;
  • the gamma voltage generating unit includes a gamma reference voltage selecting module and a voltage dividing module; the gamma reference voltage selecting module is respectively connected to the gamma reference voltage unit and the polarity inversion signal generating unit, and is used for
  • the common electrode voltage is set to 0, and the polarity of the gamma reference voltage is inverted in the odd frame and the even frame under the control of the polarity flip signal;
  • the voltage dividing module is configured to divide a gamma reference voltage from the gamma reference voltage selection module by using a same component voltage resistor in an odd frame and an even frame to generate a gamma voltage.
  • the gamma reference voltage generating unit is a DC/DC converter.
  • the polarity inversion signal generating unit is a timing controller.
  • the gamma reference voltage selection module includes an NMOS transistor and a PMOS transistor, wherein
  • the polarity inversion signal is connected to a gate of the NMOS transistor and a gate of the PMOS transistor;
  • the negative gamma reference voltage is connected to a source of the NMOS transistor and a source of the PMOS transistor M2;
  • the positive gamma reference voltage is coupled to the drain of the NMOS transistor M1, and the negative gamma reference voltage is coupled to the drain of the PMOS transistor.
  • An embodiment of the present invention further provides a gamma voltage generating method, including the following steps: a gamma reference voltage generating step: providing a gamma voltage generating unit with a gamma reference voltage; the gamma reference voltage including a positive gamma reference a voltage and a negative gamma reference voltage, the positive values of the positive gamma reference voltage and the negative gamma reference voltage being equal and opposite in polarity;
  • a polarity inversion signal generating step providing a polarity inversion signal to the gamma voltage generating unit; a gamma voltage generating step: under the control of the polarity inversion signal, in an odd frame and an even frame Transmitting the polarity of the gamma reference voltage; dividing the gradation reference voltage from the odd-numbered frame and the even-numbered frame by using the same component voltage resistor to generate a gamma voltage.
  • the gamma voltage generating step comprises: dividing the positive gamma reference voltage by a component voltage resistor in an odd frame to generate a positive gamma voltage, and using the even gamma voltage in an even frame.
  • the component voltage resistor divides the negative gamma reference voltage to generate a negative gamma voltage;
  • the gamma reference voltage includes a positive gamma reference voltage and a negative gamma reference voltage, the positive gamma reference voltage and the negative gamma
  • the absolute values of the code reference voltages are equal and opposite in polarity.
  • the gamma voltage generating step comprises: dividing the positive gamma reference voltage by a component voltage resistor in an even frame to generate a positive gamma voltage, and using the odd gamma voltage in an odd frame.
  • the component voltage resistor divides the negative gamma reference voltage to generate a negative gamma voltage.
  • the gamma voltage generating apparatus and method of the embodiment of the present invention by setting the common electrode voltage to 0, and selecting the positive gamma reference voltage or the negative gamma reference voltage according to the polarity inversion signal, thereby The gamma voltage can be generated using only one component of the piezoresistor, and the input multiplexer and output multiplexer can be omitted.
  • 1 is an internal structural design drawing of a conventional source driving integrated circuit
  • FIG. 2 is a block diagram showing a first embodiment of a gamma voltage generating device of the present invention
  • FIG. 3 is a block diagram showing a second embodiment of the gamma voltage generating device of the present invention
  • FIG. 4 is a gamma voltage generating device of the present invention.
  • 5A and 5B are schematic diagrams showing a frame flipping manner of a liquid crystal panel to which the gamma voltage generating device of the present invention is applied;
  • Figure 6 is a schematic view showing the internal structure of a source driver connected to the gamma voltage generating device of the present invention
  • Fig. 7 is a circuit diagram showing an embodiment of a gamma reference voltage selection module included in the gamma voltage generating device of the present invention. detailed description
  • a first embodiment of the gamma voltage generating apparatus of the present invention includes a gamma reference voltage generating unit 21, a polarity inversion signal generating unit 22, and a gamma voltage generating unit 23, wherein the gamma code a reference voltage generating unit 21, configured to provide a gamma reference voltage to the gamma voltage generating unit 23;
  • the gamma reference voltage includes a positive gamma reference voltage and a negative gamma reference voltage, the absolute values of the positive gamma reference voltage and the negative gamma reference voltage being equal and opposite in polarity;
  • the polarity inversion signal generating unit 22 is configured to provide a polarity inversion signal to the gamma voltage generating unit 23;
  • the gamma voltage generating unit 23 includes a gamma reference voltage selection module and a voltage dividing module (not shown in FIG. 2);
  • the gamma reference voltage selection module is respectively connected to the gamma reference voltage generating unit 21 and the polarity inversion signal generating unit 22 (not shown in FIG. 2) for setting the common electrode voltage to 0, and Under the control of the polarity flip signal, the polarity of the gamma reference voltage is inverted in the odd frame and the even frame;
  • the voltage dividing module is connected to the gamma reference voltage selection module (not shown in FIG. 2) for using the same component voltage resistor in the odd frame and the even frame pair from the gamma reference voltage selection module
  • the gamma reference voltage is divided to generate a gamma voltage.
  • the gamma voltage generating unit 23 is further configured to divide the positive gamma reference voltage by using a group of piezoresistors in an odd frame to generate a positive gamma voltage, and And dividing the negative gamma reference voltage by the component voltage resistor in an even frame to generate a negative gamma voltage;
  • the gamma voltage generating unit 23 is further configured to divide the positive gamma reference voltage by a component voltage resistor to generate a positive gamma voltage in an odd frame, and to use the component voltage resistor pair in an even frame.
  • the negative gamma reference voltage is divided to generate a negative gamma voltage.
  • the gamma reference voltage generating unit may employ a DC/DC converter, and the polarity inversion signal generating unit may employ a Timing Controller.
  • the second embodiment of the gamma voltage generating apparatus of the present invention includes a DC/DC converter 31, a timing controller 32, and a gamma voltage generating unit 33, the gamma voltage generating unit 33 and the source driver 34 connections;
  • the DC/DC converter 31 is configured to generate a positive gamma reference voltage +V_REF and a negative gamma reference
  • the absolute values of the voltages -V- REF, +V REF and -V- REF are equal and opposite in polarity;
  • the timing controller 32 is configured to generate a polarity inversion signal that is high in the odd frame and low in the even frame (the timing diagram of the polarity inversion signal is as shown in FIG. 4);
  • the gamma voltage generating unit 33 is respectively connected to the DC/DC converter 31 and the timing controller 32 for setting the common electrode voltage Vcom to 0, and under the control of the polarity inversion signal,
  • the positive gamma reference voltage +V_REF is divided by a group of piezoresistors in an odd frame to generate a positive gamma voltage, and the positive gamma voltage is transmitted to the source driver 34, and at an even number
  • the frame is divided by the component voltage resistor to divide the negative gamma reference voltage -V_REF to generate a negative gamma voltage, and the negative gamma voltage is transmitted to the source driver 34, or at the pole
  • the positive gamma reference voltage +V_REF is divided by an integral voltage resistor in an even frame to generate a positive gamma voltage, and the positive gamma voltage is transmitted to the source a driver 34, and dividing the negative gamma reference voltage -V-REF by the component voltage resistor in an odd
  • the source driver 34 divides the gamma voltage from the gamma voltage generating unit 33 by a group of piezoresistors.
  • the DC/DC converter 31 outputs a positive gamma reference voltage +V_REF and a negative gamma reference voltage -V_REF, +V REF and -V-
  • the absolute values of REF are equal and the polarities are opposite;
  • the gamma voltage generating unit 33 divides +V REF and -V- REF with the same component voltage resistor, and the gamma reference voltage of the adjacent frame is +V-REF and - Switching between V and REF, for example: Using +V-REF as the gamma reference voltage for odd frames, the output gamma voltage polarity is positive, and in even frames --V-REF is used as the gamma reference voltage.
  • the output gamma voltage polarity is negative; or, in the odd frame, use -V_REF as the gamma reference voltage, the output gamma voltage polarity is negative, and the even frame uses +V-REF as the gamma.
  • the code reference voltage, the output gamma voltage polarity is positive.
  • the polarity inversion signal POL outputted by the timing controller 32 is high in odd frames and low in even frames.
  • the liquid crystal panel to which the gamma voltage generating device of the embodiment of the present invention is applied is frame inversion.
  • Fig. 5A shows the polarities of liquid crystal molecules in odd frames
  • Fig. 5B shows the polarities of liquid crystal molecules in even frames.
  • the common electrode voltage Vcom is set to 0 V ground, without providing a specific Vcom externally, and the voltage dividing resistor is reduced by half, for example, the prior art V1-V18
  • the gamma voltage generating device of the embodiment of the present invention only needs to divide the gamma reference voltage by using 9 voltage dividing resistors to generate gamma voltages V1-V9; in odd frames, the gamma voltages are In the case of an even frame, the gamma voltage is negative; and in the embodiment of the present invention, as shown in FIG. 6, after the gamma voltage generating device of the embodiment of the present invention is used, the source driver is only internal.
  • the gamma voltage generating unit includes a gamma reference voltage selecting module and a voltage dividing module; and the gamma reference voltage selecting module is configured to be based on the polarity
  • the flip signal POL selects whether to use the positive gamma reference voltage or the negative gamma reference voltage; and the voltage dividing module is configured to divide the gamma reference voltage selected by the gamma reference voltage selection module.
  • the gamma reference voltage selection module includes an NMOS transistor M1 and a PMOS transistor M2, where
  • the polarity inversion signal POL is connected to the gate of the NMOS transistor M1 and the gate of the PMOS transistor M2;
  • V_REF is connected to the source of the NMOS transistor M1 and the source of the PMOS transistor M2;
  • +V REF is connected to the drain of the NMOS transistor M1, and -V-REF is connected to the drain of the PMOS transistor M2.
  • a gamma reference voltage generating step providing a gamma reference voltage to the gamma voltage generating unit;
  • the gamma reference voltage includes a positive gamma reference voltage and a negative gamma reference voltage, the positive gamma reference voltage and the negative gamma reference voltage
  • the absolute values are equal and the polarities are opposite;
  • a polarity inversion signal generating step providing a polarity inversion signal to the gamma voltage generating unit; a gamma voltage generating step: setting a common electrode voltage to 0, and under the control of the polarity inversion signal, in an odd frame and The even frame flips the polarity of the gamma reference voltage; the odd-numbered frame and the even-numbered frame are used to divide the gamma reference voltage by the same component voltage resistor to generate a gamma voltage.
  • the gamma voltage generating step comprises: dividing the positive gamma reference voltage by a component voltage resistor in an odd frame to generate a positive gamma voltage, and using the even gamma voltage in an even frame.
  • the component voltage resistor divides the negative gamma reference voltage to generate a negative gamma voltage.
  • the gamma voltage generating step further comprises: using one in an even frame The component voltage resistor divides the positive gamma reference voltage to generate a positive gamma voltage, and divides the negative gamma reference voltage by the component voltage resistor in an odd frame to generate a negative gamma voltage.
  • a second embodiment of the gamma voltage generating method of the present invention, applied to the second embodiment of the gamma voltage generating apparatus of the present invention, comprises the following steps:
  • Step 1 DC/DC converter outputs positive gamma reference voltage +V— REF and negative gamma reference voltage
  • -V REF, +V— REF and -V— REF are equal in absolute value and opposite in polarity; set common electrode voltage Vcom to 0V, ground;
  • Step 2 The polarity inversion signal POL outputted by the timing controller is designed to be an odd frame high level and an even frame low level.
  • Step 3 The data input by each channel in the source driver only outputs data to the corresponding one of the output channels, and the input multiplexer and the output multiplexer are omitted;
  • Step 4 In the odd frame, the polarity inversion signal POL is at a high level, the NMOS transistor M1 is turned on, the gamma reference voltage is positive, the gamma voltage is positive, the pixel is positively charged, and all liquid crystal molecules are positive in polarity.
  • the polarity inversion signal POL In the even frame, the polarity inversion signal POL is at a high level, the PMOS transistor M2 is turned on, the gamma reference voltage is negative, the gamma voltage is negative, the pixel is charged with a negative voltage, and all liquid crystal molecules are negative in polarity.
  • the gamma voltage generating apparatus and method of the present invention by setting the common electrode voltage to 0, and selecting the positive gamma reference voltage or the negative gamma reference voltage according to the polarity inversion signal, thereby only using a group of piezoelectric resistors A gamma voltage can be generated and the input multiplexer and output multiplexer can be omitted.

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  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • General Physics & Mathematics (AREA)
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  • Control Of Indicators Other Than Cathode Ray Tubes (AREA)
  • Liquid Crystal Display Device Control (AREA)

Abstract

一种伽玛电压产生装置包括:伽玛参考电压产生单元(21),向伽玛电压产生单元(23)提供伽玛参考电压;极性翻转信号产生单元(22),用于向伽玛电压产生单元(23)提供极性翻转信号;伽玛电压产生单元(23)包括伽玛参考电压选择模块和分压模块;伽玛参考电压选择模块将公共电极电压设置为0,并在该极性翻转信号的控制下,在奇数帧和偶数帧翻转伽玛参考电压的极性;分压模块在奇数帧和偶数帧采用同一组分压电阻对来自伽玛参考电压选择模块的伽玛参考电压进行分压而产生伽玛电压。本发明仅需采用一组分压电阻就可以产生伽玛电压,并且可以省去输入多路复用器和输出多路复用器。

Description

伽码电压产生装置和方法 技术领域
本发明涉及液晶显示领域, 尤其涉及一种伽码电压产生装置和方法。 背景技术
通常液晶显示装置包括用于图像显示的液晶显示面板, 液晶显示面板包 括上玻璃基板、 下玻璃基板以及液晶盒; 所述液晶盒位于所述上玻璃基板和 所述下玻璃基板之间。
通过对液晶分子施加电场, 电压的大小控制液晶分子旋转的角度, 实现 控制透过液晶面板的光量, 因此, 每一个亮度灰阶对应一个伽玛(Gamma ) 电压。 液晶分子长时间向一个方向旋转, 会造成液晶分子的极化, 因此需要 实现液晶分子的极性翻转。 目前液晶面板的极性翻转方式有帧翻转、 列翻转、 行翻转、 点翻转等。
施加在液晶盒上的电压等于公共电极和像素电极的电压差。 公共电极电 压 (Vcom ) 固定, 像素电极的电压由 Gamma电压产生。 要实现液晶面板的 极性翻转, 需要有两组 Gamma电压, 这两组 Gamma电压介于公共电极电压 两边, 可以形成正负压差。 以 18个 Gamma电压为例, V1 V9与 Vcom形成 正压差, V10~V18形成负压差, V1~V18由 V— REF电阻分压产生, Vcom的 大小在 V9和 V10附近。
源极驱动集成电路 ( Source Driver IC ) 内部 256个正分压电阻 R0 R255 将 V1~V9分压成 256个正 Gamma电压;源极驱动集成电路( Source Driver IC ) 内部 256个负分压电阻 R0 R255将 V10~V18分压成 256个负 Gamma电压。
Source Driver IC釆集到的极性翻转信号控制每帧每个像素需要充正电压 或负电压。 如图 1所示, Source Driver IC内相邻的奇通道( Odd channel ) 和 偶通道(Even channel )共用一对数模转换装置(DAC ): +DAC和 -DAC, 然 后用多路复用器 (MUX)切换 Odd channel与 Even channel的正负极性。 发明内容
本发明的主要目的在于提供一种伽码电压产生装置和方法, 仅釆用一组 分压电阻就可以产生伽码电压。 为了达到上述目的, 本发明的实施例提供了一种伽玛电压产生装置, 包 括伽码参考电压产生单元、 极性翻转信号产生单元和伽码电压产生单元, 其 中,
所述伽码参考电压产生单元, 用于向所述伽码电压产生单元提供伽码参 考电压;
该伽码参考电压包括正伽码参考电压和负伽码参考电压 , 该正伽码参考 电压和负伽码参考电压的绝对值相等而极性相反;
所述极性翻转信号产生单元, 用于向所述伽码电压产生单元提供极性翻 转信号;
所述伽码电压产生单元, 包括伽码参考电压选择模块和分压模块; 所述伽码参考电压选择模块, 分别与所述伽码参考电压单元和极性翻转 信号产生单元连接, 用于将公共电极电压设置为 0, 并在该极性翻转信号的 控制下, 在奇数帧和偶数帧翻转伽码参考电压的极性;
所述分压模块, 用于在奇数帧和偶数帧釆用同一组分压电阻对来自所述 伽码参考电压选择模块的伽码参考电压进行分压而产生伽码电压。
在本发明的实施例中, 所述伽码参考电压产生单元是 DC/DC转换器。 在本发明的实施例中, 所述极性翻转信号产生单元是时序控制器。
在本发明的实施例中,所述伽码参考电压选择模块包括 NMOS晶体管和 PMOS晶体管, 其中,
所述极性翻转信号接入所述 NMOS晶体管的栅极和所述 PMOS晶体管 的栅极;
所述负伽码参考电压接入所述 NMOS晶体管的源极和所述 PMOS晶体 管 M2的源极;
所述正伽码参考电压接入所述 NMOS晶体管 Ml的漏极, 所述负伽码参 考电压接入所述 PMOS晶体管的漏极。
本发明的实施例还提供了一种伽码电压产生方法, 包括以下步骤: 伽码参考电压产生步骤: 向所述伽码电压产生单元提供伽码参考电压; 伽码参考电压包括正伽码参考电压和负伽码参考电压, 该正伽码参考电 压和负伽码参考电压的绝对值相等而极性相反;
极性翻转信号产生步骤: 向所述伽码电压产生单元提供极性翻转信号; 伽码电压产生步骤: 在该极性翻转信号的控制下, 在奇数帧和偶数帧翻 转伽码参考电压的极性; 在奇数帧和偶数帧釆用同一组分压电阻对来自该伽 码参考电压进行分压而产生伽码电压。
在本发明的实施例中, 所述伽码电压产生步骤包括: 在奇数帧釆用一组 分压电阻对该正伽码参考电压进行分压而产生正伽码电压, 而在偶数帧釆用 该组分压电阻对该负伽码参考电压进行分压而产生负伽码电压; 所述伽码参 考电压包括正伽码参考电压和负伽码参考电压, 该正伽码参考电压和负伽码 参考电压的绝对值相等而极性相反。
在本发明的实施例中, 所述伽码电压产生步骤包括: 在偶数帧釆用一组 分压电阻对该正伽码参考电压进行分压而产生正伽码电压, 而在奇数帧釆用 该组分压电阻对该负伽码参考电压进行分压而产生负伽码电压。
与现有技术相比, 本发明的实施例的伽码电压产生装置和方法, 通过将 公共电极电压设置为 0 , 并根据极性翻转信号选择正伽码参考电压或负伽码 参考电压, 从而仅需釆用一组分压电阻就可以产生伽码电压, 并且可以省去 输入多路复用器和输出多路复用器。 附图说明
图 1是现有的源极驱动集成电路的内部结构设计图;
图 2是本发明的伽玛电压产生装置的第一实施例的结构框图; 图 3是本发明的伽码电压产生装置的第二实施例的结构框图; 图 4是本发明的伽码电压产生装置的第二实施例包括的时序控制器产生 的极性翻转信号的时序图;
图 5A、 图 5B是应用了本发明的伽码电压产生装置的液晶面板釆用的帧 翻转方式的示意图;
图 6是与本发明的伽码电压产生装置连接的源极驱动器的内部结构示意 图; 以及
图 7是本发明的伽码电压产生装置包括的伽码参考电压选择模块的一实 施例的电路图。 具体实施方式
为使得本发明的目的、 技术方案和优点表达得更加清楚明白, 下面结合 附图及具体实施例对本发明再做进一步详细的说明。 如图 2所示, 本发明的伽玛电压产生装置的第一实施例, 包括伽码参考 电压产生单元 21、极性翻转信号产生单元 22和伽码电压产生单元 23 , 其中, 所述伽码参考电压产生单元 21 , 用于向所述伽码电压产生单元 23提供 伽码参考电压;
所述伽码参考电压包括正伽码参考电压和负伽码参考电压, 该正伽码参 考电压和负伽码参考电压的绝对值相等而极性相反;
所述极性翻转信号产生单元 22, 用于向所述伽码电压产生单元 23提供 极性翻转信号;
所述伽码电压产生单元 23 , 包括伽码参考电压选择模块和分压模块(图 2中未示);
所述伽码参考电压选择模块,分别与所述伽码参考电压产生单元 21和所 述极性翻转信号产生单元 22连接(图 2中未示), 用于将公共电极电压设置 为 0, 并在该极性翻转信号的控制下, 在奇数帧和偶数帧翻转伽码参考电压 的极性;
所述分压模块, 与所述伽码参考电压选择模块连接(图 2中未示), 用于 在奇数帧和偶数帧釆用同一组分压电阻对来自所述伽码参考电压选择模块的 伽码参考电压进行分压而产生伽码电压。
具体地, 在该第一实施例中, 所述伽码电压产生单元 23进一步用于在奇 数帧釆用一组分压电阻对该正伽码参考电压进行分压而产生正伽码电压, 而 在偶数帧釆用该组分压电阻对该负伽码参考电压进行分压而产生负伽码电 压;
所述伽码电压产生单元 23进一步用于在奇数帧釆用一组分压电阻对该 正伽码参考电压进行分压而产生正伽码电压, 而在偶数帧釆用该组分压电阻 对该负伽码参考电压进行分压而产生负伽码电压。
在本发明的实施例中, 所述伽码参考电压产生单元可以釆用直流 /直流转 换器(DC/DC Converter ), 所述极性翻转信号产生单元可以釆用时序控制器 ( Timing Controller )。
如图 3所示,本发明的伽码电压产生装置的第二实施例包括 DC/DC转换 器 31、 时序控制器 32和伽码电压产生单元 33 , 该伽码电压产生单元 33与源 极驱动器 34连接;
所述 DC/DC转换器 31 ,用于产生正伽码参考电压 +V— REF和负伽码参考 电压 -V— REF, +V REF和 -V— REF的绝对值相等而极性相反;
所述时序控制器 32 , 用于产生在奇数帧为高电平而在偶数帧为低电平的 极性翻转信号 (该极性翻转信号的时序图如图 4所示);
所述伽码电压产生单元 33 , 分别与所述 DC/DC转换器 31和所述时序控 制器 32连接, 用于将公共电极电压 Vcom设置为 0, 并在该极性翻转信号的 控制下, 在奇数帧釆用一组分压电阻对该正伽码参考电压 +V— REF进行分压 而产生正伽码电压, 并将该正伽码电压传送至所述源极驱动器 34, 而在偶数 帧釆用该组分压电阻对该负伽码参考电压 -V— REF进行分压而产生负伽码电 压, 并将该负伽码电压传送至所述源极驱动器 34, 或者, 在该极性翻转信号 的控制下, 在偶数帧釆用一组分压电阻对该正伽码参考电压 +V— REF进行分 压而产生正伽码电压, 并将该正伽码电压传送至所述源极驱动器 34, 而在奇 数帧釆用该组分压电阻对该负伽码参考电压 -V— REF进行分压而产生负伽码 电压;
所述源极驱动器 34,釆用一组分压电阻对来自所述伽码电压产生单元 33 的伽码电压进行分压。
在本发明的伽码电压产生装置的第二实施例中, DC/DC转换器 31输出 正伽码参考电压 +V— REF和负伽码参考电压 -V— REF , +V REF和 -V— REF绝 对值相等, 极性相反; 伽码电压产生单元 33釆用同一组分压电阻分别对 +V REF和 -V— REF分压 , 相邻帧的伽码参考电压在 +V— REF和 -V— REF之间 切换, 例如: 在奇数帧用 +V— REF作为伽码参考电压, 输出的伽码电压极性 都为正, 而在偶数帧釆用 -V— REF作为伽码参考电压,输出的伽码电压极性都 为负; 或者, 在奇数帧釆用 -V— REF作为伽码参考电压, 输出的伽码电压极性 都为负, 而在偶数帧用 +V— REF作为伽码参考电压, 输出的伽码电压极性都 为正。 如图 4所示, 所述时序控制器 32输出的极性翻转信号 POL, 在奇数帧 为高电平, 在偶数帧是低电平。
如图 5A、 图 5B所示, 应用了本发明的实施例的伽码电压产生装置的液 晶面板釆用帧反转( frame inversion )。 图 5A示意的是在奇数帧液晶分子的极 性, 图 5B示意的是在偶数帧液晶分子的极性。
在本发明的实施例的伽码电压产生装置中, 公共电极电压 Vcom设置成 0V接地, 不用外部提供特定的 Vcom, 并且分压电阻减少一半, 例如现有技 V1-V18, 则本发明的实施例的伽码电压产生装置只需釆用 9个分压电阻对伽 码参考电压进行分压而产生伽码电压 V1-V9; 奇数帧时, 伽码电压均为正; 偶数帧时, 伽码电压均为负; 而在本发明的实施例中, 如图 6所示, 釆用了 本发明的实施例的伽码电压产生装置后, 源极驱动器内部只需釆用一组 256 个分压电阻对 V1~V9分压,且每个通道输入的数据只输出数据给所对应的一 个输出通道, 从而可以省掉输入多路复用器和输出多路复用器。
在本发明的伽码电压产生装置的第二实施例中, 所述伽码电压产生单元 包括伽码参考电压选择模块和分压模块; 所述伽码参考电压选择模块用于根 据所述极性翻转信号 POL选择是釆用正伽码参考电压还是釆用负伽码参考电 压; 所述分压模块用于对所述伽码参考电压选择模块选择的伽码参考电压进 行分压。
如图 7所示, 根据一种具体实施方式, 所述伽码参考电压选择模块包括 NMOS晶体管 Ml和 PMOS晶体管 M2, 其中,
所述极性翻转信号 POL接入所述 NMOS晶体管 Ml的栅极和所述 PMOS 晶体管 M2的栅极;
V— REF接入所述 NMOS晶体管 Ml的源极和所述 PMOS晶体管 M2的源 极;
+V REF接入所述 NMOS晶体管 Ml的漏极, -V— REF接入所述 PMOS 晶体管 M2的漏极。
本发明的伽码电压产生方法的第一实施例包括以下步骤:
伽码参考电压产生步骤: 向所述伽码电压产生单元提供伽码参考电压; 伽码参考电压包括正伽码参考电压和负伽码参考电压, 该正伽码参考电 压和负伽码参考电压的绝对值相等而极性相反;
极性翻转信号产生步骤: 向所述伽码电压产生单元提供极性翻转信号; 伽码电压产生步骤: 将公共电极电压设置为 0, 并在该极性翻转信号的 控制下, 在奇数帧和偶数帧翻转伽码参考电压的极性; 在奇数帧和偶数帧釆 用同一组分压电阻对来自该伽码参考电压进行分压而产生伽码电压。
在本发明的实施例中, 所述伽码电压产生步骤包括: 在奇数帧釆用一组 分压电阻对该正伽码参考电压进行分压而产生正伽码电压, 而在偶数帧釆用 该组分压电阻对该负伽码参考电压进行分压而产生负伽码电压。 在本发明的实施例中, 所述伽码电压产生步骤还包括: 在偶数帧釆用一 组分压电阻对该正伽码参考电压进行分压而产生正伽码电压, 而在奇数帧釆 用该组分压电阻对该负伽码参考电压进行分压而产生负伽码电压。
本发明的伽码电压产生方法的第二实施例, 应用于本发明的伽码电压产 生装置的第二实施例, 包括以下步骤:
步骤一: DC/DC转换器输出正伽码参考电压 +V— REF和负伽码参考电压
-V REF, +V— REF和 -V— REF绝对值相等, 极性相反; 将公共电极电压 Vcom 设置为 0V, 接地;
步骤二:将时序控制器输出的极性翻转信号 POL设计成奇数帧为高电平, 偶数帧为低电平。
步骤三: 源极驱动器内每个通道输入的数据只输出数据给所对应的一个 输出通道, 省掉输入多路复用器和输出多路复用器;
步骤四: 奇数帧时, 极性翻转信号 POL为高电平, NMOS晶体管 Ml打 开, 伽码参考电压为正, 伽码电压均为正, 为像素充正电压, 所有液晶分子 极性均为正; 偶数帧时, 极性翻转信号 POL为高电平, PMOS晶体管 M2打 开, 伽码参考电压为负, 伽码电压均为负, 为像素充负电压, 所有液晶分子 极性为负。
本发明的伽码电压产生装置和方法, 通过将公共电极电压设置为 0, 并 根据极性翻转信号选择正伽码参考电压或负伽码参考电压, 从而仅需釆用一 组分压电阻就可以产生伽码电压, 并且可以省去输入多路复用器和输出多路 复用器。
以上说明对本发明而言只是说明性的, 而非限制性的, 本领域普通技术 人员理解, 在不脱离所附权利要求所限定的精神和范围的情况下, 可做出许 多修改、 变化或等效, 但都将落入本发明的保护范围内。

Claims

权 利 要 求 书
1. 一种伽玛电压产生装置, 包括伽码参考电压产生单元、 极性翻转信号 产生单元、 和伽码电压产生单元, 其中,
所述伽码参考电压产生单元, 用于向所述伽码电压产生单元提供伽码参 考电压;
该伽码参考电压包括正伽码参考电压和负伽码参考电压 , 该正伽码参考 电压和负伽码参考电压的绝对值相等而极性相反;
所述极性翻转信号产生单元, 用于向所述伽码电压产生单元提供极性翻 转信号;
所述伽码电压产生单元, 用于在该极性翻转信号的控制下, 在奇数帧和 偶数帧翻转伽码参考电压的极性, 并在奇数帧和偶数帧釆用同一组分压电阻 对该伽码参考电压进行分压而产生伽码电压。
2、 如权利要求 1所述的伽码电压产生装置, 其中,
所述伽码电压产生单元包括伽码参考电压选择模块和分压模块; 所述伽码参考电压选择模块, 用于在该极性翻转信号的控制下, 在奇数 帧和偶数帧翻转伽码参考电压的极性;
所述分压模块, 用于在奇数帧和偶数帧釆用同一组分压电阻对来自所述 伽码参考电压选择模块的伽码参考电压进行分压而产生伽码电压。
3、如权利要求 1所述的伽码电压产生装置, 所述伽码参考电压产生单元 是 DC/DC转换器。
4、如权利要求 1所述的伽码电压产生装置, 所述极性翻转信号产生单元 是时序控制器。
5、如权利要求 1至 4中任一权利要求所述的伽码电压产生装置,其特征 在于,所述伽码参考电压选择模块包括 NMOS晶体管和 PMOS晶体管,其中, 所述极性翻转信号接入所述 NMOS晶体管的栅极和所述 PMOS晶体管 的栅极;
所述伽码参考电压接入所述 NMOS晶体管的源极和所述 PMOS晶体管 M2的源极;
所述正伽码参考电压接入所述 NMOS晶体管的漏极,所述负伽码参考电 压接入所述 PMOS晶体管的漏极。
6、 一种伽码电压产生方法, 包括以下步骤:
伽码参考电压产生步骤: 向所述伽码电压产生单元提供伽码参考电压; 所述伽码参考电压包括正伽码参考电压和负伽码参考电压, 该正伽码参考电 压和负伽码参考电压的绝对值相等而极性相反;
极性翻转信号产生步骤: 向所述伽码电压产生单元提供极性翻转信号; 伽码电压产生步骤: 在该极性翻转信号的控制下, 在奇数帧和偶数帧翻 转伽码参考电压的极性; 在奇数帧和偶数帧釆用同一组分压电阻对来自该伽 码参考电压进行分压而产生伽码电压。
7、如权利要求 6所述的伽码电压产生方法,所述伽码电压产生步骤包括: 在奇数帧釆用一组分压电阻对该正伽码参考电压进行分压而产生正伽码电 压, 而在偶数帧釆用该组分压电阻对该负伽码参考电压进行分压而产生负伽 码电压; 所述伽码参考电压包括正伽码参考电压和负伽码参考电压, 该正伽 码参考电压和负伽码参考电压的绝对值相等而极性相反。
8、如权利要求 6或 7所述的伽码电压产生方法, 所述伽码电压产生步骤 包括: 在偶数帧釆用一组分压电阻对该正伽码参考电压进行分压而产生正伽 码电压, 而在奇数帧釆用该组分压电阻对该负伽码参考电压进行分压而产生 负伽码电压。
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